oweals/u-boot.git
8 years agoMerge branch 'master' of http://git.denx.de/u-boot-sunxi
Tom Rini [Sun, 12 Jun 2016 16:52:33 +0000 (12:52 -0400)]
Merge branch 'master' of git.denx.de/u-boot-sunxi

8 years agoMerge branch 'master' of git://git.denx.de/u-boot-mips
Tom Rini [Sun, 12 Jun 2016 16:52:19 +0000 (12:52 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-mips

8 years agoMerge branch 'master' of git://www.denx.de/git/u-boot-imx
Tom Rini [Sun, 12 Jun 2016 16:51:34 +0000 (12:51 -0400)]
Merge branch 'master' of git://denx.de/git/u-boot-imx

8 years agoMerge branch 'master' of git://git.denx.de/u-boot-x86
Tom Rini [Sun, 12 Jun 2016 13:55:16 +0000 (09:55 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-x86

8 years agox86: broadwell: gpio: Remove the codes to set up pin control
Bin Meng [Wed, 8 Jun 2016 12:07:39 +0000 (05:07 -0700)]
x86: broadwell: gpio: Remove the codes to set up pin control

Now that we have set up pin control in cpu_init_r(), remove the
duplicated codes in the broadwell gpio driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: Probe pinctrl driver in cpu_init_r()
Bin Meng [Wed, 8 Jun 2016 12:07:38 +0000 (05:07 -0700)]
x86: Probe pinctrl driver in cpu_init_r()

At present pinctrl driver gets probed in ich6_gpio driver's probe
routine, which has two issues:

 - Pin's PADs only gets configured when GPIO driver is probed, which
   is not done by default. This leaves the board in a partially
   functional state as we must initialize PADs correctly to get
   perepherals fully working.
 - The probe routine of pinctrl driver is called multiple times, as
   normally there are multiple GPIO controllers. It should really
   be called just once.

Move the call to syscon_get_by_driver_data() from ich6_gpio driver
to cpu_init_r().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: George McCollister <george.mccollister@gmail.com>
Tested-by: George McCollister <george.mccollister@gmail.com>
8 years agox86: Enable regmap and syscon for coreboot and qemu-x86
Bin Meng [Wed, 8 Jun 2016 12:07:37 +0000 (05:07 -0700)]
x86: Enable regmap and syscon for coreboot and qemu-x86

These are generic and should be turned on on coreboot and qemu-x86.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: Update x86-pinctrl driver device-tree-bindings doc
Bin Meng [Wed, 8 Jun 2016 12:07:36 +0000 (05:07 -0700)]
x86: Update x86-pinctrl driver device-tree-bindings doc

This updates the device-tree-bindings doc for x86-pinctrl driver:

 - clarify "gpio-offset" is required only when "mode-gpio" is set
 - correct property name "pull-strength"
 - use tab instead of space at several places

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: baytrail: Configure card detect pin of the SD controller
Bin Meng [Wed, 8 Jun 2016 12:07:35 +0000 (05:07 -0700)]
x86: baytrail: Configure card detect pin of the SD controller

As of today, the latest version FSP (gold4) for BayTrail misses the
PAD configuration of the SD controller's Card Detect signal. The
default PAD value for the CD pin sets the pin to work in GPIO mode,
which causes card detect status cannot be reflected by the Present
State register in the SD controller (bit 16 & bit 18 are always zero).

Add a configuration for this pin in the pinctrl node.

Note I've checked the PAD configuration for all the pins in all the
3 controllers (eMMC/SDIO/SD). Only this SDMMC3_CD_B pin does not get
initialized to correct mode by FSP. With fsp,emmc-boot-mode set to
2 (eMMC 4.1), eMMC pins are initialized to func 1, but if we set
fsp,emmc-boot-mode to 1 (auto), those pins are initialized to func 3
which is correct according to datasheet.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: baytrail: Change fsp, emmc-boot-mode to "auto"
Bin Meng [Wed, 8 Jun 2016 12:07:34 +0000 (05:07 -0700)]
x86: baytrail: Change fsp, emmc-boot-mode to "auto"

At present all BayTrail boards configure fsp,emmc-boot-mode to 2,
which means "eMMC 4.1" per FSP documentation. However, eMMC 4.1
only shows up on some early stepping silicon of BayTrail SoC.
Newer stepping SoC integrates an eMMC 4.5 controller. Intel FSP
provides a config option fsp,emmc-boot-mode which tells FSP which
eMMC controller it initializes. Instead of hardcoded to 2, now
we change it to 1 which means "auto".

With this change, MinnowMax board (with a D0 stepping BayTrail SoC)
can see the eMMC 4.5 controller at PCI address 00.17.00 via U-Boot
'pci' command.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: baytrail: Add 'reg' property in the pinctrl node
Bin Meng [Wed, 8 Jun 2016 12:07:33 +0000 (05:07 -0700)]
x86: baytrail: Add 'reg' property in the pinctrl node

Without a 'reg' property, pinctrl driver probe routine fails in
its pre_probe() with a return value of -EINVAL.

Add 'reg' property for all BayTrail boards. Note for BayleyBay,
the pinctrl node is newly added.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: ich6_gpio: Output return value of syscon_get_by_driver_data()
Bin Meng [Wed, 8 Jun 2016 12:07:32 +0000 (05:07 -0700)]
x86: ich6_gpio: Output return value of syscon_get_by_driver_data()

The call to syscon_get_by_driver_data() does not save its return value.
Print it out to aid debugging.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: acpi: Fix madt lapic generation
George McCollister [Tue, 7 Jun 2016 18:40:18 +0000 (13:40 -0500)]
x86: acpi: Fix madt lapic generation

An accumulated length was incorrectly added to current each pass
through the loop. On system with more than 2 cores this caused a
corrupt MADT to be generated.

Signed-off-by: George McCollister <george.mccollister@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agoarmv8: ls2080aqds: Enable QSPI boot support
Yuan Yao [Wed, 8 Jun 2016 10:25:00 +0000 (18:25 +0800)]
armv8: ls2080aqds: Enable QSPI boot support

This patch adds QSPI boot support for LS2080AQDS board.
The QSPI boot image need to be programmed into the QSPI flash
first. Then we can switch to booting from QSPI memory space.

Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoconfigs: ls2080aqds_nand_defconfig: Enable QSPI
Yuan Yao [Wed, 8 Jun 2016 10:24:59 +0000 (18:24 +0800)]
configs: ls2080aqds_nand_defconfig: Enable QSPI

The Freescale QSPI driver has been converted to Driver Model.
This patch enables FSL_QSPI and its dependence options, DM, DM_SPI,
OF_CONTROL and so on.

Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoconfigs: ls2080a: Increase load image len in NAND boot
Yuan Yao [Wed, 8 Jun 2016 10:24:58 +0000 (18:24 +0800)]
configs: ls2080a: Increase load image len in NAND boot

Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: ls2080aqds: Config QSPI pin mux via FPGA in NAND boot
Yuan Yao [Wed, 8 Jun 2016 10:24:57 +0000 (18:24 +0800)]
armv8: ls2080aqds: Config QSPI pin mux via FPGA in NAND boot

Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agodts: ls2080aqds: Add QSPI dts node
Yuan Yao [Wed, 8 Jun 2016 10:24:56 +0000 (18:24 +0800)]
dts: ls2080aqds: Add QSPI dts node

Add QSPI controller and slave dts node for LS2080AQDS board.

Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoconfigs: ls2080aqds: Enable QSPI flash support
Yuan Yao [Wed, 8 Jun 2016 10:24:55 +0000 (18:24 +0800)]
configs: ls2080aqds: Enable QSPI flash support

Enable QSPI flash related configure options.

Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: ls2080aqds: disable IFC NOR & QIXIS when QSPI enable
Yuan Yao [Wed, 8 Jun 2016 10:24:54 +0000 (18:24 +0800)]
armv8: ls2080aqds: disable IFC NOR & QIXIS when QSPI enable

When QSPI is enabled, NOR flash and QIXIS can't be accessed
through IFC due to pin mux. Enable I2C QIXIS access and I2C
early init to read the sysclk and ddrclk.

Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoconfigs: ls2080a_common: Remove duplicate NOR configs
Yuan Yao [Wed, 8 Jun 2016 10:24:53 +0000 (18:24 +0800)]
configs: ls2080a_common: Remove duplicate NOR configs

The NOR flash related configure options appear in ls2080aqds.h and
ls2080ardb.h, and the two files both includ ls2080a_common.h.
This patch remove the duplicated options in ls2080a_common.h.

Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: ls2080aqds: Select QSPI CLK div via SCFG
Yuan Yao [Wed, 8 Jun 2016 10:24:52 +0000 (18:24 +0800)]
armv8: ls2080aqds: Select QSPI CLK div via SCFG

QSPI module output SCLK divisor value is configured through SCFG.

Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agodrivers: i2c: mxc: Add early init
Yuan Yao [Wed, 8 Jun 2016 10:24:51 +0000 (18:24 +0800)]
drivers: i2c: mxc: Add early init

Add early i2c init function with conservative divider when the exact
clock rate is not available.

Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoboard: ls2080a: Add "mcinitcmd" env for MC & DPL deployment
Pratiyush Mohan Srivastava [Wed, 20 Jan 2016 06:59:03 +0000 (12:29 +0530)]
board: ls2080a: Add "mcinitcmd" env for MC & DPL deployment

Environment variable mcinitcmd is defined to initiate MC and DPL
deployment from the location where it is stored (NOR, NAND, SD, SATA,
USB) during booting. If this variable is not defined then macro
MC_BOOT_ENV_VAR will be null and MC will not be booted and DPL will
not be applied during U-boot booting.

Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8/ls2080a: configure PMU's PCTBENR to enable WDT
Yunhui Cui [Wed, 8 Jun 2016 02:31:42 +0000 (10:31 +0800)]
armv8/ls2080a: configure PMU's PCTBENR to enable WDT

The SP805-WDT module on LS2080A requires configuration of PMU's
PCTBENR register to enable watchdog counter decrement and reset
signal generation. The watchdog clock needs to be enabled first.

Signed-off-by: Yunhui Cui <yunhui.cui@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agosunxi: Move the SPL stack top to 0x1A000 on Allwinner A64/A80
Siarhei Siamashka [Mon, 30 May 2016 22:48:06 +0000 (01:48 +0300)]
sunxi: Move the SPL stack top to 0x1A000 on Allwinner A64/A80

Since the SRAM C corruption issue is now resolved on Allwinner
A64, it is possible to move the stack top to the address 0x1A000
on both A64 and A80. The boot ROM can load SPL binaries with
up to 32 KiB size on A64 (the 24 KiB SPL size limitation only
affects A10/A20), and this patch also ensures the availability
of 8 KiB stack.

Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
8 years agosunxi: Downclock AHB1 to 100MHz on Allwinner A64
Siarhei Siamashka [Mon, 30 May 2016 22:48:05 +0000 (01:48 +0300)]
sunxi: Downclock AHB1 to 100MHz on Allwinner A64

Currently the AHB1 clock speed is configured as 200MHz by
the SPL, but this causes a subtle and hard to reproduce data
corruption in SRAM C (for example, this can't be easily
detected with a trivial memset/memcmp test).

For what it's worth, the Allwinner's BSP configures AHB1
as 200MHz, as can be verified by running the devmem2 tool
in the system running the Allwinner's kernel 3.10.x:

   0x1C20028: PLL_PERIPH0_CTRL_REG = 0x90041811
   0x1C20054: AHB1_APB1_CFG_REG    = 0x3180
   0x1C20058: APB2_CFG_REG         = 0x1000000
   0x1C2005C: AHB2_CFG_REG         = 0x1

However the FEL mode uses more conservative settings (100MHz
for AHB1):

   0x1C20028: PLL_PERIPH0_CTRL_REG = 0x90041811
   0x1C20054: AHB1_APB1_CFG_REG    = 0x3190
   0x1C20058: APB2_CFG_REG         = 0x1000000
   0x1C2005C: AHB2_CFG_REG         = 0x0

It is yet to be confirmed whether faster AHB1/AHB2 clock settings
can be used safely if we initialize the AXP803 PMIC instead of
using reset defaults. But in order to resolve the data corruption
problem right now, it's best to downclock AHB1 to a safe level.

Note that this issue only affects the SPL, which is not fully
supported on Allwinner A64 yet and it should not affect the boot0
usage (unless somebody can confirm SRAM C corruption with the
boot0 too).

Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
8 years agospi: pic32_spi: add SPI master driver for PIC32 SoC.
Purna Chandra Mandal [Thu, 2 Jun 2016 08:56:08 +0000 (14:26 +0530)]
spi: pic32_spi: add SPI master driver for PIC32 SoC.

This driver implements SPI protocol in master mode to communicate
with the SPI device connected on SPI bus. It handles /CS explicitly
by controlling respective pin as gpio ('cs-gpios' property in dt node)
and uses PIO mode for SPI transaction. It is configurable based
on driver-model only.

Cc: Jagan Teki <jteki@openedev.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
8 years agoMIPS: Make CONFIG_SYS_DCACHE_LINE_SIZE int, not hex
Paul Burton [Thu, 9 Jun 2016 12:09:52 +0000 (13:09 +0100)]
MIPS: Make CONFIG_SYS_DCACHE_LINE_SIZE int, not hex

For consistency with the other cache-related Kconfig entries & the
values actually set by boards, make CONFIG_SYS_DCACHE_LINE_SIZE an int
entry instead of a hex entry.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Fixes: 372286217f05 ("MIPS: Split I & D cache line size config")

8 years agoMIPS: Fix invalidate_dcache_range to operate on L1 Dcache
Paul Burton [Thu, 9 Jun 2016 12:09:51 +0000 (13:09 +0100)]
MIPS: Fix invalidate_dcache_range to operate on L1 Dcache

Commit fb64cda57998 ("MIPS: Abstract cache op loops with a macro")
accidentally modified invalidate_dcache_range to operate on the L1
Icache instead of the Dcache. Fix the cache op used to operate on the
Dcache.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Fixes: fb64cda57998 ("MIPS: Abstract cache op loops with a macro")

8 years agosunxi: musb: Properly turn of musb controller before booting
Hans de Goede [Sun, 5 Jun 2016 14:53:04 +0000 (16:53 +0200)]
sunxi: musb: Properly turn of musb controller before booting

Turn of the clock and assert the reset when musb_stop gets called, so that
the os gets the musb controller in a pristine state. This fixes a spurious
VBus error interrupt triggering as soon as the Linux musb driver loads.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
8 years agosunxi: Add INITIAL_USB_SCAN_DELAY to Mele_A1000G_quad_defconfig
Hans de Goede [Sun, 5 Jun 2016 12:40:44 +0000 (14:40 +0200)]
sunxi: Add INITIAL_USB_SCAN_DELAY to Mele_A1000G_quad_defconfig

The Mele_A1000G_quad has an onboard usb <-> sata conversion which needs
longer then the usb-spec allows to connect after getting power.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
8 years agosunxi: Enable ALDO3 and ALDO4 in Wobo_i5_defconfig
Hans de Goede [Thu, 2 Jun 2016 16:46:09 +0000 (18:46 +0200)]
sunxi: Enable ALDO3 and ALDO4 in Wobo_i5_defconfig

These are used for the usb wifi and if we leave the enabling up to the
kernel, we get hit by the axp209 issues with enabling ldo3 or 4 post boot
and the systems hangs as soon as it is enabled.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
8 years agosiemens,am33x: add draco etamin board
Heiko Schocher [Tue, 7 Jun 2016 06:55:45 +0000 (08:55 +0200)]
siemens,am33x: add draco etamin board

In the draco CPU board family, etamin is a new variant
with bigger flash and more RAM. Due to new flash that
uses larger pages (4K) some changes are necessary because
it impacts the MTD partition layout and the ubi mount
parameters.

Signed-off-by: Samuel Egli <samuel.egli@siemens.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
[trini: Move BOOTDELAY into defconfig, just always be 3 now]
Signed-off-by: Tom Rini <trini@konsulko.com>
8 years agodfu, nand, ubi: fix erasing after write finish
Heiko Schocher [Tue, 7 Jun 2016 06:55:44 +0000 (08:55 +0200)]
dfu, nand, ubi: fix erasing after write finish

writting to ubi nand partitions need after write ends an erase
of the remaining sectors. This fail, if dfu write size was not
a multiple of erasesize, example log:

Failure erase: -1

Fix this error.

Signed-off-by: Heiko Schocher <hs@denx.de>
8 years agoam335x, dxr2: get ECC sType from I2C eeprom
Heiko Schocher [Tue, 7 Jun 2016 06:55:43 +0000 (08:55 +0200)]
am335x, dxr2: get ECC sType from I2C eeprom

read the ECC Type field from the i2c eeprom, instead
configuring it static in the U-Boot binary.

see RM:
Table 26-17. NAND Geometry Information on I2C EEPROM

Signed-off-by: Heiko Schocher <hs@denx.de>
8 years agomtd: nand: omap: allow to switch to BCH16
Heiko Schocher [Tue, 7 Jun 2016 06:55:42 +0000 (08:55 +0200)]
mtd: nand: omap: allow to switch to BCH16

support in omap_nand_switch_ecc() also an eccstrength
from 16.

Signed-off-by: Heiko Schocher <hs@denx.de>
8 years agonand: add nand mtd concat support
Heiko Schocher [Tue, 7 Jun 2016 06:55:41 +0000 (08:55 +0200)]
nand: add nand mtd concat support

add for nand devices mtd concat support. Generic MTD concat
support is already ported to mainline, and used in the cfi_mtd
driver. This patch adds it similiar for nand devices.

Signed-off-by: Heiko Schocher <hs@denx.de>
8 years agoubi: add new ubi command "ubi detach"
Heiko Schocher [Tue, 7 Jun 2016 06:55:40 +0000 (08:55 +0200)]
ubi: add new ubi command "ubi detach"

simple detachs ubi from the mtd partition.

Signed-off-by: Heiko Schocher <hs@denx.de>
8 years agosiemens,am33x: add ubi fastmap support
Samuel Egli [Tue, 7 Jun 2016 06:55:39 +0000 (08:55 +0200)]
siemens,am33x: add ubi fastmap support

From: Samuel Egli <samuel.egli@siemens.com>

Signed-off-by: Heiko Schocher <hs@denx.de>
8 years agoam335x, shc: add support for the am335x based bosch shc board
Heiko Schocher [Tue, 7 Jun 2016 06:31:25 +0000 (08:31 +0200)]
am335x, shc: add support for the am335x based bosch shc board

U-Boot SPL 2016.03-rc3-00019-g6dfb4c2-dirty (Mar 09 2016 - 07:40:06)
SHC C3-Sample
MPU reference clock runs at 6 MHz
Setting MPU clock to 594 MHz
Enabling Spread Spectrum of 18 permille for MPU
Trying to boot from MMC
reading u-boot.img
reading u-boot.img

U-Boot 2016.03-rc3-00019-g6dfb4c2-dirty (Mar 09 2016 - 07:05:35 +0100)

       Watchdog enabled
I2C:   ready
DRAM:  512 MiB
reloc off 1f783000
MMC:   OMAP SD/MMC: 0, OMAP SD/MMC: 1
Net:   cpsw
U-Boot#

Signed-off-by: Heiko Schocher <hs@denx.de>
8 years agodoc, spl, am335x: update am335x-network
Heiko Schocher [Tue, 7 Jun 2016 06:31:24 +0000 (08:31 +0200)]
doc, spl, am335x: update am335x-network

on the shc board we see when booting in net boot mode,
that the ROM bootloader sends "AM335x ROM" as
vendor-class-identifier. U-Boots doc says "DM814x ROM".

So, add the info to the doc, that there is also
"AM335x ROM" possible.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoarmv7: omap-common: make SPL board_mmc_init() weak
Heiko Schocher [Tue, 7 Jun 2016 06:31:23 +0000 (08:31 +0200)]
armv7: omap-common: make SPL board_mmc_init() weak

make this function weak, so board code can setup in SPL
MMC init with board special values.

Signed-off-by: Heiko Schocher <hs@denx.de>
8 years agommc: omap_hsmmc: enable 8bit interface for eMMC for AM33xx
Heiko Schocher [Tue, 7 Jun 2016 06:31:22 +0000 (08:31 +0200)]
mmc: omap_hsmmc: enable 8bit interface for eMMC for AM33xx

Enable 8bit interface on HSMMC2 for am33xx to support 8bit eMMC chips.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agommc: revert mmc: Handle switch error status bit in MMC card status
Heiko Schocher [Tue, 7 Jun 2016 06:31:21 +0000 (08:31 +0200)]
mmc: revert mmc: Handle switch error status bit in MMC card status

revert patch:
commit: 6b2221b008e0: mmc: Handle switch error status bit in MMC card status

to get eMMC working on shc board

Signed-off-by: Heiko Schocher <hs@denx.de>
8 years agobootstage: call show_boot_progress also in SPL
Heiko Schocher [Tue, 7 Jun 2016 06:31:20 +0000 (08:31 +0200)]
bootstage: call show_boot_progress also in SPL

show_boot_progress() is now called from SPL also.

Signed-off-by: Heiko Schocher <hs@denx.de>
8 years agoarm, am335x: Enable Spread Spectrum for the MPU
Heiko Schocher [Tue, 7 Jun 2016 06:31:19 +0000 (08:31 +0200)]
arm, am335x: Enable Spread Spectrum for the MPU

Enable Spread Spectrum for the MPU by calculating the required
values and setting the registers accordingly.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoam335x: add some missing CM_CLKMODE_DPLL_SSC macros
Heiko Schocher [Tue, 7 Jun 2016 06:31:18 +0000 (08:31 +0200)]
am335x: add some missing CM_CLKMODE_DPLL_SSC macros

add missing CM_CLKMODE_DPLL_SSC_ACK_MASK,
CM_CLKMODE_DPLL_SSC_DOWNSPREAD_MASK and
CM_CLKMODE_DPLL_SSC_TYPE_MASK
defines. Used for enabling spread spectrum.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoarm, am335x: add some missing GPIO register definitions
Heiko Schocher [Tue, 7 Jun 2016 06:31:17 +0000 (08:31 +0200)]
arm, am335x: add some missing GPIO register definitions

add missing:
OMAP_GPIO_IRQSTATUS_SET_0 and OMAP_GPIO_IRQSTATUS_SET_1
registers.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agopower, tps65217: add some defines
Heiko Schocher [Tue, 7 Jun 2016 06:31:16 +0000 (08:31 +0200)]
power, tps65217: add some defines

add the following defines, needed for the upcoming shc board
support:

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agotests: py: disable main_signon check for printenv cmd
Heiko Schocher [Tue, 7 Jun 2016 06:31:15 +0000 (08:31 +0200)]
tests: py: disable main_signon check for printenv cmd

if CONFIG_VERSION_VARIABLE is set, the U-Boot environment
contains a "vers" variable with the current U-Boot version
string. If now "printenv" is called, test/py fails as it
detects the main_sign string, which is in this case correct.

So check only the main_sign as an error, if CONFIG_VERSION_VARIABLE
is not set.

Signed-off-by: Heiko Schocher <hs@denx.de>
8 years agocommon: bootdelay: move CONFIG_BOOTDELAY into a Kconfig option
Heiko Schocher [Tue, 7 Jun 2016 06:31:14 +0000 (08:31 +0200)]
common: bootdelay: move CONFIG_BOOTDELAY into a Kconfig option

move CONFIG_BOOTDELAY into a Kconfig option. Used for this
purpose the moveconfig.py tool in tools.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
8 years agotiny-printf: Correct the snprintf() implementation
Simon Glass [Thu, 9 Jun 2016 02:55:15 +0000 (20:55 -0600)]
tiny-printf: Correct the snprintf() implementation

This current code passes the variable arguments list to sprintf(). This is
not correct. Fix it by calling _vprintf() directly.

This makes firefly-rk3288 boot again.

Fixes: abeb272 ("tiny-printf: Support snprintf()")
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agoARM: uniphier: insert dsb barrier to ensure visibility of store
Masahiro Yamada [Wed, 8 Jun 2016 09:02:32 +0000 (18:02 +0900)]
ARM: uniphier: insert dsb barrier to ensure visibility of store

I noticed secondary CPUs sometimes fail to wake up, and the root
cause is that the sev instruction wakes up slave CPUs before the
preceding the register write is observed by them.

The read-back of the accessed register does not guarantee the order.
In order to ensure the order between the register write and the sev
instruction, a dsb instruction should be executed prior to the sev.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agoARM: uniphier: do not erase when updating U-Boot image in eMMC device
Masahiro Yamada [Tue, 7 Jun 2016 12:03:46 +0000 (21:03 +0900)]
ARM: uniphier: do not erase when updating U-Boot image in eMMC device

Unlike NAND, eMMC can be re-written without erasing.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agoARM: uniphier: do not overwrite fdt_file environment
Masahiro Yamada [Tue, 7 Jun 2016 12:03:44 +0000 (21:03 +0900)]
ARM: uniphier: do not overwrite fdt_file environment

This code auto-detects the best-match FDT file name, but it should
respect the user's choice if "fdt_file" environment is found in a
saved set of environments.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agoARM: uniphier: check return code of setenv()
Masahiro Yamada [Tue, 7 Jun 2016 12:03:43 +0000 (21:03 +0900)]
ARM: uniphier: check return code of setenv()

Because setenv() may fail, it is better to check its return code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agoARM: uniphier: fix boot mode for PH1-LD11
Masahiro Yamada [Sat, 4 Jun 2016 13:39:09 +0000 (22:39 +0900)]
ARM: uniphier: fix boot mode for PH1-LD11

This function is shared between PH1-LD11 and PH1-LD20.  The difference
is the boot-mode latch for the USB boot mode.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agoARM: uniphier: support eMMC boot for PH1-LD11 and PH1-LD20
Masahiro Yamada [Sat, 4 Jun 2016 13:39:08 +0000 (22:39 +0900)]
ARM: uniphier: support eMMC boot for PH1-LD11 and PH1-LD20

The Boot ROM on PH1-LD11/LD20 exports built-in APIs to load images
from an eMMC device.  They are useful to reduce the memory footprint
of SPL, rather than compiling the whole MMC framework.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agoarm: mxs: Remove misleading comments
Michael Heimpold [Mon, 6 Jun 2016 12:26:39 +0000 (14:26 +0200)]
arm: mxs: Remove misleading comments

Both comments look like being copy & paste errors.

Signed-off-by: Michael Heimpold <michael.heimpold@i2se.com>
Cc: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
8 years agoboard: ge: bx50v3: add missing partnum variable
Kimmo Surakka [Tue, 24 May 2016 13:56:23 +0000 (15:56 +0200)]
board: ge: bx50v3: add missing partnum variable

Add missing ${partnum} to set rootdev correctly when
booting from USB or MMC.

Signed-off-by: Kimmo Surakka <kimmo.surakka@ge.com>
[Rebased against v2016.05 and adjusted the variable name]
Signed-off-by: Andrew Shadura <andrew.shadura@collabora.co.uk>
8 years agoboard: ge: bx50v3: disable unused features to improve size and boot speed
Andrew Shadura [Tue, 24 May 2016 13:56:22 +0000 (15:56 +0200)]
board: ge: bx50v3: disable unused features to improve size and boot speed

Disable unused FPGA, NFS, FAT and EFI support to reduce the bootloader
size. Don't clear memory reserved for malloc to improve boot speed.

Signed-off-by: Andrew Shadura <andrew.shadura@collabora.co.uk>
8 years agoboard: ge: bx50v3: make SATA optional and disabled by default
Andrew Shadura [Tue, 24 May 2016 13:56:21 +0000 (15:56 +0200)]
board: ge: bx50v3: make SATA optional and disabled by default

The SATA support is only useful for development and shouldn't be enabled
in production, so it has to be disabled in U-boot by default.

Signed-off-by: Andrew Shadura <andrew.shadura@collabora.co.uk>
8 years agoboard: ge: bx50v3: make network support optional and disabled by default
Andrew Shadura [Tue, 24 May 2016 13:56:20 +0000 (15:56 +0200)]
board: ge: bx50v3: make network support optional and disabled by default

The network support is only useful for development and shouldn't be enabled
in production, so it has to be disabled in U-boot by default.

Signed-off-by: Andrew Shadura <andrew.shadura@collabora.co.uk>
8 years agoboard: ge: bx50v3: make USB support optional and disabled by default
Andrew Shadura [Tue, 24 May 2016 13:56:19 +0000 (15:56 +0200)]
board: ge: bx50v3: make USB support optional and disabled by default

The USB support is only useful for development and shouldn't be enabled
in production, so it has to be disabled in U-boot by default.

Signed-off-by: Andrew Shadura <andrew.shadura@collabora.co.uk>
8 years agoboard: ge: bx50v3: make CONFIG_VIDEO optional and disabled by default
Andrew Shadura [Tue, 24 May 2016 13:56:18 +0000 (15:56 +0200)]
board: ge: bx50v3: make CONFIG_VIDEO optional and disabled by default

The kernel already knows how to initialise the display, and initialising
the display from U-boot is only useful for debugging and isn't necessary
in production, so no need to have it enabled in U-boot by default.

Signed-off-by: Andrew Shadura <andrew.shadura@collabora.co.uk>
8 years agoboard: ge: bx50v3: don't configure the backlight when there's no display
Andrew Shadura [Tue, 24 May 2016 13:56:17 +0000 (15:56 +0200)]
board: ge: bx50v3: don't configure the backlight when there's no display

Don't try to configure the backlight when CONFIG_VIDEO_IPUV3 isn't set.

Signed-off-by: Andrew Shadura <andrew.shadura@collabora.co.uk>
8 years agoPrepare v2016.07-rc1 v2016.07-rc1
Tom Rini [Mon, 6 Jun 2016 21:43:54 +0000 (17:43 -0400)]
Prepare v2016.07-rc1

Signed-off-by: Tom Rini <trini@konsulko.com>
8 years agoMerge http://git.denx.de/u-boot-samsung
Tom Rini [Mon, 6 Jun 2016 17:24:23 +0000 (13:24 -0400)]
Merge http://git.denx.de/u-boot-samsung

Signed-off-by: Tom Rini <trini@konsulko.com>
Conflicts:
configs/peach-pi_defconfig
configs/peach-pit_defconfig

8 years agoti_armv7_common: env: Fix hard coded mmc device for uuid
B, Ravi [Fri, 3 Jun 2016 15:14:02 +0000 (20:44 +0530)]
ti_armv7_common: env: Fix hard coded mmc device for uuid

Avoid use of hard coded mmcdev value, use bootpart
instead, so finduuid works based on bootpart set
for a specific platform.

Signed-off-by: Ravi Babu <ravibabu@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoarm/arm64: implement a boot header capability
Andre Przywara [Tue, 31 May 2016 17:45:06 +0000 (10:45 -0700)]
arm/arm64: implement a boot header capability

Some SPL loaders (like Allwinner's boot0, and Broadcom's boot0)
require a header before the actual U-Boot binary to both check its
validity and to find other data to load. Sometimes this header may
only be a few bytes of information, and sometimes this might simply
be space that needs to be reserved for a post-processing tool.

Introduce a config option to allow assembler preprocessor commands
to be inserted into the code at the appropriate location; typical
assembler preprocessor commands might be:
  .space 1000
  .word 0x12345678

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Steve Rae <srae@broadcom.com>
Commit Notes:
Please note that the current code:
  start.S (arm64) and
  vectors.S (arm)
already jumps over some portion of data already, so this option basically
just increases the size of this region (and the resulting binary).

For use with Allwinner's boot0 blob there is a tool called boot0img[1],
which fills the header to allow booting A64 based boards.
For the Pine64 we need a 1536 byte header (including the branch
instruction) at the moment, so we add this to the defconfig.

[1] https://github.com/apritzel/pine64/tree/master/tools
END
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agolib: make strmhz available in SPL
Chris Packham [Tue, 31 May 2016 08:30:59 +0000 (20:30 +1200)]
lib: make strmhz available in SPL

When setting up a DDR controller it is useful to be able to display
frequencies in a readable form. Make the strmhz() function available in
SPL builds provided there is full vsprintf available.

Reviewed-by: Tony O'Brien <tony.obrien@alliedtelesis.co.nz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
8 years agoRemove unneeded remnants of bcopy().
Robert P. J. Day [Mon, 30 May 2016 10:55:53 +0000 (06:55 -0400)]
Remove unneeded remnants of bcopy().

Since bcopy() is no longer used, delete all remaining references to
it.

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
8 years agoconfigs: k2*_evm: Update fdt file names
Lokesh Vutla [Mon, 6 Jun 2016 05:48:42 +0000 (11:18 +0530)]
configs: k2*_evm: Update fdt file names

Now that all Keystone2 dts file names are changed in Linux kernel, reflect the
same in evn variables inorder to find the right dtb file.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
8 years agoARM: DRA7xx: Enable FIT for hs platforms
Lokesh Vutla [Mon, 6 Jun 2016 05:24:57 +0000 (10:54 +0530)]
ARM: DRA7xx: Enable FIT for hs platforms

Use a single defconfig for all DRA7xx hs platforms by enabling FIT and delete
the platform specific defconfigs.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
8 years agoarmv7: fix order of OMAP die ID printing
Ladislav Michl [Thu, 2 Jun 2016 09:43:16 +0000 (11:43 +0200)]
armv7: fix order of OMAP die ID printing

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
8 years agoefi_loader: Add DM_VIDEO support
Alexander Graf [Sun, 5 Jun 2016 20:34:31 +0000 (22:34 +0200)]
efi_loader: Add DM_VIDEO support

Some systems are starting to shift to support DM_VIDEO which exposes
the frame buffer through a slightly different interface.

This is a poor man's effort to support the dm video interface instead
of the lcd one. We still only support a single display device.

Signed-off-by: Alexander Graf <agraf@suse.de>
[trini: Remove fb_size / fb_base as they were not used]
Signed-off-by: Tom Rini <trini@konsulko.com>
8 years agoefi_loader: Don't allocate from memory holes
Alexander Graf [Fri, 27 May 2016 10:25:03 +0000 (12:25 +0200)]
efi_loader: Don't allocate from memory holes

When a payload calls our memory allocator with the exact address hint, we
happily allocate memory from completely unpopulated regions. Payloads however
expect this to only succeed if they would be allocating from free conventional
memory.

This patch makes the logic behind those checks a bit more obvious and ensures
that we always allocate from known good free conventional memory regions if we
want to allocate ram.

Reported-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
8 years agoefi_loader: Move to normal debug infrastructure
Alexander Graf [Thu, 2 Jun 2016 09:38:27 +0000 (11:38 +0200)]
efi_loader: Move to normal debug infrastructure

We introduced special "DEBUG_EFI" defines when the efi loader
support was new. After giving it a bit of thought, turns out
we really didn't have to - the normal #define DEBUG infrastructure
works well enough for efi loader as well.

So this patch switches to the common debug() and #define DEBUG
way of printing debug information.

Signed-off-by: Alexander Graf <agraf@suse.de>
8 years agoefi_loader: Add exit support
Alexander Graf [Fri, 20 May 2016 21:28:23 +0000 (23:28 +0200)]
efi_loader: Add exit support

Some times you may want to exit an EFI payload again, for example
to default boot into a PXE installation and decide that you would
rather want to boot from the local disk instead.

This patch adds exit functionality to the EFI implementation, allowing
EFI payloads to exit.

Signed-off-by: Alexander Graf <agraf@suse.de>
8 years agoarm: Introduce setjmp/longjmp
Alexander Graf [Fri, 20 May 2016 21:28:22 +0000 (23:28 +0200)]
arm: Introduce setjmp/longjmp

To quit an EFI application we will need logic to jump to the caller
of a function without returning from the function we called into,
so we need setjmp/longjmp functionality.

This patch introduces a trivial implementation of these that I
verified works on armv7, thumb2 and aarch64.

Signed-off-by: Alexander Graf <agraf@suse.de>
8 years agostrider: Support cpu-dp flavor
Dirk Eibach [Thu, 2 Jun 2016 07:05:42 +0000 (09:05 +0200)]
strider: Support cpu-dp flavor

There is new strider cpu flavor with DisplayPort video.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agostrider: Support con-dp flavor
Dirk Eibach [Thu, 2 Jun 2016 07:05:41 +0000 (09:05 +0200)]
strider: Support con-dp flavor

There is a new strider console flavor with DisplayPort
video.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agogdsys: osd: Allow osdsize on valid screens only
Dirk Eibach [Thu, 2 Jun 2016 07:05:40 +0000 (09:05 +0200)]
gdsys: osd: Allow osdsize on valid screens only

Limit "osdsize"-command to access valid screens only.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoioep-fpga: Support intempo compression
Dirk Eibach [Thu, 2 Jun 2016 07:05:39 +0000 (09:05 +0200)]
ioep-fpga: Support intempo compression

There is a new "intempo" compression type that can
be reported on startup.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoFix to davinci_nand.h to place CEnCFG registers at correct
Peter Howard [Thu, 2 Jun 2016 03:19:26 +0000 (13:19 +1000)]
Fix to davinci_nand.h to place CEnCFG registers at correct

Signed-off-by: Peter Howard <phoward@gme.net.au>
8 years agodm: scsi: if_typename should be scsi
Ed Swarthout [Wed, 1 Jun 2016 13:11:24 +0000 (08:11 -0500)]
dm: scsi: if_typename should be scsi

Fixes:

=> ext2ls scsi 0:1
** Bad device scsi 0:1 **

for boards which use the scsi legacy driver (such as ls1043ardb).

Signed-off-by: Ed Swarthout <Ed.Swarthout@nxp.com>
Tested-by: George McCollister <george.mccollister@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
8 years agoMerge branch 'master' of git://git.denx.de/u-boot-usb
Tom Rini [Mon, 6 Jun 2016 14:04:58 +0000 (10:04 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-usb

Modified:
configs/ls1012afrdm_qspi_defconfig
configs/ls1012aqds_qspi_defconfig
configs/ls1012ardb_qspi_defconfig
include/configs/ls1012afrdm.h
include/configs/ls1012aqds.h
include/configs/ls1012ardb.h

Signed-off-by: Tom Rini <trini@konsulko.com>
8 years agoMerge branch 'master' of git://www.denx.de/git/u-boot-microblaze
Tom Rini [Mon, 6 Jun 2016 11:16:39 +0000 (07:16 -0400)]
Merge branch 'master' of git://denx.de/git/u-boot-microblaze

8 years agoARM64: zynqmp: Extend malloc space before relocation
Michal Simek [Fri, 3 Jun 2016 09:35:17 +0000 (11:35 +0200)]
ARM64: zynqmp: Extend malloc space before relocation

For boards which have more devices it is necessary to extend malloc
space.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Add support for standard distro boot commands
Michal Simek [Fri, 22 Apr 2016 12:28:54 +0000 (14:28 +0200)]
ARM64: zynqmp: Add support for standard distro boot commands

Nand and QSPI are not defined now but this will be extended.
Based on selected bootmode boot_targets are rewritten.
Patch also contains detection if variables are saved. If yes don't
rewrite boot_targets variable.

Also move variable setup to the end of file because SCSI needs to be
defined before others macros are using it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
8 years agoARM64: zynqmp: Remove CONFIG_BOOTP_SERVERIP
Alexander Graf [Wed, 1 Jun 2016 20:41:54 +0000 (22:41 +0200)]
ARM64: zynqmp: Remove CONFIG_BOOTP_SERVERIP

When the CONFIG_BOOTP_SERVERIP option is set, we ignore all
dhcp values for the tftp server and use our own serverip and
file name instead.

This is usually not what we want and I doubt it's set for a
good reason on ZynqMP. It definitely hurts if we want to support
uEFI PXE boot on it. So just remove the option for now.

Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Enable AHCI when CONFIG_SATA_CEVA is defined
Michal Simek [Wed, 1 Jun 2016 12:29:33 +0000 (14:29 +0200)]
ARM64: zynqmp: Enable AHCI when CONFIG_SATA_CEVA is defined

Simplify zcu102 board file by moving CONFIG_AHCI enabling to common
file.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Enable support for SPL FIT images
Michal Simek [Tue, 17 May 2016 06:38:53 +0000 (08:38 +0200)]
ARM64: zynqmp: Enable support for SPL FIT images

Enable support for RAM based FIT images read by SPL.
Empty function for now to keep compiler happy.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoenv: Setup GD_FLG_ENV_DEFAULT flag when default environment are used
Michal Simek [Mon, 30 May 2016 14:06:54 +0000 (16:06 +0200)]
env: Setup GD_FLG_ENV_DEFAULT flag when default environment are used

Setup flag when default environment are used to be able to
rewrite default distro boot variables based on SoC boot mode.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
8 years agoARM64: zynq: Fix boot.bin generation for Zynq and ZynqMP
Michal Simek [Mon, 30 May 2016 12:57:02 +0000 (14:57 +0200)]
ARM64: zynq: Fix boot.bin generation for Zynq and ZynqMP

Fix boot.bin generation for Zynq and ZynqMP.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Marek Vasut <marex@denx.de>
8 years agoARM64: zynqmp: Extend page_table_size
Michal Simek [Mon, 30 May 2016 08:41:26 +0000 (10:41 +0200)]
ARM64: zynqmp: Extend page_table_size

0xc000 is not sufficient page table size if dc4 with 4 gems
is enabled.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Add support for zc1751-dc4
Michal Simek [Thu, 26 May 2016 06:06:38 +0000 (08:06 +0200)]
ARM64: zynqmp: Add support for zc1751-dc4

zc1751-dc4 contains four GEMs.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Add debug uart for zc1751-dc2
Michal Simek [Fri, 20 May 2016 07:55:00 +0000 (09:55 +0200)]
ARM64: zynqmp: Add debug uart for zc1751-dc2

Add debug uart for zc1751-dc2.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Enable Vitesse and RealTek ethernet phys
Michal Simek [Mon, 30 May 2016 08:13:37 +0000 (10:13 +0200)]
ARM64: zynqmp: Enable Vitesse and RealTek ethernet phys

Phys are available on zc1751-dc4 that's why enable them.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>