oweals/u-boot.git
5 years agoriscv: qemu: detect and boot the kernel passed by QEMU
Lukas Auer [Thu, 22 Nov 2018 10:26:36 +0000 (11:26 +0100)]
riscv: qemu: detect and boot the kernel passed by QEMU

QEMU embeds the location of the kernel image in the device tree. Store
this address in the environment as variable kernel_start. It is used in
the board-local distro boot command QEMU to boot the kernel with the
U-Boot device tree. The QEMU boot command is added as the first boot
target device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
5 years agodm: core: add missing prototype for ofnode_read_u64
Lukas Auer [Thu, 22 Nov 2018 10:26:35 +0000 (11:26 +0100)]
dm: core: add missing prototype for ofnode_read_u64

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agoriscv: qemu: enable distro boot
Lukas Auer [Thu, 22 Nov 2018 10:26:34 +0000 (11:26 +0100)]
riscv: qemu: enable distro boot

Enable distro boot on the qemu-riscv32/64 boards. Supported boot target
devices are VirtIO and DHCP.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
5 years agodistro_bootcmd: add VirtIO distro boot command
Lukas Auer [Thu, 22 Nov 2018 10:26:33 +0000 (11:26 +0100)]
distro_bootcmd: add VirtIO distro boot command

Add a boot command to distro boot to support disks connected over the
VirtIO bus. The boot command uses the shared block environment.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
5 years agoriscv: align bootm implementation with that of other architectures
Lukas Auer [Thu, 22 Nov 2018 10:26:32 +0000 (11:26 +0100)]
riscv: align bootm implementation with that of other architectures

The bootm implementation of RISC-V diverges from that of other
architectures. Update it to match the implementation of other
architectures. The ARM implementation is used as a reference.

This adds the following features and changes to RISC-V.
* Add support for the BOOTM_STATE_OS_FAKE_GO command
* Call the remove function on devices with the removal flag set before
booting Linux
* Force disconnect USB devices from the host before booting Linux
* Print and add bootstage information to the device tree before booting
Linux

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agoriscv: qemu: support booting Linux
Lukas Auer [Thu, 22 Nov 2018 10:26:31 +0000 (11:26 +0100)]
riscv: qemu: support booting Linux

Support booting Linux (as payload of BBL) from FIT images. For this, the
default CONFIG_SYS_BOOTM_LEN is increased to 16 MB, and the environment
variables fdt_high and initrd_high are set to mark the device tree and
initrd as in-place.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agoriscv: qemu: use device tree passed by prior boot stage
Lukas Auer [Thu, 22 Nov 2018 10:26:30 +0000 (11:26 +0100)]
riscv: qemu: use device tree passed by prior boot stage

QEMU provides a device tree, which is passed to U-Boot using register
a1. We are now able to directly select the device tree with the
configuration CONFIG_OF_PRIOR_STAGE. Replace the hard-coded address in
qemu-riscv with it.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
5 years agoriscv: save hart ID and device tree passed by prior boot stage
Lukas Auer [Thu, 22 Nov 2018 10:26:29 +0000 (11:26 +0100)]
riscv: save hart ID and device tree passed by prior boot stage

Store the hart ID and device tree passed by the prior boot stage (in a0
and a1) in registers s0 and s1. Replace one use of s1 in start.S to
avoid overwriting it.

The device tree is also stored in memory to make it available to U-Boot
with the configuration CONFIG_OF_PRIOR_STAGE.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
5 years agoriscv: do not blindly modify the mstatus CSR
Lukas Auer [Thu, 22 Nov 2018 10:26:28 +0000 (11:26 +0100)]
riscv: do not blindly modify the mstatus CSR

The mstatus CSR includes WPRI (writes preserve values, reads ignore
values) fields and must therefore not be set to zero without preserving
these fields. It is not apparent why mstatus is set to zero here since
it is not required for U-Boot to run. Remove it.

This instruction and others encode zero as an immediate.  RISC-V has the
zero register for this purpose. Replace the immediates with the zero
register.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
5 years agoriscv: remove unused labels in start.S
Lukas Auer [Thu, 22 Nov 2018 10:26:27 +0000 (11:26 +0100)]
riscv: remove unused labels in start.S

The labels nmi_vector, trap_vector and handle_reset in start.S are not
used for RISC-V. Remove them.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agoDrop CONFIG_INIT_CRITICAL
Bin Meng [Thu, 22 Nov 2018 10:26:26 +0000 (11:26 +0100)]
Drop CONFIG_INIT_CRITICAL

This is now deprecated and no board is using it. Drop it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
5 years agoriscv: align mtvec on a 4-byte boundary
Lukas Auer [Thu, 22 Nov 2018 10:26:25 +0000 (11:26 +0100)]
riscv: align mtvec on a 4-byte boundary

The machine trap-vector base address (mtvec) must be aligned on a 4-byte
boundary. Add the necessary align directive to trap_entry.

This patch also removes the global directive for trap_entry, which is
not required.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agoriscv: fix inconsistent use of spaces and tabs in start.S
Lukas Auer [Thu, 22 Nov 2018 10:26:24 +0000 (11:26 +0100)]
riscv: fix inconsistent use of spaces and tabs in start.S

start.S uses both tabs and spaces after instructions. Fix this by only
using tabs after instructions.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
5 years agoriscv: implement the invalidate_icache_* functions
Lukas Auer [Thu, 22 Nov 2018 10:26:23 +0000 (11:26 +0100)]
riscv: implement the invalidate_icache_* functions

Implement the functions invalidate_icache_range() and
invalidate_icache_all().

RISC-V does not have instructions for explicit cache-control. The
functions in this patch are implemented with the memory ordering
instruction for synchronizing the instruction and data streams. This may
be implemented as a cache flush or invalidate on simple processors,
others may only invalidate the relevant cache lines.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
5 years agoriscv: hang on unhandled exceptions
Lukas Auer [Thu, 22 Nov 2018 10:26:22 +0000 (11:26 +0100)]
riscv: hang on unhandled exceptions

Hang on unhandled exceptions to prevent execution in a faulty state.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
5 years agoriscv: treat undefined exception codes as reserved
Lukas Auer [Thu, 22 Nov 2018 10:26:21 +0000 (11:26 +0100)]
riscv: treat undefined exception codes as reserved

Undefined exception codes currently lead to an out-of-bounds array
access. Prevent this by treating undefined exception codes as
"reserved".

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
5 years agoriscv: complete the list of exception codes
Lukas Auer [Thu, 22 Nov 2018 10:26:20 +0000 (11:26 +0100)]
riscv: complete the list of exception codes

Only the first four exception codes are defined. Add the missing
exception codes from the definition in RISC-V Privileged Architecture
Version 1.10.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
5 years agoriscv: do not reimplement generic io functions
Lukas Auer [Thu, 22 Nov 2018 10:26:19 +0000 (11:26 +0100)]
riscv: do not reimplement generic io functions

RISC-V U-Boot reimplements the generic io functions from
asm-generic/io.h. Remove the redundant implementation and include the
generic io.h instead.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
5 years agoriscv: make use of the barrier functions from Linux
Lukas Auer [Thu, 22 Nov 2018 10:26:18 +0000 (11:26 +0100)]
riscv: make use of the barrier functions from Linux

Replace the barrier functions in arch/riscv/include/asm/io.h with those
defined in barrier.h, which is imported from Linux. This version is
modified to remove the include statement of asm-generic/barrier.h, which
is not available in U-Boot or required.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
5 years agoriscv: fix use of incorrectly sized variables
Lukas Auer [Thu, 22 Nov 2018 10:26:17 +0000 (11:26 +0100)]
riscv: fix use of incorrectly sized variables

The RISC-V arch incorrectly uses 32-bit instead of 64-bit variables in
several places. Fix this.
In addition, BITS_PER_LONG is set to 64 on RV64I systems.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agoriscv: enable -fdata-sections
Lukas Auer [Thu, 22 Nov 2018 10:26:16 +0000 (11:26 +0100)]
riscv: enable -fdata-sections

Enable the -fdata-sections compiler option for RISC-V. Buildman reports
the binary size decrease from this as 8365.3 bytes.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
5 years agoriscv: set -march and -mabi based on the Kconfig configuration
Lukas Auer [Thu, 22 Nov 2018 10:26:15 +0000 (11:26 +0100)]
riscv: set -march and -mabi based on the Kconfig configuration

Use the new Kconfig entries to construct the ISA string for the -march
compiler flag. The -mabi compiler flag is selected based on the base
integer instruction set.

With this change, the C (compressed instructions) ISA extension is now
enabled for all boards with CONFIG_RISCV_ISA_C set. Buildman reports a
decrease in binary size of 71590 bytes.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agoriscv: add Kconfig entries for the C and A ISA extensions
Lukas Auer [Thu, 22 Nov 2018 10:26:14 +0000 (11:26 +0100)]
riscv: add Kconfig entries for the C and A ISA extensions

Add Kconfig entries for the C (compressed instructions) and A (atomic
instructions) ISA extensions. Only the C ISA extension is selectable.
This matches the configuration in Linux.

The Kconfig entries are not used yet. A follow-up patch will select the
appropriate compiler flags based on the Kconfig configuration.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agoriscv: select CONFIG_PHYS_64BIT on RV64I systems
Lukas Auer [Thu, 22 Nov 2018 10:26:13 +0000 (11:26 +0100)]
riscv: select CONFIG_PHYS_64BIT on RV64I systems

CONFIG_PHYS_64BIT should be enabled on RV64I systems. Select it.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
5 years agoriscv: rename CPU_RISCV_32/64 to match architecture names ARCH_RV32I/64I
Lukas Auer [Thu, 22 Nov 2018 10:26:12 +0000 (11:26 +0100)]
riscv: rename CPU_RISCV_32/64 to match architecture names ARCH_RV32I/64I

RISC-V defines the base integer instruction sets as RV32I and RV64I.
Rename CPU_RISCV_32 and CPU_RISCV_64 to ARCH_RV32I and ARCH_RV64I to
match this convention.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
5 years agodts: riscv: update makefile to also clean the RISC-V dts directory
Lukas Auer [Thu, 22 Nov 2018 10:26:11 +0000 (11:26 +0100)]
dts: riscv: update makefile to also clean the RISC-V dts directory

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
5 years agotools: .gitignore: add prelink-riscv
Lukas Auer [Thu, 22 Nov 2018 10:26:10 +0000 (11:26 +0100)]
tools: .gitignore: add prelink-riscv

Ignore tools/prelink-riscv.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
5 years agoMerge tag 'pull-tg18' of git://git.denx.de/u-boot-dm
Tom Rini [Fri, 23 Nov 2018 22:25:27 +0000 (17:25 -0500)]
Merge tag 'pull-tg18' of git://git.denx.de/u-boot-dm

Various minor sandbox improvements
Better buildman warning handling
Misc other things

5 years agosf: Add a method to obtain the block-protect setting
Simon Glass [Tue, 6 Nov 2018 22:21:41 +0000 (15:21 -0700)]
sf: Add a method to obtain the block-protect setting

It is useful to obtain the block-protect setting of the SPI flash, so we
know whether it is fully open or (perhaps partially) write-protected. Add
a method for this. Update the sandbox driver to process this operation and
add a test.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agotest: sf: Add a simple SPI flash test
Simon Glass [Tue, 6 Nov 2018 22:21:40 +0000 (15:21 -0700)]
test: sf: Add a simple SPI flash test

The current test is a functional test, covering all the way from the
command line to the sandbox SPI driver. This is useful, but it is easier
to diagnose failures with a smaller test.

Add a simple test which reads and writes data and checks that it is stored
and retrieved correctly.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agomisc: Update read() and write() methods to return bytes xfered
Simon Glass [Tue, 6 Nov 2018 22:21:39 +0000 (15:21 -0700)]
misc: Update read() and write() methods to return bytes xfered

At present these functions return 0 on success. For some devices we want
to know how many bytes were transferred. It seems useful to adjust the API
to be more like the POSIX read() and write() functions.

Update these two methods, a test and all users.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
5 years agostring: Include the config header
Simon Glass [Tue, 6 Nov 2018 22:21:38 +0000 (15:21 -0700)]
string: Include the config header

At present the config header is not included in this file, but it does use
a CONFIG option. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agovideo: Update video_set_default_colors() to support invert
Simon Glass [Tue, 6 Nov 2018 22:21:36 +0000 (15:21 -0700)]
video: Update video_set_default_colors() to support invert

It is useful to be able to invert the colours in some cases so that the
text matches the background colour. Add a parameter to the function to
support this.

It is strange that function takes a private data structure from another
driver as an argument. It seems better to pass the device and have the
function internally work out how to find its required information.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agobinman: Set the pathname correctly for ELF files
Simon Glass [Tue, 6 Nov 2018 22:21:33 +0000 (15:21 -0700)]
binman: Set the pathname correctly for ELF files

At present, stripped files don't have the right pathname which means that
blob compression cannot be used. Fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agobinman: Drop an unnecessary comma in blob handling
Simon Glass [Tue, 6 Nov 2018 22:21:32 +0000 (15:21 -0700)]
binman: Drop an unnecessary comma in blob handling

This comma is not needed. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agobinman: Add a way to enable debugging from the build
Simon Glass [Tue, 6 Nov 2018 22:21:31 +0000 (15:21 -0700)]
binman: Add a way to enable debugging from the build

When the build fails due to something wrong in binman it is sometimes
useful to get a full backtrace showing the location of the failure. Add
a BINMAN_DEBUG environment variable to support this along with some
documentation.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agospl: lz4: Allow use of lz4 compression in SPL
Simon Glass [Tue, 6 Nov 2018 22:21:30 +0000 (15:21 -0700)]
spl: lz4: Allow use of lz4 compression in SPL

In some cases U-Boot is compressed and it is useful to be able to
decompress it in SPL. Add a Kconfig and Makefile change to allow this.
Note that this does not actually implement decompression.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agospl: Support bootstage, log, hash and early malloc in TPL
Simon Glass [Tue, 6 Nov 2018 22:21:28 +0000 (15:21 -0700)]
spl: Support bootstage, log, hash and early malloc in TPL

At present these features are supported in SPL but not TPL. Update the
Kconfig and Makefile to allow this.

Also add a few Makefile comments to make earier to track what is going on.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agosandbox: Update some drivers to work in SPL/TPL
Simon Glass [Tue, 6 Nov 2018 22:21:27 +0000 (15:21 -0700)]
sandbox: Update some drivers to work in SPL/TPL

At present sandbox drivers are mostly not used before relocation. Some of
these are needed by Chromium OS verified boot, since it uses sandbox TPL,
so update them accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agosandbox: cros_ec: exynos: Drop use of cros_ec_get_error()
Simon Glass [Tue, 6 Nov 2018 22:21:26 +0000 (15:21 -0700)]
sandbox: cros_ec: exynos: Drop use of cros_ec_get_error()

This function is really just a call to uclass_get_device() and there is no
reason why the caller cannot do it. Update sandbox and snow accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
5 years agosandbox: Add a function to read a host file
Simon Glass [Tue, 6 Nov 2018 22:21:25 +0000 (15:21 -0700)]
sandbox: Add a function to read a host file

Add a way to read a file from the host filesystem. This can be useful for
reading test data, for example. Also fix up the writing function which was
not the right version, and drop the debugging lines.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agosandbox: log: Add a category for sandbox
Simon Glass [Tue, 6 Nov 2018 22:21:24 +0000 (15:21 -0700)]
sandbox: log: Add a category for sandbox

It seems useful to make sandbox its own log category since it is used for
so much testing. Add this as a new category.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agosandbox: tpm: Allow debugging of data packages
Simon Glass [Tue, 6 Nov 2018 22:21:23 +0000 (15:21 -0700)]
sandbox: tpm: Allow debugging of data packages

This is not normally useful, so change the code to avoid writing out every
data package. This can be enabled with #define DEBUG.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agocros_ec: Add new features for events and power
Simon Glass [Tue, 6 Nov 2018 22:21:22 +0000 (15:21 -0700)]
cros_ec: Add new features for events and power

This adds new commands to the EC related to setting and clearing events
as well as controlling power-related settings.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agocros_ec: Align uclass data to a cache boundary
Simon Glass [Tue, 6 Nov 2018 22:21:21 +0000 (15:21 -0700)]
cros_ec: Align uclass data to a cache boundary

The LPC driver expects its buffer to be word-aligned. Add the required
flag to the uclass driver to ensure this.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agocros_ec: Fail if we cannot determine the flash burst size
Simon Glass [Tue, 6 Nov 2018 22:21:20 +0000 (15:21 -0700)]
cros_ec: Fail if we cannot determine the flash burst size

This value is required for flashing to work correctly. Add a check for
it.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agocros_ec: Add error logging on a few commands
Simon Glass [Tue, 6 Nov 2018 22:21:19 +0000 (15:21 -0700)]
cros_ec: Add error logging on a few commands

Add some more logging to provide more information on failures.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agocros_ec: Use uint instead of u8 for parameters
Simon Glass [Tue, 6 Nov 2018 22:21:18 +0000 (15:21 -0700)]
cros_ec: Use uint instead of u8 for parameters

There is no advantage to using a u8 for function parameters. It forces
the compiler to mask values and can increase code size. Also the command
enum has been extended to 16 bits. Update the functions to use uint
instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agobuildman: Show boards with warning with w+
Simon Glass [Tue, 6 Nov 2018 23:02:13 +0000 (16:02 -0700)]
buildman: Show boards with warning with w+

At present we should boards with warnings in the same way as those with
errors. This is not ideal. Add a new 'warn' state and show these listed
in yellow to match the actual warning lines printing with -e.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agobuildman: Rename the good, better, worse variables
Simon Glass [Tue, 6 Nov 2018 23:02:12 +0000 (16:02 -0700)]
buildman: Rename the good, better, worse variables

At present we don't distinguish between errors and warnings when printing
the architecture summary. Rename the variables to better describe their
purpose.

'Worse' at present means we got an error, so use that as the name.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agobuildman: Detect dtc warnings
Simon Glass [Tue, 6 Nov 2018 23:02:11 +0000 (16:02 -0700)]
buildman: Detect dtc warnings

At present messages from the device-tree compiler like this:

  arch/arm/dts/socfpga_arria10_socdk_sdmmc.dtb: Warning
     (avoid_unnecessary_addr_size): /clocks: unnecessary
     #address-cells/#size-cells without "ranges" or child "reg" property

are detected as errors since they don't match the gcc warning regex. Add a
new one for dtc to fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agobuildman: Only print toolchain probing with -v
Simon Glass [Tue, 6 Nov 2018 23:02:10 +0000 (16:02 -0700)]
buildman: Only print toolchain probing with -v

At present --list-tool-chains prints a lot of information about the
toolchain-probing process. This is generally not very interesting.
Update buildman to print this only if --list-tool-chains is given
with -v.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agodm: spi: prevent setting a speed of 0 Hz
Simon Goldschmidt [Tue, 30 Oct 2018 20:09:48 +0000 (21:09 +0100)]
dm: spi: prevent setting a speed of 0 Hz

When the device tree is missing a correct spi slave description below
the bus (compatible "spi-flash" or spi-max-frequency are missing),
the 'set_speed' callback can be called with 'speed' == 0 Hz.
At least with cadence qspi, this leads to a division by zero.

Prevent this by initializing speed to 100 kHz in this case (same
fallback value as is done in 'dm_spi_claim_bus') and issue a warning
to console.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agofdt: restore board_fdt_blob_setup() declaration
Baruch Siach [Sun, 28 Oct 2018 12:41:14 +0000 (14:41 +0200)]
fdt: restore board_fdt_blob_setup() declaration

Commit 90c08fa038451d (fdt: Add device tree memory bindings) removed the
prototype declaration of board_fdt_blob_setup(), most likely by mistake.
This didn't break the build because the only file calling this function
(lib/fdtdec.c) provides a local weak definition. Restore the
declaration.

Cc: Michael Pratt <mpratt@chromium.org>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agocmd: fdt: Fix fdt address information after the movement
Hiroyuki Yokoyama [Thu, 18 Oct 2018 18:43:54 +0000 (20:43 +0200)]
cmd: fdt: Fix fdt address information after the movement

This patch fixes the address information of fdt.

wrong case:
 => fdt addr 0x48000000
 => fdt move 0x48000000 0x41000000 0xa000
 => fdt addr
The address of the fdt is 48000000

Active address in this case is 0x41000000.

Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agofdt: Fix uncompress_blob() for U-Boot proper
Marek Vasut [Thu, 18 Oct 2018 18:37:05 +0000 (20:37 +0200)]
fdt: Fix uncompress_blob() for U-Boot proper

When U-Boot proper is compiled with CONFIG_MULTI_DTB_FIT and tries
to call uncompress_blob(), it fails with -ENOTSUPP. This is because
the full implementation of this function which includes compression
is available only in SPL. In U-Boot proper or if the compression is
not enabled, the blob is not compressed and thus can be passed to
locate_dtb_in_fit() in fdtdec_setup() without any changes. Pass the
blob without any changes if compression is not enabled instead of
failing.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agodm: core: Widen the dump tree to show more of the driver's name.
Liviu Dudau [Mon, 15 Oct 2018 09:03:06 +0000 (10:03 +0100)]
dm: core: Widen the dump tree to show more of the driver's name.

With drivers that have prefix names that are quite long (like
'versatile_') it is useful to have a wider column for the driver's
name when dumping the device driver tree.

Also update the tests to take into account the wider output format.

Signed-off-by: Liviu Dudau <liviu.dudau@foss.arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agosandbox: README: use setenv ethrotate no
Heinrich Schuchardt [Sun, 14 Oct 2018 20:01:28 +0000 (22:01 +0200)]
sandbox: README: use setenv ethrotate no

If we want to control which network interface is actually used, we have to
issue 'setenv ethrotate no'. If ethrotate is not set any interface may be
used.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agosandbox: README: setting environment variables
Heinrich Schuchardt [Sun, 14 Oct 2018 19:40:02 +0000 (21:40 +0200)]
sandbox: README: setting environment variables

The command to set environment variables is setenv.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agosandbox: remove stray DEBUG
Heinrich Schuchardt [Sun, 14 Oct 2018 18:45:32 +0000 (20:45 +0200)]
sandbox: remove stray DEBUG

DEBUG should not be defined in production code.
Change printf() to debug() where this writes a debug message.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agodm/pci: Change the first CFG read to Vendor ID in enumeration
Hou Zhiqiang [Mon, 8 Oct 2018 08:35:47 +0000 (16:35 +0800)]
dm/pci: Change the first CFG read to Vendor ID in enumeration

As the PCIe specification recommend reading the Vendor ID register
to determine if a Function is present, read the Vendor ID of a
non-existent Function must not result in system error, so we'd better
make the first CFG read to Vendor ID instead of Header Type register
in the PCIe enumeration.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agoMerge git://git.denx.de/u-boot-marvell
Tom Rini [Tue, 20 Nov 2018 17:36:47 +0000 (12:36 -0500)]
Merge git://git.denx.de/u-boot-marvell

- Clearfog GT-8K support added by Baruch / Raheeb
- const and sizes cleanup (also in MIPS) from Baruch
- Minor cleanup to db-88f6820 from Chris

5 years agoMerge branch '2018-11-19-master-imports'
Tom Rini [Tue, 20 Nov 2018 17:36:08 +0000 (12:36 -0500)]
Merge branch '2018-11-19-master-imports'

- adc enhancements
- FAT fix

5 years agofs: fat: assign rootdir sector when accessing root directory
Thomas RIENOESSL [Tue, 13 Nov 2018 13:00:59 +0000 (14:00 +0100)]
fs: fat: assign rootdir sector when accessing root directory

This fixes problems accessing drives formated under
Windows as FAT16.

Signed-off-by: Thomas RIENOESSL <thomas.rienoessl@bachmann.info>
[trini: Rebase on top of f528c140c801]
Signed-off-by: Tom Rini <trini@konsulko.com>
5 years agoclk: meson: fix clk81 divider calculation
Jerome Brunet [Tue, 13 Nov 2018 10:38:38 +0000 (11:38 +0100)]
clk: meson: fix clk81 divider calculation

clk81 divider is 0 based (meaning that 0 value in the register means
divide by 1). Fix clk81 rate calculation for this.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
5 years agocmd: adc: add an option to scan some or all available channels
Fabrice Gasnier [Mon, 12 Nov 2018 13:04:01 +0000 (14:04 +0100)]
cmd: adc: add an option to scan some or all available channels

Add new option to 'adc' command to do a single scan of:
- some channel(s), using mask argument
- all channels available on an ADC device (when optional mask is omitted).

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agocmd: adc: print single conversion also in uV
Fabrice Gasnier [Mon, 12 Nov 2018 13:04:00 +0000 (14:04 +0100)]
cmd: adc: print single conversion also in uV

Use newly introduced adc_raw_to_uV() API to print conversion result
both as raw value and micro-volts by default.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agocmd: adc: add info on channel mask
Fabrice Gasnier [Mon, 12 Nov 2018 13:03:59 +0000 (14:03 +0100)]
cmd: adc: add info on channel mask

Enhance adc info command to report also the channel mask.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agodm: adc: add uclass's mask and conversion helpers
Fabrice Gasnier [Mon, 12 Nov 2018 13:03:58 +0000 (14:03 +0100)]
dm: adc: add uclass's mask and conversion helpers

Add two functions to ADC uclass's:
- adc_raw_to_uV() to ease ADC raw value conversion to microvolts
- adc_channel_mask() to get channels on consumer side

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agoARM: mvebu: dts: add Clearfog GT-8K
Rabeeh Khoury [Thu, 25 Oct 2018 17:37:47 +0000 (20:37 +0300)]
ARM: mvebu: dts: add Clearfog GT-8K

The SolidRun Clearfog GT-8K is based on Armada 8040.

https://wiki.solid-run.com/doku.php?id=products:a8040:clearfoggt8k

The config file is identical to the Macchiatobin one
(mvebu_mcbin-88f8040_defconfig) with only the default device-tree
changed.

Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
5 years agoARM: mvebu: db-88f6820: remove redundant comment
Chris Packham [Mon, 19 Nov 2018 06:59:23 +0000 (19:59 +1300)]
ARM: mvebu: db-88f6820: remove redundant comment

After migration to Kconfig the comment about TEXT_BASE has become
redundant.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
5 years agoarm64: mvebu: a8k: autodetect RAM size
Baruch Siach [Sun, 11 Nov 2018 10:31:04 +0000 (12:31 +0200)]
arm64: mvebu: a8k: autodetect RAM size

Some Armada 8K boards like Macchiatobin and Clearfog GT-8K use RAM from
external DIMM. Hard coding the RAM size in the device-tree is not
convenient. Fortunately, the ATF that initializes the RAM knows the size
of RAM, and U-Boot can query the ATF using a SMC call.

The ATF maps the lower 3G of RAM starting at address 0. Higher RAM is
mapped at 4G. This leaves a 1G hole between 3G and 4G for IO
peripherals. Use a second bi_dram[] entry to describe the higher RAM
area. As a result, CONFIG_NR_DRAM_BANKS must be set to 2 to use more
than 3GB RAM.

This code in this commit is mostly taken from downstream Marvell U-Boot
code by Grzegorz Jaszczyk.

Cc: Grzegorz Jaszczyk <jaz@semihalf.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
5 years agolinux/sizes.h: sync from kernel
Baruch Siach [Sun, 11 Nov 2018 10:31:03 +0000 (12:31 +0200)]
linux/sizes.h: sync from kernel

The kernel added SZ_4G macro in commit f2b9ba871b (arm64/kernel: kaslr:
reduce module randomization range to 4 GB).

Include linux/const.h for the _AC macro.

Drop a local SZ_4G definition in tegra code.

Cc: Tom Warren <twarren@nvidia.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
5 years agoMIPS: drop asm/const.h
Baruch Siach [Sun, 11 Nov 2018 10:31:02 +0000 (12:31 +0200)]
MIPS: drop asm/const.h

Commit 86f21c96f467368 (mips: Use common _AC macro now.) removed the _AC
definition from const.h. All other macros defined in const.h are not
used anywhere, and there is now no user of this header. Remove this
header.

Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
5 years agoUse _AC and UL macros from linux/const.h
Baruch Siach [Sun, 11 Nov 2018 10:31:01 +0000 (12:31 +0200)]
Use _AC and UL macros from linux/const.h

Drop the _AC and UL macros from common.h. Linux headers is the original
source of this macro, so keep its definition in the same header.

Update existing users of these macros to include const.h directly.

Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Rick Chen <rick@andestech.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
5 years agolinux/const.h: import from kernel
Baruch Siach [Sun, 11 Nov 2018 10:31:00 +0000 (12:31 +0200)]
linux/const.h: import from kernel

Combine the uapi/linux/const.h header into the kernel linux/const.h. The
next commit will use the _AC macro this header instead of the common.h
definition.

Based on Linux kernel version 4.19.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Stefan Roese <sr@denx.de>
5 years agoMerge tag 'mips-pull-2018-11-18' of git://git.denx.de/u-boot-mips
Tom Rini [Sun, 18 Nov 2018 20:47:16 +0000 (15:47 -0500)]
Merge tag 'mips-pull-2018-11-18' of git://git.denx.de/u-boot-mips

- tree-wide: introduce LDFLAGS_STANDALONE
- MIPS: fix long-standing issue with linking of standalone programs
- MIPS: MT76xx: add GPIO and WDT drivers
- MIPS: MT76xx: various fixes and updates to gardena-smart-gateway board
- MIPS: MT76xx: various fixes and updates to linkit-smart-7688 board

5 years agoMIPS: fix linking of standalone programs
Daniel Schwierzeck [Sun, 23 Sep 2018 17:15:17 +0000 (19:15 +0200)]
MIPS: fix linking of standalone programs

Use the global MIPS specific u-boot.lds for linking standalone programs
instead of the outdated ones in examples/standalone/. Also pass --gc-sections
in LDFLAGS_STANDALONE to optimize the size of standalone programs.
Finally remove the deprecated config.mk files in arch/mips/cpu/mips[32,64]/.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
5 years agoKbuild: standalone: do not ignore platform-specific OBJCOPYFLAGS
Daniel Schwierzeck [Sun, 23 Sep 2018 17:15:16 +0000 (19:15 +0200)]
Kbuild: standalone: do not ignore platform-specific OBJCOPYFLAGS

Currently the OBJCOPYFLAGS are cleared when assigning "-O srec"
or "-O binary" for standalone programs. All flags set by arch-specific
Makefiles are lost. This is bad if an arch demands arch-specific
flags for the objcopy step.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
5 years agoKbuild: add LDFLAGS_STANDALONE
Daniel Schwierzeck [Sun, 23 Sep 2018 17:15:15 +0000 (19:15 +0200)]
Kbuild: add LDFLAGS_STANDALONE

Introduce a new Makefile variable for passing LDFLAGS to standalone
programs. Currently the variable CONFIG_STANDALONE_LOAD_ADDR is
misued on some archs to pass a specific linker script.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Rick Chen <rick@andestech.com>
5 years agomips: mt76xx: linkit-smart-7688: Misc updates to dts/config/defconfig
Stefan Roese [Tue, 9 Oct 2018 06:59:16 +0000 (08:59 +0200)]
mips: mt76xx: linkit-smart-7688: Misc updates to dts/config/defconfig

These misc updates include the following changes:
- Change baudrate from 57600 to 115200
- Enable MIPS_BOOT_CMDLINE_LEGACY
- Enable FIT support
- Enable ethernet support
- Enable SPI support
- Enable GPIO support
- Change max image size from 0x40000 to 0x80000

A note about the baudrate change:

The original Mediatek U-Boot version used 57600 baud. Lets move to a
more common and faster speed of 115200 baud. And remove the "console="
property from the DT as its not needed.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
5 years agomips: mt76xx: linkit-smart-7688: Use ioremap_nocache to get address
Stefan Roese [Tue, 9 Oct 2018 06:59:15 +0000 (08:59 +0200)]
mips: mt76xx: linkit-smart-7688: Use ioremap_nocache to get address

Use the correct function to get the uncached address to access the SoC
registers.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
5 years agomips: mt76xx: gardena-smart-gateway: Misc updates to dts/config/defconfig
Stefan Roese [Tue, 9 Oct 2018 06:59:14 +0000 (08:59 +0200)]
mips: mt76xx: gardena-smart-gateway: Misc updates to dts/config/defconfig

These misc updates include the following changes:
- Change baudrate from 57600 to 115200
- Enable MIPS_BOOT_CMDLINE_LEGACY
- Enable FIT support
- Enable ethernet support
- Enable SPI NOR and NAND support
- Change MTD_UBI_BEB_LIMIT to 22
- Enable MTD Support
- Enable GPIO support
- Enable watchdog support
- Enable bootcounter support
- Enable version variable
- Change max image size from 0x80000 to 0xa0000
- Change SYS_MALLOC_LEN to 16MiB (because of UBI/UBIFS)

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
5 years agomips: mt76xx: gardena-smart-gateway: Add board_late_init() to set LED def state
Stefan Roese [Tue, 9 Oct 2018 06:59:13 +0000 (08:59 +0200)]
mips: mt76xx: gardena-smart-gateway: Add board_late_init() to set LED def state

This is needed to set the LEDs automatically to a default state, as
configured in the dts.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
5 years agomips: mt76xx: gardena-smart-gateway: Add LEDs to dts
Stefan Roese [Tue, 9 Oct 2018 06:59:12 +0000 (08:59 +0200)]
mips: mt76xx: gardena-smart-gateway: Add LEDs to dts

Add the available LEDs to the DTS file so that they can be used.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
5 years agomips: mt76xx: gardena-smart-gateway: Configure GPIOs (digital vs analog)
Stefan Roese [Tue, 9 Oct 2018 06:59:11 +0000 (08:59 +0200)]
mips: mt76xx: gardena-smart-gateway: Configure GPIOs (digital vs analog)

Configure digital vs analog GPIOs as needed on this board.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
5 years agomips: mt76xx: Enable watchdog support
Stefan Roese [Tue, 9 Oct 2018 06:59:10 +0000 (08:59 +0200)]
mips: mt76xx: Enable watchdog support

This patch enables and starts the watchdog on the MT7620 platform.
Currently the WD timeout is configured to 60 seconds.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
[fixed build error due to missing function prototype arch_misc_init]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
5 years agomips: mt76xx: Kconfig: Add ethernet and GPIO support
Stefan Roese [Tue, 9 Oct 2018 06:59:09 +0000 (08:59 +0200)]
mips: mt76xx: Kconfig: Add ethernet and GPIO support

Imply DM_ETH and DM_GPIO for ARCH_MT7620, as this platform now supports
ethernet and GPIO as well.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
5 years agomips: mt76xx: Add watchdog DT node to mt7628a.dtsi
Stefan Roese [Tue, 9 Oct 2018 06:59:08 +0000 (08:59 +0200)]
mips: mt76xx: Add watchdog DT node to mt7628a.dtsi

Add the watchdog DT node to the DTS file.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
5 years agomips: mt76xx: Add GPIO DT nodes to mt7628a.dtsi
Stefan Roese [Tue, 9 Oct 2018 06:59:07 +0000 (08:59 +0200)]
mips: mt76xx: Add GPIO DT nodes to mt7628a.dtsi

Add the GPIO DT nodes to the DTS file.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
5 years agomips: mt76xx: Add ethernet DT node to mt7628a.dtsi
Stefan Roese [Tue, 9 Oct 2018 06:59:06 +0000 (08:59 +0200)]
mips: mt76xx: Add ethernet DT node to mt7628a.dtsi

Add the ethernet DT node to the DTS file.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
5 years agomips: mt76xx: lowlevel_init.S: Add missing memory controller reset in DDR init
Stefan Roese [Tue, 9 Oct 2018 06:59:04 +0000 (08:59 +0200)]
mips: mt76xx: lowlevel_init.S: Add missing memory controller reset in DDR init

This fixes an issue which has been noticed on the Gardena board, with
the watchdog enabled, where the watdchdog reset (after a system hang)
did result in reporting of 2.9 GiB and a hang after this. With this
patch applied the memory controller is correctly reset and initialized
again even after a watchdog reset.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
5 years agogpio: Add MT7621 GPIO support
Stefan Roese [Mon, 8 Oct 2018 10:38:01 +0000 (12:38 +0200)]
gpio: Add MT7621 GPIO support

This patch adds GPIO support for the Mediatek MT7621 SoC, tested on
MT7688 (Gardena smart-gateway). The driver is loosly based on the
Linux kernel version.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
[fixed checkpatch.pl warnings: Prefer 'unsigned int' to bare use of 'unsigned']
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
5 years agowdt: Add MT7621 watchdog driver
Stefan Roese [Thu, 4 Oct 2018 11:39:07 +0000 (13:39 +0200)]
wdt: Add MT7621 watchdog driver

This patch adds watchdog support for the Mediatek MT7621 SoC. The driver
is loosly based on the Linux kernel version.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
[fixed merge conflict in drivers/watchdog/Kconfig]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
5 years agoMerge branch '2018-11-16-master-imports'
Tom Rini [Sat, 17 Nov 2018 13:19:40 +0000 (08:19 -0500)]
Merge branch '2018-11-16-master-imports'

- Initial bcm968580xref, am65x_evm_r5 support
- lpc32xx, omap3_logic/am3517_evm updates
- pinctrl command
- fs_loader available for SPL

5 years agosunxi: Update MAINTAINERS file for recent boards
Tom Rini [Fri, 16 Nov 2018 14:32:31 +0000 (09:32 -0500)]
sunxi: Update MAINTAINERS file for recent boards

Add entries for the pine64-lts and pinebook configs.

Cc: Vasily Khoruzhick <anarsoul@gmail.com>
Cc: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
5 years agofdt_region: Ensure that depth never goes below -1
Konrad Beckmann [Wed, 7 Nov 2018 19:51:46 +0000 (14:51 -0500)]
fdt_region: Ensure that depth never goes below -1

A specially crafted FIT image makes it possible to overflow the stack
with controlled values when using the verified boot feature. Depending
on the memory layout, this could be used to overwrite configuration
variables on the heap and setting them to 0, e.g. disable signature
verification, thus bypassing it.

This change fixes a bug in fdt_find_regions where the fdt structure is
parsed. A lower value than -1 of depth can lead to a buffer underflow
write on the stack.

Signed-off-by: Konrad Beckmann <konrad.beckmann@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agoimage-sig: Ensure that hashed-nodes is null-terminated
Konrad Beckmann [Wed, 7 Nov 2018 19:51:45 +0000 (14:51 -0500)]
image-sig: Ensure that hashed-nodes is null-terminated

A specially crafted FIT image leads to memory corruption in the stack
when using the verified boot feature. The function fit_config_check_sig
has a logic error that makes it possible to write past the end of the
stack allocated array node_inc. This could potentially be used to bypass
the signature check when using verified boot.

This change ensures that the number of strings is correct when counted.

Signed-off-by: Konrad Beckmann <konrad.beckmann@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agoAbility to modify distro boot filename
Martyn Welch [Tue, 6 Nov 2018 12:23:53 +0000 (12:23 +0000)]
Ability to modify distro boot filename

Add in the ability to modify the distro boot filename. Whilst not
immediately useful in normal usage, it allows an alternative
configuration to be provided when other u-boot functionality is used, such
as bootcount limit, to fallback to an alternative boot configuration. In
this case we can follow the same boot path as for normal boot, just
using an alternatively named configuration file.

For example, by providing the following `altbootcmd` when bootcount is in
use:

altbootcmd=setenv boot_extlinx_conf extlinux-rollback.conf; \
run distro_bootcmd

Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
5 years agomisc: fs_loader: Fix compiler warning
Keerthy [Mon, 5 Nov 2018 06:04:54 +0000 (11:34 +0530)]
misc: fs_loader: Fix compiler warning

Fix compiler warning

drivers/misc/fs_loader.c:193:9: warning: format ‘%d’ expects
argument of type ‘int’, but argument 5 has type ‘size_t
{aka long unsigned int}’ [-Wformat=]

Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>