Stefan Roese [Sun, 18 Nov 2007 13:44:44 +0000 (14:44 +0100)]
ppc4xx: Correct 405EX PCIe UTL register mapping
Map 4k mem space for UTL registers for each port.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Sat, 17 Nov 2007 13:52:29 +0000 (14:52 +0100)]
ppc4xx: Update AMCC Kilauea config file
- Use generic GPIO configuration framework (CFG_4xx_GPIO_TABLE)
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Fri, 16 Nov 2007 13:16:54 +0000 (14:16 +0100)]
ppc4xx: Enable 405EX PCIe UTL register configuration
Till now the UTL registers on 405EX were not initialized but left with
their default values. This patch new initializes some of the UTL
registers on 405EX.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Fri, 16 Nov 2007 13:00:59 +0000 (14:00 +0100)]
ppc4xx: Update AMCC Makalu for board rev 1.1
This patch adds changes needed for Makalu rev 1.1:
- Enable 2nd DDR2 bank resulting in 256MByte of SDRAM
- Enable 2nd ethernet port EMAC1
- Use generic GPIO configuration framework (CFG_4xx_GPIO_TABLE)
- Reset PCIe ports via GPIO upon bootup
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Thu, 15 Nov 2007 13:25:09 +0000 (14:25 +0100)]
ppc4xx: Small AMCC Kilauea cleanup
Remove not needed pci_target_init() function.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Thu, 15 Nov 2007 13:23:55 +0000 (14:23 +0100)]
ppc4xx: Enable 440 GPIO init table CFG_440_GPIO_TABLE for 405 platforms
- Rename CFG_440_GPIO_TABLE to CFG_4xx_GPIO_TABLE
- Cleanup of the 4xx GPIO functions
- Move some GPIO defines from the cpu headers ppc405.h/ppc440.h into gpio.h
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Thu, 15 Nov 2007 13:20:08 +0000 (14:20 +0100)]
ppc4xx: AMCC Taihu board config file cleanup
This patch makes the AMCC Taihu a little more compatible to the other
AMCC eval boards.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Tue, 13 Nov 2007 07:06:11 +0000 (08:06 +0100)]
ppc4xx: Fix 405EX PCIe UTLSET register setup
Signed-off-by: Stefan Roese <sr@denx.de>
Matthias Fuchs [Fri, 9 Nov 2007 14:37:53 +0000 (15:37 +0100)]
ppc4xx: Use generic usb-ohci driver for sequoia board
This patch makes the sequoia board use the generic usb-ohci driver
instead of cpu/ppc4xx/usb_ohci.c.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Matthias Fuchs [Fri, 9 Nov 2007 14:37:23 +0000 (15:37 +0100)]
ppc4xx: Make USB working with CONFIG_4xx_DCACHE defined
This patch disables the 44x d-cache on 'usb start' and
reenables it on 'usb stop'. This should be seen as a
temporary fix until the generic usb-ohci driver can
life with d-cache enabled.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Matthias Fuchs [Fri, 9 Nov 2007 14:36:44 +0000 (15:36 +0100)]
ppc4xx: Remove redundant code from 4xx network driver
This patch removes some redundant code and decrements the end
address of cache flush and invalidate by 1.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Fri, 9 Nov 2007 11:19:58 +0000 (12:19 +0100)]
ppc4xx: Remove In:/Out:/Err: boot output for AMCC Kilauea
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Fri, 9 Nov 2007 11:18:54 +0000 (12:18 +0100)]
ppc4xx: Make output a little shorter on I2C bootrom detection
Most 4xx PPC capable of using an I2C bootrom for bootstrap setting
already print a line with the information which I2C bootrom is
used for bootstrap configuration. So we don't need this extra line
with "I2C boot EEPROM en-/dis-abled".
This patch also has a little code cleanup integrated.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 5 Nov 2007 06:43:05 +0000 (07:43 +0100)]
ppc4xx: Make output a little shorter on PCIe detection
Now not max 3 lines but 2 lines are printed per PCIe port.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Sat, 3 Nov 2007 11:08:28 +0000 (12:08 +0100)]
ppc4xx: Add AMCC Kilauea/Haleakala NAND booting support
This patch adds NAND booting support for the AMCC 405EX(r) eval boards.
Again, only one image supports both targets.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Wed, 31 Oct 2007 19:58:34 +0000 (20:58 +0100)]
ppc4xx: Fix acadia_nand build problem
Since the cache handling functions were moved from start.S into cache.S
the acadia NAND booting Makfile needs to be adapted accordingly.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Wed, 31 Oct 2007 19:57:11 +0000 (20:57 +0100)]
ppc4xx: Add CONFIG_4xx_DCACHE compile options to enable cached SDRAM
This patch adds the CONFIG_4xx_DCACHE options to some SDRAM init files
and to the Sequoia TLB init code. Now the cache can be enabled on 44x
boards by defining CONFIG_4xx_DCACHE in the board config file. This
option will disappear, when more boards use is successfully and no
more known problems exist.
This is tested successfully on Sequoia and Katmai. The only problem that
needs to be fixed is, that USB is not working on Sequoia right now, since
it will need some cache handling code too, similar to the 4xx EMAC driver.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Wed, 31 Oct 2007 19:51:10 +0000 (20:51 +0100)]
ppc4xx: Enable CPU POST test for 4xx with dcache enabled
Now with caches enabled (i- and d-cache) on 44x, we need a chance to
disable the cache for the CPU POST tests, since these tests consist
of self modifying code. This is done via the new change_tlb() function.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Wed, 31 Oct 2007 19:47:26 +0000 (20:47 +0100)]
ppc4xx: Change 4xx POST ethernet test to handle cached memory too
This patch enables the 4xx EMAC POST driver to work too, when dcache is
enabled.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Wed, 31 Oct 2007 19:45:53 +0000 (20:45 +0100)]
ppc4xx: Remove temporary TLB entry in POST cache test only for 440
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Wed, 31 Oct 2007 17:01:24 +0000 (18:01 +0100)]
ppc4xx: Change 4xx ethernet driver to handle cached memory too
This patch enables the 4xx EMAC driver to work too, when dcache is
enabled.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Wed, 31 Oct 2007 16:59:22 +0000 (17:59 +0100)]
ppc4xx: Add change_tlb function to modify I attribute of TLB(s)
This function is used to either turn cache on or off in a specific
memory area.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Wed, 31 Oct 2007 16:57:52 +0000 (17:57 +0100)]
ppc4xx: Remove cache definition from 4xx board config files
All 4xx board config files don't need the cache definitions anymore.
These are now defined in common headers.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Wed, 31 Oct 2007 16:55:58 +0000 (17:55 +0100)]
ppc4xx: Rework 4xx cache support
New cache handling functions added and all existing functions
moved from start.S into seperate cache.S.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Tue, 23 Oct 2007 16:03:12 +0000 (18:03 +0200)]
ppc4xx: Remove compiler warning from previous commit
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Tue, 23 Oct 2007 12:40:30 +0000 (14:40 +0200)]
ppc4xx: Remove temporary TLB entry in POST cache test
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Tue, 23 Oct 2007 12:05:08 +0000 (14:05 +0200)]
ppc4xx: Change autonegotiation timeout from 4 to 5 seconds
I lately noticed, that newer 4xx board with GBit support sometimes don't
finish link autonegotiation in 4 seconds. Changing this timeout to 5
seconds seems fine here.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Tue, 23 Oct 2007 12:03:17 +0000 (14:03 +0200)]
ppc4xx: Change 4xx_enet & miiphy to use out_be32() and friends
This patch changes all in32/out32 calls to use the recommended in_be32/
out_be32 macros instead.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Thu, 25 Oct 2007 10:24:59 +0000 (12:24 +0200)]
ppc4xx: Fix POST ethernet test for Haleakala
The POST ethernet test needed to be changed to dynamically determine
the count of ethernet devices. This code is cloned from the 4xx
ethernet driver.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Tue, 23 Oct 2007 09:31:05 +0000 (11:31 +0200)]
ppc4xx: Correct UART input clock calculation and passing to fdt
We now use a value in the gd (global data) structure for the UART input
frequency, since the PPC4xx_SYS_INFO struct is always rewritten completely
in get_sys_info().
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Tue, 23 Oct 2007 08:10:08 +0000 (10:10 +0200)]
ppc4xx: Add initial AMCC Haleakala PPC405EXr eval board support
The Haleakala is nearly identical with the Kilauea eval board. The only
difference is that the 405EXr only supports one EMAC and one PCIe
interface. This patch adds support for the Haleakala board by using
the identical image for Kilauea and Haleakala. The distinction is done
by comparing the PVR.
Signed-off-by: Stefan Roese <sr@denx.de>
Eugene O'Brien [Tue, 23 Oct 2007 06:29:10 +0000 (08:29 +0200)]
ppc4xx: Fixed offset of refresh rate type for Bamboo on-board DDR SDRAM
This patch also adds a note to the fixed DDR setup for Bamboo NAND booting:
Note:
As found out by Eugene O'Brien <eugene.obrien@advantechamt.com>, the fixed
DDR setup has problems (U-Boot crashes randomly upon TFTP), when the DIMM
modules are still plugged in. So it is recommended to remove the DIMM
modules while using the NAND booting code with the fixed SDRAM setup!
Signed-off-by: Eugene O'Brien <eugene.obrien@advantechamt.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 22 Oct 2007 14:24:44 +0000 (16:24 +0200)]
ppc4xx: Add SNTP support to AMCC Katmai, Kilauea & Makalu boards
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 22 Oct 2007 14:22:40 +0000 (16:22 +0200)]
ppc4xx: Rework of 4xx serial driver (4)
Change 4xx_uart.c:
- Use in_8/out_8 macros instead of in8/out8
- No need for UART_BASE marco anymore, now really handled via function
parameter
- serial_init_common() introduced
- Further coding style cleanup
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 22 Oct 2007 13:45:49 +0000 (15:45 +0200)]
ppc4xx: Rework of 4xx serial driver (3)
Change all linker scripts to reference the changed driver name iop480_uart.o.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 22 Oct 2007 13:44:39 +0000 (15:44 +0200)]
ppc4xx: Rework of 4xx serial driver (2)
Change all linker scripts to reference the changed driver name 4xx_uart.o.
Note: In most cased all these explicit referencing of these object files
in the linker scripts is not neccessary. Only for manually embedded
environment into the U-Boot image, which is not done is most cases.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 22 Oct 2007 13:09:59 +0000 (15:09 +0200)]
ppc4xx: Rework of 4xx serial driver (1)
This patch starts the rework of the PPC4xx serial driver. First we split
the file into two seperate files, one 4xx_uart.c with the 405/440 UART
handling code and the other one iop480_uart.c with the UART code for the
PLX-Tech IOP480 PPC (PPC403 based).
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 22 Oct 2007 08:30:38 +0000 (10:30 +0200)]
ppc4xx: Correct UART input clock calculation and passing to fdt
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 22 Oct 2007 05:34:34 +0000 (07:34 +0200)]
ppc4xx: Add initial AMCC Makalu 405EX support
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 22 Oct 2007 05:33:52 +0000 (07:33 +0200)]
ppc4xx: Add freqUART to CPU speed detection
This value is needed later for the device tree configuration of
the uart clock.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Sun, 21 Oct 2007 12:26:29 +0000 (14:26 +0200)]
ppc: Small Kilauea cleanup of config file
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Sun, 21 Oct 2007 06:16:12 +0000 (08:16 +0200)]
rtc: Add Xicor/Intersil X1205 RTC support
This patch adds support for the Xicor/Intersil X1205 RTC used on the
AMCC Makalu eval board. This driver is basically cloned from the Linux
driver version (2.6.23).
This patch also introduces the Linux bcd.h header for the BCD2BIN/
BIN2BCD conversions. In the future some of the other U-Boot RTC driver
should be converted to also use this header instead of implementing
their own local copy of these functions/macros.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Sun, 21 Oct 2007 06:12:41 +0000 (08:12 +0200)]
ppc4xx: Consolidate some of the 405 and 440 macros/structs into 4xx
This patch moves some common 4xx macros and the PPC405_SYS_INFO/
PPC440_SYS_INFO structure into the common ppc4xx.h header.
Lot's of other macros are good candidates to be consolidated this way
in the future.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Sun, 21 Oct 2007 06:05:18 +0000 (08:05 +0200)]
ppc4xx: Fix size setup in Kilauea DDR2 init routine
The size was initilized wrong. Instead of 256MB, the DDR2 controller
was setup to 512MB. Now the correct values is used.
This patch also does a little cleanup and adds a comment here.
Signed-off-by: Stefan Roese <sr@denx.de>
Eugene O'Brien [Thu, 18 Oct 2007 15:29:04 +0000 (17:29 +0200)]
ppc4xx: Define CONFIG_BOOKE for all PPC440 based processors
CONFIG_BOOKE must be defined for PPC440 processors so that the proper SPR
number is used to access system registers.
Signed-off-by: Eugene O'Brien <eugene.obrien@advantechamt.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Thu, 18 Oct 2007 05:42:27 +0000 (07:42 +0200)]
ppc4xx: Change inbound PCIe location for endpoint tests on Katmai
On Yucca & Katmai, the inbound memory map pointed to 0x4.0000.0000, which
is the internal SRAM. Since I now ported and tested this endpoint mode
on Kilauea successfully to map to 0 (SDRAM), I also changed this for
Katmai.
Yucca will stay at internal SRAM for now. Not sure if somebody relies on
this setup.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Thu, 18 Oct 2007 05:39:38 +0000 (07:39 +0200)]
ppc4xx: Add PCIe endpoint support on Kilauea (405EX)
This patch adds endpoint support for the AMCC Kilauea eval board. It can
be tested by connecting a reworked PCIe cable (only 1x lane singles
connected) to another root-complex.
In this test setup, a 64MB inbound window is configured at BAR0 which maps
to 0 on the PLB side. So accessing this BAR0 from the root-complex will
access the first 64MB of the SDRAM on the PPC side.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Sat, 13 Oct 2007 14:43:23 +0000 (16:43 +0200)]
ppc4xx: Dynamic configuration of 4xx PCIe mode as root or endpoint mode
This patch adds support for dynamic configuration of PCIe ports for the
AMCC PPC4xx boards equipped with PCIe interfaces. These are the PPC440SPe
boards Yucca & Katmai and the 405EX board Kilauea.
This dynamic configuration is done via the "pcie_mode" environement
variable. This variable can be set to "EP" or "RP" for endpoint or
rootpoint mode. Multiple values can be joined via the ":" delimiter.
Here an example:
pcie_mode=RP:EP:EP
This way, PCIe port 0 will be configured as rootpoint, PCIe port 1 and 2
as endpoint.
Per default Yucca will be configured as:
pcie_mode=RP:EP:EP
Per default Katmai will be configured as:
pcie_mode=RP:RP:REP
Per default Kilauea will be configured as:
pcie_mode=RP:RP
Signed-off-by: Tirumala R Marri <tmarri@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Thu, 11 Oct 2007 09:15:59 +0000 (11:15 +0200)]
ppc4xx: Enable device tree support (fdt) on Kilauea per default
This patch enables the fdt support on the AMCC Kilauea eval board.
Additionally now EBC ranges fdt fixup is included to support NOR
FLASH mapping via the Linux physmap_of driver.
This Kilauea port now support booting arch/ppc and arch/powerpc
Linux kernels. The default environment "net_nfs" is for arch/ppc
and "net_nfs_fdt" is for arch/powerpc. In the long run, arch/ppc
support will be removed.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Thu, 11 Oct 2007 09:11:45 +0000 (11:11 +0200)]
ppc4xx: Add additional debug info to 4xx fdt support
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Fri, 5 Oct 2007 19:28:58 +0000 (21:28 +0200)]
ppc4xx: Fix small merge problems with CPCI440 and Acadia boards
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Fri, 5 Oct 2007 15:35:10 +0000 (17:35 +0200)]
ppc4xx: Fix small merge problem in 4xx_enet.c
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Fri, 5 Oct 2007 15:11:30 +0000 (17:11 +0200)]
ppc4xx: Add initial AMCC Kilauea 405EX support
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Fri, 5 Oct 2007 15:10:59 +0000 (17:10 +0200)]
ppc4xx: Add PPC405EX support
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Fri, 5 Oct 2007 15:09:36 +0000 (17:09 +0200)]
ppc4xx: Cleanup of 4xx PCI and PCIe support (renaming)
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Fri, 5 Oct 2007 15:07:50 +0000 (17:07 +0200)]
ppc4xx: Add initial fdt support to 4xx (first needed on 405EX)
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Fri, 5 Oct 2007 15:04:57 +0000 (17:04 +0200)]
POST: Add 405EX support to 4xx UART POST test
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Fri, 5 Oct 2007 13:10:02 +0000 (15:10 +0200)]
DTT: Prepare DS1775 driver for use of different I2C addresses
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Fri, 5 Oct 2007 12:23:43 +0000 (14:23 +0200)]
ppc4xx: 4xx_pcie: Change PCIe status output to match common style
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Fri, 5 Oct 2007 07:22:33 +0000 (09:22 +0200)]
ppc4xx: 4xx_pcie: Disable debug output as default
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Fri, 5 Oct 2007 07:18:23 +0000 (09:18 +0200)]
ppc4xx: 4xx_pcie: More general cleanup and 405EX PCIe support added
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Fri, 5 Oct 2007 05:57:20 +0000 (07:57 +0200)]
ppc4xx: 4xx_pcie: Change CFG_PCIE_MEMSIZE to 128MB on Yucca & Katmai
128MB seems to be the smallest possible value for the memory size
for on PCIe port. With this change now the BAR's of the PCIe cards
are accessible under U-Boot.
One big note: This only works for PCIe port 0 & 1. For port 2 this
currently doesn't work, since the base address is now 0xc0000000
(0xb0000000 + 2 * 0x08000000), and this is already occupied by
CFG_PCIE0_CFGBASE. But solving this issue for port 2 would mean
to change the base addresses completely and this change would have
too much impact right now.
This patch adds debug output to the 4xx pcie driver too.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Wed, 3 Oct 2007 19:16:32 +0000 (21:16 +0200)]
ppc4xx: 4xx_pcie: Fix problem with SDRN access using port number as idx
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Wed, 3 Oct 2007 13:01:02 +0000 (15:01 +0200)]
ppc4xx: Rename 405gp_pci to 4xx_pci since its used on all 4xx platforms
These files were introduced with the IBM 405GP but are currently used on all
4xx PPC platforms. So the name doesn't match the content anymore. This patch
renames the files to 4xx_pci.c/h.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Wed, 3 Oct 2007 12:14:58 +0000 (14:14 +0200)]
ppc4xx: Add a comment for 405EX PCIe endpoint configuration
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Wed, 3 Oct 2007 08:38:09 +0000 (10:38 +0200)]
ppc4xx: Make 440SPe PCIe code more generic to use on different 4xx PPCs (3)
(3) This patch introduces macros like SDRN_PESDR_DLPSET(port) to access
the SDR registers of the PCIe ports. This makes the overall design
clearer, since it removed a lot of switch statements which are not
needed anymore.
Also, the functions ppc4xx_init_pcie_rootport() and
ppc4xx_init_pcie_entport() are merged into a single function
ppc4xx_init_pcie_port(), since most of the code was duplicated.
This makes maintainance and porting to other 4xx platforms
easier.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Wed, 3 Oct 2007 05:48:09 +0000 (07:48 +0200)]
ppc4xx: Make 440SPe PCIe code more generic to use on different 4xx PPCs (2)
This patch is the first patch of a series to make the 440SPe PCIe code
usable on different 4xx PPC platforms. In preperation for the new 405EX
which is also equipped with PCIe interfaces.
(2) This patch renames the functions from 440spe_ to 4xx_ with a
little additional cleanup
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Wed, 3 Oct 2007 05:34:10 +0000 (07:34 +0200)]
ppc4xx: Make 440SPe PCIe code more generic to use on different 4xx PPCs (1)
This patch is the first patch of a series to make the 440SPe PCIe code
usable on different 4xx PPC platforms. In preperation for the new 405EX
which is also equipped with PCIe interfaces.
(1) This patch renames the files from 440spe_pcie to 4xx_pcie
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Sat, 27 Oct 2007 11:43:40 +0000 (13:43 +0200)]
Merge git://www.denx.de/git/u-boot
Bartlomiej Sieka [Thu, 25 Oct 2007 15:20:01 +0000 (17:20 +0200)]
TQM5200: increase kernel_addr_r and fdt_addr_r (hinted by Wolfgang Denk).
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Wolfgang Denk [Wed, 24 Oct 2007 09:05:28 +0000 (11:05 +0200)]
Merge branch 'motionpro_ng' of /home/tur/git/u-boot
Martin Krause [Mon, 22 Oct 2007 14:45:53 +0000 (16:45 +0200)]
TQM5200: fix spurious characters on second serial interface
With this patch PSC3 is configured as UART. This is done, because if
the pins of PSC3 are not configured at all (-> all pins are GPI),
due to crosstalk, spurious characters may be send over the RX232_2_TXD
signal line.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
Martin Krause [Mon, 22 Oct 2007 14:40:06 +0000 (16:40 +0200)]
TQM5200S: fix commands for STK52xx base board because of missing SM501 grafic controller
Some commands for the STK52xx base board try to access the SM501 grafic
controller. But the TQM5200S has no grafic controller (only the TQM5200
and the TQM5200B have). This patch deactivates the commands accessing
the SM501 for the TQM5200S.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
Jean-Christophe PLAGNIOL-VILLARD [Sun, 21 Oct 2007 07:14:28 +0000 (09:14 +0200)]
Mips: Fix string functions differ prototype declaration
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Ed Swarthout [Fri, 19 Oct 2007 22:51:40 +0000 (17:51 -0500)]
fsl_pci_init enable COMMAND_MEMORY if inbound window
Patch
16e23c3f removed PCSRBAR allocation. But passing zero windows
to pciauto_setup_device has the side effect of not getting
COMMAND_MEMORY set.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Jean-Christophe PLAGNIOL-VILLARD [Fri, 19 Oct 2007 08:55:24 +0000 (10:55 +0200)]
delta: Fix OHCI_REGS_BASE undeclared and wait_ms implicit declaration
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Jean-Christophe PLAGNIOL-VILLARD [Fri, 19 Oct 2007 06:10:15 +0000 (08:10 +0200)]
fix warning: no return statement in function returning non-void
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Jean-Christophe PLAGNIOL-VILLARD [Fri, 19 Oct 2007 04:33:45 +0000 (06:33 +0200)]
xsengine: Fix no partition type specified, use DOS as default
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Jean-Christophe PLAGNIOL-VILLARD [Thu, 18 Oct 2007 22:24:59 +0000 (00:24 +0200)]
lubbock: Fix no partition type specified, use DOS as default
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Wolfgang Denk [Tue, 23 Oct 2007 14:50:03 +0000 (16:50 +0200)]
Coding style: keep lists sorted; update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
Jean-Christophe PLAGNIOL-VILLARD [Thu, 18 Oct 2007 22:09:05 +0000 (00:09 +0200)]
Fix missing drivers makefile entries ds1722.c mw_eeprom.c
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Jean-Christophe PLAGNIOL-VILLARD [Thu, 18 Oct 2007 22:07:39 +0000 (00:07 +0200)]
Fix warning differ in signedness in board/innokom/innokom.c
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Marcel Ziswiler [Thu, 18 Oct 2007 22:25:33 +0000 (00:25 +0200)]
fix pxa255_idp board
The pxa255_idp being an old unmaintained board showed several issues:
1. CONFIG_INIT_CRITICAL was still defined.
2. Neither CONFIG_MAC_PARTITION nor CONFIG_DOS_PARTITION was defined.
3. Symbol flash_addr was undeclared.
4. The boards lowlevel_init function was still called memsetup.
5. The TEXT_BASE was still 0xa3000000 rather than 0xa3080000.
6. Using -march=armv5 instead of -march=armv5te resulted in lots of
'target CPU does not support interworking' warnings on recent compilers.
7. The PXA's serial driver redefined FFUART, BTUART and STUART used as
indexes rather than the register definitions from the pxa-regs header
file. Renamed them to FFUART_INDEX, BTUART_INDEX and STUART_INDEX to
avoid any ambiguities.
8. There were several redefinition warnings concerning ICMR, OSMR3,
OSCR, OWER, OIER, RCSR and CCCR in the PXA's assembly start file.
9. The board configuration file was rather outdated.
10. The part header file defined the vendor, product and revision arrays
as unsigned chars instead of just chars in the block_dev_desc_t
structure.
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Rune Torgersen [Wed, 17 Oct 2007 16:56:31 +0000 (11:56 -0500)]
Make MPC8266ADS command selection more robust
Fix MPC8266 command line definition so it won't break when new commands
are added to u-boot.
Signed-off-by Rune Torgersen <runet@innovsys.com>
Bartlomiej Sieka [Tue, 23 Oct 2007 11:14:10 +0000 (13:14 +0200)]
Motion-PRO: Update configuration to accomodate next generation board.
New board has faster oscillator and a different Flash chip. This affects:
- CFG_MPC5XXX_CLKIN
- SDRAM timings
- Flash CS configuration (timings)
- Flash sector size, and thus MTD partition layout
- malloc() arena size (due to bigger Flash sectors)
- smaller memory test range (due to bigger malloc() arena)
This patch also enables more extensive memory testing via "mtest".
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Bartlomiej Sieka [Tue, 23 Oct 2007 09:36:07 +0000 (11:36 +0200)]
Motion-PRO: Add setting of SDelay reg. to SDRAM controller configuration.
Per AN3221 (MPC5200B SDRAM Initialization and Configuration), the SDelay
register must be written a value of 0x00000004 as the first step of the
SDRAM contorller configuration.
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Stefan Roese [Tue, 23 Oct 2007 08:17:42 +0000 (10:17 +0200)]
ppc4xx: lwmon5: Some further GPIO config changes
Signed-off-by: Stefan Roese <sr@denx.de>
Wolfgang Denk [Sat, 20 Oct 2007 23:01:17 +0000 (01:01 +0200)]
Minor coding style cleanup; update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
Vlad Lungu [Thu, 4 Oct 2007 17:47:10 +0000 (20:47 +0300)]
Fix NE2000 driver:
Fixed typo in ne2000.h, thinko re n2k_inb() usage, don't try
to do anything in eth_stop() if eth_init() was not called.
Simplified RX path in order to avoid timeouts on really really
fast NE2000 cards (read: qemu with internal tftp), NetLoop() is
clever enough to cope with 1 packet per eth_rx().
Signed-off-by: Vlad Lungu <vlad@comsys.ro>
Wolfgang Denk [Sat, 20 Oct 2007 22:29:32 +0000 (00:29 +0200)]
Merge branch 'master' of git://denx.de/git/u-boot-tq-group
Wolfgang Denk [Sat, 20 Oct 2007 22:10:34 +0000 (00:10 +0200)]
Merge branch 'master' of /home/git/u-boot/
Detlev Zundel [Fri, 19 Oct 2007 14:47:26 +0000 (16:47 +0200)]
Fix two typos.
Signed-off-by: Detlev Zundel <dzu@denx.de>
Wolfgang Denk [Thu, 18 Oct 2007 20:02:35 +0000 (22:02 +0200)]
Merge branch 'master' of git://denx.de/git/u-boot-ppc4xx
Tony Li [Thu, 18 Oct 2007 09:47:19 +0000 (17:47 +0800)]
mpc83xx: Add configure entry for MPC83xx ATM support
Add MPC8360EMDS_ATM_config and MPC832XEMDS_ATM_config into
Makfile and MAKEALL
Signed-off-by: Tony Li <tony.li@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Tony Li [Thu, 18 Oct 2007 09:44:38 +0000 (17:44 +0800)]
mpc83xx: pq-mds-pib.c typo error
Correct to val8 from val.
Signed-off-by: Tony Li <tony.li@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Kim Phillips [Thu, 18 Oct 2007 15:02:16 +0000 (10:02 -0500)]
Merge git://www.denx.de/git/u-boot
Stefan Roese [Wed, 17 Oct 2007 13:40:19 +0000 (15:40 +0200)]
ppc4xx: Add 667/133 (CPU/PLB) frequency setup to Sequoia bootstrap command
Signed-off-by: Stefan Roese <sr@denx.de>
runet@innovsys.com [Tue, 16 Oct 2007 19:50:40 +0000 (14:50 -0500)]
Make MPC8266ADS board compile again.
Signed-off-by: Runet Torgersen <runet@innovsys.com>
Wolfgang Denk [Tue, 16 Oct 2007 14:45:20 +0000 (16:45 +0200)]
Merge branch 'master' of git+ssh://gemini_vpn/home/wd/git/u-boot/master
Jon Loeliger [Mon, 27 Aug 2007 17:41:03 +0000 (12:41 -0500)]
86xx: Allow for fewer DDR slots per memory controller.
As a direct correlation exists between DDR DIMM slots
and SPD EEPROM addresses used to configure them, use
the individually defined SPD_EEPROM_ADDRESS* values to
determine if a DDR DIMM slot should have its SPD
configuration read or not.
Effectively, this now allows for 1 or 2 DIMM slots
per memory controller.
Signed-off-by: Jon Loeliger <jdl@freescale.com>