Tom Rini [Fri, 13 Nov 2015 15:04:34 +0000 (10:04 -0500)]
Merge branch 'series1_v2' of git://git.denx.de/u-boot-sparc
Tom Rini [Fri, 13 Nov 2015 15:02:43 +0000 (10:02 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-x86
Bin Meng [Fri, 13 Nov 2015 10:46:26 +0000 (02:46 -0800)]
sf: Fix NULL pointer exception for flashes without lock methods
commit
c3c016c "sf: Add SPI NOR protection mechanism" introduced
flash_lock()/flash_unlock()/flash_is_locked() methods for SPI flash,
but not every flash driver supplies these. We should test these
methods against NULL before actually calling them.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Bin Meng [Fri, 6 Nov 2015 10:04:55 +0000 (02:04 -0800)]
x86: Remove CONFIG_SYS_EARLY_PCI_INIT
CONFIG_SYS_EARLY_PCI_INIT is not needed any more since with driver
model, PCI enumeration is automatically triggered.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 6 Nov 2015 10:04:54 +0000 (02:04 -0800)]
x86: Remove legacy pci codes
Now that we have converted all x86 boards to use driver model pci,
remove these legacy pci codes.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 6 Nov 2015 10:04:53 +0000 (02:04 -0800)]
x86: crownbay: Remove unused PCI region address macros
These are leftover when converted to use driver model pci.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 6 Nov 2015 10:04:52 +0000 (02:04 -0800)]
x86: qemu: Convert to use driver model eth
Move to driver model for ETH (e1000) on QEMU.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 6 Nov 2015 10:04:51 +0000 (02:04 -0800)]
x86: qemu: Convert to use driver model usb
Move to driver model for USB on QEMU.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 6 Nov 2015 10:04:50 +0000 (02:04 -0800)]
x86: qemu: Convert to use driver model pci
Move to driver model for pci on QEMU.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 6 Nov 2015 10:04:49 +0000 (02:04 -0800)]
x86: qemu: Move chipset-specific codes from pci.c to qemu.c
Move chipset-specific codes such as PAM init, PCIe ECAM and MP table
from pci.c to qemu.c, to prepare for DM PCI conversion.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 6 Nov 2015 10:04:48 +0000 (02:04 -0800)]
x86: qemu: Remove call to vgabios execution
The call to pci_run_vga_bios() is not needed as this is handled
in the vesa_fb driver.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 23 Oct 2015 02:13:33 +0000 (19:13 -0700)]
x86: Move timer_init() call a bit earlier
Currently timer_init() is called in board_r.c which is quite late.
Some vgabios execution requires we set up the i8254 timer correctly,
but video initialization comes before timer_init(). Move the call
to board_f.c.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 23 Oct 2015 02:13:32 +0000 (19:13 -0700)]
x86: queensbay: Really disable IGD
According to Atom E6xx datasheet, setting VGA Disable (bit17)
of Graphics Controller register (offset 0x50) prevents IGD
(D2:F0) from reporting itself as a VGA display controller
class in the PCI configuration space, and should also prevent
it from responding to VGA legacy memory range and I/O addresses.
However test result shows that with just VGA Disable bit set and
a PCIe graphics card connected to one of the PCIe controllers on
the E6xx, accessing the VGA legacy space still causes system hang.
After a number of attempts, it turns out besides VGA Disable bit,
the SDVO (D3:F0) device should be disabled to make it work.
To simplify, use the Function Disable register (offset 0xc4)
to disable both IGD (D2:F0) and SDVO (D3:F0) devices. Now these
two devices will be completely disabled (invisible in the PCI
configuration space) unless a system reset is performed.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 23 Oct 2015 02:13:31 +0000 (19:13 -0700)]
x86: Move CONFIG_8259_PIC and CONFIG_8254_TIMER to Kconfig
Add Kconfig options for 8259 and 8254.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 23 Oct 2015 02:13:30 +0000 (19:13 -0700)]
x86: Rename pcat_ to i8254 and i8259 accordingly
Rename pcat_timer.c to i8254.c and pcat_interrupts.c to i8259.c,
to match their header file names (i8254.h and i8259.h).
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 23 Oct 2015 02:13:29 +0000 (19:13 -0700)]
x86: Initialize i8254 timer counter 1
Initialize counter 1, used to refresh request signal. This is
required for legacy purpose as some codes like vgabios utilizes
counter 1 to provide delay functionality.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 23 Oct 2015 02:13:28 +0000 (19:13 -0700)]
x86: Fix cosmetic issues in the i8254 and i8259 codes
This cleans up i8254 and i8259 codes to fix several cosmetic
issues, like coding convention and some comments improvement.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 23 Oct 2015 02:13:27 +0000 (19:13 -0700)]
x86: Remove dead codes wrapped by PARANOID_IRQ_TRIGGERS
PARANOID_IRQ_TRIGGERS is not referenced anywhere in U-Boot.
Remove these dead codes wrapped by it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 23 Oct 2015 02:13:26 +0000 (19:13 -0700)]
x86: Rename CONFIG_SYS_NUM_IRQS to SYS_NUM_IRQS
CONFIG_SYS_NUM_IRQS is actually not something we can configure,
but an architecture defined number of ISA IRQs. Move it from
x86-common.h to asm/interrupt.h and rename it to SYS_NUM_IRQS.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Francois Retief [Thu, 29 Oct 2015 10:55:34 +0000 (12:55 +0200)]
sparc: leon3: Add debug_uart support to LEON3 serial driver.
Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
Daniel Hellstrom [Mon, 20 Sep 2010 08:00:49 +0000 (10:00 +0200)]
sparc: ambapp: Removed warning and unnecessary printout.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
Daniel Hellstrom [Thu, 21 Jan 2010 15:09:37 +0000 (16:09 +0100)]
sparc: leon3: Moved GRLIB core header files to common include/grlib directory
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
Daniel Hellstrom [Mon, 25 Jan 2010 08:56:08 +0000 (09:56 +0100)]
sparc: leon3: Added memory controller initialization using new AMBA PnP routines.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
Francois Retief [Mon, 27 Oct 2014 11:39:03 +0000 (13:39 +0200)]
sparc: Kconfig: Move the CMD_AMBAPP command to Kconfig
Add an initr function in the board_r.c file for the AMBA Plug&Play
command. Add a Kconfig entry for the ambapp command and remove all
CONFIG_CMD_AMBAPP defines from the board configuration headers.
Add a Kconfig entry to display the AMBA Plug&Play information
on startup. This option is off by default. Remove relevent define
from board configuration headers.
Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
Daniel Hellstrom [Mon, 25 Jan 2010 08:54:51 +0000 (09:54 +0100)]
sparc: leon3: Reimplemented AMBA Plug&Play scanning routines.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
Francois Retief [Wed, 28 Oct 2015 07:06:41 +0000 (09:06 +0200)]
sparc: Update startup code to take PIC mode into account
Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
Francois Retief [Tue, 4 Nov 2014 14:51:44 +0000 (16:51 +0200)]
sparc: Update GRSIM board with memory settings for TSIM eval
Update the GRSIM board with the memory settings for the evaluation
version of TSIM. This free version of TSIM is used for testing.
Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
Francois Retief [Wed, 28 Oct 2015 08:35:12 +0000 (10:35 +0200)]
sparc: Update LEON serial drivers to use readl/writel macros
Update the LEON2/3 serial driver to make use of the readl and writel
macros as well as the WATCHDOG_RESET() macro.
Add readl/writel and friends to the asm/io.h file.
Introduce the gd->arch.uart variable to store register address.
Lastly, remove baudrate scaler macro variables from board config. It
is now calculated in the serial driver using the global data variable.
Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
Francois Retief [Mon, 26 Oct 2015 10:27:15 +0000 (12:27 +0200)]
sparc: Add -mcpu= compiler flags for LEON2/LEON3
Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
Francois Retief [Mon, 26 Oct 2015 10:32:25 +0000 (12:32 +0200)]
sparc: Update the maintainer for SPARC architecture
Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
Francois Retief [Sat, 24 Oct 2015 21:14:55 +0000 (23:14 +0200)]
sparc: Fix broken files during license changes
Fixes broken search and replaced license changes in
files cpu/leon3/start.S and include/asm/winmacro.h
from commit
1a4596601fd395f3afb8f82f3f840c5e00bdd57a
Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
Series-to: u-boot
Series-cc: Tom Rini <trini@konsulko.com>
Series-version: 2
Cover-letter:
sparc: Updates to SPARC architecture in preperation for generic board
This patch series is a backlog of preparation work for upcomming
generic board changes.
I first want to get these reviewed and submitted to mainline before
sending out more patches.
END
Fabio Estevam [Thu, 12 Nov 2015 14:30:19 +0000 (12:30 -0200)]
board_init: Change the logic to setup malloc_base
Prior to commit
5ba534d247d418 ("arm: Switch 32-bit ARM to using generic
global_data setup") we used to have assembly code that configured the
malloc_base address.
Since this commit we use the board_init_f_mem() function in C to setup
malloc_base address.
In board_init_f_mem() there was a deliberate choice to support only
early malloc() or full malloc() in SPL, but not both.
Adapt this logic to allow both to be used, one after the other, in SPL.
This issue has been observed in a Congatec board, where we need to
retrieve the manufacturing information from the SPI NOR (the SPI API
calls malloc) prior to configuring the DRAM. In this case as malloc_base
was not configured we always see malloc to fail.
With this change we are able to use malloc in SPL prior to DRAM gets
initialized.
Also update the CONFIG_SYS_SPL_MALLOC_START entry in the README file.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Thu, 12 Nov 2015 20:59:35 +0000 (15:59 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-tegra
Vignesh R [Thu, 22 Oct 2015 06:00:53 +0000 (11:30 +0530)]
am43xx_evm: Add DFU support for qspi flash
This adds support to update firmware on qspi flash present on
am437x-sk-evm and am43xx-epos-evm via DFU.
On device:
=> setenv dfu_alt_info ${dfu_alt_info_qspi}
=> dfu 0 sf 0:0
On host:
$ sudo dfu-util -l
$ sudo dfu-util -D u-boot.bin -a u-boot.bin
Signed-off-by: Vignesh R <vigneshr@ti.com>
Michal Simek [Mon, 9 Nov 2015 09:45:07 +0000 (10:45 +0100)]
spl: Add support for CONFIG_OF_EMBED=y
CONFIG_OF_EMBED=y is the option which is here only for testing purpose
and shouldn't be enabled by default as is describe at:
"dts: Add a comment about CONFIG_OF_EMBED being for local use"
(sha1:
3d3f60cb7a6bb6c338e00a9769fa918a8536096c)
But still enabling this option locally shouldn't end up with compilation
error when you build SPL. This patch fix it.
Compilation error:
lib/built-in.o: In function `fdtdec_setup':
/mnt/disk/u-boot/lib/fdtdec.c:1246: undefined reference to
`__dtb_dt_begin'
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reported-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Guillaume REMBERT [Sun, 8 Nov 2015 14:37:15 +0000 (14:37 +0000)]
openrisc: updating build tools naming convention
Dear u-boot community,
I just made a small change on the openrisc-generic platform
configuration to take in account the new naming convention (or1k instead
of or32, so the build process gets fine).
Could you take care to review and approve the following patch, please?
Kind regards,
Andy Fleming [Wed, 4 Nov 2015 21:55:27 +0000 (15:55 -0600)]
Fix trini email in the get_maintainer.pl script
Looks like one spot got missed. Probably due to the backslash.
Signed-off-by: Andy Fleming <afleming@gmail.com>
Vincent BENOIT [Mon, 2 Nov 2015 17:50:23 +0000 (18:50 +0100)]
pengwyn: nand and ethernet fixes
-> Add National instrument ethernet transceiver configuration used (DP83848)
-> Change cpsw slave phy address
-> modify nand configuration to use the correct ECC and correct nand features
Fabio Estevam [Sun, 1 Nov 2015 15:18:27 +0000 (13:18 -0200)]
block: ahci: Remove dead code
CONFIG_AHCI_SETFEATURES_XFER is not selected by any user, so delete
the dead code.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Peng Fan [Fri, 30 Oct 2015 09:30:02 +0000 (17:30 +0800)]
common: Simplify get_clocks() #ifdef
get_clocks is wrapped by CONFIG_FSL_CLK and CONFIG_M68K in seperate
piece code. They can be merged into one snippet.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Alexey Brodkin <abrodkin@synopsys.com>
Cc: "angelo@sysam.it" <angelo@sysam.it>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: "Andreas Bießmann" <andreas.devel@googlemail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Matwey V. Kornilov [Thu, 29 Oct 2015 18:54:15 +0000 (21:54 +0300)]
configs: Use config_distro_defaults.h in ti_armv7_common.h
CONFIG_BOOTDELAY is defined in config_distro_defaults.h
Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
[trini: Drop omap3_logic.h settings which were a warning and no longer
correct usage].
Signed-off-by: Tom Rini <trini@konsulko.com>
Dirk Eibach [Thu, 29 Oct 2015 12:51:27 +0000 (13:51 +0100)]
i2c: Fix pca953x endianess issue
By reading 2 consecutive bytes from i2c to an u16 value
we have an endianess issue.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Dirk Eibach [Wed, 28 Oct 2015 10:46:39 +0000 (11:46 +0100)]
i2c: soft_i2c: Fix bus indizes
Since busses are sorted in alphabetical order, introducing more
than nine busses led to unexpected behaviour.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Dirk Eibach [Wed, 28 Oct 2015 10:46:38 +0000 (11:46 +0100)]
board: gdsys: Enable osd on output only
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Dirk Eibach [Wed, 28 Oct 2015 10:46:37 +0000 (11:46 +0100)]
board: gdsys: Add osdsize command
osdsize adjusts the gdsys IHS osd dimensions in characters.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Dirk Eibach [Wed, 28 Oct 2015 10:46:36 +0000 (11:46 +0100)]
hrcon: Add fan controllers
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Dirk Eibach [Wed, 28 Oct 2015 10:46:35 +0000 (11:46 +0100)]
hrcon: Add support for the DH variant
hrcon DH(dual head) has two video outputs per FPGA.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Dirk Eibach [Wed, 28 Oct 2015 10:46:34 +0000 (11:46 +0100)]
hrcon: Fix videoboard i2c setup
- i2c addresses for the videoboard port expanders were
wrong.
- the fpga reset signal was not initialized.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Dirk Eibach [Wed, 28 Oct 2015 10:46:33 +0000 (11:46 +0100)]
hrcon: Use generic ioep-fpga support
The strider platform moved some generic code into ioep-fpga.c.
Make use of that on hrcon platform.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Dirk Eibach [Wed, 28 Oct 2015 10:46:32 +0000 (11:46 +0100)]
mpc83xx: Add strider board
The gdsys strider board is based on a Freescale MPC8308 SOC.
It boots from NOR-Flash, kernel and rootfs are stored on
SD-Card.
On board peripherals include:
- 1x 10/100 Mbit/s Ethernet (optional)
- Lattice ECP3 FPGA connected via eLBC
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
[trini: Drop setting CONFIG_SYS_GENERIC_BOARD, this is always true now]
Signed-off-by: Tom Rini <trini@konsulko.com>
Dirk Eibach [Wed, 28 Oct 2015 10:46:31 +0000 (11:46 +0100)]
hrcon: Remove CH7301 configuration
hrcon has no CH7301 DVI-transmitter.
Probably not removed when copying from iocon.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Reinhard Pfau [Wed, 28 Oct 2015 10:46:30 +0000 (11:46 +0100)]
iocon: reset FPGAs in last_stage_init()
- Reset FPGAs in last_stage_init()
Signed-off-by: Reinhard Pfau <pfau@gdsys.de>
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Dirk Eibach [Wed, 28 Oct 2015 10:46:29 +0000 (11:46 +0100)]
controlcenterd: Disable sideband clocks
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Dirk Eibach [Wed, 28 Oct 2015 10:46:28 +0000 (11:46 +0100)]
dlvision-10g: Support displayport
Support dlvision-10g hardware with displayport output.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Dirk Eibach [Wed, 28 Oct 2015 10:46:27 +0000 (11:46 +0100)]
board: gdsys: Consider DP501 limits on link training
DP501 only supports DP 1.1a.
Limit settings for link bandwidth and lane count to
values allowed by DP 1.1a.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Dirk Eibach [Wed, 28 Oct 2015 10:46:26 +0000 (11:46 +0100)]
board: gdsys: Increase DP501 I2C retry interval
With Club 3D dual link adapter there are AUX-channel timeouts
when EDID is read. Increasing retry interval time to max (400us)
fixes this.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Reviewed-by: Heiko Schocher <hs@denx.de>
Dirk Eibach [Wed, 28 Oct 2015 10:46:25 +0000 (11:46 +0100)]
board: gdsys: Configure DP501 SPDIF input
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Reviewed-by: Heiko Schocher <hs@denx.de>
Dirk Eibach [Wed, 28 Oct 2015 10:46:24 +0000 (11:46 +0100)]
i2c: ihs_i2c: Fix hold_bus control
Bus has to be held for repeated start regardless of
read/write access.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Acked-by: Heiko Schocher <hs@denx.de>
Dirk Eibach [Wed, 28 Oct 2015 10:46:23 +0000 (11:46 +0100)]
i2c: ihs_i2c: Use macro bestpractices
Reinhard Pfau complained that macros in ihs_i2c do not follow best practices.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Acked-by: Heiko Schocher <hs@denx.de>
Dirk Eibach [Wed, 28 Oct 2015 10:46:22 +0000 (11:46 +0100)]
i2c: ihs_i2c: Dual channel support
Support two i2c masters per FPGA.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Acked-by: Heiko Schocher <hs@denx.de>
Prabhakar Kushwaha [Sun, 25 Oct 2015 07:48:54 +0000 (13:18 +0530)]
driver: net: Fix pointer conversion warnings for xilinx_zynqmp_ep
Fix below warnings happening for xilinx_zynqmp_ep_defconfig
drivers/net/zynq_gem.c: In function ‘zynq_gem_init’:
drivers/net/zynq_gem.c:330:7: warning: cast from pointer to integer
of different size [-Wpointer-to-int-cast]
((u32)(priv->rxbuffers) +
^
In file included from drivers/net/zynq_gem.c:19:0:
drivers/net/zynq_gem.c:336:10: warning: cast from pointer to integer
of different size [-Wpointer-to-int-cast]
writel((u32)priv->rx_bd, ®s->rxqbase);
^
./arch/arm/include/asm/io.h:146:34: note: in definition of macro ‘writel’
#define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; })
^
drivers/net/zynq_gem.c: In function ‘zynq_gem_send’:
drivers/net/zynq_gem.c:399:9: warning: cast from pointer to integer
of different size [-Wpointer-to-int-cast]
writel((u32)priv->tx_bd, ®s->txqbase);
^
./arch/arm/include/asm/io.h:146:34: note: in definition of macro ‘writel’
#define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; })
^
drivers/net/zynq_gem.c:404:22: warning: cast from pointer to integer
of different size [-Wpointer-to-int-cast]
priv->tx_bd->addr = (u32)ptr;
^
drivers/net/zynq_gem.c:409:9: warning: cast from pointer to integer
of different size [-Wpointer-to-int-cast]
addr = (u32) ptr;
^
drivers/net/zynq_gem.c:414:9: warning: cast from pointer to integer
of different size [-Wpointer-to-int-cast]
addr = (u32)priv->rxbuffers;
^
drivers/net/zynq_gem.c: In function ‘zynq_gem_recv’:
drivers/net/zynq_gem.c:454:31: warning: cast to pointer from integer
of different size [-Wint-to-pointer-cast]
net_process_received_packet((u8 *)addr, frame_len);
^
drivers/net/zynq_gem.c: In function ‘zynq_gem_initialize’:
drivers/net/zynq_gem.c:533:35: warning: cast from pointer to integer
of different size [-Wpointer-to-int-cast]
priv->rx_bd = (struct emac_bd *)((u32)bd_space + BD_SEPRN_SPACE);
^
drivers/net/zynq_gem.c:533:16: warning: cast to pointer from integer
of different size [-Wint-to-pointer-cast]
priv->rx_bd = (struct emac_bd *)((u32)bd_space + BD_SEPRN_SPACE);
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Prabhakar Kushwaha [Sun, 25 Oct 2015 07:48:41 +0000 (13:18 +0530)]
driver: usb: Fix pointer conversion warnings for hikey
Fix below compilation warings happening for hikey_defconfig
drivers/usb/eth/smsc95xx.c:698:56: warning: cast from pointer to integer
of different size [-Wpointer-to-int-cast]
debug("** %s(), len %d, buf %#x\n", __func__, length, (int)msg);
^
include/common.h:109:26: note: in definition of macro ‘debug_cond’
printf(pr_fmt(fmt), ##args); \
^
drivers/usb/eth/smsc95xx.c:698:2: note: in expansion of macro ‘debug’
debug("** %s(), len %d, buf %#x\n", __func__, length, (int)msg);
^
drivers/usb/eth/smsc95xx.c:718:2: warning: format ‘%u’ expects argument of
type ‘unsigned int’, but argument 2 has type ‘long unsigned int’ [-Wformat=]
debug("Tx: len = %u, actual = %u, err = %d\n",
^
drivers/usb/eth/smsc95xx.c: In function ‘smsc95xx_recv’:
drivers/usb/eth/smsc95xx.c:802:19: warning: cast from pointer to integer
of different size [-Wpointer-to-int-cast]
cur_buf_align = (int)buf_ptr - (int)recv_buf;
^
drivers/usb/eth/smsc95xx.c:802:34: warning: cast from pointer to integer
of different size [-Wpointer-to-int-cast]
cur_buf_align = (int)buf_ptr - (int)recv_buf;
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Prabhakar Kushwaha [Sun, 25 Oct 2015 07:48:25 +0000 (13:18 +0530)]
driver: dwmmc: Fix pointer conversion warnings for hikey
Fix below compilation warings happening for hikey_defconfig
drivers/mmc/dw_mmc.c: In function ‘dwmci_set_idma_desc’:
drivers/mmc/dw_mmc.c:43:20: warning: cast from pointer to integer
of different size [-Wpointer-to-int-cast]
desc->next_addr = (unsigned int)desc + sizeof(struct dwmci_idmac);
^
drivers/mmc/dw_mmc.c: In function ‘dwmci_prepare_data’:
drivers/mmc/dw_mmc.c:61:35: warning: cast from pointer to integer
of different size [-Wpointer-to-int-cast]
dwmci_writel(host, DWMCI_DBADDR, (unsigned int)cur_idmac);
^
drivers/mmc/dw_mmc.c:73:9: warning: cast from pointer to integer
of different size [-Wpointer-to-int-cast]
(u32)bounce_buffer + (i * PAGE_SIZE));
^
CC drivers/mmc/hi6220_dw_mmc.o
drivers/mmc/hi6220_dw_mmc.c: In function ‘hi6220_dwmci_add_port’:
drivers/mmc/hi6220_dw_mmc.c:51:17: warning: cast to pointer from integer
of different size [-Wint-to-pointer-cast]
host->ioaddr = (void *)regbase;
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Prabhakar Kushwaha [Sun, 25 Oct 2015 07:48:12 +0000 (13:18 +0530)]
driver: gpio: hikey: Fix pointer conversion warnings for hikey
Fix below compilation warnings-
drivers/gpio/hi6220_gpio.c: In function ‘hi6220_gpio_probe’:
drivers/gpio/hi6220_gpio.c:82:15: warning: cast to pointer from integer
of different size [-Wint-to-pointer-cast]
bank->base = (u8 *)plat->base;
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Siarhei Siamashka [Wed, 28 Oct 2015 04:24:16 +0000 (06:24 +0200)]
mmc: Use lldiv() for 64-bit division in write_raw_image()
This fixes compilation problems when using a hardfloat toolchain on
ARM, which manifest themselves as "libgcc.a(_udivmoddi4.o) uses
VFP register arguments, u-boot does not".
These problems have been reported in the U-Boot mailing list:
http://lists.denx.de/pipermail/u-boot/2015-October/230314.html
http://lists.denx.de/pipermail/u-boot/2015-October/231908.html
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Patrick Delaunay [Tue, 27 Oct 2015 10:00:28 +0000 (11:00 +0100)]
uuid: add selection by string for known partition type GUID
short strings can be used in type parameter of gpt command
to replace the guid string for the types known by u-boot
partitions = name=boot,size=0x6bc00,type=data; \
name=root,size=0x7538ba00,type=linux;
gpt write mmc 0 $partitions
and they are also used to display the type of partition
in "part list" command
Partition Map for MMC device 0 -- Partition Type: EFI
Part Start LBA End LBA Name
Attributes
Type GUID
Partition GUID
1 0x00000022 0x0000037f "boot"
attrs: 0x0000000000000000
type:
ebd0a0a2-b9e5-4433-87c0-
68b6b72699c7
type: data
guid:
d117f98e-6f2c-d04b-a5b2-
331a19f91cb2
2 0x00000380 0x003a9fdc "root"
attrs: 0x0000000000000000
type:
0fc63daf-8483-4772-8e79-
3d69d8477de4
type: linux
guid:
25718777-d0ad-7443-9e60-
02cb591c9737
Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
Patrick Delaunay [Tue, 27 Oct 2015 10:00:27 +0000 (11:00 +0100)]
gpt: add optional parameter type in gpt command
code under flag CONFIG_PARTITION_TYPE_GUID
add parameter "type" to select partition type guid
example of use with gpt command :
partitions = uuid_disk=${uuid_gpt_disk}; \
name=boot,size=0x6bc00,uuid=${uuid_gpt_boot}; \
name=root,size=0x7538ba00,uuid=${uuid_gpt_root}, \
type=
0fc63daf-8483-4772-8e79-
3d69d8477de4;
gpt write mmc 0 $partitions
Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
Patrick Delaunay [Tue, 27 Oct 2015 10:00:26 +0000 (11:00 +0100)]
part:efi: add GUID for linux file system data
Previously, Linux used the same GUID for the data partitions as Windows
(Basic data partition:
EBD0A0A2-B9E5-4433-87C0-
68B6B72699C7).
This created problems when dual-booting Linux and Windows in UEFI-GPT
Setup, so a new GUID (Linux filesystem data:
0FC63DAF-8483-4772-8E79-
3D69D8477DE4) was defined jointly by GPT fdisk
and GNU Parted developers.
Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
Cheng Gu [Fri, 23 Oct 2015 21:48:01 +0000 (21:48 +0000)]
pci: fix checking PCI_REGION_MEM in pci_hose_phys_to_bus()
When converting between PCI bus and phys addresses, a two pass search
was introduced with preference to non-PCI_REGION_SYS_MEMORY regions.
See commit
2d43e873a29ca4959ba6a30fc7fb396d3fd0dccf.
However, since PCI_REGION_MEM is defined as 0, the if statement was
always asserted true: ((flags & PCI_REGION_MEM) == PCI_REGION_MEM)
This patch uses PCI_REGION_TYPE bit to check if the region is
PCI_REGION_MEM: ((flags & PCI_REGION_TYPE) == PCI_REGION_MEM)
Signed-off-by: Cheng Gu <chenggu@marvell.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tom Rini [Fri, 23 Oct 2015 13:37:47 +0000 (09:37 -0400)]
include/linux/mtd: Update copyright notices
Condense these updates down to SPDX tags too while doing this. This is
a port of
a1452a3771c4eb85bd779790b040efdc36f4274e from the Linux
Kernel.
Signed-off-by: Tom Rini <trini@konsulko.com>
robertcnelson@gmail.com [Wed, 21 Oct 2015 14:25:55 +0000 (09:25 -0500)]
board/ti/am335x: beaglebone stop muxing i2c1_pin_mux
On the BeagleBone these i2c1 pins are routed to the expanasion header, where
they can be defined as either pr1_usart0_Xxd/pwm0/spi0/i2c1, dont assume i2c1
Fixes: https://e2e.ti.com/support/arm/sitara_arm/f/791/p/313894/
1387696
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
Reported-by: Matthijs van Duin <matthijsvanduin@gmail.com>
CC: Tom Rini <trini@konsulko.com>
Maxime Ripard [Thu, 15 Oct 2015 12:34:22 +0000 (14:34 +0200)]
sunxi: cubietruck: Enable the USB OTG controller
The Cubietruck has a mini-USB connector that can be used to power up the
board and as an OTG connector.
Since we have already some USB host-only ports right beside this one,
enable it in gadget mode
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Maxime Ripard [Thu, 15 Oct 2015 12:34:21 +0000 (14:34 +0200)]
sunxi: A13-Olinuxino: Enable the USB OTG controller
The A13-Olinuxino has a mini-USB connector that can be used to power up
the board and as an OTG connector.
Since we have already some USB host-only ports right beside this one,
enable it in gadget mode
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Maxime Ripard [Thu, 15 Oct 2015 12:34:19 +0000 (14:34 +0200)]
sparse: Rename the file and header
The Android sparse image format is currently supported through a file
called aboot, which isn't really such a great name, since the sparse image
format is only used for transferring data with fastboot.
Rename the file and header to a file called "sparse", which also makes it
consistent with the header defining the image structures.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Maxime Ripard [Thu, 15 Oct 2015 12:34:18 +0000 (14:34 +0200)]
fastboot: nand: Add pre erase and write hooks
Some devices might need to do some per-partition initialization
(ECC/Randomizer settings change for example) before actually accessing it.
Add some hooks before the write and erase operations to let the boards
define what they need to do if needed.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Maxime Ripard [Thu, 15 Oct 2015 12:34:17 +0000 (14:34 +0200)]
fastboot: Implement NAND backend
So far the fastboot code was only supporting MMC-backed devices for its
flashing operations (flash and erase).
Add a storage backend for NAND-backed devices.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Maxime Ripard [Thu, 15 Oct 2015 12:34:16 +0000 (14:34 +0200)]
sparse: Implement several chunks flashing
The fastboot client will split the sparse images into several chunks if the
image that it tries to flash is bigger than what the device can handle.
In such a case, the bootloader is supposed to retain the last offset to
which it wrote to, so that it can resume the writes at the right offset
when flashing the next chunk.
Retain the last offset we used, and use the session ID to know if we need
it or not.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Maxime Ripard [Thu, 15 Oct 2015 12:34:15 +0000 (14:34 +0200)]
fastboot: Implement flashing session counter
The fastboot flash command that writes an image to a partition works in
several steps:
1 - Retrieve the maximum size the device can download through the
"max-download-size" variable
2 - Retrieve the partition type through the "partition-type:%s" variable,
that indicates whether or not the partition needs to be erased (even
though the fastboot client has minimal support for that)
3a - If the image is smaller than what the device can handle, send the image
and flash it.
3b - If the image is larger than what the device can handle, create a
sparse image, and split it in several chunks that would fit. Send the
chunk, flash it, repeat until we have no more data to send.
However, in the 3b case, the subsequent transfers have no particular
identifiers, the protocol just assumes that you would resume the writes
where you left it.
While doing so works well, it also means that flashing two subsequent
images on the same partition (for example because the user made a mistake)
would not work withouth flashing another partition or rebooting the board,
which is not really intuitive.
Since we have always the same pattern, we can however maintain a counter
that will be reset every time the client will retrieve max-download-size,
and incremented after each buffer will be flashed, that will allow us to
tell whether we should simply resume the flashing where we were, or start
back at the beginning of the partition.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Maxime Ripard [Thu, 15 Oct 2015 12:34:14 +0000 (14:34 +0200)]
sparse: Implement storage abstraction
The current sparse image parser relies heavily on the MMC layer, and
doesn't allow any other kind of storage medium to be used.
Rework the parser to support any kind of storage medium, as long as there
is an implementation for it.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Maxime Ripard [Thu, 15 Oct 2015 12:34:13 +0000 (14:34 +0200)]
fastboot: Move fastboot response functions to fastboot core
The functions and a few define to generate a fastboot message to be sent
back to the host were so far duplicated among the users.
Move them all to a common place.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Maxime Ripard [Thu, 15 Oct 2015 12:34:12 +0000 (14:34 +0200)]
sparse: Simplify multiple logic
To check the alignment of the image blocks to the storage blocks, the
current code uses a convoluted syntax, while a simple mod also does the
work.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Maxime Ripard [Thu, 15 Oct 2015 12:34:11 +0000 (14:34 +0200)]
sparse: Refactor chunk parsing function
The chunk parsing code was duplicating a lot of code among the various
chunk types, while all of them could be covered by generic and simple
functions.
Refactor the current code to reuse as much code as possible and hopefully
make the chunk parsing loop more readable and concise.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Maxime Ripard [Thu, 15 Oct 2015 12:34:10 +0000 (14:34 +0200)]
sparse: Move main header parsing to a function of its own
The current sparse image format parser is quite tangled, with a lot of
code duplication.
Start refactoring it by moving the header parsing function to a function
of its own.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Maxime Ripard [Thu, 15 Oct 2015 12:34:09 +0000 (14:34 +0200)]
mtd: uboot: Add meaningful error message
The current error message in get_part if CONFIG_MTDPARTS is disabled is
"offset is not a number" which is confusing and doesn't help at all.
Change that for something that might give a hint on what's going on.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Hannes Petermaier [Tue, 29 Sep 2015 06:43:33 +0000 (08:43 +0200)]
board/BuR/kwb: use bootvx(...) (with bootline feature) instead go(...)
Since we don't have for sure a valid IP-setup during
board_late_init(...) because it maybe allready stored in environment or
not, we cannot form a proper vxWorks bootline at this place.
So we move to the way, forming the bootline just before
executing/launching vxWorks. To do this we use the bootvx command
instead go.
We only have to form the "othbootargs" environment variable, the rest is
done pretty good by the "bootvx" commannd.
Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Stephen Warren [Thu, 12 Nov 2015 15:58:22 +0000 (08:58 -0700)]
ARM: tegra: note that p2371-2180 is Jetson TX1
p2371-2180 is the engineering board name for the Jetson TX1 developer
kit. Update Kconfig description and help text to make this obvious to
everyone.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Tom Warren [Mon, 12 Oct 2015 21:50:54 +0000 (14:50 -0700)]
Tegra: T210: Add QSPI driver
This is the normal Tegra SPI driver modified to work with the
QSPI controller in Tegra210. It does not do 2x/4x transfers
or any other QSPI protocol.
Signed-off-by: Yen Lin <yelin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Alexandre Courbot [Mon, 19 Oct 2015 04:57:03 +0000 (13:57 +0900)]
ARM: tegra: rename GPU functions
Rename GPU functions to less generic names to avoid potential name
collisions.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Alexandre Courbot [Mon, 19 Oct 2015 04:57:02 +0000 (13:57 +0900)]
ARM: tegra: simplify GPU setup
Enable the GPU node in the system-wide ft_system_setup() hook instead of
the board-specific ft_board_hook(). This allows us to enable GPU per SoC
generation instead of per-board as we did initially.
Reported-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Alexandre Courbot [Mon, 19 Oct 2015 04:57:01 +0000 (13:57 +0900)]
ARM: tegra: remove vpr_configured() function
There is no justification for this function, especially in exported
form.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Fri, 23 Oct 2015 16:50:53 +0000 (10:50 -0600)]
ARM: tegra: error check Tegra210 XUSB padctl waits
Add code to detect timeouts when waiting for HW events such as PLL
lock done. Any errors are logged and trigger an error return code.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Fri, 23 Oct 2015 16:50:52 +0000 (10:50 -0600)]
ARM: tegra: add lane tables to Tegra210 XUSB padctl
Add the tables defining which pads and mux options exist in the Tegra210
XUSB padctl hardware.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Fri, 23 Oct 2015 16:50:51 +0000 (10:50 -0600)]
ARM: tegra: switch Tegra210 to common XUSB padctl
This change simply deletes code from the Tegra210 XUSB padctl driver that
is already present in the common XUSB padctl code. Since all the arrays
in tegra210_socdata are empty, this update may leave the Tegra210 XUSB
padctl driver non-functional at run-time. However, (a) this driver is not
used yet so no regression can be observed and (b) the next commit will
immediately fix this up.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Fri, 23 Oct 2015 16:50:50 +0000 (10:50 -0600)]
ARM: tegra: parameterize common XUSB code
There are some differences between the Tegra124 and Tegra210 XUSB padctl
code. So far, the common XUSB padctl code only supports Tegra124. Add
some parameters etc. so that it can work for both chips.
This also allows moving Tegra124's process_nodes() into the common file;
something that would have requires edits during the move if done in the
previous commit.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Fri, 23 Oct 2015 16:50:49 +0000 (10:50 -0600)]
ARM: tegra: create common XUSB padctl driver file
A fair amount of the XUSB padctl driver will be common between Tegra124
and Tegra210. To avoid cut/paste between the two chips, create a new
file that will contain the common code, and convert the Tegra124 code to
use it. This change doesn't move every last piece of code that can/will be
shared, but rather concentrates on moving code that can be moved with zero
changes, so there are no other diffs mixed in.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Fri, 23 Oct 2015 16:50:48 +0000 (10:50 -0600)]
ARM: tegra: clean up XUSB padctl error() calls
This file defines pr_fmt(), so the individual error() calls don't need to
include the prefix in their format strings. Doing so results in duplicate
text in any error messages. Remove the duplication.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Fri, 23 Oct 2015 16:50:47 +0000 (10:50 -0600)]
ARM: tegra: rename dummy XUSB padctl implementation
A future patch will soon move some of the XUSB padctl code into a common
file in arch/arm/mach-tegra. Rename the existing dummy XUSB padctl file
to avoid conflicting with that, or being confusing.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Mon, 5 Oct 2015 23:02:40 +0000 (17:02 -0600)]
ARM: tegra: enable PCI support of p2371-2180
p2371-2180 has two PCI ports; a regular x4 slot and a x1 M.2 slot. This
patch adds the relevant DT to enable the PCI controller and configure
the XUSB padctl pin muxing, and code to turn on the PCI power and enable
PCI features in U-Boot. I have only tested the x4 slot.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Mon, 5 Oct 2015 23:02:39 +0000 (17:02 -0600)]
ARM: tegra: add PCI to Tegra210 SoC DT
Tegra210's PCI controller is largely identical to Tegra124, and hence
shares the same binding. However, it has a unique compatible value due
to the existence of at least one new HW bug that would prevent any driver
for a previous HW version from operating correctly.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Mon, 5 Oct 2015 23:00:44 +0000 (17:00 -0600)]
pci: tegra: add/enable support for Tegra210
This needs a separate compatible value from Tegra124 since the new HW
version has bugs that would prevent a driver for previous HW versions
from operating at all.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>