Alison Wang [Fri, 7 Jul 2017 07:10:17 +0000 (15:10 +0800)]
dm: arm: ls1021a: Move to driver model for USB
This patch enables driver model for USB in defconfigs for LS1021A
platforms.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Hou Zhiqiang [Tue, 4 Jul 2017 03:35:43 +0000 (11:35 +0800)]
fsl-lsch2: csu: remove multiple calling function
Function enable_layerscape_ns_access() is alreayd called soc-wide.
Remove duplicated calling from individual boards.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[YS: Add commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
Hou Zhiqiang [Mon, 3 Jul 2017 10:37:11 +0000 (18:37 +0800)]
armv8/fsl-lsch2: correct the config description of DSPI clock divider
It is derived from Platform clock instead of Platform PLL frequency.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Santan Kumar [Thu, 15 Jun 2017 11:37:01 +0000 (17:07 +0530)]
board:ls2080ardb: Update execution of config_board_mux
Function config_board_mux() reads env variable 'hwconfig' which is
only available after relocation for QSPI boot. Move calling
config_board_mux() to misc_init_r().
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
[YS: Revise commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
Santan Kumar [Fri, 9 Jun 2017 06:18:05 +0000 (11:48 +0530)]
board/ls2080ardb: Disable SD-related GPIO programming
Smart voltage translator is removed from LS2080ARDB/LS2088ARDB
RevF boards. It is only used on LS2081ARDB. Programming GPIO
is only required for LS2081ARDB.
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
[YS: Revise commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
Qianyu Gong [Mon, 12 Jun 2017 09:14:52 +0000 (17:14 +0800)]
armv8: ls1046ardb: update core frequency to 1800MHZ
Update the default core frequency to 1800MHZ for best performance under
SD boot and eMMC boot.
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
York Sun [Tue, 8 Aug 2017 22:45:13 +0000 (15:45 -0700)]
driver: mmc: fsl_esdhc: Fix compiling warning
Commit
4483b7eb added variable vqmmc_dev but only uses it under
CONFIG_DM_REGULATOR. Add the same macro to variable declaration to
get rid of compiling warning.
Signed-off-by: York Sun <york.sun@nxp.com>
Thomas Petazzoni [Fri, 28 Jul 2017 21:46:38 +0000 (23:46 +0200)]
common/env_embedded.c: rename PPCENV/PPCTEXT macros
The environment has pretty much nothing to do with just "PPC", so
rename the macros to just __UBOOT_ENV_SECTION__ which is more
readable.
In addition, only a single macro is needed: the environment now goes
either to the default section (USE_HOSTCC is defined) or in the .text
section.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Thomas Petazzoni [Fri, 28 Jul 2017 21:46:37 +0000 (23:46 +0200)]
common/env_embedded.c: drop support for CONFIG_SYS_USE_PPCENV
CONFIG_SYS_USE_PPCENV is no longer used anywhere. It was used to put
the environment in the special .ppcenv section, but the last
architecture using this section (SuperH) has been changed to not use
it.
Therefore, this commit drops support for CONFIG_SYS_USE_PPCENV
entirely. We only handle two cases:
- We're building the host tool tools/envcrc, in which case the
environment is place with no special section attribute (so it
depends up in .data)
- We're building U-Boot itself, in which case the environnement is
placed in the .text section.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Adam Ford [Fri, 28 Jul 2017 13:32:52 +0000 (08:32 -0500)]
Convert ARCH_OMAP2PLUS boards' CONFIG_SYS_TEXT_BASE to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_TEXT_BASE
The includes, whitelist, etc. were left for now but I don't get any
build errors or warnings on the omap3_logic_defconfig or
am3517_evm_defconfig builds I tried.
Signed-off-by: Adam Ford <aford173@gmail.com>
Patrice Chotard [Fri, 28 Jul 2017 09:54:14 +0000 (11:54 +0200)]
stmf32f4: soc: fix buildman compilation error
fix the following compilation error reported by buidlman:
arm: + stm32f429-discovery
+arch/arm/mach-stm32/stm32f4/soc.c: In function 'arch_cpu_init':
+arch/arm/mach-stm32/stm32f4/soc.c:30:2: error: 'for' loop initial declarations are only allowed in C99 or C11 mode
+ for (int i = 0; i < ARRAY_SIZE(stm32_region_config); i++)
+ ^
+arch/arm/mach-stm32/stm32f4/soc.c:30:2: note: use option -std=c99, -std=gnu99, -std=c11 or -std=gnu11 to compile your code
+make[3]: *** [arch/arm/mach-stm32/stm32f4/soc.o] Error 1
+make[2]: *** [arch/arm/mach-stm32/stm32f4] Error 2
+make[1]: *** [arch/arm/mach-stm32] Error 2
+make: *** [sub-make] Error 2
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Vikas Manocha <vikas.manocha@st.com>
Wenyou.Yang@microchip.com [Fri, 28 Jul 2017 03:37:26 +0000 (11:37 +0800)]
configs: sama5d4_xplained: Fix input clock for debug UART
Fix the UART input clock for the early debug UART, it should be
100MHz, instead of 88MHz.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Wenyou.Yang@microchip.com [Fri, 21 Jul 2017 09:07:46 +0000 (17:07 +0800)]
board: usb_a9263: Update to support DT and DM
Add the dts files to support deivce tree, update the configuration
files to support the device tree and driver model. The peripheral
clock and pins configuration are handled by the clock and the pinctrl
drivers respectively.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Wenyou.Yang@microchip.com [Fri, 21 Jul 2017 09:06:40 +0000 (17:06 +0800)]
board: meesc: Update to support DT and DM
Add the dts files to support deivce tree, update the configuration
files to support the device tree and driver model. The peripheral
clock and pins configuration are handled by the clock and the pinctrl
drivers respectively.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Wenyou.Yang@microchip.com [Fri, 21 Jul 2017 09:04:56 +0000 (17:04 +0800)]
board: pm9261: Update to support DT and DM
Add the dts files to support deivce tree, update the configuration
files to support the device tree and driver model. The peripheral
clock and pins configuration are handled by the clock and the pinctrl
drivers respectively.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Wenyou.Yang@microchip.com [Fri, 21 Jul 2017 06:30:57 +0000 (14:30 +0800)]
board: ethernut5: Update to support DT and DM
Add the dts files to support deivce tree, update the configuration
files to support the device tree and driver model. The peripheral
clock and pins configuration are handled by the clock and the pinctrl
drivers respectively.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Wenyou.Yang@microchip.com [Fri, 21 Jul 2017 06:04:47 +0000 (14:04 +0800)]
board: pm9263: Update to support DT and DM
Update the configuration files to support the device tree and driver
model. The peripheral clock and pins configuration are handled by
the clock and the pinctrl drivers respectively.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Wenyou.Yang@microchip.com [Fri, 21 Jul 2017 05:40:11 +0000 (13:40 +0800)]
board: at91sam9260ek: Use SPI-flash-based AT45xxx DataFlash
To support driver model and device tree, use the SPI-flash-based
AT45xxx DataFlash driver, DataFlash is a kind of SPI flash.
Instead of ATMEL_DATAFLASH_SPI DataFlash older driver that will
be removed in the future.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Wenyou.Yang@microchip.com [Fri, 21 Jul 2017 05:40:10 +0000 (13:40 +0800)]
board: at91sam9rlek: Use SPI-flash-based AT45xxx DataFlash
To support driver model and device tree, use the SPI-flash-based
AT45xxx DataFlash driver, DataFlash is a kind of SPI flash.
Instead of ATMEL_DATAFLASH_SPI DataFlash older driver that will
be removed in the future.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Wenyou.Yang@microchip.com [Fri, 21 Jul 2017 05:40:09 +0000 (13:40 +0800)]
board: at91sam9263ek: Use SPI-flash-based AT45xxx DataFlash
To support driver model and device tree, use the SPI-flash-based
AT45xxx DataFlash driver, DataFlash is a kind of SPI flash.
Instead of ATMEL_DATAFLASH_SPI DataFlash older driver that will
be removed in the future.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Wenyou.Yang@microchip.com [Fri, 21 Jul 2017 05:28:40 +0000 (13:28 +0800)]
board: at91sam9261ek: Update to support DT and DM
Add the dts files to support deivce tree, update the configuration
files to support the device tree and driver model. The peripheral
clock and pins configuration are handled by the clock and the pinctrl
drivers respectively.
Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Alison Chaiken [Tue, 4 Jul 2017 18:19:46 +0000 (11:19 -0700)]
gpt: harden set_gpt_info() against non NULL-terminated strings
Strings read from devices may sometimes fail to be
NULL-terminated. The functions in lib/string.c are subject to
failure in this case. Protect against observed failures in
set_gpt_info() by switching to length-checking variants with a length
limit of the maximum possible partition table length. At the same
time, add a few checks for NULL string pointers.
Here is an example as observed in sandbox under GDB:
=> gpt verify host 0 $partitions
Program received signal SIGSEGV, Segmentation fault.
0x0000000000477747 in strlen (s=0x0) at lib/string.c:267
267 for (sc = s; *sc != '\0'; ++sc)
(gdb) bt
#0 0x0000000000477747 in strlen (s=0x0) at lib/string.c:267
#1 0x00000000004140b2 in set_gpt_info (str_part=<optimized out>,
str_disk_guid=str_disk_guid@entry=0x7fffffffdbe8, partitions=partitions@entry=0x7fffffffdbd8,
parts_count=parts_count@entry=0x7fffffffdbcf "", dev_desc=<optimized out>) at cmd/gpt.c:415
#2 0x00000000004145b9 in gpt_verify (str_part=<optimized out>, blk_dev_desc=0x7fffef09a9d0) at cmd/gpt.c:580
#3 do_gpt (cmdtp=<optimized out>, flag=<optimized out>, argc=<optimized out>, argv=0x7fffef09a8f0)
at cmd/gpt.c:783
#4 0x00000000004295b0 in cmd_call (argv=0x7fffef09a8f0, argc=0x5, flag=<optimized out>,
cmdtp=0x714e20 <_u_boot_list_2_cmd_2_gpt>) at common/command.c:500
#5 cmd_process (flag=<optimized out>, argc=0x5, argv=0x7fffef09a8f0,
repeatable=repeatable@entry=0x726c04 <flag_repeat>, ticks=ticks@entry=0x0) at common/command.c:539
Suggested-by: Lothar Waßmann <LW@karo-electronics.de>
Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
Alison Chaiken [Tue, 4 Jul 2017 18:19:18 +0000 (11:19 -0700)]
GPT: provide commands to selectively rename partitions
This patch provides support in u-boot for renaming GPT
partitions. The renaming is accomplished via new 'gpt swap'
and 'gpt rename' commands.
The 'swap' mode returns an error if no matching partition names
are found, or if the number of partitions with one name does not equal
the number with the second name. The 'rename' variant always
succeeds as long as a partition with the provided number exists.
Rewriting the partition table has the side-effect that all partitions
end up with "msftdata" flag set. The reason is that partition type
PARTITION_BASIC_DATA_GUID is hard-coded in the gpt_fill_pte()
function. This does not appear to cause any harm.
Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
Alison Chaiken [Tue, 4 Jul 2017 18:18:50 +0000 (11:18 -0700)]
GPT: read partition table from device into a data structure
Make the partition table available for modification by reading it from
the user-specified device into a linked list. Provide an accessor
function for command-line testing.
Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
[trini: Make this depend on CMD_GPT_RENAME, as it is the user of this
code]
Signed-off-by: Tom Rini <trini@konsulko.com>
Alison Chaiken [Sun, 25 Jun 2017 23:43:23 +0000 (16:43 -0700)]
GPT: add accessor function for disk GUID
In order to read the GPT, modify the partition name strings, and then
write out a new GPT, the disk GUID is needed. While there is an
existing accessor for the partition UUIDs, there is none yet for the
disk GUID.
Changes since v6: none.
Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
Alison Chaiken [Sun, 25 Jun 2017 23:43:22 +0000 (16:43 -0700)]
partitions: increase MAX_SEARCH_PARTITIONS and move to part.h
Move MAX_SEARCH_PARTITIONS to part.h so that functions in cmd
directory can find it. At the same time, increase the value to
64 since some operating systems use many, and the resources
consumed by a larger value are minimal.
Changes since v6: none.
Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
Alison Chaiken [Sun, 25 Jun 2017 23:43:21 +0000 (16:43 -0700)]
cmd gpt: test in sandbox
Make minor changes to README.gpt and sandbox_defconfig to support
testing of the gpt command's functionality in the sandbox.
Changes since v6: none.
Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
Alison Chaiken [Sun, 25 Jun 2017 23:43:19 +0000 (16:43 -0700)]
GPT: fix error in partitions string doc
The existing partitions-list parsing in cmd/gpt.c passes a value
from gpt_default() to set_gpt_info() that README.gpt suggests
should begin with 'partitions='. Partition-list strings should
in fact begin with 'uuid_disk', as otherwise the call from
set_gpt_info() to extract_val() to find 'uuid_disk' will fail.
Change README.gpt accordingly.
Changes since v6: none.
Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
Alison Chaiken [Sun, 25 Jun 2017 23:43:18 +0000 (16:43 -0700)]
disk_partition: introduce macros for description string lengths
Changes since v6: none.
Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
Alison Chaiken [Sun, 25 Jun 2017 23:43:17 +0000 (16:43 -0700)]
EFI: replace number with UUID_STR_LEN macro
Changes since v6: none.
Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
Tom Rini [Fri, 4 Aug 2017 11:23:32 +0000 (07:23 -0400)]
Merge tag 'xilinx-for-v2017.09' of git://denx.de/git/u-boot-microblaze
Xilinx changes for v2017.09
Zynq:
- Add Z-Turn board support
fpga:
- Remove intermediate buffer from code
Zynqmp:
- dts cleanup
- change psu_init handling
- Add options to get silicon version
- Fix time handling
- Map OCM/TCM via MMU
- Add new clock driver
Tom Rini [Thu, 3 Aug 2017 13:33:07 +0000 (09:33 -0400)]
PowerPC: mpc85xx: Update ft_verify_fdt
With the changes to fdt_get_base_address() we need to modify the logic
in ft_verify_fdt() for how we check the validity of the CCSR address.
Tested-on: qemu-ppce500 -M mpc8544ds
Fixes:
336a44877af8 ("fdt: Correct fdt_get_base_address()")
Cc: York Sun <york.sun@nxp.com>
Cc: Wolfgang Denk <wd@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 3 Aug 2017 12:53:36 +0000 (08:53 -0400)]
qemu-ppce500: Update get_phys_ccsrbar_addr_early()
The logic of what fdt_get_base_address() will search for and return has
changed. Rework get_phys_ccsrbar_addr_early() to perform the logic that
fdt_get_base_address used to perform.
Fixes:
336a44877af8 ("fdt: Correct fdt_get_base_address()")
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Alexander Graf <agraf@suse.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Bin Meng [Thu, 3 Aug 2017 02:07:17 +0000 (19:07 -0700)]
ahci-pci: Update call to ahci_probe_scsi_pci()
ahci_probe_scsi() now takes a 'base' argument, and there is an API
that prepares base address for us: ahci_probe_scsi_pci().
Reported-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tom Rini [Wed, 2 Aug 2017 23:30:27 +0000 (19:30 -0400)]
Merge branch 'rmobile' of git://git.denx.de/u-boot-sh
Nobuhiro Iwamatsu [Wed, 2 Aug 2017 19:27:53 +0000 (04:27 +0900)]
ARM: rmobile: Update defconfig of R-Car Gen3
This updates defconfig of R-Car Gen3 to keep with the latest Kconfig.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Fri, 21 Jul 2017 21:20:35 +0000 (23:20 +0200)]
net: ravb: Add clock handling support
Add support for enabling and disabling the clock using the clock
framework based on the content of OF instead of doing it manually
in the board file.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Fri, 21 Jul 2017 21:20:34 +0000 (23:20 +0200)]
net: ravb: Detect PHY correctly
The order of parameters passed to the phy_connect() was wrong.
Moreover, only PHY address 0 was used. Replace this with code
capable of detecting the PHY address.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Fri, 21 Jul 2017 21:20:33 +0000 (23:20 +0200)]
net: ravb: Add OF probing support
Add support for probing the RAVB Ethernet block from device tree.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Fri, 21 Jul 2017 21:19:18 +0000 (23:19 +0200)]
serial: sh: Use the clock framework to obtain clock config
Since we now have clock driver on the RCar Gen3 , obtain the clock
configuration using the clock framework functions. In case this
fails, fall back to the original code for pulling the clock config
directly out of OF.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Fri, 21 Jul 2017 21:18:46 +0000 (23:18 +0200)]
serial: sh: Convert to Kconfig
Convert the SH Serial to Kconfig using tools/moveconfig.py tool
and a bit of manual adjustment to cater for failed conversions.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Fri, 21 Jul 2017 21:18:05 +0000 (23:18 +0200)]
ARM: rmobile: Enable clock framework on ULCB
Since there is now a clock driver for RCar Gen3, enable it on this board.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Fri, 21 Jul 2017 21:18:04 +0000 (23:18 +0200)]
ARM: rmobile: Enable clock framework on Salvator-X
Since there is now a clock driver for RCar Gen3, enable it on this board.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Fri, 21 Jul 2017 21:18:03 +0000 (23:18 +0200)]
clk: rmobile: Add RCar Gen3 clock driver
Add clock driver for the RCar Gen3 R8A7795 and R8A7796 SoCs .
This driver allows reading out the clock configuration set by
previous boot stages and enabling and disabling clock using
the MSTP registers. Setting clock is not supported thus far.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Fri, 21 Jul 2017 21:17:00 +0000 (23:17 +0200)]
ARM: rmobile: Enable OF_CONTROL on RCar Gen3
Since the DTs are now in place, enable OF control so that they get
bundled into the U-Boot.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Fri, 21 Jul 2017 21:16:59 +0000 (23:16 +0200)]
ARM: dts: rmobile: Import DTS from Linux 4.12
Import the RCar Gen3 DTS and headers from upstream Linux kernel v4.12-rc6,
commit
6f7da290413ba713f0cdd9ff1a2a9bb129ef4f6c . This includes both M3
and H3 ULCB and Salvator-X boards.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Fri, 21 Jul 2017 21:16:08 +0000 (23:16 +0200)]
ARM: rmobile: Increase console buffer sizes
Allow pasting extra long lines into the U-Boot console on RCar Gen3.
This is OK since we have plenty of resources and it's convenient.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Fri, 21 Jul 2017 21:15:21 +0000 (23:15 +0200)]
ARM: rmobile: ulcb: Add ULCB board support
Add initial support for the R8A7795 and R8A7796 based ULCB board.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Fri, 21 Jul 2017 21:15:20 +0000 (23:15 +0200)]
ARM: rmobile: Add PFC PUEN bank 5 address
Add the PFC5 PUEN address and SSI SDATA4 bit offset into the
rcar-gen3-base.h .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Tom Rini [Wed, 2 Aug 2017 14:52:26 +0000 (10:52 -0400)]
Merge git://git.denx.de/u-boot-fsl-qoriq
Signed-off-by: Tom Rini <trini@konsulko.com>
Conflicts:
include/configs/ls1046aqds.h
include/configs/ls1046ardb.h
Heinrich Schuchardt [Sun, 30 Jul 2017 20:18:18 +0000 (22:18 +0200)]
arm64: zynqmp: avoid out of buffer access
strncat(a, b, c) appends a maximum of c characters plus the 0 byte
to a.
In board_init we first write 4 characters plus 0 byte to version.
So only ZYNQMP_VERSION_SIZE - 5 additional characters fit into
version.
The problem was indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Tue, 25 Jul 2017 06:21:37 +0000 (11:51 +0530)]
arm64: zynqmp: Make chip_id routine to handle based on el.
Modify chip_id() routine such that to handle based on
the current el. Also make it available even if FPGA is
not enabled in system such it can be used always.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Tue, 25 Jul 2017 06:21:38 +0000 (11:51 +0530)]
arm64: zynqmp: Make chip_id a global routine()
This patch makes chip_id() as a global routine so that
it can be used in other places as required.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Tue, 25 Jul 2017 06:21:36 +0000 (11:51 +0530)]
arm64: zynqmp: Modify chip_id routine to get either idcode or version
This patch modifies the chip_id routine to get either idcode or
silicon version based on the argument received.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 20 Jul 2017 10:38:27 +0000 (12:38 +0200)]
arm64: zynqmp: Move dts zcu102 to zcu102-revA
Not using board revision is causing confusion about which board is
supported and tested. Mark dts files exactly with board revision which
was tested. When new board revision arives it can be symlink if SW view
is the same. Also add -revX suffix to compatible string because user space
tools are parsing this string and can change behavior depends of board
revision.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Siva Durga Prasad Paladugu [Tue, 21 Feb 2017 12:28:29 +0000 (17:58 +0530)]
arm64: zynqmp: Dont write to system timestamp generator
Remove incorrect code of writing to system timestamp
counter registers. This register writes does nothing
and can be removed.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 12 Jul 2017 08:32:18 +0000 (10:32 +0200)]
arm64: zynqmp: Do not setup time if already setup
Newer psu_init_gpl.c/h contain clock setup. Detect if
reference clock is active. If yes, skip timer setup.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 28 Jun 2017 13:40:32 +0000 (15:40 +0200)]
arm64: zynqmp: Fix SVD mask for getting chip ID
Mask should start from the first bit - using 0xe is just wrong.
3bits are used that's why 0x7 mask is correct.
This patch is fixing silicon ID code detection. Previous behavior was
that bit0 was completely ignored.
Issue was found on 2eg chip detection.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 12 Jul 2017 11:21:27 +0000 (13:21 +0200)]
arm64: zynqmp: Add Kconfig option for adding psu_init to binary
There is a need to include psu_init also in mini u-boot configuration
that's why handle psu_init via Kconfig property.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 12 Jul 2017 11:08:41 +0000 (13:08 +0200)]
arm64: zynqmp: Call psu_init from board_early_init_f
For some mini platforms there could be a need to include psu_init.
That's why move it to board file instead of spl only file.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Thu, 13 Jul 2017 13:31:12 +0000 (19:01 +0530)]
arm64: zynqmp: Remove ifdef around zynqmp mmio read and write rotuines
This patch removes ifdef around mmio read and write rotuines
and make them a single routine by checking the current el.
This patch helps to remove ifdef around invoke_smc as well.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Thu, 13 Jul 2017 13:31:09 +0000 (19:01 +0530)]
arm64: zynqmp: Define a way to intialize TCM
TCM on ZynqMP needs to be intialized in a sequence
and this patch provides a global routine to perform
this as per requirement.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Thu, 13 Jul 2017 13:31:10 +0000 (19:01 +0530)]
arm64: zynqmp: Provide a Kconfig option to define OCM and TCM in MMU
This patch provides an option to include OCM and TCM memory
into MMU table with corresponding memory attributes.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Thu, 2 Mar 2017 13:20:11 +0000 (18:50 +0530)]
fpga: xilinx: Avoid using local intermediate buffer
Dont use local temporary buffer for printing out the
info instead use directly from memroy. This fixes the
issue of stack corruprion due to local buffer overflow.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 24 Apr 2017 12:06:27 +0000 (14:06 +0200)]
clk: zynqmp: Remove unused macros/variables
These macros and one variable is not used anywhere that's why
they should be removed.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Siva Durga Prasad Paladugu [Thu, 13 Apr 2017 11:29:38 +0000 (16:59 +0530)]
clk: zynqmp: Dont panic incase of mmio write/read failures
Dont panic incase of mmio write/read failures instead return
error and let the peripheral driver take care of clock get
and set failures.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Siva Durga Prasad Paladugu [Fri, 3 Feb 2017 18:26:49 +0000 (23:56 +0530)]
clk: zynqmp: Add support for CCF driver
Add support for CCF, this CCF reads the ref clocks
from dt and checks all the required clock control
registers for its source , divisors and calculates
the clock from them. This supports clock and set
functions.
Panic when read/write fails.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Siva Durga Prasad Paladugu [Thu, 13 Jul 2017 13:31:08 +0000 (19:01 +0530)]
common: board_f: Make reserve_mmu a weak function
Make reserve_mmu a weak so that it provides an option
to customize this routine as per platform need
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Alexander Graf [Mon, 3 Jul 2017 11:41:36 +0000 (13:41 +0200)]
zynq: Add Z-Turn board
The Z-Turn board is a low cost development board based on the
Xilinx Zynq SoC. While it's powerful and quite versatile, it
so far lacked upstream support.
This patch adds basic support for the Z-Turn. It does however
for now miss enablement for MIO51 reset which means that USB
and ethernet don't work. For that either FSBL or SPL need to
be adjusted. The SPL part will follow later.
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Alexander Graf [Mon, 3 Jul 2017 11:41:35 +0000 (13:41 +0200)]
zynq: Enable distro boot
Distro boot allows devices to boot using standardized boot methods by
default. This can be very handy for distributions that want to run on
different platforms.
This patch moves the zynq platform to use its old, zynq specific boot
method first and then fall back to distro boot. That way supporting
Linux distributions like openSUSE is much easier.
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Alexander Graf [Mon, 3 Jul 2017 11:41:34 +0000 (13:41 +0200)]
zynq: Add EFI runtime sections to linker script
When using EFI_LOADER, we add a few special sections for runtime code and
data which get relocated on demand when executing a target OS.
These runtime structures need to get annotated properly in the linker script.
While we do that properly in the generic one, we missed out on the zynq
specific linker script.
This patch adds the EFI runtime section annotations into the zynq linker script
so that the efi loader code actually works on that platform.
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 14 Feb 2017 16:40:21 +0000 (17:40 +0100)]
arm: zynq: Label whole PL part as fpga_full region
This will simplify dt overlay structure for the whole PL.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Moritz Fischer <moritz.fischer@ettus.com>
Tom Rini [Tue, 1 Aug 2017 19:38:32 +0000 (15:38 -0400)]
Merge git://git.denx.de/u-boot-x86
Tom Rini [Tue, 1 Aug 2017 19:38:23 +0000 (15:38 -0400)]
Merge git://git.denx.de/u-boot-mmc
VINITHA PILLAI [Mon, 12 Jun 2017 04:13:45 +0000 (09:43 +0530)]
arm64: ls2088ardb: Add distro secure boot support
Enable validation of boot.scr script prior to its execution dependent
on "secureboot" flag in environment. Also enable "secureboot=y"
flag in environment for ARM based platforms instead of bootcmd.
Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Zhang Ying-22455 [Mon, 5 Jun 2017 03:07:18 +0000 (11:07 +0800)]
arm64: ls2088ardb: Add distro boot support
Include common config_distro_defaults.h and config_distro_bootcmd.h
for u-boot enviroments to support automatical distro boot which
scan boot.scr from external storage devices(e.g. SD/USB/SATA/SCSI disk)
and execute autoboot script. Tested on ls2088ardb with automatically
boot Ubuntu from SD card or USB disk, if it fails to detect external
storage disk, fall back to nor/qspi boot.
Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Sumit Garg [Tue, 6 Jun 2017 15:21:31 +0000 (20:51 +0530)]
arm: ls1021atwr: Add distro secure boot support
Enable validation of boot.scr script prior to its execution dependent
on "secureboot" flag in environment. Disable fall back option to
qspi boot in case of secure boot. Also enable "secureboot=y" flag
in environment for ARM based platforms instead of bootcmd.
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Tested-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Sumit Garg [Tue, 6 Jun 2017 15:20:29 +0000 (20:50 +0530)]
arm64: ls1046ardb: Add distro secure boot support
Enable validation of boot.scr script prior to its execution dependent
on "secureboot" flag in environment. Disable fall back option to
qspi boot in case of secure boot. Also enable "secureboot=y" flag
in environment for ARM based platforms instead of bootcmd.
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Tested-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Sumit Garg [Mon, 5 Jun 2017 18:21:51 +0000 (23:51 +0530)]
arm64: ls1043ardb: Add distro secure boot support
Enable validation of boot.scr script prior to its execution dependent
on "secureboot" flag in environment. Disable fall back option to
nor/qspi boot in case of secure boot. Also enable "secureboot=y"
flag in environment for ARM based platforms instead of bootcmd.
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Tested-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Qianyu Gong [Thu, 15 Jun 2017 03:10:09 +0000 (11:10 +0800)]
arm64: ls1046ardb: Add distro boot support
Tested on ls1046ardb with automatically boot Ubuntu from SD card or
USB disk, if it fails to detect external storage disk, fall back to
qspi boot.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Qianyu Gong [Thu, 15 Jun 2017 03:10:08 +0000 (11:10 +0800)]
armv8: ls1046a: move CONFIG_CMD_USB to defconfig
Move the macro to defconfig to take effect globally.
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Shengzhou Liu [Thu, 8 Jun 2017 07:59:48 +0000 (15:59 +0800)]
arm64: ls1043ardb: Add distro boot support
Include common config_distro_defaults.h and config_distro_bootcmd.h
for u-boot enviroments to support automatical distro boot which
scan boot.scr from external storage devices(e.g. SD/USB/SATA/SCSI disk)
and execute autoboot script. Tested on ls1043ardb with automatically
boot Ubuntu from SD card or USB disk, if it fails to detect external
storage disk, fall back to nor/qspi boot.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Santan Kumar [Fri, 9 Jun 2017 06:18:08 +0000 (11:48 +0530)]
soc/fsl-layerscape: Update SVR number for LS2081A and LS2041A
Update SVR as per the SOC document.
-LS2081A: 0x870919 -> 0x870918
-LS2041A: 0x870915 -> 0x870914
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Santan Kumar [Fri, 9 Jun 2017 06:18:07 +0000 (11:48 +0530)]
fsl/usb: enable errata-
a010151 for ls2088a and ls2081a
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Santan Kumar [Fri, 9 Jun 2017 06:18:04 +0000 (11:48 +0530)]
board/ls2080aqds, SD-boot: Update env offset
As per new memory layout, Update env offset
from 0x200000 to 0x300000
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Alison Wang [Thu, 8 Jun 2017 08:15:14 +0000 (16:15 +0800)]
armv8: Remove duplicate definition for IH_ARCH_ARM and IH_ARCH_ARM64
The duplicate definitions for IH_ARCH_ARM and IH_ARCH_ARM64 are removed.
The definitions in <image.h> are used.
According to this modification, the comparison between os arch and cpu
arch is done in C programming instead of ASM programming.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Alexander Stein [Thu, 1 Jun 2017 07:32:19 +0000 (09:32 +0200)]
spi: fsl_qspi: Pet watchdog even more
Pet the watchdog once upon each command call (qspi_xfer) and during
each loop iteration in several commands.
This fixes a watchdog reset especially during erase command.
Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Alison Wang [Fri, 26 May 2017 07:46:15 +0000 (15:46 +0800)]
arm: ls1021atwr: Add distro boot support
This patch includes common config_distro_defaults.h and
config_distro_bootcmd.h for u-boot enviroments to support distro boot
which automatically scan boot.scr from storage devices(e.g.
SD/USB/SATA/SCSI disk) and execute autoboot script on LS1021ATWR board.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Bin Meng [Mon, 31 Jul 2017 02:24:02 +0000 (19:24 -0700)]
x86: Switch all boards to use DM SCSI
After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.
CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 31 Jul 2017 02:24:01 +0000 (19:24 -0700)]
x86: Convert MMC to driver model
Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Bin Meng [Mon, 31 Jul 2017 02:24:00 +0000 (19:24 -0700)]
block: ide: Fix build error when CONFIG_BLK is on
Add missing #ifndef CONFIG_BLK to wrap dev_desc->block_read.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 31 Jul 2017 02:23:59 +0000 (19:23 -0700)]
dm: scsi: Add a generic PCI-based AHCI driver
This adds support for PCI-based AHCI controller based on DM SCSI.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
xypron.glpk@gmx.de [Sun, 30 Jul 2017 19:17:26 +0000 (21:17 +0200)]
x86: ivybridge: remove unused uma_memory_size
The value of uma_memory_size depends on an undefined value
from the stack. The value of uma_memory_size is changed but
never used.
So simply remove this superfluous code.
The problem was indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sun, 30 Jul 2017 13:23:28 +0000 (06:23 -0700)]
x86: Convert INTEL_ICH6_GPIO to Kconfig
This converts Intel ICH6 GPIO driver to Kconfig, and add it to the
imply list of platform drivers.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sun, 30 Jul 2017 13:23:27 +0000 (06:23 -0700)]
x86: kconfig: Move USB to platform Kconfig
Like other peripheral drivers, move USB related drivers to platform
Kconfig as well.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sun, 30 Jul 2017 13:23:26 +0000 (06:23 -0700)]
x86: kconfig: Let board select SPI flash
Only a specific type of SPI flash exists on a board, having board
Kconfig to select the SPI flash seems to make more sense. Other
flash types are not necessary except coreboot, which implies all
available flash drivers there.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sun, 30 Jul 2017 13:23:25 +0000 (06:23 -0700)]
x86: qemu: Remove SPI flash from defconfigs
QEMU does not support ICH SPI controller yet. It's meaningless to
include SPI flash support.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sun, 30 Jul 2017 13:23:24 +0000 (06:23 -0700)]
x86: qemu: kconfig: Imply platform specific drivers
Imply Qemu-specific drivers in the platform Kconfig.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sun, 30 Jul 2017 13:23:23 +0000 (06:23 -0700)]
x86: quark: kconfig: Imply platform specific drivers
Imply Quark-specific drivers in the platform Kconfig.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sun, 30 Jul 2017 13:23:22 +0000 (06:23 -0700)]
x86: tangier: kconfig: Imply platform specific drivers
Imply Tangier-specific drivers in the platform Kconfig.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>