Stephen Warren [Mon, 5 Oct 2015 23:00:42 +0000 (17:00 -0600)]
pci: tegra: implement PCA enable workaround
Tegra210's PCIe controller has a bug that requires the PCA (performance
counter) feature to be enabled. If this isn't done, accesses to device
configuration space will hang the chip for tens of seconds. Implement
the workaround.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Mon, 5 Oct 2015 23:00:41 +0000 (17:00 -0600)]
pci: tegra: use #address-/size-cells from DT
The number of cells used by each entry in the DT ranges property is
determined by the #address-cells/#size-cells properties. Fix the code
to respect this.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Mon, 5 Oct 2015 23:00:40 +0000 (17:00 -0600)]
pci: tegra: clip RAM size to 32-bits
Tegra peripherals can generally access a 32-bit physical address space,
and I believe this applies to PCIe. Clip the PCI region that refers to
DRAM so it fits into 32-bits to avoid issues.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Mon, 5 Oct 2015 22:58:52 +0000 (16:58 -0600)]
ARM: tegra210: implement PLLE init procedure from TRM
Implement the procedure that the TRM mandates to initialize PLLREFE and
PLLE. This makes the PLL actually lock.
Note that this section of the TRM is being cleaned up to remove some
confusion. The set of register accesses in this patch should be final,
although the step numbers/descriptions might still change.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Thomas Chou [Tue, 10 Nov 2015 12:36:09 +0000 (20:36 +0800)]
nios2: add 3c120 and 10m50 devboards MAINTAINERS
Add 3c120 and 10m50 devboards MAINTAINERS
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Marek Vasut <marex@denx.de>
Thomas Chou [Tue, 10 Nov 2015 23:59:31 +0000 (07:59 +0800)]
nios2: change README.nios2 to use 10m50 as template
The 10m50 devboard becomes the new golden reference design of
Nios II Linux. So change README.nios2 to use 10m50 as template.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Marek Vasut <marex@denx.de>
Thomas Chou [Tue, 10 Nov 2015 23:56:04 +0000 (07:56 +0800)]
nios2: rename board nios2-generic to 3c120_devboard
Rename board nios2-generic to 3c120_devboard. Since nios2 is
converted to driver model and device tree control of u-boot,
the nios2-generic board directory is removed. We can rename
the board back to a real board name. Now the boards maintained
in u-boot mainline are the same as Linux kernel, namely 3c120
and 10m50.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Thomas Chou [Mon, 9 Nov 2015 06:45:06 +0000 (14:45 +0800)]
nios2: add 10m50 devboard support
Add 10m50 devboard support. It is based on the Golden Hardware
Reference Design (GHRD), available at,
http://rocketboards.org/foswiki/view/Documentation/
AlteraMAX1010M50RevCDevelopmentKitLinuxSetup
Though we supported only one nios2-generic board in the past. Now,
with the removal of the nios2-generic board dir, adding new nios2
boards to u-boot is easier than before. It should be helpful to
add those boards supported in Linux mainline. There are only two
such nios2 boards, the 3c120 devboard and 10m50 devboard. The
nios2-generic is actually 3c120, and should restore the name. The
10m50 is this one.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Thomas Chou [Mon, 9 Nov 2015 06:36:29 +0000 (14:36 +0800)]
net: altera_tse: add mSG-DMA support
The Modular Scatter-Gather DMA core is a new DMA core to work
with the Altera Triple-Speed Ethernet MegaCore. It replaces the
legacy Scatter-Gather Direct Memory Access (SG-DMA) controller
core. Please find details on the "Embedded Peripherals IP User
Guide" of Altera.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Thomas Chou [Mon, 9 Nov 2015 03:02:15 +0000 (11:02 +0800)]
net: altera_tse: add priv ops to prepare msgdma support
Add priv ops to prepare msgdma support. These ops are dma type
specific.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Thomas Chou [Mon, 9 Nov 2015 00:00:00 +0000 (08:00 +0800)]
net: altera_tse: wait sgdma in altera_tse_recv
Move the sgdma wait from free_pkt to recv. This is the proper
place to wait recv sgdma done.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Thomas Chou [Sun, 8 Nov 2015 02:57:05 +0000 (10:57 +0800)]
net: altera_tse: factor out stop mac func
Factor out the stop mac function to prepare msgdma support.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Thomas Chou [Sun, 8 Nov 2015 03:04:49 +0000 (11:04 +0800)]
net: zap altera_tse_initialize prototypes
Zap the altera_tse_initialize() prototypes, since it is converted
to driver model.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Thomas Chou [Thu, 5 Nov 2015 08:37:33 +0000 (16:37 +0800)]
nios2: nios2-generic: do not allocate rx buf in net.c
Do not allocate rx buf in net.c, because altera_tse allocates
its own rx buf in driver. This can save 6KB memory.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Thomas Chou [Mon, 9 Nov 2015 06:56:02 +0000 (14:56 +0800)]
mtd: add altera quadspi driver
Add Altera Generic Quad SPI Controller support. The controller
converts SPI NOR flash to parallel flash interface. So it is
not like other SPI flash, but rather like CFI flash.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Thomas Chou [Thu, 5 Nov 2015 07:09:57 +0000 (15:09 +0800)]
nios2: add memcpy_fromio and memcpy_toio
Add memcpy_fromio() and memcpy_toio().
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Thomas Chou [Wed, 28 Oct 2015 07:10:39 +0000 (15:10 +0800)]
nios2: use cfi flash driver model
Use cfi flash driver model.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Thomas Chou [Sat, 7 Nov 2015 06:31:08 +0000 (14:31 +0800)]
cfi_flash: convert to driver model
Convert cfi flash to driver model.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Thomas Chou [Sat, 7 Nov 2015 06:20:31 +0000 (14:20 +0800)]
dm: implement a MTD uclass
Implement a Memory Technology Device (MTD) uclass. It should
include most flash drivers in the future. Though no uclass ops
are defined yet, the MTD ops could be used.
The NAND flash driver is based on MTD. The CFI flash and SPI
flash support MTD, too. It should make sense to convert them
to MTD uclass.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Masahiro Yamada [Fri, 6 Nov 2015 13:16:30 +0000 (22:16 +0900)]
ARM: uniphier: drop UniPhier specific SMP code
The latest Linux can directly handle SMP operations for UniPhier SoCs
without any help of U-boot. Drop the relevant code from U-boot.
See commit
b1e4006aeda8c8784029de17d47987c21ea75f6d ("ARM: uniphier:
rework SMP operations to use trampoline code") in Linux Kernel.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Masahiro Yamada [Wed, 4 Nov 2015 12:56:07 +0000 (21:56 +0900)]
ARM: dts: uniphier: add USB xHCI nodes for PH1-Pro5 and ProXstream2
This makes USB3.0 available on new SoCs/boards.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Wed, 4 Nov 2015 12:56:06 +0000 (21:56 +0900)]
ARM: dts: uniphier: fix interrupt number of USB core for PH1-Pro4
The IRQ is not used in U-Boot, but this would be useful to sync
device trees between Linux and U-Boot.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tom Rini [Tue, 10 Nov 2015 18:38:08 +0000 (13:38 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-arm
Stephen Warren [Mon, 5 Oct 2015 18:09:02 +0000 (12:09 -0600)]
ARM: tegra: enable CONFIG_SYS_NONCACHED_MEMORY everywhere
Now that we have solved the problems that prevented this feature from
being enabled, enable it everywhere.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Mon, 5 Oct 2015 18:09:01 +0000 (12:09 -0600)]
ARM: tegra: add custom MMU setup on ARMv8
This sets up a fine-grained page table, which is a requirement for
noncached_init() to operate correctly.
MMU setup code currently exists in a number of places:
- A version in the core ARMv8 support code that sets up page tables that
use very large block sizes that CONFIG_SYS_NONCACHED_MEMORY doesn't
support.
- Enhanced versions for fsl-lsch3 and zynmq that set up finer grained
page tables.
Ideally, rather than duplicating the MMU setup code yet again this patch
would instead consolidate all the different routines into the core ARMv8
code so that it supported all use-cases. However, this will require
significant effort since there appear to be a number of discrepancies[1]
between different versions of the code, and between the defines/values by
some copies of the MMU setup code use and the architectural MMU
documentation. Some reverse engineering will be required to determine the
intent of the current code.
[1] For example, in the core ARMv8 MMU setup code, three defines named
TCR_EL[123]_IPS_BITS exist, but only one of them sets the IPS field and
the others set a different field (T1SZ) in the page tables. As far as I
can tell so far, there should be no need to set different values per
exception level nor to modify the T1SZ field at all, since TTBR1 shouldn't
be enabled anyway. Another example is inconsistent values for *_VA_BITS
between the current core ARMv8 MMU setup code and the various SoC-
specific MMU setup code. Another example is that asm/armv8/mmu.h's value
for SECTION_SHIFT doesn't match asm/system.h's MMU_SECTION_SHIFT;
research is needed to determine which code relies on which of those
values and why, and whether fixing the incorrect value will cause any
regression.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Mon, 5 Oct 2015 18:09:00 +0000 (12:09 -0600)]
armv8: allow custom MMU setup routines on ARMv8
In order for noncached_init() to operate correctly, SoCs must set up a
custom page table with fine-grained (2MiB) sections, which can be
configured from noncached_init().
This is currently performed by arch/arm/cpu/armv8/{fsl-lsch3,zynqmp}/cpu.c
by cut/pasting and re-implementing mmu_setup, enable_caches(), etc. There
are some other reasons for the duplication there though, such as enabling
icache early, and enabling dcaching earlier with a different configuration.
This change makes mmu_setup() a weak implementation, so that the MMU setup
code can be replaced without having to duplicate other code that calls it.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Mon, 5 Oct 2015 18:08:59 +0000 (12:08 -0600)]
armv8: enable compilation with CONFIG_SYS_NONCACHED_MEMORY
The implementation of noncached_init() uses define MMU_SECTION_SIZE.
Define this on ARM64.
Move the prototype of noncached_{init,alloc}() to a location that
doesn't depend on !defined(CONFIG_ARM64).
Note that noncached_init() calls mmu_set_region_dcache_behaviour() which
relies on something having set up translation tables with 2MB block size.
The core ARMv8 MMU setup code does not do this by default, but currently
relies on SoC specific MMU setup code. Be aware of this before enabling
this feature on your platform!
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Fabio Estevam [Tue, 10 Nov 2015 15:41:03 +0000 (13:41 -0200)]
ls1043ardb: Add missing config entries to MAINTAINERS
ls1043ardb_nand_defconfig and ls1043ardb_sdcard_defconfig are missing
in the MAINTAINERS file, so add them for completeness.
Reported-by: Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Tom Rini [Tue, 10 Nov 2015 14:14:38 +0000 (09:14 -0500)]
board/ti: Update MAINTAINERS entries with more boards
A few config files have been added without updating MAINTAINERS.
Reported-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Tom Rini <trini@konsulko.com>
Vadzim Dambrouski [Fri, 23 Oct 2015 18:14:07 +0000 (21:14 +0300)]
arm: stm32f4: fix a bug when a random sector gets erased
Old sector number is not being cleared from FLASH_CR register. For example
when first erased sector was 001 and then you want to erase sector 010,
sector 011 gets erased instead.
This patch clears old sector number from FLASH_CR register before a new
one is written.
Signed-off-by: Vadzim Dambrouski <pftbest@gmail.com>
Vadzim Dambrouski [Fri, 23 Oct 2015 18:14:06 +0000 (21:14 +0300)]
arm: stm32f4: fix a bug when only first sector gets erased
flash_lock call is inside a for loop, so after the first iteration flash
is locked and no more sectors can be erased.
Move flash_lock out of the loop.
Signed-off-by: Vadzim Dambrouski <pftbest@gmail.com>
Tom Rini [Tue, 10 Nov 2015 14:16:52 +0000 (09:16 -0500)]
powerpc: Finish updating u-boot*lds scripts for newer binutils
In
522b021 we dropped 'PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4)' lines in
the mpc85xx linker scripts as this is not required and breaks newer
binutils. This commit cleans up the rest of the powerpc linker scripts.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 10 Nov 2015 14:13:55 +0000 (09:13 -0500)]
board/ti: Update MAINTAINERS entries with more boards
A few config files have been added without updating MAINTAINERS.
Reported-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 10 Nov 2015 01:06:16 +0000 (01:06 +0000)]
Various Makefiles: Add SPDX-License-Identifier tags
After consulting with some of the SPDX team, the conclusion is that
Makefiles are worth adding SPDX-License-Identifier tags too, and most of
ours have one. This adds tags to ones that lack them and converts a few
that had full (or in one case, very partial) license blobs into the
equivalent tag.
Cc: Kate Stewart <kstewart@linuxfoundation.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Albert ARIBAUD [Fri, 23 Oct 2015 16:06:43 +0000 (18:06 +0200)]
Revive OpenRD targets
Revert commit
7a2c1b13 which dropped OpenRD boards.
Assume maintainership of OpenRD.
Remove OpenRD from scrapyard.
Switch OpenRD to generic board.
Switch to Thumb build.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Albert ARIBAUD [Fri, 23 Oct 2015 16:06:42 +0000 (18:06 +0200)]
kirkwood: support CONFIG_SYS_THUMB_BUILD
Kirkwood files cpu.c and cache.c cannot build in Thumb state;
force them in ARM state even under CONFIG_SYS_THUMB_BUILD.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Albert ARIBAUD [Fri, 23 Oct 2015 16:06:41 +0000 (18:06 +0200)]
tricorder: switch to CONFIG_SYS_THUMB_BUILD
The tricorder and tricorder_flash boards have grown too big.
Reduce their size by building them with CONFIG_SYS_THUMB_BUILD.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Albert ARIBAUD [Fri, 23 Oct 2015 16:06:40 +0000 (18:06 +0200)]
arm: support Thumb-1 with CONFIG_SYS_THUMB_BUILD
When building a Thumb-1-only target with CONFIG_SYS_THUMB_BUILD,
some files fail to build, most of the time because they include
mcr instructions, which only exist for Thumb-2.
This patch introduces a Kconfig option CONFIG_THUMB2 and uses
it to select between Thumb-2 and ARM mode for the aforementioned
files.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Albert ARIBAUD [Fri, 23 Oct 2015 16:06:39 +0000 (18:06 +0200)]
stm32f429-discovery: add CONFIG_SYS_THUMB_BUILD
This target is ARMv7-M therefore can only build for Thumb,
but it did not #define CONFIG_SYS_THUMB_BUILD, so the U-Boot
code did not know it had to build for Thumb(2), not ARM.
This patch is binary-invariant: builds of stm32f429-discovery
with and without this patch were compared and found to differ
only by their U-Boot version strings.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Vadzim Dambrouski [Mon, 19 Oct 2015 16:40:15 +0000 (19:40 +0300)]
arm: fix compile warnings when semihosting is enabled on ARMv7M target.
This patch fixes compile warnings like this:
warning: format '%lu' expects argument of type 'long unsigned int',
but argument 5 has type 'size_t'
In C99 standard you can use %zu modifier to print size_t values.
Signed-off-by: Vadzim Dambrouski <pftbest@gmail.com>
Vadzim Dambrouski [Mon, 19 Oct 2015 16:40:14 +0000 (19:40 +0300)]
arm: add support for semihosting for ARMv7M targets
If you enable CONFIG_SEMIHOSTING for STM32F429 target, you will get compile
error looking like this:
arch/arm/lib/semihosting.c: In function 'smh_read':
{standard input}: Assembler messages:
{standard input}:34: Error: invalid swi expression
{standard input}:34: Error: value of
1193046 too large for field of 2 bytes at 0
scripts/Makefile.build:277: recipe for target 'arch/arm/lib/semihosting.o' failed
The source of the problem is "svc #0x123456" instruction. This instruction
can not be encoded using Thumb2 instruction set used by ARMv7M CPUs.
ARM documentation suggests using "bkpt #0xAB" instruction instead [1].
This patch fixes compile errors and adds support for semihosting for
STM32F429 or any other ARMv7M target.
This change was sested on STM32F429-DISCOVERY board using OpenOCD and
"smhload" u-boot command.
[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0471c/Bgbjhiea.html
Signed-off-by: Vadzim Dambrouski <pftbest@gmail.com>
Zhenhua Luo [Sun, 25 Oct 2015 05:02:28 +0000 (10:32 +0530)]
mpc85xx/u-boot*.lds: remove _GLOBAL_OFFSET_TABLE_ definition
In binutils-2.25, the _GLOBAL_OFFSET_TABLE_ symbols defined by PROVIDE in
u-boot.lds overrides the linker built-in symbols
(https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commitdiff;
h=
b893397a4b1316610f49819344817715e4305de9),
so the linker is treating _GLOBAL_OFFSET_TABLE_ as a definition into the
.reloc section.
To align with the change of binutils-2.25, the _GLOBAL_OFFSET_TABLE_ symbol
should not be defined in sections, and the symbols in linker generated .got
section should be used(https://sourceware.org/ml/binutils/2008-09/
msg00122.html)
Fixed the following build errors with binutils-2.25:
| powerpc-poky-linux-gnuspe-ld.bfd: _GLOBAL_OFFSET_TABLE_ not defined in
linker created .got
Signed-off-by: Zhenhua Luo <zhenhua.luo@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Måns Rullgård [Fri, 6 Nov 2015 12:44:01 +0000 (12:44 +0000)]
Replace "extern inline" with "static inline"
A number of headers define functions as "extern inline" which is
causing problems with gcc5. The reason is that starting with
version 5.1, gcc defaults to the standard C99 semantics for the
inline keyword.
Under the traditional GNU inline semantics, an "extern inline"
function would never create an external definition, the same
as inline *without* extern in C99. In C99, and "extern inline"
definition is simply an external definition with an inline hint.
In short, the meanings of inline with and without extern are
swapped between GNU and C99.
The upshot is that all these definitions in header files create
an external definition wherever those headers are included,
resulting in multiple definition errors at link time.
Changing all these functions to "static inline" fixes the problem
since this works as desired in all gcc versions. Although the
semantics are slightly different (a static inline definition may
result in an actual function being emitted), it works as intended
in practice.
This patch also removes extern prototype declarations for the
changed functions where they existed.
Signed-off-by: Mans Rullgard <mans@mansr.com>
Michal Simek [Thu, 5 Nov 2015 16:06:29 +0000 (17:06 +0100)]
ARM64: zynqmp: Sync zynq_sdhci_init() declaration
This patch fix compilation error:
drivers/mmc/zynq_sdhci.c:16:5: error: conflicting types for
‘zynq_sdhci_init’
int zynq_sdhci_init(phys_addr_t regbase)
^
In file included from drivers/mmc/zynq_sdhci.c:14:0:
./arch/arm/include/asm/arch/sys_proto.h:16:5: note: previous declaration
of ‘zynq_sdhci_init’ was here
int zynq_sdhci_init(unsigned long regbase);
^
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Tom Rini [Fri, 6 Nov 2015 14:21:33 +0000 (09:21 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-nios
Tom Rini [Fri, 6 Nov 2015 14:17:17 +0000 (09:17 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-mips
Daniel Schwierzeck [Sun, 1 Nov 2015 16:36:15 +0000 (17:36 +0100)]
MIPS: bootm: use CONFIG_IS_ENABLED() everywhere
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Daniel Schwierzeck [Sun, 1 Nov 2015 16:36:14 +0000 (17:36 +0100)]
MIPS: bootm: rework and fix broken bootm code
The move to 'generic board' as well as changes in the generic
bootm code broke the boot of FIT uImage's. Especially uImage's
with additional initramfs images or FDT's do not work anymore.
Refactor the bootm code to work again with the generic bootm code.
Always relocate ramdisk and FDT in step 'bootm prep' because the
generic bootm code does this only for legacy uImage's.
Move the step 'bootm cmdline' to 'bootm prep' because the Linux
kernel parameters rd_start and rd_size have to be initialized after
the relocation of the ramdisk.
Furthermore support the step 'bootm fake'.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Daniel Schwierzeck [Sun, 1 Nov 2015 16:36:13 +0000 (17:36 +0100)]
common/board_f: enable setup_board_part1() for MIPS
The variables bd_t:bi_memstart and bd_t:bi_memsize have to be
initialized also on MIPS. Otherwise LMB and cmd_bdinfo do not
correctly work. This currently breaks the booting of FIT images
on MIPS. Enable the board_init_f hook setup_board_part1()
for MIPS to fix this.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Thomas Chou [Fri, 6 Nov 2015 01:37:17 +0000 (09:37 +0800)]
net: altera_tse: get numbers of fdt address and size cells
Get numbers of fdt address and size cells in altera_tse_probe(),
thereby remove the assumption of one address cell and one size
cell.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Thomas Chou [Fri, 6 Nov 2015 01:37:08 +0000 (09:37 +0800)]
net: altera_tse: use BIT macro
Replace numerical bit shift with BIT macro
in altera_tse
:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 .... 31
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Chin Liang See <clsee@altera.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Thomas Chou [Fri, 6 Nov 2015 01:36:52 +0000 (09:36 +0800)]
net: altera_tse: remove the useless parenthesis
Remove the useless parenthesis.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Chin Liang See <clsee@altera.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Thomas Chou [Fri, 6 Nov 2015 01:36:41 +0000 (09:36 +0800)]
net: altera_tse: fix packed and aligned attribute
Fix packed and aligned attribute warnings.
WARNING: __packed is preferred over __attribute__((packed))
#14: FILE: drivers/net/altera_tse.h:14:
+#define __packed_1_ __attribute__ ((packed, aligned(1)))
WARNING: __aligned(size) is preferred over
__attribute__((aligned(size)))
#14: FILE: drivers/net/altera_tse.h:14:
+#define __packed_1_ __attribute__ ((packed, aligned(1)))
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Chin Liang See <clsee@altera.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Thomas Chou [Fri, 6 Nov 2015 01:36:26 +0000 (09:36 +0800)]
net: altera_tse: use data type u32 for regs and desc
Use data type u32/u16/u8 for regs and desc, as it is more
portable.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Chin Liang See <clsee@altera.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Thomas Chou [Fri, 6 Nov 2015 01:36:06 +0000 (09:36 +0800)]
net: altera_tse: remove unused macro and regs def
Remove unused macro and regs def.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Chin Liang See <clsee@altera.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Thomas Chou [Wed, 4 Nov 2015 05:25:20 +0000 (13:25 +0800)]
nios2: trim CONFIG_SYS_MEMTEST_END
Trim CONFIG_SYS_MEMTEST_END location.
CONFIG_SYS_MONITOR_LEN
Reserving 256k for U-Boot at:
d7fc0000
CONFIG_ENV_SIZE
CONFIG_SYS_MALLOC_LEN
Reserving 256k for malloc() at:
d7f80000
0x10000 for the rest
Reserving 68 Bytes for Board Info at:
d7f7ffbc
Reserving 208 Bytes for Global Data at:
d7f7feec
Reserving 12000 Bytes for FDT at:
d7f7d00c
Stack
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Thomas Chou [Wed, 4 Nov 2015 05:28:29 +0000 (13:28 +0800)]
nios2: trim CONFIG_SYS_MALLOC_LEN
Trim CONFIG_SYS_MALLOC_LEN size, because CONFIG_ENV_SIZE
is included to total memory allocation in common.h,
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Chin Liang See <clsee@altera.com>
Thomas Chou [Tue, 3 Nov 2015 06:19:02 +0000 (14:19 +0800)]
altera_uart: Adjust the declaration of debug_uart_init()
Follow commit
97b059730218 ("debug_uart: Adjust the declaration of
debug_uart_init()")
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Chin Liang See <clsee@altera.com>
Thomas Chou [Tue, 3 Nov 2015 06:18:27 +0000 (14:18 +0800)]
altera_jtag_uart: Adjust the declaration of debug_uart_init()
Follow commit
97b059730218 ("debug_uart: Adjust the declaration of
debug_uart_init()")
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Chin Liang See <clsee@altera.com>
Thomas Chou [Tue, 3 Nov 2015 05:52:15 +0000 (13:52 +0800)]
nios2: fix cached mode in clearing the BSS
As the generic board runs in cached mode, it should not use
"stwio" which bypass the cache.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Chin Liang See <clsee@altera.com>
Thomas Chou [Tue, 3 Nov 2015 05:47:02 +0000 (13:47 +0800)]
nios2: remove CONFIG_SYS_INIT_SP macro
Remove CONFIG_SYS_INIT_SP macro, as the initial stack is set to
below the u-boot code.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Chin Liang See <clsee@altera.com>
Thomas Chou [Tue, 3 Nov 2015 05:31:09 +0000 (13:31 +0800)]
nios2: remove CONFIG_SYS_MALLOC_BASE macro
Remove CONFIG_SYS_MALLOC_BASE macro, as it is not used by
the generic board.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Chin Liang See <clsee@altera.com>
Thomas Chou [Sat, 31 Oct 2015 12:55:48 +0000 (20:55 +0800)]
spi: altera_spi: minor clean up
- Remove the penultimate comma in of_match ids
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Thomas Chou [Sat, 31 Oct 2015 12:54:53 +0000 (20:54 +0800)]
misc: altera_sysid: minor clean up
- Remove the penultimate comma in of_match ids
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Thomas Chou [Sat, 31 Oct 2015 12:54:16 +0000 (20:54 +0800)]
timer: altera_timer: minor clean up
- Moved macro definitions to top
- Remove the penultimate comma in of_match ids
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Thomas Chou [Thu, 29 Oct 2015 13:16:39 +0000 (21:16 +0800)]
timer: altera_timer: use BIT macro
Replace numerical bit shift with BIT macro
in altera_timer
:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 .... 31
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Thomas Chou [Sat, 31 Oct 2015 12:53:23 +0000 (20:53 +0800)]
serial: altera_uart: minor clean up
- Moved macro definitions to top
- Re-arrange header includes ascending order
- Remove unused header linux/compiler.h
- Remove the penultimate comma in of_match ids
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Thomas Chou [Thu, 29 Oct 2015 13:18:01 +0000 (21:18 +0800)]
serial: altera_uart: use BIT macro
Replace numerical bit shift with BIT macro
in altera_uart
:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 .... 31
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Thomas Chou [Sat, 31 Oct 2015 12:52:38 +0000 (20:52 +0800)]
serial: altera_jtag_uart: minor clean up
- Moved macro definitions to top
- Give spaces around the '>>' in ALTERA_JTAG_WSPACE()
- Re-arrange header includes ascending order
- Remove unused header linux/compiler.h
- Remove the penultimate comma in of_match ids
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Thomas Chou [Thu, 29 Oct 2015 13:09:31 +0000 (21:09 +0800)]
serial: altera_jtag_uart: use BIT macro
Replace numerical bit shift with BIT macro
in altera_jtag_uart
:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 .... 31
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Thomas Chou [Thu, 29 Oct 2015 08:33:23 +0000 (16:33 +0800)]
nios2: enable setexpr command in defconfig
Enable setexpr command in defconfig because it is really
useful as suggested by Marek.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Marek Vasut <marex@denx.de>
Thomas Chou [Thu, 29 Oct 2015 08:43:46 +0000 (16:43 +0800)]
nios2: clean up macros that do not need a value in board header
Clean up macros that do not need a value as suggested by
Marek.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Tested-by: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Thomas Chou [Tue, 27 Oct 2015 03:23:39 +0000 (11:23 +0800)]
nios2: use common sequence for reserve_uboot
Use common sequence for reserve_uboot, as the result is
the same.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Thomas Chou [Tue, 27 Oct 2015 02:21:06 +0000 (10:21 +0800)]
nios2: use dram bank in board info
Use dram bank in board info, so that it displays correct
memory values in bdinfo command.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Marek Vasut <marex@denx.de>
Thomas Chou [Tue, 27 Oct 2015 01:02:17 +0000 (09:02 +0800)]
nios2: change virt_to_phys to use physaddr_mask in global data
As virt_to_phys() is used a lot in DMA transfer, change it
to use physaddr_mask in global data. This will save an "if"
statement and get a little faster.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Marek Vasut <marex@denx.de>
Thomas Chou [Thu, 29 Oct 2015 13:00:32 +0000 (21:00 +0800)]
nios2: remove the useless parenthesis in asm/io.h
Remove the useless parenthesis in asm/io.h as suggested
by Marek.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Marek Vasut <marex@denx.de>
Thomas Chou [Tue, 27 Oct 2015 00:30:22 +0000 (08:30 +0800)]
nios2: fix map_physmem to do real cache mapping
Fix the map_physmem() to do real cache mapping.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Marek Vasut <marex@denx.de>
Fabio Estevam [Thu, 5 Nov 2015 14:43:42 +0000 (12:43 -0200)]
sf: Add SPI NOR protection mechanism
Many SPI flashes have protection bits (BP2, BP1 and BP0) in the
status register that can protect selected regions of the SPI NOR.
Take these bits into account when performing erase operations,
making sure that the protected areas are skipped.
Tested on a mx6qsabresd:
=> sf probe
SF: Detected M25P32 with page size 256 Bytes, erase size 64 KiB, total 4 MiB
=> sf protect lock 0x3f0000 0x10000
=> sf erase 0x3f0000 0x10000
offset 0x3f0000 is protected and cannot be erased
SF: 65536 bytes @ 0x3f0000 Erased: ERROR
=> sf protect unlock 0x3f0000 0x10000
=> sf erase 0x3f0000 0x10000
SF: 65536 bytes @ 0x3f0000 Erased: OK
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
[re-worked to fit the lock common to dm and non-dm]
Signed-off-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Fabio Estevam [Thu, 5 Nov 2015 14:43:41 +0000 (12:43 -0200)]
sf: Add SPI protection mechanism from the kernel
Add the SPI NOR protection mechanism from the kernel.
This code is based on the work from
Brian Norris <computersforpeace@gmail.com>
Here is the commit details:
"mtd: spi-nor: refactor block protection functions"
(sha1:
62593cf40b23b523b9fc9334ca61ba6c595ebb09)
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Fabio Estevam [Thu, 5 Nov 2015 14:43:40 +0000 (12:43 -0200)]
powerpc: Remove __ilog2_u64 and ffs4 from bitops
Remove __ilog2_u64 and ffs4 from powerpc bitops to align with the
kernel implementation.
Use the generic __ffs64 instead of a custom powerpc implementation.
Cc: York Sun <yorksun@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Fabio Estevam [Thu, 5 Nov 2015 14:43:39 +0000 (12:43 -0200)]
compat: Remove is_power_of_2() definition
Use the is_power_of_2() definition from log2.h to align with the
kernel implementation.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Fabio Estevam [Thu, 5 Nov 2015 14:43:38 +0000 (12:43 -0200)]
bitops: Add fls_long and __ffs64
Add fls_long and __ffs64 support to align with the kernel bitops
implementation.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Fabio Estevam [Thu, 5 Nov 2015 14:43:37 +0000 (12:43 -0200)]
avr32: Use the generic bitops headers
The generic bitops headers are required when calling logarithmic
functions, such as ilog2().
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Fabio Estevam [Thu, 5 Nov 2015 14:43:36 +0000 (12:43 -0200)]
arc: Use the generic bitops headers
The generic bitops headers are required when calling logarithmic
functions, such as ilog2().
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Fabio Estevam [Thu, 5 Nov 2015 14:43:35 +0000 (12:43 -0200)]
mips: Use the generic bitops headers
The generic bitops headers are required when calling logarithmic
functions, such as ilog2().
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Fabio Estevam [Thu, 5 Nov 2015 14:43:34 +0000 (12:43 -0200)]
nios2: Use the generic bitops headers
The generic bitops headers are required when calling logarithmic
functions, such as ilog2().
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Fabio Estevam [Thu, 5 Nov 2015 14:43:33 +0000 (12:43 -0200)]
nds32: Use the generic bitops headers
The generic bitops headers are required when calling logarithmic
functions, such as ilog2().
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Fabio Estevam [Thu, 5 Nov 2015 14:43:32 +0000 (12:43 -0200)]
openrisc: Use the generic bitops headers
The generic bitops headers are required when calling logarithmic
functions, such as ilog2().
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Fabio Estevam [Thu, 5 Nov 2015 14:43:31 +0000 (12:43 -0200)]
sparc: Use the generic bitops headers
The generic bitops headers are required when calling logarithmic
functions, such as ilog2().
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Fabio Estevam [Thu, 5 Nov 2015 14:43:30 +0000 (12:43 -0200)]
sandbox: Use the generic bitops headers
The generic bitops headers are required when calling logarithmic
functions, such as ilog2().
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Fabio Estevam [Thu, 5 Nov 2015 14:43:29 +0000 (12:43 -0200)]
microblaze: Use the generic bitops headers
The generic bitops headers are required when calling logarithmic
functions, such as ilog2().
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Fabio Estevam [Thu, 5 Nov 2015 14:43:28 +0000 (12:43 -0200)]
sh: Use the generic bitops headers
The generic bitops headers are required when calling logarithmic
functions, such as ilog2().
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Fabio Estevam [Thu, 5 Nov 2015 14:43:27 +0000 (12:43 -0200)]
blackfin: Use the generic bitops headers
The generic bitops headers are required when calling logarithmic
functions, such as ilog2().
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Fabio Estevam [Thu, 5 Nov 2015 14:43:26 +0000 (12:43 -0200)]
m68k: Use the generic bitops headers
The generic bitops headers are required when calling logarithmic
functions, such as ilog2().
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Fabio Estevam [Thu, 5 Nov 2015 14:43:25 +0000 (12:43 -0200)]
x86: Use the generic bitops headers
Use the generic bitops and also add custom __ffs() implementation
as per the kernel.
Also align the ffs() implementation with the kernel.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Fabio Estevam [Thu, 5 Nov 2015 14:43:24 +0000 (12:43 -0200)]
ARM: Use the generic bitops headers
The generic bitops headers are required when calling logarithmic
functions, such as ilog2().
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Fabio Estevam [Thu, 5 Nov 2015 14:43:23 +0000 (12:43 -0200)]
include: Add generic bitops headers
Use the generic bitops header files from the kernel.
Imported from kernel 4.2.3.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Fabio Estevam [Thu, 5 Nov 2015 14:43:22 +0000 (12:43 -0200)]
include: Add log2 header from the kernel
Use the log2 header files from the kernel.
Imported from kernel 4.2.3.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Tom Rini [Thu, 5 Nov 2015 12:47:21 +0000 (07:47 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-video
Tom Rini [Thu, 5 Nov 2015 12:46:45 +0000 (07:46 -0500)]
Merge git://git.denx.de/u-boot-samsung