oweals/u-boot.git
7 years agopower: change from meaningless value to error number
Jaehoon Chung [Thu, 15 Dec 2016 11:49:50 +0000 (20:49 +0900)]
power: change from meaningless value to error number

'-1' is absolutely meaningless value.
This patch changed from meaningless value to error number.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agommc: uniphier-sd: fix Kconfig dependency
Masahiro Yamada [Fri, 30 Dec 2016 14:20:14 +0000 (23:20 +0900)]
mmc: uniphier-sd: fix Kconfig dependency

Some MMC drivers describe operations with the DM_MMC_OPS form, but
there are still several drivers with older implementation.  We can
not compile drivers from different groups at the same time because
the core framework is shared with #ifdef CONFIG_DM_MMC_OPS.

Every driver should have "depends on DM_MMC_OPS" (or !DM_MMC_OPS)
explicitly to express which framework it is based on.  This will
avoid enabling drivers with incompatible interface at the same time.
It is incorrect to make a driver "select DM_MMC_OPS".

While we are here, add "depends on OF_CONTROL" as well because this
driver can be configured only by Device Tree.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agommc: sdhci-cadence: add Cadence SD4HC support
Masahiro Yamada [Fri, 30 Dec 2016 13:41:46 +0000 (22:41 +0900)]
mmc: sdhci-cadence: add Cadence SD4HC support

Add a driver for the Cadence SD4HC SD/SDIO/eMMC Controller.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agommc: sdhci: combine the Host controller v3.0 feature into one condition
Jaehoon Chung [Fri, 30 Dec 2016 06:30:21 +0000 (15:30 +0900)]
mmc: sdhci: combine the Host controller v3.0 feature into one condition

It doesn't need to seperate the condition.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
7 years agommc: sdhci: remove the SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER
Jaehoon Chung [Fri, 30 Dec 2016 06:30:20 +0000 (15:30 +0900)]
mmc: sdhci: remove the SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER

Ther is no usage anywhere. It doesn't need to maintain this bit.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
7 years agommc: sdhci: use the bitops APIs in sdhci.h
Jaehoon Chung [Fri, 30 Dec 2016 06:30:19 +0000 (15:30 +0900)]
mmc: sdhci: use the bitops APIs in sdhci.h

The using the bitops is too easy controlling than now.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
7 years agommc: sdhci: move the callback function into sdhci_ops
Jaehoon Chung [Fri, 30 Dec 2016 06:30:18 +0000 (15:30 +0900)]
mmc: sdhci: move the callback function into sdhci_ops

callback function should be moved into sdhci_ops struct.
Other controller can use these ops for controlling clock or their own
specific register.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
7 years agommc: s5p_sdhci: add the s5p_set_clock function
Jaehoon Chung [Fri, 30 Dec 2016 06:30:17 +0000 (15:30 +0900)]
mmc: s5p_sdhci: add the s5p_set_clock function

Add the s5p_set_clock function.
It's not good that "set_mmc_clk" is assigned directly.
In future, it should be changed to use the clock framework.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
7 years agommc: change the set_ios return type from void to int
Jaehoon Chung [Fri, 30 Dec 2016 06:30:16 +0000 (15:30 +0900)]
mmc: change the set_ios return type from void to int

To maintain consistency, set_ios type of legacy mmc_ops changed to int.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
7 years agommc: sdhci: remove the SDHCI_QUIRK_NO_CD
Jaehoon Chung [Fri, 30 Dec 2016 06:30:15 +0000 (15:30 +0900)]
mmc: sdhci: remove the SDHCI_QUIRK_NO_CD

This quirk doesn't need anymore.
It's replaced to get_cd callback function.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
7 years agommc: pic32_sdhci: move the code to pic32_sdhci.c
Jaehoon Chung [Fri, 30 Dec 2016 06:30:14 +0000 (15:30 +0900)]
mmc: pic32_sdhci: move the code to pic32_sdhci.c

This code is used for only pic32_sdhci controller.
To remove the "#ifdef", moves to pic32_sdhci.c.
And use the get_cd callback function.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
7 years agommc: sdhci: remove the unused code about testing Card detect
Jaehoon Chung [Fri, 30 Dec 2016 06:30:13 +0000 (15:30 +0900)]
mmc: sdhci: remove the unused code about testing Card detect

This code is dead code..There is no usage anywhere.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
7 years agommc: sdhci: add the get_cd callback function in sdhci_ops
Jaehoon Chung [Fri, 30 Dec 2016 06:30:12 +0000 (15:30 +0900)]
mmc: sdhci: add the get_cd callback function in sdhci_ops

Some SoCs can have their own card dect scheme.
Then they may use this get_cd callback function after implementing init
in their drivers.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
7 years agommc: sdhci: disable the 8bit mode when host doesn't support it
Jaehoon Chung [Fri, 30 Dec 2016 06:30:11 +0000 (15:30 +0900)]
mmc: sdhci: disable the 8bit mode when host doesn't support it

Buswidth is depeneded on Hardware schematic.
Evne though host can support the 8bit buswidth, if hardware doesn't
support 8bit mode, it doesn't work fine.
So the buswidth mode selection leaves a matter in each SoC drivers.

On the contrary to this, hardware supports 8bit mode, but host doesn't
support it. then controller has to disable the MMC_MODE_8BIT.
(Host can check whether 8bit mode is supported or not, since V3.0)

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
7 years agoMerge git://git.denx.de/u-boot-dm
Tom Rini [Tue, 10 Jan 2017 13:19:33 +0000 (08:19 -0500)]
Merge git://git.denx.de/u-boot-dm

7 years agomips: Use common _AC macro now.
Tom Rini [Tue, 10 Jan 2017 13:13:55 +0000 (08:13 -0500)]
mips: Use common _AC macro now.

MIPS no longer needs to have its own version of this macro now.

Fixes: 2a6713b09b8d ("move UL() macro from armv8/mmu.h into common.h")
Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoMerge branch 'master' of git://git.denx.de/u-boot-sunxi
Tom Rini [Tue, 10 Jan 2017 13:19:21 +0000 (08:19 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-sunxi

7 years agoscsi: dm: Unbind all scsi based block devices before new scan
Michal Simek [Mon, 2 Jan 2017 08:40:09 +0000 (09:40 +0100)]
scsi: dm: Unbind all scsi based block devices before new scan

New scan should unbind all block devices not to be listed again.
Without this patch if scsi reset or scan is called new block devices are
created which point to the same id and lun.

For example:
ZynqMP> scsi scan
scsi_scan: if_type=2, devnum=0: sdhci@ff170000.blk, 6, 0
scsi_scan: if_type=2, devnum=0: ahci@fd0c0000.id1lun0, 2, 0
scsi_scan: if_type=2, devnum=0: ahci@fd0c0000.id1lun0, 2, 1
scsi_scan: if_type=2, devnum=0: ahci@fd0c0000.id1lun0, 2, 2
scsi_scan: if_type=2, devnum=0: ahci@fd0c0000.id1lun0, 2, 3
scsi_scan: if_type=2, devnum=0: ahci@fd0c0000.id1lun0, 2, 4
scanning bus for devices...
  Device 0: (1:0) Vendor: ATA Prod.: KINGSTON SVP200S Rev: 501A
            Type: Hard Disk
            Capacity: 57241.8 MB = 55.9 GB (117231408 x 512)

Reported-by: Ken Ma <make@marvell.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agodefconfig: am335x_evm: enable usb driver model
Mugunthan V N [Thu, 17 Nov 2016 09:08:15 +0000 (14:38 +0530)]
defconfig: am335x_evm: enable usb driver model

enable usb driver model for am335x bbb as musb supports
driver model

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoam335x_evm: enable usb ether gadget as it supports DM_ETH
Mugunthan V N [Thu, 17 Nov 2016 09:08:14 +0000 (14:38 +0530)]
am335x_evm: enable usb ether gadget as it supports DM_ETH

Since usb ether gadget have support for driver model, so enable
usb ether gadget.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoam33xx: board: init usb ether gadget for rndis support
Mugunthan V N [Thu, 17 Nov 2016 09:08:13 +0000 (14:38 +0530)]
am33xx: board: init usb ether gadget for rndis support

Add usb ether gadget device with usb_ether_init() when
CONFIG_DM_ETH and CONFIG_USB_ETHER are defined.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agodrivers: usb: gadget: ether/rndis: convert driver to adopt device driver model
Mugunthan V N [Fri, 18 Nov 2016 05:39:15 +0000 (11:09 +0530)]
drivers: usb: gadget: ether/rndis: convert driver to adopt device driver model

Adopt usb ether gadget and rndis driver to adopt driver model

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
7 years agoPrepare v2017.01 v2017.01
Tom Rini [Mon, 9 Jan 2017 16:57:05 +0000 (11:57 -0500)]
Prepare v2017.01

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agolib: gitignore *.elf and *.so generated by efi_loader
Ladislav Michl [Mon, 9 Jan 2017 10:33:28 +0000 (11:33 +0100)]
lib: gitignore *.elf and *.so generated by efi_loader

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
7 years agoscripts/config_whitelist.txt: Resync
Tom Rini [Mon, 9 Jan 2017 01:16:00 +0000 (20:16 -0500)]
scripts/config_whitelist.txt: Resync

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agomx6ullevk: Add missing MAINTAINERS for mx6ull_14x14_evk_plugin_defconfig
Jagan Teki [Thu, 5 Jan 2017 14:32:50 +0000 (15:32 +0100)]
mx6ullevk: Add missing MAINTAINERS for mx6ull_14x14_evk_plugin_defconfig

Add 'Peng Fan' as MAINTAINERS of configs/mx6ull_14x14_evk_plugin_defconfig
which is missing in below commit
"imx: mx6ull_14x14_evk: add plugin defconfig"
(sha1: b90ebf49bb8f74afe68f696f59a0e24cc79f2031)

Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
7 years agoam335x: configs: Use ISW_ENTRY_ADDR to set SPL_TEXT_BASE
Andrew F. Davis [Fri, 6 Jan 2017 22:32:12 +0000 (16:32 -0600)]
am335x: configs: Use ISW_ENTRY_ADDR to set SPL_TEXT_BASE

The SPL load address changes based on boot type in HS devices,
ISW_ENTRY_ADDR is used to set this address for AM43xx based SoCs
for similar reasons. Add this same logic for AM33xx devices.

Also make the default value for ISW_ENTRY_ADDR correct for GP
devices based on SoC, HS devices already pick the correct
value in their defconfig.

Signed-off-by: Andrew F. Davis <afd@ti.com>
7 years agoarm: mach-omap2: Fix secure file generation
Andrew F. Davis [Fri, 6 Jan 2017 22:20:02 +0000 (16:20 -0600)]
arm: mach-omap2: Fix secure file generation

When TI_SECURE_DEV_PKG is not defined we warn that the file '*_HS' was
not generated but generate an unsigned one anyway, first fix this
warning to say that it was generated but not secured.

When the user then exports TI_SECURE_DEV_PKG after getting this warning,
and tries to re-build, 'make' will detect the build artifacts as
unchanged and so assume they do not need to be re-generated. This causes
it to fail to sign the files and it will pack unsigned files into the
final image, even though TI_SECURE_DEV_PKG is now correctly defined and
working.

Fix this by using FORCE on the targets causes them to be re-run even if
the dependent files have not changed.

This then causes another issue. We currently rename the signed dtb files
to overwrite the non-signed ones. We do this so the 'mkimage' tool gives
the packaged dtb sections the correct name. If we do not rename the files
then SPL will not find them during boot.

Fix this by renaming the dtb files by appending _HS to the end of the
filename, after the ".dtb", this causes them to still be named correctly
in the FIT blob.

Signed-off-by: Andrew F. Davis <afd@ti.com>
7 years agoMerge branch 'master' of git://git.denx.de/u-boot-tegra
Tom Rini [Thu, 5 Jan 2017 00:41:50 +0000 (19:41 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-tegra

7 years agoMerge branch 'master' of git://git.denx.de/u-boot-spi
Tom Rini [Thu, 5 Jan 2017 00:41:23 +0000 (19:41 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-spi

7 years agopowerpc: mpc85xx: Move macro CONFIG_SYS_PPC64 to Kconfig
York Sun [Wed, 28 Dec 2016 16:43:50 +0000 (08:43 -0800)]
powerpc: mpc85xx: Move macro CONFIG_SYS_PPC64 to Kconfig

Use Kconfig option SYS_PPC64 instead.

Signed-off-by: York Sun <york.sun@nxp.com>
7 years agopowerpc: mpc85xx: Move CONFIG_SYS_FSL_QORIQ_CHASSIS* to Kconfig
York Sun [Wed, 28 Dec 2016 16:43:49 +0000 (08:43 -0800)]
powerpc: mpc85xx: Move CONFIG_SYS_FSL_QORIQ_CHASSIS* to Kconfig

Use Kconfig option to select chassis version.

Signed-off-by: York Sun <york.sun@nxp.com>
7 years agopowerpc: E6500: Move macro CONFIG_E6500 to Kconfig
York Sun [Wed, 28 Dec 2016 16:43:48 +0000 (08:43 -0800)]
powerpc: E6500: Move macro CONFIG_E6500 to Kconfig

Use Kconfig option E6500 and clean up existing usage.

Signed-off-by: York Sun <york.sun@nxp.com>
7 years agopowerpc: mpc85xx: Remove unused ifdef in config header
York Sun [Wed, 28 Dec 2016 16:43:47 +0000 (08:43 -0800)]
powerpc: mpc85xx: Remove unused ifdef in config header

After most config options are moved to Kconfig, the unused ifdef
or elif can be removed.

Signed-off-by: York Sun <york.sun@nxp.com>
7 years agoddr: fsl: Move CONFIG_SYS_FSL_DDR_VER to Kconfig
York Sun [Wed, 28 Dec 2016 16:43:46 +0000 (08:43 -0800)]
ddr: fsl: Move CONFIG_SYS_FSL_DDR_VER to Kconfig

Use Kconfig to select DDR version instead of using config header.

Signed-off-by: York Sun <york.sun@nxp.com>
7 years agoddr: fsl: Merge macro CONFIG_NUM_DDR_CONTROLLERS and CONFIG_SYS_NUM_DDR_CTRLS
York Sun [Wed, 28 Dec 2016 16:43:45 +0000 (08:43 -0800)]
ddr: fsl: Merge macro CONFIG_NUM_DDR_CONTROLLERS and CONFIG_SYS_NUM_DDR_CTRLS

These two macros are used for the same thing, the total number of DDR
controllers for a given SoC. Use SYS_NUM_DDR_CTRLS in Kconfig and
merge existing usage.

Signed-off-by: York Sun <york.sun@nxp.com>
7 years agoddr: fsl: Move macro CONFIG_NUM_DDR_CONTROLLERS to Kconfig
York Sun [Wed, 28 Dec 2016 16:43:44 +0000 (08:43 -0800)]
ddr: fsl: Move macro CONFIG_NUM_DDR_CONTROLLERS to Kconfig

Use option NUM_DDR_CONTROLLERS in ddr Kconfig and clean up existing
usage in ls102xa and fsl-layerscape. Remove all powerpc macros in
config header and board header files.

Signed-off-by: York Sun <york.sun@nxp.com>
7 years agopowerpc: mpc85xx: Move CONFIG_SYS_FSL_ERRATUM_* to Kconfig
York Sun [Wed, 28 Dec 2016 16:43:43 +0000 (08:43 -0800)]
powerpc: mpc85xx: Move CONFIG_SYS_FSL_ERRATUM_* to Kconfig

Use Kconfig to select errata workaround.

Signed-off-by: York Sun <york.sun@nxp.com>
7 years agommc: move CONFIG_SYS_FSL_ERRATUM_ESDHC* to Kconfig
York Sun [Wed, 28 Dec 2016 16:43:42 +0000 (08:43 -0800)]
mmc: move CONFIG_SYS_FSL_ERRATUM_ESDHC* to Kconfig

Add option SYS_FSL_ERRATUM_ESDHC111, SYS_FSL_ERRATUM_ESDHC13,
SYS_FSL_ERRATUM_ESDHC135, SYS_FSL_ERRATUM_ESDHC_A001 to mmc Kconfig.
Move existing macros to related Kconfig.

Signed-off-by: York Sun <york.sun@nxp.com>
[trini: Migrate bk4r1]
Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoarm: layerscape: Move CONFIG_SYS_FSL_ERRATUM_* to Kconfig
York Sun [Wed, 28 Dec 2016 16:43:41 +0000 (08:43 -0800)]
arm: layerscape: Move CONFIG_SYS_FSL_ERRATUM_* to Kconfig

Use Kconfig to select errata workaround.

Signed-off-by: York Sun <york.sun@nxp.com>
7 years agofsl_ddr: Move DDR config options to driver Kconfig
York Sun [Wed, 28 Dec 2016 16:43:40 +0000 (08:43 -0800)]
fsl_ddr: Move DDR config options to driver Kconfig

Create driver/ddr/fsl/Kconfig and move existing options. Clean up
existing macros.

Signed-off-by: York Sun <york.sun@nxp.com>
[trini: Migrate sbc8641d, xpedite537x and MPC8536DS, run a moveconfig.py -s]
Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agopowerpc: T104xQDS: Remove macro CONFIG_T104xD4QDS
York Sun [Wed, 28 Dec 2016 16:43:39 +0000 (08:43 -0800)]
powerpc: T104xQDS: Remove macro CONFIG_T104xD4QDS

Remove this macro. It was added by e622d9ed but actually wasn't used.

Signed-off-by: York Sun <york.sun@nxp.com>
7 years agopowerpc: T2081QDS: Remove macro T2081QDS
York Sun [Wed, 28 Dec 2016 16:43:38 +0000 (08:43 -0800)]
powerpc: T2081QDS: Remove macro T2081QDS

Use TARGET_T2081QDS from Kconfig instead.

Signed-off-by: York Sun <york.sun@nxp.com>
7 years agopowerpc: T2080RDB: Remove macro CONFIG_T2080RDB
York Sun [Wed, 28 Dec 2016 16:43:37 +0000 (08:43 -0800)]
powerpc: T2080RDB: Remove macro CONFIG_T2080RDB

Use TARGET_T2080RDB from Kconfig instead.

Signed-off-by: York Sun <york.sun@nxp.com>
7 years agopowerpc: T2080QDS: Remove macro T2080QDS
York Sun [Wed, 28 Dec 2016 16:43:36 +0000 (08:43 -0800)]
powerpc: T2080QDS: Remove macro T2080QDS

Use TARGET_T2080QDS from Kconfig instead.

Signed-off-by: York Sun <york.sun@nxp.com>
7 years agopowerpc: T1040QDS: Remove macro CONFIG_T1040QDS
York Sun [Wed, 28 Dec 2016 16:43:35 +0000 (08:43 -0800)]
powerpc: T1040QDS: Remove macro CONFIG_T1040QDS

Use TARGET_T1040QDS from Kconfig instead.

Signed-off-by: York Sun <york.sun@nxp.com>
7 years agopowerpc: T1024RDB: Remove macro CONFIG_T1024RDB
York Sun [Wed, 28 Dec 2016 16:43:34 +0000 (08:43 -0800)]
powerpc: T1024RDB: Remove macro CONFIG_T1024RDB

Use TARGET_T1024RDB from Kconfig instead.

Signed-off-by: York Sun <york.sun@nxp.com>
[trini: Get missing hunk in board/freescale/t102xrdb/ddr.c]
Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agopowerpc: T1023RDB: Remove macro CONFIG_T1023RDB
York Sun [Wed, 28 Dec 2016 16:43:33 +0000 (08:43 -0800)]
powerpc: T1023RDB: Remove macro CONFIG_T1023RDB

Use TARGET_T1023RDB from Kconfig instead.

Signed-off-by: York Sun <york.sun@nxp.com>
7 years agopowerpc: mpc85xx: Remove variant SoCs T1020/T1022/T1013/T1014
York Sun [Wed, 28 Dec 2016 16:43:32 +0000 (08:43 -0800)]
powerpc: mpc85xx: Remove variant SoCs T1020/T1022/T1013/T1014

Remove these SoCs from Kconfig because they don't have individual
configuration. Clean up existing macros.

Signed-off-by: York Sun <york.sun@nxp.com>
7 years agocrypto: Move CONFIG_SYS_FSL_SEC_LE and _BE to Kconfig
York Sun [Wed, 28 Dec 2016 16:43:31 +0000 (08:43 -0800)]
crypto: Move CONFIG_SYS_FSL_SEC_LE and _BE to Kconfig

Use Kconfig option to set little- or big-endian access to secure
boot and trust architecture.

Signed-off-by: York Sun <york.sun@nxp.com>
7 years agocrypto: Move SYS_FSL_SEC_COMPAT into driver Kconfig
York Sun [Wed, 28 Dec 2016 16:43:30 +0000 (08:43 -0800)]
crypto: Move SYS_FSL_SEC_COMPAT into driver Kconfig

Instead of define CONFIG_SYS_FSL_SEC_COMPAT in header files for PowerPC
and ARM SoCs, move it to Kconfig under the driver.

Signed-off-by: York Sun <york.sun@nxp.com>
7 years agopowerpc: mpc85xx: Move CONFIG_SYS_PPC_E500_DEBUG_TLB to Kconfig
York Sun [Wed, 28 Dec 2016 16:43:29 +0000 (08:43 -0800)]
powerpc: mpc85xx: Move CONFIG_SYS_PPC_E500_DEBUG_TLB to Kconfig

Use Kconfig SYS_PPC_E500_DEBUG_TLB and clean up existing macros.

Signed-off-by: York Sun <york.sun@nxp.com>
[trini: Migrate 8572]
Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agopowerpc: mpc85xx: Move CONFIG_SYS_NUM_TLBCAMS to Kconfig
York Sun [Wed, 28 Dec 2016 16:43:28 +0000 (08:43 -0800)]
powerpc: mpc85xx: Move CONFIG_SYS_NUM_TLBCAMS to Kconfig

Use Kconfig option for SYS_NUM_TLBCAMS and clean up existing macros.

Signed-off-by: York Sun <york.sun@nxp.com>
7 years agopowerpc: E500: Move CONFIG_E500 and CONFIG_E500MC to Kconfig
York Sun [Wed, 28 Dec 2016 16:43:27 +0000 (08:43 -0800)]
powerpc: E500: Move CONFIG_E500 and CONFIG_E500MC to Kconfig

Use Kconfig option for E500 and E500MC macros.

Signed-off-by: York Sun <york.sun@nxp.com>
7 years agomtd: nand: mxs_nand_spl: Fix to remove twise 'NAND' print
Jagan Teki [Mon, 2 Jan 2017 23:24:36 +0000 (00:24 +0100)]
mtd: nand: mxs_nand_spl: Fix to remove twise 'NAND' print

SPL from nand will print 'NAND' in boot_from_devices based on
the image_loader name, remove the extra 'NAND ' in mxs_nand_spl driver.

Original behaviour:
-------------------
U-Boot SPL 2017.01-rc2-gf84dd8b (Jan 02 2017 - 22:24:19)
Trying to boot from NANDNAND : 512 MiB

After the fix:
-------------
U-Boot SPL 2017.01-rc2-gf84dd8b-dirty (Jan 02 2017 - 23:17:00)
Trying to boot from NAND: 512 MiB

Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
7 years agospi: cadence_qspi_apb: Use 32 bit indirect read transaction when possible
Vignesh R [Wed, 21 Dec 2016 05:12:33 +0000 (10:42 +0530)]
spi: cadence_qspi_apb: Use 32 bit indirect read transaction when possible

According to Section 11.15.4.9.1 Indirect Read Controller of K2G SoC
TRM SPRUHY8D[1], the external master is only permitted to issue 32-bit
data interface reads until the last word of an indirect transfer
So, make sure that QSPI indirect reads are 32 bit sized except for the
final read. If the rxbuf is unaligned then use bounce buffer, so that
readsl() can be used instead of readsb() to avoid non 32-bit accesses.

[1]www.ti.com/lit/ug/spruhy8d/spruhy8d.pdf

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agospi: cadence_qspi_apb: Use 32 bit indirect write transaction when possible
Vignesh R [Wed, 21 Dec 2016 05:12:32 +0000 (10:42 +0530)]
spi: cadence_qspi_apb: Use 32 bit indirect write transaction when possible

According to Section 11.15.4.9.2 Indirect Write Controller of K2G SoC
TRM SPRUHY8D[1], the external master is only permitted to issue 32-bit
data interface writes until the last word of an indirect transfer
otherwise indirect writes is known to fails sometimes. So, make sure
that QSPI indirect writes are 32 bit sized except for the last write. If
the txbuf is unaligned then use bounce buffer to avoid data aborts.

So, now that the driver uses bounce_buffer, enable CONFIG_BOUNCE_BUFFER
for all boards that use Cadence QSPI driver.

[1]www.ti.com/lit/ug/spruhy8d/spruhy8d.pdf

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agosunxi: A64: enable SPL
Andre Przywara [Mon, 2 Jan 2017 11:48:45 +0000 (11:48 +0000)]
sunxi: A64: enable SPL

Now that the SPL is ready to be compiled in AArch64 and the DRAM
init code is ready, enable SPL support for the A64 SoC and in the
Pine64 defconfig.
For now we keep the boot0 header in the U-Boot proper, as this allows
to still use boot0 as an SPL replacement without hurting the SPL use
case.
We disable FEL support for now by making its compilation conditional
and disabling it for ARM64, as the code isn't ready yet.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agosunxi: DRAM: fix H3 DRAM size display on aarch64
Andre Przywara [Mon, 2 Jan 2017 11:48:44 +0000 (11:48 +0000)]
sunxi: DRAM: fix H3 DRAM size display on aarch64

Fix the output of the DRAM size on AArch64 SPLs.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agosunxi: H3/A64: fix non-ODT setting
Andre Przywara [Mon, 2 Jan 2017 11:48:43 +0000 (11:48 +0000)]
sunxi: H3/A64: fix non-ODT setting

According to Jens disabling the on-die-termination should set bit 5,
not bit 1 in the respective register. Fix this.

Reported-by: Jens Kuske <jenskuske@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agosunxi: A64: use H3 DRAM initialization code for A64 as well
Jens Kuske [Mon, 2 Jan 2017 11:48:42 +0000 (11:48 +0000)]
sunxi: A64: use H3 DRAM initialization code for A64 as well

The A64 DRAM controller is very similar to the H3 one,
so the code can be reused with some small changes.
This refactoring does not change the code size for the existing H3 part.

[Andre: rework from #ifdefs to using socid parameters in static
        functions, minor fixes, merging in fixes from Jens]

Signed-off-by: Jens Kuske <jenskuske@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agosunxi: clocks: Use the correct pattern register for PLL11
Philipp Tomsich [Mon, 2 Jan 2017 11:48:41 +0000 (11:48 +0000)]
sunxi: clocks: Use the correct pattern register for PLL11

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agosunxi: H3: add DRAM controller single bit delay support
Jens Kuske [Mon, 2 Jan 2017 11:48:40 +0000 (11:48 +0000)]
sunxi: H3: add DRAM controller single bit delay support

So far the DRAM driver for the H3 SoC (and apparently boot0/libdram as
well) only applied coarse delay line settings, with one delay value for
all the data lines in each byte lane and one value for the control lines.

Instead of setting the delays for whole bytes only allow setting it for
each individual bit. Also add support for address/command lane delays.

For the purpose of this patch the rules for the existing coarse settings
were just applied to the new scheme, so the actual register writes don't
change for the H3. Other SoCs will utilize this feature later properly.

With a stock GCC 5.3.0 this increases the dram_sun8i_h3.o code size from
2296 to 2344 Bytes.

[Andre: move delay parameters into macros to ease later sharing, use
defines for numbers of delay registers, extend commit message]

Signed-off-by: Jens Kuske <jenskuske@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agosunxi: H3: add and rename some DRAM contoller registers
Jens Kuske [Mon, 2 Jan 2017 11:48:39 +0000 (11:48 +0000)]
sunxi: H3: add and rename some DRAM contoller registers

The IOCR registers got renamed to BDLR to match the public
documentation of similar controllers.

Signed-off-by: Jens Kuske <jenskuske@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agosunxi: H3: Rework MBUS priority setup
Philipp Tomsich [Mon, 2 Jan 2017 11:48:38 +0000 (11:48 +0000)]
sunxi: H3: Rework MBUS priority setup

So far the MBUS priority setup was done by writing "magic" values taken
from a DRAM controller register dump after a boot0 run.
By peeking at the Linux (sic!) MBUS driver [1] from the Allwinner BSP
kernel, we learned more about the actual meaning of those bits.
Add macros and refactor the setup function to make the MBUS setup much
more readable and meaningful.
The actual values used now are a transformation of the values used
before, which are assembled by the new code to result in the same register
writes. So this rework does not change any settings, also the code size
stays the same.

The respective source files in the BSP kernel had a proper GPL header,
so lifting this code and information into U-Boot is legal.

[Andre: provide a convenience macro to fit definitions on one line]

[1] https://github.com/longsleep/linux-pine64/blob/lichee-dev-v3.10.65/drivers/bus/sunxi_mbus.c

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agosunxi: provide default DRAM config for sun50i in Kconfig
Andre Przywara [Mon, 2 Jan 2017 11:48:37 +0000 (11:48 +0000)]
sunxi: provide default DRAM config for sun50i in Kconfig

To avoid enumerating the very same DRAM values in defconfig files
for each and every Allwinner A64 board out there, let's put some sane
default values in the Kconfig file.
Boards with different needs can override them at any time.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agosunxi: A64: do an RMR switch if started in AArch32 mode
Andre Przywara [Mon, 2 Jan 2017 11:48:36 +0000 (11:48 +0000)]
sunxi: A64: do an RMR switch if started in AArch32 mode

The Allwinner A64 SoC starts execution in AArch32 mode, and both
the boot ROM and Allwinner's boot0 keep running in this mode.
So U-Boot gets entered in 32-bit, although we want it to run in AArch64.

By using a "magic" instruction, which happens to be an almost-NOP in
AArch64 and a branch in AArch32, we differentiate between being
entered in 64-bit or 32-bit mode.
If in 64-bit mode, we proceed with the branch to reset, but in 32-bit
mode we trigger an RMR write to bring the core into AArch64/EL3 and
re-enter U-Boot at CONFIG_SYS_TEXT_BASE.
This allows a 64-bit U-Boot to be both entered in 32 and 64-bit mode,
so we can use the same start code for the SPL and the U-Boot proper.

We use the existing custom header (boot0.h) functionality, but restrict
the existing boot0 header reservation to the non-SPL build now. A SPL
wouldn't need such header anyway. This allows to have both options
defined and lets us use one for the SPL and the other for U-Boot proper.

Also add arch/arm/mach-sunxi/rmr_switch.S, which contains the original
ARM assembly code and instructions how to re-generate the encoded
version.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agosunxi: introduce extra config option for boot0 header
Andre Przywara [Mon, 2 Jan 2017 11:48:35 +0000 (11:48 +0000)]
sunxi: introduce extra config option for boot0 header

The ENABLE_ARM_SOC_BOOT0_HOOK option is a generic option shared with
other boards. To allow alternative code to be inserted, we create
another, now function specific config symbol on top of it to simplify
later additions. No functional change at this time.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agoARM: boot0 hook: remove macro, include whole header file
Andre Przywara [Mon, 2 Jan 2017 11:48:34 +0000 (11:48 +0000)]
ARM: boot0 hook: remove macro, include whole header file

For prepending some board specific header area to U-Boot images we
were so far including a header file with a macro definition containing
the actual header specification.
This works fine if there are just a few statements and if there is only
one alternative.
However adding more complex code quickly gets messy with this approach,
so let's just drop that intermediate macro and let the #include actually
insert the code directly.
This converts the callers and the callees, but doesn't change anything
at this point.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Steve Rae <steve.rae@raedomain.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agoarmv8: move reset branch into boot hook
Andre Przywara [Mon, 2 Jan 2017 11:48:33 +0000 (11:48 +0000)]
armv8: move reset branch into boot hook

The boot0 hook we have so far is applied _after_ the initial branch
to the "reset" entry point. An upcoming change requires even this
branch to be changed, so we apply the hook macro at the earliest
point, and have the branch in the hook file as well.
This is no functional change at this point, just refactoring to simplify
upcoming patches.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agoarmv8: add simple sdelay implementation
Andre Przywara [Mon, 2 Jan 2017 11:48:32 +0000 (11:48 +0000)]
armv8: add simple sdelay implementation

The sunxi DRAM setup code needs an sdelay() implementation, which
wasn't defined for armv8 so far.
Shamelessly copy the armv7 version and adjust it to work in AArch64.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agoSPL: make struct spl_image 64-bit safe
Andre Przywara [Mon, 2 Jan 2017 11:48:31 +0000 (11:48 +0000)]
SPL: make struct spl_image 64-bit safe

Since entry_point and load_addr are addresses, they should be
represented as longs to cover the whole address space and to avoid
warning when compiling the SPL in 64-bit.
Also adjust debug prints to add the 'l' specifier, where needed.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agomove UL() macro from armv8/mmu.h into common.h
Andre Przywara [Mon, 2 Jan 2017 11:48:30 +0000 (11:48 +0000)]
move UL() macro from armv8/mmu.h into common.h

The UL() macro is pretty useful in sharing constants between assembly
and C files while still being able to specify a type for C.
Move the macro from an armv8 specific header into a common header file
to be able to use it by arm code (for instance) as well.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agoSPL: tiny-printf: ignore "-" modifier
Andre Przywara [Mon, 2 Jan 2017 11:48:29 +0000 (11:48 +0000)]
SPL: tiny-printf: ignore "-" modifier

tiny-printf does not know about the "-" modifier, which aligns numbers.
This is used by some SPL code, but as it's purely cosmetical, we just
ignore this modifier here to avoid changing correct printf strings.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agoSPL: tiny-printf: add "l" modifier
Andre Przywara [Mon, 2 Jan 2017 11:48:28 +0000 (11:48 +0000)]
SPL: tiny-printf: add "l" modifier

tiny-printf does not know about the "l" modifier so far, which breaks
the crash dump on AArch64, because it uses %lx to print the registers.
Add an easy way of handling longs correctly.

Using a relatively decent compiler (GCC 5.3.0) this does _not_ increase
the code size of tiny-printf.o for 32-bit builds (where long and int
are actually the same), actually it looses three (ARM Thumb2) instructions
from the actual SPL (numbers for orangepi_plus_defconfig):
  text    data     bss     dec     hex filename
   758       0       0     758     2f6 spl/lib/tiny-printf.o before
 18839     488     232   19559    4c67 spl/u-boot-spl before
   758       0       0     758     2f6 spl/lib/tiny-printf.o after
 18833     488     232   19553    4c61 spl/u-boot-spl after

This adds some substantial amount of code to a 64-bit build, though:
(taken after a later commit, which enables the ARM64 SPL build for sunxi)
  text    data     bss     dec     hex filename
  1542       0       0    1542     606 spl/lib/tiny-printf.o before
 25830     392     360   26582    67d6 spl/u-boot-spl before
  1758       0       0    1758     6de spl/lib/tiny-printf.o after
 26040     392     360   26792    68a8 spl/u-boot-spl after

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agoarmv8: add lowlevel_init.S
Andre Przywara [Mon, 2 Jan 2017 11:48:27 +0000 (11:48 +0000)]
armv8: add lowlevel_init.S

For boards that call s_init() when the SPL runs, we are expected to
setup an early stack before calling this C function.
Implement the proper AArch64 version of this based on the ARMv7 code.
This allows sunxi boards to setup the basic peripherals even with a
64-bit SPL.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agoarmv8: prevent using THUMB
Andre Przywara [Mon, 2 Jan 2017 11:48:26 +0000 (11:48 +0000)]
armv8: prevent using THUMB

The predominantely 32-bit ARM targets try to compile the SPL in Thumb
mode to reduce code size.
The 64-bit AArch64 instruction set does not know an alternative, concise
encoding, so the Thumb build option should only be set for 32-bit
targets.
Likewise -marm machine options are only valid for ARMv7 targets.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agosun6i: Restrict some register initialization to Allwinner A31 SoC
Andre Przywara [Mon, 2 Jan 2017 11:48:25 +0000 (11:48 +0000)]
sun6i: Restrict some register initialization to Allwinner A31 SoC

These days many Allwinner SoCs use clock_sun6i.c, although out of them
only the (original sun6i) A31 has a second MBUS clock register.
Also the requirement for setting up the PRCM PLL_CTLR1 register to provide
the proper voltage seems to be a property of older SoCs only as well.

Restrict the MBUS initialization to this SoC only to avoid writing bogus
values to (undefined) registers in other chips.
I can only verify that the PLL voltage setup is not needed for H3 and
A64, so for now we only spare those two SoCs.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agospl: sunxi: Fix build error with CONFIG_SPL_SPI_SUNXI
Priit Laes [Mon, 2 Jan 2017 18:24:50 +0000 (20:24 +0200)]
spl: sunxi: Fix build error with CONFIG_SPL_SPI_SUNXI

Fix typo introduced in ebc4ef61d76fc182773fe225151adc9b913c62eb

Signed-off-by: Priit Laes <plaes@plaes.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agoARM: dts: tegra: Sync paz00 with Linux 4.8
Misha Komarovskiy [Sun, 11 Dec 2016 19:28:12 +0000 (22:28 +0300)]
ARM: dts: tegra: Sync paz00 with Linux 4.8

Sync with Linux 4.8 dts plus vdd_bl regulator
to fix backlight start, display timings and USB
controller aliases fix.

Signed-off-by: Misha Komarovskiy <zombah@gmail.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
7 years agocolibri_t20: fix ulpi reset polarity
Marcel Ziswiler [Mon, 19 Dec 2016 14:38:07 +0000 (15:38 +0100)]
colibri_t20: fix ulpi reset polarity

Fix ULPI reset polarity which caused a hard hang on Colibri T20 upon
attempting to start the USB subsystem:

This fixes my late commit d5a24d8b53d350364bd429b7104ec369b817e4b8
(colibri_t20: fix usb operation and controller order) inadvertently
having overwritten Stephen's previous commit
2f6a7e8ce5df8b99d84bfd486c6f99d92322ce04 (ARM: tegra: fix USB ULPI PHY
reset signal inversion confusion).

While at it also fix comment about on-module USB port.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
7 years agoapalis_t30: comment about disabled pcie nodes
Marcel Ziswiler [Mon, 19 Dec 2016 14:38:06 +0000 (15:38 +0100)]
apalis_t30: comment about disabled pcie nodes

Add a comment about the disabled PCIe port nodes.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
7 years agopci: kconfig: fix spelling in description
Marcel Ziswiler [Mon, 19 Dec 2016 14:38:05 +0000 (15:38 +0100)]
pci: kconfig: fix spelling in description

Fix 'driver model' rather than 'driver mode' in description.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
7 years agovideo: tegra: fix spelling in comment
Marcel Ziswiler [Mon, 19 Dec 2016 14:38:04 +0000 (15:38 +0100)]
video: tegra: fix spelling in comment

Get rid of spurious 'are' in the comment.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
7 years agoARM: tegra: allow passing cboot DTB to the kernel
Stephen Warren [Fri, 2 Dec 2016 19:26:42 +0000 (12:26 -0700)]
ARM: tegra: allow passing cboot DTB to the kernel

Some users may wish to pass the cboot-supplied DTB to the booted kernel
rather than having U-Boot load the DTB itself. To allow this, expose the
address of the cboot-supplied DTB in environment variable $fdt_addr. At
least when using extlinux.conf, if the user doesn't explicitly specify
which DTB to pass to the kernel, U-Boot passes the DTB referred to by
this variable.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
7 years agoPrepare v2017.01-rc3 v2017.01-rc3
Tom Rini [Tue, 3 Jan 2017 01:00:55 +0000 (20:00 -0500)]
Prepare v2017.01-rc3

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoMerge branch 'master' of git://www.denx.de/git/u-boot-imx
Tom Rini [Mon, 2 Jan 2017 21:32:05 +0000 (16:32 -0500)]
Merge branch 'master' of git://denx.de/git/u-boot-imx

7 years agoudoo: neo: Fix indentation
Fabio Estevam [Mon, 2 Jan 2017 10:44:04 +0000 (08:44 -0200)]
udoo: neo: Fix indentation

The standard way is to put ifdef/endif in the very first column.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
7 years agoimx6ul: geam6ul: Enable I2C support
Jagan Teki [Wed, 21 Dec 2016 21:14:46 +0000 (22:14 +0100)]
imx6ul: geam6ul: Enable I2C support

Enable I2C support for Engicam GEAM6UL NAND module.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
7 years agoimx6ul: geam6ul: Add MAINTAINERS for nand_defconfig
Jagan Teki [Wed, 21 Dec 2016 11:02:13 +0000 (12:02 +0100)]
imx6ul: geam6ul: Add MAINTAINERS for nand_defconfig

Add Jagan as MAINTAINERS of configs/imx6ul_geam_nand_defconfig

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
7 years agoconfigs: engicam: Add fitboot env support
Jagan Teki [Wed, 21 Dec 2016 11:00:29 +0000 (12:00 +0100)]
configs: engicam: Add fitboot env support

Add FIT image booting from MMC device, during MMC bootcmd
u-boot env script look for bootscript, else fit image or else
finally look for legacy image uImage.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
7 years agoconfigs: engicam: Cleanup on mmcboot env
Jagan Teki [Wed, 21 Dec 2016 11:00:28 +0000 (12:00 +0100)]
configs: engicam: Cleanup on mmcboot env

- Add tab space
- remove exctra 'mmc dev ${mmcdev}'

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
7 years agoconfigs: engicam: Enable CONFIG_IMAGE_FORMAT_LEGACY
Jagan Teki [Wed, 21 Dec 2016 11:00:27 +0000 (12:00 +0100)]
configs: engicam: Enable CONFIG_IMAGE_FORMAT_LEGACY

Enabling FIT along with Signature will make bootm to
not-understanding u-boot legacy image formats like uImage, etc.
So this patch enabling legacy image format for backward compatibility.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
7 years agodefconfigs: imx6: engicam: Enable FIT
Jagan Teki [Wed, 21 Dec 2016 11:00:26 +0000 (12:00 +0100)]
defconfigs: imx6: engicam: Enable FIT

Enable Flattened Image Tree support for all Engicam boards.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
7 years agoimx6: engicam: Add nandboot env support
Jagan Teki [Wed, 21 Dec 2016 11:00:25 +0000 (12:00 +0100)]
imx6: engicam: Add nandboot env support

Add config options for booting Linux from NAND in UBI format.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
7 years agodefconfigs: engicam: Enable UBI commands
Jagan Teki [Wed, 21 Dec 2016 11:00:24 +0000 (12:00 +0100)]
defconfigs: engicam: Enable UBI commands

Create ubifs.img:
$ mkfs.ubifs -q -r /rootfs -m 4096 -e 253952 -c 7936 -o ubifs.img

Write ubifs.img:
---------------
icorem6qdl> nand erase.part rootfs
icorem6qdl> ubi part rootfs
icorem6qdl> ubi create rootfs

icorem6qdl> ext4load mmc 0:2 ${loadaddr} ubifs.img
166592512 bytes read in 8091 ms (19.6 MiB/s)
icorem6qdl> ubi write ${loadaddr} rootfs ${filesize}
166592512 bytes written to volume rootfs
icorem6qdl> ubifsmount ubi0:rootfs

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
7 years agodefconfigs: engicam: Enable MMC commands in nand
Jagan Teki [Wed, 21 Dec 2016 11:00:23 +0000 (12:00 +0100)]
defconfigs: engicam: Enable MMC commands in nand

For writing Linux or rootfs on to NAND, the best suitable way
is to use MMC commands since MMC driver by default enabled by
mx6_common.h, hence enabled MMC commands in nand defconfigs.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
7 years agoconfigs: engicam: Rename nand with gpmi-name in mtdparts
Jagan Teki [Wed, 21 Dec 2016 11:00:22 +0000 (12:00 +0100)]
configs: engicam: Rename nand with gpmi-name in mtdparts

gpmi-nand is the proper name used in nand driver from Linux for all
imx related nand boards, so rename mtdparts name as gpmi-nand instead
of nand, this will eventually reflects all nand info to Linux from
u-boot like mtdparts.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
7 years agoimx6: engicam: Use bootm instead of bootz
Jagan Teki [Wed, 21 Dec 2016 11:00:21 +0000 (12:00 +0100)]
imx6: engicam: Use bootm instead of bootz

Boot Linux with uImage instead of zImage, so update
bootz with bootm.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
7 years agoconfigs: engicam: Increase nand kernel partition size
Jagan Teki [Wed, 21 Dec 2016 11:00:20 +0000 (12:00 +0100)]
configs: engicam: Increase nand kernel partition size

Increase the nand kernel partition size, for supporting
large uImage files, maximum 8MiB.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>