oweals/u-boot.git
10 years agolzma: fix buffer bound check error
Antonios Vamporakis [Tue, 31 Dec 2013 01:57:01 +0000 (02:57 +0100)]
lzma: fix buffer bound check error

Variable uncompressedSize references the space available, while outSizeFull is
the actual expected uncompressed size. Using the wrong value causes LzmaDecode
to return SZ_ERROR_INPUT_EOF. Problem was introduced in commit afca294. While
at it add additional debug message.

Signed-off-by: Antonios Vamporakis <ant@area128.com>
CC: Kees Cook <keescook@chromium.org>
CC: Simon Glass <sjg@chromium.org>
CC: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
CC: Luka Perkov <luka@openwrt.org>
10 years agoPrepare v2014.01-rc3 v2014.01-rc3
Tom Rini [Mon, 13 Jan 2014 19:36:17 +0000 (14:36 -0500)]
Prepare v2014.01-rc3

Signed-off-by: Tom Rini <trini@ti.com>
10 years agoMerge branch 'master' of git://git.denx.de/u-boot-arm
Tom Rini [Mon, 13 Jan 2014 18:50:25 +0000 (13:50 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-arm

10 years agoMerge branch 'master' of git://git.denx.de/u-boot-spi
Tom Rini [Mon, 13 Jan 2014 18:45:15 +0000 (13:45 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-spi

10 years agoMerge branch 'master' of git://git.denx.de/u-boot-video
Tom Rini [Mon, 13 Jan 2014 13:41:04 +0000 (08:41 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-video

10 years agoARM: pxa: Fix OneNAND window access on VPAC270
Marek Vasut [Wed, 25 Dec 2013 23:53:26 +0000 (00:53 +0100)]
ARM: pxa: Fix OneNAND window access on VPAC270

Access the OneNAND 1KiB window on the VPAC270 as an SRAM instead of accessing
it as a burst-RAM. This fixes a problem where the board failed to reboot
sometimes as the CPU couldn't start executing from the OneNAND 1KiB window.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
10 years agoARM: pxa: Fix OneNAND SPL builds
Marek Vasut [Wed, 25 Dec 2013 23:46:49 +0000 (00:46 +0100)]
ARM: pxa: Fix OneNAND SPL builds

The OneNAND SPL used on PXA is slightly obscure. Due to the OneNAND limitation,
where we have only the first 1KiB of the OneNAND available upon power-up as a
memory-mapped area, from which the CPU starts executing, we place only the most
essential code into this first 1KiB . This code copies the rest of the SPL into
SRAM and jumps to it. This code is stored in section .text.0 .

The rest of the SPL is stored in section .text.1 . When running the OBJCOPY on
the SPL, it will preserve only .text section, but the .text.0 and .text.1 are
stripped away from the result, thus making the SPL binary empty. The patch adds
additional -j parameters to the OBJCOPY for PXA during the SPL build, which will
preserve the .text.0 and .text.1 sections.

Moreover, this patch also adds missing functions into the .text.0 section, since
otherwise the PXA270 with 1KiB-window OneNAND won't be able to boot.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
10 years agousb: ums: wait for usb cable connection before enter ums mode
Przemyslaw Marczak [Tue, 7 Jan 2014 14:08:37 +0000 (15:08 +0100)]
usb: ums: wait for usb cable connection before enter ums mode

Before this change ums mode can not be entered when device
was using the same usb port for usb/uart communication.
Switching USB cable from UART to USB always causes ums exit.

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
10 years agousb: exynos5: arndale: Add network support
Inderpal Singh [Wed, 8 Jan 2014 03:49:57 +0000 (09:19 +0530)]
usb: exynos5: arndale: Add network support

Arndale board has AX88760, which is USB 2.0 Hub & USB 2.0 Ethernet Combo
controller, connected to HSIC Phy of USB host controller via USB3503 hub.

This patch uses board specific board_usb_init function to perform reset
sequence for USB3503 hub and enables the relevant config options for
network to work.

Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org>
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
10 years agousb: ehci: exynos: set/reset hsic phys
Inderpal Singh [Wed, 8 Jan 2014 03:49:56 +0000 (09:19 +0530)]
usb: ehci: exynos: set/reset hsic phys

The controller has 3 ports. The port0 is for USB 2.0 Phy, port1 and port2
are for HSIC phys. The usb 2.0 phy is already being setup. This patch
sets up the hsic phys.

Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org>
10 years agousb: gadget: fotg210: EP0 fifo empty indication is non-reliable
Kuo-Jung Su [Fri, 20 Dec 2013 04:33:00 +0000 (12:33 +0800)]
usb: gadget: fotg210: EP0 fifo empty indication is non-reliable

The fifo size of ep0 is 64 bytes, and if the packet size grater than
64 bytes, the driver would have to fill up the fifo multiple times,
and before filling up the fifo, the driver should make sure the fifo
is empty by checking fifo empty indication.

However there is a hardware bug that the fifo empty indication is
somehow a bit earlier than fifo reset. So if I don't add an extra
delay here, the data might be corrupted. (i.e., 1 byte missing)

After a couple of tests, it truns out that 1 usec is good enough.

This workaround should be applied to all hardware revisions.

Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
CC: Marek Vasut <marex@denx.de>
10 years agousb: gadget: fotg210: add w1c interrupt status support
Kuo-Jung Su [Fri, 20 Dec 2013 04:32:59 +0000 (12:32 +0800)]
usb: gadget: fotg210: add w1c interrupt status support

Since hardware revision 1.11.0, the following interrupt status
registers are now W1C (i.e., write 1 clear):

1. Interrupt Source Group 0 Register (0x144) (EP0 Abort: BIT5)
2. Interrupt Source Group 2 Register (0x14C) (All bits)

And before revision 1.11.0, these registers are all R/W.
Which means software must write a 0 to clear the status.

Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
CC: Marek Vasut <marex@denx.de>
10 years agovideo: ipu reg: Correct reserved array size in struct ipu_idmac
Liu Ying [Sun, 22 Dec 2013 05:02:42 +0000 (13:02 +0800)]
video: ipu reg: Correct reserved array size in struct ipu_idmac

The array reserved as a placeholder in the structure ipu_idmac
should contain 44 32bit unsigned integer entries instead of 45
ones, because the placeholder is located bewteen the register
IDMAC_SC_CORD1 and the register IDMAC_CH_BUSY_1 with the address
offsets of 0x804c and 0x8100 respectively.

Reported-by: Robin Gong <b38343@freescale.com>
Acked-by: Robin Gong <b38343@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
10 years agovideo: ipu reg: Correct reserved1 array size in struct ipu_cm
Liu Ying [Sun, 22 Dec 2013 05:02:41 +0000 (13:02 +0800)]
video: ipu reg: Correct reserved1 array size in struct ipu_cm

The array reserved1 as a placeholder in the structure ipu_cm
should contain 4 32bit unsigned integer entries instead of 16
ones, because the placeholder is located bewteen the register
IPU_CH_DB_MODE_SEL_1 and the register IPU_ALT_CH_DB_MODE_SEL_0
with the address offsets of 0x154 and 0x168 respectively.

Reported-by: Robin Gong <b38343@freescale.com>
Acked-by: Robin Gong <b38343@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
10 years agosf: params: Removed flag SECT_4K for Micron N25Q128
Siva Durga Prasad Paladugu [Wed, 8 Jan 2014 05:57:07 +0000 (11:27 +0530)]
sf: params: Removed flag SECT_4K for Micron N25Q128

Remove the flag SECT_4K for device N25Q128 as the 4K-byte
sub sector erase granularity is available only for top/bottom
8 sectors in some of the N25Q128 chips.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agodoc: SPI: Update status.txt
Jagannadha Sutradharudu Teki [Wed, 8 Jan 2014 17:34:44 +0000 (23:04 +0530)]
doc: SPI: Update status.txt

Updated current SPI subsyetem status.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agosf: Add CONFIG_SF_DUAL_FLASH
Jagannadha Sutradharudu Teki [Sat, 11 Jan 2014 09:55:04 +0000 (15:25 +0530)]
sf: Add CONFIG_SF_DUAL_FLASH

This config will use for defining greater than single flash support.
currently - DUAL_STACKED and DUAL_PARALLEL.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agosf: Add dual memories support - DUAL_PARALLEL
Jagannadha Sutradharudu Teki [Mon, 6 Jan 2014 18:41:35 +0000 (00:11 +0530)]
sf: Add dual memories support - DUAL_PARALLEL

This patch added support for accessing dual memories in
parallel connection with single chipselect line from controller.

For more info - see doc/SPI/README.dual-flash

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agosf: Add dual memories support - DUAL_STACKED
Jagannadha Sutradharudu Teki [Sun, 12 Jan 2014 16:10:11 +0000 (21:40 +0530)]
sf: Add dual memories support - DUAL_STACKED

This patch added support for accessing dual memories in
stacked connection with single chipselect line from controller.

For more info - see doc/SPI/README.dual-flash

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agosf: ops: Unify read_ops bank configuration
Jagannadha Sutradharudu Teki [Sat, 11 Jan 2014 11:27:07 +0000 (16:57 +0530)]
sf: ops: Unify read_ops bank configuration

Unified the bar code from read_ops into a spi_flash_bar()

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agosf: Code cleanups
Jagannadha Sutradharudu Teki [Sun, 12 Jan 2014 16:08:21 +0000 (21:38 +0530)]
sf: Code cleanups

- comment typo's
- func args have a proper names

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agosf: Divide flash register ops from QEB code
Jagannadha Sutradharudu Teki [Mon, 30 Dec 2013 16:46:23 +0000 (22:16 +0530)]
sf: Divide flash register ops from QEB code

QEB code comprises of couple of flash register read/write operations,
this patch moved flash register operations on to sf_op

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agosf: probe: Enable macronix quad read/write cmds support
Jagannadha Sutradharudu Teki [Thu, 26 Dec 2013 08:46:50 +0000 (14:16 +0530)]
sf: probe: Enable macronix quad read/write cmds support

Added macronix flash quad read/write commands support and
it's up to the respective controller driver usecase to
configure the respective commands by defining SPI RX/TX
operation modes from include/spi.h on the driver.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agosf: Add macronix set QEB support
Jagannadha Sutradharudu Teki [Thu, 26 Dec 2013 08:43:36 +0000 (14:13 +0530)]
sf: Add macronix set QEB support

This patch adds set QEB support for macronix flash devices
which are trying to program/read quad operations.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agosf: Discover read dummy_byte
Jagannadha Sutradharudu Teki [Sat, 11 Jan 2014 11:20:45 +0000 (16:50 +0530)]
sf: Discover read dummy_byte

Discovered the read dummy_byte based on the
configured read command.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agosf: Add QUAD_IO_FAST read support
Jagannadha Sutradharudu Teki [Tue, 24 Dec 2013 09:54:31 +0000 (15:24 +0530)]
sf: Add QUAD_IO_FAST read support

This patch adds support QUAD_IO_FAST read command.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agosf: Separate the flash params table
Jagannadha Sutradharudu Teki [Mon, 23 Dec 2013 18:04:42 +0000 (23:34 +0530)]
sf: Separate the flash params table

Moved the flash params table from sf_probe.c and
placed on to sf_params.c, hence flash params file will
alter based on new addons.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agosf: probe: Enable RD_FULL and WR_QPP
Jagannadha Sutradharudu Teki [Mon, 23 Dec 2013 11:09:06 +0000 (16:39 +0530)]
sf: probe: Enable RD_FULL and WR_QPP

This patch enabled RD_FULL and WR_QPP for supported flashes
in micron, winbond and spansion.

Remaining parts will be add in future patches.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agosf: Set quad enable bit support
Jagannadha Sutradharudu Teki [Thu, 26 Dec 2013 08:24:57 +0000 (13:54 +0530)]
sf: Set quad enable bit support

This patch provides support to set the quad enable bit on flash.

quad enable bit needs to set before performing any quad IO
operations on respective SPI flashes.

Currently added set  quad enable bit for winbond and spansion flash
devices. stmicro flash doesn't require to set as qeb is volatile.
remaining flash devices support will add in future patches.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agosf: ops: Add configuration register writing support
Jagannadha Sutradharudu Teki [Mon, 23 Dec 2013 10:17:48 +0000 (15:47 +0530)]
sf: ops: Add configuration register writing support

This patch provides support to program a flash config register.

Configuration register contains the control bits used to configure
the different configurations and security features of a device.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agosf: Add quad read/write commands support
Jagannadha Sutradharudu Teki [Sat, 11 Jan 2014 09:43:11 +0000 (15:13 +0530)]
sf: Add quad read/write commands support

This patch add quad commands support like
- QUAD_PAGE_PROGRAM => for write program
- QUAD_OUTPUT_FAST ->> for read program

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agosf: Add extended read commands support
Jagannadha Sutradharudu Teki [Sat, 11 Jan 2014 09:40:28 +0000 (15:10 +0530)]
sf: Add extended read commands support

Current sf uses FAST_READ command, this patch adds support to
use the different/extended read command.

This implementation will determine the fastest command by taking
the supported commands from the flash and the controller, controller
is always been a priority.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agospi: sh_spi: Use sh_spi_clear_bit() instead of open-coded
Axel Lin [Fri, 27 Dec 2013 05:51:55 +0000 (13:51 +0800)]
spi: sh_spi: Use sh_spi_clear_bit() instead of open-coded

We have a sh_spi_clear_bit() function, there's no reason not to use it.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agosandbox: spi: Adjust 'sf test' to work on sandbox
Simon Glass [Sun, 10 Nov 2013 17:26:51 +0000 (10:26 -0700)]
sandbox: spi: Adjust 'sf test' to work on sandbox

Add map_sysmem() calls so that this test works correctly on sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Hung-ying Tyan <tyanh@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agospi: Add Faraday SPI controller support
Kuo-Jung Su [Fri, 20 Dec 2013 07:24:30 +0000 (12:54 +0530)]
spi: Add Faraday SPI controller support

The Faraday FTSSP010 is a multi-function controller
which supports I2S/SPI/SSP/AC97/SPDIF. However This
patch implements only the SPI mode.

NOTE:
The DMA and CS/Clock control logic has been altered
since hardware revision 1.19.0. So this patch
would first detects the revision id of the underlying
chip, and then switch to the corresponding software
control routines.

Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
CC: Tom Rini <trini@ti.com>
10 years agoMerge branch 'master' of git://git.denx.de/u-boot-arm
Tom Rini [Fri, 10 Jan 2014 15:56:00 +0000 (10:56 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-arm

Bringing in the MMC tree means that CONFIG_BOUNCE_BUFFER needed to be
added to include/configs/exynos5-dt.h now.

Conflicts:
include/configs/exynos5250-dt.h

Signed-off-by: Tom Rini <trini@ti.com>
10 years agodoc: Update the zynq u-boot status
Jagannadha Sutradharudu Teki [Wed, 8 Jan 2014 20:18:31 +0000 (01:48 +0530)]
doc: Update the zynq u-boot status

Updated doc/README.zynq to current status

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agozynq: Enable CONFIG_DEFAULT_DEVICE_TREE
Jagannadha Sutradharudu Teki [Wed, 8 Jan 2014 20:18:30 +0000 (01:48 +0530)]
zynq: Enable CONFIG_DEFAULT_DEVICE_TREE

Enabled default dts files on respective pre-board config
files this is way MAKEALL will works. and it's upto user
to build specific dts by specifying at build time.

$ make zynq_zc70x_config
$ make -->  with default dts zynq-zc702.dts
or
$ make DEVICE_TREE=zynq-zc702 --> Same configuration with zynq-zc706.dts

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agodts: zynq: Add more zynq dts files
Jagannadha Sutradharudu Teki [Wed, 8 Jan 2014 20:18:29 +0000 (01:48 +0530)]
dts: zynq: Add more zynq dts files

This patch adds initial dts support for supported
zynq boards.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agozynq-common: Enable verified boot(RSA)
Jagannadha Sutradharudu Teki [Wed, 8 Jan 2014 20:18:28 +0000 (01:48 +0530)]
zynq-common: Enable verified boot(RSA)

CONFIG_FIT_SIGNATURE - signature node support in FIT image
CONFIG_RSA - RSA lib support

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agogpio: zynq: Add dummy gpio routines
Jagannadha Sutradharudu Teki [Wed, 8 Jan 2014 20:18:27 +0000 (01:48 +0530)]
gpio: zynq: Add dummy gpio routines

GPIO dummy routines are required for fdt build, may be removed
these dependencies once the u-boot fdt is fully optimized.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agodts: zynq: Add basic fdt support
Jagannadha Sutradharudu Teki [Wed, 8 Jan 2014 20:18:26 +0000 (01:48 +0530)]
dts: zynq: Add basic fdt support

This patch provides a basic fdt support for zynq u-boot.

zynq-7000.dtsi-> initial arch dts file
zynq-zed.dts -> initial zed board dts file
more devices should be added in subsequent patches.

u-boot build: once configuring of a board done
for building dtb with zynq-zed.dts as an input
zynq-uboot> make DEVICE_TREE=zynq-zed

Enabled CONFIG_OF_SEPARATE for building dtb separately.
There is a new binary called u-boot-dtb.bin which is a u-boot
with devicetree supported.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agozynq-common: Define CONFIG_ENV_OVERWRITE
Jagannadha Sutradharudu Teki [Wed, 8 Jan 2014 20:18:25 +0000 (01:48 +0530)]
zynq-common: Define CONFIG_ENV_OVERWRITE

Defined CONFIG_ENV_OVERWRITE, which allow to
overwrite serial baudrate and ethaddr.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agozynq-common: Define flash env. partition
Jagannadha Sutradharudu Teki [Wed, 8 Jan 2014 20:18:24 +0000 (01:48 +0530)]
zynq-common: Define flash env. partition

Last 128Kb sector of 1Mb flash is defined as u-boot
environment partition.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agozynq-common: Change Env. Sector size to 128Kb
Jagannadha Sutradharudu Teki [Wed, 8 Jan 2014 20:18:23 +0000 (01:48 +0530)]
zynq-common: Change Env. Sector size to 128Kb

Changed Env. Sector size from 0x10000 to 128Kb

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agozynq-common: Define default environment
Jagannadha Sutradharudu Teki [Wed, 8 Jan 2014 20:18:22 +0000 (01:48 +0530)]
zynq-common: Define default environment

Defined default env. for autoboot FIT image from
respective boot devices.

Default settings:
fit_image=fit.itb
load_addr=0x2000000
fit_size=0x800000
flash_off=0x100000
nor_flash_off=0xE2100000

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agozynq: Add support to find bootmode
Jagannadha Sutradharudu Teki [Wed, 8 Jan 2014 20:18:21 +0000 (01:48 +0530)]
zynq: Add support to find bootmode

Added support to find the bootmodes by reading
slcr bootmode register. this can be helpful to
autoboot the configurations w.r.t a specified bootmode.

Added this functionality on board_late_init as it's not
needed for normal initializtion part.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agozynq: Add zynq_zc770 xm012 board support
Jagannadha Sutradharudu Teki [Wed, 8 Jan 2014 20:18:20 +0000 (01:48 +0530)]
zynq: Add zynq_zc770 xm012 board support

ZC770 is a complete development board based on the Xilinx Zynq-7000
All Programmable SoC, similar to ZC70x board but which has four
different daughter cards, like XM010, XM011, XM012 and XM013

ZC770 XM012:
- 1GB DDR3
- 64MiB Numonyx NOR flash
- USB-UART

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Cc: Stefan Roese <sr@denx.de>
10 years agozynq: Add zynq_zc770 xm013 board support
Jagannadha Sutradharudu Teki [Wed, 8 Jan 2014 20:18:19 +0000 (01:48 +0530)]
zynq: Add zynq_zc770 xm013 board support

ZC770 is a complete development board based on the Xilinx Zynq-7000
All Programmable SoC, similar to ZC70x board but which has four
different daughter cards, like XM010, XM011, XM012 and XM013

ZC770 XM013:
- 1GB DDR3
- 128 Mb Quad-SPI Flash(dual parallel)
- USB-UART

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agozynq: Add zynq_zc770 xm010 board support
Jagannadha Sutradharudu Teki [Wed, 8 Jan 2014 20:18:18 +0000 (01:48 +0530)]
zynq: Add zynq_zc770 xm010 board support

ZC770 is a complete development board based on the Xilinx Zynq-7000
All Programmable SoC, similar to ZC70x board but which has four
different daughter cards, like XM010, XM011, XM012 and XM013

ZC770 XM010:
- 1Gb DDR3
- 1Mb SST SPI flash
- 128 Mb Quad-SPI Flash
- 8 Mb SST SI flash
- Full size SD/MMC card cage
- 10/100/1000 Ethernet
- USB-UART

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agozynq: Add zynq microzed board support
Jagannadha Sutradharudu Teki [Wed, 8 Jan 2014 20:18:17 +0000 (01:48 +0530)]
zynq: Add zynq microzed board support

MicroZed is a low-cost development board based on
the Xilinx Zynq-7000 All Programmable SoC.

APSOC:
- XC7Z010-1CLG400C
Memory:
- 1 GB of DDR3 SDRAM
- 128Mb of QSPI flash(S25FL128SAGBHI200)
- Micro SD card interface
Communication:
- 10/100/1000 Ethernet
- USB 2.0
- USB-UART
User I/O:
- 100 User I/O (50 per connector)
- Configurable as up to 48 LVDS pairs or 100 single-ended I/O
Misc:
- Xilinx PC4 JTAG configuration port
- PS JTAG pins accessible via Pmod
- 33.33 MHz oscillator
- User LED and push switch

For more info - http://zedboard.org/product/microzed

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agozynq: zc70x: Add Catalyst 24WC08 EEPROM config support
Jagannadha Sutradharudu Teki [Wed, 8 Jan 2014 20:18:16 +0000 (01:48 +0530)]
zynq: zc70x: Add Catalyst 24WC08 EEPROM config support

Adds configurations for Catalyst 24WC08 EEPROM, which
is present on the zynq boards.

Enable EEPROM support for zc70x boards.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agozynq-common: Define exact TEXT_BASE
Jagannadha Sutradharudu Teki [Wed, 8 Jan 2014 20:18:15 +0000 (01:48 +0530)]
zynq-common: Define exact TEXT_BASE

Defined TEXT_BASE for u-boot starts from 0x4000000
w.r.t zynq memory-map.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agozynq: Move CONFIG_SYS_SDRAM_SIZE to pre-board configs
Jagannadha Sutradharudu Teki [Wed, 8 Jan 2014 20:18:14 +0000 (01:48 +0530)]
zynq: Move CONFIG_SYS_SDRAM_SIZE to pre-board configs

CONFIG_SYS_SDRAM_SIZE is specific to a board hence moved
to specific pre-config board files.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agozynq: Add zynq zed board support
Jagannadha Sutradharudu Teki [Wed, 8 Jan 2014 20:18:13 +0000 (01:48 +0530)]
zynq: Add zynq zed board support

Zed is a complete development board based on the
Xilinx Zynq-7000 All Programmable SoC.

APSOC:
- XC7Z020-CLG484-1
Memory:
- 512 MB DDR3
- 256 Mb Quad-SPI Flash(
- Full size SD/MMC card cage
Connectivity:
- 10/100/1000 Ethernet
- USB OTG (Device/Host/OTG)
- USB-UART
Expansion:
- FMC (Low Pin Count)
- Pmod. headers (2x6)
Video/Display:
- HDMI output (1080p60 + audio)
- VGA connector
- 128 x 32 OLED
- User LEDs (9)
User inputs:
- Slide switches (8)
- Push button switches (7)
Audio:
- 24-bit stereo audio CODEC
- Stereo line in/out
- Headphone
- Microphone input
Analog:
- Xilinx XADC header
- Supports 4 analog inputs
- 2 Differential / 4 Single-ended
Debug:
- On-board USB JTAG programming port
- ARM Debug Access Port (DAP)

For more info - http://zedboard.org/product/zedboard

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agozynq: Add zynq zc70x board support
Jagannadha Sutradharudu Teki [Wed, 8 Jan 2014 20:18:12 +0000 (01:48 +0530)]
zynq: Add zynq zc70x board support

The Zynq-7000 APSOC zc702 and zc706 enabled complte embedded
processing includes ASIC and FPGA design.

ZC702-:

APSOC:
- XC7Z020-CLG484-1
Memory:
- DDR3 Component Memory 1GB
- 16MB Quad SPI Flash
- IIC - 1 KB EEPROM
Connectivity:
- Gigabit Ethernet GMII, RGMII and SGMII.
- USB OTG - Host USB
- IIC Bus Headers/HUB
- 1 CAN with Wake on CAN
- USB-UART
Video/Display:
- HDMI Video OUT
- 8X LEDs
Control & I/O:
- 3 User Push Buttons
- 2 User Switches
- 8 User LEDs

For more info on zc702 board:
- http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC702-G.htm

ZC706-:

APSOC:
- XC7Z045 FFG900 -2 AP SoC
Memory:
- DDR3 Component Memory 1GB (PS)
- DDR3 SODIM Memory 1GB (PL)
- 2X16MB Quad SPI Flash (dual parallel)
- IIC - 1 KB EEPROM
Connectivity:
- PCIe Gen2x4
- SFP+ and SMA Pairs
- GigE RGMII Ethernet (PS)
- USB OTG 1 (PS) - Host USB
- IIC Bus Headers/HUB (PS)
- 1 CAN with Wake on CAN (PS)
- USB-UART
Video/Display:
- HDMI 8 color RGB 4.4.4 1080P-60 OUT
- HDMI IN 8 color RGB 4.4.4
Control & I/O:
- 2 User Push Buttons/Dip Switch, 2 User LEDs
- IIC access to GPIO
- SDIO (SD Card slot)
- 3 User Push Buttons, 2 User Switches, 8 User LEDs

For more info on zc706 board:
- http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC706-G.htm

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agodoc: zynq: Add information on zynq u-boot
Jagannadha Sutradharudu Teki [Wed, 8 Jan 2014 20:18:11 +0000 (01:48 +0530)]
doc: zynq: Add information on zynq u-boot

Information on zynq u-boot about
- zynq boards
- mainline status
- TODO

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agozynq-common: Rename zynq with zynq-common
Jagannadha Sutradharudu Teki [Wed, 8 Jan 2014 20:18:10 +0000 (01:48 +0530)]
zynq-common: Rename zynq with zynq-common

zynq.h -> zynq-common.h, zynq-common is Common
configuration options for all Zynq boards.

zynq.h is no longer exists hense removed from boards.cfg

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agozynq: Add GEM0, GEM1 configs support
Jagannadha Sutradharudu Teki [Wed, 8 Jan 2014 20:18:09 +0000 (01:48 +0530)]
zynq: Add GEM0, GEM1 configs support

Zynq ethernet controller support two GEM's like
CONFIG_ZYNQ_GEM0 and CONFIG_ZYNQ_GEM1 enabled
both so-that the respective board will define
these macros based on their usage.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agozynq: Add UART0, UART1 configs support
Jagannadha Sutradharudu Teki [Wed, 8 Jan 2014 20:18:08 +0000 (01:48 +0530)]
zynq: Add UART0, UART1 configs support

Zynq uart controller support two serial ports like
CONFIG_ZYNQ_SERIAL_UART0 and CONFIG_ZYNQ_SERIAL_UART1
enabled both so-that the respective board will define
these macros based on their usage.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agozynq: Enable cache options
Jagannadha Sutradharudu Teki [Wed, 8 Jan 2014 20:18:07 +0000 (01:48 +0530)]
zynq: Enable cache options

- Enable cache command
- Turn-off L2 cache
- Turn-on D-cache

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agozynq: Minor config cleanup
Jagannadha Sutradharudu Teki [Wed, 8 Jan 2014 20:18:06 +0000 (01:48 +0530)]
zynq: Minor config cleanup

Cleanups mostly on:
- Add comments
- Re-order configs
- Remove #define CONFIG_ZYNQ_SDHCI

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agozynq: Cleanup on memory configs
Jagannadha Sutradharudu Teki [Wed, 8 Jan 2014 20:18:05 +0000 (01:48 +0530)]
zynq: Cleanup on memory configs

Cleanup on memory configuration options:
- Add comment
- Re-order configs

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agozynq: Cleanup on miscellaneous configs
Jagannadha Sutradharudu Teki [Wed, 8 Jan 2014 20:18:04 +0000 (01:48 +0530)]
zynq: Cleanup on miscellaneous configs

Cleanup on miscellaneous configurable options:
- Rename SYS_PROMPT as "zynq-uboot"
- Add comment
- Re-order configs

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agozynq: Enable Boot FreeBSD/vxWorks
Jagannadha Sutradharudu Teki [Wed, 8 Jan 2014 20:18:03 +0000 (01:48 +0530)]
zynq: Enable Boot FreeBSD/vxWorks

This enabled Boot FreeBSD/vxWorks from an ELF image support

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agozynq: Enable CONFIG_FIT_VERBOSE
Jagannadha Sutradharudu Teki [Wed, 8 Jan 2014 20:18:02 +0000 (01:48 +0530)]
zynq: Enable CONFIG_FIT_VERBOSE

Enabled fit_format_{error,warning}()

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agoarm: make 'MAKEALL -a' distinguish between arm and aarch64
Albert ARIBAUD [Fri, 10 Jan 2014 09:19:45 +0000 (10:19 +0100)]
arm: make 'MAKEALL -a' distinguish between arm and aarch64

The vexpress_aemv8a is the first aarch64 board in U-Boot.
As it was introduced, it gets built when "MAKEALL -a arm"
is invoked, and fails as this command is run with a 32-bit,
not 64-bit, toolchain as the cross-compiler.

Introduce 'aarch64' as a valid 'MAKEALL -a' argument, treated
as 'arm' for all other intents, and change the architecture
of the vexpress_aemv8a entry in boards.cfg from 'arm' to
'aarch64'.

10 years agoarmv8: Use __aarch64__ rather than CONFIG_ARM64 in some cases
Tom Rini [Thu, 9 Jan 2014 20:11:27 +0000 (15:11 -0500)]
armv8: Use __aarch64__ rather than CONFIG_ARM64 in some cases

The toolchain sets __aarch64__ for both LE and BE.  In the case of
posix_types.h we cannot reliably use config.h as that will lead to
problems.  In the case of byteorder.h it's clearer to check the EB flag
being set in either case instead.

Cc: David Feng <fenghua@phytium.com.cn>
Signed-off-by: Tom Rini <trini@ti.com>
Amended by Albert ARIBAUD <albert.u.boot@aribaud.net> to
actually remove the config.h include from the posix_types.h
files, with permission from Tom Rini.

10 years agoMerge branch 'master' of git://git.denx.de/u-boot-mmc
Tom Rini [Thu, 9 Jan 2014 16:05:32 +0000 (11:05 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-mmc

10 years agoMerge branch 'master' of git://git.denx.de/u-boot-sh
Tom Rini [Thu, 9 Jan 2014 16:04:53 +0000 (11:04 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-sh

10 years agoarm64: MAKEALL, filter armv8 boards from LIST_arm
David Feng [Sat, 14 Dec 2013 03:47:38 +0000 (11:47 +0800)]
arm64: MAKEALL, filter armv8 boards from LIST_arm

Signed-off-by: David Feng <fenghua@phytium.com.cn>
10 years agoarm64: board support of vexpress_aemv8a
David Feng [Sat, 14 Dec 2013 03:47:37 +0000 (11:47 +0800)]
arm64: board support of vexpress_aemv8a

Signed-off-by: David Feng <fenghua@phytium.com.cn>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
10 years agoarm64: generic board support
David Feng [Sat, 14 Dec 2013 03:47:36 +0000 (11:47 +0800)]
arm64: generic board support

Signed-off-by: David Feng <fenghua@phytium.com.cn>
10 years agoarm64: core support
David Feng [Sat, 14 Dec 2013 03:47:35 +0000 (11:47 +0800)]
arm64: core support

Relocation code based on a patch by Scott Wood, which is:
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: David Feng <fenghua@phytium.com.cn>
10 years agoarm64: Make checkarmreloc accept arm64 relocations
Scott Wood [Sat, 14 Dec 2013 03:47:34 +0000 (11:47 +0800)]
arm64: Make checkarmreloc accept arm64 relocations

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: David Feng <fenghua@phytium.com.cn>
10 years agoarm64: Turn u-boot.bin back into an ELF file after relocate-rela
Scott Wood [Sat, 14 Dec 2013 03:47:33 +0000 (11:47 +0800)]
arm64: Turn u-boot.bin back into an ELF file after relocate-rela

While performing relocations on u-boot.bin should be good enough for
booting on real hardware, some simulators insist on booting an ELF file
(and yet don't perform ELF relocations), so convert the relocated
binary back into an ELF file.  This can go away in the future if we
change relocate-rela to operate directly on the ELF file, or if and
when we stop caring about a simulator with this restriction.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: David Feng <fenghua@phytium.com.cn>
10 years agoarm64: Add tool to statically apply RELA relocations
Scott Wood [Sat, 14 Dec 2013 03:47:32 +0000 (11:47 +0800)]
arm64: Add tool to statically apply RELA relocations

ARM64 uses the newer RELA-style relocations rather than the older REL.
RELA relocations have an addend in the relocation struct, rather than
expecting the loader to read a value from the location to be updated.

While this is beneficial for ordinary program loading, it's problematic
for U-Boot because the location to be updated starts out with zero,
rather than a pre-relocation value.  Since we need to be able to run C
code before relocation, we need a tool to apply the relocations at
build time.

In theory this tool is applicable to other newer architectures (mainly
64-bit), but currently the only relocations it supports are for arm64,
and it assumes a 64-bit little-endian target.  If the latter limitation
is ever to be changed, we'll need a way to tell the tool what format
the image is in.  Eventually this may be replaced by a tool that uses
libelf or similar and operates directly on the ELF file.  I've written
some code for such an approach but libelf does not make it easy to poke
addresses by memory address (rather than by section), and I was
hesitant to write code to manually parse the program headers and do the
update outside of libelf (or to iterate over sections) -- especially
since it wouldn't get test coverage on things like binaries with
multiple PT_LOAD segments.  This should be good enough for now to let
the manual relocation stuff be removed from the arm64 patches.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: David Feng <fenghua@phytium.com.cn>
10 years agoadd weak entry definition
David Feng [Sat, 14 Dec 2013 03:47:31 +0000 (11:47 +0800)]
add weak entry definition

Signed-off-by: David Feng <fenghua@phytium.com.cn>
10 years agocmd_pxe: remove compiling warnings
David Feng [Sat, 14 Dec 2013 03:47:30 +0000 (11:47 +0800)]
cmd_pxe: remove compiling warnings

Signed-off-by: David Feng <fenghua@phytium.com.cn>
10 years agofdt_support: 64bit initrd start address support
David Feng [Sat, 14 Dec 2013 03:47:29 +0000 (11:47 +0800)]
fdt_support: 64bit initrd start address support

Signed-off-by: David Feng <fenghua@phytium.com.cn>
10 years agosocfpga/dwmmc: Adding DesignWare MMC driver support for SOCFPGA
Chin Liang See [Tue, 31 Dec 2013 00:26:14 +0000 (18:26 -0600)]
socfpga/dwmmc: Adding DesignWare MMC driver support for SOCFPGA

To add the DesignWare MMC driver support for Altera SOCFPGA. It
required information such as clocks and bus width from platform
specific files (SOCFPGA handoff files)

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
10 years agommc: add setdsr support
Markus Niebel [Mon, 16 Dec 2013 12:40:46 +0000 (13:40 +0100)]
mmc: add setdsr support

The eMMC and the SD-Card specifications describe the optional SET_DSR command.
During measurements at our lab we found that some cards implementing this feature
having really strong driver strengts per default. This can lead to voltage peaks
above the specification of the host on signal edges for data sent from a card to
the host.

Since availability of a given card type may be shorter than the time a certain
hardware will be produced it is useful to have support for this command (Alternative
would be changing termination resistors and adapting the driver strength of the
host to the used card.)

Following proposal for an implementation:

- new field that reflects CSD field DSR_IMP in struct mmc
- new field for design specific DSR value in struct mmc
- board code can set DSR value in mmc struct just after registering an controller
- mmc_startup sends the the stored DSR value before selecting a card, if DSR_IMP is set

Additionally the mmc command is extended to make is possible to play around with different
DSR values.

The concept was tested on a i.MX53 based platform using a Micron eMMC card where the default
DSR is 0x0400 (12mA) but in our design 0x0100 (0x0100) were enough. To use this feature for
instance on a mx53loco one have to add a call to mmc_set_dsr() in board_mmc_init() after
calling fsl_esdhc_initialize() for the eMMC.

Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
10 years agommc: Minor cleanup of sdhci.c
Darwin Rambo [Thu, 19 Dec 2013 23:13:25 +0000 (15:13 -0800)]
mmc: Minor cleanup of sdhci.c

Fixup prints to show where the print is done from, and
a few minor formatting/grammar issues.

Signed-off-by: Darwin Rambo <drambo@broadcom.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
10 years agommc/dwmmc: use bounce buffer for data exchange between CPU and MMC controller
Alexey Brodkin [Thu, 26 Dec 2013 11:29:07 +0000 (15:29 +0400)]
mmc/dwmmc: use bounce buffer for data exchange between CPU and MMC controller

Bounce buffer implementation takes care of proper data buffer alignemt
and correct flush/invalidation of data cache at once so we no longer
depend on input data variety and make sure CPU and MMC controller deal
with expected data in case of enabled data cache.

Bounce buffer requires to add its definition (CONFIG_BOUNCE_BUFFER) in
board configuration, otherwise corresponding library won't be compiled
and linker will fail to build resulting executable.

Difference since v1 - fixed compile-time warning with type casting to
"void *":

Slight edit to remove UTF8 characters in the commit message.

Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
====
passing argument 2 of 'bounce_buffer_start' discards 'const' qualifier
from pointer target type
====

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Mischa Jonker <mjonker@synopsys.com>
Cc: Alim Akhtar <alim.akhtar@samsung.com>
Cc: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Amar <amarendra.xt@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Andy Fleming <afleming@gmail.com>
10 years agosh: sh2: Remove CONFIG_SH2A definition from asm/processor.h
Nobuhiro Iwamatsu [Thu, 9 Jan 2014 03:31:35 +0000 (12:31 +0900)]
sh: sh2: Remove CONFIG_SH2A definition from asm/processor.h

SH2 and SH2A use a common header. Both checks are not necessary.
This removes CONFIG_SH2A definition from asm/processor.h.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
10 years agosh: sh4: Remove CONFIG_SH4A definition from source code
Nobuhiro Iwamatsu [Thu, 9 Jan 2014 03:22:12 +0000 (12:22 +0900)]
sh: sh4: Remove CONFIG_SH4A definition from source code

SH4 and SH4A are compatible. But some instructions are different from these.
In Linux kernel, It is treated as a separate CPU, but for now, I think that
there is no need to divide especially in the U-Boot.

This removes CONFIG_SH4A definition from source code, SH4A is treated as SH4.
And this fix white space.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
10 years agosandbox: tpm: Fix nvwrite command
Che-Liang Chiou [Sun, 10 Nov 2013 17:27:08 +0000 (10:27 -0700)]
sandbox: tpm: Fix nvwrite command

The original codes misused recvbuf in source buffer instead of sendbuf,
and read from incorrect offset 14 instead of 22.

Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Che-Liang Chiou <clchiou@chromium.org>
10 years agosandbox: Add a prototype for cleanup_before_linux()
Simon Glass [Sun, 10 Nov 2013 17:27:07 +0000 (10:27 -0700)]
sandbox: Add a prototype for cleanup_before_linux()

This function is defined but has no prototype declaration. Add it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agosandbox: tpm: Add TPM emulation
Simon Glass [Sun, 10 Nov 2013 17:27:05 +0000 (10:27 -0700)]
sandbox: tpm: Add TPM emulation

Add a simple TPM emulator for sandbox. It only supports a small subset of
TPM operations. However, these are enough to perform common tasks.

Note this is an initial commit to get this working, but it could use
cleaning up (for example constants instead of open-coded values).

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
10 years agosandbox: Add facility to save/restore sandbox state
Simon Glass [Sun, 10 Nov 2013 17:27:04 +0000 (10:27 -0700)]
sandbox: Add facility to save/restore sandbox state

It is often useful to be able to save out the state from a sandbox test
run, for analysis or to restore it later to continue a test. Add generic
infrastructure for doing this using a device tree binary file. This is
a flexible tagged file format which is already supported by U-Boot, and
it supports hierarchy if needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Hung-ying Tyan <tyanh@chromium.org>
10 years agosandbox: Allow reading/writing of RAM buffer
Simon Glass [Sun, 10 Nov 2013 17:27:03 +0000 (10:27 -0700)]
sandbox: Allow reading/writing of RAM buffer

It is useful to be able to save and restore the RAM contents of sandbox
U-Boot either for setting up tests, for later analysys, or for chaining
together multiple tests which need to keep the same memory contents.

Add a function to provide a memory file for U-Boot. This is read on
start-up and written when shutting down. If the file does not exist
on start-up, it will be created when shutting down.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agosandbox: Add -i option to enter interactive mode
Simon Glass [Sun, 10 Nov 2013 17:27:02 +0000 (10:27 -0700)]
sandbox: Add -i option to enter interactive mode

Normally when U-Boot starts with a command (-c option) it quits when the
command completes. Normally this is what is requires, since the test is
likely complete.

Provide an option to jump into the console instead, so that debugging or
other tasks may be performed before quitting.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agosandbox: Allow the console to work earlier
Simon Glass [Sun, 10 Nov 2013 17:27:01 +0000 (10:27 -0700)]
sandbox: Allow the console to work earlier

With sandbox, errors and problems may be reported before console_init_f()
is executed. For example, an argument may not parse correctly or U-Boot may
panic(). At present this output is swallowed so there is no indication what
is going wrong.

Adjust the console to deal with a very early sandbox setup, by detecting that
there is no global_data yet, and calling os functions in that case.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agosandbox: Implement the bootm command for sandbox
Simon Glass [Sun, 10 Nov 2013 17:27:00 +0000 (10:27 -0700)]
sandbox: Implement the bootm command for sandbox

When sandbox does a 'bootm' to run a kernel we cannot actually execute it.
So just exit sandbox, which is essentially what U-Boot does on other archs.
Also, allow sandbox to use bootm on any kernel, so that it can be used
to test booting of kernels from any architecture.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agosandbox: Allow return from board_init_f()
Simon Glass [Sun, 10 Nov 2013 17:26:59 +0000 (10:26 -0700)]
sandbox: Allow return from board_init_f()

The execution flow becomes easier if we can return from board_init_f()
as ARM does. We can control things from start.c instead of having to
call back into that file from other places.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agosandbox: Correct help message <arg> garbling
Simon Glass [Sun, 10 Nov 2013 17:26:58 +0000 (10:26 -0700)]
sandbox: Correct help message <arg> garbling

The <arg> is displayed for options with no argument, and omitted for those
with an argument. Swap this around.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agosandbox: Improve/augment memory allocation functions
Simon Glass [Sun, 10 Nov 2013 17:26:57 +0000 (10:26 -0700)]
sandbox: Improve/augment memory allocation functions

Implement realloc() and free() for sandbox, by adding a header to each
block which contains the block size.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Che-Liang Chiou <clchiou@chromium.org>
Reviewed-by: Hung-ying Tyan <tyanh@chromium.org>
10 years agosandbox: block driver using host file/device as backing store
Henrik Nordström [Sun, 10 Nov 2013 17:26:56 +0000 (10:26 -0700)]
sandbox: block driver using host file/device as backing store

Provide a way to use any host file or device as a block device in U-Boot.
This can be used to provide filesystem access within U-Boot to an ext2
image file on the host, for example.

The support is plumbed into the filesystem and partition interfaces.

We don't want to print a message in the driver every time we find a missing
device. Pass the information back to the caller where a message can be printed
if desired.

Signed-off-by: Henrik Nordström <henrik@henriknordstrom.net>
Signed-off-by: Simon Glass <sjg@chromium.org>
- Removed change to part.c get_device_and_partition()

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
10 years agoAdd crc8 routine
Simon Glass [Sun, 10 Nov 2013 17:26:47 +0000 (10:26 -0700)]
Add crc8 routine

Add an implementation of the CRC8 algorithm. This is required by the TPM
emulation, but is probably useful to U-Boot in general.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
10 years agoMerge branch 'u-boot-ti/master' into 'u-boot-arm/master'
Albert ARIBAUD [Wed, 8 Jan 2014 19:48:26 +0000 (20:48 +0100)]
Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'