Prabhakar Kushwaha [Fri, 7 Aug 2015 12:31:39 +0000 (18:01 +0530)]
net: phy/vitesse: Add support for VSC8584 phy
Add support of VSC8584 phy placed on new QSGMII/SGMII ethernet riser cards
used on LS2085QDS platforms.
Signed-off-by: King Chung Lo@freescale.com <KingChungLo@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Prabhakar Kushwaha [Fri, 7 Aug 2015 12:31:26 +0000 (18:01 +0530)]
armv8: fsl-lsch3: Initiaze 4 MACs per QSGMII in dpmac_info
Every QSGMII SerDes Protocol usage 4 MACs.
So add/repeat QSGMII information for 4 MACs in dpmac_info strucuture.
Signed-off-by: King Chung Lo@freescale.com <KingChungLo@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Prabhakar Kushwaha [Fri, 7 Aug 2015 12:31:10 +0000 (18:01 +0530)]
armv8: ls2085a: Update serdes1_cfg_tbl for 0x33 & 0x35 protocol
Update 0x33 and 0x35 serdes protocol as per updated SoC document
in array serdes1_cfg_tbl.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Prabhakar Kushwaha [Fri, 7 Aug 2015 04:54:30 +0000 (10:24 +0530)]
armv8: ls2085a: Add support of CONFIG_CMD_GREPENV
Enable CONFIG_CMD_GREPENV to allow search in env variables
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Prabhakar Kushwaha [Sun, 2 Aug 2015 03:41:44 +0000 (09:11 +0530)]
armv8: ls2085a: Update bootargs as per default target console
LS2085 targets supports following UART console
LS2085AQDS UART0
LS2085ARDB UART1
LS2085ASim UART0
LS2085AEmu UART0
So update the bootargs as per the default console present at the target
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Aneesh Bansal [Fri, 31 Jul 2015 08:40:03 +0000 (14:10 +0530)]
SECURE_BOOT: Disable IE Key feature for RAMBOOT
ISBC Key Extension feature is not applicable for RAMBOOT
as there is no way to retrieve the CSF Header and validated
IE Key table from SRAM once CPC has been disabled.
The feature is only applicable in case of NOR SECURE BOOT.
Code Cleanup:
The SECURE_BOOT specific defines have been moved from
arch-ls102xa/config.h to
arm/include/asm/fsl_secure_boot.h
Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Yangbo Lu [Fri, 24 Jul 2015 09:37:29 +0000 (17:37 +0800)]
armv8/ls2085a_simu: enable eSDHC
Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Bhupesh Sharma [Wed, 1 Jul 2015 04:28:03 +0000 (09:58 +0530)]
armv8: Add framework for CCN-504 interconnect configuration
This patch adds a minimal framework for Dickens CCN-504
interconnect configuration - mainly related to adding Clusters/cores
to snoop/DVM domain and setting QoS of the RN-I ports.
LS2085A platform makes use of these configurations to support
better network data performance and to boot a SMP Linux.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Priyanka Jain [Mon, 29 Jun 2015 10:09:40 +0000 (15:39 +0530)]
armv8/ls2085aqds: enable 32KHz rtc output
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Priyanka Jain [Mon, 29 Jun 2015 10:09:23 +0000 (15:39 +0530)]
rtc:ds3232/ds3231: Add support to generate 32KHz output
RTC devices can generate 32KHz output if for
-DS3232 device, EN32KHz bit and BB32KHz bit are set
-DS3231 device, EN32KHz bit is set, BB32KHz bit is don't care
Patch adds rtc_enable_32khz_output() which when called
will enable 32KHz output on 32KHz pin
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Tom Rini [Mon, 31 Aug 2015 16:12:27 +0000 (12:12 -0400)]
Merge branch 'master' of git.denx.de/u-boot-sunxi
Tom Rini [Mon, 31 Aug 2015 15:43:47 +0000 (11:43 -0400)]
Merge git://git.denx.de/u-boot-dm
Boris Brezillon [Mon, 27 Jul 2015 14:21:26 +0000 (16:21 +0200)]
sunxi: increase SYS_MONITOR_LEN
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Masahiro Yamada [Fri, 28 Aug 2015 11:28:42 +0000 (20:28 +0900)]
dts: fix dependency of OF_SPL_REMOVE_PROPS
This should depend on SPL_OF_CONTROL (it is not equivalent to
SPL && OF_CONTROL).
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Thu, 27 Aug 2015 03:44:30 +0000 (12:44 +0900)]
pinctrl: sandbox: add sandbox pinctrl driver
This driver actually does nothing but test pinctrl uclass, and
demonstrate how things work.
To try this driver, uncomment /* #define DEBUG */ in the
drivers/pinctrl/pinctrl-sandbox.c, and debug messages will be
displayed.
DRAM: 128 MiB
sandbox pinmux: group = 1 (serial_a), function = 1 (serial)
Using default environment
In: cros-ec-keyb
Out: lcd
Err: lcd
Net: Net Initialization Skipped
eth0: eth@
10002000, eth1: eth@
80000000, eth5: eth@
90000000
=> i2c dev 0
Setting bus to 0
sandbox pinmux: group = 0 (i2c), function = 0 (i2c)
sandbox pinconf: group = 0 (i2c), param = 3, arg = 1
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Thu, 27 Aug 2015 03:44:29 +0000 (12:44 +0900)]
pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Thu, 27 Aug 2015 03:44:28 +0000 (12:44 +0900)]
dm: core: allow device_bind() to not return a device pointer
This is useful when we want to bind a device, but do not need the
pointer to the device.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 23 Aug 2015 00:31:44 +0000 (18:31 -0600)]
tegra: nyan: Enable TPM command and driver
The TPM is listed in the device tree. Enable the driver and 'tpm' command
so that it can be used.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard <christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:43 +0000 (18:31 -0600)]
tpm: Enable 'tpmtest' command for Chrome OS boards with TPMs
This command provides a few useful tests so enable it for common boards.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard<christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:42 +0000 (18:31 -0600)]
dm: tpm: Add a 'tpmtest' command
These tests come from Chrome OS code. They are not particularly tidy but can
be useful for checking that the TPM is behaving correctly. Some knowledge of
TPM operation is required to use these.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard<christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:41 +0000 (18:31 -0600)]
tpm: Add functions to access flags and permissions
Add a few new functions which will be used by the test command in a future
patch.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard<christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:40 +0000 (18:31 -0600)]
tpm: Add a 'tpm info' command
Add a command to display basic information about a TPM such as the model and
open/close state. This can be useful for debugging.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard <christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:39 +0000 (18:31 -0600)]
dm: tpm: Convert LPC driver to driver model
Convert the tpm_tis_lpc driver to use driver model and update boards which
use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard<christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:38 +0000 (18:31 -0600)]
dm: tpm: Convert I2C driver to driver model
Convert the tpm_tis_i2c driver to use driver model and update boards which
use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard<christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:37 +0000 (18:31 -0600)]
exynos: x86: dts: Add tpm nodes to the device tree for Chrome OS devices
Add a TPM node to the various Chromebooks so that driver can be converted to
driver model.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard<christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:36 +0000 (18:31 -0600)]
tpm: Check that parse_byte_string() has data to parse
Rather then crashing when there is no data, print an error. The error is
printed by the caller to parse_byte_string().
Acked-by: Christophe Ricard <christophe-h.ricard@st.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:35 +0000 (18:31 -0600)]
dm: tpm: sandbox: Convert TPM driver to driver model
Convert the sandbox TPM driver to use driver model. Add it to the device
tree so that it can be found on start-up.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard <christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:34 +0000 (18:31 -0600)]
tpm: Report tpm errors on the command line
When a 'tpm' command fails, we set the return code but give no indication
of failure. This can be confusing.
Add an error message when any tpm command fails.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard<christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:33 +0000 (18:31 -0600)]
dm: i2c: Add a command to adjust the offset length
I2C chips can support a register offset, with registers accessible by
sending this offset as the first part of any read or write transaction.
Most I2C chips have a single byte offset, thus the offset length is 1.
This provides access for up 256 registers.
However other offset lengths are supported, including 0.
Add a command to provide access to the offset length from the command
line. This allows the offset length to be read or written.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard<christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:32 +0000 (18:31 -0600)]
dm: tpm: Convert the TPM command and library to driver model
Add driver model support to the TPM command and the TPM library. Both
support only a single TPM at present.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard<christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:31 +0000 (18:31 -0600)]
dm: tpm: Add a uclass for Trusted Platform Modules
Add a new uclass for TPMs which uses almost the same TIS (TPM Interface
Specification) as is currently implemented. Since init() is handled by the
normal driver model probe() method, we don't need to implement that. Also
rename the transfer method to xfer() which is a less clumbsy name.
Once all drivers and users are converted to driver model we can remove the
old code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard<christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:30 +0000 (18:31 -0600)]
tpm: tpm_tis_i2c: Tidy up delays
Use a _US suffix for microseconds and a _MS suffic for milliseconds. Move
all timeouts and delays into one place. Use mdelay() instead of udelay()
where appropriate.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard <christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:29 +0000 (18:31 -0600)]
tpm: tpm_tis_i2c: Use a consistent tpm_tis_i2c_ prefix
Use the same prefix on each function for consistency.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard <christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:28 +0000 (18:31 -0600)]
tpm: tpm_tis_i2c: Simplify init code
Move all the init and uninit code into one place.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard<christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:27 +0000 (18:31 -0600)]
tpm: tpm_tis_i2c: Move definitions into the header file
Some definitions are in the C file and some are in the header file. Move
everything into the header file for consistency and to reduce clutter.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:26 +0000 (18:31 -0600)]
tpm: tpm_tis_i2c: Merge struct tpm into tpm_chip
There are too many structures storing the same sort of information. Move the
fields from struct tpm into struct tpm_chip and remove the former struct.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:25 +0000 (18:31 -0600)]
tpm: tpm_tis_i2c: Merge struct tpm_dev into tpm_chip
There are too many structures storing the same sort of information. Move the
fields from struct tpm_dev into struct tpm_chip and remove the former
struct.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:24 +0000 (18:31 -0600)]
tpm: tpm_tis_i2c: Drop struct tpm_vendor_specific
This function is misnamed since it only applies to a single driver. Merge
its fields into its parent.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:23 +0000 (18:31 -0600)]
tpm: tpm_tis_i2c: Drop unnecessary methods
The function methods in struct tpm_vendor_specific just call local functions.
Change the code to use a direct call.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:22 +0000 (18:31 -0600)]
tpm: Move the I2C TPM code into one file
The current Infineon I2C TPM driver is written in two parts, intended to
support use with other I2C devices. However we don't have any users and the
Atmel I2C TPM device does not use this file.
We should simplify this and remove the unused abstration. As a first step,
move the code into one file.
Also the name tpm_private.h suggests that the header file is generic to all
TPMs but it is not. Rename it indicate that it relates only to this driver
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:21 +0000 (18:31 -0600)]
tpm: Convert drivers to use SPDX
Add an SPDX header to two drivers that don't have it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard <christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:20 +0000 (18:31 -0600)]
tpm: Convert board config TPM options to Kconfig
Convert all TPM options to Kconfig and tidy up.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard <christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:19 +0000 (18:31 -0600)]
tpm: Add Kconfig options for TPMs
Add new Kconfig options for TPMs in preparation for moving boards to use
Kconfig for TPM configuration.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard<christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:18 +0000 (18:31 -0600)]
tpm: Drop two unused options
The address of the I2C TPM is now defined in the device tree so there is no
need for the CONFIG options.
Remove them from the README and board config to avoid confusion.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard <christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:17 +0000 (18:31 -0600)]
tpm: Remove old pre-driver-model I2C code
This is not used anymore by any board so drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard <christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Misha Komarovskiy [Tue, 25 Aug 2015 08:53:26 +0000 (11:53 +0300)]
exynos: Rise ARM voltage to 1.1V for chained bootloaders
If board uses downstream Chrome OS U-Boot as first stage
bootloader and upstream version is chained second stage,
1.1V is minimum voltage borderline.
Signed-off-by: Misha Komarovskiy <zombah@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 23 Aug 2015 00:28:01 +0000 (18:28 -0600)]
buildman: Correct 'Series-cover-cc' detection logic
This requires 'Series-cover_cc' at present which is incorrect. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 21 Aug 2015 05:44:16 +0000 (22:44 -0700)]
drivers: kconfig: Sort driver menu in alphabetical order
Sort different types of drivers in alphabetical order.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 21 Aug 2015 05:44:15 +0000 (22:44 -0700)]
drivers: kconfig: Move PHYS_TO_BUS to "Device Drivers" menu
Right now PHYS_TO_BUS shows in the Kconfig main menu, move it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 21 Aug 2015 05:44:14 +0000 (22:44 -0700)]
drivers: kconfig: Move "Generic Driver Options" menu to the top
Make "Generic Driver Options" menu show on the top in the Kconfig.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Sun, 2 Aug 2015 23:15:48 +0000 (01:15 +0200)]
dm: core: Add Kconfig for simple bus driver
Add Kconfig entries for the simple-bus driver, both for U-Boot
and for SPL. The simple-bus is enabled by default in U-Boot and
disabled by default in SPL to preserve the original behavior.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Modified to fit on top of Masahiro's $(SPL) setup:
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 11 Aug 2015 14:33:29 +0000 (08:33 -0600)]
dm: Use dev_get_addr() where possible
This is a convenient way for a driver to get the hardware address of a
device, when regmap or syscon are not being used. Change existing callers
to use it as an example to others.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Masahiro Yamada [Mon, 10 Aug 2015 16:09:43 +0000 (01:09 +0900)]
dm: simplify uclass_foreach_dev() implementation
This can be simply written with list_for_each_entry(), maybe
this macro was not necessary in the first place.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
Yousong Zhou [Sat, 29 Aug 2015 13:26:11 +0000 (21:26 +0800)]
sunxi: mmc: set transfer timeout according to byte_cnt.
Originally a timeout value of 2 seconds was used regardless of the size
of data to be transfered. This prevented slow devices from working
correctly while there was no much gain for faster devices, e.g. it takes
3708ms for a transfer of uImage of size
1899008 bytes.
Signed-off-by: Yousong Zhou <yszhou4tech@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Chen-Yu Tsai [Tue, 25 Aug 2015 02:49:19 +0000 (10:49 +0800)]
sunxi: Enable non-secure access to RTC on sun6i (A31s)
On the A31s the RTC is by default secured. Thus when u-boot
loads the kernel in non-secure world, the RTC is unavailable. The
SoC has a TrustZone Protection Controller, which can be used to
enable non-secure access to the RTC.
On the A31 the TZPC doesn't seem to do anything, i.e. changes to
its register contents do not affect access to the RTC.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Hans de Goede [Thu, 27 Aug 2015 18:07:28 +0000 (20:07 +0200)]
sunxi: Fix MAINTAINERS board sorting
The boards are sorted by SoC, move the Mele_A1000G_quad entry to the list
of sun6i boards where it belongs.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Marcus Cooper [Wed, 26 Aug 2015 18:38:33 +0000 (20:38 +0200)]
sunxi: Add support for the Olimex A20 EVB
Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Hans de Goede [Tue, 25 Aug 2015 12:20:49 +0000 (14:20 +0200)]
sunxi: Add inet98v_rev2 defconfig and dts file
The inet98v_rev2 is a pcb used in generic A13 based tablets. It features
volume buttons, a power barrel, micro-usb otg, headphone connector and
a power button.
The dts file is identical to the one submitted to the upstream kernel.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sat, 22 Aug 2015 18:06:02 +0000 (20:06 +0200)]
sunxi: Add inet97fv2_defconfig
The inet97fv2 is a board found in the first generation of cheap allwinner
A10 based 7" tablets.
Note that this patch does not add a dts file as we already have one from
our dts syncs with the kernel.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Tue, 25 Aug 2015 12:19:06 +0000 (14:19 +0200)]
sunxi: Ampe_A76_defconfig: Add otg id pin configuration
Add otg id pin configuration, this speeds up bootup when no host cable
is plugged into the otg port.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Fri, 21 Aug 2015 19:49:51 +0000 (21:49 +0200)]
mtd: nand: Make CONFIG_SYS_NAND_U_BOOT_OFFS configurable through Kconfig
Make CONFIG_SYS_NAND_U_BOOT_OFFS configurable through Kconfig, just like
SYS_NAND_BUSWIDTH_16BIT this is only enabled on some SoCs using depends,
to avoid double defining it for SoCs which have not yet moved to Kconfig
for this.
Having this in Kconfig is useful because this is something which may
differ from one board to the other even when using the same SoC.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Acked-by: Scott Wood <scottwood@freescale.com>
Boris Brezillon [Sat, 29 Aug 2015 10:29:38 +0000 (12:29 +0200)]
sunxi_nand_spl: clear status flags in SPL implementation
Some status flags remain set until you explicetly clear the bit
in the status register.
Fix the SPL implementation to avoid false positive.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[hdegoede@redhat.com: Port from v2015.07 to v2015.10]
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Hans de Goede [Fri, 21 Aug 2015 13:23:57 +0000 (15:23 +0200)]
sunxi_nand_spl: Remove NAND_SUNXI_SPL_SYNDROME_PARTITIONS_END
We only ever use syndrome mode for the partitions which contain the SPL,
as that is required for the BROM to be able to read the SPL.
Instead of using some arbritray limit for deciding whether or not to
use syndrome, be smart and check if u-boot-dtb.bin is directly behind
the SPL, if it is not then it is on its own partition and we should not
use syndrome.
Note the reason why we only use syndrome mode for the SPL is because it
comeswith weaker randomization, introducing a risk for more bit errors,
so we want to avoid it when possible.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sun, 16 Aug 2015 12:48:22 +0000 (14:48 +0200)]
sunxi_nand_spl: Rename SPL_NAND_SUNXI to NAND_SUNXI
We eventually want to add full nand support, since it makes no sense
to build SPL with nand support and u-boot without, or the other way
around, a single option will suffice.
Renaming the Kconfig option now makes things easier when we add full
nand support in the future.
The "obj-$(CONFIG_NAND_SUNXI) += sunxi_nand_spl.o" is moved to an
"ifdef CONFIG_SPL_BUILD" block in the Makefile.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sat, 15 Aug 2015 19:51:33 +0000 (21:51 +0200)]
sunxi_nand_spl: Add support for backup boot partitions
The BROM does not care / use bad page markings, instead it deals with
any bad pages in the first erase-block by simply trying to load "boot0"
from the next erase-block.
This commit implements the same strategy for the sunxi spl nand code,
allowing it to boot from the backup boot partition when the main boot
partition is bad (tested by erasing the main boot partition).
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sat, 15 Aug 2015 19:23:08 +0000 (21:23 +0200)]
sunxi_nand_spl: Auto detect nand configuration parameters
Auto detect the nand configuration parameters, like the BROM does.
This allows us to get rid of various Kconfig settings, and is
necessary to support generic boards like the mk802 which have seen
many production runs with different nands.
The full blown u-boot/kernel nand driver uses the nand id to determine
this info, for the SPL we do as the BROM does and simply try a few
standard configs.
Note the table only contains configs which are known to actually be used,
rather then all the configs the BROM tries. This means that it may need
to be updated in the future as we add support for nand on more boards.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sat, 15 Aug 2015 18:51:53 +0000 (20:51 +0200)]
sunxi_nand_spl: Parametrize lowlevel read functions
Parametrize the lowlevel nand_read_page function, instead of directly
using the CONFIG_foo settings for page-size, etc. there and add a few
wrappers / helper functions for calling it.
This is a preparation patch for adding auto-detecting of the nand
parameters like the BROM does.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sat, 15 Aug 2015 18:05:13 +0000 (20:05 +0200)]
sunxi_nand_spl: Properly config page-size in the nand ctl register
Properly config page-size in the nand ctl register, it seems that things
work fine without doing this, but still lets play it safe and properly
set the page-size.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sat, 15 Aug 2015 11:17:49 +0000 (13:17 +0200)]
sunxi_nand_spl: Add support for sun4i and sun5i SoCs
Other then having a few less chip-select lines the nand controller
on sun4i, sun5i and sun7i is identical.
Note this patch also muxes GPC7 to the NAND on sun7i where as before
it was not muxed this way. GPC7 is a standard NAND pin, so it should
always be muxed to the NAND when in use.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sat, 15 Aug 2015 10:41:09 +0000 (12:41 +0200)]
sunxi_nand_spl: Use kernel driver algorithm for determining ecc_mode / _off
Sync the code for figuring out the ecc_mode and ecc_offset with the linux
kernel v4.1. Keeping this in sync seems like a good idea in general, and
it fixes / adds support for ecc strengths of 56, 60 and 64 bits.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sat, 15 Aug 2015 10:32:24 +0000 (12:32 +0200)]
sunxi_nand_spl: Add proper cache flusing
We are using dma, so we should flush the cache before starting the dma,
and invalidate it once the dma is done.
Things are working without this by mostly luck, but lets not rely on that.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sat, 15 Aug 2015 09:59:25 +0000 (11:59 +0200)]
sunxi_nand_spl: Turn off clocks when we're done with the nand
Turn off the nand and dma clocks when we're done with the nand, this
puts the nand and dma controllers back into a clean state for when the
kernel boots.
Without this the kernel will not boot properly when it is built with
dma-controller support.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sat, 15 Aug 2015 09:58:03 +0000 (11:58 +0200)]
sunxi_nand_spl: Make sure the DMA controller is enabled
We use DMA for nand data transfers in the SPL, so make sure the DMA
controller is enabled.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sat, 15 Aug 2015 09:55:26 +0000 (11:55 +0200)]
sunxi_nand_spl: Use SYS_NAND_SELF_INIT and only do nand init when necessary
Use SYS_NAND_SELF_INIT and only setup the pinmux and clocks when we are
actually using the nand.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sat, 15 Aug 2015 10:43:26 +0000 (12:43 +0200)]
sunxi_nand_spl: Do not bother writing the spare-area reg in syndrome mode
In syndrome mode we set the NFC_SEQ bit in the command register, so the
spare-area register is not used. Also the value currently being written is
actual wrong, the ecc sits at "column + CONFIG_NAND_SUNXI_SPL_ECC_PAGE_SIZE"
not just CONFIG_NAND_SUNXI_SPL_ECC_PAGE_SIZE.
So the current code only serves to confuse the user -> remove it.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sat, 15 Aug 2015 09:38:33 +0000 (11:38 +0200)]
sunxi_nand_spl: We only need to reset the nand chip once
There is no need to reset the nand chip for every ecc-block read.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sat, 15 Aug 2015 07:33:41 +0000 (09:33 +0200)]
sunxi_nand_spl: Drop unnecessary temp buf
nand_spl_load_image() always gets called with either CONFIG_SYS_TEXT_BASE
or spl_image.load_addr as destination, both of which are properly aligened,
and have plenty of space for "overshooting" up to
CONFIG_NAND_SUNXI_SPL_ECC_PAGE_SIZE bytes, as we read in
CONFIG_NAND_SUNXI_SPL_ECC_PAGE_SIZE bytes chunks.
This saves CONFIG_NAND_SUNXI_SPL_ECC_PAGE_SIZE (typically 1k) in
SPL size, which is a lot on the total 24k we have.
Note this changes the dma destination from SRAM to DRAM, so this patch
updates the DDMA_DST_TYPE bits in the dma controller cfg0 reg accordingly.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sat, 15 Aug 2015 07:38:22 +0000 (09:38 +0200)]
sunxi_nand_spl: Fix CONFIG_SPL_NAND_SUNXI handling
CONFIG_SPL_NAND_SUPPORT gets used via IS_ENABLED so it must be defined
to 1, rather then just being defined.
While at remove 2 other unused NAND related defines from sunxi-common.h.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sat, 15 Aug 2015 09:46:01 +0000 (11:46 +0200)]
sunxi: Add CONFIG_MMC0_CD_PIN to various boards
Add CONFIG_MMC0_CD_PIN to various boards, this stops the SPL from still
trying to access the sdcard when there is none (e.g. when booting from
nand).
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sun, 16 Aug 2015 09:23:42 +0000 (11:23 +0200)]
sunxi: Drop LCD_MODE from A13-OLinuxIno defconfigs
With the unified / cleaned up default display output selection changes,
which were done as part of adding composite video out support, our
example LCD_MODE line in the A13-OLinuxIno defconfigs causes the display
code to setup a LCD console by default, rather then a VGA console.
Given that the LCD console is only useful for people who have hooked up
the exact lcd-panel from the config, while most people will not have any
lcd panel connected to these boards, this is not a good default.
Dropping the LCD_MODE line which was intended as an example fixes this,
instead add a link to the LCD_MODE help text pointing to
http://linux-sunxi.org/LCD which contains the removed and other example
modes.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sun, 16 Aug 2015 09:15:29 +0000 (11:15 +0200)]
sunxi: musb: Drop no longer accurate comment in Kconfig help text
Drop the no longer accurate part of the USB_MUSB_SUNXI Kconfig help text,
since the musb-host code now supports the device-model, ehci and musb in
host mode can both be enabled at the same time without issues.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Fri, 14 Aug 2015 14:13:03 +0000 (16:13 +0200)]
sunxi: Add support for gt90h-v4 tablets
The gt90h is a pcb found in generic 9" tablets with an A23 soc, 1G RAM
and 8G nand, rtl8723as usb wifi, 1 micro usb port and 1 micro sd slot.
The pmic setup on this board is somewhat special, dcdc2 MUST be set
to 1.1V instead of the usual 1.2V otherwise the board is very unstable.
aldo1 is used to power the micro sd slot, dldo1 is used for wifi.
This commit adds a defconfig + dts (as submitted to the kernel) for
the gt90h-v4 pcb.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Fri, 14 Aug 2015 14:19:34 +0000 (16:19 +0200)]
sunxi: axp221: Allow specifying dcdc2 voltage via Kconfig
Allow specifying the axp221 dcdc2 voltage via Kconfig, this is necessary
because on some boards the 1.2V default does not work reliable.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Tom Rini [Sun, 30 Aug 2015 23:48:39 +0000 (19:48 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-video
Peng Fan [Sat, 25 Jul 2015 12:59:35 +0000 (20:59 +0800)]
video: discard empty video_set_lut implementation
Discard the empty video_set_lut function from platform video
drivers.
This commit "
69d275458893eaec35229b589092c2a6bde5440f" introduces
a weak function video_set_lut, so we do not need an strong function
in platform drivers, which does nothing.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Masahiro Yamada [Fri, 28 Aug 2015 13:33:15 +0000 (22:33 +0900)]
ARM: dts: uniphier: add ProXstream2 and PH1-LD6b SoC/board support
Initial version of DTSI for ProXstream2 and PH1-LD6b and DTS for
PH1-LD6b reference board.
Import from Linux with some adjustments:
- Use SPDX-License-Identifier
- Add clock-frequency to serial nodes
- Drop unusable nodes from -ref.dts
While I am here, sort Makefile entries alphabetically.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 28 Aug 2015 13:33:14 +0000 (22:33 +0900)]
ARM: dts: uniphier: add PH1-Pro5 SoC support
Initial version of UniPhier PH1-Pro5 device tree.
(Imported from Linux with adjustment for SPDX License Identifier)
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 28 Aug 2015 13:33:13 +0000 (22:33 +0900)]
ARM: dts: uniphier: sync with Linux
This commit imports device tree updates from Linux. It eventually
adds pinctrl-related nodes and properties.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 28 Aug 2015 11:13:19 +0000 (20:13 +0900)]
serial: uniphier: drop platform data support
This driver is enabled only for UniPhier SoCs and ARCH_UNIPHIER now
selects OF_CONTROL and SPL_OF_CONTROL.
This driver no longer needs to support platform data configuration.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Fri, 28 Aug 2015 11:13:18 +0000 (20:13 +0900)]
ARM: uniphier: enable SPL_OF_CONTROL
Device Tree really improves code maintainability and is now
available for SPL too.
This is the state-of-the-art implementation in U-boot.
The board files (platform data) are no longer needed.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Fri, 28 Aug 2015 11:13:17 +0000 (20:13 +0900)]
ARM: uniphier: select SPL_DM rather than default in defconfig
Now UniPhier SoCs highly depend on Driver Model for SPL, too.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 28 Aug 2015 06:38:17 +0000 (15:38 +0900)]
ARM: uniphier: remove unused macro
This macro is not referenced at all.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 28 Aug 2015 06:37:17 +0000 (15:37 +0900)]
ARM: uniphier: fix build error when CONFIG_DEBUG_LL is defined
The build error happens if CONFIG_DEBUG_LL and CONFIG_MACH_PH1_SLD3
are both enabled.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 27 Aug 2015 09:52:36 +0000 (18:52 +0900)]
mtd: denali_spl: do not allocate page_buffer in .bss section
Since commit
2580a2a7e719 ("mtd: nand: Increase max sizes of OOB and
Page size"), three boards (ph1_ld4, ph1_pro4, ph1_sld8) fail to build
with the following error message:
arm-linux-gnueabi-ld.bfd: SPL image plus BSS too big
They compile drivers/mtd/nand/denali_spl.c and it has a page_buffer
as static data:
static uint8_t page_buffer[NAND_MAX_PAGESIZE];
This buffer required 8KB in .bss section before that commit and now
it has been increased to 16KB. Given limited code/memory size for SPL,
it is not a good idea to allocate a page buffer statically. In the
first place, the load address 'dst' can be used as a page buffer.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tom Rini [Wed, 26 Aug 2015 19:18:30 +0000 (15:18 -0400)]
tools/atmelimage.c: Fix warning when debug is enabled
Otherwise we get:
tools/atmelimage.c:134:3: warning: format ‘%d’ expects argument of type ‘int’, but argument 2 has type ‘size_t’ [-Wformat=]
debug("atmelimage: interrupt vector #%d is 0x%08X\n", pos+1,
^
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Kishon Vijay Abraham I [Wed, 19 Aug 2015 10:46:28 +0000 (16:16 +0530)]
ARM: OMAP5/AM43xx: remove enabling USB clocks from enable_basic_clocks()
Now that we have separate function to enable USB clocks, remove
enabling USB clocks from enable_basic_clocks(). Now board_usb_init()
should take care to invoke enable_usb_clocks() for enabling
USB clocks.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Kishon Vijay Abraham I [Wed, 19 Aug 2015 10:46:27 +0000 (16:16 +0530)]
board: ti: invoke clock API to enable and disable clocks
invoke enable_usb_clocks during board_usb_init and disable_usb_clocks
during board_usb_exit to enable and disable clocks respectively.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Kishon Vijay Abraham I [Wed, 19 Aug 2015 10:46:26 +0000 (16:16 +0530)]
ARM: AM43xx: Add functions to enable and disable USB clocks
Added functions to enable and disable USB clocks which can be invoked
during USB init and USB exit respectively.
Cc: Roger Quadros <rogerq@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Nishanth Menon <nm@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Kishon Vijay Abraham I [Wed, 19 Aug 2015 10:46:25 +0000 (16:16 +0530)]
ARM: OMAP5: Add functions to enable and disable USB clocks
Added functions to enable and disable USB clocks which can be invoked
during USB init and USB exit respectively.
Cc: Roger Quadros <rogerq@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Nishanth Menon <nm@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Kishon Vijay Abraham I [Wed, 19 Aug 2015 08:43:20 +0000 (14:13 +0530)]
board: ti: OMAP5: added USB initializtion code
Implemented board_usb_init(), board_usb_cleanup() and
usb_gadget_handle_interrupts() in omap5 board file that
can be invoked by various gadget drivers.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>