oweals/u-boot.git
6 years agodb820c: add qualcomm dragonboard 820C support
Jorge Ramirez-Ortiz [Wed, 10 Jan 2018 10:33:50 +0000 (11:33 +0100)]
db820c: add qualcomm dragonboard 820C support

This commit adds support for 96Boards Dragonboard820C.

The board is based on APQ8086 Qualcomm Soc, complying with the
96Boards specification.

Features
 - 4x Kyro CPU (64 bit) up to 2.15GHz
 - USB2.0
 - USB3.0
 - ISP
 - Qualcomm Hexagon DSP
 - SD 3.0 (UHS-I)
 - UFS 2.0
 - Qualcomm Adreno 530 GPU
 - GPS
 - BT 4.2
 - Wi-Fi 2.4GHz, 5GHz (802.11ac)
 - PCIe 2.0
 - MIPI-CSI, MIPI-DSI
 - I2S

U-Boot boots chained from LK (LK implements the fastboot protocol) in
64-bit mode.

For detailed build instructions see readme.txt in the board directory.

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
6 years agoarm: mach-snapdragon: refactor clock driver
Jorge Ramirez-Ortiz [Wed, 10 Jan 2018 10:33:49 +0000 (11:33 +0100)]
arm: mach-snapdragon: refactor clock driver

In preparation to add support for the Dragonboard820c (APQ8096),
refactor the current Snapdragon clock driver.

No new functionality has been added.

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
6 years agoenv: enable accessing the environment in an EXT4 partition
Jorge Ramirez-Ortiz [Wed, 10 Jan 2018 10:33:48 +0000 (11:33 +0100)]
env: enable accessing the environment in an EXT4 partition

For example to store the environment in a file named "/uboot.env" in MMC
"0", where partition "1" contains the EXT4 filesystem, the following
configs should be added to the board's default config:

  CONFIG_ENV_IS_IN_EXT4=y
  CONFIG_ENV_EXT4_DEVICE_AND_PART="0:1"
  CONFIG_ENV_EXT4_FILE="/uboot.env"
  CONFIG_ENV_EXT4_INTERFACE="mmc"

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
[trini: Fix some line over 80 chars issues]
Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agodm: core: parse chosen node
Rob Clark [Wed, 10 Jan 2018 10:33:30 +0000 (11:33 +0100)]
dm: core: parse chosen node

This is the node that would contain, for example, the framebuffer setup
by an earlier stage.

Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agopoplar: configs: increase gunzip buffer size for the kernel
Jorge Ramirez-Ortiz [Wed, 10 Jan 2018 10:33:29 +0000 (11:33 +0100)]
poplar: configs: increase gunzip buffer size for the kernel

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
6 years agospmi: msm: display the PMIC Arb version (debug)
Jorge Ramirez-Ortiz [Wed, 10 Jan 2018 10:33:28 +0000 (11:33 +0100)]
spmi: msm: display the PMIC Arb version (debug)

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
6 years agoMerge git://git.denx.de/u-boot-mmc
Tom Rini [Mon, 15 Jan 2018 03:26:38 +0000 (22:26 -0500)]
Merge git://git.denx.de/u-boot-mmc

6 years agoMerge git://git.denx.de/u-boot-tegra
Tom Rini [Fri, 12 Jan 2018 19:18:34 +0000 (14:18 -0500)]
Merge git://git.denx.de/u-boot-tegra

6 years agoMakefile: ensure DTB doesn't overflow into initial stack
Stephen Warren [Tue, 9 Jan 2018 19:52:14 +0000 (12:52 -0700)]
Makefile: ensure DTB doesn't overflow into initial stack

With CONFIG_SYS_INIT_SP_BSS_OFFSET enabled, the initial (pre-relocation)
stack is placed some distance after bss_start. The control DTB is appended
to the U-Boot binary at bss_start. If the DTB is too large, or the SP BSS
offset too small, then the initial stack could corrupt the DTB. Enhance
the Makefile to check whether this is likely to occur.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
6 years agoARM: Tegra: p2771-0000: use calculate env var feature
Stephen Warren [Tue, 9 Jan 2018 00:41:25 +0000 (17:41 -0700)]
ARM: Tegra: p2771-0000: use calculate env var feature

Request that all environment variables containing hard-coded address be
calculated at boot time instead.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
6 years agoARM: Tegra186: calculate load addresses at boot
Stephen Warren [Tue, 9 Jan 2018 00:41:24 +0000 (17:41 -0700)]
ARM: Tegra186: calculate load addresses at boot

In the presence of potentially fragemented memory, we cannot hard-code
addresses into environment variables such as kernel_addr_r. Instead, we
must calculate those addresses at run-time based on available memory
locations. Implement the code to perform such runtime calculation, based
on requirements described in environment variables, to allow the user
full control over the allocation.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
6 years agoARM: Tegra186: don't map memory not in RAM banks
Stephen Warren [Thu, 4 Jan 2018 18:07:14 +0000 (11:07 -0700)]
ARM: Tegra186: don't map memory not in RAM banks

Tegra186 currently restricts its DRAM usage to entries in the /memory node
in the DTB passed to it. However, the MMU configuration always maps the
entire first 2GB of RAM. This could allow the CPU to speculatively access
RAM that isn't part of the in-use banks. This patch switches to runtime
construction of the table that's used to construct the MMU translation
tables, and thus prevents access to RAM that's not part of a valid bank.

Note: This patch is intended to prevent access to RAM regions which U-Boot
does not need to access, with the primary purpose of avoiding theoretical
speculative access to physical regions for which the HW will throw errors
(e.g. carve-outs that the CPU has no permission to access at a bus level,
bad ECC pages, etc.). In particular, this patch is not deliberately
related to the speculation-related security issues that were recently
announced. The apparent similarity is a coincidence.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
6 years agoARM: tegra: p2771-000: increase max DRAM bank count
Stephen Warren [Wed, 3 Jan 2018 21:32:35 +0000 (14:32 -0700)]
ARM: tegra: p2771-000: increase max DRAM bank count

On this platform, there may be up to 1024 unusable chunks of memory.
Increase CONFIG_NR_DRAM_BANKS so that U-Boot can remember all the banks
required to represent such fragmented memory.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
6 years agoARM: Tegra186: search for best RAM bank
Stephen Warren [Wed, 3 Jan 2018 21:32:34 +0000 (14:32 -0700)]
ARM: Tegra186: search for best RAM bank

In the future, the list of DRAM regions passed to U-Boot in the DTB may
be quite long and fragmented. Due to this, U-Boot must search through the
regions to find the best region to relocate into, rather than relying on
the current assumption that the top of bank 0 is a reasonable relocation
target. This change implements such searching.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
6 years agoARM: bootm: don't assume sp is in DRAM bank 0
Stephen Warren [Fri, 5 Jan 2018 20:04:54 +0000 (13:04 -0700)]
ARM: bootm: don't assume sp is in DRAM bank 0

arch_lmb_reserve() currently assumes that the stack pointer is within DRAM
bank 0. This is not necessarily true. Enhance the code to search through
DRAM banks until the bank that does contain SP is found, and then reserve
the tail of that bank.

Fixes: 2d1916e48bd8 ("ARM: add flat device tree support")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
6 years agoARM: Tegra186: mem parsing fixes from downstream
Stephen Warren [Wed, 3 Jan 2018 21:32:33 +0000 (14:32 -0700)]
ARM: Tegra186: mem parsing fixes from downstream

Apply a few small fixes for the DTB /memory node parsing from NVIDIA's
downstream U-Boot:

- Allow arbitrary number of DRAM banks.
- Correctly calculate the number of DRAM banks.
- Clip PCIe memory in the same way as U-Boot CPU memory use.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
6 years agoARM: tegra: use LINUX_KERNEL_IMAGE_HEADER
Stephen Warren [Wed, 3 Jan 2018 21:31:52 +0000 (14:31 -0700)]
ARM: tegra: use LINUX_KERNEL_IMAGE_HEADER

Enable CONFIG_LINUX_KERNEL_IMAGE_HEADER for all 64-bit Tegra boards.
cboot (the boot SW that runs before U-Boot) will eventually use this
information.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
6 years agoARMv8: add optional Linux kernel image header
Stephen Warren [Wed, 3 Jan 2018 21:31:51 +0000 (14:31 -0700)]
ARMv8: add optional Linux kernel image header

Allow placing a Linux kernel image header at the start of the U-Boot
binary. This is useful since the image header reports the amount of memory
(BSS and similar) that U-Boot needs to use, but that isn't part of the
binary size. This can be used by the code that loads U-Boot into memory to
determine where to load U-Boot, based on other users of memory.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
6 years agoARM: tegra: use CONFIG_SYS_INIT_SP_BSS_OFFSET
Stephen Warren [Wed, 20 Dec 2017 01:30:37 +0000 (18:30 -0700)]
ARM: tegra: use CONFIG_SYS_INIT_SP_BSS_OFFSET

Enable CONFIG_SYS_INIT_SP_BSS_OFFSET for all 64-bit Tegra boards. Place
the stack/... 512KiB from the end of the U-Boot binary. This should be
plenty to accommodate the current DTBs (max 64 KiB), early malloc region
(6KiB), stack usage, and plenty of slack, while still not placing it too
far away from the U-Boot binary.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
6 years agoARMv8: Allow dynamic early stack pointer
Stephen Warren [Wed, 20 Dec 2017 01:30:36 +0000 (18:30 -0700)]
ARMv8: Allow dynamic early stack pointer

U-Boot typically uses a hard-coded value for the stack pointer before
relocation. Implement option SYS_INIT_SP_BSS_OFFSET to instead calculate
the initial SP at run-time. This is useful to avoid hard-coding addresses
into U-Boot, so that can be loaded and executed at arbitrary addresses and
thus avoid using arbitrary addresses at runtime. This option's value is
the offset added to &_bss_start in order to calculate the stack pointer.
This offset should be large enough so that the early malloc region, global
data (gd), and early stack usage do not overlap any appended DTB.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
6 years agoARM: tegra: remove SPL config for non-SPL SoCs
Stephen Warren [Wed, 20 Dec 2017 01:30:35 +0000 (18:30 -0700)]
ARM: tegra: remove SPL config for non-SPL SoCs

No 64-bit Tegra uses SPL. Remove various unused definitions from config
headers.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
6 years agoARM: tegra: don't use CONFIG_SPL_TEXT_BASE when no SPL
Stephen Warren [Wed, 20 Dec 2017 01:30:34 +0000 (18:30 -0700)]
ARM: tegra: don't use CONFIG_SPL_TEXT_BASE when no SPL

64-bit Tegra don't use SPL, and soon won't define CONFIG_SPL_TEXT_BASE
when building. Fix the binman .dts file so that it doesn't use undefined
values.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
6 years agommc: fsl_esdhc: Fix eMMC 1.8v setting issue
Peng Fan [Tue, 2 Jan 2018 08:51:22 +0000 (16:51 +0800)]
mmc: fsl_esdhc: Fix eMMC 1.8v setting issue

Current USDHC driver will reset VSELECT to 0 (3.3v) during mmc init,
then set to 1 for 1.8v eMMC I/O. When booting from eMMC, since ROM has
already set VSELECT to 1.8v before running the u-boot. This reset in
USDHC driver causes a short 2.2v pulse on CMD pin.

Fix this issue by not reset VSELECT to 0 when 1.8v flag is set.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
6 years agopower: Rearrange code to guard power command with CONFIG_SPL_BUILD guard
Tom Rini [Fri, 22 Dec 2017 17:27:14 +0000 (12:27 -0500)]
power: Rearrange code to guard power command with CONFIG_SPL_BUILD guard

In order to discard this code when unused in SPL we need to guard the
command with a check for CONFIG_SPL_BUILD and we rearrange the code
slightly to make this cleaner.

Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agotravis.yml: Support RISC-V
Rick Chen [Fri, 12 Jan 2018 06:57:09 +0000 (14:57 +0800)]
travis.yml: Support RISC-V

Enable travis-ci support with a link having built.

Signed-off-by: Chih-Mao Chen <cmchen@andestech.com>
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
6 years agoriscv: doc: Add relative doc to describe RISC-V
Rick Chen [Tue, 26 Dec 2017 05:55:59 +0000 (13:55 +0800)]
riscv: doc: Add relative doc to describe RISC-V

Add documents to describe NX25 and AE250.
Also update other documents for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
6 years agoriscv: Modify generic codes to support RISC-V
Rick Chen [Tue, 26 Dec 2017 05:55:58 +0000 (13:55 +0800)]
riscv: Modify generic codes to support RISC-V

Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
6 years agoriscv: Support standalone
Rick Chen [Tue, 26 Dec 2017 05:55:57 +0000 (13:55 +0800)]
riscv: Support standalone

Run hello_world successfully.

U-Boot 2018.01-rc2-00033-gb265b91-dirty (Dec 22 2017 - 13:54:21 +0800)

DRAM:  1 GiB
MMC:   mmc@f0e00000: 0
SF: Detected mx25u1635e with page size 256 Bytes, erase size 4 KiB, total 2 MiB
In:    serial@f0300000
Out:   serial@f0300000
Err:   serial@f0300000
Net:
Warning: mac@e0100000 (eth0) using random MAC address - 0a:47:9b:f8:b4:f2
eth0: mac@e0100000
RISC-V # mmc rescan
RISC-V # fatls mmc 0:1
318907   u-boot-ae250-64.bin
1252   hello_world_ae250_32.bin
328787   u-boot-ae250-32.bin

3 file(s), 0 dir(s)

RISC-V # fatload mmc 0:1 0x600000 hello_world_ae250_32.bin
reading hello_world_ae250_32.bin
1252 bytes read in 23 ms (52.7 KiB/s)
RISC-V # go 0x600000
Example expects ABI version 9
Actual U-Boot ABI version 9
Hello World
argc = 1
argv[0] = "0x600000"
argv[1] = "$B@"
Hit any key to exit ...

RISC-V #

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
6 years agoriscv: tools: Prelink u-boot
Rick Chen [Tue, 26 Dec 2017 05:55:56 +0000 (13:55 +0800)]
riscv: tools: Prelink u-boot

Add prelink-riscv to arrange .rela.dyn and .rela.got
in compile time. So that u-boot can be directly
executed without fixup.

Signed-off-by: Chih-Mao Chen <cmchen@andestech.com>
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
6 years agoriscv: defconfig: Add nx25-ae250 defconfig to support RISC-V
Rick Chen [Tue, 26 Dec 2017 05:55:55 +0000 (13:55 +0800)]
riscv: defconfig: Add nx25-ae250 defconfig to support RISC-V

Add nx25-ae250 default configuration for RISC-V

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
6 years agoriscv: configs: Add nx25-ae250.h to support RISC-V
Rick Chen [Tue, 26 Dec 2017 05:55:54 +0000 (13:55 +0800)]
riscv: configs: Add nx25-ae250.h to support RISC-V

Add nx25-ae250 board configuartion options for RISC-V

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
6 years agoriscv: board: Add nx25-ae250 to support RISC-V
Rick Chen [Tue, 26 Dec 2017 05:55:53 +0000 (13:55 +0800)]
riscv: board: Add nx25-ae250 to support RISC-V

Add nx25-ae250 board to do platform initializations.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
6 years agoriscv: Add Kconfig to support RISC-V
Rick Chen [Tue, 26 Dec 2017 05:55:52 +0000 (13:55 +0800)]
riscv: Add Kconfig to support RISC-V

Add Kconfig and makefile for RISC-V
Also modify MAINTAINERS for it.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Cc: Padmarao Begari <Padmarao.Begari@microsemi.com>
6 years agoriscv: nx25: include: Add header files to support RISC-V
Rick Chen [Tue, 26 Dec 2017 05:55:51 +0000 (13:55 +0800)]
riscv: nx25: include: Add header files to support RISC-V

Add header files for RISC-V.
Cache, ptregs, data type and other definitions are included.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
6 years agoriscv: nx25: dts: Add AE250 dts to support RISC-V
Rick Chen [Tue, 26 Dec 2017 05:55:50 +0000 (13:55 +0800)]
riscv: nx25: dts: Add AE250 dts to support RISC-V

AE250 is the Soc using NX25 cpu core base on RISC-V arch.
Details please see the doc/README.ae250.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
6 years agoriscv: nx25: lib: Add relative lib funcs to support RISC-V
Rick Chen [Tue, 26 Dec 2017 05:55:49 +0000 (13:55 +0800)]
riscv: nx25: lib: Add relative lib funcs to support RISC-V

Add makefile, interrupts.c and boot.c,... functions
to support RISC-V arch.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Cc: Padmarao Begari <Padmarao.Begari@microsemi.com>
6 years agoriscv: cpu: Add nx25 to support RISC-V
Rick Chen [Tue, 26 Dec 2017 05:55:48 +0000 (13:55 +0800)]
riscv: cpu: Add nx25 to support RISC-V

Add Andes nx25 cpu core (called AndesStar V5) to support RISC-V arch

Verifications:
1. startup and relocation ok.
2. boot from rom or ram both ok.
2. timer driver ok.
3. uart driver ok
4. mmc driver ok
5. spi driver ok.
6. 32/64 bit both ok.

Detail verification message please see doc/README.ae250.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Cc: Padmarao Begari <Padmarao.Begari@microsemi.com>
6 years agommc: remove hc_wp_grp_size from struct mmc if not needed
Jean-Jacques Hiblot [Thu, 4 Jan 2018 14:23:36 +0000 (15:23 +0100)]
mmc: remove hc_wp_grp_size from struct mmc if not needed

hc_wp_grp_size is needed only if hardware partitionning is used.
On ARM removing it saves about 30 bytes of code space.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
6 years agommc: don't read the size of eMMC enhanced user data area in SPL
Jean-Jacques Hiblot [Thu, 4 Jan 2018 14:23:35 +0000 (15:23 +0100)]
mmc: don't read the size of eMMC enhanced user data area in SPL

This information is only used by the "mmc info" command.
On ARM removing this information from SPL saves about 140 of code space.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
6 years agommc: compile out erase and write mmc commands if write operations are not enabled
Jean-Jacques Hiblot [Thu, 4 Jan 2018 14:23:34 +0000 (15:23 +0100)]
mmc: compile out erase and write mmc commands if write operations are not enabled

Also remove erase_grp_size and write_bl_len from struct mmc as they are
not used anymore. On ARM, removing them saves about 100 bytes of code
space in SPL.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
6 years agommc: read ssr only if MMC write support is enabled
Jean-Jacques Hiblot [Thu, 4 Jan 2018 14:23:33 +0000 (15:23 +0100)]
mmc: read ssr only if MMC write support is enabled

The content of ssr is useful only for erase operations.
on ARM, removing sd_read_ssr() saves around 300 bytes.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
6 years agommc: add a Kconfig option to enable the support for MMC write operations
Jean-Jacques Hiblot [Thu, 4 Jan 2018 14:23:32 +0000 (15:23 +0100)]
mmc: add a Kconfig option to enable the support for MMC write operations

This allows using CONFIG_IS_ENABLED(MMC_WRITE) to compile out code
needed only if write support is required.
The option is added for u-boot and for SPL

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
6 years agommc: reworked version lookup in mmc_startup_v4
Jean-Jacques Hiblot [Thu, 4 Jan 2018 14:23:31 +0000 (15:23 +0100)]
mmc: reworked version lookup in mmc_startup_v4

Using a table versus a switch() structure saves a bit of space

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
6 years agommc: compile out more code if support for UHS and HS200 is not enabled
Jean-Jacques Hiblot [Thu, 4 Jan 2018 14:23:30 +0000 (15:23 +0100)]
mmc: compile out more code if support for UHS and HS200 is not enabled

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
6 years agommc: atmel: when sending a data command, use the provided block size
Jean-Jacques Hiblot [Thu, 4 Jan 2018 14:23:29 +0000 (15:23 +0100)]
mmc: atmel: when sending a data command, use the provided block size

struct mmc_data contains the block size to use for the data transfer.
Use this information instead of using the default value or the block length
information stored in struct mmc.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
6 years agocommon: do not compile common fastboot code when building the SPL
Jean-Jacques Hiblot [Thu, 4 Jan 2018 14:23:28 +0000 (15:23 +0100)]
common: do not compile common fastboot code when building the SPL

This is not required as fastboot can't be started from SPL.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
6 years agoam335x_hs_evm: Trim options in SPL to reduce binary size
Tom Rini [Sun, 17 Dec 2017 04:01:22 +0000 (23:01 -0500)]
am335x_hs_evm: Trim options in SPL to reduce binary size

The am335x_hs_evm runs into size constraint problems at times with
various toolchains as changes come in due to the config have a large
number of options in SPL (to showcase what is possible) while also
having rather constrained binary limits.  Gain some of this room back by
lowering the loglevel, disabling HW partition support and switching over
to the tiny FIT image support.

Cc: Andrew F. Davis <afd@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
---
I'd really appreciate a run-time test of this patch if at all possible
as I'm a little worried about TINY_FIT being incompatible with all of
the security options.  Thanks!

6 years agodm: mmc: sandbox: Update SD card emulation
Jean-Jacques Hiblot [Thu, 14 Dec 2017 10:47:14 +0000 (11:47 +0100)]
dm: mmc: sandbox: Update SD card emulation

The SDcard initialization procedure does a few more things than it did earlier:
* switch the bus width even for 1-bit bus width
* check that speed has been properly set (in resp[4] of SD_CMD_SWITCH_FUNC)

Update the SD simulator to handle those requests gracefully.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
6 years agoconfigs: omapl138_lcdk: decrease the loglevel to reduce the size of the SPL
Jean-Jacques Hiblot [Thu, 30 Nov 2017 16:44:04 +0000 (17:44 +0100)]
configs: omapl138_lcdk: decrease the loglevel to reduce the size of the SPL

The changes in the MMC stack have increased its footprint up to the point
were its breaks the generation of the SPL for this platform.
Fix this by reducing the loglevel.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Peter Howard <phoward@gme.net.au>
6 years agoconfigs: openrd: removed support for eMMC hardware partitioning
Jean-Jacques Hiblot [Thu, 30 Nov 2017 16:44:03 +0000 (17:44 +0100)]
configs: openrd: removed support for eMMC hardware partitioning

builds are broken because the size of the binary exceeds the limit.
Make some space by removing support for hardware partitioning as those
boards don't have any eMMC.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
6 years agommc: make optional the support for eMMC hardware partitioning
Jean-Jacques Hiblot [Thu, 30 Nov 2017 16:44:02 +0000 (17:44 +0100)]
mmc: make optional the support for eMMC hardware partitioning

Not all boards have an eMMC and not all users have a need for this.
Allow to compile it out. By default it is still included.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
6 years agommc: make UHS and HS200 optional
Jean-Jacques Hiblot [Thu, 30 Nov 2017 16:44:01 +0000 (17:44 +0100)]
mmc: make UHS and HS200 optional

Supporting USH and HS200 increases the code size as it brings in IO voltage
control, tuning and fatter data structures.
Use Kconfig configuration to select which of those features should be
built in.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
6 years agommc: convert most of printf() to pr_err() and pr_warn()
Jean-Jacques Hiblot [Thu, 30 Nov 2017 16:44:00 +0000 (17:44 +0100)]
mmc: convert most of printf() to pr_err() and pr_warn()

This allows to compile out the log message by tweaking the LOGLEVEL.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
6 years agommc: don't use malloc_cache_aligned()
Jean-Jacques Hiblot [Thu, 30 Nov 2017 16:43:59 +0000 (17:43 +0100)]
mmc: don't use malloc_cache_aligned()

Not using this function reduces the size of the binary. It's replaces by
a standard malloc() and the alignment requirement is handled by an
intermediate buffer on the stack.

Also make sure that the allocated buffer is freed in case of error.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
6 years agommc: fix for old MMCs (below version 4)
Jean-Jacques Hiblot [Thu, 30 Nov 2017 16:43:58 +0000 (17:43 +0100)]
mmc: fix for old MMCs (below version 4)

The ext_csd is allocated only for MMC above version 4. The compare will
crash or fail for older MMCs.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
6 years agommc: all hosts support 1-bit bus width and legacy timings
Jean-Jacques Hiblot [Thu, 30 Nov 2017 16:43:57 +0000 (17:43 +0100)]
mmc: all hosts support 1-bit bus width and legacy timings

Make sure that those basic capabilities are advertised by the host.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agommc: Fixed a problem with old sd or mmc that do not support High speed
Jean-Jacques Hiblot [Thu, 30 Nov 2017 16:43:56 +0000 (17:43 +0100)]
mmc: Fixed a problem with old sd or mmc that do not support High speed

As the legacy modes were not added to the list of supported modes, old
cards that do not support other modes could not be used.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agodm: mmc: update mmc_of_parse()
Jean-Jacques Hiblot [Thu, 30 Nov 2017 16:43:55 +0000 (17:43 +0100)]
dm: mmc: update mmc_of_parse()

* convert to livetree API
* don't fail because of an invalid bus-width, instead default to 1-bit.
* recognize 1.2v DDR and 1.2v HS200 flags

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
6 years agommc: dump card and host capabilities if debug is enabled
Jean-Jacques Hiblot [Thu, 30 Nov 2017 16:43:54 +0000 (17:43 +0100)]
mmc: dump card and host capabilities if debug is enabled

This is a useful information while debugging the initialization process or
performance issues.
Also dump this information with the other mmc info if the verbose option
is selected

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
6 years agommc: meson_gx_mmc: fix the complie error
Jaehoon Chung [Mon, 27 Nov 2017 09:42:05 +0000 (18:42 +0900)]
mmc: meson_gx_mmc: fix the complie error

mmc_set_clock() is changed.
This patch is for fixing complie error.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
6 years agodm: mmc: Add a library function to parse generic dt binding
Kishon Vijay Abraham I [Thu, 21 Sep 2017 14:30:13 +0000 (16:30 +0200)]
dm: mmc: Add a library function to parse generic dt binding

Add a new function to parse host controller dt node and
set mmc_config. This function can be used by mmc controller
drivers to set the generic mmc_config.
This function can be extended to set other UHS mode caps
once UHS mode support is added.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
6 years agommc: add a library function to send tuning command
Jean-Jacques Hiblot [Thu, 21 Sep 2017 14:30:12 +0000 (16:30 +0200)]
mmc: add a library function to send tuning command

HS200/SDR104 requires tuning command to be sent to the card.
Add a simple function to send tuning command and to read and
compare the received data with the tuning block pattern.
This function can be used by platform driver to perform DLL
tuning.
This patch is similar to
commit 996903de92f0 ("mmc: core: add core-level function for
sending tuning commands") added in linux kernel.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
6 years agommc: use the right voltage level for MMC DDR and HS200 modes
Jean-Jacques Hiblot [Thu, 21 Sep 2017 14:30:11 +0000 (16:30 +0200)]
mmc: use the right voltage level for MMC DDR and HS200 modes

HS200 only supports 1.2v and 1.8v signal voltages. DDR52 supports 3.3v/1.8v
or 1.2v signal voltages.
Select the lowest voltage available when using those modes.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
6 years agommc: Retry some MMC cmds on failure
Kishon Vijay Abraham I [Thu, 21 Sep 2017 14:30:10 +0000 (16:30 +0200)]
mmc: Retry some MMC cmds on failure

With certain SD cards like Kingston 8GB/16GB UHS card, it is seen that
MMC_CMD_ALL_SEND_CID cmd fails on first attempt, but succeeds
subsequently. Therefore, retry MMC_CMD_ALL_SEND_CID cmd a few time
as done in Linux kernel.
Similarly, it is seen that MMC_CMD_SET_BLOCKLEN may fail on first
attempt, therefore retry this cmd a few times as done in kernel.

To make it clear that those are optionnal workarounds, a new Kconfig
option 'MMC_QUIRKS' is added (enabled by default).

Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
6 years agommc: Change mode when switching to a boot partition
Jean-Jacques Hiblot [Thu, 21 Sep 2017 14:30:09 +0000 (16:30 +0200)]
mmc: Change mode when switching to a boot partition

Boot partitions do not support HS200. Changing to a lower performance mode
is required to access them.
mmc_select_mode_and_width() and sd_select_mode_and_width() are modified to
make it easier to call them outside of the initialization context.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agommc: disable UHS modes if Vcc cannot be switched on and off
Jean-Jacques Hiblot [Thu, 21 Sep 2017 14:30:08 +0000 (16:30 +0200)]
mmc: disable UHS modes if Vcc cannot be switched on and off

If a power cycle cannot be done on Vcc, it is safer not to try the UHS
modes because we wouldn't be able to recover from an error occurring
during the UHS initialization.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
6 years agommc: Add support for UHS modes
Jean-Jacques Hiblot [Thu, 21 Sep 2017 14:30:07 +0000 (16:30 +0200)]
mmc: Add support for UHS modes

Add UHS modes to the list of supported modes, get the UHS capabilites of
the SDcard and implement the procedure to switch the voltage (UHS modes
use 1v8 IO lines)
During the voltage switch procedure, DAT0 is used by the card to signal
when it's ready. The optional card_busy() callback can be used to get this
information from the host driver.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agommc: add HS200 support in MMC core
Kishon Vijay Abraham I [Thu, 21 Sep 2017 14:30:06 +0000 (16:30 +0200)]
mmc: add HS200 support in MMC core

Add HS200 to the list of supported modes and introduce tuning in the MMC
startup process.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agommc: Add a execute_tuning() callback to the mmc operations.
Kishon Vijay Abraham I [Thu, 21 Sep 2017 14:30:05 +0000 (16:30 +0200)]
mmc: Add a execute_tuning() callback to the mmc operations.

Tuning is a mandatory step in the initialization of SDR104 and HS200 modes.
This callback execute the tuning process.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
6 years agommc: disable the mmc clock during power off
Kishon Vijay Abraham I [Thu, 21 Sep 2017 14:30:04 +0000 (16:30 +0200)]
mmc: disable the mmc clock during power off

There is no point in having the mmc clock enabled during
power off. Disable the mmc clock. This is similar to how it's
programmed in Linux Kernel.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agommc: add a new mmc parameter to disable mmc clock
Kishon Vijay Abraham I [Thu, 21 Sep 2017 14:30:03 +0000 (16:30 +0200)]
mmc: add a new mmc parameter to disable mmc clock

mmc clock has to be disabled in certain cases like during
the voltage switch sequence. Modify mmc_set_clock function
to take disable as an argument that signifies if the
clock has to be enabled or disabled.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
6 years agommc: add power cyle support in mmc core
Kishon Vijay Abraham I [Thu, 21 Sep 2017 14:30:02 +0000 (16:30 +0200)]
mmc: add power cyle support in mmc core

mmc/sd specification requires vdd to be disabled for 1 ms
and then enabled again during power cycle. Add a
function in mmc core to perform power cycle and set
the io signal to it's initial state.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
6 years agommc: Add a new callback function to perform the 74 clocks cycle sequence
Jean-Jacques Hiblot [Thu, 21 Sep 2017 14:30:01 +0000 (16:30 +0200)]
mmc: Add a new callback function to perform the 74 clocks cycle sequence

Add a new callback function *send_init_stream* which start a sequence of
at least 74 clock cycles.
The mmc core uses *mmc_send_init_stream* in order to invoke the callback
function. This will be used during power cycle where the specification
requires such a sequence after power up.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
6 years agommc: Enable signal voltage to be selected from mmc core
Kishon Vijay Abraham I [Thu, 21 Sep 2017 14:30:00 +0000 (16:30 +0200)]
mmc: Enable signal voltage to be selected from mmc core

Add a new function *mmc_set_signal_voltage* in mmc core
which can be used during mmc initialization to select the
signal voltage. Platform driver should use the set_ios
callback function to select the signal voltage.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
6 years agommc: make mmc_set_ios() return status
Kishon Vijay Abraham I [Thu, 21 Sep 2017 14:29:59 +0000 (16:29 +0200)]
mmc: make mmc_set_ios() return status

set_ios callback has a return value of 'int' but the mmc_set_ios()
function ignore this. Modify mmc_set_ios() and the callers of mmc_set_ios() to
to return the error status.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agommc: refactor MMC startup to make it easier to support new modes
Jean-Jacques Hiblot [Thu, 21 Sep 2017 14:29:58 +0000 (16:29 +0200)]
mmc: refactor MMC startup to make it easier to support new modes

The MMC startup process currently handles 4 modes. To make it easier to
add support for more modes, let's make the process more generic and use a
list of the modes to try.
The major functional change is that when a mode fails we try the next one.
Not all modes are tried, only those supported by the card and the host.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agommc: refactor SD startup to make it easier to support new modes
Jean-Jacques Hiblot [Thu, 21 Sep 2017 14:29:57 +0000 (16:29 +0200)]
mmc: refactor SD startup to make it easier to support new modes

The SDcard startup process currently handles only 2 modes. To make it
easier to add support for more modes, let's make the process more generic
and use a list of the modes to try.
The major functional change is that when a mode fails we try the next one.
Not all modes are tried, only those supported by the card and the host.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agocmd: mmc: display the mode name and current bus speed in the mmc info
Jean-Jacques Hiblot [Thu, 21 Sep 2017 14:29:56 +0000 (16:29 +0200)]
cmd: mmc: display the mode name and current bus speed in the mmc info

Display the mode name when the user execute 'mmc info'. Also instead of
displaying tran_speed, display the actual bus speed.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agommc: use mmc modes to select the correct bus speed
Jean-Jacques Hiblot [Thu, 21 Sep 2017 14:29:55 +0000 (16:29 +0200)]
mmc: use mmc modes to select the correct bus speed

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agommc: Add a function to dump the mmc capabilities
Jean-Jacques Hiblot [Thu, 21 Sep 2017 14:29:54 +0000 (16:29 +0200)]
mmc: Add a function to dump the mmc capabilities

This adds a simple helper function to display information (bus width and
mode) based on a capability mask. Useful for debug.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
6 years agommc: introduce mmc modes
Jean-Jacques Hiblot [Thu, 21 Sep 2017 14:29:53 +0000 (16:29 +0200)]
mmc: introduce mmc modes

no functionnal changes.
In order to add the support for the high speed SD and MMC modes, it is
useful to track this information.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agommc: add a function to read and test the ext csd (mmc >= 4)
Jean-Jacques Hiblot [Thu, 21 Sep 2017 14:29:52 +0000 (16:29 +0200)]
mmc: add a function to read and test the ext csd (mmc >= 4)

This will be reused later in the selection of high speed and ddr modes.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agommc: make ext_csd part of struct mmc
Jean-Jacques Hiblot [Thu, 21 Sep 2017 14:29:51 +0000 (16:29 +0200)]
mmc: make ext_csd part of struct mmc

The ext csd is used for comparison many times. Keep a reference content
of the ext csd in the struct mmc to avoid reading multiple times

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agommc: move the MMC startup for version above v4.0 in a separate function
Jean-Jacques Hiblot [Thu, 21 Sep 2017 14:29:50 +0000 (16:29 +0200)]
mmc: move the MMC startup for version above v4.0 in a separate function

no functionnal change. This is only to further reduce the size o
mmc_startup().

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agommc: split mmc_startup()
Jean-Jacques Hiblot [Thu, 21 Sep 2017 14:29:49 +0000 (16:29 +0200)]
mmc: split mmc_startup()

No functionnal change here. The function is really big and can be split.
The part related to bus configuration are put in 2 separate functions: one
for MMC and one for SD.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agommc: dm: get the IO-line and main voltage regulators from the dts
Jean-Jacques Hiblot [Thu, 21 Sep 2017 14:29:48 +0000 (16:29 +0200)]
mmc: dm: get the IO-line and main voltage regulators from the dts

Get a reference to the regulator devices from the dts and store them
in the struct mmc for later use.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
6 years agommc: sdhci: do not compare pointer to 0
Heinrich Schuchardt [Fri, 10 Nov 2017 20:13:34 +0000 (21:13 +0100)]
mmc: sdhci: do not compare pointer to 0

data is defined as struct mmc_data *data.
So it should not be compared to 0.

Problem identified with Coccinelle.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
6 years agommc: sdhci: don't clear SDHCI_INT_STATUS register during CMD_INHIBIT
Jorge Ramirez-Ortiz [Thu, 2 Nov 2017 14:10:21 +0000 (15:10 +0100)]
mmc: sdhci: don't clear SDHCI_INT_STATUS register during CMD_INHIBIT

Fixes emmc initialization regression on the db410c platform.

Clearing this register while SDHCI_PRESENT_STATE reports
SDHCI_CMD_INHIBIT leads to undefined behaviour on the db410c.

When commit 7dde50 was merged (mmc: sdhci: Wait for SDHCI_INT_DATA_END
when transferring), SDHCI transfers transitioned to wait for bit
SDHCI_INT_DATA_END before flagging transfers done.

Without this patch, the db410 platform fails to initialize its eMMC
due to all of its transfers timing out (SDHCI_INT_DATA_END is never
raised after all the blocks have been transferred).

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
6 years agommc: sanitize includes for DM i2c
Felix Brack [Wed, 11 Oct 2017 15:05:28 +0000 (17:05 +0200)]
mmc: sanitize includes for DM i2c

This patch fixes some warnings when building boards that do not define
DM_I2C_COMPAT i.e. boards that entirely rely on the new i2c layer.
Signed-off-by: Felix Brack <fb@ltec.ch>
6 years agodrivers: mmc: Avoid memory leak in case of failure
Suniel Mahesh [Thu, 5 Oct 2017 06:18:56 +0000 (11:48 +0530)]
drivers: mmc: Avoid memory leak in case of failure

priv pointer should be freed before returning with an error value
from exynos_dwmci_get_config().

Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
Signed-off-by: Raghu Bharadwaj <raghu@techveda.org>
6 years agodrivers: mmc: Change buffer type in ALLOC_CACHE_ALIGN_BUFFER macro
Suniel Mahesh [Thu, 5 Oct 2017 06:02:00 +0000 (11:32 +0530)]
drivers: mmc: Change buffer type in ALLOC_CACHE_ALIGN_BUFFER macro

__be32_to_cpu() accepts argument of type __be32. This patch changes
type of the buffer in ALLOC_CACHE_ALIGN_BUFFER macro to __be32, which
is then passed to __be32_to_cpu().
This prevents sparse build warnings.
drivers/mmc/mmc.c: warning: cast to restricted __be32

Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
Signed-off-by: Karthik Tummala <karthik@techveda.org>
6 years agoMerge git://git.denx.de/u-boot-sunxi
Tom Rini [Thu, 11 Jan 2018 19:14:19 +0000 (14:14 -0500)]
Merge git://git.denx.de/u-boot-sunxi

6 years agoconfigs: sun50i: Enable eMMC on a64-olinuxino
Jagan Teki [Wed, 10 Jan 2018 08:50:06 +0000 (14:20 +0530)]
configs: sun50i: Enable eMMC on a64-olinuxino

a64-olinuxino has 8GiB eMMC, enable it.

Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agoMerge git://git.denx.de/u-boot-video
Tom Rini [Thu, 11 Jan 2018 18:43:36 +0000 (13:43 -0500)]
Merge git://git.denx.de/u-boot-video

6 years agoMerge git://git.denx.de/u-boot-fsl-qoriq
Tom Rini [Thu, 11 Jan 2018 16:18:49 +0000 (11:18 -0500)]
Merge git://git.denx.de/u-boot-fsl-qoriq

6 years agoMerge git://git.denx.de/u-boot-socfpga
Tom Rini [Thu, 11 Jan 2018 16:18:41 +0000 (11:18 -0500)]
Merge git://git.denx.de/u-boot-socfpga

6 years agoMerge git://git.denx.de/u-boot-usb
Tom Rini [Thu, 11 Jan 2018 16:18:29 +0000 (11:18 -0500)]
Merge git://git.denx.de/u-boot-usb

6 years agoboard/BuR: drop LCDC clock manipulation from board code
Hannes Schmelzer [Tue, 9 Jan 2018 18:01:36 +0000 (19:01 +0100)]
board/BuR: drop LCDC clock manipulation from board code

The clock selection is done now from the am335x-fb code, so there is no
more need doing this in the board code.

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
6 years agoboard/BuR: provide real clock-frequency instead a divider
Hannes Schmelzer [Tue, 9 Jan 2018 18:01:35 +0000 (19:01 +0100)]
board/BuR: provide real clock-frequency instead a divider

Actual am335x-fb implementation takes now a real clock frequency instead
a divider. So this component doesn't need to know anymore some base
frequency of the LCDC, we simply provide the pixel-clock frequency.

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
6 years agoam335x-fb: setup display PLL
Hannes Schmelzer [Tue, 9 Jan 2018 18:01:34 +0000 (19:01 +0100)]
am335x-fb: setup display PLL

The LCDC IP-core an be feed from several clock sources, one of those is
a dedicated DPLL for generating a dividable base-clock for this IP-core.

The TRM specifies the maximum input frequency for the LCCD with 200 MHz,
so we must not exceed this value with the PLL frequency (which can lock
much higher).

This patch tries every combination of multipliers and divisors of the
PLL and the IP-core itself for getting as near as possible the the
requested panel->pxl_clk.

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Anatolij Gustschin <agust@denx.de>