Simon Glass [Mon, 16 Jan 2017 14:04:05 +0000 (07:04 -0700)]
x86: Drop flag_is_changable() on x86_64
This doesn't build at present and is not used in a 64-bit build. Disable it
for now.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Jan 2017 14:04:04 +0000 (07:04 -0700)]
x86: Fix up byteorder.h for x86_64
Remove the very old x86 code and add support for 64-bit.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Jan 2017 14:04:03 +0000 (07:04 -0700)]
x86: Add SPL build rules for start-up code
When SPL is used we need to build the 16-bit start-up code. Add Makefile
rules to handle this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Jan 2017 14:04:02 +0000 (07:04 -0700)]
x86: Add a link script for SPL
If SPL is used it is always build in 32-bit mode. Add a link script to
handle the correct placement of the sections.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Jan 2017 14:04:01 +0000 (07:04 -0700)]
x86: Add a link script for 64-bit x86
This needs a different image format from 32-bit x86, so add a new link
script.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Jan 2017 14:04:00 +0000 (07:04 -0700)]
x86: Fix up CONFIG_X86_64 check
When SPL and U-Boot proper have different settings for this flag, we need to
use the correct one. Fix this up in the interrupt code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Jan 2017 14:03:59 +0000 (07:03 -0700)]
x86: Support global_data on x86_64
At present this is just an ordinary variable. We may consider making it a
fixed register in the future.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Jan 2017 14:03:58 +0000 (07:03 -0700)]
x86: Add cpu code for x86_64
There is not much needed at present, but set up a separate directory to put
this code as it grows.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Jan 2017 14:03:57 +0000 (07:03 -0700)]
x86: Move the i386 code into its own directory
Much of the cpu and interrupt code cannot be compiled on 64-bit x86. Move it
into its own directory and build it only in 32-bit mode.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Jan 2017 14:03:56 +0000 (07:03 -0700)]
x86: Add an SPL implementation
SPL needs to set up the machine ready for loading 64-bit U-Boot and jumping
to it. Call the existing init routines in order to accomplish this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Jan 2017 14:03:55 +0000 (07:03 -0700)]
x86: Tidy up use of size_t in relocation
Addresses should not be cast to size_t. Use uintptr_t instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Jan 2017 14:03:54 +0000 (07:03 -0700)]
x86: Add support for 64-bit relocation
Add a 64-bit relocation function. SPL loads U-Boot into RAM at a fixed
address and runs it. U-Boot then relocates itself to the top of RAM using
this relocation function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Jan 2017 14:03:53 +0000 (07:03 -0700)]
x86: Refactor relocation to prepare for 64-bit
Move the core relocation code into a separate function so that the checking
code can be used for 64-bit relocation also.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Jan 2017 14:03:52 +0000 (07:03 -0700)]
x86: Do relocation before clearing BSS
The BSS region may overlap with relocations. If we clear BSS we will
overwrite the start of the relocation area. This doesn't matter when running
from SPI flash, since it is read-only. But when relocating 64-bit U-Boot
from one place in RAM to another, relocation will fail because some of its
relocations have been zeroed.
To fix this, put the ELF fixup call before the BSS clearing call.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Jan 2017 14:03:51 +0000 (07:03 -0700)]
x86: board_r: Set the global data pointer after relocation
Since 'gd' is just a normal variable on 64-bit x86, it is relocated by the
time we get to board_init_r(). The old 'gd' variable is passed in as
parameter to board_init_r(), presumably for this situation.
Assign it on 64-bit x86 so that gd points to the correct data.
Options to improve this:
- Make gd a fixed register and remove the board_init_r() parameter
- Make all archs use this board_init_r() parameter
The second has a TODO in the code. The first has a TODO in a future commit
('x86: Support global_data on x86_64')
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Jan 2017 14:03:50 +0000 (07:03 -0700)]
board_f/r: Use static const for the init sequences
These tables should be declared static const. Unfortunately the table in
board_r is updated on machines with manual relocation.
Update them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Jan 2017 14:03:49 +0000 (07:03 -0700)]
x86: board_f: Update init sequence for 64-bit startup
Adjust the code so that 64-bit startup works. Since we don't need to do CAR
changes in U-Boot proper anymore (they are done in SPL) we can simplify the
flow and return normally from board_init_f().
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Jan 2017 14:03:48 +0000 (07:03 -0700)]
x86: Add 64-bit start-up code
Add code to start up U-Boot in 64-bit mode. It is fairly simple since we are
running from RAM and SPL has done the low-level init.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Jan 2017 14:03:47 +0000 (07:03 -0700)]
x86: ivybridge: Allow 32-bit init to move to SPL
Update the Makefile so that some 32-bit init can be built into SPL rather
than U-Boot proper.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Jan 2017 14:03:46 +0000 (07:03 -0700)]
x86: Use X86_32BIT_INIT instead of X86_RESET_VECTOR
Use this new option to control the location of 32-bit init. This will allow
us to place this in SPL if needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Jan 2017 14:03:45 +0000 (07:03 -0700)]
x86: Use X86_16BIT_INIT instead of X86_RESET_VECTOR
Use this new option to control the location of 16-bit init. This will allow
us to place this in SPL if needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Jan 2017 14:03:44 +0000 (07:03 -0700)]
x86: Kconfig: Add location options for 16/32-bit init
At present all 16/32-bit init is controlled by CONFIG_X86_RESET_VECTOR. If
this is enabled, then U-Boot is the 'first' boot loader and handles execution
from the reset vector through to U-Boot's command prompt. If it is not
enabled then U-Boot starts at the 32-bit entry and skips most of its init,
assuming that the previous boot loader has done this already.
With the move to suport 64-bit operation, we have more cases to consider.
The 16-bit and 32-bit init may be in SPL rather than in U-Boot proper.
Add Kconfig options which control the location of the 16-bit and the 32-bit
init. These are not intended to be user-setting except for experimentation.
Their values should be determined by whether 64-bit U-Boot is used.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Jan 2017 14:03:43 +0000 (07:03 -0700)]
x86: Add Kconfig options to build 64-bit U-Boot
Add a new CONFIG_X86_64 option which will eventually cause U-Boot to be
built as a 64-bit application, with SPL doing the 16/32-bit init.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Jan 2017 14:03:42 +0000 (07:03 -0700)]
x86: lib: Fix types and casts for 64-bit compilation
Fix various compiler warnings in the x86 library code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Jan 2017 14:03:41 +0000 (07:03 -0700)]
x86: fsp: Fix cast for 64-bit compilation
Fix a cast in get_next_hob() that causes warnings on 64-bit machines.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Jan 2017 14:03:40 +0000 (07:03 -0700)]
x86: dts: Mark serial as needed before relocation
We almost always need the serial port before relocation, so mark it as such.
This will ensure that it appears in the device tree for SPL, if used.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Jan 2017 14:03:39 +0000 (07:03 -0700)]
x86: ivybridge: Fix types for 64-bit compilation
Fix a few types that causes warnings on 64-bit machines.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Jan 2017 14:03:38 +0000 (07:03 -0700)]
x86: ivybridge: Add more debugging for failures
Add various debug() messages in places where errors occur. This aids with
debugging.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Jan 2017 14:03:37 +0000 (07:03 -0700)]
x86: ivybridge: Declare global data where it is used
Some files are missing this declaration. Add it to avoid build errors when
we actually need the declaration.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Jan 2017 14:03:36 +0000 (07:03 -0700)]
x86: Update mpspec to build on 64-bit machines
At present this uses u32 to store an address. We should use unsigned long
and avoid special types in function return values and parameters unless
necessary. This makes the code more portable.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Jan 2017 14:03:35 +0000 (07:03 -0700)]
x86: Use unsigned long for address in table generation
We should use unsigned long rather than u32 for addresses. Update this so
that the table-generation code builds correctly on 64-bit machines.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Jan 2017 14:03:34 +0000 (07:03 -0700)]
spl: Don't create a BSS padding when it is separate
When BSS does not immediate follow the SPL image we don't need padding
before the device tree. Remove it in this case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Jan 2017 14:03:33 +0000 (07:03 -0700)]
spl: Allow PCH drivers to be used in SPL
Add an option for building Platorm Controller Hub drivers in SPL.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Jan 2017 14:03:32 +0000 (07:03 -0700)]
spl: Allow timer drivers to be used in SPL
Add a new Kconfig option to allow timer drivers to be used in SPL.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Jan 2017 14:03:31 +0000 (07:03 -0700)]
spl: Allow RTC drivers to be used in SPL
Add a new Kconfig option to allow RTC drivers to be used in SPL.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Jan 2017 14:03:30 +0000 (07:03 -0700)]
spl: Allow PCI drivers to be used in SPL
Add a new Kconfig option to allow PCI drivers to be used in SPL.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Jan 2017 14:03:29 +0000 (07:03 -0700)]
spl: Allow CPU drivers to be used in SPL
Add a new Kconfig option to allow CPU drivers to be used in SPL.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Jan 2017 14:03:28 +0000 (07:03 -0700)]
spl: Makefile: Define SPL_ earlier
This Makefile variable can be used in the architecture's main Makefile but
at present it is not set up until later. Set it just before this Makefile is
included.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Jan 2017 14:03:27 +0000 (07:03 -0700)]
spl: spi: Add a debug message if loading fails
This currently fails silently. Add a debug message to aid debugging.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Jan 2017 14:03:26 +0000 (07:03 -0700)]
console: Don't enable CONFIG-CONSOLE_MUX, etc. in SPL
CONFIG_CONSOLE_MUX and CONFIG_SYS_CONSOLE_IS_IN_ENV are not applicable
for SPL. Update the console code to use CONFIG_IS_ENABLED(), so that these
options will be inactive in SPL.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Andy Shevchenko [Sun, 8 Jan 2017 20:51:04 +0000 (23:51 +0300)]
x86: Synchronize list of x86 subarchitectures (update bootparam.h)
Basically rename X86_SUBARCH_MRST to X86_SUBARCH_INTEL_MID to be more specific.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tom Rini [Sat, 4 Feb 2017 01:33:42 +0000 (20:33 -0500)]
Merge git://git.denx.de/u-boot-fsl-qoriq
Signed-off-by: Tom Rini <trini@konsulko.com>
Conflicts:
configs/ls1046aqds_defconfig
configs/ls1046aqds_nand_defconfig
configs/ls1046aqds_qspi_defconfig
configs/ls1046aqds_sdcard_ifc_defconfig
configs/ls1046aqds_sdcard_qspi_defconfig
configs/ls1046ardb_emmc_defconfig
configs/ls1046ardb_qspi_defconfig
configs/ls1046ardb_sdcard_defconfig
Prabhakar Kushwaha [Thu, 2 Feb 2017 09:32:00 +0000 (15:02 +0530)]
arch: powerpc: update the eLBC IP input clock
eLBC IP clock is always a constant divisor of platform clock
pre-defined per SoC. Clock ratio register (LCRR) used in
current implementation governs eLBC IP output cloc.
Update sys_info->freq_localbus to represent eLBC input clock with
value constant divisor of platform clock.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Prabhakar Kushwaha [Thu, 2 Feb 2017 09:31:48 +0000 (15:01 +0530)]
arch: powerpc: Move CONFIG_FSL_ELBC to Kconfig
Enable ELBC from Kconfig.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Prabhakar Kushwaha [Thu, 2 Feb 2017 09:31:37 +0000 (15:01 +0530)]
arch: arm: update the IFC IP input clock
IFC IP clock is always a constant divisor of platform clock
pre-defined per SoC. Clock control register (CCR) used in
current implementation governs IFC IP output clock.
Update sys_info->freq_localbus to represent IFC input clock with
value constant divisor of platform clock.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Prabhakar Kushwaha [Thu, 2 Feb 2017 09:31:26 +0000 (15:01 +0530)]
arch: powerpc: update the IFC IP input clock
IFC IP clock is always a constant divisor of platform clock
pre-defined per SoC. Clock control register (CCR) used in
current implementation governs IFC IP output clock.
Update sys_info->freq_localbus to represent IFC input clock with
value constant divisor of platform clock.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Prabhakar Kushwaha [Thu, 2 Feb 2017 09:31:13 +0000 (15:01 +0530)]
arch: powerpc: Move CONFIG_FSL_IFC to Kconfig
Enable IFC from Kconfig.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Prabhakar Kushwaha [Mon, 30 Jan 2017 11:35:35 +0000 (17:05 +0530)]
armv8: ls1012a: Add support of PPA
The PPA implements PSCI which requires for power managment.
Added support of PPA for LS1012AQDS, LS1012ARDB and LS1012AFRDM.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Prabhakar Kushwaha [Mon, 30 Jan 2017 11:35:22 +0000 (17:05 +0530)]
board: freescale: ls1012a: Enable secure DDR on LS1012A platforms
PPA binary needs to be relocated on secure DDR, hence marking out
a portion of DDR as secure if CONFIG_SYS_MEM_RESERVE_SECURE flag
is set
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Tom Rini [Wed, 1 Feb 2017 21:34:36 +0000 (16:34 -0500)]
Merge git://git.denx.de/u-boot-mpc85xx
Tom Rini [Wed, 1 Feb 2017 21:34:25 +0000 (16:34 -0500)]
Merge branch 'master' of git://denx.de/git/u-boot-imx
Mark Marshall [Tue, 24 Jan 2017 12:47:31 +0000 (13:47 +0100)]
powerpc: mpc5200: Correct return value of memcpy function
The memcpy() function returns a pointer to trg.
Signed-off-by: Mark Marshall <Mark.Marshall@omicron.at>
Reviewed-by: Thomas Graziadei <thomas.graziadei@omicronenergy.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: York Sun <york.sun@nxp.com>
Tom Rini [Wed, 1 Feb 2017 11:57:35 +0000 (06:57 -0500)]
Merge git://www.denx.de/git/u-boot-marvell
Mario Six [Wed, 11 Jan 2017 15:01:00 +0000 (16:01 +0100)]
arm: mvebu: Implement secure boot
The patch implements secure booting for the mvebu architecture.
This includes:
- The addition of secure headers and all needed signatures and keys in
mkimage
- Commands capable of writing the board's efuses to both write the
needed cryptographic data and enable the secure booting mechanism
- The creation of convenience text files containing the necessary
commands to write the efuses
The KAK and CSK keys are expected to reside in the files kwb_kak.key and
kwb_csk.key (OpenSSL 2048 bit private keys) in the top-level directory.
Signed-off-by: Reinhard Pfau <reinhard.pfau@gdsys.cc>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
Mario Six [Wed, 11 Jan 2017 15:00:59 +0000 (16:00 +0100)]
tools: kwbimage: Refactor line parsing and fix error
The function image_create_config_parse_oneline is pretty complex, and
since more parameters will be added to support secure booting, we
refactor the function to make it more readable.
Also, when a line contained just a keyword without any parameters,
strtok_r returned NULL, which was then indiscriminately fed into atoi,
causing a segfault. To correct this, we add a NULL check before feeding
the extracted token to atoi, and print an error message in case the
token is NULL.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Mario Six [Wed, 11 Jan 2017 15:00:58 +0000 (16:00 +0100)]
tools: kwbimage: Factor out add_binary_header_v1
In preparation of adding the creation of secure headers, we factor the
add_binary_header_v1 function out of the image_create_v1 function.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Mario Six [Wed, 11 Jan 2017 15:00:57 +0000 (16:00 +0100)]
tools: kwbimage: Remove unused parameter
The parameter 'params' of the image_headersz_v1 function is never used
by the function.
Hence, remove it.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Mario Six [Wed, 11 Jan 2017 15:00:56 +0000 (16:00 +0100)]
tools: kwbimage: Reduce scope of variables
This patch reduces the scope of some variables.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Mario Six [Wed, 11 Jan 2017 15:00:55 +0000 (16:00 +0100)]
tools: kwbimage: Fix arithmetic with void pointers
Arithmetic with void pointers, e.g. a - b where both a and b are void
pointers, is undefined in the C standard. Since we are operating with
byte data here, we switch the void pointers to uint8_t pointers, and add
the necessary casts.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Mario Six [Wed, 11 Jan 2017 15:00:54 +0000 (16:00 +0100)]
tools: kwbimage: Fix style violations
Fix some style violations:
- nine instances of missing blank lines after declarations
- one overly long line
- one split string (which also rewords an error message more concisely)
- two superfluous else
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Mario Six [Wed, 11 Jan 2017 15:00:53 +0000 (16:00 +0100)]
tools: kwbimage: Fix dest addr
To enable secure boot, we need to jump back into the BootROM to continue
the SoC's boot process instead of letting the SPL load and run the main
U-Boot image.
But, since the u-boot-spl.img (including the 64 byte header) is loaded
by the SoC as the main image, we need to compensate for the header
length to get a correct entry point.
Thus, we subtract the header size from the destination address, so that
the execution address points at the actual entry point of the image.
The current boards ignore both parameters anyway, so this change shouldn't
concern them.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Mario Six [Wed, 11 Jan 2017 15:00:50 +0000 (16:00 +0100)]
lib: tpm: Add command to flush resources
This patch adds a function to the TPM library, which allows U-Boot to
flush resources, e.g. keys, from the TPM.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
Reinhard Pfau [Wed, 11 Jan 2017 15:00:48 +0000 (16:00 +0100)]
arm: mvebu: spl.c: Remove useless gd declaration
ddaa905 ("arm: mvebu: Add DM (driver model) support") removed the
assignment of the gd pointer, but kept the (now superfluous) declaration
of the gd pointer.
Remove this declaration.
Signed-off-by: Reinhard Pfau <pfau@gdsys.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Mario Six [Wed, 11 Jan 2017 15:00:47 +0000 (16:00 +0100)]
mvebu: Add board_pex_config()
Allow boards to do some initialization when PCIe comes up.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Dirk Eibach [Wed, 11 Jan 2017 15:00:46 +0000 (16:00 +0100)]
net: phy: Support Marvell
88E1680
Add support for Marvell
88E1680 Integrated Octal
10/100/1000 Mbps Energy Efficient Ethernet Transceiver.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Dirk Eibach [Wed, 11 Jan 2017 15:00:45 +0000 (16:00 +0100)]
pci: mvebu: Fix Armada 38x support
Armada 38x has four PCI ports, not three.
The optimization in pci_init_board() seems to assume that every port has
three lanes. This is obviously wrong, and breaks support for Armada 38x.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Thu, 12 Jan 2017 15:37:49 +0000 (16:37 +0100)]
phy: comphy_a3700: Change SD/MMC compatible DT node to match the updates
Now that the SD/SDIO/MMC DT properties are updated in the Marvell
A3700 and A7/8k DT files, we need to match the checks for compatible
node in the PHY driver as well.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Mark Marshall [Tue, 24 Jan 2017 14:40:23 +0000 (15:40 +0100)]
powerpc: mpc85xx: Use symbolic names for cache control bits
We should use the symbolic names for the cache control bits.
Signed-off-by: Mark Marshall <Mark.Marshall@omicron.at>
Reviewed-by: Thomas Graziadei <thomas.graziadei@omicronenergy.com>
Reviewed-by: York Sun <york.sun@nxp.com>
mario.six@gdsys.cc [Tue, 17 Jan 2017 07:33:48 +0000 (08:33 +0100)]
powerpc: mpc83xx: Enable pre-relocation malloc
To enable DM on MPC83xx, we need pre-relocation malloc, which is
implemented in this patch.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
[York S: Fixed compiling warning for unused variable 'i']
Reviewed-by: York Sun <york.sun@nxp.com>
mario.six@gdsys.cc [Tue, 17 Jan 2017 07:33:47 +0000 (08:33 +0100)]
powerpc: mpc83xx: Minimize r1 modification
The r1 register is modified several times during the cache-ram setup of
the MPC83xx SoCs.
Since this SP modification confuses debuggers, we use a general purpose
register to compute the new stack pointer value, and only set the SP
once after all computations are done.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Joakim Tjernlund <Joakim.Tjernlund@infinera.com>
Reviewed-by: York Sun <york.sun@nxp.com>
York Sun [Fri, 27 Jan 2017 17:57:31 +0000 (09:57 -0800)]
armv8: ls1046a: Enable workaround for erratum A-008336
Erratum A-008336 applies to LS1046A per latest SoC document.
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Shengzhou Liu <Shengzhou.Liu@nxp.com>
York Sun [Wed, 25 Jan 2017 21:26:50 +0000 (13:26 -0800)]
armv7: ls1021aqds: Set cpo_sample for erratum A-009942
Set cpo_sample as suggested by the driver
"WARN: pls set popts->cpo_sample = 0x58 in <board>/ddr.c to optimize
cpo".
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Bogdan Purcareata [Wed, 11 Jan 2017 15:58:36 +0000 (15:58 +0000)]
drivers: net: fsl-mc: Fixup MAC addresses in DPC
Fixup port_mac_address property in MC DPC with values from the u-boot
environment. Since u-boot already reads the environment MAC addresses
when probing the PHYs, use these values.
The u-boot environment MAC addresses take precedence over any eventual
ones defined in the DPC, except for the case where they are randomly
assigned (no u-boot env value declared for port).
The patch assumes the "/board_info/ports/" node is present in the DPC.
Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
[York S: Fix several indentations]
Reviewed-by: York Sun <york.sun@nxp.com>
Masahiro Yamada [Mon, 30 Jan 2017 10:46:55 +0000 (19:46 +0900)]
mmc: atmel: rename CONFIG_ATMEL_SDHCI to CONFIG_MMC_SDHCI_ATMEL
Make the naming scheme consistent; all SDHCI-base drivers prefixed
with CONFIG_MMC_SDHCI_.
While we are here, add "depends on ARCH_AT91".
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Mon, 30 Jan 2017 10:46:54 +0000 (19:46 +0900)]
mmc: pic32: rename CONFIG_PIC32_SDHCI to CONFIG_MMC_SDHCI_PIC32
Make the naming scheme consistent; all SDHCI-base drivers prefixed
with CONFIG_MMC_SDHCI_.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Mon, 30 Jan 2017 10:46:53 +0000 (19:46 +0900)]
mmc: msm: rename CONFIG_MSM_SDHCI to CONFIG_MMC_SDHCI_MSM
Make the naming scheme consistent; all SDHCI-base drivers prefixed
with CONFIG_MMC_SDHCI_.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Mon, 30 Jan 2017 10:46:52 +0000 (19:46 +0900)]
mmc: rockchip: rename CONFIG_ROCKCHIP_SDHCI to CONFIG_MMC_SDHCI_ROCKCHIP
Make the naming scheme consistent; all SDHCI-base drivers prefixed
with CONFIG_MMC_SDHCI_.
While we are here, add "depends on ARCH_ROCKCHIP".
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Mon, 30 Jan 2017 10:46:51 +0000 (19:46 +0900)]
mmc: zynq: rename CONFIG_ZYNQ_SDHCI to CONFIG_MMC_SDHCI_ZYNQ
Make the naming scheme consistent; all SDHCI-base drivers prefixed
with CONFIG_MMC_SDHCI_.
While we are here, add "depends on ARCH_ZYNQ || ARCH_ZYNQMP".
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Mon, 30 Jan 2017 10:46:50 +0000 (19:46 +0900)]
mmc: sandbox: rename CONFIG, fix dependency, and use it in Makefile
[1] Rename CONFIG_SANDBOX_MMC to CONFIG_MMC_SANDBOX for consistency
I want all MMC driver options prefixed with CONFIG_MMC_.
[2] Fix dependency
Add necessary depends on to avoid compile error.
Instead "depends on MMC" is unneeded because this config entry
resides inside of "if MMC".
[3] Currently, this config symbol is not referenced at all.
Use it to enable/disable the driver in Makefile.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Mon, 30 Jan 2017 10:46:49 +0000 (19:46 +0900)]
mmc: move CONFIG_GENERIC_MMC to Kconfig
Now, CONFIG_GENERIC_MMC seems equivalent to CONFIG_MMC.
Let's create an entry for "config GENERIC_MMC" with "default MMC",
then convert all macro defines in headers to Kconfig. Almost all
of the defines will go away.
I see only two exceptions:
configs/blanche_defconfig
configs/sandbox_noblk_defconfig
They define CONFIG_GENERIC_MMC, but not CONFIG_MMC. Something
might be wrong with these two boards, so should be checked later.
Anyway, this is the output of the moveconfig tool.
This commit was created as follows:
[1] create a config entry in drivers/mmc/Kconfig
[2] tools/moveconfig.py -r HEAD GENERIC_MMC
[3] manual clean-up of garbage comments in doc/README.* and
include/configs/*.h
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 31 Jan 2017 00:05:23 +0000 (19:05 -0500)]
Prepare v2017.03-rc1
Signed-off-by: Tom Rini <trini@konsulko.com>
Lukasz Majewski [Fri, 27 Jan 2017 22:16:29 +0000 (23:16 +0100)]
BOARD: MCCMON6: Provide support for iMX6q based mccmon6 board
This patch provides u-boot support for Liebherr (LWN) mccmon6 board.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Patrick Bruenn [Mon, 23 Jan 2017 14:11:27 +0000 (15:11 +0100)]
arm: dts: imx53-cx9020: fix packetloss on fec_mxc
The pinmuxing for i.MX53 FEC ethernet copied from
<kernel>/arch/arm/boot/dts/imx53-qsb-common.dtsi (at least until v4.9)
was bad. It is different from the manual pinmuxing in
<u-boot>/board/freescale/mx53loco/mx53loco.c which was used in
cx9020 implementation previously before mainlining into u-boot.
It seems the bug in imx53-qsb kernel device tree is hidden for so long,
because it was never used, by the kernel driver.
Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
Tom Rini [Sun, 29 Jan 2017 13:01:06 +0000 (08:01 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-uniphier
- Fix clk driver
- Optimize DRAM init code for LD20 SoC
- Get DRAM information from more reliable source
- Clean up SoC init code
- Allow to use Image.gz for booting ARM64 Linux
- Tidy up environments to use with ATF
- Clean up I2C drivers
Masahiro Yamada [Fri, 27 Jan 2017 21:53:56 +0000 (06:53 +0900)]
i2c: uniphier-f: use readl_poll_timeout() to poll registers
The readl_poll_timeout() is a useful helper to poll registers
and error out if the condition is not met.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:55 +0000 (06:53 +0900)]
i2c: uniphier(-f): remove unneeded #include <dm/root.h>
This include is unnecessary for low-level drivers.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:54 +0000 (06:53 +0900)]
ARM: uniphier: make update commands more flexible for ATF
Currently, SPL (u-boot-spl.bin) and U-Boot (u-boot.bin) are stored
in non-volatile devices, and some environments are defined to update
the images easily.
When ARM Trusted Firmware is fully used, SPL is not used. U-Boot
proper is contained as BL33 into FIP (Firmware Image Package), which
is standard container used by ATF. Allow to use it.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:53 +0000 (06:53 +0900)]
ARM: uniphier: change CONFIG_SPL_PAD_TO to 128KB
The Boot ROM supports authentication feature to prevent malformed
software from being run on products. The signature is added at the
tail of the second stage loader (= SPL in U-boot terminology).
The size of the second stage loader was 64KB, and it was consistent
across SoCs. The situation changed when LD20 SoC appeared; it loads
80KB second stage loader, and it is the only exception.
Currently, CONFIG_SPL_PAD_TO is set to 64KB and U-Boot proper is
loaded from the 64KB offset of non-volatile devices. This means the
signature of LD20 SoC (located at 80KB offset) corrupts the U-Boot
proper image.
Let's move the U-Boot proper image to 128KB offset. It uses 48KB
for nothing but padding, and we could actually locate the U-Boot
proper at 80KB offset. However, the power of 2 generally seems a
better choice for the offset address.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:52 +0000 (06:53 +0900)]
ARM: uniphier: change the offset to environment storage area
When ARM Trusted Firmware is used, bl1.bin + fip.bin exceeds 512KB,
so the boot image and the current environment area will overlap.
Move the environment storage to 1MB offset.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:51 +0000 (06:53 +0900)]
ARM: uniphier: set initrd_high environment to skip initrd relocation
The boot_ramdisk_high() checks the environment "initrd_high" and,
if it is set to (ulong)-1, skip the initrd relocation. This is
useful for faster booting when we know the initrd is already located
within the reach of the kernel.
Change "norboot" to copy images in order to make it work without
depending on the automatic relocation.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:50 +0000 (06:53 +0900)]
ARM: uniphier: use Image.gz instead Image for booting ARM64 Linux
The ARM64 Linux raw image now amounts to 15MB and it is getting
bigger and bigger. Using Image.gz saves about 8MB. The cost of
unzip is smaller than what we get by saving the kernel loading
from non-volatile devices.
The ARM32 Linux still uses zImage, a self-decompressor image,
so it should not be affected.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:49 +0000 (06:53 +0900)]
ARM: uniphier: collect SPL CONFIG symbols to the bottom of header
For clarification, move CONFIG symbols that affect SPL building
into a single place. Drop #ifdef CONFIG_SPL ... #endif since it is
harmless to define CONFIG_SPL_... during U-Boot proper building.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:48 +0000 (06:53 +0900)]
ARM: uniphier: compile board data only for SPL
Now U-Boot proper need not get the uniphier_boards array. Compile
it only for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:47 +0000 (06:53 +0900)]
ARM: uniphier: refactor cmd_ddrmphy
Make it look like cmd_ddrphy.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:46 +0000 (06:53 +0900)]
ARM: uniphier: clean up UMC init for PXs2 SoC
Just cosmetic changes:
- Rename prefix DMPHY_ to MPHY_ for consistency
- Move UMC parameters below for complete decouple of PHY and UMC
- Remove redundant whitespaces
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:45 +0000 (06:53 +0900)]
ARM: uniphier: refactor cmd_ddrphy
It seems more readable to use arrays to get SoC specific parameters
instead of the crappy switch statement.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:44 +0000 (06:53 +0900)]
ARM: uniphier: use gd->bd->bi_dram for memory reserve on LD20 SoC
For LD20 SoC, the last 64 byte of each DRAM bank is used for the
dynamic training of DRAM PHY. The regions must be reserved in DT to
prevent the kernel from using them. Now gd->bd->bi_dram reflects
the actual memory banks. Just use it instead of getting access to
the board parameters.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:43 +0000 (06:53 +0900)]
ARM: uniphier: detect RAM size by decoding HW register instead of DT
U-Boot needs to set up available memory area(s) in dram_init() and
dram_init_banksize(). It is platform-dependent how to detect the
memory banks. Currently, UniPhier adopts the memory banks _alleged_
by DT. This is based on the assumption that users bind a correct DT
in their build process.
Come to think of it, the DRAM controller has already been set up
before U-Boot is entered (because U-Boot runs on DRAM). So, the
DRAM controller setup register seems a more reliable source of any
information about DRAM stuff. The DRAM banks are initialized by
preliminary firmware (SPL, ARM Trusted Firmware BL2, or whatever),
so this means the source of the reliability is shifted from Device
Tree to such early-stage firmware. However, if the DRAM controller
is wrongly configured, the system will crash. If your system is
running, the DRAM setup register is very likely to provide the
correct DRAM mapping.
Decode the SG_MEMCONF register to get the available DRAM banks.
The dram_init() and dram_init_banksize() need similar decoding.
It would be nice if dram_init_banksize() could reuse the outcome
of dram_init(), but global variables are unavailable at this stage
because the .bss section is available only after the relocation.
As a result, SG_MEMCONF must be checked twice, but a new helper
uniphier_memconf_decode() will help to avoid code duplication.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:42 +0000 (06:53 +0900)]
ARM: uniphier: shrink arrays of DDR-PHY parameters for LD20 SoC
The two arrays ddrphy_{op,ip}_dq_shift_val, occupy more than 3.8 KB
memory footprint, which is significant in SPL.
There are PHY parameters for 5 boards, but they are actually not
board specific, but SoC specific. After all, we just need to have
2 patterns, for LD20 and LD21. Also, the shift values are small
enough to become "short" type instead of "int". This change will
save about 3 KB memory footprint.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:41 +0000 (06:53 +0900)]
clk: uniphier: fix compatible strings for Pro5, PXs2, LD20 SD clock
I missed to update them when DT files were resynced with Linux.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>