Heinrich Schuchardt [Mon, 7 May 2018 20:18:27 +0000 (22:18 +0200)]
include: update log2 header from the Linux kernel
Without the patch gcc 8 produces:
warning: ignoring attribute ‘noreturn’ because it conflicts with
attribute ‘const’ [-Wattributes]
int ____ilog2_NaN(void);
So let's update the include from Linux kernel v4.16.
This removes static checks of ilog2() arguments.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Mon, 7 May 2018 19:59:34 +0000 (21:59 +0200)]
xyz-modem: va_start() must be matched by va_end()
Every va_start() call must be matched by a va_end() call.
scripts/checkpatch.pl required reformatting the complete function
zm_dprintf().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Mon, 7 May 2018 18:38:24 +0000 (20:38 +0200)]
tools/file2include: create Linux style SPDX header
file2include is used to convert a binary file to a C include.
With the patch the SPDX header is written to the first line as
expected by scripts/checkpatch.pl.
Cf. https://www.kernel.org/doc/html/v4.16/process/license-rules.html
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Hannes Schmelzer [Fri, 4 May 2018 08:49:11 +0000 (10:49 +0200)]
bootm: fix 'memory-fixup' for vxWorks boot
The check for having a memory node within the fdt blob is made wrong, we
fix this here.
Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Alex Kiernan [Thu, 3 May 2018 11:45:08 +0000 (11:45 +0000)]
Fix Ymodem build when DEBUG and CONFIG_USE_TINY_PRINTF are selected
Attempting to build with both DEBUG and CONFIG_USE_TINY_PRINTF along
with CONFIG_SPL_YMODEM_SUPPORT fails at link time:
common/built-in.o: In function `zm_dprintf':
common/xyzModem.c:190: undefined reference to `vsprintf'
Disable Ymodem debug if we don't have full vsprintf support.
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Fabio Estevam [Wed, 2 May 2018 23:12:07 +0000 (20:12 -0300)]
board/freescale: Remove invalid fsl email addresses
These fsl email addresses are no longer valid and they do not have a
correspondent nxp.com entry.
Remove all invalid fsl email addresses and mark the boards as orphan.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Fabio Estevam [Wed, 2 May 2018 23:12:06 +0000 (20:12 -0300)]
p1022ds: Change Timur's email address
timur@freescale.com is not a valid email for quite some time, so change
it to Timur's updated email.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Timur Tabi <timur@tabi.org>
Lukasz Majewski [Wed, 2 May 2018 14:10:56 +0000 (16:10 +0200)]
bootcount: display5: config: Enable boot count feature in the display5 board
The boot count is enabled in both SPL and proper u-boot.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Lukasz Majewski [Wed, 2 May 2018 14:10:55 +0000 (16:10 +0200)]
bootcount: display5: spl: Extend DISPLAY5 board SPL to support bootcount checking
This patch is necessary for providing basic bootcount checking in the case
of using "falcon" boot mode in that board.
It forces u-boot proper boot, when we exceed the number of errors.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Lukasz Majewski [Wed, 2 May 2018 14:10:54 +0000 (16:10 +0200)]
bootcount: spl: Extend SPL to support bootcount incrementation
This patch adds support for incrementation of the bootcount in SPL.
Such feature is necessary when we do want to use this feature with
'falcon' boot mode (which loads OS directly in SPL).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Lukasz Majewski [Wed, 2 May 2018 14:10:53 +0000 (16:10 +0200)]
bootcount: Rewrite autoboot to use wrapper functions from bootcount.h
The code has been refactored to use common wrappers from bootcount.h
header.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Alex Kiernan <alex.kiernan@gmail.com>
Lukasz Majewski [Wed, 2 May 2018 14:10:52 +0000 (16:10 +0200)]
bootcount: Add function wrappers to handle bootcount increment and error checking
Those two functions can be used to provide easy bootcount management.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Lukasz Majewski [Wed, 2 May 2018 14:10:51 +0000 (16:10 +0200)]
bootcount: Add include guards into bootcount.h file
This patch adds missing include guards for bootcount.h file.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Alex Kiernan <alex.kiernan@gmail.com>
Lukasz Majewski [Wed, 2 May 2018 14:10:50 +0000 (16:10 +0200)]
bootcount: spl: Enable bootcount support in SPL
New, SPL related config option - CONFIG_SPL_BOOTCOUNT_LIMIT has been
added to allow drivers/bootcount code re-usage in SPL.
This code is necessary to use and setup bootcount in SPL in the case of
falcon boot mode.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Alex Kiernan <alex.kiernan@gmail.com>
Tom Rini [Thu, 10 May 2018 11:17:14 +0000 (07:17 -0400)]
Merge git://git.denx.de/u-boot-ubi
Tom Rini [Wed, 9 May 2018 16:58:06 +0000 (12:58 -0400)]
Merge git://git.denx.de/u-boot-sunxi
Patrice Chotard [Fri, 27 Apr 2018 13:51:23 +0000 (15:51 +0200)]
ubifs: avoid assert failed in ubifs.c
This patch solves assert failed displayed in the console during a boot.
The root cause is that the ubifs_inode is not already allocated when
ubifs_printdir and ubifs_finddir functions are called.
Trace showing the issue:
feed 'boot.scr.uimg', ino 94, new f_pos 0x17b40ece
dent->ch.sqnum '7132', creat_sqnum
3886945402880
UBIFS assert failed in ubifs_finddir at 436
INODE ALLOCATION: creat_sqnum '7129'
Found U-Boot script /boot.scr.uimg
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Tom Rini [Tue, 1 May 2018 16:32:37 +0000 (12:32 -0400)]
bootm.c: Correct the flush_len used in bootm_load_os()
In do_bootm_states when doing BOOTM_STATE_LOADOS we use load_end
uninitialized and Coverity notes this now. This however leads down
another interesting path. We pass this pointer to bootm_load_os and
that in turn uses this uninitialized value immediately to calculate the
flush length, and is wrong. We do not know what load_end will be until
after bootm_decomp_image is called, so we must only set flush_len after
that. All of this also makes it clear that the only reason we pass a
pointer for load_end to bootm_load_os is so that we can call lmb_reserve
on success. Rather than initialize load_end to 0 in do_bootm_states we
can just call lmb_reserve ourself.
Reported-by: Coverity (CID: 175572)
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Clément Péron [Mon, 30 Apr 2018 09:06:40 +0000 (11:06 +0200)]
image: fit: Show signatures and hashes for configurations
The signature/hash information are displayed for images but nor for
configurations.
Add subnodes printing in fit_conf_print() like it's done in fit_image_print()
Signed-off-by: Clément Péron <peron.clem@gmail.com>
[trini: Add guards around fit_conf_print to avoid warnings]
Signed-off-by: Tom Rini <trini@konsulko.com>
Grygorii Strashko [Sat, 28 Apr 2018 00:58:49 +0000 (19:58 -0500)]
arm: bitops: fix find_next_zero_bit() for case size < 32
find_next_zero_bit() incorrectly handles cases when:
- total bitmap size < 32
- rest of bits to process
static inline int find_next_zero_bit(void *addr, int size, int offset)
{
unsigned long *p = ((unsigned long *)addr) + (offset >> 5);
unsigned long result = offset & ~31UL;
unsigned long tmp;
if (offset >= size)
return size;
size -= result;
offset &= 31UL;
if (offset) {
tmp = *(p++);
tmp |= ~0UL >> (32-offset);
if (size < 32)
[1]
goto found_first;
if (~tmp)
goto found_middle;
size -= 32;
result += 32;
}
while (size & ~31UL) {
tmp = *(p++);
if (~tmp)
goto found_middle;
result += 32;
size -= 32;
}
[2]
if (!size)
return result;
tmp = *p;
found_first:
[3] tmp |= ~0UL >> size;
^^^ algo can reach above line from from points:
[1] offset > 0 and size < 32, tmp[offset-1..0] bits set to 1
[2] size < 32 - rest of bits to process
in both cases bits to search are tmp[size-1..0], but line [3] will simply
set all tmp[31-size..0] bits to 1 and ffz(tmp) below will fail.
example: bitmap size = 16, offset = 0, bitmap is empty.
code will go through the point [2], tmp = 0x0
after line [3] => tmp = 0xFFFF and ffz(tmp) will return 16.
found_middle:
return result + ffz(tmp);
}
Fix it by correctly seting tmp[31..size] bits to 1 in the above case [3].
Fixes:
81e9fe5a2988 ("arm: implement find_next_zero_bit function")
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Neil Armstrong [Fri, 27 Apr 2018 13:17:57 +0000 (15:17 +0200)]
cmd: add ADC cli commands
Add an 'adc' cli command to get information from adc devices and to read
"single shot" data.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Mario Six [Fri, 27 Apr 2018 12:53:37 +0000 (14:53 +0200)]
pci: Don't use pci_indirect when DM is active
Declaration of indirect PCI bridges is not compatible with DM: Both
define PCI operations, but in different ways. Hence, don't use indirect
bridges if DM is active.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
Mario Six [Fri, 27 Apr 2018 12:53:33 +0000 (14:53 +0200)]
gdsys: drivers: Add gdsys_rxaui_ctrl driver
Add a driver for RXAUI control on IHS FPGAs.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
Mario Six [Fri, 27 Apr 2018 12:53:15 +0000 (14:53 +0200)]
clk: Add ICS8N3QV01 driver
Add a driver for the ICS8N3QV01 Quad-Frequency Programmable VCXO.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Fri, 27 Apr 2018 12:52:10 +0000 (14:52 +0200)]
ihs_mdio: Make DM-compatible
Make the ihs_mdio driver DM-compatible, while retaining the old
functionality for not-yet-converted boards.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Fri, 27 Apr 2018 12:52:09 +0000 (14:52 +0200)]
ihs_mdio: Encapsulate register access
To prepare for DM conversion, encapsulate all register accesses in
function calls.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Ramon Fried [Fri, 20 Apr 2018 19:39:50 +0000 (22:39 +0300)]
db410c: set clk node to be probed before relocation
The clock node is used by the serial driver and it's needed
before relocation.
This patch ensures that the msm-serial driver can actually
use the clock node.
Signed-off-by: Ramon Fried <ramon.fried@linaro.org>
Patrice Chotard [Fri, 20 Apr 2018 07:53:55 +0000 (09:53 +0200)]
ARM: dts: sti: Add stih410-b2260-u-boot.dtsi
STiH410 has 2 PHYs wired on the DWC3 IP, USB2 and USB3 PHYs.
As currently no U-boot driver is available for the USB3 PHY and to avoid
issue during DWC3 drive probe, we use DWC3 IP with only USB2 PHY
using stih410-b2260-u-boot.dtsi file.
Fixes:
2fd4242cc50e ("ubs: xhci-dwc3: Enable USB3 PHY when available")
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Sam Protsenko [Thu, 19 Apr 2018 20:57:30 +0000 (23:57 +0300)]
arm: ti: boot: Extract PARTS_DEFAULT to boot.h
Eliminate code duplication: the same PARTS_DEFAULT was defined in
am57xx_evm.h and in dra7xx_evm.h. Extract it to environment/boot.h and
use in all OMAP5-based boards.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Tom Rini [Tue, 8 May 2018 17:47:39 +0000 (13:47 -0400)]
Merge git://git.denx.de/u-boot-mmc
Tom Rini [Tue, 8 May 2018 17:47:26 +0000 (13:47 -0400)]
Merge git://git.denx.de/u-boot-uniphier
Tom Rini [Tue, 8 May 2018 12:52:17 +0000 (08:52 -0400)]
lib/Kconfig: Mark OF_LIBFDT_OVERLAY as depending on OF_LIBFDT
The overlay code is only useful when OF_LIBFDT is set, so mark it as
depending on that first.
Signed-off-by: Tom Rini <trini@konsulko.com>
Neil Armstrong [Mon, 23 Apr 2018 14:19:23 +0000 (16:19 +0200)]
adc: add Amlogic Meson SAR ADC driver
This patch adds the driver for the Amlogic Meson Successive Approximation
Register (SAR) A/D Converter based on the Linux IIO driver thanks to the
great work of Martin Blumenstingl.
The driver has been adapted to U-Boot and the ADC UClass.
This patch depends on the regmap "regmap: add regmap_update_bits() helper"
patch and has been tested using the newly introducted "adc" CLI command
in the "cmd: add ADC cli commands" patch.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Fri, 27 Apr 2018 09:56:15 +0000 (11:56 +0200)]
test: regmap: add read/modify/write test
Add calls to regmap_read/modify_bits/write even if the proper memory
read/write calls are not executed in sandbox.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Neil Armstrong [Fri, 27 Apr 2018 09:56:14 +0000 (11:56 +0200)]
regmap: add regmap_update_bits() helper
Add the regmap_update_bits() to simply the read/modify/write of registers
in a single command. The function is taken from Linux regmap
implementation.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrice Chotard [Thu, 26 Apr 2018 15:00:49 +0000 (17:00 +0200)]
ARM: dts: stm32mp157: Add vrefbuf DT node
Add vrefbuf device tree node. This allows to get
a voltage reference for ADCs.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Fabrice Gasnier [Thu, 26 Apr 2018 15:00:48 +0000 (17:00 +0200)]
configs: stm32mp15: Enable STM32_VREFBUF flag
Enable vrefbuf on stm32mp15, to be used by ADC.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Fabrice Gasnier [Thu, 26 Apr 2018 15:00:47 +0000 (17:00 +0200)]
clk: stm32mp1: Add VREF clock gating
Add VREF clock gating, that may be used by STM32 VREFBUF regulator.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Fabrice Gasnier [Thu, 26 Apr 2018 15:00:46 +0000 (17:00 +0200)]
power: regulator: Add support for stm32-vrefbuf
Add regulator driver for STM32 voltage reference buffer which can be
used as voltage reference for ADCs, DACs and external components through
dedicated VREF+ pin.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Thu, 26 Apr 2018 15:13:12 +0000 (17:13 +0200)]
configs: stm32mp15_basic: Set regulator relative flags
Enable DM_REGULATOR_STPMU1 flag to activate regulator
driver for STM32MP15 SoC and CMD_REGULATOR flag to be
able to set/get regulator state int U-boot command line.
Disable PMIC_CHILDREN as this flag is not needed in SPL
for STM32MP1.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Thu, 26 Apr 2018 15:13:11 +0000 (17:13 +0200)]
ARM: dts: stm32mp157c-ed1: Add regulator node
Add regulator nodes needed by stpmu1 regulator driver
Add vmmc-supply and vqmmc-supply regulator property for
sdmmc1 and sdmmc2.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Thu, 26 Apr 2018 15:13:10 +0000 (17:13 +0200)]
power: pmic: stpmu1: Add regulator bindings
Add regulator bindings to get access to regulator managed
by drivers/power/regulator/stpmu1.c regulator driver.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Christophe Kerello [Thu, 26 Apr 2018 15:13:09 +0000 (17:13 +0200)]
power: regulator: stpmu1: Introduce stpmu1 driver
Enable support for the regulator functions of the STPMU1X PMIC. The
driver implements get/set api for the various BUCKS and LDOs supported
by the PMIC device. This driver is controlled by a device tree node
which includes voltage limits.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Thu, 26 Apr 2018 14:45:19 +0000 (16:45 +0200)]
ARM: dts: stm32mp157: Add SoC pwr regulator entry
Add SoC power regulator entry for reg11, reg18 and usb33
regulator.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Thu, 26 Apr 2018 14:45:18 +0000 (16:45 +0200)]
stm32mp: regulator: add SoC pwr regulator support
This driver binds and manages the following regulator of
SoC's PWR block :
- reg11
- reg18
- usb33
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Mario Six [Thu, 26 Apr 2018 08:10:59 +0000 (10:10 +0200)]
arm: controlcenterdc: Add spi-flash compatible strings
Since kirkwook SPI was recently converted to DM, add compatible strings
to the SPI flash devices to make them work with the new driver.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Praneeth Bajjuri [Wed, 25 Apr 2018 21:03:24 +0000 (16:03 -0500)]
env: ti: android: boot with FIT Image
Boot android over emmc by default thru FIT image
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Suggested-by: Andrew F.Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Praneeth Bajjuri [Wed, 25 Apr 2018 21:03:23 +0000 (16:03 -0500)]
configs: TI: Enable FIT Library overlay support
Enable the FDT library overlay support for all TI SOC family.
Without this option, when Loading fdt from FIT image, the
following warning is seen.
"config with overlays but CONFIG_OF_LIBFDT_OVERLAY not set".
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Suggested-by: Andrew F.Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Praneeth Bajjuri [Wed, 25 Apr 2018 20:56:34 +0000 (15:56 -0500)]
arm: dra76: fastboot: extend cpu type for getvar command
'commit
dda0bd674481 ("arm: dra762: Add support for device package identification")'
introduces ABZ and ACD package identification.
This patch is to extend usage of "fastboot getvar cpu" for
DRA76x ABZ and ACD devices.
Helps in fixing the boot warning.
Warning: fastboot.cpu: unknown CPU rev:
123863298
on
CPU : DRA762-GP ES1.0 ABZ package
Model: TI AM5748 IDK
Board: AM574x IDK REV 1.0A
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Ludovic Desroches [Wed, 25 Apr 2018 09:22:41 +0000 (12:22 +0300)]
defconfig: at91-sama5d2_ptc_ek: remove unused SYS_EXTRA_OPTIONS
Remove SYS_USE_NANDFLASH, SYS_USE_MMC as they are deprecated and
unused.
The board configurations already use CONFIG_SD_BOOT and
CONFIG_NAND_BOOT respectively.
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
[eugen.hristev@microchip.com: rework on latest u-boot]
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Eugen Hristev [Tue, 24 Apr 2018 11:36:28 +0000 (14:36 +0300)]
board: sama5d27_som1_ek: Fix the USB vbus power
According to the REVB schematic, fix the USB vbus power enable pin.
Based on original work by Wenyou Yang
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Eugen Hristev [Tue, 24 Apr 2018 09:00:16 +0000 (12:00 +0300)]
configs: at91: sama5: updated mtdparts variable in bootargs
We have a new demo layout of our sama5 boards for the NAND Flash
memory.
According to this new layout, adjust the mtdparts variable in bootargs
to align with this, which is available at :
http://www.at91.com/linux4sam/bin/view/Linux4SAM/Sama5d3XplainedMainPage#NAND_Flash_demo_Memory_map,
Based on original work by Wenyou Yang
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Eugen Hristev [Tue, 24 Apr 2018 07:43:53 +0000 (10:43 +0300)]
board: sama5d2_ptc_ek: adjust the smc timings of nand
To fix the issue of write the rootfs.ubi, adjust the smc timings
configuration of the nand controller.
Based on original work by Wenyou Yang
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Ludovic Desroches [Tue, 24 Apr 2018 07:16:01 +0000 (10:16 +0300)]
gpio: atmel_pio4: give a full configuration when muxing pins
When a pin is muxed to a peripheral or as a GPIO, the only
configuration that can be set is the pullup. It is too restrictive
so this patch allows to give a full configuration.
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Ludovic Desroches [Mon, 23 Apr 2018 07:59:50 +0000 (10:59 +0300)]
board: atmel: sama5d2_ptc_ek: update pin configuration for NAND
The drive strength has to be set to medium for the NAND data lines.
With a low drive, we can get some data corruption.
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Ludovic Desroches [Mon, 23 Apr 2018 07:59:49 +0000 (10:59 +0300)]
gpio: atmel_pio4: add drive strength macros
Macros for drive strength configuration were missing.
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Ley Foon Tan [Fri, 20 Apr 2018 13:55:45 +0000 (21:55 +0800)]
pci: intel: Add Intel FPGA PCIe controller driver
Add PCIe driver for Intel FPGA PCIe IP. This driver operates the PCIe IP in
rootport mode only, the EP mode is not supported. The driver is tested
with the Intel e1000e NIC driver.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Michalis Pappas [Fri, 13 Apr 2018 07:40:57 +0000 (10:40 +0300)]
arm64: Add SMC and HVC commands
This patch adds smc and hvc commands, that allow issuing Secure Monitor
Calls and Hypervisor Calls conforming to the ARM SMC Calling Convention.
Add Kconfig items to allow each command can be individually enabled.
Signed-off-by: Michalis Pappas <mpappas@fastmail.fm>
Reviewed-by: Simon Glass <sjg@chromium.org>
Neil Armstrong [Wed, 11 Apr 2018 15:40:41 +0000 (17:40 +0200)]
pinctrl: meson: Update pinmux with new Linux bindings
The pinctrl bindings has changed for Amlogic Meson SoCs since Linux 4.13,
update the pinctrl driver to take this in account.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Wed, 11 Apr 2018 15:40:40 +0000 (17:40 +0200)]
ARM64: meson: Sync DT and Bindings with Linux 4.16
Synchronize the Linux Device Tree for Amlogic Meson GX boards from Linux 4.16.0.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Wed, 11 Apr 2018 15:13:45 +0000 (17:13 +0200)]
ARM: meson: rename GXBB to GX
Taking into account the Amlogic Family name starts with GX, including
the GXBB, GXL and GXM SoCs.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Patrice Chotard [Wed, 11 Apr 2018 15:07:45 +0000 (17:07 +0200)]
clk: clk_stm32f: Use PLLSAIP as USB 48MHz clock
On all STM32F4 and F7 SoCs family (except STM32F429), PLLSAI
output P can be used as 48MHz clock source for USB and SDMMC.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Tested By: Bruno Herrera <bruherrera@gmail.com>
Patrick Bruenn [Wed, 11 Apr 2018 09:16:29 +0000 (11:16 +0200)]
dm: led: add testcase for "default-state" property
Add two more gpio-leds to sandbox test device tree with default-state
property set to "on"/"off".
Add dm_test_led_default_state() to check that these new LED's are set to
LEDST_ON and LEDST_OFF.
dm: led: add testcase for "default-state" property
Add two more gpio-leds to sandbox test device tree with default-state
property set to "on"/"off".
Add dm_test_led_default_state() to check that these new LED's are set to
LEDST_ON and LEDST_OFF.
Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
Patrick Bruenn [Wed, 11 Apr 2018 09:16:28 +0000 (11:16 +0200)]
dm: led: auto probe() LEDs with "default-state"
To avoid board specificy LED activation code, automatically
activate gpio-leds with "default-state" property during bind().
Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
Patrick Bruenn [Wed, 11 Apr 2018 09:16:27 +0000 (11:16 +0200)]
dm: led: Support "default-state" property
Add support for the device tree property "default-state". This feature
might be useful for LEDs indicating "power on" or similar states.
Note: Even with this commit gpio-leds remain in reset state. That's
because the led_gpio is not probed until DM_FLAG_ACTIVATED is set.
Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
Jassi Brar [Fri, 6 Apr 2018 06:35:24 +0000 (12:05 +0530)]
mmc: support writing sparse images
Provide an alternate path for sparse-images to be
written to MMC. For example, via tftp on platforms
that don't support fastboot protocol. Or when an
image is to written at some offset, rather than the
start of a partition.
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
[trini: Guard with CONFIG_FASTBOOT_FLASH tests, use LBAF for lbaint_t
printing]
Signed-off-by: Tom Rini <trini@konsulko.com>
Andy Yan [Tue, 27 Mar 2018 11:39:38 +0000 (19:39 +0800)]
power: pwm regulator: support live tree
Use live tree compatible api for pwm regulator.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Patrick Bruenn [Tue, 6 Mar 2018 08:07:23 +0000 (09:07 +0100)]
dm: mmc: socfpga: call dwmci_probe()
On a socfpga_cyclone5 based board the SD card, was never powered up. For
other dw_mmc based SoCs dwmci_probe() is called in the platform specific
probe(). It seems this call is missing for socfpga_dw_mmc.
With this change DWMCI_PWREN is set by dmwci_init().
Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Jaehoon Chung [Fri, 26 Jan 2018 10:25:31 +0000 (19:25 +0900)]
mmc: Kconfig: add the MMC_TRACE config in Kconfig
Add the MMC_TRACE config in Kconfig.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Jaehoon Chung [Fri, 26 Jan 2018 10:25:30 +0000 (19:25 +0900)]
mmc: add the debug message in mmc_set_clock
Add the debug message for checking the mmc clock status.
It's helpful to debug the controlling clock.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Jaehoon Chung [Fri, 26 Jan 2018 10:25:29 +0000 (19:25 +0900)]
mmc: add the MMC_CLK_ENABLE/DISABLE macro in mmc.h
mmc_set_clock() function has the disable argument as bool type.
When mmc_set_clock is called, it might be passed to "true" or "false".
But it's too confusion whether clock is enabled or disabled with only
"true" and "false".
To prevent the confusion, replace to MMC_CLK_ENABLE/DISABLE macro from
true/false.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Jaehoon Chung [Thu, 25 Jan 2018 07:11:03 +0000 (16:11 +0900)]
lib: fdtdec: drop the old compatible about max77686
Drop the old compatible about max77686.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
Jaehoon Chung [Thu, 25 Jan 2018 07:11:02 +0000 (16:11 +0900)]
power: pmic_max77686: remove the old pmic_max77686 file
max77686 pmic is supporting with max77686.c under pmic/ and regulator/
direnctroy. Remove pmic_max77686.c what didn't use anywhere.
Instead, enable CONFIG_DM_REGULATOR_MAX77686 and
CONFIG_DM_PMIC_MAX77686.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Jaehoon Chung [Thu, 25 Jan 2018 07:11:01 +0000 (16:11 +0900)]
configs: trats2: enable the max77686 regulator config
Enable the CONFIG_DM_REGULATOR_MAX77686 for using regulator driver.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Masahiro Yamada [Sat, 5 May 2018 10:53:57 +0000 (19:53 +0900)]
ARM: uniphier: enable CONFIG_PINCONF
Enable the pin configuration feature for UniPhier 64 bit SoCs.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Sat, 5 May 2018 10:53:56 +0000 (19:53 +0900)]
pinctrl: uniphier: add ethernet TX pin data for LD20
These are necessary to optimize the drive-strength of the pins.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Sat, 5 May 2018 10:53:55 +0000 (19:53 +0900)]
pinctrl: uniphier: support drive-strength configuration
This allows our DT to specify drive-strength property.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Sat, 5 May 2018 10:53:54 +0000 (19:53 +0900)]
pinctrl: uniphier: support per-pin configuration via DT
Currently, the UniPhier pinctrl drivers expose only the pin-group
interface to device tree.
Provide .get_pins_count, .get_pin_name, .pinconf_set hooks to support
pin configuration via 'pins' DT property.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Sat, 5 May 2018 10:53:53 +0000 (19:53 +0900)]
pinctrl: uniphier: include <linux/build_bug.h> instead of <linux/bug.h>
The #include <linux/bug.h> is here to use BUILD_BUG_ON_ZERO().
By replacing it with <linux/build_bug.h>, we can reduce the number of
headers pulled in.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Sat, 5 May 2018 10:53:52 +0000 (19:53 +0900)]
pinctrl: uniphier: replace printf() with dev_err()
dev_err() is more suitable for printing error messages.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Sat, 5 May 2018 10:53:51 +0000 (19:53 +0900)]
pinctrl: uniphier: remove unneeded pin data of LD6b SoC
Since commit
f73cfb4d0dee ("pinctrl: uniphier: simplify input enable
and delete pin arrays"), these data are no longer used in any useful
way. Remove.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Jassi Brar [Fri, 6 Apr 2018 06:35:09 +0000 (12:05 +0530)]
fastboot: sparse: make write_sparse_image useable for non-fastboot
write_sparse_image could be useful for non-fastboot users.
For ex a platform, without usb-device/fastboot support, could
get sparse images over tftp and write using the mmc command.
Or non-android systems could also leverage the sparse format.
Towards that, this patch removes anything fastboot specific from
the write_sparse_image implementation. Which includes making the
function return integer as error code and calls for fastboot logging
via an optional callback function 'mssg'.
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Jassi Brar [Fri, 6 Apr 2018 06:34:52 +0000 (12:04 +0530)]
fastboot: sparse: remove redundant argument to write_sparse_image
'sz' has no use for write_sparse_image, remove it simplifying the api.
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Lokesh Vutla [Thu, 26 Apr 2018 12:51:31 +0000 (18:21 +0530)]
arm: v7R: Add support for enabling caches
Cache maintenance procedure is same for v7A and v7R
processors. So re-use cache-cp15.c file except for
mmu parts.
Tested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Lokesh Vutla [Thu, 26 Apr 2018 12:51:30 +0000 (18:21 +0530)]
arm: v7R: Add support for MPU
The Memory Protection Unit(MPU) allows to partition memory into regions
and set individual protection attributes for each region. In absence
of MPU a default map[1] will take effect. Add support for configuring
MPU on Cortex-R, by reusing the existing support for Cortex-M processor.
[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0460d/I1002400.html
Tested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Michal Simek [Thu, 26 Apr 2018 12:51:29 +0000 (18:21 +0530)]
arm: v7R: Add initial support
The Cortex-R* processors are a mid-range CPUs for use in deeply-embedded,
real-time systems. It implements the ARMv7-R architecture, and includes
Thumb-2 technology for optimum code density and processing throughput.
Except for MPU(Memory Protection Unit) and few CP15 registers, most of the
features are compatible with v7 architecture. So,reuse the same armv7
folder and introduce a new config CPU_V7R in order to differentiate
from v7 based platforms.
Tested-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Thu, 26 Apr 2018 12:51:28 +0000 (18:21 +0530)]
arm: v7: Kconfig: Introduce SYS_ARM_CACHE_CP15
Certain ARM architectures like ARMv7-A, ARMv7-R has support for
enabling caches using CP15 registers. To have a common support
for all these architectures, introduce a Kconfig symbol
SYS_ARM_CACHE_CP15 that selects cache-cp15.c
Tested-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Thu, 26 Apr 2018 12:51:27 +0000 (18:21 +0530)]
arm: v7: Kconfig: Add entry for MMU
Add a Kconfig entry for MMU and imply for all platforms using
cache-cp15.c containing MMU setup. Using imply instead of select so that
MMU can be disabled by defconfigs when not needed.
Tested-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Thu, 26 Apr 2018 12:51:26 +0000 (18:21 +0530)]
arm: v7: Kconfig: Rename CPU_V7 as CPU_V7A
Currently CPU_V7 kconfig symbol supports only ARMv7A architectures under
armv7 folder. This led to a misconception of creating separate folders
for armv7m and armv7r. There is no reason to create separate folder for
other armv7 based architectures when it can co-exist with few Kconfig
symbols.
As a first step towards a common folder, rename CPU_V7 as CPUV7A. Later
separate Kconfig symbols can be added for CPU_V7R and CPU_V7M and
can co exist in the same folder.
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Suggested-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Thu, 26 Apr 2018 12:51:25 +0000 (18:21 +0530)]
arm: v7: Update VBAR only if available
Not all ARM V7 based cpus has VBAR for remapping
vector base address. So, update VBAR only if it available.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Masahiro Yamada [Thu, 26 Apr 2018 16:02:02 +0000 (01:02 +0900)]
test: ofnode: test ofnode_device_is_compatible()
Test ofnode_device_is_compatible(), and also ofnode_path().
Requested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Mon, 23 Apr 2018 04:26:53 +0000 (13:26 +0900)]
test: regmap: test Linux-compatible syscon_node_to_regmap()
Like Linux, syscon_node_to_regmap() allows a node to work as a syscon
provider without binding it to a syscon driver. Test this.
Requested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Thu, 19 Apr 2018 03:14:04 +0000 (12:14 +0900)]
syscon: add Linux-compatible syscon API
The syscon implementation in U-Boot is different from that in Linux.
Thus, DT files imported from Linux do not work for U-Boot.
In U-Boot driver model, each node is bound to a dedicated driver
that is the most compatible to it. This design gets along with the
concept of DT, and the syscon in Linux originally worked like that.
However, Linux commit
bdb0066df96e ("mfd: syscon: Decouple syscon
interface from platform devices") changed the behavior because it is
useful to let a device bind to another driver, but still work as a
syscon provider.
That change had happened before U-Boot initially supported the syscon
driver by commit
6f98b7504f70 ("dm: Add support for generic system
controllers (syscon)"). So, the U-Boot's syscon works differently
from the beginning. I'd say this is mis-implementation given that
DT is not oriented to a particular project, but Linux is the canon
of DT in practice.
The problem typically arises in the combination of "syscon" and
"simple-mfd" compatibles.
In Linux, they are orthogonal, i.e., the order between "syscon" and
"simple-mfd" does not matter at all.
Assume the following compatible.
compatible = "foo,bar-syscon", "syscon", "simple-mfd";
In U-Boot, this device node is bound to the syscon driver
(driver/core/syscon-uclass.c) since the "syscon" is found to be the
most compatible. Then, syscon_get_regmap() succeeds.
However,
compatible = "foo,bar-syscon", "simple-mfd", "syscon";
does not work because this node is bound to the simple-bus driver
(drivers/core/simple-bus.c) in favor of "simple-mfd" compatible.
The compatible string "syscon" is just dismissed.
Moreover,
compatible = "foo,bar-syscon", "syscon";
works like the first case because the syscon driver populates the
child devices. This is wrong because populating children is the job
of "simple-mfd" (or "simple-bus").
This commit ports syscon_node_to_regmap() from Linux. This API
does not require the given node to be bound to a driver in any way.
Reported-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 19 Apr 2018 03:14:03 +0000 (12:14 +0900)]
regmap: change regmap_init_mem() to take ofnode instead udevice
Currently, regmap_init_mem() takes a udevice. This requires the node
has already been associated with a device. It prevents syscon/regmap
from behaving like those in Linux.
Change the first argumenet to take a device node.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Thu, 19 Apr 2018 03:14:02 +0000 (12:14 +0900)]
dm: ofnode: add ofnode_device_is_compatible() helper
device_is_compatible() takes udevice, but there is no such a helper
that takes ofnode.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Thu, 19 Apr 2018 03:14:01 +0000 (12:14 +0900)]
regmap: clean up regmap allocation
Putting zero length array at the end of struct is a common technique
to embed arbitrary length of members. There is no good reason to let
regmap_alloc_count() branch by "if (count <= 1)".
As far as I understood the code, regmap->base is an alias of
regmap->ranges[0].start, but it is not helpful but make the code
just ugly.
Rename regmap_alloc_count() to regmap_alloc() because the _count
suffix seems pointless.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: fixup cpu_info-rcar.c]
Signed-off-by: Tom Rini <trini@konsulko.com>
Patrick Delaunay [Mon, 16 Apr 2018 08:15:12 +0000 (10:15 +0200)]
psci: arm: remove armv7 function psci_save_target_pc
This function is no more used, and replaced by psci_save
which save also context id as requested by PSCI requirements.
Even if the context id is not used by Linux, it should be saved
and restored in r0 when the CPU_ON is performed.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Mon, 16 Apr 2018 08:15:11 +0000 (10:15 +0200)]
sunxi: psci: save context id in cpu_on command
Replace the psci_save_target_pc call by the new function
psci_save(cpu, pc,context_id)
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Mon, 16 Apr 2018 08:15:10 +0000 (10:15 +0200)]
uniphier: psci: save context id in cpu_on command
Replace the psci_save_target_pc call by the new function
psci_save(cpu, pc,context_id)
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Patrick Delaunay [Mon, 16 Apr 2018 08:15:09 +0000 (10:15 +0200)]
tegra: psci: save context id in cpu_on command
Replace the psci_save_target_pc call by the new function
psci_save(cpu, pc,context_id)
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>