oweals/u-boot.git
9 years agoExport redesign
Martin Dorwig [Mon, 26 Jan 2015 22:22:54 +0000 (15:22 -0700)]
Export redesign

this is an atempt to make the export of functions typesafe.
I replaced the jumptable void ** by a struct (jt_funcs) with function pointers.
The EXPORT_FUNC macro now has 3 fixed parameters and one
variadic parameter
The first is the name of the exported function,
the rest of the parameters are used to format a functionpointer
in the jumptable,

the EXPORT_FUNC macros are expanded three times,
1. to declare the members of the struct
2. to initialize the structmember pointers
3. to call the functions in stubs.c

Signed-off-by: Martin Dorwig <dorwig@tetronik.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
(resending to the list since my tweaks are not quite trivial)

9 years agodm: Update documentation for new bus features
Simon Glass [Sun, 25 Jan 2015 15:27:20 +0000 (08:27 -0700)]
dm: Update documentation for new bus features

Now that we have new bus features, update README.txt and the SPI docs to
explain these.
Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agodm: cros_ec_spi: Remove old pre-driver-model code
Simon Glass [Sun, 25 Jan 2015 15:27:19 +0000 (08:27 -0700)]
dm: cros_ec_spi: Remove old pre-driver-model code

This is no-longer needed since all platforms use SPI for cros_ec.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agodm: cros_ec: Don't require protocol 3 support
Simon Glass [Sun, 25 Jan 2015 15:27:17 +0000 (08:27 -0700)]
dm: cros_ec: Don't require protocol 3 support

I2C is now deprecated on ARM platforms and there are no devices that use it
with the v3 protocol. We can't require v3 support if we want to support I2C.
Adjust the error handling to suit.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agodm: core: Ignore disabled devices when binding
Simon Glass [Sun, 25 Jan 2015 15:27:16 +0000 (08:27 -0700)]
dm: core: Ignore disabled devices when binding

We don't want to bind devices which should never be used.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agodm: exynos: Drop unused COMPAT features for SPI
Simon Glass [Sun, 25 Jan 2015 15:27:15 +0000 (08:27 -0700)]
dm: exynos: Drop unused COMPAT features for SPI

This has moved to driver model so we don't need the fdtdec support.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
9 years agodm: tegra: Drop unused COMPAT features for I2C, SPI
Simon Glass [Sun, 25 Jan 2015 15:27:14 +0000 (08:27 -0700)]
dm: tegra: Drop unused COMPAT features for I2C, SPI

These have moved to driver model so we don't need the fdtdec support.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agodm: i2c: Move slave details to child platdata
Simon Glass [Sun, 25 Jan 2015 15:27:13 +0000 (08:27 -0700)]
dm: i2c: Move slave details to child platdata

At present we go through various contortions to store the I2C's chip
address in its private data. This only exists when the chip is active so
must be set up when it is probed. Until the device is probed we don't
actually record what address it will appear on.

However, now that we can support per-child platform data, we can use that
instead. This allows us to set up the address when the child is bound,
and avoid the messy contortions.

Unfortunately this is a fairly large change and it seems to be difficult to
break it down further.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agodm: spi: Move slave details to child platdata
Simon Glass [Sun, 25 Jan 2015 15:27:12 +0000 (08:27 -0700)]
dm: spi: Move slave details to child platdata

At present we go through various contortions to store the SPI slave's chip
select in its private data. This only exists when the slave is active so
must be set up when it is probed. Until the device is probed we don't
actually know what chip select it will appear on.

However, now that we can support per-child platform data, we can use that
instead. This allows us to set up the chip select when the child is bound,
and avoid the messy contortions.

Unfortunately this is a fairly large change and it seems to be difficult to
break it down further.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agodm: spi: Set up the spi_slave device pointer in child_pre_probe()
Simon Glass [Sun, 25 Jan 2015 15:27:11 +0000 (08:27 -0700)]
dm: spi: Set up the spi_slave device pointer in child_pre_probe()

At present we use struct spi_slave as our device pointer in a lot of places
to avoid changing the old SPI API. At some point this will go away.

But for now, it is better if the SPI uclass sets up this pointer, rather
than relying on passing it into the device when it is probed. We can use the
new uclass child_pre_probe() method to do this.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agodm: core: Allow uclass to set up a device's child before it is probed
Simon Glass [Sun, 25 Jan 2015 15:27:10 +0000 (08:27 -0700)]
dm: core: Allow uclass to set up a device's child before it is probed

Some buses need to set up their devices before they can be used. This setup
may well be common to all buses in a particular uclass. Support a common
pre-probe method for the uclass, called before any bus devices are probed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agodm: sandbox: sf: Tidy up the error handling in sandbox_sf_probe()
Simon Glass [Sun, 25 Jan 2015 15:27:09 +0000 (08:27 -0700)]
dm: sandbox: sf: Tidy up the error handling in sandbox_sf_probe()

Use a single exit point when we have an error and add debugging there.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agodm: core: Allow the uclass to set up a device's child after binding
Simon Glass [Sun, 25 Jan 2015 15:27:08 +0000 (08:27 -0700)]
dm: core: Allow the uclass to set up a device's child after binding

For buses, after a child is bound, allow the uclass to perform some
processing. This can be used to figure out the address of the child (e.g.
the chip select for SPI slaves) so that it is ready to be probed.

This avoids bus drivers having to repeat the same process, which really
should be done by the uclass, since it is common.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agodm: spi: Move the per-child data size to the uclass
Simon Glass [Sun, 25 Jan 2015 15:27:07 +0000 (08:27 -0700)]
dm: spi: Move the per-child data size to the uclass

This is common to all SPI drivers and specifies a structure used by the
uclass. It makes more sense to define it in the uclass.

Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agodm: core: Allow uclasses to specify private data for a device's children
Simon Glass [Sun, 25 Jan 2015 15:27:06 +0000 (08:27 -0700)]
dm: core: Allow uclasses to specify private data for a device's children

In many cases the per-child private data for a device's children is defined
by the uclass rather than the individual driver. For example, a SPI bus
needs to store information about each of its children, but all SPI drivers
store the same information. It makes sense to allow the uclass to define
this data.

If the driver provides a size value for its per-child private data, then use
it. Failng that, fall back to that provided by the uclass.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agodm: core: Add a flag to control sequence numbering
Simon Glass [Sun, 25 Jan 2015 15:27:05 +0000 (08:27 -0700)]
dm: core: Add a flag to control sequence numbering

At present we try to use the 'reg' property and device tree aliases to give
devices a sequence number. The 'reg' property is often actually a memory
address, so the sequence numbers thus-obtained are not useful. It would be
better if the devices were just sequentially numbered in that case. In fact
neither I2C nor SPI use this feature, so drop it.

Some devices need us to look up an alias to number them within the uclass.
Add a flag to control this, so it is not done unless it is needed.

Adjust the tests to test this new behaviour.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agodm: core: Add a function to get a device's uclass ID
Simon Glass [Sun, 25 Jan 2015 15:27:04 +0000 (08:27 -0700)]
dm: core: Add a function to get a device's uclass ID

This is useful to check which uclass a device is in.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agodm: core: Add a post_bind method for parents
Simon Glass [Sun, 25 Jan 2015 15:27:03 +0000 (08:27 -0700)]
dm: core: Add a post_bind method for parents

Allow parent drivers to be called when a new child is bound to them. This
allows a bus to set up information it needs for that child.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agodm: core: Allow uclasses to specify platdata for a device's children
Simon Glass [Sun, 25 Jan 2015 15:27:02 +0000 (08:27 -0700)]
dm: core: Allow uclasses to specify platdata for a device's children

In many cases the child platform data for a device's children is defined by
the uclass rather than the individual devices. For example, a SPI bus needs
to know the chip select and speed for each of its children. It makes sense
to allow this information to be defined the SPI uclass rather than each
individual driver.

If the device provides a size value for its child platdata, then use it.
Failng that, fall back to that provided by the uclass.

Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agodm: core: Allow parents to have platform data for their children
Simon Glass [Sun, 25 Jan 2015 15:27:01 +0000 (08:27 -0700)]
dm: core: Allow parents to have platform data for their children

For buses it is common for parents to need to know the address of the child
on the bus, the bus speed to use for that child, and other information. This
can be provided in platform data attached to each child.

Add driver model support for this, including auto-allocation which can be
requested using a new property to specify the size of the data.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agodm: core: Allocate platform data when binding a device
Simon Glass [Sun, 25 Jan 2015 15:27:00 +0000 (08:27 -0700)]
dm: core: Allocate platform data when binding a device

When using allocated platform data, allocate it when we bind the device.
This makes it possible to fill in this information before the device is
probed.

This fits with the platform data model (when not using device tree),
since platform data exists at bind-time.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agodm: core: Tidy up error handling in device_bind()
Simon Glass [Sun, 25 Jan 2015 15:26:59 +0000 (08:26 -0700)]
dm: core: Tidy up error handling in device_bind()

Make the error handling more standard to make it easier to build on top of
it. Also correct a bug in the error path where there is no parent.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agodm: core: Set device tree node for root device
Simon Glass [Sun, 25 Jan 2015 15:26:58 +0000 (08:26 -0700)]
dm: core: Set device tree node for root device

The root device corresponds to the root device tree node, so set this up.
Also add a few notes to the documentation.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agodm: core: Improve comments for uclass_first/next_device()
Simon Glass [Sun, 25 Jan 2015 15:26:57 +0000 (08:26 -0700)]
dm: core: Improve comments for uclass_first/next_device()

Mention that the devices are probed ready for use.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agodm: Don't run tests if U-Boot cannot be built
Simon Glass [Sun, 25 Jan 2015 15:26:56 +0000 (08:26 -0700)]
dm: Don't run tests if U-Boot cannot be built

There is no point in running the tests if U-Boot cannot be built. Abort in
this case.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agodm: i2c: Provide an offset length parameter where needed
Simon Glass [Sun, 25 Jan 2015 15:26:55 +0000 (08:26 -0700)]
dm: i2c: Provide an offset length parameter where needed

Rather than assuming that the chip offset length is 1, allow it to be
provided. This allows chips that don't use the default offset length to
be used (at present they are only supported by the command line 'i2c'
command which sets the offset length explicitly).

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
9 years agodm: i2c: Add a compatbility layer
Simon Glass [Tue, 13 Jan 2015 01:02:08 +0000 (18:02 -0700)]
dm: i2c: Add a compatbility layer

For boards which use multiple I2C devices, or for SOCs which support
multiple boards, we might want to convert these to driver model at different
times. At present this is difficult because we need to either use
CONFIG_DM_I2C for a board or not.

Add a compatibility layer which implements the old API, thus allowing a
board to move to driver model for I2C without requiring that everything it
uses is moved in the same commit.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agodm: i2c: Rename driver model I2C functions to permit compatibility
Simon Glass [Tue, 13 Jan 2015 01:02:07 +0000 (18:02 -0700)]
dm: i2c: Rename driver model I2C functions to permit compatibility

Add a dm_ prefix to driver model I2C functions so that we can keep the old
ones around.

This is a little unfortunate, but on reflection it is too difficult to
change the API. We can undo this rename when most boards and drivers are
converted to use driver model for I2C.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agodm: Drop gpio.h header from fdtdec.c
Simon Glass [Thu, 15 Jan 2015 16:19:36 +0000 (09:19 -0700)]
dm: Drop gpio.h header from fdtdec.c

Since GPIO support has now moved to the driver model uclass, we can drop
this include.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agodm: fdt: Remove the old GPIO functions
Simon Glass [Tue, 6 Jan 2015 03:05:43 +0000 (20:05 -0700)]
dm: fdt: Remove the old GPIO functions

Now that we support device tree GPIO bindings directly in the driver model
GPIO uclass we can remove these functions.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agodm: exynos: dts: Use GPIO bank phandles for GPIOs
Simon Glass [Tue, 6 Jan 2015 03:05:42 +0000 (20:05 -0700)]
dm: exynos: dts: Use GPIO bank phandles for GPIOs

U-Boot now supports using GPIOs using bank phandles instead of global
numbers. Update the exynos device tree files to use this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
9 years agodm: tegra: dts: Use TEGRA_GPIO() macro for all GPIOs
Simon Glass [Tue, 6 Jan 2015 03:05:41 +0000 (20:05 -0700)]
dm: tegra: dts: Use TEGRA_GPIO() macro for all GPIOs

This new method is much easier and matches the kernel.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agodm: spi: Remove use of fdtdec GPIO support
Simon Glass [Tue, 6 Jan 2015 03:05:40 +0000 (20:05 -0700)]
dm: spi: Remove use of fdtdec GPIO support

These functions are going away, so use the new uclass support instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agodm: usb: Remove use of fdtdec GPIO support
Simon Glass [Tue, 6 Jan 2015 03:05:39 +0000 (20:05 -0700)]
dm: usb: Remove use of fdtdec GPIO support

These functions are going away, so use the new uclass support instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agodm: mmc: Remove use of fdtdec GPIO support
Simon Glass [Tue, 6 Jan 2015 03:05:38 +0000 (20:05 -0700)]
dm: mmc: Remove use of fdtdec GPIO support

These functions are going away, so use the new uclass support instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agodm: zynq: Remove inline gpio functions
Simon Glass [Tue, 6 Jan 2015 03:05:37 +0000 (20:05 -0700)]
dm: zynq: Remove inline gpio functions

These functions serve no useful purpose, and conflict with the generic API.
Drop them.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agodm: tegra: nand: Remove use of fdtdec GPIO support
Simon Glass [Tue, 6 Jan 2015 03:05:36 +0000 (20:05 -0700)]
dm: tegra: nand: Remove use of fdtdec GPIO support

These functions are going away, so use the new uclass support instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agodm: tegra: video: Remove use of fdtdec GPIO support
Simon Glass [Tue, 6 Jan 2015 03:05:35 +0000 (20:05 -0700)]
dm: tegra: video: Remove use of fdtdec GPIO support

These functions are going away, so use the new uclass support instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agodm: exynos: Add a GPIO translation function
Simon Glass [Tue, 6 Jan 2015 03:05:34 +0000 (20:05 -0700)]
dm: exynos: Add a GPIO translation function

This deals with the polarity bit. It also changes the GPIO devices so that
the correct device tree node is linked to each one. This allows us to use
the new uclass phandle functionality to implement a proper GPIO binding.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agodm: tegra: Add a GPIO translation function
Simon Glass [Tue, 6 Jan 2015 03:05:33 +0000 (20:05 -0700)]
dm: tegra: Add a GPIO translation function

This deals with the polarity bit and selecting the correct bank device
given a GPIO number.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agodm: cros_ec: Remove use of fdtdec GPIO support
Simon Glass [Tue, 6 Jan 2015 03:05:32 +0000 (20:05 -0700)]
dm: cros_ec: Remove use of fdtdec GPIO support

These functions are going away, so use the new uclass support instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agodm: demo: Add a simple GPIO demonstration
Simon Glass [Tue, 6 Jan 2015 03:05:31 +0000 (20:05 -0700)]
dm: demo: Add a simple GPIO demonstration

Add a new 'demo light' command which uses GPIOs to control imaginary lights.
Each light is assigned a bit number in the overall value. This provides an
example driver for using the new GPIO API.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agodm: gpio: Mark the old GPIO API deprecated
Simon Glass [Tue, 6 Jan 2015 03:05:30 +0000 (20:05 -0700)]
dm: gpio: Mark the old GPIO API deprecated

Add a deprecation notice to each function so that it is more obvious that we
are moving GPIOs to driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agodm: gpio: Add better functions to request GPIOs
Simon Glass [Tue, 6 Jan 2015 03:05:29 +0000 (20:05 -0700)]
dm: gpio: Add better functions to request GPIOs

At present U-Boot sort-of supports the standard way of reading GPIOs from
device tree nodes, but the support is incomplete, a bit clunky and only
works for GPIO bindings where #gpio-cells is 2.

Add new functions to request GPIOs, taking full account of the device
tree binding. These permit requesting a GPIO with a simple call like:

   gpio_request_by_name(dev, "cd-gpios", 0, &desc, GPIOD_IS_IN);

This will request the GPIO, looking at the device's node which might be
this, for example:

   cd-gpios = <&gpio TEGRA_GPIO(B, 3) GPIO_ACTIVE_LOW>;

The GPIO will be set to input mode in this case and polarity will be
honoured by the GPIO calls.

It is also possible to request and free a list of GPIOs.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agodm: gpio: Add a driver GPIO translation method
Simon Glass [Tue, 6 Jan 2015 03:05:28 +0000 (20:05 -0700)]
dm: gpio: Add a driver GPIO translation method

Only the GPIO driver knows about the full GPIO device tree binding used by
a device. Add a method to allow the driver to provide this information to the
uclass, including the GPIO offset within the device and flags such as the
polarity.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agodm: gpio: Add a native driver model API
Simon Glass [Tue, 6 Jan 2015 03:05:27 +0000 (20:05 -0700)]
dm: gpio: Add a native driver model API

So far driver model's GPIO uclass just implements the existing GPIO API.
This has some limitations:

- it requires manual device tree munging to support GPIOs in device tree
    (fdtdec_get_gpio() and friends)
- it does not understand polarity
- it is somewhat slower since we must scan for the GPIO device each time
- Global GPIO numbering can change if other GPIO drivers are probed
- it requires extra steps to set the GPIO direction and value

The new functions have a dm_ prefix where necessary to avoid name conflicts
but we can remove that when it is no-longer needed. The new struct gpio_desc
holds all required information about the GPIO. For now this is intended to
be stored by the client requesting the GPIO, but in future it might be
brought into the uclass in some way.

With these changes the old GPIO API still works, and uses the driver model
API underneath.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agodm: fdt: Add a function to decode phandles with arguments
Simon Glass [Tue, 6 Jan 2015 03:05:26 +0000 (20:05 -0700)]
dm: fdt: Add a function to decode phandles with arguments

For GPIOs and other functions we want to look up a phandle and then decode
a list of arguments for that phandle. Each phandle can have a different
number of arguments, specified by a property in the target node. This is
the "#gpio-cells" property for GPIOs.

Add a function to provide this feature, taken modified from Linux 3.18.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agodm: tegra: Bring in GPIO device tree binding
Simon Glass [Tue, 6 Jan 2015 03:05:25 +0000 (20:05 -0700)]
dm: tegra: Bring in GPIO device tree binding

At present the tegra GPIO driver does not fully support the existing device
tree binding, but add the binding file to cover the existing partial support.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agodm: exynos: Bring in GPIO device tree binding
Simon Glass [Tue, 6 Jan 2015 03:05:24 +0000 (20:05 -0700)]
dm: exynos: Bring in GPIO device tree binding

At present the exynos GPIO driver does not fully support the existing device
tree binding, but add the binding file to cover the existing partial support.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agodm: gpio: Bring in GPIO device tree binding
Simon Glass [Tue, 6 Jan 2015 03:05:23 +0000 (20:05 -0700)]
dm: gpio: Bring in GPIO device tree binding

Add the binding file that we are about to support.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agogeneric-board: show model name in board_init_f() too
Masahiro Yamada [Wed, 14 Jan 2015 08:07:05 +0000 (17:07 +0900)]
generic-board: show model name in board_init_f() too

The common/board_r.c has show_model_r() to display the model name
if the DTB has a "model" property.  It sounds useful to have a similar
function in common/board_f.c too because most of the boards show
their board name before relocation.

Instead of implementing the same function in both common/board_f.c
and common/board_r.c, let's split it up into common/show_board_info.c.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agocmd_i2c: change variable type for 10bit addressing support
Masahiro Yamada [Fri, 19 Dec 2014 18:34:23 +0000 (03:34 +0900)]
cmd_i2c: change variable type for 10bit addressing support

To store 10bit chip address, the variable type should not be uchar,
but uint.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher<hs@denx.de>
9 years agoARM: UniPhier: enable CONFIG_I2C_EEPROM
Masahiro Yamada [Tue, 13 Jan 2015 03:44:39 +0000 (12:44 +0900)]
ARM: UniPhier: enable CONFIG_I2C_EEPROM

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agoARM: UniPhier: enable I2C for UniPhier SoCs
Masahiro Yamada [Tue, 13 Jan 2015 03:44:38 +0000 (12:44 +0900)]
ARM: UniPhier: enable I2C for UniPhier SoCs

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agoi2c: UniPhier: add driver for UniPhier FIFO-builtin i2c controller
Masahiro Yamada [Tue, 13 Jan 2015 03:44:37 +0000 (12:44 +0900)]
i2c: UniPhier: add driver for UniPhier FIFO-builtin i2c controller

This commit adds on-chip I2C driver used on newer SoCs of Panasonic
UniPhier platform.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
9 years agoi2c: UniPhier: add driver for UniPhier i2c controller
Masahiro Yamada [Tue, 13 Jan 2015 03:44:36 +0000 (12:44 +0900)]
i2c: UniPhier: add driver for UniPhier i2c controller

This commit adds on-chip I2C driver used on some old Panasonic
UniPhier SoCs.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
9 years agoi2c: add CONFIG_DM_I2C to Kconfig
Masahiro Yamada [Tue, 13 Jan 2015 03:44:35 +0000 (12:44 +0900)]
i2c: add CONFIG_DM_I2C to Kconfig

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
9 years agolcd: fix console address is not initialized
Bo Shen [Wed, 28 Jan 2015 01:13:22 +0000 (09:13 +0800)]
lcd: fix console address is not initialized

This commit 904672e (lcd: refactor lcd console stuff into its
own file), which cause lcd console address is not initialized.

This patch initialize the lcd console use the default value,
will be update when splash screen is enabled.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
9 years agoMakefile: clean boot.bin
Bo Shen [Thu, 15 Jan 2015 02:03:53 +0000 (10:03 +0800)]
Makefile: clean boot.bin

When build for Atmel related boards which support SPL,
it will generate boot.bin, also clean when it when do
"make clean" operation.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agospl: Change printf to puts for "Unsupported boot-device"
Stefan Roese [Tue, 27 Jan 2015 15:45:09 +0000 (16:45 +0100)]
spl: Change printf to puts for "Unsupported boot-device"

Microblaze currently doesn't use printf in SPL. So this one line was the only
reference to it and resulted in the printf functionality to be pulled in.
Exceeding the 4k size limit. Lets change the printf back to puts so that
Microblaze is fixed again. The only drawback is that the detected boot-device
number will not be printed. But this message alone should be helpful enough
to get an idea where the boot process is broken.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
9 years agoMerge branch 'master' of git://git.denx.de/u-boot-x86
Tom Rini [Mon, 26 Jan 2015 22:44:49 +0000 (17:44 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-x86

9 years agoMerge branch 'master' of git://git.denx.de/u-boot-atmel
Tom Rini [Mon, 26 Jan 2015 11:42:40 +0000 (06:42 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-atmel

9 years agoMerge branch 'zynq' of git://www.denx.de/git/u-boot-microblaze
Tom Rini [Mon, 26 Jan 2015 11:42:15 +0000 (06:42 -0500)]
Merge branch 'zynq' of git://denx.de/git/u-boot-microblaze

9 years agoserial: Extend structure comments with register offset
Michal Simek [Wed, 7 Jan 2015 14:00:47 +0000 (15:00 +0100)]
serial: Extend structure comments with register offset

This information help with debugging issues with uart.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoserial: zynq: Use global baudrate instead of hardcoded one
Michal Simek [Tue, 2 Dec 2014 12:52:00 +0000 (13:52 +0100)]
serial: zynq: Use global baudrate instead of hardcoded one

This change enables to change baudrate on command line.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoARM: zynq: Add USB lthor download protocol support
Siva Durga Prasad Paladugu [Mon, 8 Sep 2014 16:39:37 +0000 (22:09 +0530)]
ARM: zynq: Add USB lthor download protocol support

updated the zynq config to support the lthor
download protocol.
This lthor functionality helps us to load linux
images on to DDR/MMC and can boot linux using bootm.
In order to load images the user should run lthor
command run "thor_ram" from u-boot prompt and
then send the images from host using lthor utility.

Define g_dnl_bind_fixup for zynq so that correct vendor
and product ids assigned incase of DFU and lthor.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoARM: zynq: Enable DFU functionality in zynq
Siva Durga Prasad Paladugu [Mon, 25 Aug 2014 05:28:33 +0000 (10:58 +0530)]
ARM: zynq: Enable DFU functionality in zynq

Enable DFU functionality in zynq.
This DFU functionality helps us to load linux
images on to DDR and can boot linux using bootm.
In order to load images the user should run dfu
command "dfu 0 ram 0" from u-boot prompt and then
send the images from host.

The malloc size has been increased to match the DFU
buffer requirements.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoARM: zynq: provide config option to select emio
Siva Durga Prasad Paladugu [Tue, 28 Oct 2014 11:29:32 +0000 (16:59 +0530)]
ARM: zynq: provide config option to select emio

Dont send always emio value as zero for zynq_gem_initialize
send it based on config.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoARM: zynq: Group ethernet configuration options together
Michal Simek [Tue, 13 Jan 2015 15:27:14 +0000 (16:27 +0100)]
ARM: zynq: Group ethernet configuration options together

No functional chagnes.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoARM: zynq: Use CMD_FS_GENERIC
Michal Simek [Wed, 24 Sep 2014 12:55:03 +0000 (14:55 +0200)]
ARM: zynq: Use CMD_FS_GENERIC

Based on:
"am335x_evm: Enable CMD_EXT4 and CMD_FS_GENERIC, add bootpart to env"
(sha1: 73a27a84e58cb99b4e64ed6a35eab5bc61f44f29)

Fix filesystem specific commands for loading.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoARM: zynq: Show board information by default
Michal Simek [Thu, 28 Aug 2014 11:31:02 +0000 (13:31 +0200)]
ARM: zynq: Show board information by default

Show board information in bootlog and enable it by default.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoARM: zynq: List qspi, smc and nand baseaddresses
Michal Simek [Tue, 13 Jan 2015 15:05:19 +0000 (16:05 +0100)]
ARM: zynq: List qspi, smc and nand baseaddresses

Add missing addresses to the list.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoARM: zynq: List nand, qspi and jtag boot modes
Michal Simek [Tue, 13 Jan 2015 15:04:10 +0000 (16:04 +0100)]
ARM: zynq: List nand, qspi and jtag boot modes

Use full boot mode list in SPL.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoARM: zynq: slcr: Dont modify the reserved bits
Siva Durga Prasad Paladugu [Tue, 28 Oct 2014 05:52:19 +0000 (11:22 +0530)]
ARM: zynq: slcr: Dont modify the reserved bits

Set only the 0-3 bits of the FPGA_RST_CTRL register
as other bits should not be set to 1.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Nathan Rossi <nathan.rossi@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoARM: zynq: ddrc: Setup half of memory only for ECC case
Michal Simek [Thu, 5 Sep 2013 06:41:19 +0000 (08:41 +0200)]
ARM: zynq: ddrc: Setup half of memory only for ECC case

Setup half of memory from ram_size for ECC case.
All the time the same board can be configured
with or without ECC. Based on ECC case detection
use half of memory with the same configuration.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoARM: zynq: Remove empty line
Michal Simek [Tue, 13 Jan 2015 14:54:04 +0000 (15:54 +0100)]
ARM: zynq: Remove empty line

Trivial patch.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoARM: zynq: Enable the Neon instructions
Michal Simek [Fri, 23 Jan 2015 08:45:12 +0000 (09:45 +0100)]
ARM: zynq: Enable the Neon instructions

Added the lowlevel_init to enable the Neon instructions.

Initially the u-boot was causing undefined instruction
exception if loaded through tcl, and working fine if loaded
through FSBL. The exception was causing in convertion formula
of given time to ticks. It was because, the Neon instructions
were disabled and hence causing the undefined exception. In
FSBL case, the FSBL was enabling the Neon instructions. Hence,
added the lowlevel_init to enable the Neon instructions.

Also enable neon instructions for non-xilinx toolchain.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Acked-by: Radhey Shyam Pandey <radheys@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoMerge branch 'master' of git://git.denx.de/u-boot-marvell
Tom Rini [Mon, 26 Jan 2015 00:05:40 +0000 (19:05 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-marvell

9 years agomarvell: kirkwood: guruplug refresh for newer kernel
Gerald Kerma [Fri, 19 Dec 2014 07:13:09 +0000 (08:13 +0100)]
marvell: kirkwood: guruplug refresh for newer kernel

Refresh for newer kernel.
Prepare ENV settings for sheevaplugs to be OpenWRT ready.

    +----------+
    | UBOOT    | >> 896 Kb (7x128)  = uboot
    +----------+
    | ENV      | >> 128 Kb          = uboot_env
    +----------+
    | ROOT(FS) | >> 511 Mb @ 1 Mb   = root -> rootfs (ubifs)
    +----------+

With (CC) TRUNK OpenWRT build (QUICK HOWTO) :

    <INTERRUPT>
    Marvell>> nand erase.part root
    Marvell>> ubi part root
    Marvell>> ubi remove rootfs
    Marvell>> ubi create rootfs
    Marvell>> usb reset
    Marvell>> fatload usb 2:1 0x800000 guruplug/openwrt/openwrt-kirkwood-guruplug-rootfs.ubifs
    Marvell>> ubi write 0x800000 rootfs ${filesize}
    Marvell>> reset

Changes in v1:
- ADD generic board define
- ADD FDT support
- ADD HUSH interpreter
- Define new NAND partition mapping

Signed-off-by: Gerald Kerma <dreagle@doukki.net>
9 years agokirkwood: sheevaplug: add CONFIG_SYS_GENERIC_BOARD define
Luka Perkov [Sun, 30 Nov 2014 01:41:49 +0000 (02:41 +0100)]
kirkwood: sheevaplug: add CONFIG_SYS_GENERIC_BOARD define

Signed-off-by: Luka Perkov <luka@openwrt.org>
Acked-by: Stefan Roese <sr@denx.de>
CC: Prafulla Wadaskar <prafulla@marvell.com>
9 years agokirkwood: pogo_e02: add CONFIG_SYS_GENERIC_BOARD define
Luka Perkov [Sun, 30 Nov 2014 01:41:19 +0000 (02:41 +0100)]
kirkwood: pogo_e02: add CONFIG_SYS_GENERIC_BOARD define

Signed-off-by: Luka Perkov <luka@openwrt.org>
Acked-by: Stefan Roese <sr@denx.de>
CC: Prafulla Wadaskar <prafulla@marvell.com>
9 years agokirkwood: iconnect: add CONFIG_SYS_GENERIC_BOARD define
Luka Perkov [Sun, 30 Nov 2014 01:41:04 +0000 (02:41 +0100)]
kirkwood: iconnect: add CONFIG_SYS_GENERIC_BOARD define

Signed-off-by: Luka Perkov <luka@openwrt.org>
Acked-by: Stefan Roese <sr@denx.de>
CC: Prafulla Wadaskar <prafulla@marvell.com>
9 years agokirkwood: goflexhome: add CONFIG_SYS_GENERIC_BOARD define
Luka Perkov [Sun, 30 Nov 2014 01:40:51 +0000 (02:40 +0100)]
kirkwood: goflexhome: add CONFIG_SYS_GENERIC_BOARD define

Signed-off-by: Luka Perkov <luka@openwrt.org>
Acked-by: Stefan Roese <sr@denx.de>
CC: Prafulla Wadaskar <prafulla@marvell.com>
9 years agokirkwood: dockstar: add CONFIG_SYS_GENERIC_BOARD define
Luka Perkov [Sun, 30 Nov 2014 01:40:37 +0000 (02:40 +0100)]
kirkwood: dockstar: add CONFIG_SYS_GENERIC_BOARD define

Signed-off-by: Luka Perkov <luka@openwrt.org>
Acked-by: Stefan Roese <sr@denx.de>
CC: Prafulla Wadaskar <prafulla@marvell.com>
9 years agokirkwood: ib62x0: add CONFIG_SYS_GENERIC_BOARD define
Luka Perkov [Tue, 1 Jul 2014 23:47:23 +0000 (01:47 +0200)]
kirkwood: ib62x0: add CONFIG_SYS_GENERIC_BOARD define

Signed-off-by: Luka Perkov <luka@openwrt.org>
Acked-by: Stefan Roese <sr@denx.de>
CC: Prafulla Wadaskar <prafulla@marvell.com>
9 years agoARM: kirkwood: fix cpu info for 6282 device id
Luka Perkov [Mon, 23 Dec 2013 00:23:07 +0000 (01:23 +0100)]
ARM: kirkwood: fix cpu info for 6282 device id

Signed-off-by: Luka Perkov <luka@openwrt.org>
Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Stefan Roese <sr@denx.de>
9 years agokirkwood: define empty CONFIG_MVGBE_PORTS by default
Luka Perkov [Mon, 11 Nov 2013 06:27:53 +0000 (07:27 +0100)]
kirkwood: define empty CONFIG_MVGBE_PORTS by default

Each board with defines it's own set of values. If we do not define
CONFIG_MVGBE_PORTS we will hit following error:

mvgbe.c: In function 'mvgbe_initialize':
mvgbe.c:700:34: error: 'CONFIG_MVGBE_PORTS' undeclared (first use in this function)
  u8 used_ports[MAX_MVGBE_DEVS] = CONFIG_MVGBE_PORTS;

This patch fixes above described problem.

Signed-off-by: Luka Perkov <luka@openwrt.org>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
9 years agocosmetic: kirkwood: style fixes in kwbimage.cfg files
Luka Perkov [Mon, 11 Nov 2013 05:45:44 +0000 (06:45 +0100)]
cosmetic: kirkwood: style fixes in kwbimage.cfg files

When diffing through the changes only the relevant changes
should be displayed.

Signed-off-by: Luka Perkov <luka@openwrt.org>
Acked-by: Stefan Roese <sr@denx.de>
9 years agofsl/ls1021qds: Add deep sleep support
tang yuantian [Wed, 17 Dec 2014 04:58:05 +0000 (12:58 +0800)]
fsl/ls1021qds: Add deep sleep support

Add deep sleep support on Freescale LS1021QDS platform.

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
[York Sun: Fix conflict in fdt.c]
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agox86: config: chromebook_link: Enable environment
Simon Glass [Tue, 20 Jan 2015 05:16:17 +0000 (22:16 -0700)]
x86: config: chromebook_link: Enable environment

Enable an environment area.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
9 years agox86: ivybridge: Drop the Kconfig MRC cache information
Simon Glass [Tue, 20 Jan 2015 05:16:16 +0000 (22:16 -0700)]
x86: ivybridge: Drop the Kconfig MRC cache information

This is now stored in the device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agox86: config: Enable hook for saving MRC configuration
Simon Glass [Tue, 20 Jan 2015 05:16:15 +0000 (22:16 -0700)]
x86: config: Enable hook for saving MRC configuration

Add a hook to ensure that this information is saved.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
9 years agox86: Implement a cache for Memory Reference Code parameters
Simon Glass [Tue, 20 Jan 2015 05:16:14 +0000 (22:16 -0700)]
x86: Implement a cache for Memory Reference Code parameters

The memory reference code takes a very long time to 'train' its SDRAM
interface, around half a second. To avoid this delay on every boot we can
store the parameters from the last training sessions to speed up the next.

Add an implementation of this, storing the training data in CMOS RAM and
SPI flash.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agox86: dts: Add SPI flash MRC details for chromebook_link
Simon Glass [Tue, 20 Jan 2015 05:16:13 +0000 (22:16 -0700)]
x86: dts: Add SPI flash MRC details for chromebook_link

Correct the SPI flash compatible string, add an alias and specify the
position of the MRC cache, used to store SDRAM training settings for the
Memory Reference Code.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agoAllow architecture-specific memory reservation
Simon Glass [Tue, 20 Jan 2015 05:16:12 +0000 (22:16 -0700)]
Allow architecture-specific memory reservation

All memory to be reserved for use after relocation by adding a new call
to perform this reservation.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agox86: spi: Add device tree support
Simon Glass [Tue, 20 Jan 2015 05:16:11 +0000 (22:16 -0700)]
x86: spi: Add device tree support

As a temporary measure before the ICH driver moves over to driver model,
add device tree support to the driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agox86: rtc: mc146818: Add helpers to read/write CMOS RAM
Simon Glass [Tue, 20 Jan 2015 05:16:10 +0000 (22:16 -0700)]
x86: rtc: mc146818: Add helpers to read/write CMOS RAM

On x86 we use CMOS RAM to read and write some settings. Add basic support
for this, including access to registers 128-255.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agox86: Use ipchecksum from net/
Simon Glass [Tue, 20 Jan 2015 05:16:09 +0000 (22:16 -0700)]
x86: Use ipchecksum from net/

The existing IP checksum function is only accessible to the 'coreboot' cpu.
Drop it in favour of the new code in the network subsystem.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agonet: Add a separate file for IP checksumming
Simon Glass [Tue, 20 Jan 2015 05:16:07 +0000 (22:16 -0700)]
net: Add a separate file for IP checksumming

Move the checksum code out into its own file so it can be used elsewhere.
Also use a new version which supports a length which is not a multiple of
2 and add a new function to add two checksums.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agox86: dts: Add compatible string for Intel ICH9 SPI controller
Simon Glass [Tue, 20 Jan 2015 05:16:06 +0000 (22:16 -0700)]
x86: dts: Add compatible string for Intel ICH9 SPI controller

Add this to the enum so that we can use the various fdtdec functions. A
later commit will move this driver to driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>