Peng Fan [Tue, 22 Oct 2019 03:29:48 +0000 (03:29 +0000)]
clk: imx8mm: add enet clk
Add enet ref/timer/PHY_REF/root clk which are required to make enet
function well.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Peng Fan [Wed, 16 Oct 2019 03:01:51 +0000 (03:01 +0000)]
imx: imx8m: fix boot when CONFIG_$(SPL_)CLK not defined
When CONFIG_$(SPL_)CLK not defined, the clock controller device
not exist, so to avoid boot failure for platform not have
CONFIG_$(SPL_)CLK, add a check.
Reviewed-by: Patrick Wildt <patrick@blueri.se>
Tested-by: Patrick Wildt <patrick@blueri.se>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 16 Sep 2019 03:09:55 +0000 (03:09 +0000)]
imx: add i.MX8MN DDR4 board support
Support pinctrl/clk/sdhc, include ddr4 timing data.
Log:
U-Boot SPL
2019.10-rc3-00356-g497c500423-dirty (Sep 16 2019 - 10:54:58 +0800)
Normal Boot
Trying to boot from BOOTROM
image offset 0x8000, pagesize 0x200, ivt offset 0x0
U-Boot
2019.10-rc3-00356-g497c500423-dirty (Sep 16 2019 - 10:54:58 +0800)
CPU: Freescale i.MX8MNano rev1.0 at 24 MHz
Reset cause: POR
Model: NXP i.MX8MNano DDR4 EVK board
DRAM: 2 GiB
MMC: FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... *** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
Net: No ethernet found.
Hit any key to stop autoboot: 0
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 16 Sep 2019 03:09:52 +0000 (03:09 +0000)]
imx: add dtsi for i.MX8MN
Add dtsi for i.MX8MN
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 16 Sep 2019 03:09:50 +0000 (03:09 +0000)]
imx8m: add i.MX8MN ddr4 image cfg file
Add cfg file for i.MX8MN DDR4
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 16 Sep 2019 03:09:47 +0000 (03:09 +0000)]
clk: imx: add i.MX8MN ccf driver
Add i.MX8MM ccf driver support.
Modifed from Linux Kernel 5.3.0-rc1, drop some entries
that not used in U-Boot and adapt to U-Boot CCF style.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Lukasz Majewski <lukma@denx.de>
Peng Fan [Mon, 16 Sep 2019 03:09:44 +0000 (03:09 +0000)]
tools: imx8m_image: support ddr4 firmware
some boards use ddr4, not lpddr4, so we need to check ddr4 firmware.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 16 Sep 2019 03:09:42 +0000 (03:09 +0000)]
pinctrl: imx8m: support i.MX8MN
Support i.MX8MN in imx8m pinctrl driver
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 16 Sep 2019 03:09:39 +0000 (03:09 +0000)]
tools: imx8mimage: add ROM VERSION
The IVT offset is changed on i.MX8MN. Use ROM_VERSION to pass the
v1 or v2 to mkimage.
v1 is for iMX8MQ and iMX8MM
v2 is for iMX8M Nano (iMX8MN)
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 16 Sep 2019 03:09:36 +0000 (03:09 +0000)]
imx8mn: add get_boot_device
No ROM INFO structure on iMX8MN, use new ROM API to get boot device
from ROM.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 16 Sep 2019 03:09:34 +0000 (03:09 +0000)]
imx: cpu: restrict get_boot_device
i.MX8MN has its own get_boot_device, so restrict with i.MX8MQ and
i.MX8MM.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 16 Sep 2019 03:09:31 +0000 (03:09 +0000)]
imx: add rom api support
i.MX8MN support loading images with rom api, so we implement
reuse board_return_to_bootrom to let ROM loading images.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 16 Sep 2019 03:09:29 +0000 (03:09 +0000)]
imx: spl: use spl_board_boot_device for i.MX8MN
i.MX8MN follow same logic as i.MX8MM, so use spl_board_boot_device
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 16 Sep 2019 03:09:26 +0000 (03:09 +0000)]
imx8mn: add pin header
Add pin header for i.MX8MN
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 16 Sep 2019 03:09:23 +0000 (03:09 +0000)]
imx: add i.MX8MN PE property
i.MX8MN does not have LVTTL, it has a PE property
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 16 Sep 2019 03:09:20 +0000 (03:09 +0000)]
imx8mn: set BYPASS ID SWAP to avoid AXI bus errors
Set the BYPASS ID SWAP bit (GPR10 bit 1) in order for GPU not to
generated AXI bus errors with TZC380 enabled.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 16 Sep 2019 03:09:17 +0000 (03:09 +0000)]
imx8m: add clk support for i.MX8MN
i.MX8MN has similar architecture with i.MX8MM, so it could reuse
the clock code of i.MX8MM, but i.MX8MN has different CCM root
configurations, so need a separate root entry.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Thu, 27 Jun 2019 09:23:49 +0000 (17:23 +0800)]
imx8mn: support get_cpu_rev
Add a dummy cpu type and support get_cpu_rev for i.MX8MN
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 16 Sep 2019 03:09:12 +0000 (03:09 +0000)]
imx: add i.MX8MN kconfig entry
Add i.MX8MN kconfig entry
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 2 Sep 2019 10:16:32 +0000 (18:16 +0800)]
power: domain: add i.MX8 scu power domain driver
The power domain tree is not accepted by Linux Kernel upstream.
only a single pd node is used currently, as following:
pd: imx8qx-pd {
compatible = "fsl,imx8qm-scu-pd", "fsl,scu-pd";
#power-domain-cells = <1>;
};
So to migrate to use upstream linux dts, we also need a driver
to support this.
This patch is to support the new method, compared with legacy power
domain tree, it will be simpiler, because each device will
has resource id as power domain index, it will be directly passed
to scfw, and no need to let power domain build that tree. If multiple
power domain is needed, it is the dts node should has correctly power
domains entry added and sequence correct.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 2 Sep 2019 10:09:49 +0000 (18:09 +0800)]
power: domain: make imx8-power-domain.c legacy
The current i.MX8 power domain driver is based on i.MX vendor
power domain tree which will retire later.
The Linux upstream use a single pd node for power domain driver,
and U-Boot will adopt that. When U-Boot i.MX8 dts synced with
Linux Kernel upstream and related driver ready, the legacy
driver will be removed.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 2 Sep 2019 10:20:17 +0000 (10:20 +0000)]
misc: imx8: scu: simplify code to make it extendable
clk and pinctrl will be get(probed) during each device probe,
we don't need to probe them in scu driver. Only need to bind the sub-nodes
(clk and iomuxc) of MU node with their drivers.
So drop the code to probe the clk/pinctrl, and this patch will make it
easy to add more subnodes.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 2 Sep 2019 10:20:14 +0000 (10:20 +0000)]
arm: dts: imx8qm-mek: add u-boot, dm-spl for lpuart0
lpuart0 is the uart used by SPL and U-Boot proper, and DM_SERIAL
is enabled. Since uclass power domain is also enabled, to make
lpuart work properly, need add u-boot,dm-spl for lpuart power domain
and its parent.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 2 Sep 2019 10:20:12 +0000 (10:20 +0000)]
arm: dts: imx8qxp-mek: add u-boot, dm-spl for lpuart0
lpuart0 is the uart used by SPL and U-Boot proper, and DM_SERIAL
is enabled. Since uclass power domain is also enabled, to make
lpuart work properly, need add u-boot,dm-spl for lpuart power domain
and its parent.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 2 Sep 2019 08:04:11 +0000 (16:04 +0800)]
imx8qm: mek: enable dm-spl for pm
with u-boot,dm-spl added for imx8qm-pm node, and SPL_SIMPLE_BUS enabled,
the bind and probe code in board file could be removed.
Also we need to enlarge SYS_MALLOC_F_LEN to avoid calloc fail.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tom Rini [Mon, 4 Nov 2019 17:57:41 +0000 (12:57 -0500)]
Merge tag 'u-boot-imx-
20191104' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
u-boot-imx-
20191104
-------------------
- i.MX NAND: nandbcb support for MX6UL / i.MX7
- i.MX8: support for HAB
- Convert to DM (opos6ul, mccmon6)
- Toradex i.MX6ull colibri
- sync DTS with kernel
Travis : https://travis-ci.org/sbabic/u-boot-imx/builds/
606853416
Tom Rini [Mon, 4 Nov 2019 17:57:34 +0000 (12:57 -0500)]
Merge branch '2019-11-04-ti-imports'
- Various CPSW related improvements, DTS resync
Grygorii Strashko [Thu, 19 Sep 2019 08:16:42 +0000 (11:16 +0300)]
net: ti: cpsw: convert to use dev/ofnode api
Conver TI CPSW driver to use dev/ofnode api.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
[trini: Add <dm/ofnode.h> to provide the prototype to ofnode]
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 4 Nov 2019 00:28:54 +0000 (19:28 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Add support for Intel FSP-S and FSP-T in binman
- Correct priority selection for image loaders for SPL
- Add a size check for TPL
- Various small SPL/TPL bug fixes and changes
- SPI: Add support for memory-mapped flash
Tom Rini [Sat, 2 Nov 2019 18:43:06 +0000 (14:43 -0400)]
tbs2910: Disable Plan9/RTEMS bootm support
We have once again reached a point where this board does not build in
some cases with supported toolchains due to reaching a size constraint.
To regain some space, disable support for Plan 9 / RTEMS images with the
bootm command.
Acked-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Igor Opaniuk [Sun, 3 Nov 2019 15:49:46 +0000 (16:49 +0100)]
imx: nandbcb: add support for writing BCB only
Add subcommand for add writing BCB only, where we provide appropriate
offsets for firmware1 and firmware2 and size.
Example of usage:
> nandbcb bcbonly 0x00180000 0x00080000 0x00200000
Writing 1024 bytes to 0x0: randomizing
OK
Writing 1024 bytes to 0x20000: randomizing
OK
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Tested-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Igor Opaniuk [Sun, 3 Nov 2019 15:49:45 +0000 (16:49 +0100)]
imx: nandbcb: refactor update function
Move code for writing FCB/DBBT pages to a separate function
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Tested-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Igor Opaniuk [Sun, 3 Nov 2019 15:49:44 +0000 (16:49 +0100)]
imx: nandbcb: add support for i.MX7
Add support for updating FCB/DBBT on i.MX7:
- additional new fields in FCB structure
- Leverage hardware BCH/randomizer for writing FCB
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Tested-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Igor Opaniuk [Sun, 3 Nov 2019 15:49:43 +0000 (16:49 +0100)]
nand: mxs_nand: add API for switching different BCH layouts
On i.MX7 in a sake of reducing the disturbances caused by a neighboring
cells in the FCB page in the NAND chip, a randomizer is enabled when
reading the FCB page by ROM bootloader.
Add API for setting BCH to specific layout (and restoring it back) used by
ROM bootloader to be able to burn it in a proper way to NAND using
nandbcb command.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Anti Sullin <anti.sullin@artecdesign.ee>
Tested-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Igor Opaniuk [Sun, 3 Nov 2019 15:49:42 +0000 (16:49 +0100)]
imx: gpmi: add defines for hw randominizer
Extend GPMI Integrated ECC Control Register Description, include
additional defines for enabling randomizer function and providing
proper randomizer type.
For additional details check i.MX7 APR, section
9.6.6.3 GPMI Integrated ECC Control Register Description
(GPMI_ECCCTRLn)
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Tested-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Tom Rini [Sun, 3 Nov 2019 12:41:12 +0000 (07:41 -0500)]
tbs2910: Disable Plan9/RTEMS bootm support
We have once again reached a point where this board does not build in
some cases with supported toolchains due to reaching a size constraint.
To regain some space, disable support for Plan 9 / RTEMS images with the
bootm command.
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Oliver Graute [Fri, 20 Sep 2019 07:08:41 +0000 (07:08 +0000)]
imx: support i.MX8QM ROM 7720 a1 board
Add i.MX8QM ROM 7720a1 board support
Boot log as below:
U-Boot
2019.10-rc3-00004-gd073e0242f (Sep 20 2019 - 08:24:13 +0200)
CPU: NXP i.MX8QM RevB A53 at 1200 MHz
Model: Advantech iMX8QM Qseven series
Board: ROM-7720-A1 4GB
Build: SCFW
65afe5f6
Boot: SD2
DRAM: 4 GiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... OK
In: serial@
5a060000
Out: serial@
5a060000
Err: serial@
5a060000
Net: eth0: ethernet@5b040000Could not get PHY for FEC1: addr 1
, eth-1: ethernet@
5b050000
Hit any key to stop autoboot: 0
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Peng Fan [Wed, 16 Oct 2019 10:24:30 +0000 (10:24 +0000)]
arm: dts: imx8mm: sync dts from Linux Kernel
Sync dts for i.MX8MM from Linux Kernel 5.4.0-rc1
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Hannes Schmelzer [Wed, 17 Jul 2019 12:29:53 +0000 (14:29 +0200)]
board/BuR/brppt2: initial commit
This commit adds support for the brppt2 board. The board is based on the
i.mx6 dual-lite SoC.
Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Anatolij Gustschin [Sat, 26 Oct 2019 14:24:04 +0000 (16:24 +0200)]
imx8: output SECO-FW and ATF commit IDs
Borrow ID reading code from Ye Li (NXP U-Boot, commit ID
5b443e3e2617)
but drop imx-mkimage commit ID reading since we now use in tree mkimage.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Sat, 26 Oct 2019 14:24:03 +0000 (16:24 +0200)]
mach-imx: Adding new argument for SIP call interface
Need to pass total 5 arguments for SIP HAB call on i.MX8MQ,
so update the interface to add new argument.
Signed-off-by: Ye Li <ye.li@nxp.com>
[agust: fixed imx8m-power-domain build]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Patrick Wildt <patrick@blueri.se>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Wed, 25 Sep 2019 08:11:19 +0000 (08:11 +0000)]
imx8qxp: mek: add secure boot script
Add secure boot script, use ahab to verify image
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Wed, 25 Sep 2019 08:11:17 +0000 (08:11 +0000)]
imx8qm: mek: add secure boot script
Add secure boot script, use ahab to verify image
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Wed, 25 Sep 2019 08:11:14 +0000 (08:11 +0000)]
imx8: Add AHAB secure boot support
Add function and new command "auth_cntr" for secure boot support.
When booting with life cycle set to OEM closed, we need to use
this function to authenticate the OS container and load kernel & FDT
from OS container to their destination.
Also add image authentication call when loading container images.
Users can set CONFIG_AHAB_BOOT=y to enable the feature. It is not
set at default.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Wed, 16 Oct 2019 10:24:42 +0000 (10:24 +0000)]
imx8mm: evk: enable
bd71837 pmic
Enable
bd71837 pmic for i.MX8MM EVK board, need to set voltage for
DRAM and linux suspend voltage requirement.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Wed, 16 Oct 2019 10:24:39 +0000 (10:24 +0000)]
imx8m: evk: spl: probe clk in spl early stage
We are going to add i2c pmic support before dram could be used.
So we need enable clk driver earlier, so use spl_early_init
and move clock controller probe eariler to board_init_f.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Wed, 16 Oct 2019 10:24:36 +0000 (10:24 +0000)]
power: pmic: Kconfig: add CONFIG_SPL_DM_PMIC_BD71837
Add CONFIG_SPL_DM_PMIC_BD71837 to make this driver could be
used in SPL stage
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Wed, 16 Oct 2019 10:24:34 +0000 (10:24 +0000)]
pmic:
bd71837: drop DEBUG macro
Drop DEBUG macro definition which is used for debug purpose.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Wed, 16 Oct 2019 10:24:28 +0000 (10:24 +0000)]
dt-bindings: import usb pd
Import usb pd bindings from Linux 5.4.0-rc1.
This file will be included by imx8mm-evk.dts.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Wed, 16 Oct 2019 10:24:25 +0000 (10:24 +0000)]
imx: spl: implement spl_boot_mode for i.MX7/8/8M
It will be easy to separate SD/EMMC when booting in SPL stage, then
no need to bother which device is BOOT_DEVICE_MMC1/2.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Wed, 16 Oct 2019 10:24:22 +0000 (10:24 +0000)]
imx: imx8mq: add init_nand_clk
Add init_nand_clk to enable gpmi nand clock. Since i.MX8MQ not use CCF,
so we still use legacy mode to configure the clock.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Wed, 16 Oct 2019 10:24:20 +0000 (10:24 +0000)]
imx8m: clock: improve irq response latency
Improve the IRQ response latency by setting GIC root clock source to
sys_pll2_200m from osc.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Wed, 16 Oct 2019 10:24:17 +0000 (10:24 +0000)]
imx8m: imx8mq: get chip rev for B1 revision
The i.MX8MQ B1 uses OCOTP_HW_OCOTP_READ_FUSE_DATA register for chip id.
It returns a magic number 0xff0055aa. update get_cpu_rev to support it,
and enable ocotp clock to access ocotp.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Sébastien Szymanski [Mon, 21 Oct 2019 13:33:04 +0000 (15:33 +0200)]
video: mxsfb: set gd->fb_base
Set gd->fb_base so it can be shown with bdinfo command.
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Sébastien Szymanski [Mon, 21 Oct 2019 13:33:03 +0000 (15:33 +0200)]
opos6uldev: migrate to DM_VIDEO
Migrate to DM_VIDEO, update the device tree and remove code that is no
longer necessary.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Sébastien Szymanski [Mon, 21 Oct 2019 13:33:02 +0000 (15:33 +0200)]
imx6ul: opos6ul: migrate to DM_ETH
Migrate to DM_ETH and remove code that is no longer necessary.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Patrick Wildt [Mon, 14 Oct 2019 11:19:00 +0000 (13:19 +0200)]
imx: update i.MX8MQ device trees
This updates the i.MX8MQ device trees and, necessarily, also the
i.MX8MQ clock bindings. These are taken verbatim from from the
Linux kernel version v5.4-rc2, which three small changes which
were already part of the previous device tree:
* Keep the PSCI reserved memory range
* Keep the alias for ethernet, so that the MAC address can be set
* Keep the modified #include for the IOMUXC pins
Signed-off-by: Patrick Wildt <patrick@blueri.se>
Acked-by: Peng Fan <peng.fan@nxp.com>
Lukasz Majewski [Tue, 15 Oct 2019 08:28:47 +0000 (10:28 +0200)]
mccmon6: defconfig: nor: Enable usage of *_TINY_* drivers in SPL
After this change the SPL size has been reduced from 38K to 34K.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Tue, 15 Oct 2019 08:28:46 +0000 (10:28 +0200)]
ARM: imx: Convert mccmon6 to use fitImage instead of uImage+DTB
This commit enabled support for fitImage on mccmon6 when we
switch to DT/DTS (including falcon mode).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Tue, 15 Oct 2019 08:28:45 +0000 (10:28 +0200)]
spl: nor: Provide falcon boot support for NOR memories
This commit adds falcon boot support (by also copying args necessary for
booting) to the SPL NOR memory driver.
After this change it is possible to use the falcon boot in the same way
as on NAND memories. The necessary configs (i.e. CONFIG_CMD_SPL_NOR_OFS)
are now defined in Kconfig.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Lukasz Majewski [Tue, 15 Oct 2019 08:28:44 +0000 (10:28 +0200)]
ARM: imx: Decouple mccmon6's SPL and u-boot proper code
The mccmon6 has been used a "mixed" approach between SPL and
U-Boot proper sources.
This commit decoupes SPL and u-boot proper, which allows clear
distinction between those two code bases and facilitates
conversion to DM/DTS on this particular board.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Tue, 15 Oct 2019 08:28:43 +0000 (10:28 +0200)]
ARM: imx: Convert mccmon6 to use DM/DTS in the u-boot proper
This commit converts mccmon6's u-boot proper (in a single commit to avoid
build breaks) to use solely DM/DTS.
The DTS description of the mccmon6 has been ported from Linux kernel
(v4.20, SHA1:
8fe28cb58bcb235034b64cbbb7550a8a43fd88be)
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Tue, 15 Oct 2019 10:40:51 +0000 (12:40 +0200)]
imx: Enable RTC (ds1307) support in the U-Boot proper on TPC70 board
The TPC70 is equipped with DS1307 RTC device. Add code to enable support
for it.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Claudius Heine [Tue, 29 Oct 2019 12:17:56 +0000 (13:17 +0100)]
ARM: imx6: DHCOM i.MX6 PDK: spl: Add eMMC initialization to SPL code
In order for 'bmode emmc' to work, the eMMC needs to be initialized in the
SPL. This change initializes the eMMC as BOOT_DEVICE_MMC1 (index=0).
Signed-off-by: Claudius Heine <ch@denx.de>
Claudius Heine [Tue, 29 Oct 2019 12:17:57 +0000 (13:17 +0100)]
ARM: imx6: DHCOM i.MX6 PDK: defconfig: Enable MMC support of SPL
Signed-off-by: Claudius Heine <ch@denx.de>
Claudius Heine [Tue, 29 Oct 2019 12:17:55 +0000 (13:17 +0100)]
ARM: imx6: DHCOM i.MX6 PDK: fix board_boot_modes emmc entry
The board_boot_modes contained the wrong values for the emmc entry.
The eMMC here is connected over a 8-bit bus.
This change allows to use the 'bmode emmc' command to boot from emmc.
Signed-off-by: Claudius Heine <ch@denx.de>
Robert Hancock [Tue, 6 Aug 2019 17:05:30 +0000 (11:05 -0600)]
watchdog: imx: Use immediate reset bits for expire_now
The expire_now function was previously setting the watchdog timeout to
minimum and waiting for the watchdog to expire. However, this watchdog
also has bits to trigger immediate reset. Use those instead, like the
Linux imx2_wdt driver does.
Signed-off-by: Robert Hancock <hancock@sedsystems.ca>
Robert Hancock [Tue, 6 Aug 2019 17:05:29 +0000 (11:05 -0600)]
watchdog: imx: Add DT ext-reset handling
The Linux imx2_wdt driver uses a fsl,ext-reset-output boolean in the
device tree to specify whether the board design should use the external
reset instead of the internal reset. Use this boolean to determine which
mode to use rather than using external reset unconditionally.
For the legacy non-DM mode, the external reset is always used in order
to maintain the previous behavior.
Signed-off-by: Robert Hancock <hancock@sedsystems.ca>
Igor Opaniuk [Wed, 16 Oct 2019 10:39:36 +0000 (13:39 +0300)]
ARM: dts: imx6ull-colibri: pre-reloc for uart pinmux modes
Add u-boot,dm-pre-reloc properties for uart pinmux configuration
nodes, which enables UART as early as possible (before relocation).
Without this we miss almost the half of output (U-boot version,
CPU defails, Reset cause, DRAM details etc.).
Fixes:
cd69e8ef9b ("colibri-imx6ull: migrate pinctrl and regulators to dtb/dm")
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Igor Opaniuk [Wed, 16 Oct 2019 10:39:35 +0000 (13:39 +0300)]
ARM: dts: imx6ull-colibri: change hierarchy of DTS files
Introduce imx6ull-colibri-u-boot.dtsi for u-boot specific properties to
keep original imx6ull-colibri.dts in sync with Linux.
Move all contents of imx6ull-colibri.dts to imx6ull-colibri.dtsi +
additionally fix checkpatch warnings.
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Marek Vasut [Tue, 15 Oct 2019 16:26:57 +0000 (18:26 +0200)]
arm: mxs: Increase VDDD voltage to match specification
According to IMX28CEC rev. 4, 10/2018, Table 15. Recommended Operating
Conditions, page 16, the VDDD should be set to 1.55V when the CPU is
operating at 454MHz. This is the case in U-Boot, hence increase the
VDDD voltage. This fixes instability when performing TFTP transfers.
Increase the brownout threshold to 1.4V. The documentation recommends
1.45V setting for the brownout, however, this triggers failure during
power block init, so keep the brownout slightly lower.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Claudius Heine [Tue, 29 Oct 2019 12:08:44 +0000 (13:08 +0100)]
ARM: imx: Use IMX6_SRC_GPR10_BMODE instead of magic number
Signed-off-by: Claudius Heine <ch@denx.de>
Claudius Heine [Tue, 29 Oct 2019 12:08:43 +0000 (13:08 +0100)]
ARM: imx: Fix bmode detection from grp10
imx6_is_bmode_from_gpr9 always returns false, because
IMX6_SRC_GPR10_BMODE is 1<<28 and gets casted to u8 on return.
This moves the function body into imx6_src_get_boot_mode, since that is the
only one using it and it is on the same abstraction level (accessing
registers directly).
Signed-off-by: Claudius Heine <ch@denx.de>
Manivannan Sadhasivam [Thu, 15 Aug 2019 08:27:24 +0000 (13:57 +0530)]
arm: dts: Add devicetree support for iMXQXP AI_ML board
Add devicetree support for iMXQXP AI_ML board from Einfochips.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Parthiban Nallathambi [Fri, 18 Oct 2019 09:46:19 +0000 (11:46 +0200)]
i.MX6: nand: extend nandbcb command for imx6UL(L)
Firmware Configuration Block(FCB) for imx6ul(l) needs to be
BCH encoded.
Signed-off-by: Parthiban Nallathambi <pn@denx.de>
Acked-by: Shyam Saini <shyam.saini@amarulasolutions.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Lukasz Majewski [Mon, 14 Oct 2019 15:43:34 +0000 (17:43 +0200)]
imx: defconfig: Enable CONFIG_SPL_FORCE_MMC_BOOT on display5
After the following commit:
commit
772b55723bcb ("imx: Introduce CONFIG_SPL_FORCE_MMC_BOOT to force MMC
boot on falcon mode")
it is possible to set the CONFIG_SPL_FORCE_MMC_BOOT flag, which allows
using MMC device as boot device regardless of the device used by Boot ROM
(FBL) as the first boot medium.
Display5 board needs this flag set to allow falcon boot from eMMC device.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Grygorii Strashko [Thu, 19 Sep 2019 08:16:41 +0000 (11:16 +0300)]
net: ti: am65x-cpsw: fix mac tx internal delay for rgmii-rxid mode
Now AM65x CPSW2G driver will disable MAC TX internal delay for PHY
interface mode "rgmii-rxid" which is incorrect. Hence, fix it by keeping
default value (enabled) for MAC TX internal delay when "rgmii-rxid"
interface mode is selected.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Grygorii Strashko [Thu, 19 Sep 2019 08:16:40 +0000 (11:16 +0300)]
net: ti: cpsw: fix mac tx internal delay for rgmii-rxid mode
Now TI CPSW driver will disable MAC TX internal delay for PHY interface
mode "rgmii-rxid" which is incorrect.
Hence, fix it by keeping default value (enabled) for MAC TX internal delay
when "rgmii-rxid" interface mode is selected.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Grygorii Strashko [Thu, 19 Sep 2019 08:16:39 +0000 (11:16 +0300)]
net: ti: cpsw: add support for standard eth "max-speed" dt property
This patch adds support for standard Ethernet "max-speed" DT property to
allow PHY link speed limitation.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Grygorii Strashko [Thu, 19 Sep 2019 08:16:38 +0000 (11:16 +0300)]
net: ti: cpsw: move parsing of dt port's parameters in separate func
Move parsing of dt port's parameters in separate func for better code
readability.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Grygorii Strashko [Thu, 19 Sep 2019 08:16:37 +0000 (11:16 +0300)]
net: ti: cpsw: enable 10Mbps link speed support in rgmii mode
According to TRMs the 10Mbps link speed is supported in RGMII only when
CPSW2G MAC SL is configured for External Control ("in band") mode
CPSW_SL_MACCTRL.EXT_EN(18) = 1.
Hence update cpsw_slave_update_link() to follow documentation.
[1] https://patchwork.kernel.org/patch/
10285239/
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Grygorii Strashko [Sat, 31 Aug 2019 07:30:34 +0000 (10:30 +0300)]
arm: dts: am335x: sync cpsw/mdio/phy with latest linux - drop phy_id
Synchronize CPSW/MDIO/PHY DT nodes with latest linux - replace deprecated
phy_id property with phy-handle.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Felix Brack <fb@ltec.ch>
Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
Grygorii Strashko [Sat, 31 Aug 2019 07:30:33 +0000 (10:30 +0300)]
arm: dts: am437x: sync cpsw/mdio/phy with latest linux - drop phy_id
Synchronize CPSW/MDIO/PHY DT nodes with latest linux - replace deprecated
phy_id property with phy-handle.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Grygorii Strashko [Sat, 31 Aug 2019 07:30:32 +0000 (10:30 +0300)]
arm: dts: dra7: sync cpsw/mdio/phy with latest linux - drop phy_id
Synchronize CPSW/MDIO/PHY DT nodes with latest linux - replace deprecated
phy_id property with phy-handle.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Fabio Estevam [Fri, 12 Jul 2019 12:32:23 +0000 (09:32 -0300)]
mx6: clock: Introduce disable_ipu_clock()
Introduce disable_ipu_clock(). This is done in preparation for
configuring the NoC registers on i.MX6QP in SPL.
Afer the NoC registers are set the IPU clocks can be disabled.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Fabio Estevam [Fri, 12 Jul 2019 12:32:22 +0000 (09:32 -0300)]
mx6: clock: Use setbits_le32()
The code can be made simpler by using setbits_le32(), so switch
to it.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Simon Glass [Mon, 21 Oct 2019 03:37:57 +0000 (21:37 -0600)]
x86: Quieten TPL's jump_to_image_no_args()
We already a message indicating that U-Boot is about to jump to SPL, so
make this one a debug() to reduce code size.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 21 Oct 2019 03:37:56 +0000 (21:37 -0600)]
x86: Don't print CPU info in TPL
We don't need to do this and it is done (in more detail) in U-Boot proper.
Drop this to save code space.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 21 Oct 2019 03:37:55 +0000 (21:37 -0600)]
x86: Move CPU init to before spl_init()
At present we call spl_init() before identifying the CPU. This is not a
good idea - e.g. if bootstage is enabled then it will try to set up the
timer which works better if the CPU is identified.
Put explicit code at each entry pointer to identify the CPU.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 21 Oct 2019 03:37:54 +0000 (21:37 -0600)]
x86: Add a CPU init function for TPL
For TPL we only need to set up the features and identify the CPU to a
basic level. Add a function to handle that.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 21 Oct 2019 03:37:50 +0000 (21:37 -0600)]
x86: tpl: Add a fake PCI bus
In TPL we try to minimise code size so do not include the PCI subsystem.
We can use fixed BARs and drivers can directly program the devices that
they need.
However we do need to bind the devices on the PCI bus and without PCI this
does not ordinarily happen. As a work-around, define a fake PCI bus which
does this binding, but no other PCI operations. This is a convenient way
to ensure that we can use the same device tree for TPL, SPL and U-Boot
proper:
TPL - CONFIG_TPL_PCI is not set (no auto-config, fake PCI bus)
SPL - CONFIG_SPL_PCI is set (no auto-config but with real PCI bus)
U-Boot - CONFIG_PCI is set (full auto-config after relocation)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 21 Oct 2019 03:37:49 +0000 (21:37 -0600)]
x86: spl: Support init of a PUNIT
The x86 power unit handles power management. Support initing this device
which is modelled as a new type of system controller since there are no
operations needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 21 Oct 2019 03:37:47 +0000 (21:37 -0600)]
x86: timer: Use a separate flag for whether timer is inited
At present the value of the timer base is used to determine whether the
timer has been set up or not. It is true that the timer is essentially
never exactly 0 when it is read. However 'time 0' may indicate the time
that the machine was reset so it is useful to be able to denote that.
Update the code to use a separate flag instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Aiden Park <aiden.park@intel.com>
Reviewed-by: Aiden Park <aiden.park@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 21 Oct 2019 03:31:54 +0000 (21:31 -0600)]
x86: timer: Set up the timer in timer_early_get_count()
This function can be called before the timer is set up. Make sure that the
init function is called so that it works correctly.
This is needed so that bootstage can work correctly in TPL.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 21 Oct 2019 03:31:52 +0000 (21:31 -0600)]
spl: Add a size check for TPL
We have the ability to enforce a maximum size for SPL but not yet for TPL.
Add a new option for this.
Document the size check macro while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 21 Oct 2019 03:31:48 +0000 (21:31 -0600)]
dm: doc: Correct of-platdata driver name
Add a note about the driver name in the of-platdata documentation since
the naming must follow the compatible string.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 21 Oct 2019 03:31:47 +0000 (21:31 -0600)]
spi: Add support for memory-mapped flash
On x86 platforms the SPI flash can be mapped into memory so that the
contents can be read with normal memory accesses.
Add a new SPI method to find the location of the SPI flash in memory. This
differs from the existing device-tree "memory-map" mechanism in that the
location can be discovered at run-time.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 21 Oct 2019 03:31:45 +0000 (21:31 -0600)]
spl: Correct priority selection for image loaders
At present the name of the image comes first in the linker-list symbol
used. This means that the name of the function sets the sort order, which
is not the intention.
Update it to put the boot-device type first, then the priority. This
produces the expected behaviour.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 21 Oct 2019 03:31:37 +0000 (21:31 -0600)]
binman: Fix up comment in intel-fsp-m
This comment references the wrong FSP component. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 21 Oct 2019 03:31:36 +0000 (21:31 -0600)]
binman: Add support for Intel FSP-T
This entry is used to hold an Intel FSP-T (Firmware Support Package
Temp-RAM init) binary. Add support for this in binman.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
projects / oweals / u-boot.git / log