oweals/u-boot.git
8 years agofdt: x86: Tidy up a few COMPAT string definitions
Simon Glass [Sun, 19 Jun 2016 23:33:14 +0000 (17:33 -0600)]
fdt: x86: Tidy up a few COMPAT string definitions

The 'COMPAT_' part should appear only once so drop the duplicate part. It is
ignored anyway, but let's keep things consistent.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agofdt: Add a note to avoid adding new compatible strings
Simon Glass [Sun, 19 Jun 2016 23:33:13 +0000 (17:33 -0600)]
fdt: Add a note to avoid adding new compatible strings

The list is shrinking and we should avoid adding new things. Instead, a
proper driver should be created with driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agofdt: Drop unused exynos compatible strings
Simon Glass [Sun, 19 Jun 2016 23:33:12 +0000 (17:33 -0600)]
fdt: Drop unused exynos compatible strings

A few drivers have moved to driver model, so we can drop these strings.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
8 years agox86: fdt: Drop the unused compatible strings in fdtdec
Simon Glass [Sun, 19 Jun 2016 23:33:11 +0000 (17:33 -0600)]
x86: fdt: Drop the unused compatible strings in fdtdec

We have drivers for several more devices now, so drop the strings which are
no-longer used.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agocommon: block: fix compiler error with CONFIG_FASTBOOT_FLASH_MMC_DEV
Xu Ziyuan [Wed, 15 Jun 2016 08:56:18 +0000 (16:56 +0800)]
common: block: fix compiler error with CONFIG_FASTBOOT_FLASH_MMC_DEV

This fixes the following compiler error:

common/fb_mmc.c: In function ‘fb_mmc_erase’:
common/fb_mmc.c:209:17: error: ‘struct blk_desc’ has no member named
‘block_erase’

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
8 years agodm: gpio: MPC85XX GPIO platform data support
Hamish Martin [Mon, 13 Jun 2016 22:17:05 +0000 (10:17 +1200)]
dm: gpio: MPC85XX GPIO platform data support

Define a platform data structure for the MPC85XX GPIO driver to allow
use of the driver without device tree. Users should define the GPIO
blocks for their platform like this:
  struct mpc85xx_gpio_plat gpio_blocks[] = {
         {
                 .addr = 0x130000,
                 .ngpios = 32,
         },
         {
                 .addr = 0x131000,
                 .ngpios = 32,
         },
  };

  U_BOOT_DEVICES(my_platform_gpios) = {
         { "gpio_mpc85xx", &gpio_blocks[0] },
         { "gpio_mpc85xx", &gpio_blocks[1] },
  };

This is intended to build upon the recent submission of the base
MPC85XX driver from Mario Six. We need to use that new driver
without dts support and this patch gives us that flexibility.
This has been tested on a Freescale T2080 CPU, although only the first
GPIO block.

Signed-off-by: Hamish Martin <hamish.martin@alliedtelesis.co.nz>
Reviewed-by: Mario Six <mario.six@gdsys.cc>
Tested-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Simon Glass <sjg@chromium.org>
8 years agodm: dfu: mmc: Support CONFIG_BLK in DFU for MMC
Simon Glass [Mon, 13 Jun 2016 05:30:33 +0000 (23:30 -0600)]
dm: dfu: mmc: Support CONFIG_BLK in DFU for MMC

Update the method of accessing the block device so that it works with
CONFIG_BLK enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agodm: spl: mmc: Support CONFIG_BLK in SPL MMC
Simon Glass [Mon, 13 Jun 2016 05:30:32 +0000 (23:30 -0600)]
dm: spl: mmc: Support CONFIG_BLK in SPL MMC

Update the method of accessing the block device so that it works with
CONFIG_BLK enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agodm: mmc: msmsdhic: Drop old MMC code
Simon Glass [Mon, 13 Jun 2016 05:30:31 +0000 (23:30 -0600)]
dm: mmc: msmsdhic: Drop old MMC code

Now that we have fully moved to driver model, drop the old code.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agodm: mmc: Move dragonboard410c to use CONFIG_BLK and CONFIG_DM_MMC_OPS
Simon Glass [Mon, 13 Jun 2016 05:30:30 +0000 (23:30 -0600)]
dm: mmc: Move dragonboard410c to use CONFIG_BLK and CONFIG_DM_MMC_OPS

Update this board to use driver model for block devices and MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agodm: mmc: msm_sdhci: Support CONFIG_BLK and CONFIG_DM_MMC_OPS
Simon Glass [Mon, 13 Jun 2016 05:30:29 +0000 (23:30 -0600)]
dm: mmc: msm_sdhci: Support CONFIG_BLK and CONFIG_DM_MMC_OPS

Add support for using driver model for block devices and MMC operations in
this driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agodm: mmc: sdhci: Support CONFIG_BLK and CONFIG_DM_MMC_OPS
Simon Glass [Mon, 13 Jun 2016 05:30:28 +0000 (23:30 -0600)]
dm: mmc: sdhci: Support CONFIG_BLK and CONFIG_DM_MMC_OPS

Add support for using driver model for block devices and MMC operations in
this driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agodm: mmc: sdhci: Refactor configuration setup to support DM
Simon Glass [Mon, 13 Jun 2016 05:30:27 +0000 (23:30 -0600)]
dm: mmc: sdhci: Refactor configuration setup to support DM

Move the configuration setting into a separate function which can be used by
the driver-model code.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agodm: sandbox: Convert to use CONFIG_CMD_MMC_OPS
Simon Glass [Mon, 13 Jun 2016 05:30:26 +0000 (23:30 -0600)]
dm: sandbox: Convert to use CONFIG_CMD_MMC_OPS

Update the sandbox MMC emulation to use driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agorockchip: Add MAINTAINER files for kylin_rk3036, evb_rk3036
Simon Glass [Mon, 13 Jun 2016 05:30:25 +0000 (23:30 -0600)]
rockchip: Add MAINTAINER files for kylin_rk3036, evb_rk3036

These boards should have maintainer entries. Add them.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agodm: mmc: rockchip: Enable CONFIG_DM_MMC_OPS for all boards
Simon Glass [Mon, 13 Jun 2016 05:30:24 +0000 (23:30 -0600)]
dm: mmc: rockchip: Enable CONFIG_DM_MMC_OPS for all boards

Enable this option to move rockchip over to use driver model for MMC
operations.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agodm: mmc: dwmmc: Support CONFIG_DM_MMC_OPS
Simon Glass [Mon, 13 Jun 2016 05:30:23 +0000 (23:30 -0600)]
dm: mmc: dwmmc: Support CONFIG_DM_MMC_OPS

Add support to dwmmc for using driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agodm: mmc: Add a way to use driver model for MMC operations
Simon Glass [Mon, 13 Jun 2016 05:30:22 +0000 (23:30 -0600)]
dm: mmc: Add a way to use driver model for MMC operations

The driver model conversion for MMC has moved in small steps. The first step
was to have an MMC device (CONFIG_DM_MMC). The second was to use a child
block device (CONFIG_BLK). The final one is to use driver model for MMC
operations (CONFIG_DM_MMC_OP). Add support for this.

The immediate priority is to make all boards that use DM_MMC also use those
other two options. This will allow them to be removed.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agorockchip: Disable CONFIG_SDHCI
Simon Glass [Mon, 13 Jun 2016 05:30:21 +0000 (23:30 -0600)]
rockchip: Disable CONFIG_SDHCI

This option is not actually needed for rockchip boards. Drop it, since it
will not support driver-model MMC operation support.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agommc: Move tracing code into separate functions
Simon Glass [Mon, 13 Jun 2016 05:30:20 +0000 (23:30 -0600)]
mmc: Move tracing code into separate functions

Move this code into separate functions so that it can be used from the uclass
also. Add static inline versions for when the option is disabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agodm: mmc: rockchip: Support only CONFIG_BLK
Simon Glass [Mon, 13 Jun 2016 05:30:19 +0000 (23:30 -0600)]
dm: mmc: rockchip: Support only CONFIG_BLK

Since all Rockchip boards use CONFIG_BLK, we can remove this old code.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agommc: Move MMC boot code into its own file
Simon Glass [Mon, 13 Jun 2016 05:30:18 +0000 (23:30 -0600)]
mmc: Move MMC boot code into its own file

Rather than having an #ifdef in the main mmc.c file, control this feature
from the Makefile by moving the code into its own file.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agodm: mmc: Move non-CONFIG_BLK code into mmc_legacy.c
Simon Glass [Mon, 13 Jun 2016 05:30:17 +0000 (23:30 -0600)]
dm: mmc: Move non-CONFIG_BLK code into mmc_legacy.c

Rather than having #ifdef in mmc.c, move this code into the legacy file.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agodm: mmc: Move CONFIG_BLK code into the mmc uclass
Simon Glass [Mon, 13 Jun 2016 05:30:16 +0000 (23:30 -0600)]
dm: mmc: Move CONFIG_BLK code into the mmc uclass

Rather than having #ifdef in mmc.c, move this code into the uclass file.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agommc: Add function declarations for mmc_bread() and mmc_switch_part()
Simon Glass [Mon, 13 Jun 2016 05:30:15 +0000 (23:30 -0600)]
mmc: Add function declarations for mmc_bread() and mmc_switch_part()

These private functions are used both in the driver-model implementation and
in the legacy code. Add them to the header.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agorockchip: Use 'select' instead of defaults in Kconfig
Simon Glass [Mon, 13 Jun 2016 05:30:14 +0000 (23:30 -0600)]
rockchip: Use 'select' instead of defaults in Kconfig

Rockchip uses driver model for all subsystems. Specify this in the arm
Kconfig rather than as defaults in the Rockchip Kconfig. This means that
boards cannot turn these options off, which seems correct.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agodm: mmc: dwmmc: Add comments to the dwmmc setup functions
Simon Glass [Mon, 13 Jun 2016 05:30:13 +0000 (23:30 -0600)]
dm: mmc: dwmmc: Add comments to the dwmmc setup functions

These comments were missed when the original code was written. Add them to
help people port their drivers over.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agoPrepare v2016.07 v2016.07
Tom Rini [Mon, 11 Jul 2016 19:01:01 +0000 (15:01 -0400)]
Prepare v2016.07

Signed-off-by: Tom Rini <trini@konsulko.com>
8 years agodoc: ARMv8: add README.pine64
Andre Przywara [Fri, 8 Jul 2016 14:25:23 +0000 (15:25 +0100)]
doc: ARMv8: add README.pine64

Since we lack information about the DRAM initialization for the
Allwinner A64 SoC, booting any A64 based board like the Pine64 is a bit
involved at the moment.
Add a README file to explain the process.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Move to board/sunxi/ from doc/]
Signed-off-by: Tom Rini <trini@konsulko.com>
8 years agomkimage -l is broken for images after gpimage
Stefano Babic [Mon, 11 Jul 2016 14:09:48 +0000 (16:09 +0200)]
mkimage -l is broken for images after gpimage

Because a gpimage cannot be detected, a false
GP header is printed instead of checking
for further image types.

Move gpimage as last to be linked, letting check
all other image types and printing a GP header just
in case no image is detected.

Signed-off-by: Stefano Babic <sbabic@denx.de>
8 years agogit-mailrc: add rockchip alias
jk.kernel@gmail.com [Sat, 9 Jul 2016 13:12:04 +0000 (21:12 +0800)]
git-mailrc: add rockchip alias

It's easier to Cc rockchip maintainers on rockchip-releated patches.

Signed-off-by: jk <jk.kernel@gmail.com>
8 years agoarmv8: Enable CPUECTLR.SMPEN for coherency
Mingkai Hu [Thu, 7 Jul 2016 04:22:12 +0000 (12:22 +0800)]
armv8: Enable CPUECTLR.SMPEN for coherency

For A53, data coherency is enabled only when the CPUECTLR.SMPEN bit is
set. The SMPEN bit should be set before enabling the data cache.
If not enabled, the cache is not coherent with other cores and
data corruption could occur.

For A57/A72, SMPEN bit enables the processor to receive instruction
cache and TLB maintenance operations broadcast from other processors
in the cluster. This bit should be set before enabling the caches and
MMU, or performing any cache and TLB maintenance operations.

Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agotest/py: support 'memstart =' in u_boot_utils.find_ram_base()
Daniel Schwierzeck [Wed, 6 Jul 2016 10:44:22 +0000 (12:44 +0200)]
test/py: support 'memstart =' in u_boot_utils.find_ram_base()

Some archs like MIPS or PPC have a different 'bdinfo' output
than ARM regarding the memory configuration. Also support
'memstart = 0x*' in u_boot_utils.find_ram_base() to make
all tests requiring the RAM base working on those archs.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
8 years agotest/py: strip VT100 codes from match buffer
Stephen Warren [Wed, 6 Jul 2016 16:34:30 +0000 (10:34 -0600)]
test/py: strip VT100 codes from match buffer

Prior to this patch, any VT100 codes emitted by U-Boot are considered part
of a command's output, which often causes tests to fail. For example,
test_env_echo_exists executes printenv, and then considers any text on a
line before an = sign as a valid U-Boot environment variable name. This
includes any VT100 codes emitted. When the test later attempts to use that
variable, the name would be invalid since it includes the VT100 codes.
Solve this by stripping VT100 codes from the match buffer, so they are
never seen by higher level test code.

The codes are still logged unmodified, so that users can expect U-Boot's
exact output without interference. This does clutter the log file a bit.
However, it allows users to see exactly what U-Boot emitted rather than a
modified version, which hopefully is better for debugging. It's also much
simpler to implement, since logging happens as soon as text is received,
and so stripping the VT100 codes from the log would require handling
reception and stripping of partial VT100 codes.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
8 years agoarm: Fix setjmp (again)
Alexander Graf [Tue, 5 Jul 2016 18:37:17 +0000 (20:37 +0200)]
arm: Fix setjmp (again)

Commit e677724 (arm: Fix setjmp) added code to fix compilation of the setjmp
code path with thumv1. Unfortunately it missed a constraint that the adr
instruction can only refer to 4 byte aligned offsets.

So this patch adds the required alignment hooks to make compilation
work again even when setjmp doesn't happen to be 4 byte aligned.

Signed-off-by: Alexander Graf <agraf@suse.de>
Tested-by: Tom Rini <trini@konsulko.com>
8 years agoSPL: tiny-printf: avoid any BSS usage
Andre Przywara [Fri, 8 Jul 2016 14:18:35 +0000 (15:18 +0100)]
SPL: tiny-printf: avoid any BSS usage

As printf calls may be executed quite early, we should avoid using any
BSS stored variables, since some boards put BSS in DRAM, which may not
have been initialised yet.
Explicitly mark those "static global" variables as belonging to the
.data section, to keep tiny-printf clear of any BSS usage.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
8 years agotest/py: fix CONFIG_ tests
Stephen Warren [Wed, 6 Jul 2016 15:04:08 +0000 (09:04 -0600)]
test/py: fix CONFIG_ tests

Some CONFIG_ variables were recently renamed, but test/py wasn't updated
to match. This causes some tests to be skipped. Fix test/py so the tests
are run.

Fixes: 11636258981a ("Rename reset to sysreset")
Fixes: f1f9d4fac527 ("hush: complete renaming CONFIG_SYS_HUSH_PARSER to CONFIG_HUSH_PARSER")
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
8 years agommc: msm_sdhci: Set mmc->dev pointer in msm_sdc_probe()
Mateusz Kulikowski [Sun, 26 Jun 2016 20:43:55 +0000 (22:43 +0200)]
mmc: msm_sdhci: Set mmc->dev pointer in msm_sdc_probe()

MMC core expects (now) valid mmc->dev pointer.
During conversion in commit cffe5d86 not every driver was updated.

This patch fixes crash while accessing MMC on
boards using Qualcomm SDHCI controller.

Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
8 years agoMerge branch 'master' of git://git.denx.de/u-boot-usb
Tom Rini [Thu, 7 Jul 2016 13:58:41 +0000 (09:58 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-usb

8 years agopowerpc: mpc85xx: kmp204x: Fix compiling error for usb errata
York Sun [Wed, 6 Jul 2016 23:39:51 +0000 (16:39 -0700)]
powerpc: mpc85xx: kmp204x: Fix compiling error for usb errata

Commit 9262367 moves USB errata workaround into a C file. This
causes compiling error for kmcoge4 and kmlion1. To enable the
errata workaround, define CONFIG_USB_EHCI_FSL in common header.

Signed-off-by: York Sun <york.sun@nxp.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Ed Swarthout <Ed.Swarthout@nxp.com>
Cc: Sriram Dash <sriram.dash@nxp.com>
Fixes: 92623672f9d3 ("fsl: usb: make errata function common for PPC and ARM")

8 years agoMerge branch 'master' of git://git.denx.de/u-boot-tegra
Tom Rini [Wed, 6 Jul 2016 19:55:36 +0000 (15:55 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-tegra

8 years agoMerge branch 'master' of git://git.denx.de/u-boot-net
Tom Rini [Wed, 6 Jul 2016 19:55:21 +0000 (15:55 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-net

8 years agonet: rtl8169: Fix return value for rtl_send_common
Oleksandr Tymoshenko [Fri, 1 Jul 2016 20:22:00 +0000 (13:22 -0700)]
net: rtl8169: Fix return value for rtl_send_common

Return value of rtl_send_common propogates unmodified all the way
up to eth_send and further to API consumer if CONFIG_API is enabled.
Previously rtl_send_common returned number of bytes sent on success
which was erroneouly detected as error condition by API consumers
that checked for operation success by comparing return value with 0.

Switch rtl_send_common to use common convention: return 0 on success
and negative value for failure.

Cc: Stephen Warren <swarren@nvidia.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Oleksandr Tymoshenko <gonzo@bluezbox.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
8 years agonet: Fix incorrect RPC packets on 64-bit systems
Ralf Hubert [Fri, 1 Jul 2016 11:19:51 +0000 (13:19 +0200)]
net: Fix incorrect RPC packets on 64-bit systems

This patch fixes incorrect RPC packet layout caused by
'long' type size difference on 64 and 32-bit architectures.

Signed-off-by: Ralf Hubert <r.hubert@technisat.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
8 years agodriver: net: phylib: add support for aquantia AQR106/107 PHY
Mingkai Hu [Fri, 1 Jul 2016 11:03:23 +0000 (19:03 +0800)]
driver: net: phylib: add support for aquantia AQR106/107 PHY

This patch adds support for aquantia AQR106/107 PHY.

Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
8 years agonet: designware: Make driver independent from DM_GPIO again
Alexey Brodkin [Mon, 27 Jun 2016 10:17:51 +0000 (13:17 +0300)]
net: designware: Make driver independent from DM_GPIO again

Commit 90b7fc924adf "net: designware: support phy reset device-tree
bindings" made DW GMAC driver dependent on DM_GPIO by unconditional
usage of purely DM_GPIO stuff like:
 * dm_gpio_XXX()
 * gpio_request_by_name()

But since that driver as of today might be easily used without
DM_GPIO (that's the case for Synopsys AXS10x boards) we're
shielding all DM_GPIO things by ifdefs.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Beniamino Galvani <b.galvani@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Cc: Sonic Zhang <sonic.zhang@analog.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
8 years agocommon: Always include errno.h in common.h
Joe Hershberger [Mon, 4 Apr 2016 09:07:33 +0000 (04:07 -0500)]
common: Always include errno.h in common.h

We want people using errnos for errors instead of -1, so make it easy
by always including the definition of all the errnos.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agofdt: Drop some unused compatible strings
Simon Glass [Sun, 8 May 2016 22:55:22 +0000 (16:55 -0600)]
fdt: Drop some unused compatible strings

We have driver-model drivers for some of these now, so drop them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
8 years agotegra: video: Always use write-through cache on LCD
Simon Glass [Sun, 8 May 2016 22:55:21 +0000 (16:55 -0600)]
tegra: video: Always use write-through cache on LCD

This seems to give the best performance, so let's use it always.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
8 years agovideo: tegra: Move to using simple-panel and pwm-backlight
Simon Glass [Sun, 8 May 2016 22:55:20 +0000 (16:55 -0600)]
video: tegra: Move to using simple-panel and pwm-backlight

We have standard drivers for panels and backlights which can do most of the
work for us. Move the tegra20 LCD driver over to use those instead of custom
code.

This patch includes device tree changes for the nvidia boards. I have only
been able to test seaboard. If this patch is applied, these boards will
also need to be synced with the kernel, and updated to use display-timings:

   - colibri
   - medcom-wide
   - paz00
   - tec

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
8 years agotegra: dts: Sync tegra20 device tree files with Linux
Simon Glass [Sun, 8 May 2016 22:55:19 +0000 (16:55 -0600)]
tegra: dts: Sync tegra20 device tree files with Linux

Sync everything except the display panel, which will come in a future patch.
One USB port is left disabled since we don't want to support it in U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
8 years agoerrno: Allow errno_str() to be used without CONFIG_ERRNO_STR
Simon Glass [Sun, 8 May 2016 22:55:18 +0000 (16:55 -0600)]
errno: Allow errno_str() to be used without CONFIG_ERRNO_STR

The pmic framework uses errno_str() and this requires board that use it to
enable CONFIG_ERRNO_STR to avoid a build error. Update the header to provide
a NULL error message when CONFIG_ERRNO_STR is not defined, and fix the build
error.

This will show as "(null)" when U-Boot prints it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
8 years agoerrno: Add copyright header and header guard
Simon Glass [Sun, 8 May 2016 22:55:17 +0000 (16:55 -0600)]
errno: Add copyright header and header guard

Bring in a copyright for this file from cmd/pmic.c since this file was
submitted by the same author at around the same time. Also fix the missing
header guard.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
8 years agopci: tegra: actually program REFCLK_CFG* on recent SoCs
Stephen Warren [Fri, 24 Jun 2016 14:36:04 +0000 (08:36 -0600)]
pci: tegra: actually program REFCLK_CFG* on recent SoCs

On recent SoCs, tegra_pcie_phy_enable() isn't called; but instead
tegra_pcie_enable_controller() calls tegra_xusb_phy_enable(). However,
part of tegra_pcie_phy_enable() needs to happen in all cases. Move that
code to tegra_pcie_port_enable() instead.

For reference, NVIDIA's downstream Linux kernel performs this operation
in tegra_pcie_enable_rp_features(), which is called immediately after
tegra_pcie_port_enable(). Since that function doesn't exist in the U-Boot
driver, we'll just add it to the tail of tegra_pcie_port_enable() instead.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
8 years agopci: tegra: correctly program PADS_REFCLK registers
Stephen Warren [Tue, 21 Jun 2016 18:47:51 +0000 (12:47 -0600)]
pci: tegra: correctly program PADS_REFCLK registers

The value that should be programmed into the PADS_REFCLK register varies
per SoC. Fix the Tegra PCIe driver to program the correct values. Future
SoCs will require different values in cfg0/1, so the two values are stored
separately in the per-SoC data structures.

For reference, the values are all documented in NV bug 1771116 comment 20.
The Tegra210 value doesn't match the current TRM, but I've filed a bug to
get the TRM fixed. Earlier TRMs don't document the value this register
should contain, but the ASIC team has validated all these values, except
for the Tegra20 value which is simply left unchanged in this patch.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
8 years agorockchip: video: Lower hpd wait time
Sjoerd Simons [Sun, 28 Feb 2016 21:40:02 +0000 (22:40 +0100)]
rockchip: video: Lower hpd wait time

Waiting 30 seconds for the hpd to go high seems a bit much, especially
on headless boots. Lowering the timeout to 300ms.

Sending as RFC because frankly i don't know what a sensible timeout is
here, but 30 seconds is clearly not it :)

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Dropped RFC tag:
Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agopowerpc: mpc85xx: Do not build errata command in SPL
Marek Vasut [Tue, 5 Jul 2016 15:40:27 +0000 (17:40 +0200)]
powerpc: mpc85xx: Do not build errata command in SPL

The errata command is useless in SPL, so don't build it. This fixes
multiple build failures on PowerPC.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: York Sun <york.sun@nxp.com>
Fixes: 92623672f9d3 ("fsl: usb: make errata function common for PPC and ARM")

8 years agousb: dm: Make "usb info" use usb_for_each_root_dev()
Hans de Goede [Sun, 3 Jul 2016 18:22:05 +0000 (20:22 +0200)]
usb: dm: Make "usb info" use usb_for_each_root_dev()

The old dm "usb info" implementation has several issues:

1) NULL pointer deref when a bus has no children
2) Not showing usb devices on busses without an emulated root-hub (otg host)
3) Attempting to show devices on inactive busses
4) "usb info" Would cause some hosts to get re-probed something which only
   "usb reset" should do

TL;DR: proper iterating over usb bus root devs is hard, use the helper
for it.

Reported-by: Bernhard Nortmann <bernhard.nortmann@web.de>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
8 years agousb: dm: Add a usb_for_each_root_dev() helper function
Hans de Goede [Sun, 3 Jul 2016 18:22:04 +0000 (20:22 +0200)]
usb: dm: Add a usb_for_each_root_dev() helper function

Iterating over usb-root devs and doing something for all of them is
a bit tricky with dm, factor out the proven usb_show_tree() for this
into a helper function.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
8 years agoMerge git://git.denx.de/u-boot-arc
Tom Rini [Mon, 4 Jul 2016 15:46:21 +0000 (11:46 -0400)]
Merge git://git.denx.de/u-boot-arc

8 years agoarc: make global_data.h usable in assembly files
Alexey Brodkin [Mon, 4 Jul 2016 08:37:55 +0000 (11:37 +0300)]
arc: make global_data.h usable in assembly files

Currently on attempt to use global_data.h in an assembly file following
will happen:
-------------------->8-----------------
./arch/arc/include/asm/global_data.h: Assembler messages:
./arch/arc/include/asm/global_data.h:11: Error: bad instruction 'struct arch_global_data{'
./arch/arc/include/asm/global_data.h:12: Error: junk at end of line, first unrecognized character is `}'
scripts/Makefile.build:316: recipe for target 'arch/arc/lib/start.o' failed
-------------------->8-----------------

In this change we disable struct arch_global_data in ASM which fixes
the issue above.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
8 years agoarc: Use "-mcpu=archs" instead of deprecated "-marchs" for ARC HS
Alexey Brodkin [Thu, 16 Jun 2016 08:55:00 +0000 (10:55 +0200)]
arc: Use "-mcpu=archs" instead of deprecated "-marchs" for ARC HS

Newer ARC toolchains don't support "-marchs" option any longer.
Instead "-mcpu=archs" should be used. What's also important older
toiolchains that support ARC HS cores will also happily accept
"-mcpu=archs" so that's a very safe move.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
8 years agoMerge branch 'master' of http://git.denx.de/u-boot-sunxi
Tom Rini [Sat, 2 Jul 2016 20:32:15 +0000 (16:32 -0400)]
Merge branch 'master' of git.denx.de/u-boot-sunxi

8 years agosunxi: Add defconfig and DTS file for Allwinner R16 EVB (Parrot)
Quentin Schulz [Fri, 24 Jun 2016 12:33:35 +0000 (14:33 +0200)]
sunxi: Add defconfig and DTS file for Allwinner R16 EVB (Parrot)

The Parrot Board is an evaluation board with an Allwinner R16 (assumed
to be close to an Allwinner A33), 4GB of eMMC, 512MB of RAM, USB host
and OTG, a WiFi/Bluetooth combo chip, a micro SD Card reader, 2
controllable buttons, an LVDS port with separated backlight and
capacitive touch panel ports, an audio/microphone jack, a camera CSI
port, 2 sets of 22 GPIOs and an accelerometer.

The DTS file is identical to the one submitted to the upstream kernel.

Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
8 years agosunxi: Add missing boot_media fields in the SPL header
Olliver Schinagl [Mon, 13 Jun 2016 16:13:07 +0000 (18:13 +0200)]
sunxi: Add missing boot_media fields in the SPL header

Commit b19236fd1 ("sunxi: Increase SPL header size to 64 bytes to avoid
code corruption") Added defines for MMC0 and SPI as boot identification.
After verifying on an OLinuXino Lime2 with NAND and eMMC, the expected
values have been confirmed and added to spl.h

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
8 years agosunxi: spl: Fix DRAM info printing
Hans de Goede [Sun, 26 Jun 2016 11:56:01 +0000 (13:56 +0200)]
sunxi: spl: Fix DRAM info printing

The switch to simple_printf was causing the SPL dram info to show as:

DRAM: u MiB

This fixes this by switching from %lu to %d for printing the DRAM size.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
8 years agoMerge branch 'master' of git://git.denx.de/u-boot-usb
Tom Rini [Sat, 2 Jul 2016 02:35:20 +0000 (22:35 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-usb

8 years agoMerge branch 'master' of git://git.denx.de/u-boot-socfpga
Tom Rini [Sat, 2 Jul 2016 02:35:12 +0000 (22:35 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-socfpga

8 years agoPrepare v2016.07-rc3 v2016.07-rc3
Tom Rini [Fri, 1 Jul 2016 21:37:17 +0000 (17:37 -0400)]
Prepare v2016.07-rc3

Signed-off-by: Tom Rini <trini@konsulko.com>
8 years agoMerge branch 'master' of git://git.denx.de/u-boot-uniphier
Tom Rini [Fri, 1 Jul 2016 21:43:06 +0000 (17:43 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-uniphier

8 years agommc: increase MMC SDHCI read status timeout
Steve Rae [Wed, 29 Jun 2016 20:42:01 +0000 (13:42 -0700)]
mmc: increase MMC SDHCI read status timeout

Otherwise,  ocassionally see errors like this:
  Flashing sparse image at offset 2078720
  Flashing Sparse Image
  sdhci_send_command: Timeout for status update!
  mmc fail to send stop cmd
  write_sparse_image: Write failed, block #2181088 [0]

This does not affect the actual writing speed, which is controlled by
the default value:
  CONFIG_SDHCI_CMD_DEFAULT_TIMEOUT

It only increases the retries when reading:
  SDHCI_INT_STATUS
to avoid the timeout error.

Signed-off-by: Steve Rae <steve.rae@raedomain.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
8 years agoti_omap5_common: Find right dtb file for DRA72-RevC Evm
Lokesh Vutla [Wed, 29 Jun 2016 09:20:41 +0000 (14:50 +0530)]
ti_omap5_common: Find right dtb file for DRA72-RevC Evm

DRA72-Evm revC uses dra72-evm-revc.dtb. Update the same in env vatiables.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
8 years agoautoboot: move bootdelay >= 0 check to abortboot()
Masahiro Yamada [Mon, 27 Jun 2016 07:23:04 +0000 (16:23 +0900)]
autoboot: move bootdelay >= 0 check to abortboot()

Move the bootdelay >= 0 check to the caller, which simplifies
the callees.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
8 years agoautoboot: move CONFIG_SILENT_CONSOLE handling
Masahiro Yamada [Mon, 27 Jun 2016 07:23:03 +0000 (16:23 +0900)]
autoboot: move CONFIG_SILENT_CONSOLE handling

Factor out the same code from the callees to the caller.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
8 years agoautoboot: rename abortboot_{keyed, normal} to __abortboot
Masahiro Yamada [Mon, 27 Jun 2016 07:23:02 +0000 (16:23 +0900)]
autoboot: rename abortboot_{keyed, normal} to __abortboot

Because abortboot_keyed() and abortboot_normal() are not compiled
at the same time, we can rename both of them to __abortboot().
This allows to drop #ifdef from the caller.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
8 years agoautoboot: remove CONFIG_ZERO_BOOTDELAY_CHECK
Masahiro Yamada [Mon, 27 Jun 2016 07:23:01 +0000 (16:23 +0900)]
autoboot: remove CONFIG_ZERO_BOOTDELAY_CHECK

As the help message of CONFIG_BOOTDELAY says, CONFIG_BOOTDELAY=-2
means the autoboot with no delay, with no abort check even if
CONFIG_ZERO_BOOTDELAY_CHECK is defined.

To sum up, the autoboot behaves as follows:

 [1] CONFIG_BOOTDELAY=0 && CONFIG_ZERO_BOOTDELAY_CHECK=y
    autoboot with no delay, but you can abort it by key input

 [2] CONFIG_BOOTDELAY=0 && CONFIG_ZERO_BOOTDELAY_CHECK=n
    autoboot with no delay, with no check for abort

 [3] CONFIG_BOOTDELAY=-1
    disable autoboot

 [4] CONFIG_BOOTDELAY=-2
    autoboot with no delay, with no check for abort

As you notice, [2] and [4] come to the same result, which means we
do not need CONFIG_ZERO_BOOTDELAY_CHECK.  We can control all the
cases only by CONFIG_BOOTDELAY, like this:

 [1] CONFIG_BOOTDELAY=0
    autoboot with no delay, but you can abort it by key input

 [2] CONFIG_BOOTDELAY=-1
    disable autoboot

 [3] CONFIG_BOOTDELAY=-2
    autoboot with no delay, with no check for abort

This commit converts the logic as follow:
  CONFIG_BOOTDELAY=0 && CONFIG_ZERO_BOOTDELAY_CHECK=n
    --> CONFIG_BOOTDELAY=-2

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Vladimir Zapolskiy <vz@mleia.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Acked-by: Christian Riesch <christian.riesch@omicronenergy.com>
Acked-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
8 years agodoc: bootdelay: drop explanation about CONFIG_BOOTDELAY from README
Masahiro Yamada [Mon, 27 Jun 2016 07:23:00 +0000 (16:23 +0900)]
doc: bootdelay: drop explanation about CONFIG_BOOTDELAY from README

The same information now exists in common/Kconfig.  Do not duplicate
documentation from the point of view of maintainability.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
8 years agoARM: socfpga: move CONFIG_BOOTDELAY to Kconfig for IS1 board
Masahiro Yamada [Mon, 27 Jun 2016 07:22:59 +0000 (16:22 +0900)]
ARM: socfpga: move CONFIG_BOOTDELAY to Kconfig for IS1 board

This recently added board missed the tree-wide migration of
CONFIG_BOOTDELAY.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Pavel Machek <pavel@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
8 years agoARM: AM437x: Align HS device variant defconfig filename
Andreas Dannenberg [Wed, 22 Jun 2016 22:10:26 +0000 (17:10 -0500)]
ARM: AM437x: Align HS device variant defconfig filename

Align the name of the defconfig file for high-security (HS) device variants
from the AM43xx family of SoCs with the corresponding name used for the
general purpose devices. This allows for easier cross-association of those
files and also provides room to grow from an HS device part number
perspective.

Furthermore, update and cleanup associated MAINTAINERS file.

Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Madan Srinivas <madans@ti.com>
8 years agodriver: qspi: correct QSPI disable CS reset value
Praneeth Bajjuri [Tue, 21 Jun 2016 08:35:36 +0000 (14:05 +0530)]
driver: qspi: correct QSPI disable CS reset value

Correcting QSPI disable/unselect CS reset value.
CTRL_CORE_CONTROL_IO_2: QSPI_MEMMAPPED_CS[10:8]

This is not causing any issue, but its better
to untouch the reserved bits.

Praneeth Bajjuri <praneeth@ti.com>
Signed-off-by: Ravi Babu <ravibabu@ti.com>
8 years agoARM: uniphier: add external IRQ setup code
Masahiro Yamada [Wed, 29 Jun 2016 10:39:03 +0000 (19:39 +0900)]
ARM: uniphier: add external IRQ setup code

I will carry this work-around until it is cared in the kernel.
This looks up the AIDET node and sets up a register to handle
active low interrupt signals.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agoARM: dts: uniphier: add AIDET nodes
Masahiro Yamada [Wed, 29 Jun 2016 10:39:02 +0000 (19:39 +0900)]
ARM: dts: uniphier: add AIDET nodes

The AIDET (ARM Interrupt Detector Add-on Circuit) is a kind of
syscon block related with the interrupt controller.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agopinctrl: uniphier: add Ethernet pin-mux settings
Masahiro Yamada [Wed, 29 Jun 2016 10:39:01 +0000 (19:39 +0900)]
pinctrl: uniphier: add Ethernet pin-mux settings

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agopinctrl: uniphier: avoid building unneeded pin-mux tables for SPL
Masahiro Yamada [Wed, 29 Jun 2016 10:39:00 +0000 (19:39 +0900)]
pinctrl: uniphier: avoid building unneeded pin-mux tables for SPL

SPL does not use all of the devices, so we can save some memory
footprint.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agopinctrl: uniphier: support pin configuration for dedicated pins
Masahiro Yamada [Wed, 29 Jun 2016 10:38:59 +0000 (19:38 +0900)]
pinctrl: uniphier: support pin configuration for dedicated pins

PH1-LD4 and PH1-sLD8 SoCs have pins that support pin configuration
(pin biasing, drive strength control), but not pin-muxing.

Allow to fill the mux value table with -1 for those pins; pins with
mux value -1 will be skipped in the pin-mux set function.  The mux
value type should be changed from "unsigned" to "int" in order to
accommodate -1 as a special case.

[ Linux commit: 363c90e743b50a432a91a211dd8b078d9df446e9 ]

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agopinctrl: uniphier: split pinctrl driver for PH1-LD11 and PH1-LD20
Masahiro Yamada [Wed, 29 Jun 2016 10:38:58 +0000 (19:38 +0900)]
pinctrl: uniphier: split pinctrl driver for PH1-LD11 and PH1-LD20

PH1-LD11 and PH1-LD20 have much pin controlling in common, so I
added a single driver shared between them in the initial commit.

However, the Ethernet pin-mux settings I am going to add are
different with each other, and they may diverge more as the
progress of development.  Split it into two dedicated drivers.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agopinctrl: uniphier: allow to have pinctrl node under syscon node
Masahiro Yamada [Wed, 29 Jun 2016 10:38:57 +0000 (19:38 +0900)]
pinctrl: uniphier: allow to have pinctrl node under syscon node

Currently, the UniPhier pinctrl driver itself is a syscon, but it
turned out much more reasonable to make it a child node of a syscon
because our syscon node consists of a bunch of system configuration
registers, not only pinctrl, but also phy, and misc registers.
It is difficult to split the node.  This commit allows to migrate to
the new DT structure.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agoARM: dts: uniphier: sync Device Trees with upstream Linux
Masahiro Yamada [Wed, 29 Jun 2016 10:38:56 +0000 (19:38 +0900)]
ARM: dts: uniphier: sync Device Trees with upstream Linux

I periodically sync Device Trees for better maintainability.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agopinctrl: uniphier: remove unneeded pin group nand_cs1
Masahiro Yamada [Wed, 29 Jun 2016 10:38:55 +0000 (19:38 +0900)]
pinctrl: uniphier: remove unneeded pin group nand_cs1

This SoC does not support NAND CS1.  This place-holder is no longer
necessary.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agopinctrl: uniphier: fix NAND pin-mux setting for PH1-LD11/LD20
Masahiro Yamada [Wed, 29 Jun 2016 10:38:54 +0000 (19:38 +0900)]
pinctrl: uniphier: fix NAND pin-mux setting for PH1-LD11/LD20

My mistake in the initial support patch.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agopinctrl: uniphier: remove wrong pin-mux functions for ProXstream2
Masahiro Yamada [Wed, 29 Jun 2016 10:38:53 +0000 (19:38 +0900)]
pinctrl: uniphier: remove wrong pin-mux functions for ProXstream2

These are pin group names, not function names.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agoARM: uniphier: fix typo "talbe"
Masahiro Yamada [Fri, 24 Jun 2016 02:51:38 +0000 (11:51 +0900)]
ARM: uniphier: fix typo "talbe"

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agox86: coreboot: Remove the dummy pch driver
Bin Meng [Wed, 22 Jun 2016 09:30:03 +0000 (02:30 -0700)]
x86: coreboot: Remove the dummy pch driver

There is a dummy pch driver in the coreboot directory. This causes
drivers of its children fail to function due to empty ops. Remove
the whole file since it is no longer needed.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agoMerge git://git.denx.de/u-boot-fsl-qoriq
Tom Rini [Tue, 28 Jun 2016 19:59:05 +0000 (15:59 -0400)]
Merge git://git.denx.de/u-boot-fsl-qoriq

8 years agoconfigs: Re-sync after boot menu changes
Tom Rini [Tue, 28 Jun 2016 02:40:17 +0000 (22:40 -0400)]
configs: Re-sync after boot menu changes

Signed-off-by: Tom Rini <trini@konsulko.com>
8 years agoarmv8: dts: fsl: Remove cpu nodes from Layerscape DTSIs
Abhimanyu Saini [Tue, 14 Jun 2016 07:48:31 +0000 (13:18 +0530)]
armv8: dts: fsl: Remove cpu nodes from Layerscape DTSIs

Currently layescape SoCs are not using cpu nodes. So removing
them in favour of compatibly with  similar SoCs that
have different cores like LS2080A and LS2088A.

This has been tested on LS2080AQDS, LS1043ARDB, LS1012ARDB.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: fsl-layerscape: Append "A" in SoC name for ARM based SoCs
Prabhakar Kushwaha [Fri, 24 Jun 2016 08:18:13 +0000 (13:48 +0530)]
armv8: fsl-layerscape: Append "A" in SoC name for ARM based SoCs

Freescale ARMv8 SoC name ends with "A" to represent ARM SoCs.
like LS2080A, LS1043A, LS1012A.

So append "A" to SoC names.

Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agommc: fsl: introduce wp_enable
Peng Fan [Wed, 15 Jun 2016 02:53:02 +0000 (10:53 +0800)]
mmc: fsl: introduce wp_enable

Introudce wp_enable. To check WPSPL, wp_enable needs to be set
to 1 in board code.

Take i.MX6UL for example, for some boards, they do not use WP singal,
so they does not configure USDHC1_WP_SELECT_INPUT, and its default
value is 0(GPIO1_IO02). However GPIO1_IO02 is muxed for i2c usage and
SION bit set. So USDHC controller can always get wp signal and WPSPL
shows write protect and blocks driver continuing. This is not what
we want to see, so add wp_enable, and if set to 0, just omit the
WPSPL checking and this does not effect normal working of usdhc
controller.

If wp-gpios is provided in dts, wp_enable is set to 1, otherwise 0.

Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agofsl_esdhc: Update clock enable bits for USDHC
Ye Li [Wed, 15 Jun 2016 02:53:01 +0000 (10:53 +0800)]
fsl_esdhc: Update clock enable bits for USDHC

The USDHC moves the 4 clock bits CARD_CLK_SOFT_EN, IPG_PERCLK_SOFT_EN,
HCLK_SOFT_EN, and IPG_CLK_SOFT_EN from sysctl register to vendorspec
register. The driver uses RSTA to replace the clock gate off
operation. But this is not a good solution because:
1. when using RSTA, we should wait this bit to clear by itself. This is not
   implemeneted in the code.
2. After RSTA is set, it is recommended that the Host Driver reset the
   external card and reinitialize it.

So in this patch, we change to use the vendorspec registers for these bits
operation.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agommc: fsl: reset to normal boot mode when eMMC fast boot
Peng Fan [Wed, 15 Jun 2016 02:53:00 +0000 (10:53 +0800)]
mmc: fsl: reset to normal boot mode when eMMC fast boot

When booting in eMMC fast boot, MMC host does not exit from
boot mode after bootrom loading image. So the first command
'CMD0' sent in uboot will pull down the CMD line to low and
cause errors.

This patch cleans the MMC boot register in "mmc_init" to put the
MMC host back to normal mode.

Also clear DLL_CTRL delay line settings at USDHC initialization
to eliminate the pre-settings from boot rom.

Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>