Marek Vasut [Wed, 4 Oct 2017 01:03:50 +0000 (03:03 +0200)]
ARM: rmobile: Fixup ULCB CPLD support after PFC rework
The ULCB CPLD support was not updated during the PFC table rework,
fix up the GPIO numbers until the CPLD support is rewritten to a
proper DM capable and DT probing driver.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Sun, 1 Oct 2017 19:09:53 +0000 (21:09 +0200)]
doc: rmobile: Update README
Update the README with build instructions for R8A7795/R8A7796 boards.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Wed, 27 Sep 2017 22:56:25 +0000 (00:56 +0200)]
ARM: rmobile: Enable pinconf
Enable pinconf since it's now implemented and used in the DTs.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Wed, 27 Sep 2017 22:56:24 +0000 (00:56 +0200)]
pinctrl: rmobile: Add pinconf to Renesas RCar pincontrol driver
Add pinconf support to the PFC driver, so that it can handle DT
props bias-disable, bias-pull-up, bias-pull-down, drive-strength
and power-source.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Tue, 12 Sep 2017 17:07:25 +0000 (19:07 +0200)]
usb: Drop the EHCI RCar Gen3
Since we use EHCI generic driver on RCar Gen3 , this driver is useless.
Remove it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Fri, 15 Sep 2017 19:13:58 +0000 (21:13 +0200)]
ARM: rmobile: Zap ad-hoc PFC and GPIO setup in board files
At long last, nuke all this ad-hoc setup in board files in favor of
letting PFC pinmux and GPIO drivers do the same job, but based on DT
description of the hardware rather than this board-file ugliness.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Fri, 15 Sep 2017 19:13:57 +0000 (21:13 +0200)]
ARM: rmobile: Switch to DM PFC pinmux and GPIO driver
Enable the PFC pinmux and GPIO drivers and disable the SH GPIO combo
driver. This allows the drivers to obtain pinmux and GPIO configuration
from DT rather than hard-coding it in board files.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Fri, 15 Sep 2017 19:13:56 +0000 (21:13 +0200)]
gpio: rmobile: Add Renesas RCar GPIO driver
Add GPIO driver for the Renesas RCar SoCs . The driver currently supports
only the RCar Gen3 R8A7795 and R8A7796 SoCs, but is easily extensible for
the other RCar SoCs as well.
This driver is meant to replace the pinmux part of SH_GPIO_PFC driver.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Fri, 15 Sep 2017 19:13:55 +0000 (21:13 +0200)]
pinctrl: rmobile: Add Renesas RCar pincontrol driver
Add PFC pincontrol driver for the Renesas RCar Gen3 R8A7795 and R8A7796
SoCs. This driver uses the PFC pin tables from Linux, thus letting us
share the occassional fixes to those tables. This driver also has a DT
support, so the pinmux is configured from DT instead of the ad-hoc setup
in board file.
This driver is meant to replace the pinmux part of SH_GPIO_PFC driver.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Fri, 15 Sep 2017 19:12:40 +0000 (21:12 +0200)]
ARM: rmobile: Enable DM regulator support
Regulators are needed for the MMC framework to let it toggle the SD power.
Enable DM regulator support and support for fixed and GPIO regulator.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Tue, 26 Sep 2017 18:06:18 +0000 (20:06 +0200)]
ARM: rmobile: Switch to UniPhier SD driver on Gen3
The UniPhier SD driver handles the same Matsushita IP as is used
in the Renesas RCar SoCs, yet the driver is significantly better
than the SH SDHI one. Switch over to the Uniphier driver.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Fri, 15 Sep 2017 19:12:52 +0000 (21:12 +0200)]
ARM: rmobile: Enable GPIO command
This command is convenient for manipulating the GPIOs, so enable it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Fri, 15 Sep 2017 19:12:20 +0000 (21:12 +0200)]
ARM: rmobile: Remove SCIF clock configuration from board files
The configuration is now fully performed by the SCIF and clk drivers,
so remove it from the board file.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Fri, 15 Sep 2017 19:12:19 +0000 (21:12 +0200)]
ARM: rmobile: Remove AVB clock configuration from board files
The configuration is now fully performed by the AVB and clk drivers,
so remove it from the board file.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Fri, 15 Sep 2017 19:12:18 +0000 (21:12 +0200)]
ARM: rmobile: Remove SD clock configuration from board files
The configuration is now fully performed by the SD and clk drivers,
so remove it from the board file.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Fri, 15 Sep 2017 19:11:40 +0000 (21:11 +0200)]
ARM: dts: rmobile: Add PHY reset GPIO
The PHY reset GPIOs were missing from the DT, add them.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Fri, 15 Sep 2017 19:11:27 +0000 (21:11 +0200)]
serial: sh: Enable clock if available
If the clock framework provides the driver with valid clock,
enable them, otherwise the SCIF might not work if the clock
are not enabled prior to the driver probe.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Fri, 15 Sep 2017 19:11:15 +0000 (21:11 +0200)]
net: ravb: Add PHY reset GPIO support
Add support for obtaining PHY reset GPIO from DT and toggling it
before configuring the PHY to put the PHY into defined state.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Fri, 15 Sep 2017 19:10:29 +0000 (21:10 +0200)]
clk: rmobile: Add RPC hyperflash clock
Add missing RPC hyperflash entry into the clock driver tables.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Fri, 15 Sep 2017 19:10:08 +0000 (21:10 +0200)]
clk: rmobile: Add support for setting SDxCKCR
The SDxCKCR must be configured correctly, otherwise the SDIF can be
unstable. This is done in board files thus far, but those are going
away, so move the setting of SDxCKCR into the correct place.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Fri, 15 Sep 2017 19:09:47 +0000 (21:09 +0200)]
ARM: rmobile: Place initial stack right below U-Boot
Place the stack right below U-Boot so it's not in the way in case
U-Boot grows too much.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Tue, 12 Sep 2017 17:08:22 +0000 (19:08 +0200)]
ARM: rmobile: Move CONFIG_CMD_ from rcar-gen3-common to configs
Just move those config options from macros to configs.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Tue, 12 Sep 2017 21:02:30 +0000 (23:02 +0200)]
ARM: rmobile: dts: Add XHCI USB node to r8a7796
The R8A7796 XHCI USB nodes are missing from r8a7796 dtsi, add them.
These nodes don't come from mainline Linux, yet the DT binding is
similar enough to R8A7795 which already has those in mainline and
once the nodes hit mainline, this DT should be resynched.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Tue, 12 Sep 2017 17:07:24 +0000 (19:07 +0200)]
ARM: rmobile: Enable EHCI generic on ULCB
Enable the EHCI generic driver, which is superior to ad-hoc SoC specific one.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Tue, 12 Sep 2017 17:07:23 +0000 (19:07 +0200)]
ARM: rmobile: Enable EHCI generic on Salvator-X
Enable the EHCI generic driver, which is superior to ad-hoc SoC specific one.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Tue, 12 Sep 2017 17:07:22 +0000 (19:07 +0200)]
ARM: rmobile: Move HSUSB configuration to board on ULCB
In order to use ehci-generic driver, move the configuration of HSUSB
block into the board file. This configuration should not have been in
the Gen3 EHCI USB driver in the first place, so move it to the board
file until there is a proper infrastructure and driver for the HSUSB
block.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Tue, 12 Sep 2017 17:07:21 +0000 (19:07 +0200)]
ARM: rmobile: Move HSUSB configuration to board on Salvator-X
In order to use ehci-generic driver, move the configuration of HSUSB
block into the board file. This configuration should not have been in
the Gen3 EHCI USB driver in the first place, so move it to the board
file until there is a proper infrastructure and driver for the HSUSB
block.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Tue, 12 Sep 2017 17:07:20 +0000 (19:07 +0200)]
ARM: rmobile: dts: Add EHCI USB nodes to r8a7796
The R8A7796 EHCI USB nodes are missing from r8a7796 dtsi, add them.
These nodes don't come from mainline Linux, yet the DT binding is
similar enough to R8A7795 which already has those in mainline and
once the nodes hit mainline, this DT should be resynched.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Tue, 12 Sep 2017 21:01:51 +0000 (23:01 +0200)]
ARM: dts: rmobile: Update DTS to match Linux 4.13
Import the RCar Gen3 DTS and headers from upstream Linux kernel v4.13,
commit
569dbb88e80deb68974ef6fdd6a13edb9d686261 . This includes both M3
and H3 ULCB and Salvator-X boards.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Tom Rini [Sun, 17 Sep 2017 13:42:25 +0000 (09:42 -0400)]
Travis-CI: Checkout only v1.4.3 of dtc
Our minimum DTC version is 1.4.3, so check that out.
Signed-off-by: Tom Rini <trini@konsulko.com>
Jörg Krause [Fri, 15 Sep 2017 20:16:48 +0000 (22:16 +0200)]
net/tftp: fix build if CMD_BOOTEFI is not set
Fixes:
net/tftp.c:811: undefined reference to `efi_set_bootdev'
Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tom Rini [Fri, 15 Sep 2017 17:15:25 +0000 (13:15 -0400)]
Makefile: Update minimum dtc version to 1.4.3
With support for overlays and calling the -@ flag to dtc we need to have
at least 1.4.3 available now.
Cc: Simon Glass <sjg@chromium.org>
Reported-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
York Sun [Fri, 15 Sep 2017 15:21:13 +0000 (08:21 -0700)]
spl: Fix compiling warning on gunzip argument
common/spl/spl_fit.c:201:12: warning: passing argument 4 of ‘gunzip’
from incompatible pointer type [-Wincompatible-pointer-types]
src, &length))
Signed-off-by: York Sun <york.sun@nxp.com>
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
CC: Jean-Jacques Hiblot <jjhiblot@ti.com>
Felix Brack [Thu, 14 Sep 2017 12:37:08 +0000 (14:37 +0200)]
arm: am33xx: Make pin multiplexing functions optional
This patch provides default implementations of the two functions
set_uart_mux_conf and set_mux_conf_regs. Hence boards not using
them do not need to provide their distinct empty definitions.
Signed-off-by: Felix Brack <fb@ltec.ch>
Reviewed-by: Tom Rini <trini@konsulko.com>
Patrice Chotard [Wed, 13 Sep 2017 16:00:12 +0000 (18:00 +0200)]
board: Add stm32h7 SoC, discovery and evaluation boards support
This patch adds support for stm32h7 soc family, stm32h743
discovery and evaluation boards.
For more information about STM32H7 series, please visit:
http://www.st.com/en/microcontrollers/stm32h7-series.html
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrice Chotard [Wed, 13 Sep 2017 16:00:11 +0000 (18:00 +0200)]
ARM: DTS: stm32: adapt stm32h7 dts files for U-boot
This patch adapts stm32h743 disco and eval dts files to match
with U-boot requirements or add features wich are not yet
upstreamed on kernel side :
_ Add RCC clock driver node and update all clocks phandle
accordingly.
By default, on kernel side, all clocks was temporarly
configured as a phandle to timer_clk waiting for a RCC
clock driver to be available.
On U-boot side, we now have a dedicated RCC clock driver, we
can configured all clocks as phandle to this driver.
All this binding update will be available soon in a kernel tag,
as all the bindings have been acked by Rob Herring [1].
[1] http://lkml.iu.edu/hypermail/linux/kernel/1704.0/00935.html
_ Align STM32H7 serial compatible string with the one which will be
available in next kernel tag. The bindings has been acked by
Rob Herring [2].
This compatible string will be usefull to add stm32h7 specific
feature for this serial driver.
[2] https://lkml.org/lkml/2017/7/17/739
_ Add gpio compatible and aliases for stm32h743
_ Add FMC sdram node with associated new bindings value to
manage second bank (ie bank 1).
_ Add missing HSI and CSI oscillators nodes needed
by STM32H7 RCC clock driver.
Clock sources could be:
_ HSE (High Speed External)
_ HSI (High Speed Internal)
_ CSI (Low Power Internal)
These clocks can be used as clocksource in some configuration.
By default, HSE is selected as clock source.
_ Set HSE to 25Mhz for stm32h743i-disco and eval board
By default, the external oscillator frequency is defined at
25 Mhz in SoC stm32h743.dtsi file.
It has been set at 125 Mhz in kernel DT temporarly waiting for
RCC clock driver becomes available.
As in U-boot we got a RCC clock driver, the real value of HSE
clock can be used.
_ Add "u-boot,dm-pre-reloc" for rcc, fmc, fixed-clock, pinctrl,
pwrcfg and gpio nodes.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrice Chotard [Wed, 13 Sep 2017 16:00:10 +0000 (18:00 +0200)]
ARM: DTS: stm32: add stm32h743i-eval files
This file is imported from linux kernel v4.13
Add device tree support for STM32H743 evaluation board.
This board offers :
_ STM32H743XIH6 microcontroller with 2 Mbytes of
Flash memory and 1 Mbyte of RAM in TFBGA240+25 package
_ 5.7” 640x480 TFT color LCD with touch screen
_ Ethernet compliant with IEEE-802.3-2002
_ USB OTG HS and FS
_ I2 C compatible serial interface
_ RTC with rechargeable backup battery
_ SAI Audio DAC
_ ST-MEMS digital microphones
_ 8-Gbyte (or more) SDIO3.0 interface microSD™ card
_ 8Mx32bit SDRAM, 1Mx16bit SRAM and 8Mx16bit NOR Flash
_ 1-Gbit Twin Quad-SPI NOR Flash
_ Potentiometer
_ 4 colored user LEDs
_ Reset, wakeup, tamper or key buttons
_ Joystick with 4-direction control and selector
_ Board connectors :
Power jack
3 USB with Micro-AB
RS-232 communications
Ethernet RJ45
FD-CAN compliant connection
Stereo headset jack including analog microphone input
2 audio jacks for external speakers
microSD™ card
JTAG/SWD and ETM trace
_ Expansion connectors:
Extension connectors and memory connectors for daughterboard
or wire-wrap board
_ Flexible power-supply options: ST-LINK USB VBUS or external
sources
_ On-board ST-LINK/V2-1 debugger/programmer with USB re-enumeration
capability: mass storage, virtual COM port and debug port
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrice Chotard [Wed, 13 Sep 2017 16:00:09 +0000 (18:00 +0200)]
ARM: DTS: stm32: add stm32h743i-disco files
All these files are imported from linux kernel v4.13
Add device tree support for STM32H743 SoC and discovery
board. This board offers :
_ STM32H743XIH6 microcontroller with 2 Mbytes of
Flash memory and 1 Mbyte of RAM in TFBGA240+25 package
_ 5.7” 640x480 TFT color LCD with touch screen
_ Ethernet compliant with IEEE-802.3-2002
_ USB OTG HS
_ I2 C compatible serial interface
_ ST-MEMS digital microphones
_ 8-Gbyte (or more) SDIO3.0 interface microSD™ card
_ 8Mx32bit SDRAM
_ 1-Gbit Twin Quad-SPI NOR Flash
_ Reset, wakeup, or key buttons
_ Joystick with 4-direction control and selector
_ Board connectors :
1 USB with Micro-AB
Ethernet RJ45
Stereo headset jack including analog microphone input
microSD™ card
RCA connector
JTAG/SWD and ETM trace
_ Expansion connectors:
Arduino Uno compatible Connectors
2 x PIO connectors (PMOD and PMOD+)
_ On-board ST-LINK/V2-1 debugger/programmer with USB re-enumeration
capability: mass storage, virtual COM port and debug port
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Christophe Kerello [Wed, 13 Sep 2017 16:00:08 +0000 (18:00 +0200)]
dm: misc: add stm32 rcc driver
This patch adds the support of reset and clock control
block (rcc) found on STM32 SoCs.
This driver is similar to a MFD linux driver.
This driver supports currently STM32H7 only.
STM32F4 and STM32F7 will be migrated to this rcc MFD driver
in the future to uniformize all STM32 SoCs already upstreamed.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrice Chotard [Wed, 13 Sep 2017 16:00:07 +0000 (18:00 +0200)]
dm: reset: add stm32 reset driver
This driver is adapted from linux drivers/reset/reset-stm32.c
It's compatible with STM32 F4/F7/H7 SoCs.
This driver doesn't implement .of_match as it's binded
by MFD RCC driver.
To add support for each SoC family, a SoC's specific
include/dt-binfings/mfd/stm32xx-rcc.h file must be added.
This patch only includes stm32h7-rcc.h dedicated for STM32H7 SoCs.
Other SoCs support will be added in the future.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrice Chotard [Wed, 13 Sep 2017 16:00:06 +0000 (18:00 +0200)]
dm: clk: add clk driver support for stm32h7 SoCs
This driver implements basic clock setup, only clock gating
is implemented.
This driver doesn't implement .of_match as it's binded
by MFD RCC driver.
Files include/dt-bindings/clock/stm32h7-clks.h and
doc/device-tree-bindings/clock/st,stm32h7-rcc.txt
will be available soon in a kernel tag, as all the
bindings have been acked by Rob Herring [1].
[1] http://lkml.iu.edu/hypermail/linux/kernel/1704.0/00935.html
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrice Chotard [Wed, 13 Sep 2017 16:00:05 +0000 (18:00 +0200)]
serial: stm32x7: add STM32H7 support
STM32F7 and STM32H7 shares the same UART block, add
STM32H7 compatible string.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrice Chotard [Wed, 13 Sep 2017 16:00:04 +0000 (18:00 +0200)]
pinctrl: stm32: add stm32h743-pinctrl compatible
STM32H7 SoCs uses the same pinctrl block as found into
STM32F7 SoCs
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
Kever Yang [Wed, 13 Sep 2017 10:24:24 +0000 (18:24 +0800)]
spl: stash bootstage info before jump to next stage
Since we may jump to next stage like ATF/OP-TEE instead of U-Boot,
we need to stash the bootstage info before it.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrice Chotard [Tue, 5 Sep 2017 09:04:27 +0000 (11:04 +0200)]
board: STiH410-B2260: add fastboot support
Add usb_gadget_handle_interrupts(), board_usb_init(),
board_usb_cleanup() and g_dnl_board_usb_cable_connected()
callbacks needed for FASTBOOT support
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrice Chotard [Tue, 5 Sep 2017 09:04:26 +0000 (11:04 +0200)]
ARM: dts: STiH410: update ehci and ohci compatible
Update ehci and ohci node's compatible string in order to
use ehci-generic and ohci-generic drivers.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrice Chotard [Tue, 5 Sep 2017 09:04:25 +0000 (11:04 +0200)]
ARM: dts: STiH410: set DWC3 dual role mode to peripheral
On STi 96boards, configure by default the micro USB connector
(managed by DWC3 hardware block) in peripheral mode.
This will allow to use fastboot feature.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrice Chotard [Tue, 5 Sep 2017 09:04:24 +0000 (11:04 +0200)]
usb: dwc3: Add dwc3 glue driver support for STi
This patch adds the ST glue logic to manage the DWC3 HC
on STiH407 SoC family. It configures the internal glue
logic and syscfg registers.
Part of this code been extracted from kernel.org driver
(drivers/usb/dwc3/dwc3-st.c)
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrice Chotard [Tue, 5 Sep 2017 09:04:23 +0000 (11:04 +0200)]
STiH410-B2260: enable USB, fastboot, reset, PHY related flags
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrice Chotard [Tue, 5 Sep 2017 09:04:22 +0000 (11:04 +0200)]
STiH410-B2260: enable USB Host Networking
Enable USB Host Networking support by enabling Ethernet/USB
adaptors support and by enabling some BOOTP flags
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrice Chotard [Tue, 5 Sep 2017 09:04:21 +0000 (11:04 +0200)]
usb: phy: Add STi USB2 PHY
This is the generic phy driver for the picoPHY ports
used by USB2/1.1 controllers. It is found on STiH407 SoC
family from STMicroelectronics.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrice Chotard [Tue, 5 Sep 2017 09:04:20 +0000 (11:04 +0200)]
mmc: sti_sdhci: Use reset framework
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrice Chotard [Tue, 5 Sep 2017 09:04:19 +0000 (11:04 +0200)]
ARM: dts: stih410-family: Add missing reset_names for mmc1 node
reset-names property is needed to use the reset
API for STi sdhci driver.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrice Chotard [Tue, 5 Sep 2017 09:04:18 +0000 (11:04 +0200)]
mmc: sti_sdhci: Rework sti_mmc_core_config()
Use struct udevice* as input parameter. Previous
parameters are retrieved through plat and priv data.
This to prepare to use the reset framework.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tuomas Tynkkynen [Fri, 1 Sep 2017 14:26:02 +0000 (17:26 +0300)]
pci: Remove unnecessary 'default n' from Kconfig
'default n' is the default anyway so it doesn't need to be specified
explicitly, and the rest of the file doesn't specify it either anywhere.
Drop it.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tuomas Tynkkynen [Fri, 1 Sep 2017 14:26:01 +0000 (17:26 +0300)]
pci: layerscape: Remove unused field 'hose' from struct ls_pcie
This field is no longer used since the DM conversion. Drop it.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tuomas Tynkkynen [Fri, 1 Sep 2017 14:26:00 +0000 (17:26 +0300)]
pci: tegra: Remove unused field 'hose' from struct tegra_pcie
This field is no longer used since the DM conversion. Drop it.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tuomas Tynkkynen [Fri, 1 Sep 2017 14:25:59 +0000 (17:25 +0300)]
pci: xilinx: Remove unused field 'hose' from struct xilinx_pcie
This field has never been used as the driver has been DM-based since the
beginning. Drop it.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tuomas Tynkkynen [Fri, 1 Sep 2017 14:25:58 +0000 (17:25 +0300)]
pci: xilinx: Fix doc comments on config space accessors
These take the 'struct udevice *' as an argument, not the
'struct xilinx_pcie *` which is a local variable. Fix the comments to
match the code.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tom Rini [Fri, 22 Sep 2017 11:37:43 +0000 (07:37 -0400)]
fs/fat: Reduce stack usage
We have limited stack in SPL builds. Drop itrblock and move to
malloc/free of itr to move this off of the stack. As part of this fix a
double-free issue in fat_size().
Signed-off-by: Tom Rini <trini@konsulko.com>
---
Rework to use malloc/free as moving this to a global overflows some SH
targets.
Tom Rini [Thu, 21 Sep 2017 11:51:20 +0000 (07:51 -0400)]
Merge branch 'next' of git://git.denx.de/u-boot-video
rick [Mon, 28 Aug 2017 07:08:01 +0000 (15:08 +0800)]
nds32: spi: Support spi dm driver.
Support spi driver and can detect MX25U1635E flash on AE3XX board.
Verification:
sf probe 0:0
50000000 0
spi_flash_std_probe(sf_Probr.c)
spi_flash_probe_slave(sf_Probr.c)
SF: Detected mx25u1635e with page size 256 Bytes, erase size 4 KiB, total 2 MiB
NDS32 # sf test 0x100000 0x1000
SPI flash test:
0 erase: 34 ticks, 117 KiB/s 0.936 Mbps
1 check: 15 ticks, 266 KiB/s 2.128 Mbps
2 write: 21 ticks, 190 KiB/s 1.520 Mbps
3 read: 11 ticks, 363 KiB/s 2.904 Mbps
Test passed
0 erase: 34 ticks, 117 KiB/s 0.936 Mbps
1 check: 15 ticks, 266 KiB/s 2.128 Mbps
2 write: 21 ticks, 190 KiB/s 1.520 Mbps
3 read: 11 ticks, 363 KiB/s 2.904 Mbps
Signed-off-by: rick <rick@andestech.com>
rick [Mon, 28 Aug 2017 07:13:09 +0000 (15:13 +0800)]
nds32: board: Support SPI driver.
Add spi dts node and enable spi dm flash config.
Signed-off-by: rick <rick@andestech.com>
rick [Mon, 28 Aug 2017 02:09:01 +0000 (10:09 +0800)]
nds32: mtd: add spi flash id MX25U16335E.
To support MACRONIX MX25U1635E 16M-BIT flash.
Signed-off-by: rick <rick@andestech.com>
rick [Tue, 29 Aug 2017 02:15:05 +0000 (10:15 +0800)]
nds32: ftmac100: Fix write mac addr fail problem.
After soft reset complete, write mac address immediately will fail.
Add delay to work around this problem.
Signed-off-by: rick <rick@andestech.com>
rick [Tue, 29 Aug 2017 02:12:02 +0000 (10:12 +0800)]
nds32: ftmac100 support cache enable.
Enable cache and ftmac100 performance can be improved.
Signed-off-by: rick <rick@andestech.com>
rick [Tue, 29 Aug 2017 02:09:00 +0000 (10:09 +0800)]
nds32: ftmac100: support cache enable.
Add cache inval and flush when rx and tx.
Signed-off-by: rick <rick@andestech.com>
rick [Mon, 28 Aug 2017 05:31:48 +0000 (13:31 +0800)]
nds32: bootm: Fix warning of struct tag_serialnr declared
move #include <asm/setup.h> from bootm.c to bootm.h
Signed-off-by: rick <rick@andestech.com>
rick [Mon, 28 Aug 2017 03:04:40 +0000 (11:04 +0800)]
nds32: board: Fix andestech adp-ae3xx.c make fail problem.
Add #include <asm/mach-types.h> to fix it.
Signed-off-by: rick <rick@andestech.com>
Tom Rini [Wed, 20 Sep 2017 16:32:34 +0000 (12:32 -0400)]
Merge git://www.denx.de/git/u-boot-imx
Fabio Estevam [Tue, 5 Sep 2017 23:46:40 +0000 (20:46 -0300)]
mx6sabresd: Add Serial Download Protocol support
Add Serial Download Protocol support (SDP), which allows loading
SPL and u-boot.img via imx_usb_loader tool as explained in
doc/README.sdp.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Fabio Estevam [Tue, 5 Sep 2017 23:46:39 +0000 (20:46 -0300)]
toradex: imx6: Move g_dnl_bind_fixup() into common SPL code
Instead of having every board file to add its own g_dnl_bind_fixup()
implementation, move it to the common imx6 SPL code.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Łukasz Majewski <lukma@denx.de>
Ian Ray [Tue, 22 Aug 2017 06:03:54 +0000 (09:03 +0300)]
board: ge: bx50v3: set eth0 MAC address
Define i2c mux configuration. Add new vpd_reader which is used to read
vital product data. Read VPD from EEPROM and set eth0 MAC address.
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Jose Alarcon <jose.alarcon@ge.com>
Dennis Gilmore [Thu, 24 Aug 2017 15:49:43 +0000 (10:49 -0500)]
detect and setup solidrun hummingboard2
The hummingboard2 is slightly different to the cubox i and to the
hummingboard. The GPIO pin info to probe came from solidruns
for of u-boot on github.
https://github.com/SolidRun/u-boot-imx6/blob/imx6/board/solidrun/mx6_cubox-i/mx6_cubox-i.c#L569-L589
I have tested on a hummingboard-edge witha imx6 solo and 512mb of
ram.
Signed-off-by: Dennis Gilmore <dgilmore@redhat.com>
Tom Rini [Mon, 18 Sep 2017 19:44:57 +0000 (15:44 -0400)]
Merge git://git.denx.de/u-boot-rockchip
Klaus Goger [Fri, 15 Sep 2017 12:46:04 +0000 (14:46 +0200)]
rockchip: puma_rk3399: increase serialno_str size
Increase serialno_str to 17 bytes so it can hold the 16 bytes long serial
nummer and the terminating null byte added by snprintf.
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Kever Yang [Thu, 7 Sep 2017 03:20:51 +0000 (11:20 +0800)]
rockchip: ram: rk3399: update reg map for of-platdata
After Simon's patch, the dtoc can work with 64bit address,
so we need to fix reg number for it.
Depend on Simon's patch set:
https://patchwork.ozlabs.org/cover/807266/
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Kever Yang [Thu, 7 Sep 2017 03:20:50 +0000 (11:20 +0800)]
rockchip: sdhci: update reg map for of-platdata
After Simon's patch, the dtoc can work with 64bit address,
so we need to fix reg number for it.
Depend on Simon's patch set:
https://patchwork.ozlabs.org/cover/807266/
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich [Mon, 14 Aug 2017 17:05:33 +0000 (19:05 +0200)]
rockchip: dts: rk3368: reduce the number of nodes seen in TPL
The RK3368 TPL stage always returns to the BootROM, so it has no need
for the eMMC, SD and SPI nodes. This marks those nodes (that should
be included in SPL, but not TPL) as 'u-boot,dm-spl'.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Mon, 14 Aug 2017 17:05:32 +0000 (19:05 +0200)]
rockchip: rk3368: adjust DMC driver for 32/64bit-aware OF_PLATDATA
With the new 32/64bit-aware dtoc, the type of reg is fdt64_t and the
OF_PLATDATA structure layout changes. This adjusts the DMC driver for
the RK3368 to track these changes.
For the time being (i.e. until regmap_init_mem_platdata works for the
64bit case), we won't use regmap_init_mem_platdata here and simply
access of_plat.reg[] directly.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Mon, 14 Aug 2017 17:05:31 +0000 (19:05 +0200)]
rockchip: timer: update for 32/64bit-aware OF_PLATDATA
With dtoc emitting fdt64_t for addresses (and region sizes), the array
indices for accessing the reg[] array needs to be adjusted. This
adjusts the Rockchip DM timer driver to correctly handle OF_PLATDATA
given this new structure layout.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Tue, 12 Sep 2017 15:32:29 +0000 (17:32 +0200)]
rockchip: defconfig: puma-rk3399: enable OF_LIVE (live tree)
With the critical drivers ready for switching to a live tree, we can
now enable it in the defconfig for the RK3399-Q7.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Tue, 12 Sep 2017 15:32:26 +0000 (17:32 +0200)]
rockchip: efuse: change to use dev_read_addr_ptr
With the dev_read_addr_ptr function available, we can change the
efuse driver to use it (and eliminate the explicit type-cast).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Tue, 12 Sep 2017 15:32:24 +0000 (17:32 +0200)]
rockchip: clk: rk3399: Convert to livetree
Update the clock driver for the RK3399 to support a live device tree.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Tue, 12 Sep 2017 15:30:57 +0000 (17:30 +0200)]
rockchip: dts: rk3399-puma: replace 'rockchip, vbus-gpio' with fixed regulator
On the RK3399-Q7, we need to turn on the on-module USB hub before using the
USB host interfaces (only the OTG interface is directly connected to the edge
connector). This drops the deprecated 'rockchip,vbus-gpio' property and uses
a fixed regulator to turn on the USB hub.
References:
26a8b80 "usb: host: xhci-rockchip: use fixed regulator to control vbus"
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Tue, 12 Sep 2017 15:30:56 +0000 (17:30 +0200)]
rockchip: clk: rk3399: add clk_enable function and support USB HOST0/1
The generic ehci-driver (ehci-generic.c) will try to enable the clocks
listed in the DTSI. If this fails (e.g. due to clk_enable not being
implemented in a driver and -ENOSYS being returned by the clk-uclass),
the driver will bail our and print an error message.
This implements a minimal clk_enable for the RK3399 and supports the
clocks mandatory for the EHCI controllers; as these are enabled by
default we simply return success.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Andy Yan [Mon, 4 Sep 2017 12:32:58 +0000 (20:32 +0800)]
rockchip: rk3368: add the missing target and pinctrl config for sheep board
Add the missing target and pinctrl config for rk3368 sheep board
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Andy Yan [Mon, 4 Sep 2017 12:32:23 +0000 (20:32 +0800)]
rockchip: rk3368: add ENV_MEM_LAYOUT to extra env settings
Add the ENV_MEM_LAYOUT_SETTINGS to CONFIG_EXTRA_ENV_SETTINGS
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Jagan Teki [Tue, 12 Sep 2017 11:45:47 +0000 (17:15 +0530)]
rk3288: Add Vyasa initial board support
This patch adds support for Vyasa RK3288 initial board
from Amarula Solutions.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich [Tue, 29 Aug 2017 16:24:05 +0000 (18:24 +0200)]
rockchip: rk3399: spl: remove hard-coded addresses for GRF and SGRF
On the RK3399, we will have either OF_PLATDATA or full OF_CONTROL
enabled: this allows the use of syscon to retrieve the addresses of
GRF and SGRF (except for the early debug UART setup, which runs so
early that the device-model is not initialised).
This removes the hard-coded addresses and goes through syscon to
retrieve the base-addresses of GRF and SGRF. After that, we use
the structure definitions to locate the respective registers.
In addition to this, the inclusion of header files is also cleaned up:
- all headers are included at the beginning (there was a spurious
inclusion of the grf header from within a function)
- all #include statements for unused headers are removed
- the remaining #include statements are sorted (while keeping common.h
included in front)
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Mon, 11 Sep 2017 20:04:27 +0000 (22:04 +0200)]
rockchip: lion-rk3368: defconfig: resync w/ OF_LIVE and BOOTSTAGE enabled
This adds OF_LIVE and BOOTSTAGE support for the RK3368-uQ7 and
regenerates the defconfig (picking up a few changes/reorderings) from
upstream Kconfig changes.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich [Mon, 11 Sep 2017 20:04:26 +0000 (22:04 +0200)]
rockchip: dts: rk3368-lion: add /chosen/tick-timer
To support bootstage recording, we want to mark our DM timer as the
tick-timer; this triggers the support for 'trying harder' to read the
timer in the Rockchip DM timer driver, even if the device model isn't
ready yet.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich [Mon, 11 Sep 2017 20:04:25 +0000 (22:04 +0200)]
rockchip: gpio: remove outdated/misleading comment
Remove a comment claiming that this driver only supports the RK3288,
as we also use it on the RK3368, RK3399 and (most likely) on other
variants.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Version-changes: 2
- use the dev_read_addr_ptr function in rk_gpio.c
Philipp Tomsich [Mon, 11 Sep 2017 20:04:24 +0000 (22:04 +0200)]
rockchip: gpio: convert to livetree
Update the Rockchip GPIO-bank driver to support a live tree.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Version-changes: 2
- use the dev_read_addr_ptr function in rk_gpio.c
Philipp Tomsich [Mon, 11 Sep 2017 20:04:23 +0000 (22:04 +0200)]
rockchip: i2c: Convert to livetree
Update the Rockchip I2C driver to support livetree.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Heiko Schocher <hs@denx.de>
Philipp Tomsich [Mon, 11 Sep 2017 20:04:22 +0000 (22:04 +0200)]
rockchip: rk8xx: remove unused header includes
Remove header file includes that have been left over after the
conversion to livetree-support.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich [Mon, 11 Sep 2017 20:04:21 +0000 (22:04 +0200)]
rockchip: sdhci: Convert to livetree
Update the Rockchip SDHCI wrapper to support a live device tree.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Version-changes: 2
- use the dev_read_addr_ptr function in rockchip_sdhci.c
Philipp Tomsich [Mon, 11 Sep 2017 20:04:20 +0000 (22:04 +0200)]
rockchip: spi: Convert to livetree
Update the Rockchip SPI driver to support a live device tree.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich [Mon, 11 Sep 2017 20:04:19 +0000 (22:04 +0200)]
rockchip: pinctrl: rk3368: Convert to livetree
Update the pinctrl driver for the RK3368 to support a live device tree.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich [Mon, 11 Sep 2017 20:04:18 +0000 (22:04 +0200)]
rockchip: clk: rk3368: Convert to livetree
Update the clock driver for the RK3368 to support a live device tree.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Version-changes: 2
- use the dev_read_addr_ptr function in clk_rk3368.c