oweals/u-boot.git
7 years agocommon/xyzModem.c: unifdef (Remove useless #ifdefs)
Alexandru Gagniuc [Tue, 4 Apr 2017 17:42:30 +0000 (10:42 -0700)]
common/xyzModem.c: unifdef (Remove useless #ifdefs)

Signed-off-by: Alexandru Gagniuc <alex.g@adaptrum.com>
7 years agospl: Kconfig: SPL_MMC_SUPPORT depends on GENERIC_MMC
Alexandru Gagniuc [Tue, 4 Apr 2017 17:02:58 +0000 (10:02 -0700)]
spl: Kconfig: SPL_MMC_SUPPORT depends on GENERIC_MMC

spl_mmc.c calls mmc_initialize(). This symbol is provided in
drivers/mmc/mmc.c when CONFIG_GENERIC_MMC is enabled.
The sunxi Kconfig case is an oddball because it redefines
SPL_MMC_SUPPORT.

Signed-off-by: Alexandru Gagniuc <alex.g@adaptrum.com>
[trini: Update arch/arm/cpu/armv8/zynqmp/Kconfig]
Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoarm: rmobile: Remove default value of Kconfig from defconfig
Nobuhiro Iwamatsu [Sat, 1 Apr 2017 23:17:30 +0000 (08:17 +0900)]
arm: rmobile: Remove default value of Kconfig from defconfig

This removes CONFIG_BOOTSTAGE_USER_COUNT, CONFIG_BOOTSTAGE_STASH_ADDR
and CONFIG_BOOTSTAGE_STASH_SIZE from defconfig following boards:

  - Alt
  - Gose
  - Koelsh
  - Lager
  - Porter
  - Silk
  - Stout
  - Blanche
  - Salvator-x

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
7 years agocommon, kconfig: Fix defaut value of BOOTSTAGE_STASH_SIZE
Nobuhiro Iwamatsu [Sat, 1 Apr 2017 22:48:12 +0000 (07:48 +0900)]
common, kconfig: Fix defaut value of BOOTSTAGE_STASH_SIZE

The default value of BOOTSTAGE_STASH_SIZE should be set to hexadecimal,
but an integer value is set. This fixes the BOOTSTAGE_STASH_SIZE number
from hexadecimal to integer.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
7 years agospl: armv7m: keep ARM v7M in thumb mode while jumping to entry point
Vikas Manocha [Fri, 31 Mar 2017 23:34:39 +0000 (16:34 -0700)]
spl: armv7m: keep ARM v7M in thumb mode while jumping to entry point

On ARM v7M, the processor will return to ARM mode when executing blx
instruction with bit 0 of the address == 0. Always set it to 1 to stay
in thumb mode.

Similar commit:
f99993c10882f7dc8ec35993d5febe59aac01e6a
Author: Matt Porter <mporter@konsulko.com>
Date:   Tue May 5 15:00:23 2015 -0400
common/cmd_boot: keep ARM v7M in thumb mode during do_go_exec()

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
7 years agoconfig: am335x_evm: detect BeagleBone Blue using BLA
robertcnelson@gmail.com [Thu, 30 Mar 2017 19:29:54 +0000 (14:29 -0500)]
config: am335x_evm: detect BeagleBone Blue using BLA

BeagleBone Blue is next grenation of boards from BeagleBoard.org, focusing
on robotics with a TI wl1835 wireless module for connectivity.

This board can be indentified by the BLAx value after A335BNLT (BBB)
in the at24 eeprom:
BLAx: [aa 55 33 ee 41 33 33 35  42 4e 4c 54 42 4c 41 30 |.U3.A335BNLTBLA2|]

http://beagleboard.org/blue
https://github.com/beagleboard/beaglebone-blue

firmware: https://github.com/beagleboard/beaglebone-black-wireless/tree/master/firmware
wl18xx mac address: /proc/device-tree/ocp/ethernet@4a100000/slave@4a100200/mac-address

Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
CC: Tom Rini <trini@konsulko.com>
CC: Jason Kridner <jkridner@beagleboard.org>
CC: Will Newton <willn@resin.io>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoconfig: am335x_evm: detect Green Wireless using GW1
robertcnelson@gmail.com [Thu, 30 Mar 2017 19:29:53 +0000 (14:29 -0500)]
config: am335x_evm: detect Green Wireless using GW1

SeeedStudio BeagleBone Green Wireless (BBGW) is an expansion of the
SeeedStudio Green (BBG) with the Ethernet replaced by a TI wl1835
wireless module.

This board can be indentified by the GW1x value after A335BNLT (BBB)
in the at24 eeprom:
GW1x [aa 55 33 ee 41 33 33 35  42 4e 4c 54 47 57 31 41  |.U3.A335BNLTGW1A|]

http://beagleboard.org/green-wireless
http://wiki.seeed.cc/BeagleBone_Green_Wireless/

firmware: https://github.com/beagleboard/beaglebone-black-wireless/tree/master/firmware
wl18xx mac address: Stored in at24 eeprom at address 5-16:
hexdump -e '8/1 "%c"' /sys/bus/i2c/devices/0-0050/eeprom | cut -b 5-16

Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
CC: Tom Rini <trini@konsulko.com>
CC: Jason Kridner <jkridner@beagleboard.org>
CC: Will Newton <willn@resin.io>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoconfig: am335x_evm: detect Black Wireless using BWA
robertcnelson@gmail.com [Thu, 30 Mar 2017 19:29:52 +0000 (14:29 -0500)]
config: am335x_evm: detect Black Wireless using BWA

BeagleBone Black Wireless is clone of the BeagleBone Black (BBB) with
the Ethernet replaced by a TI wl1835 wireless module.

This board can be indentified by the BWAx value after A335BNLT (BBB)
in the at24 eeprom:
BWAx [aa 55 33 ee 41 33 33 35  42 4e 4c 54 42 57 41 35  |.U3.A335BNLTBWA5|]

http://beagleboard.org/black-wireless
https://github.com/beagleboard/beaglebone-black-wireless

firmware: https://github.com/beagleboard/beaglebone-black-wireless/tree/master/firmware
wl18xx mac address: /proc/device-tree/ocp/ethernet@4a100000/slave@4a100200/mac-address

Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
CC: Tom Rini <trini@konsulko.com>
CC: Jason Kridner <jkridner@beagleboard.org>
CC: Will Newton <willn@resin.io>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agostm32f7: enable instruction & data cache
Vikas Manocha [Mon, 27 Mar 2017 20:02:45 +0000 (13:02 -0700)]
stm32f7: enable instruction & data cache

It also enables commands for cache enable/disable/status.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>

7 years agoarmv7m: add instruction & data cache support
Vikas Manocha [Mon, 27 Mar 2017 20:02:44 +0000 (13:02 -0700)]
armv7m: add instruction & data cache support

This patch adds armv7m instruction & data cache support.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>

7 years agoRemove extra fdt_fixup_ethernet() call
Joakim Tjernlund [Thu, 23 Mar 2017 17:02:41 +0000 (18:02 +0100)]
Remove extra fdt_fixup_ethernet() call

ft_cpu_setup() already calls fdt_fixup_ethernet(), calling it
in image_setup_libfdt() is both redundant and breaks any modifications
done by ft_board_setup(). Restore the old behavior by removing
the call in image_setup_libfdt()

Fixes: 13d06981a982 ("image: Add device tree setup to image library")
Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com>
7 years agoboard: STiH410-B2260: enable caches
Patrice Chotard [Mon, 20 Mar 2017 14:21:36 +0000 (15:21 +0100)]
board: STiH410-B2260: enable caches

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
7 years agoti_armv7_common: env: Use args_mmc in FIT loading path
Andrew F. Davis [Fri, 10 Mar 2017 21:53:54 +0000 (15:53 -0600)]
ti_armv7_common: env: Use args_mmc in FIT loading path

The env command 'args_fit' does not define a root path, this forces us to
embed the rootfs into the FIT image. FIT images do not need to contain a
rootfs, when they do not the kernel will fall-back to the kernel argument
'root', if this is not defined the kernel will not boot. It is safe to
add this as when we do have the rootfs in FIT this argument is ignored.
As 'loadfit' is only called from the MMC boot path, use 'args_mmc' to
correctly populate 'bootargs'.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
7 years agoApparent conflict between CONFIG_BLK and CONFIG_API
fuz@fuz.su [Tue, 7 Mar 2017 21:53:17 +0000 (22:53 +0100)]
Apparent conflict between CONFIG_BLK and CONFIG_API

Good evening,

I am trying to port FreeBSD to the ASUS Tinker Board, a computer based
on the Rockchip 3288 SoC. FreeBSD's boot loader (named loader(8)) needs
CONFIG_API to be enabled, but trying to build an U-Boot from trunk with
both CONFIG_API and CONFIG_BLK (as required for Rockchip SoC's?) leads
to the following build failure:

$ CROSS_COMPILE=arm-none-eabi- gmake tinker-rk3288_defconfig all
...
  CC      api/api_storage.o
api/api_storage.c: In function 'dev_read_stor':
api/api_storage.c:334:9: error: 'struct blk_desc' has no member named 'block_read'
  if ((dd->block_read) == NULL) {
         ^~
api/api_storage.c:339:11: error: 'struct blk_desc' has no member named 'block_read'
  return dd->block_read(dd, start, len, buf);
           ^~
api/api_storage.c:340:1: warning: control reaches end of non-void function [-Wreturn-type]
 }
 ^
gmake[2]: *** [scripts/Makefile.build:281: api/api_storage.o] Fehler 1
gmake[1]: *** [Makefile:1229: api] Fehler 2
gmake: *** [Makefile:460: __build_one_by_one] Error 2

I applied the following fix, but the product doesn't boot. Perhaps
that's not a property of the fix though:

Yours,
Robert Clausecker

7 years agoboard: ti: am57xx: enable input on mmc clock
Sekhar Nori [Wed, 8 Feb 2017 13:13:59 +0000 (18:43 +0530)]
board: ti: am57xx: enable input on mmc clock

As per the latest pinmux data available for AM572x EVM,
rev A3, input should be enabled on MMC clock lines for
MMC2/2/3 for stable operation.

Further, AM572x TRM, SPRUHZ6, Revised June 2016, in
section 18.4.6.1.1 "Pad Configuration Registers" states
that input should be enabled for MMC 2/3/4 clock lines.

Enable input on MMC1 and MMC3 clock to match the latest
pinmux data. Input is already enabled on MMC2 clock for
BeagleBoard x15. Further, input is already enabled on all
MMCx clocks for other AM57xx boards (AM572x and AM571x
IDK).

Tested with HS and UHS SD card on AM572x EVM Rev A3.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
7 years agoARM: keystone: Pass SPI MTD partition table via kernel command line
Vignesh R [Wed, 8 Mar 2017 08:28:17 +0000 (13:58 +0530)]
ARM: keystone: Pass SPI MTD partition table via kernel command line

SPI U-Boot image for K2 boards have now exceeded 512K partition
allocated to it and no longer fit the partitions defined in kernel DTS
file. Therefore, pass an updated MTD partition table from U-Boot as
kernel command line arguments to avoid kernel from accidentally
modifying boot loader image that has overflowed to next user partition.

To do is, introduce a common environment file for declaring SPI
partition so that each individual boards need not repeat the same.
Choose appropriate SPI bus from board config file and pass it as command
line argument to kernel.

Signed-off-by: Vignesh R <vigneshr@ti.com>
7 years agoARMv8: add GOT sections to the list of sections copied
Philipp Tomsich [Fri, 24 Mar 2017 18:08:55 +0000 (19:08 +0100)]
ARMv8: add GOT sections to the list of sections copied

Recent Linux distributions (e.g. Debian 9) include cross-compilers for
AArch64, but only for the aarch64-linux-gnu triplet only. It can thus
be expected that users will attempt to use the system cross-compiler
(instead of an aarch64-elf variant) to compile U-Boot for their ARMv8
target systems.

One key differences between an aarch64-linux-gnu and an aarch64-elf
compiler are the default settings regarding position-independent: with
the aarch64-linux-gnu compiler, the default will create and use the
global offset table.

This change-set adjusts the list of sections copied on ARMv8 to include
the GOT sections. With this added, the list matches the previous setup
for AArch32 closely.

Note that this is not an 'academic' issue, but was in fact encountered
by our QA during testing of the RK3399-Q7 BSP and resulted in an
early failure of the SPL stage during FDT setup.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoenv_mmc: Allow SPL to use any MMC device to load/save the environment
Jean-Jacques Hiblot [Wed, 1 Feb 2017 10:26:53 +0000 (11:26 +0100)]
env_mmc: Allow SPL to use any MMC device to load/save the environment

SPL has been restricted to use only dev 0 based on the assumption that only
one MMC device is registered. This is not always the case and many
platforms now register several devices as expected by the spl mmc boot code
For those platform SPL_ENV_SUPPORT is broken if dev is forced to 0.

A word of warning: this commit may break SPL_ENV_SUPPORT on platforms that
do not register the same MMC controllers in SPL and in u-boot (mostly iMX6
based platforms). Fortunately none of those activate SPL_ENV_SUPPORT in
their default configuration.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
7 years agoRemove various unused interrupt related code
Tom Rini [Fri, 7 Apr 2017 00:42:18 +0000 (20:42 -0400)]
Remove various unused interrupt related code

With d53ecad92f06 some unused interrupt related code was removed.
However all of these options are currently unused.  Rather than migrate
some of these options to Kconfig we just remove the code in question.

The only related code changes here are that in some cases we use
CONFIG_STACKSIZE in non-IRQ related context.  In these cases we rename
and move the value local to the code in question.

Fixes: d53ecad92f06 ("Merge branch 'master' of git://git.denx.de/u-boot-sunxi")
Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoMerge branch 'master' of git://git.denx.de/u-boot-sunxi
Tom Rini [Thu, 6 Apr 2017 16:28:03 +0000 (12:28 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-sunxi

trini: Disable CONFIG_SPL_USE_ARCH_MEMSET on orangepi_2

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agodm: serial: Allow driver-model serial to be disabled for TPL
Simon Glass [Sun, 2 Apr 2017 15:50:32 +0000 (09:50 -0600)]
dm: serial: Allow driver-model serial to be disabled for TPL

Add separate enable/disable controls for driver-model serial. While this
is generally enabled in SPL it may not be in TPL, since serial output can
be obtained with the debug UART with minimal code size.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agodm: core: Allow driver model to be disabled for TPL
Simon Glass [Sun, 2 Apr 2017 15:50:31 +0000 (09:50 -0600)]
dm: core: Allow driver model to be disabled for TPL

Since TPL often needs to be very very small it may not make sense to
enable driver model. Add an option for this.

This changes brings the 'rock' board under the TPL limit with gcc 4.9.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agoMakefile: Provide an option to select SPL or TPL
Simon Glass [Sun, 2 Apr 2017 15:50:30 +0000 (09:50 -0600)]
Makefile: Provide an option to select SPL or TPL

At present we have SPL_ which can be used in Makefiles to select between
normal and SPL CONFIGs like this:

    obj-$(CONFIG_$(SPL_)DM) += core/

When TPL is being built, SPL_ has the value 'SPL' which is generally a
good idea since they tend to follow each other. But in extreme situations
we may want to distinugish between SPL and TPL. For example we may not
want to enable CONFIG_DM with TPL.

Add a new SPL_TPL_ variable which is set to either empty (for U-Boot
proper), 'SPL' or 'TPL'. This may prove useful with TPL-specific options.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agoboard_f: powerpc: Drop unused headers
Simon Glass [Fri, 31 Mar 2017 14:40:39 +0000 (08:40 -0600)]
board_f: powerpc: Drop unused headers

These includes don't seem to be needed now. Drop them. Reserve the
mp.h header for PowerPC for now.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoboard_f: Make relocation functions generic
Simon Glass [Fri, 31 Mar 2017 14:40:38 +0000 (08:40 -0600)]
board_f: Make relocation functions generic

This header file is used by three archs. It could be used by all of them
since relocation is a common function. Move it into a generic file.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agoboard_f: Make init_helpers generic
Simon Glass [Fri, 31 Mar 2017 14:40:37 +0000 (08:40 -0600)]
board_f: Make init_helpers generic

This header file is used by two archs. It could be used by all of them
since it allows the cache to be on during relocation. Move it into a
generic file.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agopowerpc: Move setup_board_extra() into a PPC file
Simon Glass [Fri, 31 Mar 2017 14:40:36 +0000 (08:40 -0600)]
powerpc: Move setup_board_extra() into a PPC file

We don't need this PPC-specific function in generic code. Move it to
the powerpc directory.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
7 years agoboard_f: Move errno.h down to the bottom
Simon Glass [Fri, 31 Mar 2017 14:40:35 +0000 (08:40 -0600)]
board_f: Move errno.h down to the bottom

This is to keep the header file order consistent.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoboard_f: Drop unused headers
Simon Glass [Fri, 31 Mar 2017 14:40:34 +0000 (08:40 -0600)]
board_f: Drop unused headers

Drop headers which are not used or needed in this file. The compiler.h
header is included by common.h.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoMove dram_init_banksize() to a common header
Simon Glass [Fri, 31 Mar 2017 14:40:33 +0000 (08:40 -0600)]
Move dram_init_banksize() to a common header

This is an weak function present on all archs so we should have it in the
common header file. Remove it from arch-specific headers and add a
function comment.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agoboard_f: Drop setup_dram_config() wrapper
Simon Glass [Fri, 31 Mar 2017 14:40:32 +0000 (08:40 -0600)]
board_f: Drop setup_dram_config() wrapper

By making dram_init_banksize() return an error code we can drop the
wrapper. Adjust this and clean up all implementations.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
7 years agoboard_f: Drop CONFIG_SPL_BUILD check
Simon Glass [Fri, 31 Mar 2017 14:40:31 +0000 (08:40 -0600)]
board_f: Drop CONFIG_SPL_BUILD check

This is never defined when building this file, so drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoboard_f: Put video memory reservation in one function
Simon Glass [Fri, 31 Mar 2017 14:40:30 +0000 (08:40 -0600)]
board_f: Put video memory reservation in one function

Move the ugly #ifdefs inside the reserve_video() function so we can
collect all this init into one place.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agoboard_f: Move the extra #ifdef condition into reserve_mmu()
Simon Glass [Fri, 31 Mar 2017 14:40:29 +0000 (08:40 -0600)]
board_f: Move the extra #ifdef condition into reserve_mmu()

The arch-specific details of the cache being off are best handled inside
the reserve_mmu(). This cleans up the init sequence a little.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoboard_f: Use a single condition for reserve_logbuffer()
Simon Glass [Fri, 31 Mar 2017 14:40:28 +0000 (08:40 -0600)]
board_f: Use a single condition for reserve_logbuffer()

CONFIG_ALT_LB_ADDR is really a detail of how this logbuffer is allocated
rather than whether to do it at all. So move the #ifdef into the function.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agoxtensa: Place relocated U-Boot in the normal place
Simon Glass [Fri, 31 Mar 2017 14:40:27 +0000 (08:40 -0600)]
xtensa: Place relocated U-Boot in the normal place

All archs put U-Boot at the bottom of the relocated region. Xtensa does
not, but perhaps not for any good reason. Adjust it to see if things
still work OK.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agoboard_f: Drop return value from initdram()
Simon Glass [Fri, 31 Mar 2017 14:40:25 +0000 (08:40 -0600)]
board_f: Drop return value from initdram()

At present we cannot use this function as an init sequence call without a
wrapper, since it returns the RAM size. Adjust it to set the RAM size in
global_data instead, and return 0 on success.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
7 years agoboard_f: Drop board_type parameter from initdram()
Simon Glass [Fri, 31 Mar 2017 14:40:24 +0000 (08:40 -0600)]
board_f: Drop board_type parameter from initdram()

It looks like only cm5200 and tqm8xx use this feature, so we don't really
need it in generic code. Drop it and have the users access gd->board_type
directly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
7 years agoi2c: Drop CONFIG_SOFT_I2C_MULTI_BUS
Simon Glass [Tue, 28 Mar 2017 16:27:32 +0000 (10:27 -0600)]
i2c: Drop CONFIG_SOFT_I2C_MULTI_BUS

This is not used by any board. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Clean up board_f sequence a little
This series tries to remove #ifdefs from the board_f init sequence. It
gets as far as I2C and then we need to discuss whether we can start to
remove the old I2C framework.

I think that ideally each entry in the init sequence should be enabled by
at most one CONFIG, which is in Kconfig and is not arch-specific.
END
Acked-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
7 years agoi2c: Drop unused i2c_soft...() functions
Simon Glass [Tue, 28 Mar 2017 16:27:31 +0000 (10:27 -0600)]
i2c: Drop unused i2c_soft...() functions

These are not used in U-Boot. Manual relocation fixup is used by blackfin
but that is being removed.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agoboard_f: x86: Use checkcpu() for CPU init
Simon Glass [Tue, 28 Mar 2017 16:27:30 +0000 (10:27 -0600)]
board_f: x86: Use checkcpu() for CPU init

At present we misuse print_cpuinfo() do so CPU init on x86. This is done
because it is the next available call after the console is enabled. But
several arches use checkcpu() instead. Despite the horrible name (which
we can fix), it seems a better choice.

Adjust the various x86 CPU implementations to move their init code into
checkcpu() and use print_cpuinfo() only for printing CPU info.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
7 years agoboard_f: powerpc: Make prt_8260_rsr(), prt_8260_clks() private
Simon Glass [Tue, 28 Mar 2017 16:27:29 +0000 (10:27 -0600)]
board_f: powerpc: Make prt_8260_rsr(), prt_8260_clks() private

Move these two function calls into checkcpu(), which is called on this
arch immediately after these two.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
7 years agoboard_f: sandbox: Move sandbox_early_getopt_check() into misc_init_f()
Simon Glass [Tue, 28 Mar 2017 16:27:28 +0000 (10:27 -0600)]
board_f: sandbox: Move sandbox_early_getopt_check() into misc_init_f()

We don't need a special hook for sandbox as one of the later ones will do
just as well. We can print error messages about bad options after we
print the banner. In fact, it seems better.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
7 years agoboard_f: powerpc: Move prt_83xx_rsr() to private code
Simon Glass [Tue, 28 Mar 2017 16:27:27 +0000 (10:27 -0600)]
board_f: powerpc: Move prt_83xx_rsr() to private code

This function is called just before checkcpu() on MPX83xx. Move it to the
code for that arch.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agopowerpc: freescale: Unify the two get_clocks() calls
Simon Glass [Tue, 28 Mar 2017 16:27:26 +0000 (10:27 -0600)]
powerpc: freescale: Unify the two get_clocks() calls

Combine the conditions so this appears in the init list only once.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
7 years agoboard_f: Use timer_init() on all archs
Simon Glass [Tue, 28 Mar 2017 16:27:25 +0000 (10:27 -0600)]
board_f: Use timer_init() on all archs

More than half of the architectures use this function so let's make them
all use it.

For those which don't actually define it, we can rely on the weak function
in lib/time.c

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
7 years agoboard_f: powerpc: Use timer_init() instead of init_timebase()
Simon Glass [Tue, 28 Mar 2017 16:27:24 +0000 (10:27 -0600)]
board_f: powerpc: Use timer_init() instead of init_timebase()

There is no good reason to use a different name on PowerPC. Change it to
timer_init() like the others.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
7 years agoboard_f: powerpc: Unified get_clocks() portion of init sequence
Simon Glass [Tue, 28 Mar 2017 16:27:23 +0000 (10:27 -0600)]
board_f: powerpc: Unified get_clocks() portion of init sequence

Now that both branches of the #if do the same thing, we can unify them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
7 years agoboard_f: Remove adjust_sdram_tbs_8xx() from the init sequence
Simon Glass [Tue, 28 Mar 2017 16:27:22 +0000 (10:27 -0600)]
board_f: Remove adjust_sdram_tbs_8xx() from the init sequence

We can just call this from the only place that needs it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
7 years agoboard_f: Remove sdram_adjust_866() from the init sequence
Simon Glass [Tue, 28 Mar 2017 16:27:21 +0000 (10:27 -0600)]
board_f: Remove sdram_adjust_866() from the init sequence

We can just call this from the only function that needs it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
7 years agoboard_f: powerpc: Rename get_clocks_866() to get_clocks()
Simon Glass [Tue, 28 Mar 2017 16:27:20 +0000 (10:27 -0600)]
board_f: powerpc: Rename get_clocks_866() to get_clocks()

We really don't need to have a name like this in the generic init
sequence. Use the generic get_clocks() name so that we can merge these
two at some point.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
7 years agoboard_f: powerpc: Join the two CONFIG_8xx_CPUCLK_DEFAULT sections
Simon Glass [Tue, 28 Mar 2017 16:27:19 +0000 (10:27 -0600)]
board_f: powerpc: Join the two CONFIG_8xx_CPUCLK_DEFAULT sections

We have two chunks of code which depend on this CONFIG options. There is
likely no need to keep them apart, so join them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
7 years agoboard_f: x86: Rename x86_fsp_init() to arch_fsp_init()
Simon Glass [Tue, 28 Mar 2017 16:27:18 +0000 (10:27 -0600)]
board_f: x86: Rename x86_fsp_init() to arch_fsp_init()

While x86 is the only user and this could in principle be moved to
arch_cpu_init() there is some justification for this being a separate
call. It provides a way to handle init which is not CPU-specific, but
must happen before the CPU can be set up.

Rename the function to be more generic.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
7 years agoboard_f: initcall: Add a header guard
Simon Glass [Tue, 28 Mar 2017 16:27:17 +0000 (10:27 -0600)]
board_f: initcall: Add a header guard

This file is missing the usual header guard. Add it.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agoboard_f: sandbox: Move setup_ram_buf() to private code
Simon Glass [Tue, 28 Mar 2017 16:27:16 +0000 (10:27 -0600)]
board_f: sandbox: Move setup_ram_buf() to private code

There is no need to have this call in the generic init sequence and no
other architecture has needed it in the time it has been there. Move it
into sandbox's private code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
7 years agoOpenRISC: Remove
Tom Rini [Tue, 14 Mar 2017 15:08:12 +0000 (11:08 -0400)]
OpenRISC: Remove

The OpenRISC architecture is currently unmaintained, remove.

Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoSPARC: Remove
Tom Rini [Tue, 14 Mar 2017 15:08:11 +0000 (11:08 -0400)]
SPARC: Remove

The SPARC architecture is currently unmaintained, remove.

Cc: Francois Retief <fgretief@spaceteq.co.za>
Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoBlackfin: Remove
Tom Rini [Tue, 14 Mar 2017 15:08:10 +0000 (11:08 -0400)]
Blackfin: Remove

The architecture is currently unmaintained, remove.

Cc: Benjamin Matthews <mben12@gmail.com>
Cc: Chong Huang <chuang@ucrobotics.com>
Cc: Dimitar Penev <dpn@switchfin.org>
Cc: Haitao Zhang <hzhang@ucrobotics.com>
Cc: I-SYST Micromodule <support@i-syst.com>
Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Martin Strubel <strubel@section5.ch>
Cc: Peter Meerwald <devel@bct-electronic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
Cc: Valentin Yakovenkov <yakovenkov@niistt.ru>
Cc: Wojtek Skulski <info@skutek.com>
Cc: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agomx6sxsabreauto: Remove legacy CONFIG_PCA953X
Tom Rini [Wed, 5 Apr 2017 14:42:16 +0000 (10:42 -0400)]
mx6sxsabreauto: Remove legacy CONFIG_PCA953X

When this board was switched to using more DM drivers we didn't disable
the legacy PCA953X driver.  This in turn learn to a build time warning
about implicit functions as i2c.h would not say anything about
'i2c_read' nor 'i2c_write'.  But this was not a fatal error as none of
the legacy driver would be linked in either.

Fixes: e389033f72b5 ("imx: mx6sxsabreauto: enable more dm drivers")
Reviewed-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoMerge git://git.denx.de/u-boot-dm
Tom Rini [Wed, 5 Apr 2017 12:28:33 +0000 (08:28 -0400)]
Merge git://git.denx.de/u-boot-dm

7 years agosunxi: Add OrangePi PC 2 initial support
Andre Przywara [Thu, 16 Feb 2017 01:20:29 +0000 (01:20 +0000)]
sunxi: Add OrangePi PC 2 initial support

The OrangePi PC 2 is a typical SBC with the 64-bit Allwinner H5 SoC.
Add a (64-bit only) defconfig defining the required options to build
the U-Boot proper.

Create a new .dts file for it by including the (32-bit) H3 SoC .dtsi
and changing the differing components accordingly.
This is a preliminary device tree mostly for U-Boot's own sake, it
is expected to be updated once the official DT gets accepted upstream.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
[squash the commits, update the commit message]
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agosunxi: introduce Allwinner H5 config option
Andre Przywara [Thu, 16 Feb 2017 01:20:28 +0000 (01:20 +0000)]
sunxi: introduce Allwinner H5 config option

The Allwinner H5 Soc is bascially an H3 with high SRAM and ARMv8 cores.
As the peripherals and the pinmuxing are almost identical, we piggy
back on the shared MACH_SUN8I_H3_H5 config symbol.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agosunxi: prepare for sharing MACH_SUN8I_H3 config symbol
Andre Przywara [Thu, 16 Feb 2017 01:20:27 +0000 (01:20 +0000)]
sunxi: prepare for sharing MACH_SUN8I_H3 config symbol

The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores.
To allow sharing the clocks, GPIO and driver code easily, create an
architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol.
Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and
let it be selected by a new shared Kconfig option.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agosunxi: DRAM: add Allwinner H5 support
Andre Przywara [Thu, 16 Feb 2017 01:20:26 +0000 (01:20 +0000)]
sunxi: DRAM: add Allwinner H5 support

The DRAM controller in the Allwinner H5 SoC is again very similar to
the one in the H3 and A64.
Based on the existing socid parameter, add support for this controller
by reusing the bulk of the code and only deviating where needed.
These new bits set or cleared here and there have been mostly found by
looking at DRAM register dumps after using the H5 boot0 and comparing
them to what we set in the code. So for now it's mostly unclear what
those bits actually mean - hence the missing names and comments.
Also add the delay line parameters taken from the boot0 and libdram
disassembly.
Register setup differences between H5 and H3 are courtesy of Jens Kuske.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agoSPI: SPL: sunxi: fix 64-bit build
Andre Przywara [Thu, 16 Feb 2017 01:20:25 +0000 (01:20 +0000)]
SPI: SPL: sunxi: fix 64-bit build

Addresses passed on to readl and writel are expected to be of the same
size as a pointer. Change the parameter types of sunxi_spi0_read_data()
to make the compiler happy and allow a warning-free aarch64 compile.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agosunxi: provide ARMv8 mem_map for every ARM64 board
Andre Przywara [Thu, 16 Feb 2017 01:20:24 +0000 (01:20 +0000)]
sunxi: provide ARMv8 mem_map for every ARM64 board

Every armv8 board needs the memory map, so change the #ifdef to
ARM64 to avoid enumerating every single board or SoC.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agosunxi: Kconfig: introduce CONFIG_SUNXI_HIGH_SRAM
Andre Przywara [Thu, 16 Feb 2017 01:20:23 +0000 (01:20 +0000)]
sunxi: Kconfig: introduce CONFIG_SUNXI_HIGH_SRAM

Traditionally Allwinner SoCs have their boot ROM mapped just below 4GB,
while the first SRAM region is mapped at address 0.
With the extended physical memory support of the A80 this was changed,
so the BROM is now at address 0 and the SRAM region starts right behind
this at 64KB. This configuration seems to be called "high SRAM".
Instead of enumerating the SoCs which have copied this configuration,
let's call a spade a spade and introduce a Kconfig option for this setup.
SoCs implementing this (A80, A64 and H5, so far), can then select this
configuration.
Simplify the config header definition on the way.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agosunxi: configs: merge sun9i and sun50i SPL memory definitions
Andre Przywara [Thu, 16 Feb 2017 01:20:22 +0000 (01:20 +0000)]
sunxi: configs: merge sun9i and sun50i SPL memory definitions

For some reason we were pretty conservative when defining the maximum
SPL size for the Allwinner A80(sun9i) SoC.
According to the manual the SRAM A1 is even 40KB, but the BROM
probably still has the 32 KiB load limit. For the sake of simplicity,
merge the SPL memory definitions for the A64 and A80 SoCs, since both
SoC share the BROM/SRAM A1 memory layout.
This helps to further simplify this is in the next patch.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agosunxi: simplify ACTLR.SMP bit set #ifdef
Andre Przywara [Thu, 16 Feb 2017 01:20:21 +0000 (01:20 +0000)]
sunxi: simplify ACTLR.SMP bit set #ifdef

Instead of enumerating all SoC families that need that bit set, let's
just express this more clearly: The SMP bits needs to be set on
SMP capable ARMv7 CPUs. It's much easier in Kconfig to express it the
other way round, so we use ! CPU_IS_UP and ! ARM64.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agofsl: ls102x: remove redundant GENERIC_TIMER_CLK
Andre Przywara [Thu, 16 Feb 2017 01:20:20 +0000 (01:20 +0000)]
fsl: ls102x: remove redundant GENERIC_TIMER_CLK

Some Freescale boards used an extra version of the constant to hold the
Generic Timer frequency. This can easily be covered by the now unified
COUNTER_FREQUENCY constant, so remove this extra variable from those
boards.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agoARM: rename CONFIG_TIMER_CLK_FREQ to COUNTER_FREQUENCY
Andre Przywara [Thu, 16 Feb 2017 01:20:19 +0000 (01:20 +0000)]
ARM: rename CONFIG_TIMER_CLK_FREQ to COUNTER_FREQUENCY

Many ARMv8 boards define a constant COUNTER_FREQUENCY to specify the
frequency of the ARM Generic Timer (aka. arch timer).
ARMv7 boards traditionally used CONFIG_TIMER_CLK_FREQ for the same
purpose. It seems useful to unify them.
Since there are less occurences of the latter version, lets convert all
users over to COUNTER_FREQUENCY.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agosunxi: fix ACTLR.SMP assembly routine
Andre Przywara [Thu, 16 Feb 2017 01:20:18 +0000 (01:20 +0000)]
sunxi: fix ACTLR.SMP assembly routine

If we take the liberty to use register r0 to perform our bit set, we
should be nice enough to tell the compiler about it.
Add r0 to the clobber list to avoid potential mayhem.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Jagan Teki <jagan@openedev.com>
7 years agodm: avoid dropping pin control DT properties in case of SPL_PINCTRL
Vikas Manocha [Fri, 24 Mar 2017 21:47:44 +0000 (14:47 -0700)]
dm: avoid dropping pin control DT properties in case of SPL_PINCTRL

This patch replaces SPL_PINCTRL_FULL with SPL_PINCNTRL. It is to avoid removal
of pin control properties in case of SPL_PINCTRL. No impact in case of
SPL_PINCTRL_FULL as it depends on SPL_PINCTRL.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agodm: test: Add test for device removal
Stefan Roese [Mon, 27 Mar 2017 09:02:43 +0000 (11:02 +0200)]
dm: test: Add test for device removal

Add a test for the correct device removal. Currently two different ways
for device removal are supported:

- Normal device removal via the device_remove() API
- Removal via selective device driver flags (DM_FLAG_ACTIVE_DMA)

This new test "remove_active_dma" adds tests cases for those both ways
of removal. This is done by adding a new test driver, which has this
flag set.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
7 years agoarm: bootm: Add dm_remove_devices_flags() call to announce_and_cleanup()
Stefan Roese [Mon, 20 Mar 2017 11:51:50 +0000 (12:51 +0100)]
arm: bootm: Add dm_remove_devices_flags() call to announce_and_cleanup()

This patch adds a call to dm_remove_devices_flags() to
announce_and_cleanup() so that drivers that have one of the removal flags
set (e.g. DM_FLAG_ACTIVE_DMA_REMOVE) in their driver struct, may do some
last-stage cleanup before the OS is started.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agodm: core: Add dm_remove_devices_flags() and hook it into device_remove()
Stefan Roese [Mon, 27 Mar 2017 08:58:53 +0000 (10:58 +0200)]
dm: core: Add dm_remove_devices_flags() and hook it into device_remove()

The new function dm_remove_devices_flags() is intented for driver specific
last-stage cleanup operations before the OS is started. This patch adds
this functionality and hooks it into the common device_remove()
function.

Drivers wanting to use this feature for some last-stage removal calls,
need to add one of the DM_REMOVE_xx flags to their driver .flags.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agodm: core: Add flags parameter to device_remove()
Stefan Roese [Mon, 20 Mar 2017 11:51:48 +0000 (12:51 +0100)]
dm: core: Add flags parameter to device_remove()

This patch adds the flags parameter to device_remove() and changes all
calls to this function to provide the default value of DM_REMOVE_NORMAL
for "normal" device removal.

This is in preparation for the driver specific pre-OS (e.g. DMA
cancelling) remove support.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: Add support for MiQi rk3288 board
Jernej Skrabec [Wed, 29 Mar 2017 23:23:14 +0000 (01:23 +0200)]
rockchip: Add support for MiQi rk3288 board

MiQi is rk3288 based development board with 1 or 2 GB SDRAM, 16 GB eMMC,
micro SD card interface, 4 USB 2.0 ports, HDMI, gigabit Ethernet and
expansion ports.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Eddie Cai <eddie.cai.linux@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: cosmetic: Sort RK3288 boards
Jernej Skrabec [Wed, 29 Mar 2017 23:23:13 +0000 (01:23 +0200)]
rockchip: cosmetic: Sort RK3288 boards

Sort rk3288 boards in alphabetical order.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Eddie Cai <eddie.cai.linux@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agodts: rk3399: move rockchip, vbus-gpio properties into board-specific files
Philipp Tomsich [Wed, 29 Mar 2017 19:19:25 +0000 (21:19 +0200)]
dts: rk3399: move rockchip, vbus-gpio properties into board-specific files

The (shared) rk3399.dtsi had defined the 'rockchip,vbus-gpio'
properties for each USB 3.0 controller.

As the GPIO usage will vary (e.g. one of those GPIOs shuts down one of
the regulators on the RK3399-Q7) between boards, we move this from the
shared dtsi into the device tree file for the EVB board which these
GPIO definitions match.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agodefconfig: puma-rk3399: add defconfig for the RK3399-Q7 (Puma)
Philipp Tomsich [Tue, 28 Mar 2017 16:48:52 +0000 (18:48 +0200)]
defconfig: puma-rk3399: add defconfig for the RK3399-Q7 (Puma)

This commit adds the baseline defconfig for the RK3399-Q7 (Puma) SoM
(under the name 'puma-rk3399_defconfig') featuring the Rockchip RK3399
in a Qseven compatible module.

This subsumes the following changes:
 * defconfig: rk3399: migrate CONFIG_SPL_LIBCOMMON_SUPPORT/CONFIG_SPL_LIBGENERIC_SUPPORT
 * defconfig: rk3399-puma: add CONFIG_MMC_DW_ROCKCHIP
 * defconfig: rk3399-puma: disable CONFIG_SPL_OF_PLATDATA
 * defconfig: rk3399-puma: don't USE_TINY_PRINTF
 * defconfig: rk3399-puma: set up CONFIG_SYS_BOARD for the RK3399-Q7
 * defconfig: rk3399-puma: enable the multi-image loading via CONFIG_SPL_FIT
 * defconfig: rk3399-puma: SPL should be able to boot from MMC/SD card
 * defconfig: rk3399-puma: enable GMAC support
 * defconfig: rk3399-puma: enable support for SPI and Winbond SPI flash
 * defconfig: rk3399-puma: enable SPI as a boot-source in SPL
 * defconfig: rk3399-puma: disallow non-FIT images from being loaded
 * defconfig: rk3399-puma: rename to puma-rk3399
 * rockchip: config: rk3399: update defconfigs and rk3399_common

For the RK3399-Q7, we want a default boot-order of SPI -> MMC -> uSD.
This both follows how the BootROM probes devices and is a sane default
for customers in device-personalisation (e.g. it allows for quick and
easy factory programming of unpersonalised devices using an SD card)
and field usage (with customer devices expected to have their firmware
either in SPI or MMC).

However, when probing multiple interfaces (according to the result
from the board_boot_order function), we need to ensure that only valid
FIT images are considered and disable the fallback to assuming that a
raw (binary-only) U-Boot image is loaded (to avoid hangs/crashes from
jumping to random content loaded from devices that are probed, but
don't contain valid image content).

By disabling the SPL_RAW_IMAGE_SUPPORT and SPL_LEGACY_IMAGE_SUPPORT
options, we ensure that raw images (indistinguishable from random
data) are not considered for booting.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
Drop CONFIG_DEBUG_UART_BOARD_INIT:
Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agodts: rk3399-puma: add DTS for RK3399-Q7 (Puma) SoM
Philipp Tomsich [Tue, 28 Mar 2017 16:48:51 +0000 (18:48 +0200)]
dts: rk3399-puma: add DTS for RK3399-Q7 (Puma) SoM

The RK3399-Q7 is a system-on-module featuring the Rockchip RK3399
in a Qseven-compatible form-factor.

These changes add a device-tree describing the board and its
interfaces for basic functionality (e.g. GbE, SPI, eMMC, SD-card).

This includes the following changes from the original development:

 * dts: rk3399-puma: include DTS for RK3399-Q7 SoM in the Makefile
 * dts: rk3399-puma: add gmac for the RK3399-Q7

This change enables the Gigabit Ethernet support on the RK3399-Q7.

 * dts: rk3399-puma: use serial0 for stdout
 * dts: rk3399-puma: prepare the sdmmc node for SPL booting
 * dts: rk3399-puma: enable spi1 and spi5, add /spi1/spiflash

The RK3399-Q7 (Puma) unsually (this is a build-time option for
customised boards) has an on-module SPI-flash connected to SPI1.
As of today, this is a Winbond W25Q32DW (32MBit) device.

The SPI5 controller is routed to the Q7 edge connector and provides
general-purpose SPI connectivity for customer base-boards.

With some minor improvements on integration into our outbound tree
 - explicitly modelled the SPI flash as 'spiflash' under spi0
   [dts: rk3399-puma: explicitly model spi-flash under spi1]
 - renamed the aliases to spi0 and spi1 to allow easier use of
   commands and legacy (SPL) infrastructure... i.e. the controllers
   will be 0 and 1 for 'sf probe', 'sspi', etc.
   [dts: rk3399-puma: rename aliases to number spi as 0 and 1 for commands]

 * dts: rk3399-puma: include SPI in the spl-boot-order property

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: spi: rk3399: move CONFIG_SPI and CONFIG_SPI_FLASH to defconfig
Jakob Unterwurzacher [Wed, 29 Mar 2017 11:31:30 +0000 (13:31 +0200)]
rockchip: spi: rk3399: move CONFIG_SPI and CONFIG_SPI_FLASH to defconfig

On the RK3399-Q7 we need to enable a number of configuration options
(e.g. CONFIG_SPI_FLASH_WINBND) dependent on Kconfig seeing CONFIG_SPI
and CONFIG_SPI_FLASH active.

To allow for these being defined in Kconfig (e.g. via defconfig) and
to avoid a warning on having the macro defined multiple times, we
remove them from the common header file.

Note that the rk3399-evb does not currently have the rk_spi.c driver
active (i.e. CONFIG_ROCKCHIP_SPI), so there's no change to the
evb-rk3399_defconfig as part of this change.

X-AffectedPlatforms: RK3399-Q7
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agoarm64: rockchip: rk3399-puma: add DDR3-1333 timings
Philipp Tomsich [Tue, 28 Mar 2017 16:48:50 +0000 (18:48 +0200)]
arm64: rockchip: rk3399-puma: add DDR3-1333 timings

For the initial validation of the RK3399-Q7 (Puma), the DDR3 has been
clocked at 666MHz (i.e. DDR3-1333) using the same (safe) settings as
used in Rockchip's MiniLoader.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: rk3399: spl: make SPL boot-order configurable via /chosen
Philipp Tomsich [Tue, 28 Mar 2017 09:03:00 +0000 (11:03 +0200)]
rockchip: rk3399: spl: make SPL boot-order configurable via /chosen

The RK3399 does not have any boot selection pins and the BootROM probes
the boot interfaces using the following boot-order:
    1. SPI
    2. eMMC (sdhci in DTS)
    3. SD card (sdmmc in DTS)
    4. USB loader
For ease of deployment, the SPL stage should mirror the boot order of
the ROM and use the same probing order (assuming that valid images can
be detected by SPL) unless instructed otherwise.  The boot-order can
then be configured via the 'u-boot,spl-boot-order' property in the
chosen-node of the DTS.

While this approach is easily extensible to other boards, it is only
implemented for the RK3399 for now, as the large SRAM on the RK3399
makes this easy to fit the needed infrastructure into SPL and our
production setup already runs with DM, OF_CONTROL and BLK in SPL.

The new boot-order property is expected to be used in conjunction with
FIT images (and all legacy image formats disabled via Kconfig).

A boot-sequence with probing and fallthroughs from SPI via eMMC to SD
card (i.e. &spiflash, &sdhci, &sdmmc) has been validated on the RK3399-Q7.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Tested-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: rk3188: Add Radxa Rock board
Heiko Stübner [Sun, 26 Mar 2017 19:09:55 +0000 (21:09 +0200)]
rockchip: rk3188: Add Radxa Rock board

The Rock is a RK3188 based single board computer by Radxa.
Currently it still relies on the proprietary DDR init and
cannot use the generic SPL, but at least is able to boot
a linux kernel and system up to a regular login prompt.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Fix sort order in defconfig, enable CONFIG_SPL_TINY_MEMSET:
Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agostring: Provide a slimmed-down memset()
Simon Glass [Sun, 2 Apr 2017 15:50:28 +0000 (09:50 -0600)]
string: Provide a slimmed-down memset()

Most of the time the optimised memset() is what we want. For extreme
situations such as TPL it may be too large. For example on the 'rock'
board, using a simple loop saves a useful 48 bytes. With gcc 4.9 and
the rodata bug, this patch is enough to reduce the TPL image below the
limit.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
7 years agoMakefile: Correct dependency race condition with TPL
Simon Glass [Sun, 26 Mar 2017 23:38:15 +0000 (17:38 -0600)]
Makefile: Correct dependency race condition with TPL

At present we sometimes see the following build error when building on a
machine with multiple cores.

+make[2]: *** No rule to make target 'dts/dt.dtb', needed by 'tpl/u-boot-tpl.dtb'.  Stop.

Add a dependency to correct this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Heiko Stuebner <heiko@sntech.de>
7 years agorockchip: dts: firefly: add usb host power supply node
Eddie Cai [Mon, 27 Mar 2017 07:17:27 +0000 (15:17 +0800)]
rockchip: dts: firefly: add usb host power supply node

firefly have a usb host. add dts node to provide power supply

Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: rk3188: follow THUMB_BUILD Kconfig migration
Heiko Stübner [Sun, 26 Mar 2017 19:09:54 +0000 (21:09 +0200)]
rockchip: rk3188: follow THUMB_BUILD Kconfig migration

Commit 3a649407a49b ("arm: Migrate SYS_THUMB_BUILD to Kconfig, introduce
SPL_SYS_THUMB_BUILD") moved the THUMB_BUILD symbols from the header to
Kconfig symbols. With it still defined in the rk3188 header we end up
with a duplicate symbol and compile errors, so fix that.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: clk: rk3399: 24MHz is not a power of 2
Philipp Tomsich [Fri, 24 Mar 2017 18:35:37 +0000 (19:35 +0100)]
rockchip: clk: rk3399: 24MHz is not a power of 2

The clock driver for the RK3399 mistakenly used (24 * 2^20) where it
should have used (24 * 10^6) in a few calculations.

This commits fixes this.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agodts: rk3399: add gmac for the rk3399
Philipp Tomsich [Fri, 24 Mar 2017 18:24:27 +0000 (19:24 +0100)]
dts: rk3399: add gmac for the rk3399

This change adds the gmac node (i.e. the GMAC Ethernet controller) as
defined in the Linux DTS.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agonet: gmac_rockchip: Add support for the RK3399 GMAC
Philipp Tomsich [Fri, 24 Mar 2017 18:24:26 +0000 (19:24 +0100)]
net: gmac_rockchip: Add support for the RK3399 GMAC

The GMAC in the RK3399 is very similar to the RK3288 variant (i.e. it
is a Designware GMAC core and requires similar configuration as the
RK3288 to switch it to RGMII and set up the TX/RX delays for Gigabit).
The key difference is that the register offsets (within the GRF block)
and bit-offsets (within those registers) used to hold the configuration
differ between the various RK32/33 CPUs.

This change refactors the gmac_rockchip.c driver to use a function
table (selected via driver_data) to factor out these differences. Each
function's implementation then matches the underlying processor.

Some collateral changes are needed in the definitions describing the
bits and offsets in the GRF are needed to prefix each set of symbolic
constants with the SoC name to avoid name clashes... and in doing so,
the shifts for masks and constants have been moved into the header
files for readability (and to make it easier to stay below 80 chars).

X-AffectedPlatforms: RK3399-Q7
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Simon Glass <sjg@chromium.org>
Fixed commit message typo s/factor our/factor out/:
Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: clk: rk3399: add clocking support for Ethernet
Philipp Tomsich [Fri, 24 Mar 2017 18:24:25 +0000 (19:24 +0100)]
rockchip: clk: rk3399: add clocking support for Ethernet

The Ethernet driver for the RK3288/3399 GMAC makes sure that the clock
is ungated through a call to clk_set_rate(...). Even though nothing
needs to be done on the RK3399 (the clock gates are open and the clock
is external), we need to implement enough support to at least return
success to enable driver probing.

X-AffectedPlatforms: RK3399-Q7
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: clk: rk3399: fix warnings for unused variables in SPL/non-SPL
Philipp Tomsich [Fri, 24 Mar 2017 18:24:24 +0000 (19:24 +0100)]
rockchip: clk: rk3399: fix warnings for unused variables in SPL/non-SPL

Due to differences in the code paths for SPL and non-SPL, some static
constant structures remain unused in each build variant. This raises
warnings with recent GCC versions (we currently use GCC-6.3).

The warnings addressed in this commit (by matching #if conditions for
the variable definition with their uses) are:

* for the SPL build:
    drivers/clk/rockchip/clk_rk3399.c:53:29: warning: 'cpll_init_cfg' defined but not used [-Wunused-const-variable=]
     static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 2, 2);
                                 ^~~~~~~~~~~~~
    drivers/clk/rockchip/clk_rk3399.c:52:29: warning: 'gpll_init_cfg' defined but not used [-Wunused-const-variable=]
     static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2, 1);
                                 ^~~~~~~~~~~~~
* for the non-SPL build:
    drivers/clk/rockchip/clk_rk3399.c:54:29: warning: 'ppll_init_cfg' defined but not used [-Wunused-const-variable=]
     static const struct pll_div ppll_init_cfg = PLL_DIVISORS(PPLL_HZ, 2, 2, 1);
                                 ^~~~~~~~~~~~~

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: pinctrl: rk3399: add GMAC (RGMII only) support
Philipp Tomsich [Fri, 24 Mar 2017 18:24:23 +0000 (19:24 +0100)]
rockchip: pinctrl: rk3399: add GMAC (RGMII only) support

To add GMAC (Gigabit Ethernet) support (limited to RGMII only at this
point), we need support for additional pin-configuration.  This commit
adds the pinctrl support for GMAC in RGMII signalling mode:
 * adds a PERIPH_ID_GMAC and the mapping from IRQ number to PERIPH_ID
 * adds the required defines (in the GRF support) for configuring the
   GPIOC pins for RGMII
 * configures the RGMII pins (in GPIOC) when requested via pinctrl

X-AffectedPlatforms: RK3399-Q7
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: arm64: rk3399: remove unconditional debug message
Philipp Tomsich [Fri, 24 Mar 2017 18:10:52 +0000 (19:10 +0100)]
rockchip: arm64: rk3399: remove unconditional debug message

An earlier upstream change contained an unconditional debug message
which would show up as a message similar to the following in the
U-Boot startup (after the ATF and before the U-Boot banner):
      time 159f019, 0

This commit removes this message (instead of making if conditional on
being a debug-build), as it doesn't pertain to any initialisation done
in this file.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: spl: RK3399: add COUNTER_FREQUENCY define to rk3399_common.h
Philipp Tomsich [Thu, 23 Mar 2017 22:27:45 +0000 (23:27 +0100)]
rockchip: spl: RK3399: add COUNTER_FREQUENCY define to rk3399_common.h

The BootROM of the RK3399 SoC does not initialise the cntfrq_el0 (which
holds the value 0 (zero) on entry into the SPL. This causes the timebase
for U-Boot not to advance (and will cause a hang where a timeout would
be expected... e.g. if something goes wrong during MMC/SD card startup).

This change defines COUNTER_FREQUENCY, which is used by the AArch64 init
code in arch/arm/cpu/armv8/start.S to set up cntfrq_el0 (if necessary).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: video: Split out HDMI controller code
Jernej Skrabec [Mon, 20 Mar 2017 22:01:22 +0000 (23:01 +0100)]
rockchip: video: Split out HDMI controller code

Designware HDMI controller and phy are used in other SoCs as well. Split
out platform independent code.

DW HDMI has 8 bit registers but they can be represented as 32 bit
registers as well. Add support to select access mode.

EDID reading code use reading by blocks which is not supported by other
SoCs in general. Make it more general using byte by byte approach, which
is also used in Linux driver.

Finally, not all DW HDMI controllers are accompanied with DW HDMI phy.
Support custom phys by making controller code independent from phy code.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Tested-by: Nickey Yang <nickey.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: i2c: Add compatibles for Rockchip Cortex-A9 socs
Heiko Stübner [Mon, 20 Mar 2017 11:40:35 +0000 (12:40 +0100)]
rockchip: i2c: Add compatibles for Rockchip Cortex-A9 socs

The Cortex-A9 socs rk3066 and rk3188 share the IP but have their own
compatible values, so add them to make the i2c on these platforms accessible.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Glass <sjg@chromium.org>