York Sun [Mon, 26 Sep 2016 15:09:30 +0000 (08:09 -0700)]
armv7: ls102xa: Rename GIC_ADDR and DCSR_RCPM_ADDR
Instead of using CONFIG_* name space, rename these two macros to
SYS_FSL_* space.
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Hongbo Zhang <hongbo.zhang@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
York Sun [Mon, 26 Sep 2016 15:09:29 +0000 (08:09 -0700)]
armv7: ls1021a: Convert CONFIG_LS1_DEEP_SLEEP to Kconfig option
Move this option to Kconfig and clean up existing uses.
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Hongbo Zhang <hongbo.zhang@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
York Sun [Mon, 26 Sep 2016 15:09:28 +0000 (08:09 -0700)]
armv8: ls1046ardb_emmc: Fix a typo in defconfig
It should be EMMC_BOOT instead of CONFIG_EMMC_BOOT.
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
York Sun [Mon, 26 Sep 2016 15:09:27 +0000 (08:09 -0700)]
Convert CONFIG_SYS_FSL_ERRATUM_A010315 to Kconfig option
Move this option to Kconfig and clean up existing uses.
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
York Sun [Mon, 26 Sep 2016 15:09:26 +0000 (08:09 -0700)]
armv8: ls1012a: Convert CONFIG_LS1012A to Kconfig option ARCH_LS1021A
Move this config to Kconfig option and clean up existing uses.
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Calvin Johnson <calvin.johnson@nxp.com>
CC: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
York Sun [Mon, 26 Sep 2016 15:09:25 +0000 (08:09 -0700)]
driver: ddr: fsl_mmdc: Pass board parameters through data structure
Instead of using multiple macros, a data structure is used to pass
board-specific parameters to MMDC DDR driver.
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
York Sun [Mon, 26 Sep 2016 15:09:24 +0000 (08:09 -0700)]
armv8: ls1046a: Convert CONFIG_LS1046A to Kconfig option ARCH_LS1046A
Move this option to Kconfig and clean up existing uses.
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Mingkai Hu <mingkai.hu@nxp.com>
CC: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Shaohui Xie [Wed, 7 Sep 2016 09:56:14 +0000 (17:56 +0800)]
armv8: ls1046aqds: Add LS1046AQDS board support
LS1046AQDS Specification:
-------------------------
Memory subsystem:
* 8GByte DDR4 SDRAM (64bit bus)
* 128 Mbyte NOR flash single-chip memory
* 512 Mbyte NAND flash
* 64 Mbyte high-speed SPI flash
* SD connector to interface with the SD memory card
Ethernet:
* Two XFI 10G ports
* Two SGMII ports
* Two RGMII ports
PCIe: supports Gen 1 and Gen 2
SATA 3.0: one SATA 3.0 port
USB 3.0: two micro AB connector and one type A connector
UART: supports two UARTs up to 115200 bps for console
Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Mingkai Hu [Wed, 7 Sep 2016 10:47:28 +0000 (18:47 +0800)]
armv8: ls1046ardb: Add LS1046ARDB board support
LS1046ARDB Specification:
-------------------------
Memory subsystem:
* 8GByte DDR4 SDRAM (64bit bus)
* 512 Mbyte NAND flash
* Two 64 Mbyte high-speed SPI flash
* SD connector to interface with the SD memory card
* On-board 4G eMMC
Ethernet:
* Two XFI 10G ports
* Two SGMII ports
* Two RGMII ports
PCIe:
* PCIe1 (SerDes2 Lane0) to miniPCIe slot
* PCIe2 (SerDes2 Lane1) to x2 PCIe slot
* PCIe3 (SerDes2 Lane2) to x4 PCIe slot
SATA:
* SerDes2 Lane3 to SATA port
USB 3.0: one super speed USB 3.0 type A port
one Micro-AB port
UART: supports two UARTs up to 115200 bps for console
Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Shaohui Xie [Wed, 7 Sep 2016 09:56:12 +0000 (17:56 +0800)]
armv8: ls1046a: disable SATA ECC in DCSR
This is a workaround to fix SATA CRC error. Once the root cause
is found the ECC disabling will be removed.
Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Shengzhou Liu [Wed, 7 Sep 2016 09:56:11 +0000 (17:56 +0800)]
armv8: ls1046a: Enable DDR erratum for ls1046a
Enable ERRATUM_A008511, ERRATUM_A009801, ERRATUM_A009803,
ERRATUM_A009942, ERRATUM_A010165
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Qianyu Gong [Wed, 7 Sep 2016 09:56:10 +0000 (17:56 +0800)]
armv8: fsl-layerscape: spl: remove BSS clearing and board_init_r
As per the top level U-Boot README "Board Initialisation Flow"
section, board_init_f() should return without calling board_init_r()
directly. Clearing BSS and calling board_init_r() will be done in
crt0_64.S.
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Shaohui Xie [Wed, 7 Sep 2016 09:56:09 +0000 (17:56 +0800)]
armv8: fsl-layerscape: add define CONFIG_STANDALONE_LOAD_ADDR for standalone app
The CONFIG_STANDALONE_LOAD_ADDR is set to 0x80300000 by default.
Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Mingkai Hu [Wed, 7 Sep 2016 09:56:08 +0000 (17:56 +0800)]
armv8: fsl-layerscape: Increase L2 Data RAM latency and L2 Tag RAM latency
According to design specification, the L2 cache operates at the same
frequency as the A72 CPUs in the cluster with a 3-cycle latency, so
increase the L2 Data RAM and Tag RAM latency to 3 cycles, or else,
will run into different call trace issues.
Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Shaohui Xie [Wed, 7 Sep 2016 09:56:07 +0000 (17:56 +0800)]
Export memset for standalone AQ FW load apps
The 'commit
95279315076c ("board/ls2085rdb: Export functions for
standalone AQ FW load apps")' mentioned memset was exported but
it was not, this patch exports the memset.
Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Shaohui Xie [Wed, 7 Sep 2016 09:56:06 +0000 (17:56 +0800)]
ddr: fsl: fix a compile issue
When CONFIG_SYS_FSL_ERRATUM_A009801 is defined but
CONFIG_SYS_FSL_ERRATUM_A008511 not defined, there is compile error
that temp32 undeclared, this patch fixes it.
Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Shengzhou Liu [Fri, 26 Aug 2016 10:30:39 +0000 (18:30 +0800)]
driver/ddr/fsl: Add general MMDC driver and reuse common MMDC driver for ls1012a
This general MMDC driver adds basic support for Freescale MMDC
(Multi Mode DDR Controller). Currently MMDC is integrated on ARMv8
LS1012A SoC for DDR3L, there will be a update to this driver to
support more flexible configuration if new features (DDR4, multiple
controllers/chip selections, etc) are implimented in future.
Meantime, reuse common MMDC driver for LS1012ARDB/LS1012AQDS/
LS1012AFRDM.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Shengzhou Liu [Thu, 1 Sep 2016 06:50:36 +0000 (14:50 +0800)]
armv7:ls1021a: Enable workaround for DDR erratum A-009942
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Hongbo Zhang [Fri, 19 Aug 2016 09:20:33 +0000 (17:20 +0800)]
nxp: ls102xa: add LS1 PSCI system suspend
The deep sleep function of LS1 platform, is mapped into PSCI system
suspend function, this patch adds implementation of it.
Signed-off-by: Hongbo Zhang <hongbo.zhang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Hongbo Zhang [Fri, 19 Aug 2016 09:20:32 +0000 (17:20 +0800)]
nxp: ls102xa: add EPU Finite State Machine
The EPU Finite State Machie (FSM) is used in both the last stage of
system suspend and the earliest stage of system resume.
Signed-off-by: Hongbo Zhang <hongbo.zhang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Hongbo Zhang [Fri, 19 Aug 2016 09:20:31 +0000 (17:20 +0800)]
nxp: ls102xa: add registers definition for system sleep
This patch adds definitions of all the regesters necessary for
system sleep.
Signed-off-by: Hongbo Zhang <hongbo.zhang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Hongbo Zhang [Fri, 19 Aug 2016 09:20:30 +0000 (17:20 +0800)]
armv7: psci: make v7_flush_dcache_all public for all psci code
The v7_flush_dcache_all function will be called by ls102xa platform system
suspend, it is necessary to make it a public call instead of a local one, but
changing the LENTRY to ENTRY isn't enough, because there is another one using
the same name, so this one gets a psci_ prefix.
Signed-off-by: Hongbo Zhang <hongbo.zhang@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>
York Sun [Wed, 3 Aug 2016 19:33:00 +0000 (12:33 -0700)]
armv8: ls2080a: Remove debug server support
Debug server feature has been dropped from roadmap.
Signed-off-by: York Sun <york.sun@nxp.com>
Hou Zhiqiang [Tue, 2 Aug 2016 11:03:27 +0000 (19:03 +0800)]
fsl-layerscape: Add workaround for PCIe erratum
A010315
As the access to serders protocol unselected PCIe controller will
hang. So disable the R/W permission to unselected PCIe controller
including its CCSR, IO space and memory space according to the
serders protocol field of RCW.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Hou Zhiqiang [Tue, 2 Aug 2016 11:03:26 +0000 (19:03 +0800)]
fsl: csu: add an API to set R/W permission to PCIe
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Hou Zhiqiang [Tue, 2 Aug 2016 11:03:24 +0000 (19:03 +0800)]
fsl: csu: add an API to set individual device access permission
Add this API to make the individual device is able to be set to
the specified permission.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Hou Zhiqiang [Tue, 2 Aug 2016 11:03:23 +0000 (19:03 +0800)]
arm: fsl-layerscape: move forward the non-secure access permission setup
Move forward the basic non-secure access enable operation, so the
subsequent individual device access permission can override it.
And collect the dispersed callers in board level, and then move
them to SoC level.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Hou Zhiqiang [Tue, 2 Aug 2016 11:03:22 +0000 (19:03 +0800)]
fsl: serdes: ensure accessing the initialized maps of serdes protocol
Up to now, the function is_serdes_configed() doesn't check if the map
of serdes protocol is initialized before accessing it. The function
is_serdes_configed() will get wrong result when it was called before
the serdes protocol maps initialized. As the first element of the map
isn't used for any device, so use it as the flag to indicate if the
map has been initialized.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Sumit Garg [Thu, 1 Sep 2016 16:56:44 +0000 (12:56 -0400)]
ls1043ardb: PPA: add PPA validation in case of secure boot
As part of Secure Boot Chain of trust, PPA image must be validated
before the image is started.
The code for the same has been added.
Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Sumit Garg [Thu, 1 Sep 2016 16:56:43 +0000 (12:56 -0400)]
board: ls1043ardb: move sec_init to board_init
sec_init() which was earlier called in misc_init_r()
is now done in board_init() before PPA init as SEC
block will be used during PPA image validation.
Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
York Sun [Mon, 29 Aug 2016 09:04:13 +0000 (17:04 +0800)]
driver/ddr/fsl: Revise workaround
A008511 for
A009803
DDR controller 5.2.1 has this erratum
A008511 partially fixed.
The workaround needs to be adjusted to take advantage of Vref
training. This patch enables the training and force output
enable to be off.
Erratum
A009803 requires the controller to be idel before enabling
address parity. It was combined with workaround for
A008511. With
new
A008511 flow, this flow needs to be changed to enabling
data init (D_INIT) after the address parity is enabled.
Signed-off-by: York Sun <york.sun@nxp.com>
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
York Sun [Mon, 29 Aug 2016 09:04:12 +0000 (17:04 +0800)]
driver/ddr/fsl: Add more debug registers
32 more debug registers are added for newer DDR controllers.
Signed-off-by: York Sun <york.sun@nxp.com>
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Shengzhou Liu [Fri, 26 Aug 2016 10:30:38 +0000 (18:30 +0800)]
armv8: fsl-layerscape: Update ddr erratum
a008336
DDR erratum
A008336 only applies to DDR controller v5.2.0.
DDR controller v5.2.1 already has default 0x43b30002 in
EDDRTQCR1 register for optimal performance.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Qianyu Gong [Wed, 3 Aug 2016 03:04:25 +0000 (11:04 +0800)]
net: fm: fix spi flash probe for using driver model
The current code would always use the speed and mode set by
CONFIG_ENV_SPI_MAX_HZ and CONFIG_ENV_SPI_MODE. But if using
SPI driver model it should get the values from DT.
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Tom Rini [Mon, 12 Sep 2016 14:05:51 +0000 (10:05 -0400)]
Prepare v2016.09
Signed-off-by: Tom Rini <trini@konsulko.com>
Cyrille Pitchen [Wed, 17 Aug 2016 07:19:39 +0000 (15:19 +0800)]
sf: fix sf probe
This patch fixes the "sf probe" command. The very first SPI flash probe
passes, for instance when u-boot tries to read its environment settings
from a (Q)SPI memory but next "sf probe" commands fail because the flash
memory node is unbound from the SPI controller children nodes.
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Simon Glass <sjg@chromium.org>
Heiko Schocher [Fri, 9 Sep 2016 06:12:49 +0000 (08:12 +0200)]
common, kconfig: move VERSION_VARIABLE to Kconfig
move VERSION_VARIABLE from board config file into a
Kconfig option.
Signed-off-by: Heiko Schocher <hs@denx.de>
Tom Rini [Fri, 9 Sep 2016 18:59:15 +0000 (14:59 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-net
Tom Rini [Fri, 9 Sep 2016 01:26:39 +0000 (21:26 -0400)]
cmd: Rework disk.c usage
We only need the function found in cmd/disk.c when we have IDE, SCSI or
USB_STORAGE enabled. While the first two are easy to get right, in the
3rd case we assume that the set of cases where we do have USB and do not
enable USB_STORAGE are small enough that we can take the small bloat of
un-discarded strings on gcc prior to 6.x
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 8 Sep 2016 20:31:26 +0000 (16:31 -0400)]
configs: Migrate CONFIG_USB_STORAGE
In some cases we were missing CONFIG_USB=y so enable that when needed.
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Joshua Scott [Tue, 6 Sep 2016 04:03:11 +0000 (16:03 +1200)]
net: asix: Fix AX88772B when used with DriverModel
A previous patch (net: asix: fix operation without eeprom) added a
two-byte shift to the packet buffer when receiving a packet on the
AX88772B.
This shift was not included when the driver was updated to work with
DriverModel. Testing on a Marvell DB-
88F6820-ACM showed that the adapter
was not functioning correctly (EHCI timeouts).
This patch brings the two-byte shift to the DriverModel implementation
of ops->recv (asix_eth_recv).
Testing on the same board, we were able to TFTP a file over and confirm
that the crc32 was correct.
Signed-off-by: Joshua Scott <joshua.scott@alliedtelesis.co.nz>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Joe Hershberger [Fri, 9 Sep 2016 18:01:24 +0000 (13:01 -0500)]
Revert "net: nfs: Correct the reply data buffer size"
This reverts commit
6279b49e6c2fdaf8665355d1777bc90cd41fcf90.
This caused a bad data crc.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reported-by: Guillaume GARDET <guillaume.gardet@free.fr>
Joe Hershberger [Fri, 9 Sep 2016 17:56:26 +0000 (12:56 -0500)]
Revert "net: nfs: Use the tx buffer to construct rpc msgs"
This reverts commit
998372b4798fd7ebb666f571950df925b8d80f69.
This caused a data abort on some platform.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reported-by: Guillaume GARDET <guillaume.gardet@free.fr>
Tom Rini [Thu, 8 Sep 2016 20:11:59 +0000 (16:11 -0400)]
configs: Resync with savedefconfig
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 9 Sep 2016 13:45:32 +0000 (09:45 -0400)]
Merge branch 'master' of git://denx.de/git/u-boot-imx
Lokesh Vutla [Tue, 6 Sep 2016 03:40:37 +0000 (09:10 +0530)]
board: ks2: README: Update to add K2G support
Update the README to add support for K2G EVM. Also
- Add steps on how to use MMC boot
- Fix load address when using CCS
- Update build target to u-boot.bin from u-boot-dtb.bin as all ks2
platforms uses DT.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Mian Yousaf Kaukab [Mon, 5 Sep 2016 21:59:22 +0000 (23:59 +0200)]
efi_loader: provide efi_mem_desc version
Provide version of struct efi_mem_desc in efi_get_memory_map().
EFI_BOOT_SERVICES.GetMemoryMap() in UEFI specification v2.6 defines
memory descriptor version to 1. Linux kernel also expects descriptor
version to be 1 and prints following warning during boot if its not:
Unexpected EFI_MEMORY_DESCRIPTOR version 0
Signed-off-by: Mian Yousaf Kaukab <yousaf.kaukab@gmail.com>
Jonathan Gray [Fri, 2 Sep 2016 22:30:14 +0000 (08:30 +1000)]
image-fit: switch ENOLINK to ENOENT
ENOLINK is not required by POSIX and does not exist on OpenBSD
and likely other systems.
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Jonathan Gray [Fri, 2 Sep 2016 22:26:55 +0000 (08:26 +1000)]
compiler.h: use system endian macros on OpenBSD
The u-boot endian macros map directly to system endian
macros on OpenBSD.
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Nishanth Menon [Fri, 2 Sep 2016 18:51:33 +0000 (13:51 -0500)]
board: am57xx: Fix missing check for beagle_x15
When beagleboard-X15 is booted, we see the following log:
Unidentified board claims BBRDX15_ in eeprom header
This is because of the missing check for x15 (the default) and reports
an error for a valid board configuration. Fix the same.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Nishanth Menon [Fri, 2 Sep 2016 07:51:45 +0000 (02:51 -0500)]
board: am57xx: MAINTAINERS: Update for current maintainer
Felipe Balbi has move on from TI and the current email ID is no longer
valid. So, replacing with Lokesh.
While at it, update missing config file which was untracked.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Robert P. J. Day [Thu, 1 Sep 2016 16:54:32 +0000 (12:54 -0400)]
global_data.h: Standardize tabs and alignment for comments
Line up comments for readibility.
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Wenbin Song [Thu, 1 Sep 2016 08:28:22 +0000 (16:28 +0800)]
pxe: Modify README to add the description about FIT image
Use environment variable "kernel_addr_r" to indicate the location
in RAM where FIT image will be stored.
Use label command "kernel" to indicate which <path> the FIT image at.
Signed-off-by: Wenbin Song <wenbin.song@nxp.com>
York Sun [Thu, 1 Sep 2016 08:28:21 +0000 (16:28 +0800)]
pxe: Fix pxe boot with FIT image
When FIT image is used, a single image provides kernel, device
tree and optionally ramdisk. Argc and argv need to be adjusted
to support this.
Test cases:
1. Booting with legacy images
2. Booting with legacy images without initrd
3. Booting with FIT image
Test commands:
1. pxe get && pxe boot
2. sysboot
Signed-off-by: York Sun <york.sun@nxp.com>
Signed-off-by: Wenbin Song <wenbin.song@nxp.com>
Robert P. J. Day [Wed, 31 Aug 2016 16:49:13 +0000 (12:49 -0400)]
common/Kconfig: Fix various innocuous typos.
Correct a small number of spelling mistakes.
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Vagrant Cascadian [Tue, 30 Aug 2016 20:16:32 +0000 (13:16 -0700)]
omap3_pandora: Only set bootargs if distro_bootcmd failed to load.
As bootargs is hard-coded for the default behavior on the
omap3_pandora, only set the bootargs if distro_bootcmd fails to
load. This leaves distro_bootcmd free to use alternate boot arguments.
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Vagrant Cascadian [Tue, 30 Aug 2016 20:16:31 +0000 (13:16 -0700)]
omap3_pandora: Switch to use config_distro_bootcmd.
Add support for using distro_bootcmd to the omap3_pandora target,
falling back to prior behavior.
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Masahiro Yamada [Tue, 30 Aug 2016 09:51:40 +0000 (18:51 +0900)]
ARM: am335x: select DM_GPIO
We are supposed to not add config entries with only "default y"
in board/SoC Kconfig files.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Masahiro Yamada [Tue, 30 Aug 2016 09:50:36 +0000 (18:50 +0900)]
Increase default of CONFIG_SYS_MALLOC_F_LEN for SPL_OF_CONTROL
If both SPL_DM and SPL_OF_CONTROL are enabled, SPL needs to bind
several devices, but CONFIG_SYS_MALLOC_F_LEN=0x400 is apparently
not enough. Increase the default to 0x2000 for the case. This
will be helpful for shorter defconfigs.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Tue, 30 Aug 2016 07:22:23 +0000 (16:22 +0900)]
ARM: armv7: move ARMV7_PSCI_NR_CPUS to Kconfig
Move this option to Kconfig and set its default value to 4; this
increases the number of supported CPUs for some boards.
It consumes 1KB memory per CPU for PSCI stack, but it should not
be a big deal, given the amount of memory used for the modern OSes.
Reviewed-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Tue, 30 Aug 2016 07:22:22 +0000 (16:22 +0900)]
ARM: armv7: move CONFIG_ARMV7_PSCI to Kconfig
Add ARCH_SUPPORT_PSCI as a non-configurable option that platforms
can select. Then, move CONFIG_ARMV7_PSCI, which is automatically
enabled if both ARMV7_NONSEC and ARCH_SUPPORT_PSCI are enabled.
Reviewed-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Tue, 30 Aug 2016 07:22:21 +0000 (16:22 +0900)]
ARM: armv7: guard memory reserve for PSCI with #ifdef CONFIG_ARMV7_PSCI
If CONFIG_ARMV7_NONSEC is enabled, the linker script requires
CONFIG_ARMV7_PSCI_NR_CPUS regardless of CONFIG_ARMV7_PSCI.
Reviewed-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Tue, 30 Aug 2016 07:22:20 +0000 (16:22 +0900)]
ARM: tegra: remove wrong dependency on SPL_BUILD
SPL_BUILD is not a CONFIG in Kconfig, so !SPL_BUILD is always true.
Reviewed-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Vagrant Cascadian [Mon, 29 Aug 2016 07:56:06 +0000 (00:56 -0700)]
omap3_pandora: Switch to using "load" command to load the autoboot script.
CONFIG_CMD_FS_GENERIC is enabled; use it to load the autoboot script,
rather than first attempting with fatload and falling back to
ext2load.
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Acked-by: Grazvydas Ignotas <notasas@gmail.com>
Vagrant Cascadian [Mon, 29 Aug 2016 07:56:05 +0000 (00:56 -0700)]
omap3_pandora: Fix mmc loading of autoboot script to use correct syntax.
fatload/ext2load both require that the device and partition be
specified after specifying the device type. Specify the first
partition on mmc device 0, which is the only mmc device currently
configured on the pandora.
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Acked-by: Grazvydas Ignotas <notasas@gmail.com>
Tom Rini [Fri, 26 Aug 2016 17:30:43 +0000 (13:30 -0400)]
TI: Rework SRAM definitions and maximums
On all TI platforms the ROM defines a "downloaded image" area at or near
the start of SRAM which is followed by a reserved area. As it is at
best bad form and at worst possibly harmful in corner cases to write in
this reserved area, we stop doing that by adding in the define
NON_SECURE_SRAM_IMG_END to say where the end of the downloaded image
area is and make SRAM_SCRATCH_SPACE_ADDR be one kilobyte before this.
At current we define the end of scratch space at 0x228 bytes past the
start of scratch space this this gives us a lot of room to grow. As
these scratch uses are non-optional today, all targets are modified to
respect this boundary.
Tested on OMAP4 Pandaboard, OMAP3 Beagle xM
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Nagendra T S <nagendra@mistralsolutions.com>
Cc: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Felipe Balbi <balbi@ti.com>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Paul Kocialkowski <contact@paulk.fr>
Cc: Enric Balletbo i Serra <eballetbo@gmail.com>
Cc: Adam Ford <aford173@gmail.com>
Cc: Steve Sakoman <sakoman@gmail.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Thomas Weber <weber@corscience.de>
Cc: Hannes Schmelzer <oe5hpm@oevsv.at>
Cc: Thomas Chou <thomas@wytron.com.tw>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Sam Protsenko <semen.protsenko@linaro.org>
Cc: Heiko Schocher <hs@denx.de>
Cc: Samuel Egli <samuel.egli@siemens.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Cc: Ben Whitten <ben.whitten@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: "B, Ravi" <ravibabu@ti.com>
Cc: "Matwey V. Kornilov" <matwey.kornilov@gmail.com>
Cc: Ladislav Michl <ladis@linux-mips.org>
Cc: Ash Charles <ashcharles@gmail.com>
Cc: "Kipisz, Steven" <s-kipisz2@ti.com>
Cc: Daniel Allred <d-allred@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Lokesh Vutla <lokeshvutla@ti.com>
Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
Tested-by: Ladislav Michl <ladis@linux-mips.org>
Adam Ford [Fri, 26 Aug 2016 12:53:53 +0000 (07:53 -0500)]
omap3logic: Fix PBIAS Bug
The PBIAS fixing is done in the MMC driver, and doing it in the
the board file conflicts with the driver causing intermittent
hangs on reboot. Remove this from the board file and let
the driver do it.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Xu Ziyuan [Fri, 26 Aug 2016 11:54:49 +0000 (19:54 +0800)]
README: add cmd directory description
All of the command files have moved to cmd directory, add description to
Directory Hierarchy.
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Hannes Schmelzer [Thu, 25 Aug 2016 07:18:56 +0000 (09:18 +0200)]
board/BuR/common: increase NET_RETRY_COUNT to 10
Sometimes boards may need more time to become stable network connection
due to several reasons:
- phy speed
- link-partner (switch)
Therefore we increase the retry-count to 10 for making sure that network
connection works always.
Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Tom Rini <trini@konsulko.com>
Madan Srinivas [Wed, 24 Aug 2016 20:41:22 +0000 (16:41 -0400)]
configs: am4xhs: Modify SPL load address to fix UART boot issue
An issue in the TI secure image generation tool causes the ROM to
load the SPL at a different load address than what is specified by
CONFIG_ISW_ENTRY_ADDR while doing a peripheral boot on HS devices.
This causes the SPL to fail on secure devices during peripheral
boot.
The TI secure image generation tool has been fixed so that the SPL
will always be loaded at 0x403018E0 by the ROM code for both
peripheral and memory boot modes.
Signed-off-by: Madan Srinivas <madans@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Andreas Dannenberg [Wed, 24 Aug 2016 19:32:18 +0000 (14:32 -0500)]
ARM: AM57xx: Enable post-processing of FIT artifacts loaded by U-Boot
Enable the platform-specific post-processing of FIT-extracted blobs such
as Kernel, DTB, and initramfs on TI AM57xx high-security (HS) devices
which will ultimately invoke a ROM-based API call that performs secure
processing such as blob authentication.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Andreas Dannenberg [Wed, 24 Aug 2016 19:32:17 +0000 (14:32 -0500)]
ARM: DRA7xx: Enable post-processing of FIT artifacts loaded by U-Boot
Enable the platform-specific post-processing of FIT-extracted blobs such
as Kernel, DTB, and initramfs on TI DRA7xx high-security (HS) devices
which will ultimately invoke a ROM-based API call that performs secure
processing such as blob authentication.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Andreas Dannenberg [Wed, 24 Aug 2016 19:32:16 +0000 (14:32 -0500)]
ARM: AM43xx: Enable post-processing of FIT artifacts loaded by U-Boot
Enable the platform-specific post-processing of FIT-extracted blobs such
as Kernel, DTB, and initramfs on TI AM43xx high-security (HS) devices
which will ultimately invoke a ROM-based API call that performs secure
processing such as blob authentication.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Paul Kocialkowski [Wed, 24 Aug 2016 18:04:42 +0000 (20:04 +0200)]
spl: Rework image header parse to allow abort on raw image and os boot
This reworks spl_set_header_raw_uboot to allow having both os boot
(which comes with a valid header) and aborting when no valid header is
found (thus excluding raw u-boot.bin images).
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@konsulko.com>
John Keeping [Mon, 22 Aug 2016 14:10:09 +0000 (15:10 +0100)]
regulator: fixed: obey startup delay
When enabling a fixed regulator, it may take some time to rise to the
correct voltage. If we do not delay here then subsequent operations
will fail.
Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Mon, 22 Aug 2016 13:18:22 +0000 (22:18 +0900)]
tools: moveconfig: add --spl option to move options for SPL build
Prior to this commit, the tool could not move options guarded by
CONFIG_SPL_BUILD ifdef conditionals because they do not show up in
include/autoconf.mk. This new option, if given, makes the tool
parse spl/include/autoconf.mk instead of include/autoconf.mk,
which is probably preferred behavior when moving options for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Masahiro Yamada [Mon, 22 Aug 2016 13:18:21 +0000 (22:18 +0900)]
tools: moveconfig: warn loudly if moved option has no entry in Kconfig
Currently, the tool gives up moving an option quietly if its entry
was not found in Kconfig.
If the option is not defined in the config header in the first
place, it is no problem (as the Kconfig entry may have been hidden
by reasonable "depends on").
However, if the option is defined in the config header, the missing
Kconfig entry is a sign of possible behavior change. It is highly
recommended to manually check if the option has been moved as
expected. In this case, let's add "suspicious" in the log and
change the log color (if --color option is given) to make it stand
out.
This was suggested by Tom in [1].
[1] http://lists.denx.de/pipermail/u-boot/2016-July/261988.html
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Suggested-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Masahiro Yamada [Mon, 22 Aug 2016 13:18:20 +0000 (22:18 +0900)]
tools: moveconfig: use sets instead of lists for failed/suspicious boards
The sets feature is handier for adding unique elements.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Masahiro Yamada [Mon, 22 Aug 2016 13:18:19 +0000 (22:18 +0900)]
tools: moveconfig: remove document about deprecated error message
Since commit
cc008299f852 ("tools: moveconfig: do not rely on type
and default value given by users"), we do not have this error case.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Beniamino Galvani [Tue, 16 Aug 2016 09:49:50 +0000 (11:49 +0200)]
meson: odroid-c2: enable Ethernet support through the device tree
Remove the device definition from board file, update the driver with
the new compatible property and update config with necessary options.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Beniamino Galvani [Tue, 16 Aug 2016 09:49:49 +0000 (11:49 +0200)]
pinctrl: add driver for meson-gxbb pin controller
Add a pin controller driver for Meson GXBB adapted from Linux kernel.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Beniamino Galvani [Tue, 16 Aug 2016 09:49:48 +0000 (11:49 +0200)]
arm: dts: update DTS files for meson-gxbb and odroid-c2
Import DTS files and dt-bindings includes from Linux 4.8-rc1.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Beniamino Galvani [Tue, 16 Aug 2016 09:49:47 +0000 (11:49 +0200)]
pinctrl: generic: scan for "pins" and "groups" properties in sub-nodes
In cases where the pins and groups definitions are in a sub-node, as:
uart_a {
mux {
groups = "uart_tx_a", "uart_rx_a";
function = "uart_a";
};
};
pinctrl_generic_set_state_subnode() returns an error for the top-level
node and pinctrl_generic_set_state() fails. Instead, return success so
that the child nodes are tried.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Andreas Bießmann [Sun, 14 Aug 2016 18:31:24 +0000 (20:31 +0200)]
image-fit: fix fit_image_load() OS check
Commit
62afc601883e788f3f22291202d5b2a23c1a8b06 introduced fpga image load via
bootm but broke the OS check in fit_image_load().
This commit removes following compiler warning:
---8<---
In file included from tools/common/image-fit.c:1:
/Volumes/devel/u-boot/tools/../common/image-fit.c:1715:39: warning: use of logical '||' with constant operand [-Wconstant-logical-operand]
os_ok = image_type == IH_TYPE_FLATDT || IH_TYPE_FPGA ||
^ ~~~~~~~~~~~~
/Volumes/devel/u-boot/tools/../common/image-fit.c:1715:39: note: use '|' for a bitwise operation
os_ok = image_type == IH_TYPE_FLATDT || IH_TYPE_FPGA ||
^~
|
1 warning generated.
--->8---
Signed-off-by: Andreas Bießmann <andreas@biessmann.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Alexander Graf [Mon, 15 Aug 2016 15:48:51 +0000 (17:48 +0200)]
serial: bcm283x_mu: Detect disabled serial device
On the raspberry pi, you can disable the serial port to gain dynamic frequency
scaling which can get handy at times.
However, in such a configuration the serial controller gets its rx queue filled
up with zero bytes which then happily get transmitted on to whoever calls
getc() today.
This patch adds detection logic for that case by checking whether the RX pin is
mapped to GPIO15 and disables the mini uart if it is not mapped properly.
That way we can leave the driver enabled in the tree and can determine during
runtime whether serial is usable or not, having a single binary that allows for
uart and non-uart operation.
Signed-off-by: Alexander Graf <agraf@suse.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Alexander Graf [Thu, 11 Aug 2016 11:38:31 +0000 (13:38 +0200)]
bcm2835_gpio: Implement GPIOF_FUNC
So far we could only tell the gpio framework that a GPIO was mapped as input or
output, not as alternative function.
This patch adds support for determining whether a function is mapped as
alternative.
Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Fabio Estevam [Fri, 26 Aug 2016 00:07:20 +0000 (21:07 -0300)]
warp7: Print secure/non-secure mode info
warp7 has two targets:
- warp7_defconfig: boots in non-secure mode
- warp7_secure_defconfig: boots in secure mode
Print the mode that is being used to help users to easily identify
which target is running on the board.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Fabio Estevam [Fri, 26 Aug 2016 00:07:19 +0000 (21:07 -0300)]
warp7: Use PARTUUID to specify the rootfs location
warp7 can run different kernel versions, such as NXP 4.1 or mainline.
Currently the rootfs location is passed via mmcblk number and the
problem with this approach is that the mmcblk number for the eMMC
changes depending on the kernel version.
In order to avoid such issue, use UUID method to specify the rootfs
location.
Succesfully tested booting a NXP 4.1 and also a mainline kernel.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Fabio Estevam [Fri, 26 Aug 2016 00:07:18 +0000 (21:07 -0300)]
warp7: Add a secure mode target
NXP kernel expects to boot in secure mode, so introduce
warp7_secure_defconfig target which selects CONFIG_ARMV7_BOOT_SEC_DEFAULT.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Fabio Estevam [Mon, 29 Aug 2016 23:37:18 +0000 (20:37 -0300)]
mx6ul_14x14_ev: Enable the CCGR clocks earlier
To be in the safe side we need to enable the CCGR clocks prior
to calling arch_cpu_init().
Inspired by Tim Harvey's commit
d783c2744f9 ("imx: ventana: fix boot to SD").
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Eric Nelson <eric@nelint.com>
Tested-by: Eric Nelson <eric@nelint.com>
Fabio Estevam [Mon, 29 Aug 2016 23:37:17 +0000 (20:37 -0300)]
mx6ul_14x14_evk: Adjust SPL DDR3 settings
Adjust DDR3 initialization done in SPL by comparing them against
the NXP DCD table.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Eric Nelson <eric@nelint.com>
Fabio Estevam [Mon, 29 Aug 2016 23:37:16 +0000 (20:37 -0300)]
mx6ul_14x14_evk: Pass refsel and refr fields to avoid hang
When running a NXP 4.1 kernel with U-Boot mainline on a mx6ul-evk,
we observe a hang when going into the lowest operational point of cpufreq.
This hang issue does not happen on the NXP U-Boot version.
After comparing the SPL DDR initialization against the DCD table
from NXP U-Boot, the key difference that causes the hang is the
MDREF register setting:
DATA 4 0x021B0020 0x00000800
,which means:
REF_SEL = 0 --> Periodic refresh cycle: 64kHz
REFR = 1 ---> Refresh Rate - 2 refreshes
So adjust the MDREF initialization for mx6ul_evk accordingly
to fix the kernel hang issue at low bus frequency.
Reported-by: Eric Nelson <eric@nelint.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Eric Nelson <eric@nelint.com>
Fabio Estevam [Mon, 29 Aug 2016 23:37:15 +0000 (20:37 -0300)]
mx6: ddr: Allow changing REFSEL and REFR fields
Currently MX6 SPL DDR initialization hardcodes the REF_SEL and
REFR fields of the MDREF register as 1 and 7, respectively for
DDR3 and 0 and 3 for LPDDR2.
Looking at the MDREF initialization done via DCD we see that
boards do need to initialize these fields differently:
$ git grep 0x021b0020 board/
board/bachmann/ot1200/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800
board/ccv/xpress/imximage.cfg:DATA 4 0x021b0020 0x00000800 /* MMDC0_MDREF */
board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x7800
board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/mx6qp.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6sabresd/mx6dlsabresd.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6slevk/imximage.cfg:DATA 4 0x021b0020 0x00001800
board/freescale/mx6sxsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00000800
board/freescale/mx6sxsabresd/imximage.cfg:DATA 4 0x021b0020 0x00000800
board/warp/imximage.cfg:DATA 4 0x021b0020 0x00001800
So introduce a mechanism for users to be able to configure
REFSEL and REFR fields as needed.
Keep all the mx6 SPL users in their current REF_SEL and REFR values,
so no functional changes for the existing users.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Eric Nelson <eric@nelint.com>
Fabio Estevam [Wed, 17 Aug 2016 12:46:24 +0000 (09:46 -0300)]
mx7dsabresd: Directly write to register LDOGCTL
Register LDOGCTL contains only bit 0 as a valid bit, so there is no need
to do a read-modify-write operation.
Simplify the code by writing directly to this register.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Fabio Estevam [Wed, 17 Aug 2016 12:46:23 +0000 (09:46 -0300)]
mx7dsabresd: Directly write to register LDOGCTL
Register LDOGCTL contains only bit 0 as a valid bit, so there is no need
to do a read-modify-write operation.
Simplify the code by writing directly to this register.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Fabio Estevam [Wed, 17 Aug 2016 12:46:22 +0000 (09:46 -0300)]
pico-imx6ul: Directly write to register LDOGCTL
Register LDOGCTL contains only bit 0 as a valid bit, so there is no need
to do a read-modify-write operation.
Simplify the code by writing directly to this register.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Christopher Spinrath [Tue, 23 Aug 2016 14:08:52 +0000 (16:08 +0200)]
ARM: board: cm_fx6: fix mtd partition fixup
ft_board_setup may return early in the case that the board revision
cannot be obtained. In that case it is assumed that no revision
specific correction in the fdt is neccessary. But the mtd partitions
will not be fixed up either altough they are not revision specific.
Move the call to fdt_fixup_mtdparts in front of the revision specific
part to ensure that the partitions are fixed up even if the board
revision cannot be obtained.
While on it, fix a spelling mistake in a comment introduced by the
same commit.
Fixes:
62d6bac66038 ("ARM: board: cm_fx6: fixup mtd partitions in the fdt")
Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Nikita Kiryanov <nikita@compulab.co.il>
Eric Nelson [Fri, 5 Aug 2016 23:51:17 +0000 (16:51 -0700)]
mx6ul_14x14_evk: don't use array for SD2 card detect pad
Only a single pad is changed to change sdhc2_dat3 from an
SDIO pin to and from GPIO4:5, so remove the array and use
the imx_iomux_v3_setup_pad() routine.
Signed-off-by: Eric Nelson <eric@nelint.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Breno Lima [Mon, 8 Aug 2016 12:57:38 +0000 (09:57 -0300)]
warp7: Modify fdt_file environment variable
Use imx7s-warp.dts as fdt_file because this is the name that upstream
kernel will deploy.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Acked-by: Fabio Estevam <fabio.estevam@nxp.com>
Fabio Estevam [Mon, 15 Aug 2016 13:07:12 +0000 (10:07 -0300)]
warp: Fix RAM size runtime detection
Since commit
a13d3757f7df ("warp: Use imx_ddr_size() for calculating the
DDR size") warp board no longer boots.
The reason for the breakage is that the warp board is using the DDR
configuration from mx6slevk. A fundamental difference between warp and
mx6slevk is that warp only uses one DDR chip select while mx6slevk uses two.
The imx_ddr() function calculates the RAM size in runtime by reading the
values of registers MDCTL and MDMISC.
So in order to fix this warp boot issue, create a imximage DDR file specific
to warp, where the MDCTL register is configured to only activates a single
chip select.
Reported-by: Breno Lima <breno.lima@nxp.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Breno Lima <breno.lima@nxp.com>