Bin Meng [Thu, 5 Feb 2015 15:42:28 +0000 (23:42 +0800)]
x86: quark: Call MRC in dram_init()
Now that we have added Quark MRC codes, call MRC in dram_init() so
that DRAM can be initialized on a Quark based board.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 5 Feb 2015 15:42:27 +0000 (23:42 +0800)]
dt-bindings: Add Intel Quark MRC bindings
Add standard dt-bindings macros to be used by Intel Quark MRC node.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 5 Feb 2015 15:42:26 +0000 (23:42 +0800)]
fdtdec: Add compatible id and string for Intel Quark MRC
Add COMPAT_INTEL_QRK_MRC and "intel,quark-mrc" so that fdtdec can
decode Intel Quark MRC node.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 5 Feb 2015 15:42:25 +0000 (23:42 +0800)]
x86: quark: Enable the Memory Reference Code build
Turn on the Memory Reference code build in the quark Makefile.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 5 Feb 2015 15:42:24 +0000 (23:42 +0800)]
x86: quark: Add System Memory Controller support
The codes are actually doing the memory initialization stuff.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 5 Feb 2015 15:42:23 +0000 (23:42 +0800)]
x86: quark: Add utility codes needed for MRC
Add various utility codes needed for Quark MRC.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 5 Feb 2015 15:42:22 +0000 (23:42 +0800)]
x86: quark: Add Memory Reference Code (MRC) main routines
Add the main routines for Quark Memory Reference Code (MRC).
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 5 Feb 2015 15:42:21 +0000 (23:42 +0800)]
x86: quark: Bypass TSC calibration
For some unknown reason, the TSC calibration via PIT does not work on
Quark. Enable bypassing TSC calibration and override TSC_FREQ_IN_MHZ
to 400 per Quark datasheet in the Kconfig.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 5 Feb 2015 15:42:20 +0000 (23:42 +0800)]
x86: Allow overriding TSC_FREQ_IN_MHZ
We should allow the value of TSC_FREQ_IN_MHZ to be overridden by
the one in arch/cpu/<xxx>/Kconfig.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 2 Feb 2015 14:35:29 +0000 (22:35 +0800)]
x86: Enable the Intel quark/galileo build
Make the Intel quark/galileo support avaiable in Kconfig and Makefile.
With this patch, we can generate u-boot.rom for Intel galileo board.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 2 Feb 2015 14:35:28 +0000 (22:35 +0800)]
x86: Add basic Intel Galileo board support
New board/intel/galileo board directory with minimum codes, plus
board dts, defconfig and configuration files.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 2 Feb 2015 14:35:27 +0000 (22:35 +0800)]
x86: Add basic Intel Quark processor support
Add minimum codes to support Intel Quark SoC. DRAM initialization
is not ready yet so a hardcoded gd->ram_size is assigned.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 2 Feb 2015 14:35:26 +0000 (22:35 +0800)]
x86: quark: Add Cache-As-RAM initialization
Quark SoC contains an embedded 512KiB SRAM (eSRAM) that is
initialized by hardware. eSRAM is the ideal place to be used
for Cache-As-RAM (CAR) before system memory is available.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 2 Feb 2015 14:35:25 +0000 (22:35 +0800)]
x86: Define macros for pci configuration space access
Move PCI_REG_ADDR and PCI_REG_DATA from arch/x86/lib/pci_type1.c to
arch/x86/include/asm/pci.h, also define PCI_CFG_EN so that these
macros can be used for pci configuration space access.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 2 Feb 2015 14:35:24 +0000 (22:35 +0800)]
x86: quark: Add routines to access message bus registers
In the Quark SoC, some chipset commands are accomplished by utilizing
the internal message network within the host bridge (D0:F0). Accesses
to this network are accomplished by populating the message control
register (MCR), Message Control Register eXtension (MCRX) and the
message data register (MDR).
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 2 Feb 2015 14:35:23 +0000 (22:35 +0800)]
x86: Add header files for Intel Quark SoC defines
device.h for integrated pci devices' bdf on Quark SoC and quark.h for
various memory-mapped and i/o-mapped base addresses within SoC.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sat, 24 Jan 2015 09:17:08 +0000 (17:17 +0800)]
x86: Remove CONFIG_SATA_INTEL from x86-common.h
CONFIG_SATA_INTEL is not referenced anywhere, so remove it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 28 Jan 2015 05:13:47 +0000 (22:13 -0700)]
x86: Add support for Intel Minnowboard Max
This is a relatively low-cost x86 board in a small form factor. The main
peripherals are uSD, USB, HDMI, Ethernet and SATA. It uses an Atom 3800
series CPU. So far only the dual core 2GB variant is supported.
This uses the existing FSP support. Binary blobs are required to make this
board work. The microcode update is included as a patch (all 3000 lines of
it).
Change-Id: I0088c47fe87cf08ae635b343d32c332269062156
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 28 Jan 2015 05:13:46 +0000 (22:13 -0700)]
x86: Add some documentation on how to port U-Boot on x86
Some information has been gleaned on tools and procedures for porting
U-Boot to different x86 platforms. Add a few notes to start things off.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 28 Jan 2015 05:13:45 +0000 (22:13 -0700)]
x86: Enable bootstage features
Allow measuring of boot time using bootstage.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 28 Jan 2015 05:13:44 +0000 (22:13 -0700)]
scsi: bootstage: Measure time taken to scan the bus
On some hardware this time can be significant. Add bootstage support for
measuring this. The result can be obtained using 'bootstage report' or
passed on to the Linux via the device tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 28 Jan 2015 05:13:43 +0000 (22:13 -0700)]
x86: spi: Support ValleyView in ICH SPI driver
The base address is found in a different way and the protection bit is also
in a different place. Otherwise it is very similar.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 28 Jan 2015 05:13:42 +0000 (22:13 -0700)]
x86: Allow a UART to be set up before the FSP is ready
Since the FSP is a black box it helps to have some sort of debugging
available to check its inputs. If the debug UART is in use, set it up
after CAR is available.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 28 Jan 2015 05:13:41 +0000 (22:13 -0700)]
x86: Allow FSP Kconfig settings for all x86
While queensbay is the first chip with these settings, others will want to
use them too. Make them common.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 28 Jan 2015 05:13:40 +0000 (22:13 -0700)]
x86: Remove unnecessary casts and fix comment typos
Tidy up the FSP support code a little.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 28 Jan 2015 05:13:39 +0000 (22:13 -0700)]
x86: mmc: Move common FSP functions into a common file
Since these board functions seem to be the same for all boards which use
FSP, move them into a common file. We can adjust this later if future FSPs
need more flexibility.
This creates a generic PCI MMC device.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 28 Jan 2015 05:13:38 +0000 (22:13 -0700)]
x86: Make CAR and DRAM FSP code common
For now this code seems to be the same for all FSP platforms. Make it
common until we see what differences are required.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 28 Jan 2015 05:13:37 +0000 (22:13 -0700)]
x86: Adjust the FSP types slightly
To avoid casts, find_fsp_header() should return a pointer. Add asmlinkage
to two API functions which use that convention. UPD_TERMINATOR is common
so move it into a common file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 28 Jan 2015 05:13:36 +0000 (22:13 -0700)]
x86: Move common FSP code into a common location
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 28 Jan 2015 05:13:35 +0000 (22:13 -0700)]
x86: bootstage: Add time measurement for vesa start-up
Since we must run a PCI BIOS ROM, and this can take a calamitous amount of
time, measure it using bootstage.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 28 Jan 2015 05:13:34 +0000 (22:13 -0700)]
x86: video: Allow video ROM execution to fall back to the other method
If the BIOS emulator is not available, allow use of native execution if
available, and vice versa. This can be controlled by the caller.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 28 Jan 2015 05:13:33 +0000 (22:13 -0700)]
x86: Rename MMCONF_BASE_ADDRESS and make it common across x86
This setting will be used by more than just ivybridge so make it common.
Also rename it to PCIE_ECAM_BASE which is a more descriptive name.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 28 Jan 2015 05:13:32 +0000 (22:13 -0700)]
x86: Add an option to enabling building a ROM file
Rather than requiring the Makefile to be modified, provide a build option to
enable the ROM to be built.
We cannot do this by default since it requires binary blobs. Without these
the build will fail.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 28 Jan 2015 05:13:31 +0000 (22:13 -0700)]
usb: pci: Add XHCI driver for PCI
Add a driver which locates the available XHCI controllers on the PCI bus
and makes them available.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 28 Jan 2015 05:13:30 +0000 (22:13 -0700)]
usb: pci: Use pci_find_class() to find the device
Use the new utility function instead of local code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 28 Jan 2015 05:13:29 +0000 (22:13 -0700)]
x86: video: Enable video for Minnowboard Max
This board uses a new PCI ID.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 28 Jan 2015 05:13:28 +0000 (22:13 -0700)]
x86: pci: Add PCI IDs for Minnowboard Max
This board includes a few IDs we have not seen before.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 28 Jan 2015 05:13:27 +0000 (22:13 -0700)]
pci: Add a function to find a device by class
There is an existing function prototype in the header file but it is not
implemented. Implement something similar.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 28 Jan 2015 05:13:26 +0000 (22:13 -0700)]
x86: Enhance the microcode tool to support header files as input
Sometimes microcode is delivered as a header file. Allow the tool to
support this as well as collecting multiple microcode blocks into a
single update.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Tom Rini [Wed, 4 Feb 2015 18:30:00 +0000 (13:30 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-ubi
Tom Rini [Mon, 2 Feb 2015 17:39:29 +0000 (12:39 -0500)]
Prepare v2015.04-rc1
Signed-off-by: Tom Rini <trini@ti.com>
Tom Rini [Mon, 2 Feb 2015 17:37:34 +0000 (12:37 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-ti
Tom Rini [Mon, 2 Feb 2015 16:51:58 +0000 (11:51 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-blackfin
Tom Rini [Mon, 2 Feb 2015 15:11:44 +0000 (10:11 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-sunxi
Siarhei Siamashka [Sat, 31 Jan 2015 22:42:14 +0000 (00:42 +0200)]
sunxi: mmc: Add 'sunxi_' prefix to the static functions
This results in a much more readable callgraph, because now they
can't be confused with the function having exactly the same name
in the generic mmc code.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Siarhei Siamashka [Sat, 31 Jan 2015 22:27:06 +0000 (00:27 +0200)]
sunxi: dram: Support more sun[457]i dram parameters in Kconfig
This patch allows to configure all the important DRAM parameters in Kconfig.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Siarhei Siamashka [Sat, 31 Jan 2015 22:27:05 +0000 (00:27 +0200)]
sunxi: dram: Optionally use standard JEDEC timings for sun[457]i
In addition to the current Android magic settings, allow to optionally use
DDR3 timing parameters, which are tailored for different clock frequencies
and JEDEC speed bins. This should improve reliability and performance.
Adding '+S:CONFIG_DRAM_TIMINGS_DDR3_1066F_1333H=y' to the board defconfig
allows to use timings, which are calculated for the DDR3-1066F speed bin.
A lot of DDR3 chips, which are used in real Allwinner based devices,
support DDR3-1066F speed bin timings.
And adding '+S:CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J=y' should work
with any DDR3 chips, because this targets the slowest JEDEC speed bins.
The vendor magic values are still used by default for DRAM, but board
maintainers now have more flexibility in DRAM timings selection.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Hans de Goede [Sun, 25 Jan 2015 14:33:07 +0000 (15:33 +0100)]
sunxi: video: Force h/vsync active high when using ext. vga dac on some boards
On both my A13-OLinuxIno and my A13-OLinuxIno-Micro, the vga output gives an
unstable image when active low v or hsync is used.
The problem seems to be specific to the OLinuxIno A13 (normal & micro)
boards. I've just looked up the schematics and they use an opendrain driver
for the vga sync lines, and with sync pulses it is the logical high->low
edge of the pulse which counts for the timing, which with an active low
sync is being driven by the pull-up, and that simply seems to not drive
it hard enough to get a stable image.
So force v and hsync active high on these boards. independent of what the
modeline says. This fixes the unstable image.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Michal Suchanek [Sun, 4 Jan 2015 20:06:21 +0000 (21:06 +0100)]
sunxi: Add Inet 86VS support
Signed-off-by: Michal Suchanek <hramrach@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Paul Kocialkowski [Tue, 27 Jan 2015 18:58:46 +0000 (19:58 +0100)]
sunxi: TZX-Q8-713B7 support
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Adam Sampson [Sun, 1 Feb 2015 12:58:58 +0000 (12:58 +0000)]
sunxi: Add Linksprite_pcDuino3_Nano board / defconfig
This is a low-cost Allwinner A20 board with Arduino-style GPIO headers;
it features 1G RAM, 4G NAND flash, 1 micro-SD, 2 USB sockets, 1 micro
USB socket for OTG and another for power in, HDMI, SATA, 5V power for
SATA devices, gigabit Ethernet, an IR receiver, 3.5mm audio out and a
MIPI camera connector.
Like the BananaPi, this board needs GMAC_TX_DELAY set to 3 in order for
GMAC to work reliably at gigabit speeds.
For more details, see: http://linux-sunxi.org/LinkSprite_pcDuino3_Nano
Signed-off-by: Adam Sampson <ats@offog.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Hans de Goede [Wed, 28 Jan 2015 08:31:52 +0000 (09:31 +0100)]
sunxi: MAINTAINERS: sort entries alphabetically
Keep all entries except for the monster entry at the top alphabetically sorted.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Hans de Goede [Mon, 26 Jan 2015 15:59:12 +0000 (16:59 +0100)]
sunxi: rsb: Move rsb_set_device_mode() call to rsb_init()
It turns out that the device_mode_data is rsb specific, rather then slave
specific, so integrate the rsb_set_device_mode() call into rsb_init().
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Mon, 26 Jan 2015 15:46:43 +0000 (16:46 +0100)]
sunxi: rsb: Add sun9i (A80 support)
Add support for the A80 to the rsb code.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sun, 25 Jan 2015 11:15:14 +0000 (12:15 +0100)]
sunxi: Remove CONFIG_TARGET_FOO for sun5i and sun7i boards
CONFIG_TARGET_FOO was only used in board/sunxi/Makefile to select the
dram config for sun5i and sun7i boards and in board/sunxi/gmac.c for some
special handling of the bananapi/bananapro (both sun7i), all sun5i and sun7i
boards have been moved over to using a single dram_sun5i_autoconfig file,
and the tx clk delay handling for the Banana boards now has its own Kconfig.
IOW nothing is using CONFIG_TARGET_FOO anymore, so remove it.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sun, 25 Jan 2015 11:10:48 +0000 (12:10 +0100)]
sunxi: Add a GMAC Transmit Clock Delay Chain Kconfig option
And use this to set the GMAC Transmit Clock Delay Chain value on Banana
boards, rather then keying of CONFIG_TARGET_FOO.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sun, 25 Jan 2015 10:29:27 +0000 (11:29 +0100)]
sunxi: Convert sun5i boards to use auto dram configuration
Currently we've separate detailed dram settings for all sun5i boards, this
moves them over to using auto dram configuration so that we can get rid of
all the per board dram_foo.c files.
This has been tested on a A10s-Olinuxino, A13-Olinuxino, A13-OlinuxinoM,
mk802-a10s and r7-tv-dongle board.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Fri, 23 Jan 2015 15:40:01 +0000 (16:40 +0100)]
sunxi: Hyundai_A7HD_defconfig fix USB vbus pin config
USB1_VBUS is not used, and USB2_VBUS uses the pin normally used to control
USB1_VBUS.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Hans de Goede [Fri, 23 Jan 2015 14:28:22 +0000 (15:28 +0100)]
sunxi: Only enable i2c support in the SPL when needed
We do not need i2c support in the SPL when there is no PMIC (some sun4i
boards), or when the PMIC is not using i2c such as on sun6i and sun8i.
This reduces the SPL size from (e.g.) 21812 to 19260 bytes.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Tom Rini [Sat, 31 Jan 2015 17:40:48 +0000 (12:40 -0500)]
Merge branch 'patman' of git://git.denx.de/u-boot-x86
Tom Rini [Sat, 31 Jan 2015 17:40:26 +0000 (12:40 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-net
Simon Glass [Sat, 4 Oct 2014 02:40:36 +0000 (20:40 -0600)]
patman: Explain how to make doc/git-mailrc work
Add an explanation for how to set up git so that patman can find the alias
file. Fix up the get_maintainers message too.
Reported-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 23 Sep 2014 19:05:59 +0000 (13:05 -0600)]
sandbox: Fix README to indicate that vendor name is unset
This brings in a additional small fix which was missed in a recent update
to the README.
Suggested-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Scott Wood [Thu, 25 Sep 2014 19:30:46 +0000 (14:30 -0500)]
patman: Check commit_match before stripping leading whitespace
True commit lines start at column zero. Anything that is indented
is part of the commit message instead. I noticed this by trying to
run buildman with commit
e3a4facdfc07179ebe017a07b8de6224a935a9f3
as master, which contained a reference to a Linux commit inside
the commit message. ProcessLine saw that as a genuite commit
line, and thus buildman tried to build it, and died with an
exception because that SHA is not present in the U-Boot tree.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Acked-by: Simon Glass <sjg@chromium.org>
Peter Tyser [Mon, 26 Jan 2015 17:42:21 +0000 (11:42 -0600)]
patman: Make dry-run output match real functionality
When run with the --dry-run argument patman prints out information
showing what it would do. This information currently doesn't line up
with what patman/git send-email really do. Some basic examples:
- If an email address is addressed via "Series-cc" and "Patch-cc" patman
shows that email address would be CC-ed two times.
- If an email address is addressed via "Series-to" and "Patch-cc" patman
shows that email address would be sent TO and CC-ed.
- If an email address is addressed from a combination of tag aliases,
get_maintainer.pl output, "Series-cc", "Patch-cc", etc patman shows
that the email address would be CC-ed multiple times.
Patman currently does try to send duplicate emails like the --dry-run
output shows, but "git send-email" intelligently removes duplicate
addresses so this patch shouldn't change the non-dry-run functionality.
Change patman's output and email addressing to line up with the
"git send-email" logic. This trims down patman's dry-run output and
prevents confusion about what patman will do when emails are actually
sent.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 20 Jan 2015 03:21:34 +0000 (20:21 -0700)]
sandbox: Add a -D option to use a default device tree
It is painful to specify the full path to the device tree with the -d
option. It is normally kept in the same directory as U-Boot, so provide
an option to use this by default.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 20 Jan 2015 03:21:33 +0000 (20:21 -0700)]
sandbox: Correct cros-ec keyboard definition
The other boards got updated to the standard binding. Update sandbox as
well.
Signed-off-by: Simon Glass <sjg@chromium.org>
Alexey Brodkin [Tue, 13 Jan 2015 14:10:24 +0000 (17:10 +0300)]
net/designware: add error message on DMA reset timeout
If for some reason DMA module fails to reset user oserves only this:
--->---
# dhcp
Trying dwmac.
e0018000
FAIL
--->---
This message makes not much sense.
With proposed change error message will be more helpful:
--->---
# dhcp
Trying dwmac.
e0018000
DMA reset timeout
FAIL
--->---
For example user may do power toggle to recover board functionality.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Ian Campbell <ijc@hellion.org.uk>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@ti.com>
Acked-by: Pavel Machek <pavel@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Philippe De Muyter [Wed, 19 Feb 2014 16:21:59 +0000 (17:21 +0100)]
net: phy: micrel: add support for KSZ8895 switch in SMI mode
This patch adds a phy driver for the Micrel KSZ8895 switch. As the SoC MAC
is directly connected to the switch MAC the link to the switch is always up.
But the KSZ8895 switch can be hardwired in three configuration modes :
- not configurable with eventually an eeprom-stored configuration
- configurable by the mdio/mdc connection (SMI protocol)
- configurable by a SPI connection.
In not configurable mode, the switch starts automatically, but in the
other modes, it must be started programmatically, by writing 1 in
configuration register 1.
We only support the not configurable and mdio/mdc (aka SMI) modes here.
Signed-off-by: Philippe De Muyter <phdm@macqel.be>
Cc: Christian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Yoshinori Sato [Thu, 13 Feb 2014 14:13:41 +0000 (23:13 +0900)]
Add MS7206SE ethernet support
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Claudiu Manoil [Tue, 10 Dec 2013 13:21:04 +0000 (15:21 +0200)]
net: tsec: Fix NULL access in case init_phy() fails
If the PHY is not recognized don't access phydev (NULL)
and return 0 to signal failure.
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Tom Rini [Fri, 30 Jan 2015 18:56:15 +0000 (13:56 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-mips
Tom Rini [Fri, 30 Jan 2015 14:24:42 +0000 (09:24 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-dm
Peng Fan [Thu, 29 Jan 2015 10:03:39 +0000 (18:03 +0800)]
ARM: armv7 fix spelling of SCTRL
SCTLR is the abbreviation of System Control Register, so we should
use SCTLR but not SCTRL.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Michal Simek [Mon, 26 Jan 2015 07:52:27 +0000 (08:52 +0100)]
fpga: Extend dump description
There are missing parameters in help which fpga dump command
requires.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Linus Walleij [Fri, 23 Jan 2015 13:41:10 +0000 (14:41 +0100)]
vexpress64: support the Juno Development Platform
The Juno Development Platform is a physical Versatile Express
device with some differences from the emulated semihosting
models. The main difference is that the system is split in
a SoC and an FPGA where the SoC hosts the serial ports at
totally different adresses.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linus Walleij [Fri, 23 Jan 2015 10:50:53 +0000 (11:50 +0100)]
vexpress64: get rid of CONFIG_SYS_EXTRA_OPTIONS
The Versatile Express ARMv8 semihosted FVP platform is still
using the legacy CONFIG_SYS_EXTRA_OPTIONS method to configure
some compile-time flags. Get rid of this and create a Kconfig
entry for the FVP model, and a selectable bool for the
semihosting library.
The FVP subboard is now modeled as a target choice so we can
eventually choose between different ARMv8 versatile express
boards (FVP, base model, Juno...) this way. All dependent
symbols are updated to reflect this.
The 64bit Versatile Express board symbols are renamed
VEXPRESS64 so we have some chance to see what is actually
going on. Tested on the FVP fast model.
Acked-by: Steve Rae <srae@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Dennis Gilmore [Thu, 22 Jan 2015 18:34:20 +0000 (11:34 -0700)]
add README.distro file
Add documentation on how to setup a system to use the generic distro
configs and boot commands. This spells out what is needed to make a
system conformant, but does not limit the board to only the defaults.
Signed-off-by: Dennis Gilmore <dennis@ausil.us>
[swarren, added concept, user config, BOOT_TARGET_DEVICES sections.
edited the rest]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Minghuan Lian [Thu, 22 Jan 2015 05:21:55 +0000 (13:21 +0800)]
drivers/pci/pci_rom.c: fix compile warning under 64bit mode
Fix this:
drivers/pci/pci_rom.c:95:15: warning: cast to pointer from
integer of different size [-Wint-to-pointer-cast]
rom_header = (struct pci_rom_header *)rom_address;
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Minghuan Lian [Thu, 22 Jan 2015 05:21:54 +0000 (13:21 +0800)]
drivers/net/e1000.c: fix compile warning under 64bit mode
Fix this:
warning: cast from pointer to integer of different size
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Chris Kuethe [Thu, 22 Jan 2015 04:52:33 +0000 (20:52 -0800)]
arm: switch armltd vexpress to GENERIC_BOARD
only tested tested under QEMU with vexpress_ca9x4 ("-M vexpress-a9") and
vexpress_ca15_tc2 ("-M vexpress-a15"). Makes the ugly warning go away.
Signed-off-by: Chris Kuethe <chris.kuethe+github@gmail.com>
Stephen Warren [Mon, 19 Jan 2015 23:39:11 +0000 (16:39 -0700)]
distro_bootcmd: read DHCP boot script name from a variable
Modify $bootcmd_dhcp to read the downloaded script filename from an
environment variable rather than hard-coding it. This allows the user
(or another script) to select a different script name if they want,
without editing the whole value of $bootcmd_dhcp.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Bin Meng [Mon, 19 Jan 2015 13:32:00 +0000 (21:32 +0800)]
cmd: Fix gettime command help
Remove the additional ',' and '\n' from the gettime command help.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Daniel Schwierzeck [Thu, 29 Jan 2015 13:56:20 +0000 (14:56 +0100)]
MIPS: unify CPU code in arch/mips/cpu/
Unify and move code in arch/mips/cpu/mips[32|64]/ to arch/mips/cpu/.
The CPU specific config.mk files need to remain until
CONFIG_STANDALONE_LOAD_ADDR is converted to a global Kconfig symbol.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Daniel Schwierzeck [Thu, 29 Jan 2015 13:47:01 +0000 (14:47 +0100)]
MIPS: move au1x00 SoC code to arch/mips/mach-au1x00
Move all au1x00 code out of arch/mips/cpu/mips32 to allow
unification of CPU code in a later patch. The reorganization
of the SoC specific header files will be done in a later patch
series.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Paul Burton [Thu, 29 Jan 2015 10:04:10 +0000 (10:04 +0000)]
MIPS: handle mips64 ST0_KX bit in mips32 start.S
In preparation for sharing a single copy of start.S between mips32 &
mips64, handle setting the KX bit of the cop0 Status register when the
mips32 start.S is built for mips64.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Paul Burton [Thu, 29 Jan 2015 10:04:09 +0000 (10:04 +0000)]
MIPS: handle mips64 relocs in mips32 start.S
In preparation for sharing a single copy of start.S between mips32 &
mips64, handle mips64 relocations in the mips32 start.S when built for
mips64.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Paul Burton [Thu, 29 Jan 2015 10:04:08 +0000 (10:04 +0000)]
MIPS: use asm.h macros in mips32 start.S
Where the mips32 & mips64 implementations of start.S differ in terms of
access sizes & offsets, use the appropriate macros from asm.h to
abstract those differences away. This is in preparation for sharing a
single copy of start.S between mips32 & mips64.
The exception to this is loads of immediates to be written to the cop0
Config register, which is a 32bit register on mips64 and therefore
constants written to it can be loaded as such.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Simon Glass [Tue, 27 Jan 2015 03:29:40 +0000 (20:29 -0700)]
dm: cros_ec: Convert cros_ec_i2c over to driver model
Move this driver to use driver model and update the snow configuration to
match.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 27 Jan 2015 03:29:39 +0000 (20:29 -0700)]
dm: i2c: Add two more I2C init functions to the compatibility layer
These functions are useful in case the board calls them. Also fix a missing
parameter caused by applying the wrong patch (actually I failed to send v2
and applied v1 by mistake).
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 27 Jan 2015 03:29:38 +0000 (20:29 -0700)]
dm: exynos: dts: Set the offset length for cros_ec
The EC has no concept of offset, so use a value of 0.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 27 Jan 2015 03:29:37 +0000 (20:29 -0700)]
dm: i2c: dts: Support an offset-len device tree property
Since U-Boot can support different offset lengths (0-4 bytes), add a device
tree property to specify this. This avoids hard-coding it in the driver.
Signed-off-by: Simon Glass <sjg@chromium.org>
Przemyslaw Marczak [Tue, 27 Jan 2015 12:36:39 +0000 (13:36 +0100)]
exynos5: enable dm i2c
This patch enables CONFIG_DM_I2C and also CONFIG_DM_I2C_COMPAT.
The last one should be removed when all the i2c peripheral
drivers will use dm i2c framework.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Akshay Saraswat <akshay.s@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Przemyslaw Marczak [Tue, 27 Jan 2015 12:36:38 +0000 (13:36 +0100)]
odroid u3: enable dm i2c support
This patch enables CONFIG_DM_I2C and also CONFIG_DM_I2C_COMPAT.
The last one should be removed when the dm pmic framework will
be finished.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Przemyslaw Marczak [Tue, 27 Jan 2015 12:36:37 +0000 (13:36 +0100)]
odroid u3: dts: add missing i2c aliases
This change fixes i2c bus numbering for Odroid U3.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Przemyslaw Marczak [Tue, 27 Jan 2015 12:36:36 +0000 (13:36 +0100)]
dm: i2c: s3c24x0: adjust to dm-i2c api
This commit adjusts the s3c24x0 driver to new i2c api
based on driver-model. The driver supports standard
and high-speed i2c as previous.
Tested on Trats2, Odroid U3, Arndale, Odroid XU3
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Tested-by: Simon Glass <sjg@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Przemyslaw Marczak [Tue, 27 Jan 2015 12:36:34 +0000 (13:36 +0100)]
exynos5: pinmux: check flag for i2c config
Some versions of Exynos5 supports High-Speed I2C,
on few interfaces, this change allows support this.
The new flag is: PINMUX_FLAG_HS_MODE
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Akshay Saraswat <akshay.s@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Przemyslaw Marczak [Tue, 27 Jan 2015 12:36:33 +0000 (13:36 +0100)]
arndale: dts: add missing i2c aliases
Without this alias setting, the seq numbers
of the i2c devices are wrong.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Przemyslaw Marczak [Tue, 27 Jan 2015 12:36:32 +0000 (13:36 +0100)]
exynos4: dts: add missing i2c properties
This patch modify i2c nodes in exynos4.dtsi with:
- adding proper interrupts arrays for each i2c node,
which allows to decode periph id
- add reg address for each i2c node for i2c driver internal use
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Przemyslaw Marczak [Tue, 27 Jan 2015 12:36:31 +0000 (13:36 +0100)]
smdk5250: config: enable max77686 driver support
This commit enable support for the above driver,
which was disabled in common config.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>