oweals/u-boot.git
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-spi
Tom Rini [Wed, 14 Nov 2018 00:50:01 +0000 (19:50 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-spi

6 years agoconfigs: Resync with savedefconfig
Tom Rini [Wed, 14 Nov 2018 00:44:53 +0000 (19:44 -0500)]
configs: Resync with savedefconfig

Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agomtd: Drop duplicate MTD_PARTITIONS Kconfig option
Boris Brezillon [Tue, 13 Nov 2018 11:43:13 +0000 (12:43 +0100)]
mtd: Drop duplicate MTD_PARTITIONS Kconfig option

Commit 9c5b00973bce ("Convert CONFIG_MTD_PARTITIONS et al to Kconfig")
introduced a publicly visible Kconfig entry for the
CONFIG_MTD_PARTITIONS option, while the rework on MTD partitioning
was in progress, and we somehow did not notice that the same Kconfig
entry was added by commit 4048a5c519a8 ("mtd: declare MTD_PARTITIONS
symbol in Kconfig"), but this time as an invisible entry (this can
only be selected by other options).

Keep the non-visible version of this symbol, since MTD_PARTITIONS is
not something the user should be able to enable/disable directly.

Fixes: 4048a5c519a8 ("mtd: declare MTD_PARTITIONS symbol in Kconfig")
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agocmd: ubi: Remove useless call to mtdparts_init()
Boris Brezillon [Tue, 13 Nov 2018 11:43:12 +0000 (12:43 +0100)]
cmd: ubi: Remove useless call to mtdparts_init()

Commit c58fb2cdb3e4 ("cmd: ubi: clean the partition handling")
introduced a call to mtd_probe_devices() in the ubi_attach() path
and this function takes care of parsing mtdparts/mtdids and
creating/registering the associated mtd partitions.

The mtdparts_init() call in the ubi_detach() path is not only
unnecessary but can sometimes print error messages even when things
work properly (that's the case with SPI NAND devices that have not
been probed with 'mtd list'), which is misleading.

Remove this call to mtdparts_init() and drop the dependency on
CMD_MTDPARTS.

Fixes: c58fb2cdb3e4 ("cmd: ubi: clean the partition handling")
Reported-by: Stefan Roese <sr@denx.de>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agomtd: Make {MTDIDS, MTDPARTS}_DEFAULT visible when MTD_PARTITIONS is selected
Boris Brezillon [Tue, 13 Nov 2018 11:43:11 +0000 (12:43 +0100)]
mtd: Make {MTDIDS, MTDPARTS}_DEFAULT visible when MTD_PARTITIONS is selected

gwventana configs are relying on CMD_UBI to select CMD_MTDPARTS,
which is then making {MTDIDS,MTDPARTS}_DEFAULT options available.

We are about to remove the 'select CMD_MTDPARTS' statement in the
CMD_UBI entry, but if we do that without first making sure
{MTDIDS,MTDPARTS}_DEFAULT are visible, we end up with a build
failure when building gwventana configs.

Address that by adding a depends on MTD_PARTITIONS to
{MTDIDS,MTDPARTS}_DEFAULT which does the trick since CMD_UBI selects
MTD_UBI which in turn selects MTD_PARTITIONS.

We also get rid of the depends on CMD_MTD, since CMD_MTD also selects
MTD_PARTITIONS.

Reported-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agodfu: nand: Add missing dependency on CMD_MTDPARTS
Boris Brezillon [Tue, 13 Nov 2018 11:43:10 +0000 (12:43 +0100)]
dfu: nand: Add missing dependency on CMD_MTDPARTS

dfu_fill_entity_nand() uses find_dev_and_part() and mtdparts_init()
which are provided by cmd/mtdparts.c.

Add the dependency to avoid build failures when CMD_MTDPARTS is not
selected.

Reported-by: Jagan Teki <jagan@amarulasolutions.com>
Fixes: 6828e602b722d ("dfu: Migrate to Kconfig")
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agomtd: Use default mtdparts/mtids when not defined in the environment
Boris Brezillon [Tue, 13 Nov 2018 11:43:09 +0000 (12:43 +0100)]
mtd: Use default mtdparts/mtids when not defined in the environment

U-boot provides a mean to define default values for mtdids and mtdparts
when they're not defined in the environment. Patch mtd_probe_devices()
to use those default values when env_get("mtdparts") or
env_get("mtdids") return NULL.

This implementation is based on the logic found in cmd/mtdparts.c.

Fixes: 5db66b3aee6f ("cmd: mtd: add 'mtd' command")
Reported-by: Stefan Roese <sr@denx.de>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agoMerge tag 'u-boot-imx-20181112' of git://git.denx.de/u-boot-imx
Tom Rini [Mon, 12 Nov 2018 13:06:34 +0000 (08:06 -0500)]
Merge tag 'u-boot-imx-20181112' of git://git.denx.de/u-boot-imx

Fix build vf boards + fix gpr_init()

6 years agoimx: mkimage: add size check to the u-boot.imx make target
Marcel Ziswiler [Fri, 9 Nov 2018 14:31:17 +0000 (15:31 +0100)]
imx: mkimage: add size check to the u-boot.imx make target

The make macro to check if the binary exceeds the board size limit is
taken straight from the root Makefile.

Without this and e.g. enabled EFI Vybrid fails booting as the regular
size limit check does not take the final u-boot.imx binary size into
account which is bigger due to alignment as well as IMX header stuff.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
6 years agoboard: toradex: colibri_vf: drop SPI support
Marcel Ziswiler [Fri, 9 Nov 2018 14:31:16 +0000 (15:31 +0100)]
board: toradex: colibri_vf: drop SPI support

Drop SPI support saving precious 4 Kb on boards with tough size
restrictions.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
6 years agoboard: toradex: colibri_vf: unset CONFIG_CMDLINE_EDITING
Marcel Ziswiler [Fri, 9 Nov 2018 14:31:15 +0000 (15:31 +0100)]
board: toradex: colibri_vf: unset CONFIG_CMDLINE_EDITING

Unset CONFIG_CMDLINE_EDITING saving precious 4 Kb on boards with tough
size restrictions.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
6 years agoboard: toradex: colibri_vf: efi_loader: unset CONFIG_EFI_UNICODE_CAPITALIZATION
Marcel Ziswiler [Fri, 9 Nov 2018 14:31:14 +0000 (15:31 +0100)]
board: toradex: colibri_vf: efi_loader: unset CONFIG_EFI_UNICODE_CAPITALIZATION

Unset CONFIG_EFI_UNICODE_CAPITALIZATION on boards with tough size
restrictions.

This is analogous to commit a90bf07afc43
("efi_loader: unset CONFIG_EFI_UNICODE_CAPITALIZATION").

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
6 years agommc: dw_mmc: Add RCRC handling
Marek Vasut [Tue, 6 Nov 2018 22:42:11 +0000 (23:42 +0100)]
mmc: dw_mmc: Add RCRC handling

This patch adds check for command response CRC failure. The driver
is currently ignoring CRC check failure on command resposes which
have CRC atteched to it, which can be potentially dangerous. Even
more grueling problem happens when the command response is followed
by data transfer though, as in that case, the dwmci_data_transfer()
function will spin until it reaches the 240s timeout.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
6 years agocommon: build ymodem only on need
Jun Nie [Tue, 13 Feb 2018 08:07:55 +0000 (16:07 +0800)]
common: build ymodem only on need

Build ymodem only on need to shrink spl image size.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
6 years agocommon: Compile error with CONFIG_MULTI_DTB_FIT and not SPL
Lars Povlsen [Tue, 23 Oct 2018 08:21:25 +0000 (10:21 +0200)]
common: Compile error with CONFIG_MULTI_DTB_FIT and not SPL

common/common_fit.c is including <spl.h>, but not actually using it. The
inclusion will cuase compile error on platforms using CONFIG_OF_SEPARATE
and not SPL.

Signed-off-by: Lars Povlsen <lars.povlsen@microsemi.com>
Reviewed-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
6 years agodm: Fix typo - missed semicolon
Andy Shevchenko [Mon, 5 Nov 2018 16:24:03 +0000 (18:24 +0200)]
dm: Fix typo - missed semicolon

The commit

  484fdf5ba058 ("dm: Add support for all targets which requires MANUAL_RELOC")

introduces subtle typo, i.e. missed semicolon.

Fixes: 484fdf5ba058 ("dm: Add support for all targets which requires MANUAL_RELOC")
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
6 years agospl: fix debug prints for tiny printf
Simon Goldschmidt [Fri, 2 Nov 2018 20:49:52 +0000 (21:49 +0100)]
spl: fix debug prints for tiny printf

Tiny printf does not support %.*s and %lX. Since tiny printf should
be very common in SPL, replace these by %32s (for printing image
name) and %lx.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agoMAINTAINERS: Update stm32mp entry
Patrick Delaunay [Thu, 8 Nov 2018 16:52:21 +0000 (17:52 +0100)]
MAINTAINERS: Update stm32mp entry

Add mailing list for stm32mp architecture and board.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
6 years agofit: Add missing CR in debug output in fit_find_config_node()
Stefan Roese [Thu, 8 Nov 2018 06:00:31 +0000 (07:00 +0100)]
fit: Add missing CR in debug output in fit_find_config_node()

Testing has shown that a line-break is missing in one debug line in
fit_find_config_node().

Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoimx: imx6: perform gpr_init only on suitable cpu types
Christoph Niedermaier [Fri, 19 Oct 2018 15:40:54 +0000 (17:40 +0200)]
imx: imx6: perform gpr_init only on suitable cpu types

If the function gpr_init is used in a common MX6 spl
implementation we have to ensure that it is only called for
suitable cpu types, otherwise it breaks hardware parts like
enet1, can1, can2, etc.

Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.de>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-ubi
Tom Rini [Thu, 8 Nov 2018 12:15:29 +0000 (07:15 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-ubi

6 years agoimx8qxp_mek: Disable CONFIG_DISPLAY_CPUINFO
Bin Meng [Wed, 7 Nov 2018 11:50:35 +0000 (03:50 -0800)]
imx8qxp_mek: Disable CONFIG_DISPLAY_CPUINFO

Due to revert of commit c0434407b595, this board does not build
any more. Disable CONFIG_DISPLAY_CPUINFO for v2018.11 release.

This commit should be reverted after v2018.11 release.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agoRevert "board_f: Use static print_cpuinfo if CONFIG_CPU is active"
Bin Meng [Wed, 7 Nov 2018 11:50:34 +0000 (03:50 -0800)]
Revert "board_f: Use static print_cpuinfo if CONFIG_CPU is active"

This reverts commit c0434407b595f785fc7401237896c48c791b45fd.

It turns out commit c0434407b595 broke some boards which have DM CPU
driver with CONFIG_DISPLAY_CPUINFO option on. These boards just fail
to boot when print_cpuinfo() is called during boot.

Fixes are already sent to ML and in u-boot-dm/next, however since
we are getting close to the v2018.11 release, it's safer we revert
the original commit.

This commit should be reverted after v2018.11 release.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agoMerge tag 'xilinx-for-v2018.11-rc3' of git://git.denx.de/u-boot-microblaze
Tom Rini [Wed, 7 Nov 2018 12:10:02 +0000 (07:10 -0500)]
Merge tag 'xilinx-for-v2018.11-rc3' of git://git.denx.de/u-boot-microblaze

Xilinx fixes for v2018.11-rc3

- Fix fit loading address for Zynq

6 years agoarm: zynq: Setup non zero SPL FIT load address
Michal Simek [Wed, 17 Oct 2018 10:16:12 +0000 (12:16 +0200)]
arm: zynq: Setup non zero SPL FIT load address

Default setup is 0 which is incorrect place because it points to OCM
which is allocated for SPL only in our case.
Use address in DDR.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agofs: ubifs: Fix UBIFS decompression on 64 bit
Paul Davey [Mon, 5 Nov 2018 05:09:29 +0000 (18:09 +1300)]
fs: ubifs: Fix UBIFS decompression on 64 bit

Add local size_t variable to crypto_comp_decompress as intermediate
storage for destination length to avoid memory corruption and incorrect
results on 64 bit targets.

This is what linux does for the various lz compression implementations.

Signed-off-by: Paul Davey <paul.davey@alliedtelesis.co.nz>
Cc: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
6 years agoMerge tag 'u-boot-imx-20181106' of git://git.denx.de/u-boot-imx
Tom Rini [Tue, 6 Nov 2018 16:12:00 +0000 (11:12 -0500)]
Merge tag 'u-boot-imx-20181106' of git://git.denx.de/u-boot-imx

Fix coverity issues for i.MX8

6 years agoMerge git://git.denx.de/u-boot-marvell
Tom Rini [Tue, 6 Nov 2018 15:37:31 +0000 (10:37 -0500)]
Merge git://git.denx.de/u-boot-marvell

6 years agoMerge git://git.denx.de/u-boot-x86
Tom Rini [Tue, 6 Nov 2018 13:23:32 +0000 (08:23 -0500)]
Merge git://git.denx.de/u-boot-x86

6 years agoarm: mvebu: armada-xp-theadorable.dts: Change CS# for 2nd FPGA
Stefan Roese [Tue, 23 Oct 2018 10:25:16 +0000 (12:25 +0200)]
arm: mvebu: armada-xp-theadorable.dts: Change CS# for 2nd FPGA

The new board version has the 2nd FPGA connected via CS# 0 instead of
2 on SPI bus 1. Change this setup in the DT accordingly. Please note
that this change does still work on the old board version because the
CS signal is not used on this board.

Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoarm: mvebu: armada-xp-theadorable.dts: Add "spi-flash" compatible property
Stefan Roese [Tue, 23 Oct 2018 10:25:15 +0000 (12:25 +0200)]
arm: mvebu: armada-xp-theadorable.dts: Add "spi-flash" compatible property

Add the "spi-flash" compatible string so that the generic sf_probe
driver can probe the SPI flash on the theadorable Armada-XP board.

Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoarm: mvebu: Move PCI(e) MBUS window to end of RAM
Stefan Roese [Mon, 22 Oct 2018 12:21:17 +0000 (14:21 +0200)]
arm: mvebu: Move PCI(e) MBUS window to end of RAM

With patch 49b23e035d96 (pci: mvebu: Increase size of PCIe default mapping)
the mapping size for each PCI(e) controller was increased from 32MiB to
128MiB. This leads to problems on boards with multiple PCIe slots / ports
which are unable to map all PCIe ports, e.g. the Armada-XP theadorable:

DRAM:  2 GiB (667 MHz, 64-bit, ECC not enabled)
SF: Detected m25p128 with page size 256 Bytes, erase size 256 KiB, total 16 MiB
Cannot add window '4:f8', conflicts with another window
PCIe unable to add mbus window for mem at f0000000+08000000
Model: Marvell Armada XP theadorable

This patch moves the base address for the PCI(e) memory spaces from
0xe8000000 to the end of SDRAM (clipped to a max of 0xc0000000 right now).
This gives move room and flexibility for PCI(e) mappings.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: VlaoMao <vlaomao@gmail.com>
Tested-by: VlaoMao <vlaomao at gmail.com>
6 years agoMAINTAINERS: add NXP linux team maillist as i.MX reviewer
Peng Fan [Fri, 26 Oct 2018 02:11:42 +0000 (02:11 +0000)]
MAINTAINERS: add NXP linux team maillist as i.MX reviewer

Add NXP linux team upstream maillist as reviewer

Signed-off-by: Peng Fan <peng.fan@nxp.com>
6 years agoARM: dts: fsl-imx8qxp-mek: Move regulator outside "simple-bus"
Fabio Estevam [Fri, 26 Oct 2018 00:49:31 +0000 (21:49 -0300)]
ARM: dts: fsl-imx8qxp-mek: Move regulator outside "simple-bus"

Commit 3c28576bb0f0 ("arm: dts: imx8qxp: fix build warining")
fixed the dts warning by removing the unnecessary
#address-cells/#size-cells, but the recommendation for regulators is not
to place them under "simple-bus", so move the reg_usdhc2_vmmc regulator
accordingly.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
6 years agomx8mq_evk: README: Delete file introduced by mistake
Fabio Estevam [Fri, 26 Oct 2018 00:23:07 +0000 (21:23 -0300)]
mx8mq_evk: README: Delete file introduced by mistake

board/freescale/mx8mq_evk/README has been introduced by mistake
in commit d0dd73974c61 ("imx: add i.MX8QXP MEK board support")

Remove it for now as this should be introduced when mx8mq_evk
support is in place.

Reported-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
6 years agotools: imx8image: flatten container header only when creating container
Peng Fan [Mon, 5 Nov 2018 09:53:31 +0000 (09:53 +0000)]
tools: imx8image: flatten container header only when creating container

If there is no CONTAINER entry, there is no need to flatten container
header.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
6 years agotools: imx8image: fix coverity CID 184233
Peng Fan [Mon, 5 Nov 2018 09:53:28 +0000 (09:53 +0000)]
tools: imx8image: fix coverity CID 184233

Fix:
CID 184233:    (NEGATIVE_RETURNS)
Using variable "container" as an index to array "imx_header.fhdr".

Reported-by: Coverity
Signed-off-by: Peng Fan <peng.fan@nxp.com>
6 years agotools: imx8image: fix coverity CID 184234
Peng Fan [Mon, 5 Nov 2018 09:53:25 +0000 (09:53 +0000)]
tools: imx8image: fix coverity CID 184234

Fix:
CID 184234:    (TAINTED_SCALAR)
Using tainted variable "header.num_images - 1" as an index into an array "header.img".

Reported-by: Coverity
Signed-off-by: Peng Fan <peng.fan@nxp.com>
6 years agotools: imx8image: check lseek return value
Peng Fan [Mon, 5 Nov 2018 09:53:22 +0000 (09:53 +0000)]
tools: imx8image: check lseek return value

Check lseek return value.

Fix Coverity CID: 184236 184235 184232

Reported-by: Coverity
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
6 years agox86: acpi: Remove redundant Offset (0x00)
Andy Shevchenko [Wed, 31 Oct 2018 17:14:08 +0000 (19:14 +0200)]
x86: acpi: Remove redundant Offset (0x00)

New ACPI assembler issues a warning:

board/intel/edison/dsdt.asl.tmp     13:     Offset (0x00),
Remark   2158 -                                       ^ Unnecessary/redundant use of Offset operator

Indeed, in the OperationRegion the offset is 0x00 by default.

Thus, drop unneeded Offset() use as suggested by ACPI assembler.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-sh
Tom Rini [Sun, 4 Nov 2018 13:12:21 +0000 (08:12 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-sh

6 years agoMerge tag 'mips-fixes-for-v2018.11' of git://git.denx.de/u-boot-mips
Tom Rini [Sat, 3 Nov 2018 12:21:05 +0000 (08:21 -0400)]
Merge tag 'mips-fixes-for-v2018.11' of git://git.denx.de/u-boot-mips

- replace the dynamic size of the relocation table
  with a fixed but configurable size
- fixes non-working CONFIG_OF_SEPARATE=y due to invalid _end symbol

6 years agoMIPS: make size of relocation table fixed but configurable
Daniel Schwierzeck [Thu, 1 Nov 2018 01:02:21 +0000 (02:02 +0100)]
MIPS: make size of relocation table fixed but configurable

Currently the size of the relocation table will be shrunk
to the actual size needed. Although this gives a maximal
space saving, it messes up the _end symbol. This breaks
features like appended DTBs because the _end symbol doesn't
point to the real end of the U-Boot binary.

Remove the size shrinking and make the size of the relocation
table fixed but configurable. This follows the Linux approach
and the user can adjust the size to his needs.

Also rename the relocation table section from .rel to .data.reloc
to follow the Linux approach and to avoid ambiguities with the
.rel.* sections added by the linker.

Reported-by: Lars Povlsen <lars.povlsen@microsemi.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
6 years agommc: tmio: sdhi: Merge DTCNTL access into single register write
Marek Vasut [Wed, 13 Jun 2018 06:02:55 +0000 (08:02 +0200)]
mmc: tmio: sdhi: Merge DTCNTL access into single register write

It is perfectly fine to write th DTCNTL TAP count and enable the
SCC sampling clock operation in the same write.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agommc: tmio: sdhi: Implement waiting for DAT0 line state
Marek Vasut [Sun, 28 Oct 2018 18:28:56 +0000 (19:28 +0100)]
mmc: tmio: sdhi: Implement waiting for DAT0 line state

When the bus switches to 1.8V mode of operation, it is necessary to
verify that the card correctly initiated and completed the voltage
switch. This is done by reading out the state of DATA0 line.

This patch implement support for reading out the state of the DATA0
line, so the MMC core code can correctly switch to 1.8V mode.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agommc: tmio: sdhi: Clear HS400 settings when resetting SCC
Marek Vasut [Wed, 13 Jun 2018 06:02:55 +0000 (08:02 +0200)]
mmc: tmio: sdhi: Clear HS400 settings when resetting SCC

Make sure to clear HS400 configuration when resetting the SCC block.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agommc: tmio: sdhi: Touch SCC only when UHS capable
Marek Vasut [Sun, 28 Oct 2018 14:30:06 +0000 (15:30 +0100)]
mmc: tmio: sdhi: Touch SCC only when UHS capable

Add check to avoid touching the SCC tuning registers in case the IP
doesn't support them or if the support isn't in place yet.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agommc: tmio: Preinitialize regulator to 3.3V
Marek Vasut [Wed, 13 Jun 2018 06:02:55 +0000 (08:02 +0200)]
mmc: tmio: Preinitialize regulator to 3.3V

Preinitialize the SD card signals regulator to 3.3V, which is the
default post-reset setting, to be sure the regulator is set to a
valid value.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agommc: tmio: Configure clock before any other IOS
Marek Vasut [Wed, 13 Jun 2018 06:02:55 +0000 (08:02 +0200)]
mmc: tmio: Configure clock before any other IOS

Configure the clock settings before reconfiguring any other IO settings.
This is required when the clock must be stopped before changing eg. the
pin configuration or any of the other properties of the bus. Running the
clock configuration first allows the MMC core to do just that.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agommc: tmio: Silence transfer errors when tuning
Marek Vasut [Tue, 30 Oct 2018 21:05:54 +0000 (22:05 +0100)]
mmc: tmio: Silence transfer errors when tuning

In case the controller performs card tuning, that is, sends MMC
command 19 or 21, silence possible CRC error warning prints. The
warnings are bound to happen, since the tuning will fail for some
settings while searching for the optimal configuration of the bus
and that is perfectly OK.

This patch passes around the MMC command structure and adds check
into tmio_sd_check_error() to avoid printing CRC error warning
when the tuning happens.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agommc: tmio: Improve error handling
Marek Vasut [Tue, 30 Oct 2018 20:53:29 +0000 (21:53 +0100)]
mmc: tmio: Improve error handling

Properly handle return values and abort operations when they are
non-zero. This is a minor improvement, which fixes two remaining
unchecked return values.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agommc: tmio: Simplify pinmux handling
Marek Vasut [Sun, 28 Oct 2018 12:54:10 +0000 (13:54 +0100)]
mmc: tmio: Simplify pinmux handling

The SD UHS SDR12, SDR25, SDR50, SDR104, DDR50 and MMC HS200, HS400
modes all use 1.8V signaling, while all the legacy modes use 3.3V
signaling. While there are extra modes which use 1.2V signaling,
the existing hardware does not support those.

Simplify the pinmux such that 3.3V signaling implies legacy mode
pinmux and the rest implies UHS mode pinmux. This prevents the
massive case statement from growing further. Moreover, it fixes
an edge case where during SD 1.8V switch, the bus mode is still
set to default while the signaling is already set to 1.8V, which
results in an attempt to communicate with a 1.8V card using pins
in 3.3V mode and thus communication failure.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agoARM: rmobile: Generate fitting mem_map on Gen3
Marek Vasut [Wed, 31 Oct 2018 14:06:50 +0000 (15:06 +0100)]
ARM: rmobile: Generate fitting mem_map on Gen3

Patch "ARM: rmobile: Mark 4-64GiB as DRAM on Gen3" marked the entire
64bit DRAM space as cachable. On CortexA57, this might result in odd
side effects, where the CPU tries to prefetch from those areas and if
there is no DRAM backing them, CPU bus hang can happen.

This patch fixes it by generating the mem_map structure based on the
actual memory layout obtained from the DT, thus not marking areas
without any DRAM behind them as cachable.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Fixes: c1ec34763811d ("ARM: rmobile: Mark 4-64GiB as DRAM on Gen3")
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agopinctrl: renesas: Add POCCTRL handling to r8a77990
Marek Vasut [Wed, 31 Oct 2018 19:34:51 +0000 (20:34 +0100)]
pinctrl: renesas: Add POCCTRL handling to r8a77990

Add definition of the POCCTRL register and bits therein to R8A77990 E3
pincontrol driver. This allows the pincontrol driver to configure SDHI
pin voltage according to power-source DT property.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agopinctrl: renesas: Fix DRV register offset
Marek Vasut [Wed, 13 Jun 2018 06:02:55 +0000 (08:02 +0200)]
pinctrl: renesas: Fix DRV register offset

Use fixed 4bit size for generating the DRV register element mask,
not the size of the value, which can be smaller.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoMerge tag 'arc-for-2018.11' of git://git.denx.de/u-boot-arc
Tom Rini [Fri, 2 Nov 2018 13:39:18 +0000 (09:39 -0400)]
Merge tag 'arc-for-2018.11' of git://git.denx.de/u-boot-arc

Just 2 non-functinal changes:

 1. Rename of EMDK to EMSDP so it matches real marketing name
 2. Add essential README for IoTDK

6 years agoiot_dk: Add README
Alexey Brodkin [Wed, 31 Oct 2018 15:44:05 +0000 (18:44 +0300)]
iot_dk: Add README

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoemdk->emsdp: Rename board
Alexey Brodkin [Thu, 18 Oct 2018 06:54:58 +0000 (09:54 +0300)]
emdk->emsdp: Rename board

Real marketing name of the board was recently updated so
to accommodate that change renaming the board and all
related to it.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoarm: ti: boot: Don't read environment partition
Sam Protsenko [Tue, 30 Oct 2018 17:57:48 +0000 (19:57 +0200)]
arm: ti: boot: Don't read environment partition

This part should've been remove in commit 88d60db01168 ("arm: ti: boot:
Remove environment partition"), but I missed it somehow. Remove reading
dtb file from environment partition on eMMC, as we don't have it
anymore.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
6 years agotest: tee: fix resource leak in dm_test_tee()
Jens Wiklander [Mon, 29 Oct 2018 10:41:35 +0000 (11:41 +0100)]
test: tee: fix resource leak in dm_test_tee()

Fixes possible resource leak in dm_test_tee() reported by Coverity.

Reported-by: Coverity (CID: 184175)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
6 years agocmd: remove CONFIG_SOURCE support in Makefile
Patrick Delaunay [Thu, 25 Oct 2018 14:54:42 +0000 (16:54 +0200)]
cmd: remove CONFIG_SOURCE support in Makefile

This line is no more needed and can be removed.

Only CONFIG_CMD_SOURCE is defined in Kconfig and
used in defconfig files.

CONFIG_SOURCE if not defined in source code and
"config SOURCE" is not present in any Kconfig.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
6 years agopower: spl: add SPL_DM_REGULATOR_GPIO in Kconfig
Lokesh Vutla [Wed, 24 Oct 2018 15:36:50 +0000 (21:06 +0530)]
power: spl: add SPL_DM_REGULATOR_GPIO in Kconfig

The Makefile already tests for SPL_DM_REGULATOR_GPIO, but Kconfig
does not provide it. This adds SPL_DM_REGULATOR_GPIO to Kconfig.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
6 years agocmd: remoteproc: Fix the base of strtoul for ID conversion from 3 to 10
Keerthy [Wed, 24 Oct 2018 06:17:14 +0000 (11:47 +0530)]
cmd: remoteproc: Fix the base of strtoul for ID conversion from 3 to 10

Currently the base is 3 fix it 10 so that IDs follow decimal system.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvulta@ti.com>
6 years agoconfigs: sama5d2_ptc_ek: read environment from FAT
Andrei.Stefanescu@microchip.com [Tue, 23 Oct 2018 08:13:35 +0000 (08:13 +0000)]
configs: sama5d2_ptc_ek: read environment from FAT

On our demo setup for SD card boot, the u-boot environment
is in a FAT partition.

This patch changes the default configuration, specifing that
the u-boot environment is in a FAT partition instead of raw MMC.

Signed-off-by: Andrei Stefanescu <andrei.stefanescu@microchip.com>
Acked-by: Eugen Hristev <eugen.hristev@microchip.com>
6 years agoconfigs: at91: at91sam9x5ek: fix bootcmd for NAND flash
Eugen.Hristev@microchip.com [Tue, 23 Oct 2018 07:41:33 +0000 (07:41 +0000)]
configs: at91: at91sam9x5ek: fix bootcmd for NAND flash

The default bootcommand needs to be accurate w.r.t the nand memory map
at http://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91sam9x5ekMainPage#NAND_Flash_demo_Memory_map

Updated to load kernel + dtb at right offsets and boot the zImage.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
6 years agow1: fix data abort if no one wire bus master present
Martin Fuzzey [Mon, 22 Oct 2018 16:31:08 +0000 (18:31 +0200)]
w1: fix data abort if no one wire bus master present

When the "w1 bus" command is used with no bus master present
a data abort may occur.

This is because uclass_first_device() returns zero, but sets the output
struct udevice pointer to NULL in the no device found case.

Fix w1_get_bus() to account for this and return an error code
as is expected by the callers.

Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
Reviewed-by: Eugen Hristev <eugen.hristev@microchip.com>
6 years agow1-eeprom: ds24xxx: fix data abort in ds24xxx_probe()
Martin Fuzzey [Mon, 22 Oct 2018 16:31:07 +0000 (18:31 +0200)]
w1-eeprom: ds24xxx: fix data abort in ds24xxx_probe()

Data abort was occurring when using "w1 bus" with a DS24B33 present.

The abort occurred in the ds24xxx_probe() because the struct w1_device
pointer was NULL. This is because that structure  is allocated by
the parent device uclass (by .per_child_platdata_auto_alloc_size)
and thus the correct accessor is dev_get_parent_platdata() not
dev_get_platdata()

Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
Reviewed-by: Eugen Hristev <eugen.hristev@microchip.com>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-socfpga
Tom Rini [Wed, 31 Oct 2018 21:15:55 +0000 (17:15 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-socfpga

6 years agoarm: socfpga: imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
Simon Goldschmidt [Tue, 30 Oct 2018 19:21:49 +0000 (20:21 +0100)]
arm: socfpga: imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION

Using imply for SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION instead of
select ensures we can build without partition support (used to build
a network boot only version of SPL and U-Boot).

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
6 years agoarm: socfpga: Fix bootcounter located at the end of internal SRAM
Stefan Roese [Tue, 30 Oct 2018 09:00:22 +0000 (10:00 +0100)]
arm: socfpga: Fix bootcounter located at the end of internal SRAM

Commit 768f23dc8ae3 ("ARM: socfpga: Put stack at the end of SRAM") broke
those socfpga boards that keep the bootcounter at the end of the
internal SRAM as the bootcounter needs 8 bytes by default and thus the
very first SPL call to board_init_f_alloc_reserve overwrites the
bootcounter.

This patch allows to move the initial stack pointer down a bit by
checking if CONFIG_SYS_BOOTCOUNT_ADDR is located in the internal SRAM
area and then using this address as location for the start of the
stack pointer.

No new macros / defines are added by this approach.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
6 years agoarm: socfpga: fpga: fix type of local variable
Simon Goldschmidt [Mon, 15 Oct 2018 18:35:10 +0000 (20:35 +0200)]
arm: socfpga: fpga: fix type of local variable

The 'status' variable in 'socfpga_load()' for both gen5 and arria10
is of type 'unsigned long' while it is always used as 'int' only.
Change it to 'int'.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
6 years agoMerge tag 'mpc85xx-for-v2018.11' of git://git.denx.de/u-boot-mpc85xx
Tom Rini [Tue, 30 Oct 2018 20:53:42 +0000 (16:53 -0400)]
Merge tag 'mpc85xx-for-v2018.11' of git://git.denx.de/u-boot-mpc85xx

Workaround and bug fix for Freescale PowerPC

Add workaround for Freescale USB erratum A005275.
Correct RCW macros for T1080.

6 years agopowerpc: t1040: Correct RCW EC2 settings
Bin Meng [Mon, 8 Oct 2018 13:55:57 +0000 (06:55 -0700)]
powerpc: t1040: Correct RCW EC2 settings

Per T1040RM (Rev. 1, 08/2015), there are 2 issues with the RCW EC2
settings.

- The value of FSL_CORENET_RCWSR13_EC2_FM1_GPIO is wrong and should
  be 0x04000000 (value of 1 in RCW bit [420:421])
- Value of 2/3 are reserved in RCW bit [420:421], hence there is no
  macro FSL_CORENET_RCWSR13_EC2_FM1_DTSEC5_MII.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Poonam Aggrwal <poonam.aggrwal@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agopowerpc: t1040: Correct RCW MAC2_GMII_SEL value
Bin Meng [Mon, 8 Oct 2018 13:55:56 +0000 (06:55 -0700)]
powerpc: t1040: Correct RCW MAC2_GMII_SEL value

Per T1040RM (Rev. 1, 08/2015), the value of
FSL_CORENET_RCWSR13_MAC2_GMII_SEL_ENET_PORT is wrong
and should be 0x00000080 (bit 440 in the RCW).

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Poonam Aggrwal <poonam.aggrwal@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agofsl/usb: Workaround for USB erratum-A005275
Chris Packham [Thu, 4 Oct 2018 07:03:53 +0000 (20:03 +1300)]
fsl/usb: Workaround for USB erratum-A005275

Workaround makes FS as default mode on all affected socs.

Add support to check erratum-A005275 validity for an soc. This info is
required to determine whether a given soc is affected by this erratum.
Add quirk for this erratum "has_fsl_erratum_a005275" . This quirk is used
to enable workaround for the errata

Force FS mode as default by:
        - making EPS as FS
        - setting PFSC bit to disable HS chirping

This workaround can be disabled by mentioning "no_erratum_a005275" in
hwconfig string

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoPrepare v2018.11-rc3 v2018.11-rc3
Tom Rini [Mon, 29 Oct 2018 20:04:26 +0000 (16:04 -0400)]
Prepare v2018.11-rc3

Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-sunxi
Tom Rini [Mon, 29 Oct 2018 15:21:00 +0000 (11:21 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-sunxi

6 years agosunxi: store DRAM size in SPL header
Andre Przywara [Thu, 25 Oct 2018 09:23:07 +0000 (17:23 +0800)]
sunxi: store DRAM size in SPL header

At the moment we rely on the infamous get_ram_size() function to learn
the actual DRAM size in U-Boot proper. This function has two issues:
1) It only works if the DRAM size is a power of two. We start to see
boards which have 3GB of (usable) DRAM, so this does not fit anymore.
2) As U-Boot has no notion of reserved memory so far, it will happily
ride through the DRAM, possibly stepping on secure-only memory. This
could be a region of DRAM reserved for OP-TEE or some other secure
payload, for instance. It will most likely crash in that case.

As the SPL DRAM init routine has very accurate knowledge of the actual
DRAM size, lets propagate this wisdom to U-Boot proper.
We re-purpose a currently reserved word in our SPL header for that.
The SPL itself stores the detected DRAM size there, and bumps the SPL
header version number in that case. U-Boot proper checks for a valid
SPL header and a high enough version number, then uses the DRAM size
from there. If the SPL header field is not sufficient, we fall back to
the old DRAM scanning routine.

Part of the DRAM might be present and probed by SPL, but not accessible
by the CPU. They're restricted in the main U-Boot binary, when accessing
the DRAM size from SPL header.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agosunxi: add Kconfig option for the maximum accessible DRAM
Icenowy Zheng [Thu, 25 Oct 2018 09:23:06 +0000 (17:23 +0800)]
sunxi: add Kconfig option for the maximum accessible DRAM

Allwinner 64-bit SoCs can use 4GiB DRAM chip, however their memory map
has only allocated 3GiB for DRAM, so only 3GiB of the DRAM is
accessible.

Add a Kconfig option for the maximum accessible DRAM.

For A80 it should be a much higher value (8GiB), but as I have no A80
device to test and originally U-Boot only supports 2GiB DRAM on A80, it
currently still falls under the 2GiB situation.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agosunxi: map DRAM part with 3G size
Icenowy Zheng [Thu, 25 Oct 2018 09:23:05 +0000 (17:23 +0800)]
sunxi: map DRAM part with 3G size

All Allwinner 64-bit SoCs now are known to be able to access 3GiB of
external DRAM, however the size of DRAM part in the MMU translation
table is still 2GiB.

Change the size of DRAM part in MMU table to 3GiB.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agosunxi: board.c: refactor SPL header checks
Andre Przywara [Thu, 25 Oct 2018 09:23:04 +0000 (17:23 +0800)]
sunxi: board.c: refactor SPL header checks

So far we have two users which want to look at the SPL header. We will
get more in the future.
Refactor the existing SPL header checks into a common function, to
simplify reusing the code.
Now that this is easy, add proper version checks to the DT name parsing.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
6 years agosunxi: Extend SPL header versioning
Andre Przywara [Thu, 25 Oct 2018 09:23:03 +0000 (17:23 +0800)]
sunxi: Extend SPL header versioning

On Allwinner SoCs we use some free bytes at the beginning of the SPL image
to store various information. We have a version byte to allow updates,
but changing this always requires all tools to be updated as well.

Introduce the concept of semantic versioning [1] to the SPL header:
The major part of the version number only changes on incompatible
updates, a minor number bump indicates backward compatibility.
This patch just documents the major/minor split, adds some comments
to the header file and uses the versioning information for the existing
users.

[1] https://semver.org

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
6 years agosunxi: disable Pine A64 model detection code on other boards
Icenowy Zheng [Thu, 25 Oct 2018 09:23:02 +0000 (17:23 +0800)]
sunxi: disable Pine A64 model detection code on other boards

The Pine A64 Plus/non-Plus model detection code is now built on all
64-bit ARM SoCs, even if the code cannot be triggered when H5/H6 is in
use.

Disable them when the board is Pine A64 by adding a Kconfig option that
is only selected on Pine A64.

On GCC 7.3.1 this makes the size of the function reduces 184 bytes, and
saves a 104 byte strstr() function, then makes SPL on H6 succeed to
build.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agoMerge git://git.denx.de/u-boot-x86
Tom Rini [Sun, 28 Oct 2018 13:28:26 +0000 (09:28 -0400)]
Merge git://git.denx.de/u-boot-x86

6 years agodrivers: cosmetic: Convert SPDX license tags to Linux Kernel style
Patrick Delaunay [Fri, 26 Oct 2018 07:02:52 +0000 (09:02 +0200)]
drivers: cosmetic: Convert SPDX license tags to Linux Kernel style

Complete in the drivers directory the work started with
commit 83d290c56fab ("SPDX: Convert all of our single
license tags to Linux Kernel style").

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
6 years agox86: Fix car_uninit weak symbol definition
Bin Meng [Thu, 25 Oct 2018 10:05:37 +0000 (03:05 -0700)]
x86: Fix car_uninit weak symbol definition

Since commit 80df194f0165 ("x86: detect unsupported relocation types"),
an error message is seen on QEMU x86 target during boot:

do_elf_reloc_fixups32: unsupported relocation type 0x1 at fff841f0, offset = 0xfff00087
do_elf_reloc_fixups32: unsupported relocation type 0x2 at fff841f8, offset = 0xfff00091

Check offset 0xfff00087 and 0xfff00091 in the u-boot ELF image,

fff00087  000df401 R_386_32          00000000   car_uninit
fff00091  000df402 R_386_PC32        00000000   car_uninit

we see R_386_32 and R_386_PC32 relocation type is generated for
symbol car_uninit, which is declared as a weak symbol in start.S.

However the actual weak symbol implementation ends up nowhere. As
we can see below, it's *UND*.

$ objdump -t u-boot | grep car_uninit
00000000  w      *UND*  00000000 car_uninit

With this fix, it is normal now.

$ objdump -t u-boot | grep car_uninit
fff00094  w    F .text.start    00000001 car_uninit

Reported-by: Hannes Schmelzer <hannes@schmelzer.or.at>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Hannes Schmelzer <oe5hpm@oevsv.at>
6 years agox86: theadorable-x86-xxx_defconfig: Move VGA BIOS to make room for U-Boot
Stefan Roese [Mon, 22 Oct 2018 12:07:56 +0000 (14:07 +0200)]
x86: theadorable-x86-xxx_defconfig: Move VGA BIOS to make room for U-Boot

The build breaks because its not fitting the U-Boot binary into the ROM
image. So lets move VGA BIOS a bit to make room for the grown U-Boot
binary.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
6 years agox86: theadorable-x86: Generate and pass root=PARTUUID instead of /dev/sdaX
Stefan Roese [Mon, 22 Oct 2018 12:07:55 +0000 (14:07 +0200)]
x86: theadorable-x86: Generate and pass root=PARTUUID instead of /dev/sdaX

To enable the root device selection (kernel cmd-line) via PARTUUID, this
patch enables CMD_PART on all missing theadorable-x86 boards and
changes the default environment to generate the root=PARTUUID string
automatically.

This fixes problems that have been noticed on systems with multiple
SATA/AHCI controller connected via PCIe, where the device name for the
root device / partition (/dev/sdaX) was incorrect.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
6 years agox86: theadorable-x86-common: Change pci hotplug cmdline parameters (again)
Stefan Roese [Mon, 22 Oct 2018 12:07:54 +0000 (14:07 +0200)]
x86: theadorable-x86-common: Change pci hotplug cmdline parameters (again)

This is needed for the PCIe hotplug to work correctly on some boards
with the newer Linux kernel versions.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
6 years agox86: BayTrail: southcluster.asl: Change PCI 64 bit address range / region
Stefan Roese [Mon, 22 Oct 2018 12:07:53 +0000 (14:07 +0200)]
x86: BayTrail: southcluster.asl: Change PCI 64 bit address range / region

To allow bigger 64 bit prefetchable PCI regions in Linux, this patch
changes the base address and range of the ACPI area passed to Linux.
BayTrail can only physically access 36 bit of PCI address space. So
just chaning the range without changing the base address won't work
here, as 0xf.ffff.ffff is already the maximum address.

With this patch, a maximum of 16 GiB of local DDR is supported. This
should be enough for all BayTrail boards though.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
6 years agovf610twr: Enable thumb2 for builds
Tom Rini [Fri, 26 Oct 2018 12:40:53 +0000 (08:40 -0400)]
vf610twr: Enable thumb2 for builds

To help with size constraints, enable thumb2 when building.

Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-net
Tom Rini [Fri, 26 Oct 2018 00:30:05 +0000 (20:30 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-net

6 years agoMerge tag 'u-boot-imx-20181025' of git://git.denx.de/u-boot-imx
Tom Rini [Thu, 25 Oct 2018 14:16:21 +0000 (10:16 -0400)]
Merge tag 'u-boot-imx-20181025' of git://git.denx.de/u-boot-imx

Merged imx8 architecture, fix build for imx8 + warnings

6 years agoarm: dts: imx8qxp: fix build warining
Peng Fan [Thu, 25 Oct 2018 08:36:49 +0000 (08:36 +0000)]
arm: dts: imx8qxp: fix build warining

Fix below build warning.

arch/arm/dts/fsl-imx8qxp-mek.dtb: Warning (avoid_unnecessary_addr_size):
/regulators: unnecessary #address-cells/#size-cells without "ranges"
or child "reg" property

Signed-off-by: Peng Fan <peng.fan@nxp.com>
6 years agoimx: mkimage: avoid stop CI when required files not exists
Peng Fan [Thu, 25 Oct 2018 08:32:40 +0000 (08:32 +0000)]
imx: mkimage: avoid stop CI when required files not exists

Introduce a new script to check whether file exists and
use that check in Makefile to avoid break CI system.

The script return 1 when the required files not exists, return 0
when files exists. The script will ignore check to u-boot-dtb.bin,
because if there is something wrong to generate u-boot-dtb.bin,
there must be some code error.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
6 years agonet: fec_mxc: add support for i.MX8X
Anatolij Gustschin [Thu, 18 Oct 2018 14:15:11 +0000 (16:15 +0200)]
net: fec_mxc: add support for i.MX8X

Add compatible property and enable the FEC ipg clock when probing
on i.MX8X. Add specific function for reading FEC clock rate via
clock driver when configuring MII speed register. Allow FEC_MXC
selection for i.MX8.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet: mvpp2: increase PHY reset pulse
Baruch Siach [Mon, 15 Oct 2018 10:16:48 +0000 (13:16 +0300)]
net: mvpp2: increase PHY reset pulse

The default Linux PHY reset delay is 10ms. This is also the requirement
for Marvell 88E151x PHYs, which are likely to be used with this Ethernet
MAC.

Cc: Stefan Chulski <stefanc@marvell.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Stefan Roese <sr@denx.de>
6 years agonet: mvpp2: fix polarity of PHY reset signal
Baruch Siach [Mon, 15 Oct 2018 10:16:47 +0000 (13:16 +0300)]
net: mvpp2: fix polarity of PHY reset signal

The dm_gpio_set_value() call sets the logical level of the GPIO signal.
That is, it takes the GPIO_ACTIVE_{LOW,HIGH} property into account. The
driver needs to assert the reset, and then deassert it. Not the other
way around.

Cc: Stefan Chulski <stefanc@marvell.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Stefan Roese <sr@denx.de>
6 years agonet/phy: Add phy-id for IN112525_S03
Priyanka Jain [Thu, 11 Oct 2018 04:47:05 +0000 (04:47 +0000)]
net/phy: Add phy-id for IN112525_S03

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet: dm: fec: Obtain the transceiver type from the DT
Martin Fuzzey [Thu, 4 Oct 2018 17:59:21 +0000 (19:59 +0200)]
net: dm: fec: Obtain the transceiver type from the DT

The DT property "phy-mode" already provides the transceiver type.
Use it so that we do not have to also set CONFIG_FEC_XCV_TYPE

Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>