oweals/u-boot.git
8 years agomtd: nand: Add+use mtd_to/from_nand and nand_get/set_controller_data
Scott Wood [Mon, 30 May 2016 18:57:56 +0000 (13:57 -0500)]
mtd: nand: Add+use mtd_to/from_nand and nand_get/set_controller_data

These functions are part of the Linux 4.6 sync.  They are being added
before the main sync patch in order to make it easier to address the
issue across all NAND drivers (many/most of which do not closely track
their Linux counterparts) separately from other merge issues.

Signed-off-by: Scott Wood <oss@buserror.net>
8 years agonand: Embed mtd_info in struct nand_chip
Scott Wood [Mon, 30 May 2016 18:57:55 +0000 (13:57 -0500)]
nand: Embed mtd_info in struct nand_chip

nand_info[] is now an array of pointers, with the actual mtd_info
instance embedded in struct nand_chip.

This is in preparation for syncing the NAND code with Linux 4.6,
which makes the same change to struct nand_chip.  It's in a separate
commit due to the large amount of changes required to accommodate the
change to nand_info[].

Signed-off-by: Scott Wood <oss@buserror.net>
8 years agomtd: nand: Remove nand_info_t typedef
Scott Wood [Mon, 30 May 2016 18:57:54 +0000 (13:57 -0500)]
mtd: nand: Remove nand_info_t typedef

This typedef serves no purpose other than causing confusion with
struct nand_chip.

Signed-off-by: Scott Wood <oss@buserror.net>
8 years agomtd: nand: Remove docg4 driver and palmtreo680 flashing tool
Scott Wood [Mon, 30 May 2016 18:57:53 +0000 (13:57 -0500)]
mtd: nand: Remove docg4 driver and palmtreo680 flashing tool

Commit ad4f54ea86b ("arm: Remove palmtreo680 board") removed the only
user of the docg4 driver and the palmtreo680 image flashing tool.  This
patch removes them.

Signed-off-by: Scott Wood <oss@buserror.net>
Cc: Mike Dunn <mikedunn@newsguy.com>
Cc: Simon Glass <sjg@chromium.org>
8 years agomtd: nand: Remove jz4740 driver
Marek Vasut [Mon, 30 May 2016 18:57:52 +0000 (13:57 -0500)]
mtd: nand: Remove jz4740 driver

This driver is not used by anyone, remove it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Scott Wood <oss@buserror.net>
Acked-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Scott Wood <oss@buserror.net>
8 years agomtd: nand: arasan_nfc: Correct nand ecc initialization
Siva Durga Prasad Paladugu [Wed, 25 May 2016 09:50:38 +0000 (15:20 +0530)]
mtd: nand: arasan_nfc: Correct nand ecc initialization

Correct the nand ecc initialization code
This fixes the issue of incorrect nand ecc
init if no device is found in ecc_matrix then
it endsup ecc init with junk initialization
instead of the most suited one.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
8 years agoarm: lib: fix push/pop-section directives
Stephen Warren [Fri, 3 Jun 2016 19:05:11 +0000 (13:05 -0600)]
arm: lib: fix push/pop-section directives

With the existing code, function symbols are defined in .text, and the
body is defined in .text.xxx. This causes (at least some version of) the
linker not to emit the function body into the final binary, since it's
part of a different section to the symbols being referenced. This of
course causes a wide variety of failures.

This change moves the push/pop-section directives before the function
symbols, and after any relate ENDPROC macro invocations, so that symbols
and bodies are all in the "pushed" sections, and thus the function bodies
are emitted into the binary.

This solves (at least) the boot problems currently seen on Tegra systems
that use SPL (i.e. all ARMv7 Tegras).

Fixes: 13b0a91a6d48 ("arm: lib: Split asm symbols into different .text subsections")
Cc: Marek Vasut <marex@denx.de>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
8 years agoMerge branch 'master' of git://git.denx.de/u-boot-socfpga
Tom Rini [Fri, 3 Jun 2016 01:42:23 +0000 (21:42 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-socfpga

8 years agoARM: k2g: Configure reset mux to device reset
Lokesh Vutla [Thu, 26 May 2016 13:35:44 +0000 (19:05 +0530)]
ARM: k2g: Configure reset mux to device reset

BOOTCFG_RSTMUX8 register controls the reset mux associated with the ARM.
Timer5(dedicated to ARM) when used as WatchDog timer, the events it
generates are routed to the above mux.

Following are the 3 events that can controlled bt the reset mux:
- Device Reset
- An interrupt to the ARM_GIC
- An interrupt to the ARM_GIC followed by a device reset.

Right now to give a default watchdog behaviour "Device reset" is
being selected.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
8 years agoarm: am57xx: Fix alignment where necessary
Keerthy [Tue, 24 May 2016 06:15:07 +0000 (11:45 +0530)]
arm: am57xx: Fix alignment where necessary

This just fixes alignment for better readability.

Signed-off-by: Keerthy <j-keerthy@ti.com>
8 years agoarm: am57xx: Fix omap_vcores assignment for am572x-idk
Keerthy [Tue, 24 May 2016 06:15:06 +0000 (11:45 +0530)]
arm: am57xx: Fix omap_vcores assignment for am572x-idk

Currently omap_vcores is wrongly assigned a default value of
beagle_x15_volts. Hence populating a new structure for am572x-idk
and assigning it to omap_vcores in the vcores_init function.

Fixes: c020d355c45ed40fe12a ("board: ti: am57xx: Add support for am572x idk in SPL")
Reported-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
8 years agoarm: omap: Introduce vcores_init function
Keerthy [Tue, 24 May 2016 06:15:05 +0000 (11:45 +0530)]
arm: omap: Introduce vcores_init function

The pmic registers for variants of am57xx boards are different
hence we need to assign them carefully based on the board type.
Add a function to assign omap_vcores after the board detection.

Signed-off-by: Keerthy <j-keerthy@ti.com>
8 years agoARM: DRA7: Add macros for voltage values for all OPPs
Anna, Suman [Mon, 23 May 2016 18:32:17 +0000 (13:32 -0500)]
ARM: DRA7: Add macros for voltage values for all OPPs

Define specific macros for the voltage values for all voltage
domains for all applicable OPPs - OPP_NOM, OPP_OD and OPP_HIGH.
No separate macros are defined for VD_MPU and VD_CORE at OPP_OD
and OPP_HIGH as these use the same values as OPP_NOM.

The current macros will be used as common macros that can be
redefined appropriately based on a selected OPP configuration
at build time.

Signed-off-by: Suman Anna <s-anna@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
8 years agoARM: DRA7: Consolidate voltage macros across different SoCs
Anna, Suman [Mon, 23 May 2016 18:32:16 +0000 (13:32 -0500)]
ARM: DRA7: Consolidate voltage macros across different SoCs

The voltage values for each voltage domain at an OPP is identical
across all the SoCs in the DRA7 family. The current code defines
one set of macros for DRA75x/DRA74x SoCs and another set for DRA72x
macros. Consolidate both these sets into a single set.

This is done so as to minimize the number of macros used when voltage
values will be added for other OPPs as well.

Signed-off-by: Suman Anna <s-anna@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
8 years agoARM: DRA7: Define common macros for efuse register offsets
Anna, Suman [Mon, 23 May 2016 18:32:15 +0000 (13:32 -0500)]
ARM: DRA7: Define common macros for efuse register offsets

Define a set of common macros for the efuse register offsets
(different for each OPP) that are used to get the AVS Class 0
voltage values and ABB configuration values. Assign these
common macros to the register offsets for OPP_NOM by default
for all voltage domains. These common macros can then be
redefined properly to point to the OPP specific efuse register
offset based on the desired OPP to program a specific voltage
domain.

Signed-off-by: Suman Anna <s-anna@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
8 years agoARM: DRA7: Update/Correct MPU and CORE OPP_NOM voltage values
Anna, Suman [Mon, 23 May 2016 18:32:14 +0000 (13:32 -0500)]
ARM: DRA7: Update/Correct MPU and CORE OPP_NOM voltage values

The current OPP_NOM voltage values defined for the MPU and CORE
voltage domains are based on the initial DRA75x_74x_SR1.1_DM data
manual. As per this DM, the PMIC boot voltage can be set to either
1.10V or 1.15V for VD_MPU, and either 1.06V or 1.15V for VD_CORE.
While the current values are correct, the latter set of values
are the values that are common across all DRA75x, DRA72x SoCs and
for all current Silicon revisions. So, update both the MPU and CORE
OPP_NOM voltages to 1.15V.

The macros are also slightly reorganized so that both the MPU and
CORE voltage domain values are defined together.

Signed-off-by: Suman Anna <s-anna@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
8 years agousb: phy: omap_usb_phy: Fix USB3_PHY DPLL configuration
Roger Quadros [Mon, 23 May 2016 14:37:50 +0000 (17:37 +0300)]
usb: phy: omap_usb_phy: Fix USB3_PHY DPLL configuration

The index returned by get_sys_clk_index() is not exactly what we expect.
Let's not rely on that and use get_sys_clk_freq() instead.

This fixes missing USB3 devices in the Linux kernel when USB is started
in u-boot. It still doesn't fix missing USB3 devices in u-boot though.

Signed-off-by: Roger Quadros <rogerq@ti.com>
8 years agodra7xx: Enable USB_PHY3 32KHz clock
Roger Quadros [Mon, 23 May 2016 14:37:49 +0000 (17:37 +0300)]
dra7xx: Enable USB_PHY3 32KHz clock

DRA7xx has a 32KHz PHY clock for USB_PHY3 that must be enabled
for USB1 instance in Super-Speed.

Signed-off-by: Roger Quadros <rogerq@ti.com>
8 years agoARM: AM57xx: AM43xx: Fix USB host
Roger Quadros [Mon, 23 May 2016 14:37:48 +0000 (17:37 +0300)]
ARM: AM57xx: AM43xx: Fix USB host

CONFIG_USB_XHCI_OMAP can be set for host mode without setting
CONFIG_USB_DWC3 which is meant for gadget mode only.
board_usb_init() was not being defined for CONFIG_USB_XHCI_OMAP
resulting in a data abort on usb start.

Define board_usb_init() for CONFIG_USB_XHCI_OMAP case. Move
gadget specific handling to within CONFIG_USB_DWC3.

Fixes: 6f1af1e358b7 ("board: ti: invoke clock API to enable and disable clocks")
Signed-off-by: Roger Quadros <rogerq@ti.com>
8 years agoARM: OMAP5+: Provide enable/disable_usb_clocks() for CONFIG_USB_XHCI_OMAP
Roger Quadros [Mon, 23 May 2016 14:37:47 +0000 (17:37 +0300)]
ARM: OMAP5+: Provide enable/disable_usb_clocks() for CONFIG_USB_XHCI_OMAP

CONFIG_USB_XHCI_OMAP is enabled for host mode independent of CONFIG_USB_DWC3
which is meant for gadget mode only. We need enable/disbale_usb_clocks() for
host mode as well so provide for it.

Fixes: 09cc14f4bcbf ("ARM: AM43xx: Add functions to enable and disable USB clocks"
Signed-off-by: Roger Quadros <rogerq@ti.com>
8 years agolib: Enable private libgcc by default
Marek Vasut [Thu, 26 May 2016 16:01:47 +0000 (18:01 +0200)]
lib: Enable private libgcc by default

This patch decouples U-Boot binary from the toolchain on systems where
private libgcc is available. Instead of pulling in functions provided
by the libgcc from the toolchain, U-Boot will use it's own set of libgcc
functions. These functions are usually imported from Linux kernel, which
also uses it's own libgcc functions instead of the ones provided by the
toolchain.

This patch solves a rather common problem. The toolchain can usually
generate code for many variants of target architecture and often even
different endianness. The libgcc on the other hand is usually compiled
for one particular configuration and the functions provided by it may
or may not be suited for use in U-Boot. This can manifest in two ways,
either the U-Boot fails to compile altogether and linker will complain
or, in the much worse case, the resulting U-Boot will build, but will
misbehave in very subtle and hard to debug ways.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoarm: lib: Split asm symbols into different .text subsections
Marek Vasut [Thu, 26 May 2016 16:01:46 +0000 (18:01 +0200)]
arm: lib: Split asm symbols into different .text subsections

Split each symbol in lib1funcs into different .text.foo section instead
of placing all of them into plain .text . This allows the linker to collect
and discard unused assembler symbols.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoarm: lib: Import Thumb1 functions
Marek Vasut [Thu, 26 May 2016 16:01:45 +0000 (18:01 +0200)]
arm: lib: Import Thumb1 functions

Import functions into lib1funcs.S which are required for Thumb1
build. These functions come from gcc 5.3.1 release.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoarm: lib: import muldi3.S from Linux
Marek Vasut [Thu, 26 May 2016 16:01:44 +0000 (18:01 +0200)]
arm: lib: import muldi3.S from Linux

Import muldi3.S from Linux 4.4.6 , commit 0d1912303e54ed1b2a371be0bba51c384dd57326
on arm32. This file implements __aeabi_lmul and it's alias __muldi3, which
is needed when doing Thumb1 builds.

This patch also defines CONFIG_THUMB2_KERNEL and CONFIG_ARM_ASM_UNIFIED
which is necessary for correct build of these files both in ARM and
Thumb mode, just like Linux does.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoarm: lib: Repair Warning: conditional infixes are deprecated in unified syntax
Marek Vasut [Thu, 26 May 2016 16:01:43 +0000 (18:01 +0200)]
arm: lib: Repair Warning: conditional infixes are deprecated in unified syntax

Fix the following warning when building for thumb2 target by tweaking the
instruction syntax:

Warning: conditional infixes are deprecated in unified syntax

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoarm: lib: Import __do_div64 from Linux
Marek Vasut [Thu, 26 May 2016 16:01:42 +0000 (18:01 +0200)]
arm: lib: Import __do_div64 from Linux

Import __do_div64 from Linux 4.4.6 , commit 0d1912303e54ed1b2a371be0bba51c384dd57326
on arm32. This function is for some toolchains, which generate _udivmoddi4()
for 64 bit division.

Since we do not support stack unwinding, instead of importing the whole
asm/unwind.h and all the baggage, this patch defines empty UNWIND() macro.

This patch also defines CONFIG_THUMB2_KERNEL and CONFIG_ARM_ASM_UNIFIED
which is necessary for correct build of these files both in ARM and
Thumb mode, just like Linux does.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoarm: lib: Fix uldivmod.S build on Thumb2
Marek Vasut [Thu, 26 May 2016 16:01:41 +0000 (18:01 +0200)]
arm: lib: Fix uldivmod.S build on Thumb2

This assembler source won't build in Thumb2 mode, so fix it adding
the necessary Thumb2 conditional macros from unified.h .

This patch also defines CONFIG_THUMB2_KERNEL and CONFIG_ARM_ASM_UNIFIED
which is necessary for correct build of these files both in ARM and
Thumb mode, just like Linux does.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoarm: lib: Sync libgcc 32b division/modulo operations
Marek Vasut [Thu, 26 May 2016 16:01:40 +0000 (18:01 +0200)]
arm: lib: Sync libgcc 32b division/modulo operations

Sync the libgcc 32bit division and modulo operations with Linux 4.4.6 ,
commit 0d1912303e54ed1b2a371be0bba51c384dd57326 . The functions in these
four files are present in lib1funcs.S in Linux, so replace these files
with lib1funcs.S from Linux.

Since we do not support stack unwinding, instead of importing the whole
asm/unwind.h and all the baggage, this patch defines empty UNWIND() macro
in lib1funcs.S . Moreover, to make all of the functions available, define
CONFIG_AEABI , which is safe, because U-Boot is always compiled with ARM
EABI.

This patch also defines CONFIG_THUMB2_KERNEL and CONFIG_ARM_ASM_UNIFIED
which is necessary for correct build of these files both in ARM and
Thumb mode, just like Linux does.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoarm: lib: Sync libgcc shift operations
Marek Vasut [Thu, 26 May 2016 16:01:39 +0000 (18:01 +0200)]
arm: lib: Sync libgcc shift operations

Sync the libgcc shift operations with Linux kernel 4.4.6 , commit
0d1912303e54ed1b2a371be0bba51c384dd57326 . Syncing these three
files is easy, as there is almost no change in them, except the
addition of Thumb support.

This patch also defines CONFIG_THUMB2_KERNEL and CONFIG_ARM_ASM_UNIFIED
which is necessary for correct build of these files both in ARM and
Thumb mode, just like Linux does.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoarm: lib: Drop underscore from private libgcc filenames
Marek Vasut [Thu, 26 May 2016 16:01:38 +0000 (18:01 +0200)]
arm: lib: Drop underscore from private libgcc filenames

Drop the underscore from the filenames of files implementing libgcc
routines. There is no functional change. This change is done to make
sync with Linux kernel easier.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoarm: include: Import unified.h from Linux kernel
Marek Vasut [Thu, 26 May 2016 16:01:37 +0000 (18:01 +0200)]
arm: include: Import unified.h from Linux kernel

Import unified.h from Linux kernel 4.4.6 , commit
0d1912303e54ed1b2a371be0bba51c384dd57326 . This header file contains
macros used in libgcc functions in Linux kernel on ARM and will be
needed for the libgcc sync.

Since unified.h defines the W(instr) macro, we must drop this from
the macro from memcpy.S , otherwise this triggers a warning about
symbol redefinition. In order to keep the changes to unified.h to
the minimum, tweak arch/arm/lib/Makefile such that it defines the
CONFIG_ARM_ASM_UNIFIED macro, which places .syntax unified into all
of the assembler files. This is mandatory.

Moreover, for Thumb2 build, define CONFIG_THUMB2_KERNEL macro if and
only if Thumb2 build is enabled. This macro is checked by unified.h
and toggles between ARM and Thumb2 variant of the instructions in the
assembler source files.

Finally, this patch defines __LINUX_ARM_ARCH__=N macro based on the
new CONFIG_SYS_ARM_ARCH Kconfig option. This macro selects between
more optimal and more dense codepaths which work on armv5 and newer
and less optimal codepaths which work on armv4 and possible armv3m.
Tegra2 needs the same special handling as it does in arch/arm/Makefile
to cater for the arm720t boot core.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoarm: config: Introduce CONFIG_SYS_ARM_ARCH
Marek Vasut [Thu, 26 May 2016 16:01:36 +0000 (18:01 +0200)]
arm: config: Introduce CONFIG_SYS_ARM_ARCH

Introduce new helper Kconfig option, which is automatically set to
the version of ARM architecture for which the U-Boot is built. This
is useful when selecting tuning options in the libgcc imported from
Linux kernel.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoARM: omap: Enable tiny printf on omap3_logic
Marek Vasut [Tue, 31 May 2016 21:12:47 +0000 (23:12 +0200)]
ARM: omap: Enable tiny printf on omap3_logic

Enable support for tiny printf on the omap3_logic board to trim down
the SPL size. This makes the SPL actually build again and fit into
the SRAM.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: lesne@alse-fr.com
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agotiny-printf: Support sprintf()
Marek Vasut [Tue, 31 May 2016 21:12:46 +0000 (23:12 +0200)]
tiny-printf: Support sprintf()

Add a simple version of this function for SPL. It does not check the buffer
size as this would add to the code size.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: lesne@alse-fr.com
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Sylvain Lesne <lesne@alse-fr.com>
Tested-by: Sylvain Lesne <lesne@alse-fr.com>
8 years agoarm: Select CONFIG_ARM64 for Cavium ThunderX
Marek Vasut [Wed, 1 Jun 2016 00:33:53 +0000 (02:33 +0200)]
arm: Select CONFIG_ARM64 for Cavium ThunderX

Select the config option, since this board is ARM64.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
8 years agomips: wdr4300: Move the CONFIG_USE_PRIVATE_LIBGCC to Kconfig
Marek Vasut [Tue, 31 May 2016 22:00:02 +0000 (00:00 +0200)]
mips: wdr4300: Move the CONFIG_USE_PRIVATE_LIBGCC to Kconfig

This fixes the last remaining libgcc warning, where the symbol was
defined twice.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agospl: Allow settings malloc_f base address
Marek Vasut [Wed, 25 May 2016 00:14:56 +0000 (02:14 +0200)]
spl: Allow settings malloc_f base address

Allow configuring the begining of the malloc_f area in SPL.
This patch uses the same CONFIG_MALLOC_F_ADDR established by
the sandbox.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
8 years agoserial: 16550: Drop OMAP1510 support
Marek Vasut [Wed, 25 May 2016 00:13:16 +0000 (02:13 +0200)]
serial: 16550: Drop OMAP1510 support

The CONFIG_OMAP1510 is no longer defined, so remove this dead code.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Nishanth Menon <nm@ti.com>
8 years agoserial: 16550: Make serial_io/out_shift available to debug mode
Marek Vasut [Wed, 25 May 2016 00:13:03 +0000 (02:13 +0200)]
serial: 16550: Make serial_io/out_shift available to debug mode

The ns16550 driver needs serial_in_shift() and serial_out_shift()
when compiled in debug UART mode, so shift the DM_SERIAL check a
little to make these functions available.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agogpio: mxs: Remove netdev.h
Marek Vasut [Wed, 25 May 2016 00:12:32 +0000 (02:12 +0200)]
gpio: mxs: Remove netdev.h

The MXS certainly does not support any sort of networking in GPIO code,
remove the netdev.h header.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agoarm: Treat arm946es as v5te
Marek Vasut [Sat, 30 Apr 2016 12:45:59 +0000 (14:45 +0200)]
arm: Treat arm946es as v5te

The arm946es is armv5te , so use -march=armv5te instead of armv4t.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@konsulko.com>
8 years agoarm: socfpga: improve raw MMC SPL boot
Sylvain Lesne [Wed, 1 Jun 2016 09:14:54 +0000 (11:14 +0200)]
arm: socfpga: improve raw MMC SPL boot

Before this patch, when booting from MMC (no filesystem), the SPL
loaded U-Boot from a fixed offset.
It will now load U-Boot from an offset of 256kB (which is 4 times the
padded SPL image) in the third partition.

This behaviour is similar to what the vendor SPL (based on
U-Boot 2013.01) does, and allows to directly 'dd' the
u-boot-with-spl.sfp file to the A2 partition.

Signed-off-by: Sylvain Lesne <lesne@alse-fr.com>
8 years agoarm: socfpga: Add missing ',' in CONFIG_BOOTARGS
Stefan Roese [Wed, 1 Jun 2016 11:24:58 +0000 (13:24 +0200)]
arm: socfpga: Add missing ',' in CONFIG_BOOTARGS

Somehow the sr1500 is missing this comma in the CONFIG_BOOTARGS
definition. This patch adds it to.

Signed-off-by: Stefan Roese <sr@denx.de>
Reported-by: Pavel Machek <pavel@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
8 years agoarm: socfpga: Enable tiny printf and simple malloc in SPL
Marek Vasut [Mon, 30 May 2016 15:09:48 +0000 (17:09 +0200)]
arm: socfpga: Enable tiny printf and simple malloc in SPL

Enable both features to reduce the SPL size by 6 kiB.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Stefan Roese <sr@denx.de>
8 years agospl: Remove bogus GD_FLG_SPL_INIT check
Marek Vasut [Mon, 30 May 2016 15:10:53 +0000 (17:10 +0200)]
spl: Remove bogus GD_FLG_SPL_INIT check

Remove the check for GD_FLG_SPL_INIT in spl_relocate_stack_gd().
The check will always fail. This is because spl_relocate_stack_gd()
is called from ARM's crt0.S and it is called before board_init_r().
The board_init_r() calls spl_init(), which sets the GD_FLG_SPL_INIT
flag.

Note that reserving the malloc area in RAM is not a problem even
if the GD_FLG_SPL_INIT flag is not set.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Stephen Warren <swarren@nvidia.com>
8 years agoarm: socfpga: Add samtec VIN|ING board
Marek Vasut [Tue, 1 Dec 2015 17:09:52 +0000 (18:09 +0100)]
arm: socfpga: Add samtec VIN|ING board

Add support for board based on the popular Altera Cyclone V SoC.
This board has the following properties:
 - 1 GiB of DRAM
 - 1 Gigabit ethernet
 - 1 USB gadget port
 - 1 USB host port with an on-board hub
 - 2 QSPI NORs connected to the Cadence QSPI core
 - Multiple I2C EEPROMs and one I2C temperature sensor

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
---
V2: Update the defconfig as per Tom's request

8 years agospl: fit: Fix load address of fit header
Lokesh Vutla [Wed, 1 Jun 2016 04:58:31 +0000 (10:28 +0530)]
spl: fit: Fix load address of fit header

When loading fit header, it should be loaded to a previous address
aligned to ARCH_DMA_MINALIGN and not 8. Fixing the same.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
8 years agoMerge branch 'master' of git://git.denx.de/u-boot-mips
Tom Rini [Tue, 31 May 2016 14:26:14 +0000 (10:26 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-mips

8 years agoMerge git://www.denx.de/git/u-boot-marvell
Tom Rini [Tue, 31 May 2016 14:26:02 +0000 (10:26 -0400)]
Merge git://www.denx.de/git/u-boot-marvell

8 years agotools/env: allow to pass NULL for environment options
Andreas Fenkart [Tue, 31 May 2016 07:21:56 +0000 (09:21 +0200)]
tools/env: allow to pass NULL for environment options

If users of the library are happy with the default, e.g. config file
name. They can pass NULL as the opts pointer. This simplifies the
transition of existing library users.
FIXES a compile error. since common_args has been removed by
a previous patch

Signed-off-by: Andreas Fenkart <andreas.fenkart@digitalstrom.com>
8 years agoRevert "image.h: Tighten up content using handy CONFIG_IS_ENABLED() macro."
Masahiro Yamada [Tue, 31 May 2016 11:41:54 +0000 (20:41 +0900)]
Revert "image.h: Tighten up content using handy CONFIG_IS_ENABLED() macro."

This reverts commit 56adbb38727320375b2f695bd04600d766d8a1b3.

Since commit 56adbb387273 ("image.h: Tighten up content using handy
CONFIG_IS_ENABLED() macro."), I found my boards fail to boot Linux
because the commit changed the logic of macros it touched.  Now,
IMAGE_ENABLE_RAMDISK_HIGH and IMAGE_BOOT_GET_CMDLINE are 0 for all
the boards.

As you can see in include/linux/kconfig.h, CONFIG_IS_ENABLE() (and
IS_ENABLED() as well) can only take a macro that is either defined
as 1 or undefined.  This is met for boolean options defined in
Kconfig.  On the other hand, CONFIG_SYS_BOOT_RAMDISK_HIGH and
CONFIG_SYS_BOOT_GET_CMDLINE are defined without any value in
arch/*/include/asm/config.h .  This kind of clean-up is welcome,
but the options should be moved to Kconfig beforehand.

Moreover, CONFIG_IS_ENABLED(SPL_CRC32_SUPPORT) looks weird.
It should be either CONFIG_IS_ENABLED(CRC32_SUPPORT) or
IS_ENABLED(CONFIG_SPL_CRC32_SUPPORT).  But, I see no define for
CONFIG_SPL_CRC32_SUPPORT anywhere.  Likewise for the other three.

The logic of IMAGE_OF_BOARD_SETUP and IMAGE_OF_SYSTEM_SETUP were
also changed for SPL.  This can be a problem for boards defining
CONFIG_SPL_OF_LIBFDT.  I guess it should have been changed to
IS_ENABLED(CONFIG_OF_BOARD_SETUP).

In the first place, if we replace the references in C code,
the macros IMAGE_* will go away.

  if (IS_ENABLED(CONFIG_OF_BOARD_SETUP) {
          ...
  }

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agomips: ath79: ap143: Reset ethernet on boot
Wills Wang [Mon, 30 May 2016 14:54:55 +0000 (22:54 +0800)]
mips: ath79: ap143: Reset ethernet on boot

This patch reset the ethernet controller for ap143 board

Signed-off-by: Wills Wang <wills.wang@live.com>
8 years agomips: ath79: Use AR933X_PLL_SWITCH_CLOCK_CONTROL_REG macro define
Wills Wang [Mon, 30 May 2016 14:54:54 +0000 (22:54 +0800)]
mips: ath79: Use AR933X_PLL_SWITCH_CLOCK_CONTROL_REG macro define

Add AR933X_PLL_SWITCH_CLOCK_CONTROL_REG define for ar933x chip.

Signed-off-by: Wills Wang <wills.wang@live.com>
8 years agomips: ath79: Add support for ungating USB and ethernet on qca953x
Wills Wang [Mon, 30 May 2016 14:54:53 +0000 (22:54 +0800)]
mips: ath79: Add support for ungating USB and ethernet on qca953x

Add code to ungate USB and ethernet controller on qca953x

Signed-off-by: Wills Wang <wills.wang@live.com>
8 years agomips: ath79: Use 8MB flash profile for mtd partition by default
Wills Wang [Mon, 30 May 2016 14:54:52 +0000 (22:54 +0800)]
mips: ath79: Use 8MB flash profile for mtd partition by default

Change bootm flash address and mtd partition table for 8MB flash profile.

Signed-off-by: Wills Wang <wills.wang@live.com>
8 years agomips: ath79: ap121: Enable ethernet
Wills Wang [Mon, 30 May 2016 14:54:51 +0000 (22:54 +0800)]
mips: ath79: ap121: Enable ethernet

This patch enable network function for ap121 board.

Signed-off-by: Wills Wang <wills.wang@live.com>
Acked-by: Marek Vasut <marex@denx.de>
8 years agomips: ath79: Rename get_bootstrap into ath79_get_bootstrap
Wills Wang [Mon, 30 May 2016 14:54:50 +0000 (22:54 +0800)]
mips: ath79: Rename get_bootstrap into ath79_get_bootstrap

Add a platform prefix for function name in order to make more readable,
and move it into ath79.h

Signed-off-by: Wills Wang <wills.wang@live.com>
Acked-by: Marek Vasut <marex@denx.de>
8 years agoMIPS: malta: add defconfigs for MIPS64
Daniel Schwierzeck [Mon, 30 May 2016 11:00:21 +0000 (13:00 +0200)]
MIPS: malta: add defconfigs for MIPS64

Add defconfigs for recently introduced MIPS64 support on
Malta boards to get more build coverage for MIPS64.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
8 years agoMIPS: Abstract cache op loops with a macro
Paul Burton [Fri, 27 May 2016 13:28:06 +0000 (14:28 +0100)]
MIPS: Abstract cache op loops with a macro

The various cache maintenance routines perform a number of loops over
cache lines. Rather than duplicate the code for performing such loops,
abstract it out into a new cache_loop macro which performs an arbitrary
number of cache ops on a range of addresses. This reduces duplication in
the existing L1 cache maintenance code & will allow for not adding
further duplication when introducing L2 cache support.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
8 years agoMIPS: Split I & D cache line size config
Paul Burton [Fri, 27 May 2016 13:28:05 +0000 (14:28 +0100)]
MIPS: Split I & D cache line size config

Allow L1 Icache & L1 Dcache line size to be specified separately, since
there's no architectural mandate that they be the same. The
[id]cache_line_size functions are tidied up to take advantage of the
fact that the Kconfig entries are always present to simply check them
for zero rather than needing to #ifdef on their presence.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
[removed CONFIG_SYS_CACHELINE_SIZE in include/configs/pic32mzdask.h]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
8 years agoMIPS: Move cache sizes to Kconfig
Paul Burton [Fri, 27 May 2016 13:28:04 +0000 (14:28 +0100)]
MIPS: Move cache sizes to Kconfig

Move details of the L1 cache line sizes & total sizes into Kconfig,
defaulting to 0. A new CONFIG_SYS_CACHE_SIZE_AUTO Kconfig entry is
introduced to allow platforms to select auto-detection of cache sizes,
and it defaults to being enabled if none of the cache sizes are set by
the configuration (ie. sizes are all the default 0), and code is
adjusted to #ifdef on that rather than on the definition of the sizes
(which will always be defined even if 0).

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
8 years agoMIPS: remove dead code from asm/u-boot-mips.h
Daniel Schwierzeck [Fri, 27 May 2016 13:31:34 +0000 (15:31 +0200)]
MIPS: remove dead code from asm/u-boot-mips.h

Those wrappers for linker symbols were once used in the MIPS
specific board.c implementation. Since the migration to generic
board.c, those wrappers are dead code and can be removed.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
8 years agonet: Add ag7xxx driver for Atheros MIPS
Marek Vasut [Tue, 24 May 2016 21:29:09 +0000 (23:29 +0200)]
net: Add ag7xxx driver for Atheros MIPS

Add ethernet driver for the AR933x and AR934x Atheros MIPS machines.
The driver could be easily extended to other WiSoCs.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Wills Wang <wills.wang@live.com>
[fixed Kconfig dependency]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
8 years agoMIPS: add tune for MIPS 34kc
Daniel Schwierzeck [Fri, 27 May 2016 13:39:39 +0000 (15:39 +0200)]
MIPS: add tune for MIPS 34kc

Add tune Kconfig option for MIPS 34kc.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
8 years agoMIPS: provide a default u-boot-spl.lds
Daniel Schwierzeck [Thu, 26 May 2016 13:28:38 +0000 (15:28 +0200)]
MIPS: provide a default u-boot-spl.lds

Provide a default linker script for SPL binaries. Start address
and size of text section and BSS section are configurable. All
sections are arranged in a way that only relevant sections are
kept in the code section for maximum size reduction. All other
sections are kept but moved outside the code section to help
with debugging.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
8 years agomalta: Allow MIPS64 builds
Paul Burton [Thu, 26 May 2016 13:49:36 +0000 (14:49 +0100)]
malta: Allow MIPS64 builds

Both real Malta boards & emulators that mimic Malta (eg. QEMU) can
support MIPS64 CPUs. Allow MIPS64 builds of U-Boot for such boards,
which enables the user to make use of the whole 64 bit address space.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
8 years agonet: pcnet: Fix init on big endian 64 bit
Paul Burton [Thu, 26 May 2016 16:32:29 +0000 (17:32 +0100)]
net: pcnet: Fix init on big endian 64 bit

If dev->iobase is 64 bits wide then writing the value of the BAR into a
pointer to iobase will not work on big endian systems, where the BAR
value will incorrectly get written to the upper 32 bits of the 64 bit
variable. Fix this by reading the BAR into a u32, matching the type
expected by pci_read_config_dword.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
8 years agonet: pcnet: Make 64 bit safe
Paul Burton [Thu, 26 May 2016 13:49:35 +0000 (14:49 +0100)]
net: pcnet: Make 64 bit safe

Fix the pcnet driver to build safely on 64 bit platforms, in preparation
for allowing MIPS64 builds for Malta boards.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
8 years agonet: pcnet: Stop converting kseg1->kseg0 addresses
Paul Burton [Thu, 26 May 2016 13:49:34 +0000 (14:49 +0100)]
net: pcnet: Stop converting kseg1->kseg0 addresses

Now that MIPS virt_to_phys can handle kseg1 addresses on MIPS32, stop
manually converting addresses to their kseg0 equivalents in the pcnet
driver.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
8 years agoMIPS: Use CPHYSADDR to implement mips32 virt_to_phys
Paul Burton [Thu, 26 May 2016 13:49:33 +0000 (14:49 +0100)]
MIPS: Use CPHYSADDR to implement mips32 virt_to_phys

Use CPHYSADDR to implement the virt_to_phys function for converting from
a virtual to a physical address for MIPS32, much as is already done for
MIPS64. This allows for virt_to_phys to work regardless of whether the
address being translated is in kseg0 or kseg1, unlike the previous
subtraction based approach which only worked for addresses in kseg0.
This allows for drivers to provide an address to virt_to_phys without
needing to manually ensure that kseg1 addresses are converted to
equivalent kseg0 addresses first.

This patch is equivalent to this Linux patch currently waiting to be
reviewed & merged:

    https://patchwork.linux-mips.org/patch/12564/

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
8 years agoarm: spear: x600: Remove EFI support to reduce image size
Stefan Roese [Wed, 27 Apr 2016 07:10:43 +0000 (09:10 +0200)]
arm: spear: x600: Remove EFI support to reduce image size

EFI is not needed on x600. So lets remove the EFI support to make it fit
into the 0x60000 image size limit again.

Signed-off-by: Stefan Roese <sr@denx.de>
8 years agoarm: spear: x600: Add support for Micrel KSZ9031 PHY
Stefan Roese [Wed, 27 Apr 2016 07:10:42 +0000 (09:10 +0200)]
arm: spear: x600: Add support for Micrel KSZ9031 PHY

As the old ethernet PHY is not available any more, the x600 board has
been redesigned with the Micrel KSZ9031 PHY. This patch adds support
to autodetect the PHY and configure the Micrel PHY correctly.

Signed-off-by: Stefan Roese <sr@denx.de>
8 years agoclearfog: add HUSH parser
Peter Robinson [Thu, 26 May 2016 08:48:24 +0000 (09:48 +0100)]
clearfog: add HUSH parser

In the big move of CONFIG_HUSH_PARSER to config files the clearfog
somehow missed out.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
8 years agoMerge branch 'master' of git://git.denx.de/u-boot-x86
Tom Rini [Mon, 30 May 2016 17:56:26 +0000 (13:56 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-x86

8 years agox86: baytrail: acpi: Fix I/O APIC ID in the MADT table
Bin Meng [Thu, 26 May 2016 02:19:13 +0000 (19:19 -0700)]
x86: baytrail: acpi: Fix I/O APIC ID in the MADT table

So far this is hardcoded to 2, but it should really be read
from the I/O APIC register.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: galileo: Enable ACPI table generation
Bin Meng [Thu, 26 May 2016 02:19:12 +0000 (19:19 -0700)]
x86: galileo: Enable ACPI table generation

Enable ACPI table generation by creating a DSDT table.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: quark: Generate ACPI FADT/MADT tables
Bin Meng [Thu, 26 May 2016 02:19:11 +0000 (19:19 -0700)]
x86: quark: Generate ACPI FADT/MADT tables

Generate quark platform-specific FADT/MADT tables.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: quark: Add platform ASL files
Bin Meng [Thu, 26 May 2016 02:19:10 +0000 (19:19 -0700)]
x86: quark: Add platform ASL files

This adds basic quark platform ASL files. They are intended to be
included in dsdt.asl of any board that is based on this platform.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: quark: Prepare device.h for inclusion by ASL
Bin Meng [Thu, 26 May 2016 02:19:09 +0000 (19:19 -0700)]
x86: quark: Prepare device.h for inclusion by ASL

There is a device.h for quark on-chip devices, mainly for definitions
of internal PCI device numbers, but it's not ready to be included by
ASL files. Update to use hex numbers for PCI dev and __ASSEMBLY__.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agoacpi: Pass -D__ASSEMBLY__ when compiling ASL files
Bin Meng [Thu, 26 May 2016 02:19:08 +0000 (19:19 -0700)]
acpi: Pass -D__ASSEMBLY__ when compiling ASL files

ASL files may include various U-Boot header files, but IASL compiler
does not understand any C language embedded in these header files.
To reuse those header files for ASL compiling, use __ASSEMBLY__ in
the header files to exclude everything that is not liked by IASL.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: acpi: Make irqroute.asl common
Bin Meng [Thu, 26 May 2016 02:19:07 +0000 (19:19 -0700)]
x86: acpi: Make irqroute.asl common

The irqroute.asl file is already common enough to all x86 platforms.
Platform ASL files need only provide a irqroute.h to describe how
internal PCI devices and PCIe downstream port devices' INTx pins are
routed to which PIRQ pin.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: acpi: Create a common irqlinks ASL file
Bin Meng [Thu, 26 May 2016 02:19:06 +0000 (19:19 -0700)]
x86: acpi: Create a common irqlinks ASL file

Move the irqlinks.asl file currently in the BayTrail directory to
a common place to be shared among all x86 platforms. As the PIRQ
routing control programming interface is common to Intel chipsets,
leave the common part in the common file, and move the platform
specific part to the platform files.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agoMerge git://git.denx.de/u-boot-dm
Tom Rini [Fri, 27 May 2016 19:49:43 +0000 (15:49 -0400)]
Merge git://git.denx.de/u-boot-dm

For odroid-c2 (arch-meson) for now disable designware eth as meson
now needs to do some harder GPIO work.

Signed-off-by: Tom Rini <trini@konsulko.com>
Conflicts:
lib/efi_loader/efi_disk.c

Modified:
configs/odroid-c2_defconfig

8 years agoMerge git://git.denx.de/u-boot-rockchip
Tom Rini [Fri, 27 May 2016 19:48:53 +0000 (15:48 -0400)]
Merge git://git.denx.de/u-boot-rockchip

8 years agoARM: OMAP4+: Fix DPLL programming sequence
Lokesh Vutla [Mon, 23 May 2016 08:01:19 +0000 (13:31 +0530)]
ARM: OMAP4+: Fix DPLL programming sequence

All the output clock parameters of a DPLL needs to be programmed before
locking the DPLL. But it is being configured after locking the DPLL which
could potentially bypass DPLL. So fixing this sequence.

Reported-by: Richard Woodruff <r-woodruff2@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
8 years agotools: Add entry for generated tools/bin2header to tools/.gitignore
Robert P. J. Day [Sun, 22 May 2016 09:46:05 +0000 (05:46 -0400)]
tools: Add entry for generated tools/bin2header to tools/.gitignore

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
8 years agotools/genboardscfg.py: remove bogus import subprocess
Masahiro Yamada [Sun, 22 May 2016 06:16:47 +0000 (15:16 +0900)]
tools/genboardscfg.py: remove bogus import subprocess

Since f6c8f38ec601 ("tools/genboardscfg.py: improve performance more
with Kconfiglib"), this tool does not use the subprocess module.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agoimage.h: Tighten up content using handy CONFIG_IS_ENABLED() macro.
Robert P. J. Day [Sat, 21 May 2016 09:06:31 +0000 (05:06 -0400)]
image.h: Tighten up content using handy CONFIG_IS_ENABLED() macro.

In order for CONFIG_IS_ENABLED(FOO) to work we need to move the changes
that CONFIG_FIT_DISABLE_SHA256 makes to be prior to the evaluation by
CONFIG_IS_ENABLED(foo)

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
[trini: Move CONFIG_FIT_DISABLE_SHA256 parts to fix build breakage]
Signed-off-by: Tom Rini <trini@konsulko.com>
8 years agoarm64: rename __asm_flush_dcache_level to __asm_dcache_level
Masahiro Yamada [Tue, 17 May 2016 07:38:08 +0000 (16:38 +0900)]
arm64: rename __asm_flush_dcache_level to __asm_dcache_level

Since 1e6ad55c0582 ("armv8/cache: Change cache invalidate and flush
function"), this routine can be used for both cache flushing and
cache invalidation.  So, it is better to not include "flush" in
this routine name.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agoarm64: fix comment "flush & invalidate"
Masahiro Yamada [Tue, 17 May 2016 07:38:07 +0000 (16:38 +0900)]
arm64: fix comment "flush & invalidate"

We should say "clean & invalidate", or simply "flush".

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agoarm64: optimize __asm_{flush, invalidate}_dcache_all
Masahiro Yamada [Tue, 17 May 2016 07:38:06 +0000 (16:38 +0900)]
arm64: optimize __asm_{flush, invalidate}_dcache_all

__asm_dcache_all can directly return to the caller of
__asm_{flush,invalidate}_dcache_all.

We do not have to waste x16 register here.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoboard: am335x: Allow to choose serial device dynamically
Lokesh Vutla [Mon, 16 May 2016 06:17:29 +0000 (11:47 +0530)]
board: am335x: Allow to choose serial device dynamically

Different AM335x based platforms have different serial consoles. As serial
console is Kconfig option a separate defconfig has to be created for each
platform. So pass the serial device dynamically.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
8 years agoARM: dts: AM335x-ICEv2: Add minimal dts support
Lokesh Vutla [Mon, 16 May 2016 06:17:28 +0000 (11:47 +0530)]
ARM: dts: AM335x-ICEv2: Add minimal dts support

Add minimal dts support for AM335x-ICEv2 board

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
8 years agoconfig: env: Set AM335x-ICEv2 board specific env
Lokesh Vutla [Mon, 16 May 2016 06:17:27 +0000 (11:47 +0530)]
config: env: Set AM335x-ICEv2 board specific env

Populate the right dtb file and console for AM335x-ICEv2 board.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
8 years agoboard: AM335x-ICEv2: Add cpsw support
Lokesh Vutla [Mon, 16 May 2016 06:17:26 +0000 (11:47 +0530)]
board: AM335x-ICEv2: Add cpsw support

In order to enable cpsw on AM335x ICEv2 board, the following needs to be done:

1)There are few on board jumper settings which gives a choice between
cpsw and PRUSS, that needs to be properly selected[1]. Even after selecting
this, there are few GPIOs which control these muxes that needs to be held high.

2) The clock to PHY is provided by a PLL-based clock synthesizer[2] connected
via I2C. This needs to properly programmed and locked for PHY operation.
And PHY needs to be reset before before being used, which is also held by
a GPIO.

3) RMII mode needs to be selected.

[1] http://www.ti.com/lit/zip/tidr336
[2] http://www.ti.com/lit/ds/symlink/cdce913.pdf

Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
8 years agoARM: AM33xx: Add support for Clock Synthesizer
Lokesh Vutla [Mon, 16 May 2016 06:17:25 +0000 (11:47 +0530)]
ARM: AM33xx: Add support for Clock Synthesizer

The CDCE913 and CDCEL913 devices are modular PLL-based, low cost,
high performance , programmable clock synthesizers. They generate
upto 3 output clocks from a single input frequency. Each output can
be programmed for any clock-frequency.

Adding support for the same.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
8 years agoboard: AM335x-ICEv2: Add DDR data
Lokesh Vutla [Mon, 16 May 2016 06:17:24 +0000 (11:47 +0530)]
board: AM335x-ICEv2: Add DDR data

AM335x ICEv2 contains a 2Gbit(128Mx16) of DDR3 SDRAM(MT41J128M16JT-125),
capable of running at 400MHz. Adding this specific DDR configuration
details running at 400MHz.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
8 years agoboard: AM335x-ICEv2: Add pinmux support
Lokesh Vutla [Mon, 16 May 2016 06:17:23 +0000 (11:47 +0530)]
board: AM335x-ICEv2: Add pinmux support

Add necessary pinmux support for AM335x ICEv2 board.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
8 years agoboard: AM335x-ICEv2: Add epprom support
Lokesh Vutla [Mon, 16 May 2016 06:17:22 +0000 (11:47 +0530)]
board: AM335x-ICEv2: Add epprom support

Similar to other TI's AM335x platforms, AM335x ICEv2 also has an
eeprom populated for its unique identification. Adding this info
so that AM335x ICEv2 specific initialization can be done.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
8 years agoconfigs: am335x_evm: Switch to env on FAT SD by default
Tom Rini [Mon, 16 May 2016 06:02:49 +0000 (11:32 +0530)]
configs: am335x_evm: Switch to env on FAT SD by default

Re-org env sections so that we can fall back to env is in FAT on SD
card, for broader board compatibility

Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>