Stefan Roese [Fri, 10 May 2019 11:34:05 +0000 (13:34 +0200)]
arm: mvebu: armada-370-xp.dtsi: Add "u-boot, dm-pre-reloc" to "internal-regs"
Without this U-Boot specific property, booting on Armada XP theadorable
fails in SPL. All nodes in the "internal-regs" (simple-bus) DT node are
not scanned, so the UART node is missing (and others).
I'm not adding this property in an *u-boot.dtsi file, since there is
none matching the generic rules for all files including this dtsi
file. So to not miss any of the boards using this dtsi file, I'm
adding it to this file directly, which makes the Linux merge a less
easy unforunately.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chris Packham <judge.packham@gmail.com>
Cc: Marek BehĂșn <marek.behun@nic.cz>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Tom Rini [Sun, 19 May 2019 13:42:19 +0000 (09:42 -0400)]
Merge git://git.denx.de/u-boot-x86
- Allow coreboot to process unhandled tags
- Enable NVMe on QEMU x86_64 target
Tom Rini [Sun, 19 May 2019 13:36:48 +0000 (09:36 -0400)]
Merge branch '2019-05-19-master-imports'
- Convert SYS_[DI]CACHE_OFF to Kconfig, introduce SPL variant.
- Various bcm96* fixes.
- Import include/android_bootloader_message.h from AOSP
- Assorted other small fixes.
Bin Meng [Wed, 15 May 2019 15:51:51 +0000 (08:51 -0700)]
x86: qemu-x86_64: Enable NVMe
NVMe was turned on in qemu-x86 but somehow we missed it for 64-bit.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Wed, 15 May 2019 15:37:56 +0000 (08:37 -0700)]
nvme: Fix warning of cast from pointer to integer of different size
When dma_addr_t is u32 in 64-bit, there are some warnings when
building NVME driver. Fix it by doing an additional (long) cast.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Christian Gmeiner [Wed, 17 Apr 2019 12:42:05 +0000 (14:42 +0200)]
x86: coreboot: make it possible to process unhandled tags
coreboot makes it possible to add own entries into coreboot's
table at a per mainboard basis. As there might be some custom
ones it makes sense to provide a way to process them.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Adam Ford [Wed, 15 May 2019 21:18:35 +0000 (16:18 -0500)]
ARM: da850evm: Enable block cache during SPL
There appears to be enough RAM to support cache in SPL.
This pach enables block cache in SPL.
Signed-off-by: Adam Ford <aford173@gmail.com>
Ibai Erkiaga [Wed, 15 May 2019 21:10:04 +0000 (22:10 +0100)]
Kconfig: fix FIT offset prompt text
The current prompt text for FIT external offset is identical to
SYS_TEXT_BASE which might confuse the users. Provided more accurate
description for the prompt text.
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Adam Ford [Wed, 15 May 2019 13:37:52 +0000 (08:37 -0500)]
ARM: omap3_logic/omap35_logic: Enable GPIO in SPL
The MMC controller enabled card detect, so this patch enables
the GPIO driver in SPL to support it.
Signed-off-by: Adam Ford <aford173@gmail.com>
Alex Deymo [Tue, 14 May 2019 19:05:26 +0000 (21:05 +0200)]
Import include/android_bootloader_message.h from AOSP
This takes the latest changes from AOSP from the file
bootloader_message/include/bootloader_message/bootloader_message.h
in the repository
https://android.googlesource.com/platform/bootable/recovery
and re-licensed them to BSD-3 for U-Boot.
Minimum local changes have been applied (convert C++ to C comments and
adding #ifndef __UBOOT__ block to skip all the function declarations).
Signed-off-by: Alex Deymo <deymo@google.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Luca Boccassi [Tue, 14 May 2019 18:35:02 +0000 (19:35 +0100)]
tools: use read-only mmap in fit_check_sign
Add an option to open files in read-only mode in mmap_fdt so
that fit_check_sign can be used to inspect files on read-only
filesystems.
For example, this is useful when a key is shipped in a read-only
rootfs or squashfs.
Signed-off-by: Luca Boccassi <luca.boccassi@microsoft.com>
Christian Gmeiner [Tue, 14 May 2019 08:33:41 +0000 (10:33 +0200)]
ata: ahci: drop read-only ahci_ioports members
Also get rid of ahci_setup_port(..).
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Heinrich Schuchardt [Thu, 9 May 2019 15:35:12 +0000 (17:35 +0200)]
configs: bcm968580 disable CONFIG_CMD_BOOTEFI_SELFTEST
Configuration option CONFIG_CMD_BOOTEFI_SELFTEST is useful for the
development of the UEFI sub-system. For production it is not needed.
Remove CONFIG_CMD_BOOTEFI_SELFTEST from bcm968580xref_ram_defconfig.
Suggested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Thu, 9 May 2019 15:34:15 +0000 (17:34 +0200)]
configs: bcm963158 disable CONFIG_CMD_BOOTEFI_SELFTEST
Configuration option CONFIG_CMD_BOOTEFI_SELFTEST is useful for the
development of the UEFI sub-system. For production it is not needed.
Remove CONFIG_CMD_BOOTEFI_SELFTEST from bcm963158_ram_defconfig.
Suggested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Marek Vasut [Tue, 7 May 2019 19:17:02 +0000 (21:17 +0200)]
spl: Set spl_image->fdt_addr pointer for full fitImage configuration
Set the spl_image->fdt_addr pointer both for simple fitImage configuration
as well as full fitImage configuration, to let spl_perform_fixups() access
the DT and perform modifications to it if necessary.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Fabien Parent [Mon, 6 May 2019 14:17:56 +0000 (16:17 +0200)]
ARM: mediatek: mt8516: use PSCI to reset the SoC
Instead of using the watchdog, let's use PSCI to perform the reset
of the SoC.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Philippe Reynes [Fri, 3 May 2019 17:51:44 +0000 (19:51 +0200)]
bcm968380gerg: remove CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
This board define the flag CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
but it's a mistake. It's a workaround for an issue in nand core.
This issue was fixed by the commit
5f626e78491c ("mtd: nand: raw:
Fix CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT behavior"). Now, this flag
break the nand on this board, so we simply remove it.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Philippe Reynes [Fri, 3 May 2019 17:51:43 +0000 (19:51 +0200)]
bcm963158: remove CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
This board define the flag CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
but it's a mistake. It's a workaround for an issue in nand core.
This issue was fixed by the commit
5f626e78491c ("mtd: nand: raw:
Fix CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT behavior"). Now, this flag
break the nand on this board, so we simply remove it.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Philippe Reynes [Fri, 3 May 2019 17:51:42 +0000 (19:51 +0200)]
bcm968580xref: remove CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
This board define the flag CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
but it's a mistake. It's a workaround for an issue in nand core.
This issue was fixed by the commit
5f626e78491c ("mtd: nand: raw:
Fix CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT behavior"). Now, this flag
break the nand on this board, so we simply remove it.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Philippe Reynes [Fri, 3 May 2019 17:43:08 +0000 (19:43 +0200)]
dt: bcm63158: watchdog should use a 50Mhz clock
The watchdog should use a clock at 50 Mhz, so
instead of using the clock osc (200 Mhz), we
define a reference clock at 50Mhz and use it
for both watchdog.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Philippe Reynes [Fri, 3 May 2019 17:43:07 +0000 (19:43 +0200)]
dt: bcm6858: watchdog should use a 50Mhz clock
The watchdog should use a clock at 50 Mhz, so
instead of using the clock osc (200 Mhz), we
define a reference clock at 50Mhz and use it
for both watchdog.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Philippe Reynes [Fri, 3 May 2019 17:43:06 +0000 (19:43 +0200)]
watchdog: bcm6345: callback start use tick instead of ms
The function bcm6345_wdt_start use the argument timeout
as tick but it should be used as milliseconds.
A clock is added as requirement for this driver.
The frequency of the clock is then used to convert the
millisecond to ticks in the function bcm6345_wdt_start.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Michal Simek [Mon, 25 Mar 2019 14:55:16 +0000 (15:55 +0100)]
Makefile: Prioritize external dtb if defined
Prioritize external dtb if its passed via EXT_DTB
than the dtb that was built in the tree. With this
patch it appends the specified external dtb to
the u-boot image.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Trevor Woerner [Fri, 3 May 2019 13:41:00 +0000 (09:41 -0400)]
CONFIG_SPL_SYS_[DI]CACHE_OFF: add
While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances
where these configuration items are conditional on SPL. This commit adds SPL
variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates
the configurations as required.
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Trevor Woerner <trevor@toganlabs.com>
[trini: Make the default depend on the setting for full U-Boot, update
more zynq hardware]
Signed-off-by: Tom Rini <trini@konsulko.com>
Trevor Woerner [Fri, 3 May 2019 13:40:59 +0000 (09:40 -0400)]
CONFIG_SYS_[DI]CACHE_OFF: convert to Kconfig
CONFIG_SYS_[DI]CACHE_OFF had been partially converted to Kconfig
parameters; only for the ARC architecture. This patch turns these two
parameters into Kconfig items everywhere else they are found.
All of the include/configs/* and defconfig changes in this patch are
for arm machines only. The Kconfig changes for arc, nds32, riscv,
and xtensa have been included since these symbols are found in code
under arch/{arc,nds32,riscv,xtensa}, however, no currently-defined
include/configs/* or defconfigs for these architectures exist which
include these symbols.
These results have been confirmed with tools/moveconfig.py.
Acked-by: Alexey Brodkin <abrodkin@snopsys.com>
Signed-off-by: Trevor Woerner <trevor@toganlabs.com>
[trini: Re-migrate for a few more boards]
Signed-off-by: Tom Rini <trini@konsulko.com>
Trevor Woerner [Fri, 3 May 2019 13:40:58 +0000 (09:40 -0400)]
CONFIG_SYS_[DI]CACHE_OFF: remove commented lines
Eventually these configuration items will be converted to Kconfig,
therefore there's little point in leaving commented-out versions of
them in include/configs.
Signed-off-by: Trevor Woerner <trevor@toganlabs.com>
Trevor Woerner [Fri, 3 May 2019 13:40:57 +0000 (09:40 -0400)]
CONFIG_SYS_[DI]CACHE_OFF: remove superfluous "1"
This config is the only config that uses:
#define CONFIG_SYS_DCACHE_OFF 1
in its #define.
Remove the superfluous "1" so this cache #define is like all the others.
Signed-off-by: Trevor Woerner <trevor@toganlabs.com>
Trevor Woerner [Fri, 3 May 2019 13:40:56 +0000 (09:40 -0400)]
CONFIG_SYS_[ID]CACHE_OFF: unify the 'any' case
According to De Morgan's Law[1]:
!(A && B) = !A || !B
!(A || B) = !A && !B
There are 5 places in the code where we find:
#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
and 4 places in the code where we find:
#if (!defined(CONFIG_SYS_ICACHE_OFF) || !defined(CONFIG_SYS_DCACHE_OFF))
In words, the construct:
!defined(CONFIG_SYS_[DI]CACHE_OFF)
means:
"is the [DI]CACHE on?"
and the construct:
defined(CONFIG_SYS_[DI]CACHE_OFF)
means:
"is the [DI]CACHE off?"
Therefore
!(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
means:
"the opposite of 'are they both off?'"
in other words:
"are either or both on?"
and:
(!defined(CONFIG_SYS_ICACHE_OFF) || !defined(CONFIG_SYS_DCACHE_OFF)
means:
"are either or both on?"
As a result, I've converted the 4 instances of '(!A || !B)' to '!(A && B)' for
consistency.
[1] https://en.wikipedia.org/wiki/De_Morgan%27s_laws
Signed-off-by: Trevor Woerner <trevor@toganlabs.com>
Tom Rini [Thu, 16 May 2019 11:09:59 +0000 (07:09 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-samsung
- arndale fixes
Tom Rini [Thu, 16 May 2019 11:09:33 +0000 (07:09 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
- SoCFPGA DT and reset cleanup, AE MCVEVK board support.
Tom Rini [Thu, 16 May 2019 11:09:18 +0000 (07:09 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-sh
- Align env position on GR-Peach with downstream U-Boot.
Krzysztof Kozlowski [Sat, 11 May 2019 11:24:33 +0000 (13:24 +0200)]
configs: arndale: Use appropriate driver for Asix AX88760
Arndale board has an Asix AX88760 USB 2.0 Hub and Fast Ethernet combo.
The appropriate driver for it is USB_ETHER_ASIX.
The mistake probably came from misinterpretation of commit
e9954b867ce0
("usb: eth: add ASIX AX88179 DRIVER") which was tested on RECS5250 COM
module. This module indeed has Exynos5250 and some similarities with
Arndale 5250 board but the USB/Ethernet chip used there is apparently
different.
Fixes:
f58ad98a621c ("usb: net: migrate USB Ethernet adapters to Kconfig")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Krzysztof Kozlowski [Sat, 11 May 2019 11:24:32 +0000 (13:24 +0200)]
arm: exynos: arndale: Remove unused CONFIG_DM_I2C_COMPAT
The CONFIG_DM_I2C_COMPAT was introduced in
include/configs/exynos5-common.h in commit
189d80166b31 ("exynos5:
enable dm i2c") and then it propagated up to configs/arndale_defconfig.
However since beginning the Arndale board (Exynos5250) was not using
I2C.
In fact, the Arndale board is not configuring its PMIC (S5M8767) which
uses I2C bus. This setting can be thus safely removed to fix build
warning:
This board uses CONFIG_DM_I2C_COMPAT. Please remove
(possibly in a subsequent patch in your series)
before sending patches to the mailing list.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Krzysztof Kozlowski [Sat, 11 May 2019 11:24:31 +0000 (13:24 +0200)]
arm: exynos: arndale: Remove unused CONFIG_POWER and CONFIG_POWER_I2C
The CONFIG_POWER and CONFIG_POWER_I2C were introduced in
include/configs/exynos5-common.h in commit
19bd3aaa5991 ("exynos5: fix
build break by adding CONFIG_POWER") and then it propagated up to
include/configs/arndale.h. However before that commit, there was no
build break at all on Arndale and SMDK5250 boards. It seems the commit
fixed nothing and just added unused defines.
In fact, the Arndale board is not configuring its PMIC (S5M8767) which
uses I2C bus.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Tom Rini [Wed, 15 May 2019 19:58:48 +0000 (15:58 -0400)]
Prepare v2019.07-rc2
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 15 May 2019 11:10:52 +0000 (07:10 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-net
- micrel, ti PHY fixes
- rtl8169, mtk-eth fixes
Tom Rini [Wed, 15 May 2019 11:10:32 +0000 (07:10 -0400)]
Merge tag 'u-boot-stm32-mcu-
20190514' of https://github.com/pchotard/u-boot
STM32 MCUs update:
_ Add MPU region for SPI NOR memory mapped region
_ Add missing QSPI flash compatible for STM32 F7 boards
_ Update spi-tx-bus-width and spi-rx-bus-width properties
_ Add QSPI support for STM32F469 Discovery board
Weijie Gao [Sun, 28 Apr 2019 07:08:57 +0000 (15:08 +0800)]
eth: mtk-eth: fix incorrect read of phy-handle
In mt7629-rfb.dts, the phy-handle is a reference to the node phy0, not the
node itself:
phy-handle = <&phy0>;
phy0: ethernet-phy@0 {
reg = <0>;
}
However the driver used ofnode_find_subnode("phy-handle") to read the node.
It will always fail.
This patch replaces ofnode_find_subnode with dev_read_phandle_with_args to
make sure the node can be read correctly.
Cc: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Thierry Reding [Tue, 16 Apr 2019 16:20:30 +0000 (18:20 +0200)]
net: rtl8169: Support RTL-8168h/8111h
This version of the RTL-8168 is present on some development boards and
is compatible with this driver. Add support for identifying this version
of the chip so that U-Boot won't complain about it being unknown.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Thierry Reding [Tue, 16 Apr 2019 16:20:29 +0000 (18:20 +0200)]
net: rtl8169: Implement ->hwaddr_write() callback
Implement this callback that allows the MAC address to be set for the
Ethernet card. This is necessary in order for the device to be able to
receive packets for the MAC address that U-Boot advertises.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Michal Simek [Sat, 16 Mar 2019 11:43:17 +0000 (12:43 +0100)]
phy: ti: Init node before reading
There is a need to fill node before clk_output_sel is setup.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Reviewed-by: <hannes.schmelzer@br-automation.com>
James Byrne [Wed, 6 Mar 2019 12:48:27 +0000 (12:48 +0000)]
net: phy: micrel: Allow KSZ8xxx and KSZ90x1 to be used together
Commit
d397f7c45b0b ("net: phy: micrel: Separate KSZ9000 drivers from
KSZ8000 drivers") separated the KSZ8xxx and KSZ90x1 drivers and warns
that you shouldn't select both of them due to a device ID clash between
the KSZ9021 and the KS8721, asserting that "it is highly unlikely for a
system to contain both a KSZ8000 and a KSZ9000 PHY". Unfortunately
boards like the SAMA5D3xEK do contain both types of PHY, but fortunately
the Linux Micrel PHY driver provides a solution by using different PHY
ID and mask values to distinguish these chips.
This commit contains the following changes:
- The PHY ID and mask values for the KSZ9021 and the KS8721 now match
those used by the Linux driver.
- The warnings about not enabling both drivers have been removed.
- The description for PHY_MICREL_KSZ8XXX has been corrected (these are
10/100 PHYs, not GbE PHYs).
- PHY_MICREL_KSZ9021 and PHY_MICREL_KSZ9031 no longer select PHY_GIGE
since this is selected by PHY_MICREL_KSZ90X1.
- All of the relevant defconfig files have been updated now that
PHY_MICREL_KSZ8XXX does not default to 'Y'.
Signed-off-by: James Byrne <james.byrne@origamienergy.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Marek Vasut [Tue, 7 May 2019 15:55:12 +0000 (17:55 +0200)]
ARM: dts: socfpga: Keep FPGA bridge entries in SPL DT
Keep the FPGA bridge entries in SPL DT to let do_bridge_reset() toggle
the bridges on/off as needed according to the handoff file.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
Marek Vasut [Wed, 6 Mar 2019 18:47:22 +0000 (19:47 +0100)]
ARM: dts: socfpga: Factor out U-Boot specifics from A10 handoff files
Pull out the u-boot,dm-pre-reloc from socfpga_arria10_socdk_sdmmc_handoff.dtsi
into separate dtsi header file to make it easier to patch in custom handoff
dtsi files, without having to manually add the U-Boot bits. Shuffle the include
clauses in the A10 DT files to make it obvious what gets included where without
having to follow confusing long chain of includes, i.e. board DT file includes
everything it needs.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
Wolfgang Grandegger [Sun, 12 May 2019 17:25:18 +0000 (19:25 +0200)]
arm: socfpga: Re-add support for Aries MCV SoM and MCVEV[KP] board
Re-add support for Aries Embedded MCV SoM, which is CycloneV based
and the associated MCVEVK and MCVEVP baseboard. The board can boot
from eMMC. Ethernet and USB is supported.
The Aries Embedded boards have been removed with commit
03b54997d568
("board/aries: Remove"). I will now take care of them.
The device-tree files are from mainline Linux commit
e93c9c99a629
("Linux v5.1)".
Signed-off-by: Wolfgang Grandegger <wg@aries-embedded.de>
CC: Marek Vasut <marex@denx.de>
CC: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Simon Goldschmidt [Mon, 13 May 2019 19:16:44 +0000 (21:16 +0200)]
arm: sofcpga: s10: remove unused ad-hoc reset code
The stratix 10 reset manager ad-hoc code in arch/arm contains an unused
function 'reset_deassert_peripherals_handoff' that has been added from
the beginning. As this is probably a result of copying the gen5 reset
manager and this function has never been used, remove it.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Simon Goldschmidt [Mon, 13 May 2019 19:16:43 +0000 (21:16 +0200)]
arm: socfpga: remove re-added ad-hoc reset code
commit
c5de2b7eae68 ("arm: socfpga: implement proper peripheral reset")
has removed the call to 'reset_deassert_peripherals_handoff()' from
socfpga gen5 SPL since the reset driver now handles resets. However,
commit
c1d4b464c8b8 ("ARM: socfpga: Disable bridges in SPL unless booting from FPGA")
has re-added this ad-hoc reset code, so that all peripherals were now
again enabled instead of letting the drivers enable them by request.
While at it, remove this function for gen5 as it should not be used.
Fixes: commit
c1d4b464c8b8 ("ARM: socfpga: Disable bridges in SPL unless booting from FPGA")
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Marek Vasut [Sat, 4 May 2019 17:35:27 +0000 (19:35 +0200)]
ARM: renesas: grpeach: Align env position
Move the U-Boot environment to 0x80000 to match the downstream
vendor fork and allow easy migration from one to the other.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Tom Rini [Mon, 13 May 2019 11:13:28 +0000 (07:13 -0400)]
Merge tag 'efi-2019-07-rc3' of git://git.denx.de/u-boot-efi
Pull request for UEFI sub-system for v2019.07-rc3
The development target for the UEFI sub-system is EBBR compliance. We have
already implemented some further protocols to enable running the UEFI Shell
and the UEFI SCT test suite.
As some boards are severely memory constrained make some of these extras
customizable.
Provide bug fixes. The most prominent ones let us pass the UEFI SCT memory
allocation tests.
Tom Rini [Mon, 13 May 2019 11:13:03 +0000 (07:13 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
- A10 FPGA programming support, Gen5 livetree conversion
Tom Rini [Mon, 13 May 2019 11:12:47 +0000 (07:12 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-sh
- SH2, SH3 removal
Heinrich Schuchardt [Sun, 12 May 2019 18:16:25 +0000 (20:16 +0200)]
efi_loader: comments for efi_install_fdt()
Describe that efi_install_fdt() defaults to using the device tree
indicated by environment variable fdtcontroladdr.
ACPI tables and device trees are mutually exclusive.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sun, 12 May 2019 18:16:25 +0000 (20:16 +0200)]
efi_loader: deduplicate code in cmd/bootefi.c
Move duplicate initialization code to single instance.
Adjust comments of concerned functions.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sat, 11 May 2019 21:11:48 +0000 (23:11 +0200)]
efi_loader: ACPI device node to text
The device path to text protocol renders ACPI device nodes incorrectly.
Use capital hexadecimal numbers as shown in the UEFI spec examples.
Always output the optional UID. This matches what UEFI SCT expects and
saves us an `if`.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sat, 11 May 2019 19:44:59 +0000 (21:44 +0200)]
efi_loader: infinite recursion notifying events
UEFI SCT uses this call sequence to determine the current TPL level inside
notification functions:
OldTpl = BS->RaiseTPL(TPL_HIGH_LEVEL);
BS->RestoreTPL(OldTpl);
In RestoreTPL() we trigger the notification function of queued events. If
we do not mark the event as non-queued before calling the notification
function, this results in an infinite recursive call sequence.
Mark the event as non-queued before entering the notification function.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sat, 11 May 2019 06:43:30 +0000 (08:43 +0200)]
efi_loader: simplify efi_allocate_pages()
Replace unnecessary control structures by using return statements.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sat, 11 May 2019 06:21:17 +0000 (08:21 +0200)]
efi_loader: AllocateAdress error handling
If AllocatePages() is called with AllocateAddress, the UEFI spec requires
to return EFI_NOT_FOUND in case the memory page does not exist.
The UEFI SCT II 2017 spec additionally requires to return EFI_NOT_FOUND if
the page is already allocated.
Check that *Memory refers to an unallocated page.
UEFI SCT II (2017): AllocatePages(), 5.1.2.1.9 - 5.1.2.1.10
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sat, 11 May 2019 05:55:05 +0000 (07:55 +0200)]
efi_loader: out of resources in AllocatePages()
According to the UEFI AllocatePages() has to return EFI_OUT_OF_RESOURCES if
sufficient memory is not available.
Change the return value.
UEFI SCT II (2017): 3.2.1 AllocatePages(), 5.1.2.1.8
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Fri, 10 May 2019 19:21:30 +0000 (21:21 +0200)]
efi_loader: check memory address before freeing
When we call FreePages() we essentially add memory to our memory map. We
shouldn't do this for memory that does not exit.
Check if the memory that is to be freed via FreePages() or FreePool() is in
our memory map and is not EFI_CONVENTIONAL_MEMORY.
This check is mandated by the UEFI specification.
Cf. UEFI SCT II (2017), 3.2.2 FreePages(), 5.1.2.1 - 5.1.2.2
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Fri, 10 May 2019 18:06:48 +0000 (20:06 +0200)]
efi_loader: error code in UninstallProtocolInterface()
According to the UEFI specification UninstallProtocolInteface() has to
return EFI_NOT_FOUND if the interface is not found.
Correct the return value.
Cf. UEFI SCT II spec (2017), 3.3.2 UninstallProtocolInterface(), 5.1.3.2.4
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Fri, 10 May 2019 17:55:53 +0000 (19:55 +0200)]
efi_loader: superfluous check in efi_remove_protocol()
efi_search_protocol() already checks that the GUID matches. Don't check
a second time.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Fri, 10 May 2019 17:21:41 +0000 (19:21 +0200)]
efi_loader: LocateDevicePath() incorrect parameter check
A parameter check in LocateDevicePath() does not match the requirements of
the UEFI spec.
If device is NULL, only return EFI_INVALID_PARAMETER if a matching handle
is found.
Cf. UEFI SCT II specification (2017)3.3.7 LocateDevicePath(), 5.1.3.7.3
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Fri, 10 May 2019 17:03:49 +0000 (19:03 +0200)]
efi_loader: fix typo in efi_locate_handle() comment
%s/not buffer/no buffer/
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sat, 11 May 2019 07:53:33 +0000 (09:53 +0200)]
efi_loader: make device path to text protocol customizable
The device path to text protocol is not needed for EBBR compliance. So
let's make it a customizable option.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Wed, 8 May 2019 21:24:26 +0000 (23:24 +0200)]
efi_loader: make Unicode collation protocol customizable
The Unicode collation protocol is not needed for EBBR compliance. So let's
make it a customizable option.
The Unicode capitalization table is only needed by this protocol. So let it
depend on the Unicode collation protocol.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sat, 11 May 2019 08:27:58 +0000 (10:27 +0200)]
efi_loader: reword the EFI_LOADER config option
No need to mention U-Boot in brief description.
Fix several typos, mention iPXE.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Wed, 8 May 2019 21:17:38 +0000 (23:17 +0200)]
efi_loader: format Kconfig
Use if/endif for dependencies to give structure to the configuration menu.
Sort important settings to the top.
Abbreviate the short description of EFI_LOADER_HII.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Wed, 8 May 2019 19:42:36 +0000 (21:42 +0200)]
efi_loader: observe CONFIG_EFI_LOADER_HII
If EFI_LOADER_HII is not set, do not unnecessarily compile files for HII
protocols.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Wed, 8 May 2019 17:41:35 +0000 (19:41 +0200)]
MAINTAINERS: assign include/charset.h
Assign include/charset.h to EFI PAYLOAD.
The functions defined in this include are used by the UEFI sub-system.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Wed, 8 May 2019 17:34:48 +0000 (19:34 +0200)]
lib: charset: correct utf8_utf16_strnlen() description
Correct the description of utf8_utf16_strnlen() and utf8_utf16_strlen() to
reflect that they return u16 count and not byte count.
For these functions and utf16_utf8_strnlen() describe the handling of
invalid code sequences.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Simon Goldschmidt [Thu, 9 May 2019 20:12:00 +0000 (22:12 +0200)]
gpio: dwapb_gpio: convert to livetree
Convert 'gpio_dwapb_bind' to iterate over subnodes using livetree
functions (inspired from mt7621_gpio.c).
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Simon Goldschmidt [Thu, 9 May 2019 20:11:59 +0000 (22:11 +0200)]
reset: socfpga: convert to livetree
Convert 'socfpga_reset_probe' to use 'dev_read_u32_default'
instead of 'fdtdec_get_int'.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Simon Goldschmidt [Thu, 9 May 2019 20:11:58 +0000 (22:11 +0200)]
serial: altera_uart: convert to livetree
Convert 'altera_uart_ofdata_to_platdata' to use 'dev_read_u32_default'
instead of 'fdtdec_get_int' and get rid of DECLARE_GLOBAL_DATA_PTR.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Simon Goldschmidt [Thu, 9 May 2019 20:11:57 +0000 (22:11 +0200)]
spi: designware: convert to livetree
Convert 'dw_spi_ofdata_to_platdata' to use 'dev_read_u32_default'
instead of 'fdtdec_get_int' and get rid of DECLARE_GLOBAL_DATA_PTR.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Simon Goldschmidt [Thu, 9 May 2019 20:11:56 +0000 (22:11 +0200)]
spi: cadence_qspi: convert to livetree
Convert 'cadence_spi_ofdata_to_platdata' to use dev_read_* functions to
read driver parameters and 'dev_read_first_subnode'/'ofnode_read_*' to
read flash (child node) parameters.
Tested on socfpga_socrates (socfpga gen5).
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Simon Goldschmidt [Thu, 9 May 2019 20:11:55 +0000 (22:11 +0200)]
timer: dw-apb: remove unused DECLARE_GLOBAL_DATA_PTR
The dw-apb timer does not use 'gd', so remove its declaration.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Ley Foon Tan [Wed, 8 May 2019 03:07:37 +0000 (11:07 +0800)]
configs: stratix10: Enable CONFIG_SPI_FLASH_USE_4K_SECTORS
Fix SPI flash environment erase size error.
CONFIG_ENV_SECT_SIZE is set to 4KB. Enable CONFIG_SPI_FLASH_USE_4K_SECTORS
to allow erase one environment sector.
Fix error below:
SOCFPGA_STRATIX10 # saveenv
Saving Environment to SPI Flash...
SF: Detected mt25qu02g with page size 256 Bytes, erase size 64 KiB, total 256 MiB
Erasing SPI flash...SF: Erase offset/length not multiple of erase size
Failed (-22)
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Tien Fong Chee [Tue, 7 May 2019 09:42:32 +0000 (17:42 +0800)]
ARM: socfpga: Increase Malloc pool size to support FAT filesystem in SPL
Increasing Malloc pool size up to 0x15000 is required to support FAT in SPL
. The result of calculation is come from default max cluster(0x10000) +
others(0x2000) + additional memory for headroom(0x3000).
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Tien Fong Chee [Tue, 7 May 2019 09:42:31 +0000 (17:42 +0800)]
ARM: socfpga: Synchronize the configuration for A10 SoCDK
Update the default configuration file to enable the necessary functionality
the get the kit working.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Tien Fong Chee [Tue, 7 May 2019 09:42:30 +0000 (17:42 +0800)]
spl: socfpga: Implement fpga bitstream loading with socfpga loadfs
Add support for loading FPGA bitstream to get DDR up running before
U-Boot is loaded into DDR. Boot device initialization, generic firmware
loader and SPL FAT support are required for this whole mechanism to work.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Tien Fong Chee [Tue, 7 May 2019 09:42:29 +0000 (17:42 +0800)]
ARM: socfpga: Add the configuration for FPGA SoCFPGA A10 SoCDK
Update the default configuration file to enable the necessary functionality
to get the SoCFPGA loadfs driver support. This would enable the
implementation of programming bitstream into FPGA from MMC.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Tien Fong Chee [Tue, 7 May 2019 09:42:28 +0000 (17:42 +0800)]
ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loading
Add FPGA driver to support program FPGA with FPGA bitstream loading from
filesystem. The driver are designed based on generic firmware loader
framework. The driver can handle FPGA program operation from loading FPGA
bitstream in flash to memory and then to program FPGA.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Tien Fong Chee [Tue, 7 May 2019 09:42:27 +0000 (17:42 +0800)]
ARM: socfpga: Moving the watchdog reset to the for-loop status polling
Current watchdog reset is misplaced after for-loop status polling, so
this poses a risk that watchdog can't be reset timely if polling taking
longer than watchdog timeout. This patch moving the watchdog reset
into polling to ensure the watchdog can be reset timely.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Tien Fong Chee [Tue, 7 May 2019 09:42:26 +0000 (17:42 +0800)]
ARM: socfpga: Cleaning up and ensuring consistent format messages in driver
Ensure all the debug messages are always prefix with "FPGA: " and comment
beginning with uppercase letter.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Tien Fong Chee [Tue, 7 May 2019 09:42:25 +0000 (17:42 +0800)]
ARM: socfpga: Add default FPGA bitstream fitImage for Arria10 SoCDK
Add default fitImage file bundling FPGA bitstreams for Arria10.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Tien Fong Chee [Tue, 7 May 2019 09:42:24 +0000 (17:42 +0800)]
ARM: socfpga: Description on FPGA bitstream type and file name for Arria 10
This patch adds description on properties about file name used for both
peripheral bitstream and core bitstream.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Marek Vasut [Tue, 7 May 2019 20:04:05 +0000 (22:04 +0200)]
sh: sh3: Remove CPU support
This CPU core is old, no boards using the CPU are left in mainline,
it has no prospects of ever being converted to DM, drop it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
Marek Vasut [Tue, 7 May 2019 20:02:39 +0000 (22:02 +0200)]
sh: shmin: Remove the board
Last change to this board was done in 2016, has no prospects of
ever being converted to DM, drop it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
Marek Vasut [Tue, 7 May 2019 20:01:37 +0000 (22:01 +0200)]
sh: ms7720se: Remove the board
Last change to this board was done in 2016, has no prospects of
ever being converted to DM, drop it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
Marek Vasut [Tue, 7 May 2019 19:59:57 +0000 (21:59 +0200)]
sh: mpr2: Remove the board
Last change to this board was done in 2016, has no prospects of
ever being converted to DM, drop it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Mark Jonas <mark.jonas@de.bosch.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
Marek Vasut [Tue, 7 May 2019 19:52:47 +0000 (21:52 +0200)]
sh: sh2: Remove CPU support
This CPU core is old, no boards using the CPU are left in mainline,
it has no prospects of ever being converted to DM, drop it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
Marek Vasut [Tue, 7 May 2019 19:51:39 +0000 (21:51 +0200)]
sh: rsk7269: Remove the board
Last change to this board was done in 2016, has no prospects of
ever being converted to DM, drop it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
Marek Vasut [Tue, 7 May 2019 19:51:06 +0000 (21:51 +0200)]
sh: rsk7264: Remove the board
Last change to this board was done in 2016, has no prospects of
ever being converted to DM, drop it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
Marek Vasut [Tue, 7 May 2019 19:49:16 +0000 (21:49 +0200)]
sh: rsk7203: Remove the board
Last change to this board was done in 2016, has no prospects of
ever being converted to DM, drop it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
Marek Vasut [Tue, 7 May 2019 20:31:23 +0000 (22:31 +0200)]
serial: sh: Drop assorted SH3, SH4, SH5 macros
Drop unused macros from the header to clean it up.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
Marek Vasut [Tue, 7 May 2019 20:27:32 +0000 (22:27 +0200)]
serial: sh: Drop RTS7751R2D support
There is no RTS7751R2D support in U-Boot, drop all the RTS7751R2D macros.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
Marek Vasut [Tue, 7 May 2019 20:26:21 +0000 (22:26 +0200)]
serial: sh: Drop SH2007 support
There is no SH2007 support in U-Boot, drop all the SH2007 macros.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
Marek Vasut [Tue, 7 May 2019 20:14:49 +0000 (22:14 +0200)]
serial: sh: Drop H8 support
There is no H8 support in U-Boot, drop all the H8 macros.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
Tom Rini [Fri, 10 May 2019 15:08:48 +0000 (11:08 -0400)]
Merge branch '2019-05-10-master-imports'
- Correct CONFIG_CRC32 related options in Kconfig
- CONFIG_GPIO select's DM_GPIO, drop CONFIG_GPIO from whitelist.txt
Chris Packham [Sat, 13 Apr 2019 09:13:59 +0000 (21:13 +1200)]
Remove whitelist entry for CONFIG_CRC32
There are no longer any references to this in the code so this can be
removed.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>