oweals/u-boot.git
6 years agospi: Kconfig: Create ISSI Kconfig entry
Michal Simek [Mon, 25 Jan 2016 14:39:26 +0000 (15:39 +0100)]
spi: Kconfig: Create ISSI Kconfig entry

Add ISSI to Kconfig to make it selectable via menuconfig.
Also convert all current platforms.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-spi
Tom Rini [Sat, 4 Aug 2018 23:41:43 +0000 (19:41 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-spi

6 years agoMerge branch 'master' of git://git.denx.de/u-boot-sunxi
Tom Rini [Sat, 4 Aug 2018 23:41:30 +0000 (19:41 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-sunxi

6 years agoclk: clk_set_default: accept no-op skip fields
Neil Armstrong [Thu, 26 Jul 2018 13:19:32 +0000 (15:19 +0200)]
clk: clk_set_default: accept no-op skip fields

The Assigned Clock parents and rates misses the fact that a "0" entry can
be passed to skip setting a parent or rate of an assigned clock as
described in the Linux clock bindings at [1].

This patch simply skips the clock reparenting if the DT parsing returns
-ENOENT and the clock rate setting if "0" is passed as clock rate.

[1] https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/clock/clock-bindings.txt#L135

Fixes: f4fcba5c5baa "clk: implement clk_set_defaults()"
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agomailmap: Update mail address (lukma)
Lukasz Majewski [Wed, 25 Jul 2018 22:37:14 +0000 (00:37 +0200)]
mailmap: Update mail address (lukma)

Update my e-mail address from samsung.com to denx.de

Signed-off-by: Lukasz Majewski <lukma@denx.de>
6 years agoARM: dts: stm32: remove cd-inverted for stm32429i-eval
Patrice Chotard [Wed, 25 Jul 2018 15:49:10 +0000 (17:49 +0200)]
ARM: dts: stm32: remove cd-inverted for stm32429i-eval

As cd-inverted property is no more used by arm_pl180_mmci driver,
remove it. Update cd-gpios active level accordingly.

Reported-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
6 years agommc: arm_pl180_mmci: Remove cd_inverted host's struct field
Patrice Chotard [Wed, 25 Jul 2018 15:49:09 +0000 (17:49 +0200)]
mmc: arm_pl180_mmci: Remove cd_inverted host's struct field

As platform uses GPIOs for card detection, it's
simpler and more readable to use GPIO_ACTIVE_(LOW|HIGH)
in the gpio flags instead of using the cd-inverted
property.

Reported-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
6 years agommc: arm_pl180_mmci: Add missing clk_free
Patrice Chotard [Wed, 25 Jul 2018 15:49:08 +0000 (17:49 +0200)]
mmc: arm_pl180_mmci: Add missing clk_free

Add missing clk_free() call in case of failure
when enabling the clock.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agommc: arm_pl180_mmci: Update to support CONFIG_BLK
Patrice Chotard [Wed, 25 Jul 2018 15:49:07 +0000 (17:49 +0200)]
mmc: arm_pl180_mmci: Update to support CONFIG_BLK

Config flag CONFIG_BLK becomes mandatory, update arm_pl180_mmci
to support this config.

This driver is used by STM32Fx and by Vexpress platforms.
Only STM32Fx are DM ready. No DM code is isolated and will be
removed easily when wexpress will be converted to DM.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
6 years agoconfigs: stm32f469-disco: Enable CONFIG_BLK
Patrice Chotard [Wed, 25 Jul 2018 15:49:06 +0000 (17:49 +0200)]
configs: stm32f469-disco: Enable CONFIG_BLK

CONFIG_BLK config flag becomes mandatory, enable it.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
6 years agoconfigs: stm32f746-disco: Enable CONFIG_BLK
Patrice Chotard [Wed, 25 Jul 2018 15:49:05 +0000 (17:49 +0200)]
configs: stm32f746-disco: Enable CONFIG_BLK

CONFIG_BLK config flag becomes mandatory, enable it.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agoconfigs: stm32f429-evaluation: Enable CONFIG_BLK
Patrice Chotard [Wed, 25 Jul 2018 15:49:04 +0000 (17:49 +0200)]
configs: stm32f429-evaluation: Enable CONFIG_BLK

CONFIG_BLK config flag becomes mandatory, enable it.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
6 years agodocproc: Remove
Tom Rini [Wed, 25 Jul 2018 15:42:58 +0000 (11:42 -0400)]
docproc: Remove

Now that we have moved to Sphinx documentation we don't need the docproc
app anymore, remove.

Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agobootcount: Fix misaligned cache operation
Alex Kiernan [Wed, 25 Jul 2018 11:45:58 +0000 (11:45 +0000)]
bootcount: Fix misaligned cache operation

1947c2d2a0 introduces cache line flushes for the bootcounter, but if
the start address is not aligned then the flush causes warnings of
the form:

  CACHE: Misaligned operation at range [4030b7fc4030b83c]

Align both the start and end of the buffer (possibly crossing multiple
lines).

Fixes: 1947c2d2a0 ("bootcount: flush after storing the bootcounter")
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
6 years agoarmv8: make SPL exception vectors optional
Andre Przywara [Tue, 24 Jul 2018 23:57:01 +0000 (00:57 +0100)]
armv8: make SPL exception vectors optional

Even though the exception vector table is a fundamental part of the ARM
architecture, U-Boot mostly does not make real use of it, except when
crash dumping. But having it in takes up quite some space, partly due to
the architectural alignment requirement of 2KB. Since we don't take special
care of that, the compiler adds a more or less random amount of padding
space, which increases the image size quite a bit, especially for the SPL.

On a typical Allwinner build this is around 1.5KB of padding, plus 1KB
for the vector table (mostly padding space again), then some extra code
to do the actual handling. This amounts to almost 10% of the maximum image
size, which is quite a lot for a pure debugging feature.

Add a Kconfig symbol to allow the exception vector table to be left out
of the build for the SPL.
For now this is "default y" for everyone, but specific defconfigs,
platforms or .config files can opt out here at will, to mitigate the code
size pressure we see for some SPLs.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
6 years agoarmv8: Reduce exception handling code
Andre Przywara [Tue, 24 Jul 2018 23:57:00 +0000 (00:57 +0100)]
armv8: Reduce exception handling code

The arm64 exception handling code is quite big, mostly due to
architectural alignment requirements. Each exception entry spans 32
instructions, which sounds generous, but is too small to fit all of the
save/branch/restore code in there. So at the moment we use only four
instructions, branching into shared save and restore routines.
To not leave the space for those remaining 28 instructions wasted, let's
split the save and restore routines and stuff them into the gaps.
This saves about 250 bytes of code, which is helpful for those tight
SPLs.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
6 years agoti_omap3_common: Add CONFIG_SYS_NS16550_COMx entries
Adam Ford [Tue, 24 Jul 2018 23:06:04 +0000 (18:06 -0500)]
ti_omap3_common: Add CONFIG_SYS_NS16550_COMx entries

Several boards do not use the default UART3, so they do a check
for ifdef CONFIG_SPL_BUILD and enable the pointer for
CONFIG_SYS_NS16550_COMx to point to OMAP34XX_UARTx.

Let's consoldate this all into one place, and remove them from the
individual boards.

Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agoconfigs: stm32mp15: enable ADC
Fabrice Gasnier [Tue, 24 Jul 2018 14:31:32 +0000 (16:31 +0200)]
configs: stm32mp15: enable ADC

Enable ADC on stm32mp15.
- CONFIG_CMD_ADC
- CONFIG_STM32_ADC

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agoadc: Add driver for STM32 ADC
Fabrice Gasnier [Tue, 24 Jul 2018 14:31:31 +0000 (16:31 +0200)]
adc: Add driver for STM32 ADC

This patch adds support for STMicroelectronics STM32 ADC (analog to
digital converter). It's originally based on Linux kernel v4.18-rcs
drivers/iio/adc/stm32-adc*. It's composed of:
- core driver (UCLASS_SIMPLE_BUS) manages common resources (clk, regu).
- child drivers (UCLASS_ADC) declare each ADC, channels and handle
  conversions.
This driver currently supports STM32H7 and STM32MP1 ADC.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agodt-bindings: Document STM32 ADC DT bindings
Fabrice Gasnier [Tue, 24 Jul 2018 14:31:30 +0000 (16:31 +0200)]
dt-bindings: Document STM32 ADC DT bindings

This patch adds documentation of device tree bindings for the STM32 ADC.
It's based on linux-v4.18-rc* dt-bindings, at the time of writing:
- Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agodm: adc: uclass: get reference regulator once
Fabrice Gasnier [Tue, 24 Jul 2018 14:31:29 +0000 (16:31 +0200)]
dm: adc: uclass: get reference regulator once

device_get_supply_regulator() only needs to be called once.
But each time there's call to adc_vxx_value() for instance, it calls
adc_vxx_platdata_update() -> device_get_supply_regulator().

So, move device_get_supply_regulator() to pre_probe() routine.

This also allows vdd_supply/vss_supply to be provided directly from
uc_pdata, e.g dt-binding variant like stm32-adc provide its own
'vref-supply'.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agoclk: add clk_valid()
Fabrice Gasnier [Tue, 24 Jul 2018 14:31:28 +0000 (16:31 +0200)]
clk: add clk_valid()

Add clk_valid() to check for optional clocks are valid.
Call clk_valid() in test/dm/clk.c and add relevant test routine to
sandbox clk tests.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agokconfig: Replace spaces with tabs
Michal Simek [Tue, 24 Jul 2018 12:47:43 +0000 (14:47 +0200)]
kconfig: Replace spaces with tabs

Trivial Kconfig cleanup. Use tabs instead of spaces.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agoAdd Beaglebone Enhanced support
Koen Kooi [Wed, 18 Jul 2018 08:13:59 +0000 (10:13 +0200)]
Add Beaglebone Enhanced support

The "Beaglebone Enhanced" by Sancloud is based on the Beaglebone Black,
but with the following differences:

 * Gigabit capable PHY
 * Extra USB hub, optional i2c control
 * lps3331ap barometer connected over i2c
 * MPU6050 6 axis MEMS accelerometer/gyro connected over i2c
 * 1GiB DDR3 RAM
 * RTL8723 Wifi/Bluetooth connected over USB

Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Reviewed-by: Tom Rini <trini@konsulko.com>
6 years agoMerge git://git.denx.de/u-boot-dm
Tom Rini [Fri, 3 Aug 2018 14:08:13 +0000 (10:08 -0400)]
Merge git://git.denx.de/u-boot-dm

6 years agoarm: sunxi: Allwinner A10 SPI driver
Stefan Mavrodiev [Tue, 6 Feb 2018 13:14:33 +0000 (15:14 +0200)]
arm: sunxi: Allwinner A10 SPI driver

Add spi driver for sun4i, sun5i and sun7i SoCs. The driver is
adapted from mailine kernel.

Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agospi: kirkwood: add orion-spi compatible string
Chris Packham [Wed, 1 Aug 2018 06:49:26 +0000 (12:19 +0530)]
spi: kirkwood: add orion-spi compatible string

This matches the compatible string used by the Linux kernel. This will
allow u-boot to use the same device tree files.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
[jagan: use armada instead of orion on .data]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agospi: kirkwood: Get drvdata in .ofdata_to_platdata
Jagan Teki [Thu, 15 Mar 2018 11:33:22 +0000 (17:03 +0530)]
spi: kirkwood: Get drvdata in .ofdata_to_platdata

Get the is_errata_50mhz_ac in .ofdata_to_platdata, and
reuse it in .set_mode this can eventually initialized
dt code at once and adding room to add platdata.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agomtd: add spi flash id s25fl128l
Clément Laigle [Thu, 26 Jul 2018 07:31:41 +0000 (09:31 +0200)]
mtd: add spi flash id s25fl128l

Add support for SPANSION s25fl128l

Signed-off-by: Clément Laigle <c.laigle@catie.fr>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
[jagan: fixed , at the end of } ]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agoARM: tegra: align carveout size
Stephen Warren [Tue, 31 Jul 2018 18:38:27 +0000 (12:38 -0600)]
ARM: tegra: align carveout size

Align the size of the carveout region to 2M. This ensures that the size
can be accurately represented by an LPAE page table that uses sections.

This solves a bug (hang at boot time soon after printing the DRAM size)
that only shows up when the following two commits are merged together:
d32e86bde8a3 ARM: HYP/non-sec: enable ARMV7_LPAE if HYP mode is supported
6e584e633d10 ARM: tegra: avoid using secure carveout RAM

Cc: Mark Kettenis <kettenis@openbsd.org>
Cc: Alexander Graf <agraf@suse.de>
Acked-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
6 years agobinman: Adjust _GetPropTree() parameters
Simon Glass [Tue, 17 Jul 2018 19:25:52 +0000 (13:25 -0600)]
binman: Adjust _GetPropTree() parameters

At present this function takes a filename, but it is better to use an Fdt
object so that the caller can control this, perhaps obtainint the device
tree from a bytearray. Update the method accordingly and also fix a
confusing parameter name.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobinman: Add a test to catch use of the old 'pos' property
Simon Glass [Tue, 17 Jul 2018 19:25:51 +0000 (13:25 -0600)]
binman: Add a test to catch use of the old 'pos' property

This property has been changed to 'offset'. To help downstream users who
might still be using 'pos', add a check that this is not used by mistake.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobinman: Rename ReadContents() to ReadBlobContents()
Simon Glass [Tue, 17 Jul 2018 19:25:50 +0000 (13:25 -0600)]
binman: Rename ReadContents() to ReadBlobContents()

This function name is too generic for its purpose and is therefore
confusing. It actually only applies to blobs, so rename it to indicate
this.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobinman: Show the image position in the map
Simon Glass [Tue, 17 Jul 2018 19:25:49 +0000 (13:25 -0600)]
binman: Show the image position in the map

At present the map only shows the offset and size for each region. The
image position provides the actual position of each entry in the image,
regardless of the section hierarchy.

Add the image position to the map.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobinman: Add support for adding TPL binaries
Simon Glass [Tue, 17 Jul 2018 19:25:48 +0000 (13:25 -0600)]
binman: Add support for adding TPL binaries

Add support for U-Boot's TPL and TPL device tree. Also fix a few comments
in the other device-tree entries.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobinman: Add an entry for a Chromium vblock
Simon Glass [Tue, 17 Jul 2018 19:25:47 +0000 (13:25 -0600)]
binman: Add an entry for a Chromium vblock

This adds support for a Chromium verified boot block, used to sign a
read-write section of the image.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agodtoc: Add a function to obtain a list of phandles
Simon Glass [Tue, 17 Jul 2018 19:25:46 +0000 (13:25 -0600)]
dtoc: Add a function to obtain a list of phandles

Add a function which can decode a property containing a list of phandles.
This is useful for finding nodes linked to a property. Also provide a way
to look up a single phandle and get the Fdt object from a Node.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agopatman: Show the current directory in GetInputFilename()
Simon Glass [Tue, 17 Jul 2018 19:25:45 +0000 (13:25 -0600)]
patman: Show the current directory in GetInputFilename()

When this fails it is useful to see the current directory, since U-Boot's
build system will typically change into the output directory during the
build. Add this information to the error.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobinman: Add support for Chromium GBB
Simon Glass [Tue, 17 Jul 2018 19:25:44 +0000 (13:25 -0600)]
binman: Add support for Chromium GBB

This entry contains a Google Binary Block, used to store keys and bitmaps
in a Chromium image.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agopatman: Add a few more helpers to the tools library
Simon Glass [Tue, 17 Jul 2018 19:25:43 +0000 (13:25 -0600)]
patman: Add a few more helpers to the tools library

Add functions to read and write a file, looking through a list of search
paths to find it.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agopatman: Allow test commands to fall back to real ones
Simon Glass [Tue, 17 Jul 2018 19:25:42 +0000 (13:25 -0600)]
patman: Allow test commands to fall back to real ones

Tests use the 'test_result' feature to return a predetermined command
result for particular commands. The avoids needing to have the real
command available just to run a test. It works by calling the function
provided by the test, to get the value.

However sometimes the test does need to run the real command. Allow it to
fall back to do this when the function does not return a result.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agodtoc: Export the _FindNode() function
Simon Glass [Tue, 17 Jul 2018 19:25:41 +0000 (13:25 -0600)]
dtoc: Export the _FindNode() function

This is useful for clients that want to find a node. Export it so it can
be used by others.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobinman: Add an entry filled with a repeating byte
Simon Glass [Tue, 17 Jul 2018 19:25:40 +0000 (13:25 -0600)]
binman: Add an entry filled with a repeating byte

It is sometimes useful to have an area of the image which is all zeroes,
or all 0xff. This can often be achieved by padding the size of an an
existing entry and setting the pad byte for an entry or image.

But it is useful to have an explicit means of adding blocks of repeating
data to the image. Add a 'fill' entry type to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobinman: Add support for a cros_ec image
Simon Glass [Tue, 17 Jul 2018 19:25:39 +0000 (13:25 -0600)]
binman: Add support for a cros_ec image

Add an entry type which can hold a Chrome OS EC.

To make this work a new entry type is created, which supports getting a
blob filename from the command line.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobinman: Add support for flashrom FMAP
Simon Glass [Tue, 17 Jul 2018 19:25:38 +0000 (13:25 -0600)]
binman: Add support for flashrom FMAP

Add an entry which can hold an FMAP region as used by flashrom, an
open-source flashing tool used on Linux x86 machines. This provides a
simplified non-hierarchical view of the entries in the image and has a
signature at the start to allow flashrom to find it in the image.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobinman: Create README.entries
Simon Glass [Tue, 17 Jul 2018 19:25:37 +0000 (13:25 -0600)]
binman: Create README.entries

Create a new README containing documentation for the entry types supported
by binman. This provides an easy reference in one place. It is
automatically generated from the source-code documentation.

Add a reference to this from the binman README.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobinman: Allow creation of entry documentation
Simon Glass [Tue, 17 Jul 2018 19:25:36 +0000 (13:25 -0600)]
binman: Allow creation of entry documentation

Binman supports quite a number of different entries now. The operation of
these is not always obvious but at present the source code is the only
reference for understanding how an entry works.

Add a way to create documentation (from the source code) which can be put
in a new 'README.entries' file.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobinman: Expand documentation for entries
Simon Glass [Tue, 17 Jul 2018 19:25:35 +0000 (13:25 -0600)]
binman: Expand documentation for entries

At present only the more complex entries are documented. It is useful to
have documentation for all entries in one place.

As a first step, add and expand the documentation to cover all entries.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobinman: Allow help to work without libfdt
Simon Glass [Tue, 17 Jul 2018 19:25:34 +0000 (13:25 -0600)]
binman: Allow help to work without libfdt

At present binman needs libfdt.py to be available before it will do
anything, even print help. Import those modules later to avoid this, as it
is bad practice to fail to even show help on startup.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobinman: Support an entry that holds text
Simon Glass [Tue, 17 Jul 2018 19:25:33 +0000 (13:25 -0600)]
binman: Support an entry that holds text

It is useful to able to write an identifying string to the image within an
entry. Add a 'text' entry type to handle this. The actual text is
typically passed to binman on the command line. The text is not itself
nul-terminated but this can be achieved if required by setting the size of
the entry to something larger than the text.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobinman: Add support for passing arguments to entries
Simon Glass [Tue, 17 Jul 2018 19:25:32 +0000 (13:25 -0600)]
binman: Add support for passing arguments to entries

Sometimes it is useful to pass binman the value of an entry property from
the command line. For example some entries need access to files and it is
not always convenient to put these filenames in the image definition
(device tree).

Add a -a option which can be used like this:

   -a<prop>=<value>

where

   <prop> is the property to set
   <value> is the value to set it to

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agodtoc: Add missing comments to fdt_util
Simon Glass [Tue, 17 Jul 2018 19:25:31 +0000 (13:25 -0600)]
dtoc: Add missing comments to fdt_util

This module has a few missing comments. Add them.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobinman: Add a new 'image-pos' property
Simon Glass [Wed, 1 Aug 2018 21:22:42 +0000 (15:22 -0600)]
binman: Add a new 'image-pos' property

At present each entry has an offset within its parent section. This is
useful for figuring out how entries relate to one another. However it
is sometimes necessary to locate an entry within an image, regardless
of which sections it is nested inside.

Add a new 'image-pos' property to provide this information. Also add
some documentation for the -u option binman provides, which updates the
device tree with final entry information.

Since the image position is a better symbol to use for the position of
U-Boot as obtained by SPL, update the SPL symbols to use this instead of
offset, which might be incorrect if hierarchical sections are used.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobinman: Enhance the map and fdt-update output
Simon Glass [Tue, 17 Jul 2018 19:25:28 +0000 (13:25 -0600)]
binman: Enhance the map and fdt-update output

At present the .map file produced for each image does not include the
overall image size. This is useful information.

Update the code to generate it in the .map file as well as the updated
FDT. Also fix a few comments while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobinman: Tidy up some comments in the tests
Simon Glass [Tue, 17 Jul 2018 19:25:27 +0000 (13:25 -0600)]
binman: Tidy up some comments in the tests

A few lines are commented out and can be removed. Also fix return-value
docs for _DoReadFile() and _DoReadFileDtb().

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobinman: Add comments to elf_test
Simon Glass [Tue, 17 Jul 2018 19:25:26 +0000 (13:25 -0600)]
binman: Add comments to elf_test

The purpose of some of the tests is not obvious from the function names.
Add a few comments to help with understanding.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobinman: Rename 'position' to 'offset'
Simon Glass [Wed, 1 Aug 2018 21:22:37 +0000 (15:22 -0600)]
binman: Rename 'position' to 'offset'

After some thought, I believe there is an unfortunate naming flaw in
binman. Entries have a position and size, but now that we support
hierarchical sections it is unclear whether a position should be an
absolute position within the image, or a relative position within its
parent section.

At present 'position' actually means the relative position. This indicates
a need for an 'image position' for code that wants to find the location of
an entry without having to do calculations back through parents to
discover this image position.

A better name for the current 'position' or 'pos' is 'offset'. It is not
always an absolute position, but it is always an offset from its parent
offset.

It is unfortunate to rename this concept now, 18 months after binman was
introduced. However I believe it is the right thing to do. The impact is
mostly limited to binman itself and a few changes to in-tree users to
binman:

   tegra
   sunxi
   x86

The change makes old binman definitions (e.g. downstream or out-of-tree)
incompatible if they use the 'pos = <...>' property. Later work will
adjust binman to generate an error when it is used.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobinman: Don't depend on dict order in ELF testOutsideFile()
Simon Glass [Tue, 17 Jul 2018 19:25:24 +0000 (13:25 -0600)]
binman: Don't depend on dict order in ELF testOutsideFile()

At present this test assumes that the symbols are returned in address
order. However, objdump can list symbols in any order and dictionaries do
not guarantee any particular order when iterating through item.

Update elf.GetSymbols() to return an OrderedDict, sorted by address, to
avoid any problems.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agoMerge tag 'arc-updates-for-2018.09-rc2' of git://git.denx.de/u-boot-arc
Tom Rini [Wed, 1 Aug 2018 13:26:15 +0000 (09:26 -0400)]
Merge tag 'arc-updates-for-2018.09-rc2' of git://git.denx.de/u-boot-arc

That's a set of prety minor changes and fixes for ARC.

Among them:
 * Improvement in CREG GPIO driver used on ARC dev boards
   that allow us to re-use the driver for SPI's chip select

 * Enable SPI-flsh on AXS10x boards which allows to update
   U-Boot binary that gets loaded by boot-ROM

 * Fix accommodating always utilized unaligned access by
   GCC for ARC starting from 8.1.0

6 years agoMerge git://git.denx.de/u-boot-mpc85xx
Tom Rini [Wed, 1 Aug 2018 00:01:30 +0000 (20:01 -0400)]
Merge git://git.denx.de/u-boot-mpc85xx

6 years ago.travis.yml: Exclude openrd platforms
Tom Rini [Tue, 31 Jul 2018 18:49:34 +0000 (14:49 -0400)]
.travis.yml: Exclude openrd platforms

The openrd platforms are currently orphaned, and are constantly on-edge
or overflowing their binary limit.  Exclude them from travis for now.

Cc: Vagrant Cascadian <vagrant@debian.org>
Cc: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
6 years ago.travis.yml: Exclude kirkwood machines from the arm926ejs job
Tom Rini [Tue, 31 Jul 2018 18:48:42 +0000 (14:48 -0400)]
.travis.yml: Exclude kirkwood machines from the arm926ejs job

We have a specific job for kirkwood platforms so exclude them from this
job.

Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoopenrd: Mark as Orphaned
Tom Rini [Tue, 31 Jul 2018 11:22:13 +0000 (07:22 -0400)]
openrd: Mark as Orphaned

After talking with Albert, mark these boards as orphaned as he no longer
has one.

Cc: Albert ARIBAUD <albert-u-boot@aribaud.net>
Cc: Vagrant Cascadian <vagrant@debian.org>
Cc: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agols1046ardb: Add qspi_spl variant to the MAINTAINERS file
Tom Rini [Tue, 31 Jul 2018 12:49:42 +0000 (08:49 -0400)]
ls1046ardb: Add qspi_spl variant to the MAINTAINERS file

Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agopico-pi: Add Otavio as maintainer
Tom Rini [Tue, 31 Jul 2018 12:48:46 +0000 (08:48 -0400)]
pico-pi: Add Otavio as maintainer

Update the MAINTAINERS file to list Otavio Salvador as the maintainer
for this board.

Acked-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agodm: Fix CMD_DM enabling
Michal Simek [Tue, 31 Jul 2018 06:11:28 +0000 (08:11 +0200)]
dm: Fix CMD_DM enabling

The patch "dm: Change CMD_DM enabling"
(sha1: 08a00cba06a7e608ae65e3d7ea225cf8c639429d) was incorrectly updated
and PICO_IMX7D is missing imply CMD_DM and WARP7 has it twice.
This patch is fixing it.

Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoRevert "powerpc/T104xRDB: Fix endian access issue on EHCI intinalization"
Ran Wang [Thu, 14 Jun 2018 02:45:40 +0000 (10:45 +0800)]
Revert "powerpc/T104xRDB: Fix endian access issue on EHCI intinalization"

There was an EHCI endian accessor issue. Now it's fixed by commit
9829ce2ff25c ("usb: ehci: Fix accessors for big-endian platforms and
descriptors"). Revert commit e6a727fffec7 ("powerpc/T104xRDB: Fix
endian access issue on EHCI intinalization"). On T104x platform,
USB EHCI register use little endian.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[YS: revised commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoRevert "powerpc/p1_p2_rdb_pc: Fix endian access issue on EHCI intinalization"
Ran Wang [Thu, 14 Jun 2018 02:45:39 +0000 (10:45 +0800)]
Revert "powerpc/p1_p2_rdb_pc: Fix endian access issue on EHCI intinalization"

There was an EHCI endian accessor issue. Now it's fixed by commit
9829ce2ff25c ("usb: ehci: Fix accessors for big-endian platforms and
descriptors"). Revert commit 0f2296bab141 ("powerpc/p1_p2_rdb_pc:
Fix endian access issue on EHCI intinalization"). On P1 P2 platforms,
USB EHCI register use little endian.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[YS: revised commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoboard: sun50i: h6: Add OrangePi One Plus initial support
Jagan Teki [Sat, 28 Jul 2018 18:33:31 +0000 (00:03 +0530)]
board: sun50i: h6: Add OrangePi One Plus initial support

OrangePi One Plus is Allwinner H6 based open-source SBC,
which support:
- Allwinner H6 Quad-core 64-bit ARM Cortex-A53
- GPU Mali-T720
- 1GB LPDDR3 RAM
- AXP805 PMIC
- 1Gbps GMAC via RTL8211
- USB 2.0 Host, OTG
- HDMI port
- 5V/2A DC power supply

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
6 years agomtd: nand: sunxi: Return on set_feature only when not ENOTSUPP
Mylène Josserand [Fri, 13 Jul 2018 16:10:24 +0000 (18:10 +0200)]
mtd: nand: sunxi: Return on set_feature only when not ENOTSUPP

Return the error code of the set_features function only if
the error code is not ENOTSUPP. Otherwise, if this function
is not supported, it will return and fail to initialize the
NAND.

Signed-off-by: Mylène Josserand <mylene.josserand@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
6 years agomtd: nand: nand_base: Convert EINVAL into ENOTSUPP
Mylène Josserand [Fri, 13 Jul 2018 16:10:23 +0000 (18:10 +0200)]
mtd: nand: nand_base: Convert EINVAL into ENOTSUPP

Convert the EINVAL error into ENOTSUPP when the GET/SET_FEATURES
is not supported.

Signed-off-by: Mylène Josserand <mylene.josserand@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
6 years agoconfigs: sunxi: Drop CONFIG_SUNXI_USB_PHYS
Jagan Teki [Fri, 20 Jul 2018 07:04:23 +0000 (12:34 +0530)]
configs: sunxi: Drop CONFIG_SUNXI_USB_PHYS

Now number of PHY on Allwinner is handling via dt data,
drivers at phy/allwinner/phy-sun4i-usb.c

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agophy: sun4i-usb: Update PHY#3 rst_mask only for H3_H5
Jagan Teki [Fri, 20 Jul 2018 07:04:22 +0000 (12:34 +0530)]
phy: sun4i-usb: Update PHY#3 rst_mask only for H3_H5

Only H3 and H5 have 4 PHYS so restrict rst_mask only for them
by checking PHY id as 3 and update the proper bits.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agophy: sun4i-usb: Remove usb_clk_cfg set in probe
Jagan Teki [Fri, 20 Jul 2018 07:04:21 +0000 (12:34 +0530)]
phy: sun4i-usb: Remove usb_clk_cfg set in probe

usb_clk_cfg is setting CTRL_PHYGATE bit value in probe
which is BIT 0 for sun4i, 6i and 8 for a83t but all
these were handling in phy ops init exit calls.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agophy: sun4i-usb: Call phy_passby even for PHY#0
Jagan Teki [Fri, 20 Jul 2018 07:04:20 +0000 (12:34 +0530)]
phy: sun4i-usb: Call phy_passby even for PHY#0

On newer Allwinner SoC, there is a pair of EHCI/OHCI USB hosts
for OTG host mode. USB PHY passby must be configured for its
corresponding PHY. so we can call for PHY#0. on the other hand
in past usb-phy code the same thing can be restricted for
Lower SoC's, other than H3/H5/A64.

Now there is no need to restrict usb passby since the phy driver
is DT enabled, and the respective phy calls will trigger based
DT information initiated by the drivers.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agovideo: sunxi: de2: fix SimpleFB node creation when DE2 not probed
Icenowy Zheng [Fri, 27 Jul 2018 15:50:53 +0000 (23:50 +0800)]
video: sunxi: de2: fix SimpleFB node creation when DE2 not probed

Sometimes when a monitor without EDID information is plugged, the DE2
won't be probed (because of lack of timing information), but the HDMI
node is probed, thus a SimpleFB node with invalid information will be
populated.

Also detect whether DE2 is probed when creating SimpleFB node.

Fixes: be5b96f0e411 ("sunxi: setup simplefb for Allwinner DE2")
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
6 years agosunxi: add support for Pine H64 board
Icenowy Zheng [Sat, 21 Jul 2018 08:20:32 +0000 (16:20 +0800)]
sunxi: add support for Pine H64 board

Pine H64 is a SBC with Allwinner H6 SoC produced by Pine64. It features
1GiB/2GiB/4GiB(3GiB usable) DRAM, two USB 2.0 ports, one USB 3.0 port
and a mPCIE slot.

Add support for it.

The device tree is from Linux next-20180720.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agosunxi: add support for Allwinner H6 SoC
Icenowy Zheng [Sat, 21 Jul 2018 08:20:31 +0000 (16:20 +0800)]
sunxi: add support for Allwinner H6 SoC

Allwinner H6 is a new SoC from Allwinner features USB3 and PCIe
interfaces.

This patch adds support for it.

The corresponding DTSI file, from Linux next-20180720, is also
introduced.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agosunxi: add DRAM support to H6
Icenowy Zheng [Sun, 22 Jul 2018 22:13:34 +0000 (06:13 +0800)]
sunxi: add DRAM support to H6

The Allwinner H6 SoC comes with a set of new DRAM controller+PHY combo.
Both the controller and the PHY seem to be originate from DesignWare,
and are similar to the ones in ZynqMP SoCs.

This commit introduces an initial DRAM driver for H6, which contains
only LPDDR3 support. The currently known SBCs with H6 all come with
LPDDR3 memory, including Pine H64 and several Orange Pi's.

The BSP DRAM initialization code is closed source and violates GPL. Code
in this commit is written by experimenting, referring the code/document
of other users of the IPs (mainly the ZynqMP, as it's the only found PHY
reference) and disassebling the BSP blob.

Thanks for Jernej Skrabec for review and fix some issues in this driver
(including the most critical one which made it to work), and rewrite
some code from register dump!

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agosunxi: add MMC support for H6
Icenowy Zheng [Sat, 21 Jul 2018 08:20:29 +0000 (16:20 +0800)]
sunxi: add MMC support for H6

The Allwinner H6 SoC has 3 MMC controllers like the ones in A64, with
the MMC2 come with the capability to do crypto by EMCE.

Add MMC support for H6. EMCE support is not added yet.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agosunxi: add UART0 setup for H6
Icenowy Zheng [Sat, 21 Jul 2018 08:20:28 +0000 (16:20 +0800)]
sunxi: add UART0 setup for H6

The UART0 on H6 is available at PH bank (and PF bank, but the PF one is
muxed with SD card).

Add pinmux configuration.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agosunxi: use sun6i-style watchdog for H6
Icenowy Zheng [Sat, 21 Jul 2018 08:20:27 +0000 (16:20 +0800)]
sunxi: use sun6i-style watchdog for H6

The H6 SoC has a sun6i-style watchdog in its timer part.

Enable the usage of it.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agosunxi: add clock code for H6
Icenowy Zheng [Sat, 21 Jul 2018 08:20:26 +0000 (16:20 +0800)]
sunxi: add clock code for H6

The new Allwinner H6 SoC has a brand new CCU layout.

Add clock code for it.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agosunxi: change GIC address on H6
Icenowy Zheng [Sat, 21 Jul 2018 08:20:25 +0000 (16:20 +0800)]
sunxi: change GIC address on H6

As the Allwinner H6 chip has a new memory map, its GIC MMIO address is
thus different.

Change the address on H6.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agosunxi: add config for SPL at 0x20000 on H6
Icenowy Zheng [Sat, 21 Jul 2018 08:20:24 +0000 (16:20 +0800)]
sunxi: add config for SPL at 0x20000 on H6

On the new Allwinner H6 SoC, the SRAM A2 address (SPL load address) is
at 0x20000, which is different with any old Allwinner SoCs.

Add SPL position and size configuration for this.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agosunxi: change ATF position for H6
Icenowy Zheng [Sat, 21 Jul 2018 08:20:23 +0000 (16:20 +0800)]
sunxi: change ATF position for H6

H6 has different SRAM A2 address, so the ATF load address is also
different.

Add judgment code to sunxi 64-bit FIT generation script. It will judge
the SoC by the device tree's name.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agosunxi: change RMR64's RVBAR address for H6
Icenowy Zheng [Sat, 21 Jul 2018 08:20:22 +0000 (16:20 +0800)]
sunxi: change RMR64's RVBAR address for H6

Allwinner H6 has a different RVBAR address with A64/H5.

Add conditional RVBAR configuration into the code which does RMR switch.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agosunxi: add basic memory map definitions of H6 SoC
Icenowy Zheng [Sat, 21 Jul 2018 08:20:21 +0000 (16:20 +0800)]
sunxi: add basic memory map definitions of H6 SoC

The Allwinner H6 SoC come with a totally new memory map.

Add basical definition of the new memory map into a header file, and let
the cpu.h header include it in the situation of H6.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agosunxi: change SUNXI_HIGH_SRAM option to SUNXI_SRAM_ADDRESS
Icenowy Zheng [Sat, 21 Jul 2018 08:20:20 +0000 (16:20 +0800)]
sunxi: change SUNXI_HIGH_SRAM option to SUNXI_SRAM_ADDRESS

The new Allwinner H6 SoC has its SRAM A1 at neither 0x0 nor 0x10000, but
it's at 0x20000. Thus the SUNXI_HIGH_SRAM option needs to be refactored
to support this new configuration.

Change it to SUNXI_SRAM_ADDRESS, which holds the real address of SRAM
A1 in the memory map.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agosunxi: enable SATA on Banana Pi M2 Berry
Simon Baatz [Mon, 23 Jul 2018 22:22:19 +0000 (00:22 +0200)]
sunxi: enable SATA on Banana Pi M2 Berry

Banana Pi M2 Ultra and M2 Berry are very similar boards.  SATA can be
enabled exactly the same as for M2 Ultra introduced in
commit daa8b75a5527 ("sunxi: enable SATA on Banana Pi M2 Ultra").

Signed-off-by: Simon Baatz <gmbnomis@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agoARC: Enable unaligned access in hardware if compiler uses it
Alexey Brodkin [Sun, 29 Jul 2018 06:47:52 +0000 (09:47 +0300)]
ARC: Enable unaligned access in hardware if compiler uses it

Even if ARC core might handle unaligned access to data this
hardware feature by default is disabled.

But GCC starting from 8.1.0 unconditionally uses it for ARC HS cores.
Which leads to quite strange and fatal run-time failures like the one
below if HW is not configured properly:
| hsdk# sf probe
| Misaligned data access exception @ 0xbff794d4
| ECR:    0x000d0000
| RET:    0xbff794d4
| BLINK:  0xbff79644
| STAT32: 0x00000800
| GP: 0x1003e000   r25: 0xbfd58f08
| BTA: 0xbff794a4  SP: 0xbfd58cd4  FP: 0xbfd58ef0
| LPS: 0xbff90240 LPE: 0xbff90244 LPC: 0x00000000
| r00: 0x00000000 r01: 0x00000003 r02: 0x000026bf
| r03: 0x00000000 r04: 0x00000100 r05: 0x00000000
| r06: 0x00000001 r07: 0x00000000 r08: 0x1dcd6500
| r09: 0x00000000 r10: 0x00200000 r11: 0x00000000
| r12: 0x1b3d4440 r13: 0xbff9eca4 r14: 0xbfd59d68
| r15: 0xbfd60cd0 r16: 0x00000000 r17: 0x00000000
| r18: 0xbff9ed14 r19: 0xbfd59c78 r20: 0xbfd58d40
| r21: 0xbfd58d44 r22: 0x00000000 r23: 0x00000000
| r24: 0xbfd59ba8
| Resetting CPU ...

Now we're checking for __ARC_UNALIGNED__ define emitted by the
compiler if it's going to use unaligned access and then we
force-enable it in hardware too.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoHSDK: Fixes and improvements in README
Alexey Brodkin [Wed, 11 Jul 2018 15:54:48 +0000 (18:54 +0300)]
HSDK: Fixes and improvements in README

1. Explained prerequisites for "make bsp-generate" command.
2. Cleaned-up duplicates

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoARC: AXS10x/HSDK: Use our own version of mkimage
Alexey Brodkin [Wed, 11 Jul 2018 15:24:44 +0000 (18:24 +0300)]
ARC: AXS10x/HSDK: Use our own version of mkimage

Since U-Boot tools are being built anyways it's much nicer
to use them instead of relying on some of them bein installed
on build host (which might easily not be the case).

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoARC: AXS10x: add tool and make target to generate bsp
Eugeniy Paltsev [Wed, 27 Jun 2018 12:20:48 +0000 (15:20 +0300)]
ARC: AXS10x: add tool and make target to generate bsp

AXS10x boards have preloader that reads SPI flash pages and searches
special image header to fetch and load binary.

Add tool, make target (bsp-generate) to generate
update script and u-boot binary image with header for preloader.

Also add script to default environment to apply updates.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoAXS10x: add spi flash support
Eugeniy Paltsev [Fri, 8 Jun 2018 15:52:14 +0000 (18:52 +0300)]
AXS10x: add spi flash support

AXS10x boards have n25q512 spi flash IC, so add corresponding
nodes to device tree and enaple corresponding options in
defconfig.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoCREG GPIO: add device tree bindings
Eugeniy Paltsev [Fri, 8 Jun 2018 14:58:24 +0000 (17:58 +0300)]
CREG GPIO: add device tree bindings

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoGPIO: CREG: improve flexibility of hsdk-creg-gpio driver
Eugeniy Paltsev [Fri, 8 Jun 2018 14:58:23 +0000 (17:58 +0300)]
GPIO: CREG: improve flexibility of hsdk-creg-gpio driver

CREG GPIO is a driver for weird soc-specific output ports, which are
controlled by some fields in memory mapped register.

Example:

31                 9        7        5           0   < bit number
|                  |        |        |           |
[     not used     | gpio-1 | gpio-0 | <-shift-> ]   < 32 bit register
                       ^        ^
                       |        |
                write 0x2 == set output to "1" (activate)
                write 0x3 == set output to "0" (deactivate)

As of tooday we only support fixed (hardcoded) bit per gpio line,
activate / deactivatei and shift values. Fix that by read them from
device tree to be able to use this driver for other boards.

Remove "hsdk" prefix from compatible string as this driver can be
used with different boards like HSDK, AXS101, AXS103, etc.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoPrepare v2017.09-rc1 v2018.09-rc1
Tom Rini [Tue, 31 Jul 2018 01:47:29 +0000 (21:47 -0400)]
Prepare v2017.09-rc1

Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agofs-test.sh: Update expected result output
Tom Rini [Mon, 30 Jul 2018 20:06:04 +0000 (16:06 -0400)]
fs-test.sh: Update expected result output

Given 0dc1bfb7302d ("fs: fat: cannot write to subdirectories") we have
changed how the FAT code works from creating the illegal file "./file"
and instead rejecting the path.  The correct behavior would be to write
"file" to "." but not writing an illegal file is a step in the right
direction.  For now, update the expected output to account for the
failure.

Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoMerge tag 'signed-efi-next' of git://github.com/agraf/u-boot
Tom Rini [Mon, 30 Jul 2018 20:02:29 +0000 (16:02 -0400)]
Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot

Patch queue for efi - 2018-07-25

Highlights this time:

  - Many small fixes to improve spec compatibility (found by SCT)
  - Almost enough to run with sandbox target
  - GetTime() improvements
  - Enable EFI_LOADER and HYP entry on ARMv7 with NONSEC=y