oweals/u-boot.git
5 years agoMerge tag 'u-boot-amlogic-20181207' of git://git.denx.de/u-boot-amlogic
Tom Rini [Sat, 8 Dec 2018 00:01:09 +0000 (19:01 -0500)]
Merge tag 'u-boot-amlogic-20181207' of git://git.denx.de/u-boot-amlogic

Two fixes for the Amlogic Pinctrl driver :
- bad usage of clrsetbits_le32
- bad pin definition for AXG Family

5 years agoMerge branch '2018-12-06-master-imports'
Tom Rini [Fri, 7 Dec 2018 15:55:12 +0000 (10:55 -0500)]
Merge branch '2018-12-06-master-imports'

- Various FAT fixes
- Hardware spinlock uclass
- DMA uclass
- Various am335x fixes
- DT resyncs for a number of TI platforms
- stm32 updates

5 years agoarm: dts: am33xx: Sync dts with Linux 4.20.0
Felix Brack [Wed, 5 Dec 2018 13:53:42 +0000 (14:53 +0100)]
arm: dts: am33xx: Sync dts with Linux 4.20.0

This patch synchronizes the am33xx SoC specific files with those from
Linux 4.20.0. Hence all board maintainers of am33xx based boards are
on the cc list.
The main purpose of this patch is to prevent further diverging of the
dts files from U-Boot and those from Linux. It aims to set the stage
for the synchronization of board specific dts files. Example: I'm the
maintainer of the PDU001 board: once this patch is applied successfully
I will make changes to the board specific dts file in Linux only and
then post a patch with a copy of this exact dts file to U-Boot. This
will make U-Boot and Linux remain in sync.
The stumbling block of https://patchwork.ozlabs.org/patch/943627 was
removed by the patch https://patchwork.ozlabs.org/patch/962428 from
Lokesh Vutla (many thanks!). This omap-serial driver allows using the
Linux am33xx.dtsi file in U-Boot.
Other changes to dts and dtsi files made by this patch are mainly to
prevent _new_ warnings during the build process. Especially the warning
at pinmux@800 stating 'unnecessary #address-cells/#size-cells without
"ranges" or child "reg"' was not removed. This warning is a good example
showing the benefit of the synchronization: if it needs to be fixed it
will be fixed in Linux and ported back to U-Boot.
Buildman reports all 46 am33xx SoC based boards to build fine, with
warnings of course. Nevertheless this patch should be tested thoroughly
on as many boards as possible to prevent any collateral damage.

Signed-off-by: Felix Brack <fb@ltec.ch>
Reviewed-by: Tom Rini <trini@konsulko.com>
5 years agospl/tpl: change banner into upper case
Heiko Schocher [Wed, 5 Dec 2018 10:29:54 +0000 (11:29 +0100)]
spl/tpl: change banner into upper case

commit d6330064634a ("spl: Add a define for SPL_TPL_PROMPT")

changes the SPL/TPL banner from upper case into lower
case. As SPL and TPL are three-letter acronyms and they
are written in upper case, change it back to upper case.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agoARM: DTS: da850-evm: Re-sync da850-evm.dts from Linux 4.20
Adam Ford [Mon, 3 Dec 2018 14:29:44 +0000 (08:29 -0600)]
ARM: DTS: da850-evm: Re-sync da850-evm.dts from Linux 4.20

There has been some natural evolution of the device tree, so
resync with 4.20

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agoARM: dts: da850-lcdk: Sync from Linux 4.20
Adam Ford [Mon, 3 Dec 2018 14:29:43 +0000 (08:29 -0600)]
ARM: dts: da850-lcdk: Sync from Linux 4.20

Re-synce the device tree files from Linux 4.20

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agoARM: DTS: da850: Sync from Linux 4.20
Adam Ford [Mon, 3 Dec 2018 14:29:42 +0000 (08:29 -0600)]
ARM: DTS: da850: Sync from Linux 4.20

Re-sync with 4.20 due some some natural evolution.

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agoARM: DTS: Resync LogicPD-Torpedo-37xx-devkit with Linux 4.20
Adam Ford [Mon, 3 Dec 2018 14:17:29 +0000 (08:17 -0600)]
ARM: DTS: Resync LogicPD-Torpedo-37xx-devkit with Linux 4.20

Migrate some small device tree fixes from Linux 4.20.

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agoARM: DTS: Resync LogicPD SOM-LV with Linux 4.20
Adam Ford [Mon, 3 Dec 2018 14:15:59 +0000 (08:15 -0600)]
ARM: DTS: Resync LogicPD SOM-LV with Linux 4.20

There have been a few fixes to the device trees, so this
re-syncs the dts/dtsi files with Linux

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agoserial: omap: Add code for early debugging
Felix Brack [Mon, 3 Dec 2018 14:12:25 +0000 (15:12 +0100)]
serial: omap: Add code for early debugging

This patch adds code missing when CONFIG_DEBUG_UART_OMAP is enabled as
early debugging UART. The code is basically copied from the ns16550
driver.

Signed-off-by: Felix Brack <fb@ltec.ch>
5 years agotravis: Bump ARC tools to arc-2018.09
Alexey Brodkin [Mon, 3 Dec 2018 14:09:13 +0000 (17:09 +0300)]
travis: Bump ARC tools to arc-2018.09

Build tested in Travis, see:
https://travis-ci.org/abrodkin/u-boot/jobs/462808237

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
5 years agoARM: DTS: Resync am3517-evm.dts with Linux 4.20
Adam Ford [Mon, 3 Dec 2018 14:06:28 +0000 (08:06 -0600)]
ARM: DTS: Resync am3517-evm.dts with Linux 4.20

The DTS file for the AM3517 had the incorrect CD polarity.  Resync with
the fixed DTS file from Linux.

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agoensure active menuitem is inside menu
Frank Wunderlich [Mon, 3 Dec 2018 10:23:41 +0000 (11:23 +0100)]
ensure active menuitem is inside menu

Hi,

setting active menuitem currently can be outside of menu which results in invisible selection

attached Patch fixes this

regards Frank

>From 1d9c4cb8b3e2dd9b0a7a6a2d4a21684d0a099dbf Mon Sep 17 00:00:00 2001
From: Frank Wunderlich <frank-w@public-files.de>
Date: Sun, 2 Dec 2018 11:23:53 +0100
Subject: [PATCH] ensure active menuitem is inside menu

if active menuitem is defined via environment var it can be outside the menu (>=menuitem-count)

this patch resets this definition back to 0

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
5 years agopinctrl: stm32: Update stm32_pinctrl_get_gpio_dev()
Patrice Chotard [Mon, 3 Dec 2018 09:52:54 +0000 (10:52 +0100)]
pinctrl: stm32: Update stm32_pinctrl_get_gpio_dev()

Due to gpio holes management, stm32_pinctrl_get_gpio_dev() must
be updated.

stm32_pinctrl_get_gpio_dev() returns from a given pin selectors
the corresponding bank gpio device and the gpio_offset inside this
gpio bank.

Update also all functions which makes usage of stm32_pinctrl_get_gpio_dev.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
5 years agogpio: stm32f7: Remove CONFIG_CLK flag.
Patrice Chotard [Mon, 3 Dec 2018 09:52:53 +0000 (10:52 +0100)]
gpio: stm32f7: Remove CONFIG_CLK flag.

As all STM32 SoCs supports CONFIG_CLK flag,
it becomes useless in this driver, remove it.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
5 years agogpio: stm32f7: Move STM32_GPIOS_PER_BANK into gpio.h
Patrice Chotard [Mon, 3 Dec 2018 09:52:52 +0000 (10:52 +0100)]
gpio: stm32f7: Move STM32_GPIOS_PER_BANK into gpio.h

To allow access to this define by other driver, move
it into gpio.h

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
5 years agogpio: stm32f7: Add gpio bank holes management
Patrice Chotard [Mon, 3 Dec 2018 09:52:51 +0000 (10:52 +0100)]
gpio: stm32f7: Add gpio bank holes management

In some STM32 SoC packages, GPIO bank has not always 16 gpios.
Several cases can occur, gpio hole can be located at the beginning,
middle or end of the gpio bank or a combination of these 3
configurations.

For that, gpio bindings offer the gpio-ranges DT property which
described the gpio bank mapping.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
5 years agopinctrl: stm32: Move gpio_dev list filling outside probe()
Patrice Chotard [Mon, 3 Dec 2018 09:52:50 +0000 (10:52 +0100)]
pinctrl: stm32: Move gpio_dev list filling outside probe()

Move gpio_dev list filling outside probe() to speed-up U-boot
boot sequence execution. This list is populated only when needed.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
5 years agoserial: bcm6858: remove driver and switch to bcm6345
Álvaro Fernández Rojas [Sat, 1 Dec 2018 17:42:09 +0000 (18:42 +0100)]
serial: bcm6858: remove driver and switch to bcm6345

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
5 years agoarm: implement {in, out}_{16, 32} and {clr, set, clrset}bits_{16, 32}
Álvaro Fernández Rojas [Sat, 1 Dec 2018 17:42:08 +0000 (18:42 +0100)]
arm: implement {in, out}_{16, 32} and {clr, set, clrset}bits_{16, 32}

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
5 years agoserial: bcm6345: switch to raw I/O functions
Álvaro Fernández Rojas [Sat, 1 Dec 2018 17:42:07 +0000 (18:42 +0100)]
serial: bcm6345: switch to raw I/O functions

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
5 years agoarm: am335x-pdu001: Enable CONFIG_BLK and CONFIG_DM_MMC
Felix Brack [Fri, 30 Nov 2018 09:23:36 +0000 (10:23 +0100)]
arm: am335x-pdu001: Enable CONFIG_BLK and CONFIG_DM_MMC

This patch enables CONFIG_BLK as well as CONFIG_DM_MMC for the PDU001
board. It depends on Patrice Chotard's patch 'power: regulator: denied
disable on always-on regulator' which prevents power cycling the vmmc
supply. Without this patch the board will not boot as vmmc is
unfortunately used by other board components, not just eMMC and micro SD
card. Furthermore my patch 'dts: am335x-pdu001: Fix polarity of card
detection input' is required to boot from external micro SD card. Without
this patch no SD card will be detected and hence booting will fail.

Signed-off-by: Felix Brack <fb@ltec.ch>
Reviewed-by: Tom Rini <trini@konsulko.com>
5 years agodts: am335x-pdu001: Fix polarity of card detection input
Felix Brack [Thu, 29 Nov 2018 12:45:06 +0000 (13:45 +0100)]
dts: am335x-pdu001: Fix polarity of card detection input

When a micro SD card is inserted in the PDU001 card cage, the card
detection switch is opened and the corresponding GPIO input is driven
by a pull-up. Hence change the active level of the card detection
input from low to high.

Signed-off-by: Felix Brack <fb@ltec.ch>
5 years agotest: dma: add dma-uclass test
Grygorii Strashko [Wed, 28 Nov 2018 18:17:51 +0000 (19:17 +0100)]
test: dma: add dma-uclass test

Add a sandbox DMA driver implementation (provider) and corresponding DM
test.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Álvaro Fernández Rojas <noltari@gmail.com>
5 years agodma: add channels support
Álvaro Fernández Rojas [Wed, 28 Nov 2018 18:17:50 +0000 (19:17 +0100)]
dma: add channels support

This adds channels support for dma controllers that have multiple channels
which can transfer data to/from different devices (enet, usb...).

DMA channle API:
 dma_get_by_index()
 dma_get_by_name()
 dma_request()
 dma_free()
 dma_enable()
 dma_disable()
 dma_prepare_rcv_buf()
 dma_receive()
 dma_send()

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
[grygorii.strashko@ti.com: drop unused dma_get_by_index_platdata(),
 add metadata to send/receive ops, add dma_prepare_rcv_buf(),
 minor clean up]
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agodma: move dma_ops to dma-uclass.h
Álvaro Fernández Rojas [Wed, 28 Nov 2018 18:17:49 +0000 (19:17 +0100)]
dma: move dma_ops to dma-uclass.h

Move dma_ops to a separate header file, following other uclass
implementations. While doing so, this patch also improves dma_ops
documentation.

Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
5 years agoconfigs: am335x_hs_evm_uart: Add YMODEM SPL support for UART boot
Andrew F. Davis [Wed, 28 Nov 2018 16:56:06 +0000 (10:56 -0600)]
configs: am335x_hs_evm_uart: Add YMODEM SPL support for UART boot

UART booting requires YMODEM support. Add this here.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
5 years agoARM: at91: lds: add test for SPL binary size and bss size
Eugen.Hristev@microchip.com [Wed, 28 Nov 2018 09:33:43 +0000 (09:33 +0000)]
ARM: at91: lds: add test for SPL binary size and bss size

Add test for the SPL binary size and the bss section size.
This will throw an error at build time if the SPL sections
do not fit in the designated RAM area, thus avoiding oversizing the SPL.

Based on original work by Wenyou Yang.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
5 years agopinctrl: meson: axg: Fix GPIO pin offsets
Carlo Caione [Thu, 6 Dec 2018 08:08:11 +0000 (08:08 +0000)]
pinctrl: meson: axg: Fix GPIO pin offsets

The pin number (first and last) in the bank definition is missing the
pin base offset shifting. This is causing a miscalculation when
retrieving the register and pin offsets in the GPIO driver causing the
'gpio' command to drive the wrong pins / GPIOs in the second GPIO chip
(the AO bank is driven correctly because the shifting is already 0).

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
5 years agopinctrl: stm32: make pinctrl use hwspinlock
Benjamin Gaignard [Tue, 27 Nov 2018 12:49:53 +0000 (13:49 +0100)]
pinctrl: stm32: make pinctrl use hwspinlock

Protect configuration registers with a hardware spinlock.

If a hwspinlock is defined in the device-tree node used it
to be sure that none of the others processors on the SoC could
change the configuration at the same time.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
5 years agohwspinlock: add stm32 hardware spinlock support
Benjamin Gaignard [Tue, 27 Nov 2018 12:49:52 +0000 (13:49 +0100)]
hwspinlock: add stm32 hardware spinlock support

Implement hardware spinlock support for STM32MP1.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
5 years agoclk: stm32: add hardware spinlock clock
Benjamin Gaignard [Tue, 27 Nov 2018 12:49:51 +0000 (13:49 +0100)]
clk: stm32: add hardware spinlock clock

Add hardware spinlock in the list of the clocks.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
5 years agodm: Add Hardware Spinlock class
Benjamin Gaignard [Tue, 27 Nov 2018 12:49:50 +0000 (13:49 +0100)]
dm: Add Hardware Spinlock class

This is uclass for Hardware Spinlocks.
It implements two mandatory operations: lock and unlock
and one optional relax operation.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
5 years agoboard: ti: ks2_evm: Over ride spl_get_load_buffer function
Keerthy [Tue, 27 Nov 2018 12:22:41 +0000 (17:52 +0530)]
board: ti: ks2_evm: Over ride spl_get_load_buffer function

Currently k2 spi boot is broken as the image header
is getting copied to an invalid memory location

CONFIG_SYS_TEXT_BASE - sizeof (struct image_size)
which maps to 0xc000000 - 0x40 = 0xbffffc0 being a reserved
location.

We cannot change the CONFIG_SYS_TEXT_BASE address as the single
stage boots like UART boot will need the address to be 0xc000000
hence override the spl_get_load_buffer to have image_header
address as CONFIG_SYS_TEXT_BASE aka 0xc000000

Signed-off-by: Keerthy <j-keerthy@ti.com>
5 years agoclk: Allow clock defaults to be set during re-reloc state for SPL only
Philipp Tomsich [Mon, 26 Nov 2018 19:20:19 +0000 (20:20 +0100)]
clk: Allow clock defaults to be set during re-reloc state for SPL only

In commit e5e06b65ad65 ("clk: Allow clock defaults to be set also
during re-reloc state") the earlier guard against setting clock
defaults in pre-reloc state was removed.  While it is easy to filter
'assigned-clocks' properties for SPL using CONFIG_OF_SPL_REMOVE_PROPS,
no such mechanism exists for the pre-reloc stage of the full U-Boot.

With the default defconfig for the RK3399-Q7 (which filter the
'assigned-clocks' property for the DTS used by SPL anyway), this
caused a pause during startup of the full U-Boot stage that lasted for
almost 10s (due to the CPU not having been clocked up yet).

This reintroduces the guard from commit f4fcba5c5baa ("clk: Allow
clock defaults to be set also during re-reloc state") and extends it
to only apply outside of a TPL/SPL build: i.e. clk_set_defaults will
now run in pre-reloc state for SPL, but only after reloc for the full
U-Boot.

References: commit f4fcba5c5baa ("clk: implement clk_set_defaults()")
References: commit e5e06b65ad65 ("clk: Allow clock defaults to be set
also during re-reloc state")
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agofs: fix FAT name extraction
Patrick Wildt [Mon, 26 Nov 2018 14:58:13 +0000 (15:58 +0100)]
fs: fix FAT name extraction

The long name apparently can be accumulated using multiple
13-byte slots.  Unfortunately we never checked how many we
can actually fit in the buffer we are reading to.

Signed-off-by: Patrick Wildt <patrick@blueri.se>
5 years agofs: check FAT cluster size
Patrick Wildt [Mon, 26 Nov 2018 14:56:57 +0000 (15:56 +0100)]
fs: check FAT cluster size

The cluster size specifies how many sectors make up a cluster.  A
cluster size of zero makes no sense, as it would mean that the
cluster is made up of no sectors.  This will later lead into a
division by zero in sect_to_clust(), so better take care of that
early.

The MAX_CLUSTSIZE define can reduced using a define to make some
room in low-memory system.  Unfortunately if the code reads a
filesystem with a bigger cluster size it will overflow the buffer.

Signed-off-by: Patrick Wildt <patrick@blueri.se>
5 years agoconfigs: stm32f746-disco: Fix stm32f746-disco boot
Patrice Chotard [Mon, 26 Nov 2018 12:42:32 +0000 (13:42 +0100)]
configs: stm32f746-disco: Fix stm32f746-disco boot

Since commit 8f651ca60ba1 ("pinctrl: stm32: Add get_pins_count() ops")
stm32f746-disco can't boot.

This is due to new memory allocation into STM32 pinctrl driver,
increase SYS_MALLOC_F_LEN from 0xC00 to 0xE00.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
5 years agomain: Drop more #ifdefs
Simon Glass [Mon, 26 Nov 2018 03:05:54 +0000 (20:05 -0700)]
main: Drop more #ifdefs

Now that many things are converted to Kconfig we can drop most of the

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agow1: fix occasional enumeration failure
Martin Fuzzey [Fri, 23 Nov 2018 09:53:06 +0000 (10:53 +0100)]
w1: fix occasional enumeration failure

Sometimes enumeration fails (about 1 in 50 times on my custom board).

The underlying reason is probably electrical but Linux does not have
the problem.

Comparing the Linux / u-boot implementations shows that Linux
retries the error case whereas u-boot aborts early.

Removing the early abort in u-boot fixes the problem.

Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
5 years agorockchip: rk3399: Add MAINTAINERS entry
Tom Rini [Thu, 6 Dec 2018 15:24:12 +0000 (10:24 -0500)]
rockchip: rk3399: Add MAINTAINERS entry

Add an entry for the Ficus EE board to the existing rock960 MAINTAINERS
file.

Signed-off-by: Tom Rini <trini@konsulko.com>
5 years agoMerge tag 'for-master-20181206' of git://git.denx.de/u-boot-rockchip
Tom Rini [Thu, 6 Dec 2018 15:15:08 +0000 (10:15 -0500)]
Merge tag 'for-master-20181206' of git://git.denx.de/u-boot-rockchip

- Changes the declaration of regs_phy in dwc2-otg to uintptr_t
  to ensure it can be cast to void* for use with writel().
- Add the Rock960 and Ficus boards.

5 years agorockchip: rk3399: Add Ficus EE board support
Manivannan Sadhasivam [Thu, 27 Sep 2018 19:03:01 +0000 (00:33 +0530)]
rockchip: rk3399: Add Ficus EE board support

Add board support for Ficus EE board from Vamrs. This board utilizes
common Rock960 family support.

Following peripherals are tested and known to work:
* Gigabit Ethernet
* USB 2.0
* MMC

Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
[Reworked based on common Rock960 family support]
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: rk3399: Add Rock960 CE board support
Manivannan Sadhasivam [Thu, 27 Sep 2018 19:03:00 +0000 (00:33 +0530)]
rockchip: rk3399: Add Rock960 CE board support

Add board support for Rock960 CE board from Vamrs. This board utilizes
common Rock960 family support.

Following peripherals are tested and known to work:
* USB 2.0
* MMC

This commit also adds DDR configuration for LPDDR3-2GiB-1600MHz which
is being used on the board.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: rk3399: Add common Rock960 family from Vamrs
Manivannan Sadhasivam [Thu, 27 Sep 2018 19:02:59 +0000 (00:32 +0530)]
rockchip: rk3399: Add common Rock960 family from Vamrs

Rock960 is a family of boards based on Rockchip RK3399 SoC from Vamrs.
It consists of Rock960 (Consumer Edition) and Ficus (Enterprise Edition)
96Boards.

Below are some of the key differences between both Rock960 and Ficus
boards:

1. Different host enable GPIO for USB
2. Different power and reset GPIO for PCI-E
3. No Ethernet port on Rock960

The common board support will be utilized by both boards. The device
tree has been organized in such a way that only the properties which
differ between both boards are placed in the board specific dts and
the reset of the nodes are placed in common dtsi file.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
[Added instructions for SD card boot]
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
5 years agoarm: dts: rockchip: add some common pin-settings to rk3399
Randy Li [Thu, 27 Sep 2018 19:02:58 +0000 (00:32 +0530)]
arm: dts: rockchip: add some common pin-settings to rk3399

Those pins would be used by many boards.

Commit grabbed from Linux:

commit b41023282d07b61a53e2c9b9508912b1e7ce7b4f
Author: Randy Li <ayaka@soulik.info>
Date:   Thu Jun 21 21:32:10 2018 +0800

    arm64: dts: rockchip: add some common pin-settings to rk3399

    Those pins would be used by many boards.

Signed-off-by: Randy Li <ayaka@soulik.info>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Randy Li <ayaka@soulik.info>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agousb: dwc2-otg: make regs_phy (in platdata) a uintptr_t
Philipp Tomsich [Thu, 6 Dec 2018 00:26:39 +0000 (01:26 +0100)]
usb: dwc2-otg: make regs_phy (in platdata) a uintptr_t

The regs_phy field of the platform data structure for dwc2-otg is
today declared an unsigned int, but will eventually be cast into a
void* for a writel operation.  This triggers errors on modern GCC
versions.

E.g. we get the following error with GCC 6.3:
  drivers/usb/phy/rockchip_usb2_phy.c: In function 'property_enable':
  arch/arm/include/asm/io.h:49:29: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast]
   #define __arch_putl(v,a)  (*(volatile unsigned int *)(a) = (v))
                               ^
  arch/arm/include/asm/io.h:117:48: note: in expansion of macro '__arch_putl'
   #define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; })
                                                  ^~~~~~~~~~~
  drivers/usb/phy/rockchip_usb2_phy.c:61:2: note: in expansion of macro 'writel'
    writel(val, pdata->regs_phy + reg->offset);
    ^~~~~~

This commit changes regs_phy to be a uintptr_t to ensure that it is
large enough to hold any valid pointer (and fix the associated
warning).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agoMerge tag 'dm-pull-5dec18' of git://git.denx.de/u-boot-dm
Tom Rini [Thu, 6 Dec 2018 01:32:25 +0000 (20:32 -0500)]
Merge tag 'dm-pull-5dec18' of git://git.denx.de/u-boot-dm

Minor sandbox enhancements  / fixes
tpm improvements to clear up v1/v2 support
buildman toolchain fixes
New serial options to set/get config

5 years agoMerge branch 'master' of git://git.denx.de/u-boot-spi
Tom Rini [Wed, 5 Dec 2018 20:06:24 +0000 (15:06 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-spi

- Various MTD fixes from Boris
- Zap various unused / legacy paths.
- pxa3xx NAND update from Miquel

Signed-off-by: Tom Rini <trini@konsulko.com>
5 years agomtd: sf: Make sf_mtd.c more robust
Boris Brezillon [Sun, 2 Dec 2018 09:54:32 +0000 (10:54 +0100)]
mtd: sf: Make sf_mtd.c more robust

SPI flash based MTD devs can be registered/unregistered at any time
through the sf probe command or the spi_flash_free() function.

This commit does not try to fix the root cause as it would probably
require rewriting most of the code and have an mtd_info object
instance per spi_flash object (not to mention that the the spi-flash
layer is likely to be replaced by a spi-nor layer ported from Linux).

Instead, we try to be as safe as can be by checking the code returned
by del_mtd_device() and complain loudly when there's nothing we can
do about the deregistration failure. When that happens we also reset
sf_mtd_info.priv to NULL, and check for NULL pointer in the mtd hooks
so that -ENODEV is returned instead of hitting a NULL pointer
dereference exception when the MTD instance is later accessed by a user.

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Heiko Schocher <hs@denx.de>
5 years agomtd: sf: Unregister the MTD device prior to removing the spi_flash obj
Boris Brezillon [Sun, 2 Dec 2018 09:54:31 +0000 (10:54 +0100)]
mtd: sf: Unregister the MTD device prior to removing the spi_flash obj

The DM implementation of spi_flash_free() does not unregister the MTD
device before removing the spi dev object. This leads to a use-after-free
bug when the MTD device is later accessed by a MTD user (observed when
attaching the device to UBI after env_sf_load() has called
spi_flash_free()).

Implement ->remove() and call spi_flash_mtd_unregister() from there.

Fixes: 9fe6d8716e09 ("mtd, spi: Add MTD layer driver")
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
5 years agomtd: Don't stop MTD partition creation when it fails on one device
Boris Brezillon [Sun, 2 Dec 2018 09:54:30 +0000 (10:54 +0100)]
mtd: Don't stop MTD partition creation when it fails on one device

MTD partition creation code is a bit tricky. It tries to figure out
when things have changed (either MTD dev list or mtdparts/mtdids vars)
and when that happens it first deletes all the partitions that had been
previously created and then creates the new ones based on the new
mtdparts/mtdids values.
But before deleting the old partitions, it ensures that none of the
currently registered parts are being used and bails out when that's
not the case. So, we end up in a situation where, if at least one MTD
dev has one of its partitions used by someone (UBI for instance), the
partitions update logic no longer works for other devs.

Rework the code to relax the logic and allow updates of MTD parts on
devices that are not being used (we still refuse to updates parts on
devices who have at least one of their partitions used by someone).

Fixes: 5db66b3aee6f ("cmd: mtd: add 'mtd' command")
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Heiko Schocher <hs@denx.de>
5 years agomtd: Make sure we don't parse MTD partitions belonging to another dev
Boris Brezillon [Sun, 2 Dec 2018 09:54:29 +0000 (10:54 +0100)]
mtd: Make sure we don't parse MTD partitions belonging to another dev

The mtdparts variable might contain partition definitions for several
MTD devices. Each partition layout is separated by a ';', so let's
make sure we don't pick a wrong name when mtdparts is malformed.

Fixes: 5db66b3aee6f ("cmd: mtd: add 'mtd' command")
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Heiko Schocher <hs@denx.de>
5 years agomtd: Make sure the name passed in mtdparts fits in mtd_name[]
Boris Brezillon [Sun, 2 Dec 2018 09:54:28 +0000 (10:54 +0100)]
mtd: Make sure the name passed in mtdparts fits in mtd_name[]

The local mtd_name[] variable is limited in size. Return an error if
the name passed in mtdparts does not fit in this local var.

Fixes: 5db66b3aee6f ("cmd: mtd: add 'mtd' command")
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Heiko Schocher <hs@denx.de>
5 years agomtd: Be more strict on the "mtdparts=" prefix check
Boris Brezillon [Sun, 2 Dec 2018 09:54:27 +0000 (10:54 +0100)]
mtd: Be more strict on the "mtdparts=" prefix check

strstr() does not guarantee that the string we're searching for is
placed at the beginning. Use strncmp() instead.

Fixes: 5db66b3aee6f ("cmd: mtd: add 'mtd' command")
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Heiko Schocher <hs@denx.de>
5 years agomtd: Use get_mtdids() instead of env_get("mtdids") in mtd_search_alternate_name()
Boris Brezillon [Sun, 2 Dec 2018 09:54:26 +0000 (10:54 +0100)]
mtd: Use get_mtdids() instead of env_get("mtdids") in mtd_search_alternate_name()

The environment is not guaranteed to contain a valid mtdids variable
when called from mtd_search_alternate_name(). Call get_mtdids() instead
of env_get("mtdids").

Fixes: ff4afa8a981e ("mtd: uboot: search for an equivalent MTD name with the mtdids")
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Tested-by: Heiko Schocher <hs@denx.de>
5 years agomtd: sf: Make sure we don't register the same device twice
Boris Brezillon [Sun, 2 Dec 2018 09:54:25 +0000 (10:54 +0100)]
mtd: sf: Make sure we don't register the same device twice

spi_flash_mtd_register() can be called several times and each time it
will register the same mtd_info instance like if it was a new one.
The MTD ID allocation gets crazy when that happens, so let's track the
status of the sf_mtd_info object to avoid that.

Fixes: 9fe6d8716e09 ("mtd, spi: Add MTD layer driver")
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
5 years agomtd: Delete partitions attached to the device when a device is deleted
Boris Brezillon [Sun, 2 Dec 2018 09:54:24 +0000 (10:54 +0100)]
mtd: Delete partitions attached to the device when a device is deleted

If we don't do that, partitions might still be exposed while the
underlying device is gone.

Fixes: 2a74930da57f ("mtd: mtdpart: implement proper partition handling")
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Heiko Schocher <hs@denx.de>
5 years agomtd: Parse mtdparts/mtdids again when the MTD list has been updated
Boris Brezillon [Sun, 2 Dec 2018 09:54:23 +0000 (10:54 +0100)]
mtd: Parse mtdparts/mtdids again when the MTD list has been updated

Updates to the MTD device list should trigger a new parsing of the
mtdids/mtdparts vars even if those vars haven't changed.

Fixes: 5db66b3aee6f ("cmd: mtd: add 'mtd' command")
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Heiko Schocher <hs@denx.de>
5 years agomtd: Add a function to report when the MTD dev list has been updated
Boris Brezillon [Sun, 2 Dec 2018 09:54:22 +0000 (10:54 +0100)]
mtd: Add a function to report when the MTD dev list has been updated

We need to parse mtdparts/mtids again everytime a device has been
added/removed from the MTD list, but there's currently no way to know
when such an update has been done.

Add an ->updated field to the idr struct that we set to true every time
a device is added/removed and expose a function returning the value
of this field and resetting it to false.

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Heiko Schocher <hs@denx.de>
5 years agox86: acpi: Generate SPCR table
Andy Shevchenko [Tue, 20 Nov 2018 21:52:38 +0000 (23:52 +0200)]
x86: acpi: Generate SPCR table

Microsoft specifies a SPCR (Serial Port Console Redirection Table) [1].
Let's provide it in U-Boot.

[1]: https://docs.microsoft.com/en-us/windows-hardware/drivers/serports/serial-port-console-redirection-table

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agox86: acpi: Add SPCR table description
Andy Shevchenko [Tue, 20 Nov 2018 21:52:37 +0000 (23:52 +0200)]
x86: acpi: Add SPCR table description

Add SPCR table description as it provided in Linux kernel.

Port subtype for ACPI_DBG2_SERIAL_PORT is used as an interface type in SPCR.
Thus, provide a set of definitions to be utilized later.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agoserial: ns16550: Provide ->getinfo() implementation
Andy Shevchenko [Tue, 20 Nov 2018 21:52:36 +0000 (23:52 +0200)]
serial: ns16550: Provide ->getinfo() implementation

New callback will supply necessary information, for example,
to ACPI SPCR table.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agoMerge git://git.denx.de/u-boot-riscv
Tom Rini [Wed, 5 Dec 2018 13:24:50 +0000 (08:24 -0500)]
Merge git://git.denx.de/u-boot-riscv

- Fix BBL may be corrupted problem.
- Support U-Boot run in S-mode.

5 years agoMerge tag 'video-updates-for-2019.01-rc2' of git://git.denx.de/u-boot-video
Tom Rini [Wed, 5 Dec 2018 13:24:14 +0000 (08:24 -0500)]
Merge tag 'video-updates-for-2019.01-rc2' of git://git.denx.de/u-boot-video

video, bmp and cls command updates

5 years agoserial: ns16550: Read reg-io-width from device tree
Andy Shevchenko [Tue, 20 Nov 2018 21:52:35 +0000 (23:52 +0200)]
serial: ns16550: Read reg-io-width from device tree

Cache the value of the reg-io-width property for the future use.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agoserial: ns16550: Group reg_* members of ns16550_platdata
Andy Shevchenko [Tue, 20 Nov 2018 21:52:34 +0000 (23:52 +0200)]
serial: ns16550: Group reg_* members of ns16550_platdata

Group reg_* members of struct ns16550_platdata together for better maintenance.

No functional change intended.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agodm: serial: Introduce ->getinfo() callback
Andy Shevchenko [Tue, 20 Nov 2018 21:52:33 +0000 (23:52 +0200)]
dm: serial: Introduce ->getinfo() callback

New callback will give a necessary information to fill up ACPI SPCR table,
for example. Maybe used later for other purposes.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Change ADR_SPACE_SYSTEM_IO to SERIAL_ADDRESS_SPACE_IO to fix build error:
Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agodm: serial: Add ->getconfig() callback
Andy Shevchenko [Tue, 20 Nov 2018 21:52:32 +0000 (23:52 +0200)]
dm: serial: Add ->getconfig() callback

In some cases it would be good to know the settings, such as parity,
of current serial console. One example might be an ACPI SPCR table
to generate using these parameters.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agopower: regulator: denied disable on always-on regulator
Patrick Delaunay [Thu, 15 Nov 2018 12:45:31 +0000 (13:45 +0100)]
power: regulator: denied disable on always-on regulator

Don't disable regulator which are tagged as "regulator-always-on" in DT.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jack Mitchell <jack@embed.me.uk>
Tested-by: Jack Mitchell <jack@embed.me.uk>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Richard Röjfors <richard@puffinpack.se>
Tested-by: Richard Röjfors <richard@puffinpack.se>
Reviewed-by: Felix Brack <fb@ltec.ch>
Tested-by: Felix Brack <fb@ltec.ch>
5 years agodm: core: add functions to get/remap I/O addresses by name
Álvaro Fernández Rojas [Mon, 3 Dec 2018 18:37:09 +0000 (19:37 +0100)]
dm: core: add functions to get/remap I/O addresses by name

This functions allow us to get and remap I/O addresses by name, which is useful when there are multiple reg addresses indexed by reg-names property.
This is needed in bmips dma/eth patch series, but can also be used on many
other drivers.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agobinman: Add myself as maintainer
Simon Glass [Mon, 26 Nov 2018 03:07:26 +0000 (20:07 -0700)]
binman: Add myself as maintainer

Add an entry for my maintainership of this tool.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agodm: (re)sort uclass ids alphabetically
Philipp Tomsich [Sun, 25 Nov 2018 18:38:54 +0000 (19:38 +0100)]
dm: (re)sort uclass ids alphabetically

The comment in uclass-id.h states that
    "U-Boot uclasses start here - in alphabetical order"
but the subsequent list is not sorted alphabetically.
This reestablishes order.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agodm: rtc: Fix function name in comment
Philipp Tomsich [Sun, 25 Nov 2018 18:32:54 +0000 (19:32 +0100)]
dm: rtc: Fix function name in comment

The documentation comment for dm_rtc_set was referring to dm_rtc_put
instead. Fix it.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agobuildman/toolchain.py: handle inconsistent tarball names
Trevor Woerner [Wed, 21 Nov 2018 08:31:13 +0000 (03:31 -0500)]
buildman/toolchain.py: handle inconsistent tarball names

Unfortunately, for some releases the kernel.org toolchain tarball names adhere
to the following pattern:

<hostarch>-gcc-<ver>-nolib-<targetarch>-<type>.tar.xz

e.g.:
x86_64-gcc-8.1.0-nolibc-aarch64-linux.tar.xz

while others use the following pattern:

<hostarch>-gcc-<ver>-nolib_<targetarch>-<type>.tar.xz

e.g.:

x86_64-gcc-7.3.0-nolibc_aarch64-linux.tar.xz

Notice that the first pattern has dashes throughout, while the second has
dashes throughout except just before the target architecture which has an
underscore.

The "dash throughout" versions from kernel.org are:

8.1.0, 6.4.0, 5.5.0, 4.9.4, 4.8.5, 4.6.1

while the "dash and underscore" versions from kernel.org are:

7.3.0, 4.9.0, 4.8.0, 4.7.3, 4.6.3, 4.6.2, 4.5.1, 4.2.4

This tweak allows the code to handle both versions. Note that this tweak also
causes the architecture parsing to get confused and find the following two
bogus architectures, "2.0" and "64", which are explicitly checked for, and
removed.

Signed-off-by: Trevor Woerner <trevor@toganlabs.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Change single quotes to double quotes:
Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agobuildman/toolchain.py: fix toolchain directory
Trevor Woerner [Wed, 21 Nov 2018 08:31:12 +0000 (03:31 -0500)]
buildman/toolchain.py: fix toolchain directory

The hexagon toolchain (4.6.1) from kernel.org, for example, was packaged in
a way that is different from most toolchains. The first entry when unpacking
most toolchain tarballs is:

gcc-<version>-nolib/<targetarch>-<system>

e.g.:

gcc-8.1.0-nolibc/aarch64-linux/

The first entry of the hexagon toolchain, however, is:

gcc-4.6.1-nolibc/

This causes the buildman logic in toolchain.py::ScanPath() to not be able to
find the "*gcc" executable since it looks in gcc-4.6.1-nolib/{.|bin|usr/bin}
instead of gcc-4.6.1/hexagon-linux/{.|bin|usr/bin}. Therefore when buildman
tries to download a set of toolchains that includes hexagon, the script fails.

This update takes the second line of the tarball unpacking (which works for
all the toolchains I've tested from kernel.org) and parses it to take the
first two elements, separated by '/'. It makes this logic a bit more robust.

Signed-off-by: Trevor Woerner <trevor@toganlabs.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agoAdd inttypes.h
Simon Glass [Sat, 24 Nov 2018 04:29:43 +0000 (21:29 -0700)]
Add inttypes.h

Even if U-Boot does not use this, some libraries do. Add back this header
file so that the build does not fall back to using the host version, which
may include stdint.h and break the build due to conflicts with uint64_t,
etc.

This partially reverts commit dee37fc99d94 ("Remove <inttypes.h> includes
and PRI* usages in printf() entirely")

The only change from the file that was in U-Boot until recently is that it
now comes twice as close to passing checkpatch. The remaining warnings
pertain to the typedefs, which checkpatch does not like.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agoAdd UINT32_MAX and UINT64_MAX
Simon Glass [Sat, 24 Nov 2018 04:29:42 +0000 (21:29 -0700)]
Add UINT32_MAX and UINT64_MAX

These constants are defined by stdint.h but not by kernel.h, which is
its stand-in in U-Boot. Add the definitions so that libraries which expect
stdint.h constants can work.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agotime: Update mdelay() to delay in one large chunk
Simon Glass [Sat, 24 Nov 2018 04:29:40 +0000 (21:29 -0700)]
time: Update mdelay() to delay in one large chunk

The current function delays in one millisecond at a time. This does not
work well on sandbox since it results in lots of calls to usleep(1000) in
a tight loop. This makes the sleep duration quite variable since each call
results in a sleep of *at least* 1000us, but possibly more. Depending on
how busy the machine is, the sleep time can change quite a bit.

We cannot fix this in general, but we can reduce the effect by doing a
single sleep. The multiplication works fine with an unsigned long argument
up until a sleep time of about 4m milliseconds. This is over an hour and
we can be sure that delays of that length are not useful.

Update the mdelay() function to call udelay() only once with the
calculated delay value.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agovideo: backlight: Fix log message in enable_sequence()
Simon Glass [Sat, 24 Nov 2018 04:29:39 +0000 (21:29 -0700)]
video: backlight: Fix log message in enable_sequence()

This has an extra argument. Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
5 years agoinput: i8042: Use remove() instead of exported functions
Simon Glass [Sat, 24 Nov 2018 04:29:38 +0000 (21:29 -0700)]
input: i8042: Use remove() instead of exported functions

We should not have exported functions in a driver. The i8042_disable()
function is used to disable the keyboard. Provide a remove() method
instead, which is the standard way of disabling a device.

We could potentially add a method to flush input but that does not seem
necessary.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agocros_ec: Adjust to use v1 vboot context only
Simon Glass [Sat, 24 Nov 2018 04:29:37 +0000 (21:29 -0700)]
cros_ec: Adjust to use v1 vboot context only

At present there are no users of the 64-byte v2 context. The v1 context is
only 16 bytes long and currently an error is raised if too much data is
returned from the EC.

Update the code to limit the size to 16 bytes.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agocros: Correct a printf() string and comment
Simon Glass [Sat, 24 Nov 2018 04:29:36 +0000 (21:29 -0700)]
cros: Correct a printf() string and comment

Correct a warning that occurs on sandbox. Also fix the comment style in
cros_ec_set_lid_shutdown_mask().

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agotpm: Fix a logging warning in unpack_byte_string()
Simon Glass [Sat, 24 Nov 2018 04:29:35 +0000 (21:29 -0700)]
tpm: Fix a logging warning in unpack_byte_string()

Fix the printf() string to avoid a warning.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agotpm: Add non-volatile index attributes needed for v2
Simon Glass [Sat, 24 Nov 2018 04:29:34 +0000 (21:29 -0700)]
tpm: Add non-volatile index attributes needed for v2

Version-2 TPMs support attributes for nvdata. Add definitions to the
header file so that clients can use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agotpm: Export tpm_clear_and_reenable()
Simon Glass [Sat, 24 Nov 2018 04:29:33 +0000 (21:29 -0700)]
tpm: Export tpm_clear_and_reenable()

This function is intended to be exported but is not. Add it to the header
file.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agotpm: Remove use of build-time TPM versions
Simon Glass [Sat, 24 Nov 2018 04:29:32 +0000 (21:29 -0700)]
tpm: Remove use of build-time TPM versions

There is only one place in the code which assumes at build-time that we
are using either a v1 or a v2 TPM. Fix this up and add a new function to
return the version of a TPM.

Supported TPM versions (v1 and v2) can be enabled independently and it is
possible to use both versions at once. This is useful for sandbox when
running tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agosandbox: Use 'extras' to specify 'head' files
Simon Glass [Sat, 24 Nov 2018 04:29:30 +0000 (21:29 -0700)]
sandbox: Use 'extras' to specify 'head' files

At present sandbox has a start.o in the 'start' target but also includes
it in the normal target list. This is not how this is normally handled. It
is needed because sandbox does not include the u-boot-init variable in its
link rule.

Update the rule and move start.o from the normal target list to the
'extras' list.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agosandbox: Zero the ram buffer on startup
Simon Glass [Sat, 24 Nov 2018 04:29:29 +0000 (21:29 -0700)]
sandbox: Zero the ram buffer on startup

At present the RAM buffer is not inited unless it is read from a file,
likely produced by an earlier phase of U-Boot. This causes valgrind
warnings whenever the RAM buffer is used. Correct this by initing it if
needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agosandbox: sysreset: Update to support power-on reset
Simon Glass [Sat, 24 Nov 2018 04:29:28 +0000 (21:29 -0700)]
sandbox: sysreset: Update to support power-on reset

If U-Boot is started from SPL or TPL, then those earlier phases deal with
the reset cause. On real hardware this cause may be lost once it is read.
Emulate that behaviour in sandbox by reporting a warm reset when a
previous phase has run since start-up.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agosandbox: net: Correct name copy in eth_raw_bus_post_bind()
Simon Glass [Sat, 24 Nov 2018 04:29:27 +0000 (21:29 -0700)]
sandbox: net: Correct name copy in eth_raw_bus_post_bind()

We cannot be sure that the interface name takes up the full length of the
space available to it. Use strcpy() instead of memcpy() in this case. This
corrects a valgrind warning.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agosandbox: physmem: Use mapping to support sandbox
Simon Glass [Sat, 24 Nov 2018 04:29:26 +0000 (21:29 -0700)]
sandbox: physmem: Use mapping to support sandbox

Replace the raw cast with a map_sysmem() call so this code works with
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agosandbox: Check the filename in jump_to_image_no_args()
Simon Glass [Sat, 24 Nov 2018 04:29:25 +0000 (21:29 -0700)]
sandbox: Check the filename in jump_to_image_no_args()

If the filename is NULL this function currently crashes. Update it to fail
gracefully.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agosandbox: Fix up the debug message for the image filename
Simon Glass [Sat, 24 Nov 2018 04:29:24 +0000 (21:29 -0700)]
sandbox: Fix up the debug message for the image filename

This currently prints out the wrong filename. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agopinctrl: meson: Fix GPIO direction registers access
Carlo Caione [Mon, 3 Dec 2018 18:00:42 +0000 (18:00 +0000)]
pinctrl: meson: Fix GPIO direction registers access

The macros used to set the direction of the GPIO pins are misused,
resulting in a wrong behavior when trying to read the GPIO input level
from U-Boot.

A better macro is also used when setting the output direction.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
5 years agoriscv: ax25-ae350: Pass dtb address to u-boot with a1 register
Rick Chen [Mon, 3 Dec 2018 09:48:20 +0000 (17:48 +0800)]
riscv: ax25-ae350: Pass dtb address to u-boot with a1 register

ax25-ae350 use CONFIG_OF_BOARD via a2 and CONFIG_SYS_SDRAM_BASE
to boot from ram which allow the board to override the fdt
address originally.

But after this patch
riscv: save hart ID and device tree passed by prior boot stage
It provide prior_stage_fdt_address which offer a temporary
memory address to keep the dtb address passing from loader(gdb)
to u-boot with a1.

So passing via a2 and CONFIG_SYS_SDRAM_BASE is redundant and
can be removed. And it also somehow may corrupted BBL if it
was be arranged in CONFIG_SYS_SDRAM_BASE.

In board_fdt_blob_setup()
When boting from ram:
prior_stage_fdt_address will be use to reserved dtb temporarily.

When booting from ROM:
dtb will be pre-burned in CONFIG_SYS_FDT_BASE, if it is flash base.
Or CONFIG_SYS_FDT_BASE maybe a memory map space (NOT RAM or ROM)
which is provided by HW.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
5 years agoriscv: Add S-mode defconfigs for QEMU virt machine
Anup Patel [Mon, 3 Dec 2018 05:27:42 +0000 (10:57 +0530)]
riscv: Add S-mode defconfigs for QEMU virt machine

This patch adds S-mode defconfigs for QEMU virt machine so
that we can run u-boot in S-mode on QEMU using M-mode runtime
firmware (BBL or equivalent).

Signed-off-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
5 years agoriscv: qemu: Use different SYS_TEXT_BASE for S-mode
Anup Patel [Mon, 3 Dec 2018 05:27:41 +0000 (10:57 +0530)]
riscv: qemu: Use different SYS_TEXT_BASE for S-mode

When u-boot runs in S-mode, the M-mode runtime firmware
(BBL or equivalent) uses memory range in 0x80000000 to
0x80200000. Due to this, we cannot use 0x80000000 as
SYS_TEXT_BASE when running in S-mode. Instead for S-mode,
we use 0x80200000 as SYS_TEXT_BASE.

Even Linux RISC-V kernel ignores/reserves memory range
0x80000000 to 0x80200000 because it runs in S-mode.

Signed-off-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
5 years agoriscv: Add kconfig option to run U-Boot in S-mode
Anup Patel [Mon, 3 Dec 2018 05:27:40 +0000 (10:57 +0530)]
riscv: Add kconfig option to run U-Boot in S-mode

This patch adds kconfig option RISCV_SMODE to run U-Boot in
S-mode. When this opition is enabled we use s<xyz> CSRs instead
of m<xyz> CSRs.

It is important to note that there is no equivalent S-mode CSR
for misa and mhartid CSRs so we expect M-mode runtime firmware
(BBL or equivalent) to emulate misa and mhartid CSR read.

In-future, we will have more patches to avoid accessing misa and
mhartid CSRs from S-mode.

Signed-off-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
5 years agoMerge branch 'master' of git://git.denx.de/u-boot-sh
Tom Rini [Wed, 5 Dec 2018 00:22:31 +0000 (19:22 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-sh

- DT sync with Linux 4.19 and minor fixes.