Ilya Yanok [Mon, 10 Aug 2009 22:32:09 +0000 (02:32 +0400)]
imx27lite: add support for imx27lite board from LogicPD
This patch adds support for i.MX27-LITEKIT development board from
LogicPD. This board uses i.MX27 SoC and has 2MB NOR flash, 64MB NAND
flash, FEC ethernet controller integrated into i.MX27.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Acked-by: Wolfgang Denk <wd@denx.de>
Albin Tonnerre [Tue, 1 Sep 2009 09:26:20 +0000 (11:26 +0200)]
at91sam9260/
afeb9260: Fix SPI initialization
Commit
7ebafb7ec1a0285af8380623c009576f92583b98 introduced a mistake in the spi
init function call for those boards. This patch fixes this.
Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
Simon Kagstrom [Tue, 18 Aug 2009 09:13:44 +0000 (11:13 +0200)]
Remove duplicate set_cr
Remove duplicate set_cr
set_cr is defined in both asm-arm/proc-armv/system.h and
include/asm-arm/system.h. This patch removes it (and some duplicate
defines) from the former.
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Wolfgang Denk [Mon, 31 Aug 2009 20:21:47 +0000 (22:21 +0200)]
Merge branch 'next' of ../next
Wolfgang Denk [Mon, 31 Aug 2009 17:57:42 +0000 (19:57 +0200)]
Prepare 2009.08
Update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
Andre Schwarz [Mon, 31 Aug 2009 14:18:24 +0000 (16:18 +0200)]
Add common code dir for Matrix Vision boards.
This fixes current build failure.
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
mvblm7.c: fix warning: implicit declaration of function
'mv_reset_environment'
Signed-off-by: Wolfgang Denk <wd@denx.de>
David Brownell [Sun, 30 Aug 2009 18:05:29 +0000 (11:05 -0700)]
bugfix CONFIG_SYS_CONSOLE_INFO_QUIET
The "console: unify printing current devices" patch goofed:
CONFIG_SYS_CONSOLE_INFO_QUIET is supposed to *REMOVE* boot
time noise, not add it. Said patch changed the #ifndefs
to #ifdef; this one restores them to the proper sense.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Timur Tabi [Fri, 28 Aug 2009 21:56:45 +0000 (16:56 -0500)]
fsl: simplify the "mac id" command, improve boot-time informational message
The "mac id" command took a 4-character parameter as the identifier string.
However, for any given board, only one kind of identifier is acceptable, so it
makes no sense to ask the user to type it in. Instead, if the user enters
"mac id", the identifier (and also the version, if it's NXID) will
automatically be set to the correct value.
Improve the message that is displayed when EEPROM is read during boot. It now
displays "EEPROM:" and then either an error message or the EEPROM identifier
if successful.
If the identifier in EEPROM is valid, then always reject a bad CRC, even if the
CRC field has not been initialized.
Don't force the MAC address count to MAX_NUM_PORTS or less. Forcing the value
to be changed resulting in an in-memory copy that does not match what's in
hardware, even though the user did not request that change.
Finally, always update the CRC value in the in-memory copy after any field
is changed, so that the CRC is always correct.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Poonam Aggrwal [Fri, 21 Aug 2009 01:59:58 +0000 (07:29 +0530)]
85xx: Added PCIe support for P1 P2 RDB
Call fsl_pci_init_port() to initialize all the PCIe ports on the board.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Poonam Aggrwal [Fri, 21 Aug 2009 01:59:42 +0000 (07:29 +0530)]
driver/fsl_pci: Add fsl_pci_init_port function to initialize a PCI controller
fsl_pci_init_port can be called from board specific PCI initialization
routines to setup the PCI (or PCIe) controller. This will reduce code
redundancy in most of the 85xx/86xx FSL board ports that setup PCI.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Timur Tabi [Thu, 20 Aug 2009 22:41:11 +0000 (17:41 -0500)]
85xx: Improve MPIC initialization
The MPIC initialization code for Freescale e500 CPUs was not using I/O
accessors, and it was not issuing a read-back to the MPIC after setting
mixed mode. This may be the cause of a spurious interrupt on some systems.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Poonam Aggrwal [Thu, 20 Aug 2009 13:29:18 +0000 (18:59 +0530)]
85xx: Added support for P1011RDB and P2010RDB
P1011 and P2010 are single core variants of P1010 and P2020 respectively.
The board(RDB) will be same.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Poonam Aggrwal [Thu, 20 Aug 2009 13:27:45 +0000 (18:57 +0530)]
85xx: Added single core members of FSL P1xx/P2xx processors series
P1011 - Single core variant of P1020
P2010 - Single core variant of P2020
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Poonam Aggrwal [Thu, 20 Aug 2009 13:27:02 +0000 (18:57 +0530)]
85xx: P1020RDB Support Added
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Poonam Aggrwal [Thu, 20 Aug 2009 13:25:35 +0000 (18:55 +0530)]
85xx: Added CONFIG_MAX_CPUS for P1020
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Mingkai Hu [Tue, 18 Aug 2009 07:37:15 +0000 (15:37 +0800)]
85xx: Add L2SRAM Register's macro definition
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Felix Radensky [Sat, 15 Aug 2009 12:08:37 +0000 (15:08 +0300)]
85xx: Fix memory test range on MPC8536DS
With current values of CONFIG_SYS_MEMTEST_START and CONFIG_SYS_MEMTEST_END
memory test hangs if run without arguments. Set them to sane values, so
that all available 512MB of RAM excluding exception vectors at the bottom
and u-boot code and stack at the top can be tested.
Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Wed, 12 Aug 2009 05:10:44 +0000 (00:10 -0500)]
85xx: Removed BEDBUG support on P1_P2_RDB
To match all other 85xx platforms we are removing BEDBUG support.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Sat, 8 Aug 2009 15:42:30 +0000 (10:42 -0500)]
85xx: Init pci ethernet cards if we enable any on MPC8572DS
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Peter Tyser [Fri, 7 Aug 2009 18:16:34 +0000 (13:16 -0500)]
xes: Use proper IO access functions
Also fix some minor whitespace oddities while we're cleaning up
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Fri, 7 Aug 2009 18:00:55 +0000 (13:00 -0500)]
85xx: Move to a common linker script
There are really no differences between all the 85xx linker scripts so
we can just move to a single common one. Board code is still able to
override the common one if need be.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Poonam Aggrwal [Fri, 31 Jul 2009 06:38:27 +0000 (12:08 +0530)]
85xx: Added P1020 Processor Support.
P1020 is another member of QorIQ series of processors which falls in ULE
category. It is an e500 based dual core SOC.
Being a scaled down version of P2020 it has following differences:
- 533MHz - 800MHz core frequency.
- 256Kbyte L2 cache
- Ethernet controllers with classification capabilities.
Also the SOC is pin compatible with P2020
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Poonam Aggrwal [Wed, 5 Aug 2009 07:59:24 +0000 (13:29 +0530)]
85xx: Add support for P2020RDB board
The code base adds P1 & P2 RDB platforms support.
The folder and file names can cater to future SOCs of P1/P2 family.
P1 & P2 processors are 85xx platforms, part of Freescale QorIQ series.
Tested following on P2020RDB:
1. eTSECs
2. DDR, NAND, NOR, I2C.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Poonam Aggrwal [Fri, 31 Jul 2009 06:38:14 +0000 (12:08 +0530)]
8xxx: Removed CONFIG_NUM_CPUS from 85xx/86xx
The number of CPUs are getting detected dynamically by checking the
processor SVR value. Also removed CONFIG_NUM_CPUS references from all
the platforms with 85xx/86xx processors.
This can help to use the same u-boot image across the platforms.
Also revamped and corrected few Freescale Copyright messages.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Poonam Aggrwal [Fri, 31 Jul 2009 06:37:45 +0000 (12:07 +0530)]
8xxx: Refactored common cpu specific code for 85xx/86xx into one file.
Removed same code pieces from cpu/mpc85xx/cpu.c and cpu/mpc86xx/cpu.c
and moved to cpu/mpc8xxx/cpu.c(new file)
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Alex Dubov [Fri, 7 Aug 2009 05:28:32 +0000 (15:28 +1000)]
stx: create common vendor/board hierarchy for STx boards
Move files belonging to the STx boards into common vendor directory and
update the Makefile to reflect this.
Signed-off-by: Alex Dubov <oakad@yahoo.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Peter Tyser [Tue, 4 Aug 2009 22:38:00 +0000 (17:38 -0500)]
85xx: Remove unused CONFIG_CLEAR_LAW0 defines
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Thu, 6 Aug 2009 23:38:43 +0000 (18:38 -0500)]
86xx: Remove redudant PLATFORM_CPPFLAGS
For historic reasons we had defined some additional PLATFORM_CPPFLAGS like:
PLATFORM_CPPFLAGS += -DCONFIG_MPC86xx=1
PLATFORM_CPPFLAGS += -DCONFIG_MPC8641=1
However these are all captured in the config.h and thus redudant. Also
moved common 86xx flags into cpu/mpc86xx/config.mk.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Thu, 6 Aug 2009 23:28:34 +0000 (18:28 -0500)]
85xx: Remove redudant PLATFORM_CPPFLAGS
For historic reasons we had defined some additional PLATFORM_CPPFLAGS
like:
PLATFORM_CPPFLAGS += -DCONFIG_E500=1
PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx=1
PLATFORM_CPPFLAGS += -DCONFIG_MPC8548=1
However these are all captured in the config.h and thus redudant.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Thu, 30 Jul 2009 20:54:07 +0000 (15:54 -0500)]
85xx: Add a 36-bit physical configuration for MPC8536DS
We move all IO addressed (CCSR, localbus, PCI) above the 4G boundary
to allow for larger memory sizes.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Tue, 4 Aug 2009 14:10:03 +0000 (09:10 -0500)]
85xx: Cleanup whitespace in mpc8536ds.c
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Wed, 5 Aug 2009 12:59:35 +0000 (07:59 -0500)]
pci/fsl_pci_init: Rework PCI ATMU setup to handle >4G of memory
The old PCI ATMU setup code would just mimic the PCI regions into the
ATMU registers. For simple memory maps in which all memory, MMIO, etc
space fit into 4G this works ok. However there are issues with we have
>4G of memory as we know can't access all of memory and we need to
ensure that PCICSRBAR (PEXCSRBAR on PCIe) isn't overlapping with
anything since we can't turn it off.
We first setup outbound windows based on what the board code setup
in the pci regions for MMIO and IO access. Next we place PCICSRBAR
below the MMIO window. After which we try to setup the inbound windows
to map as much of memory as possible.
On PCIe based controllers we are able to overmap the ATMU setup since
RX & TX links are separate but report the proper amount of inbound
address space to the region tracking to ensure there is no overlap.
On PCI based controllers we use as many inbound windows as available to
map as much of the memory as possible.
Additionally we changed all the CCSR register access to use proper IO
accessor functions. Also had to add CONFIG_SYS_CCSRBAR_PHYS to some
86xx platforms that didn't have it defined.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Wed, 5 Aug 2009 12:49:27 +0000 (07:49 -0500)]
pci/fsl_pci_init: Use PCIe capability to determine if controller is PCIe
Change the code to use the PCIe capabilities register to determine if we
are a PCIe controller or not. Additionally cleaned up some white space
and formatting in the file.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Tue, 4 Aug 2009 02:02:02 +0000 (21:02 -0500)]
pci/fsl_pci_init: Fold fsl_pci_setup_inbound_windows into fsl_pci_init
Every platform that calls fsl_pci_init calls fsl_pci_setup_inbound_windows
before it calls fsl_pci_init. There isn't any reason to just call it
from fsl_pci_init and simplify things a bit.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Tue, 4 Aug 2009 01:44:55 +0000 (20:44 -0500)]
pci/fsl_pci_init: Fold pci_setup_indirect into fsl_pci_init
Every platform that calls fsl_pci_init calls pci_setup_indirect before
it calls fsl_pci_init. There isn't any reason to just call it from
fsl_pci_init and simplify things a bit.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
André Schwarz [Thu, 27 Aug 2009 12:48:35 +0000 (14:48 +0200)]
Use common code for Matrix Vision boards
Clean up existing boards (mvBC-P/MPC5200 and mvBL-M7/MPC8343) by
using common code.
Signed-off-by: André Schwarz <andre.schwarz@matrix-vision.de>
Wolfgang Denk [Thu, 27 Aug 2009 22:17:41 +0000 (00:17 +0200)]
Merge branch 'next' of git://git.denx.de/u-boot-nand-flash into next
Kim Phillips [Thu, 27 Aug 2009 02:27:37 +0000 (21:27 -0500)]
mpc83xx: mpc8349itx - accommodate larger kernel sizes & unzero the bootdelay
apparently the ITX was missed last round.
Also make bootdelay consistent with other boards, so as to give on the
opportunity to fix mistakenly set bootcmd without having checked for an
bootdelay zero setting first.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Kim Phillips [Thu, 27 Aug 2009 02:25:46 +0000 (21:25 -0500)]
mpc83xx: match dtb filename references to their dts equivalents in the linux kernel
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Sandeep Paulraj [Tue, 18 Aug 2009 14:10:42 +0000 (10:10 -0400)]
NAND: DaVinci: V2 Adding 4 BIT ECC support
This patch adds 4 BIT ECC support in the DaVinci NAND
driver. Tested on both the DM355 and DM365.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Sandeep Paulraj [Mon, 10 Aug 2009 17:27:56 +0000 (13:27 -0400)]
MTD:NAND: ADD new ECC mode NAND_ECC_HW_OOB_FIRST
This patch adds the new mode NAND_ECC_HW_OOB_FIRST in the nand code to
support 4-bit ECC on TI DaVinci devices with large page (up to 2K) NAND
chips. This ECC mode is similar to NAND_ECC_HW, with the exception of
read_page API that first reads the OOB area, reads the data in chunks,
feeds the ECC from OOB area to the ECC hw engine and perform any
correction on the data as per the ECC status reported by the engine.
This patch has been accepted by Andrew Morton and can be found at
http://userweb.kernel.org/~akpm/mmotm/broken-out/mtd-nand-add-new-ecc-mode-ecc_hw_oob_first.patch
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sneha Narnakaje <nsnehaprabha@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Ilya Yanok [Mon, 10 Aug 2009 22:32:54 +0000 (02:32 +0400)]
mxc_nand: add nand driver for MX2/MX3
Driver for NFC NAND controller found on Freescale's MX2 and MX3
processors. Ported from Linux. Tested only with i.MX27 but should
works with other MX2 and MX3 processors too.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Sandeep Paulraj [Mon, 10 Aug 2009 17:27:46 +0000 (13:27 -0400)]
NAND: ADD page Parameter to all read_page/read_page_raw API's
This patch adds a new "page" parameter to all NAND read_page/read_page_raw
APIs. The read_page API for the new mode ECC_HW_OOB_FIRST requires the
page information to send the READOOB command and read the OOB area before
the data area.
This patch has been accepted by Andrew Morton and can be found at
http://userweb.kernel.org/~akpm/mmotm/broken-out/mtd-nand-add-page-parameter-to-all-read_page-read_page_raw-apis.patch
WE would like this to become part of the u-boot GIT as well
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sneha Narnakaje <nsnehaprabha@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Heiko Schocher [Tue, 21 Jul 2009 15:13:40 +0000 (17:13 +0200)]
83xx, kmeter1: added NAND support
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Kyungmin Park [Tue, 21 Jul 2009 02:58:04 +0000 (11:58 +0900)]
OneNAND: Remove unused read_spareram
Remove unused read_spareram and add unlock_all as kernel does
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Matthias Kaehlcke [Thu, 16 Jul 2009 19:19:29 +0000 (21:19 +0200)]
KB9202: Add NAND support
Add KB9202 NAND driver
Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Kyungmin Park [Tue, 21 Jul 2009 02:58:04 +0000 (11:58 +0900)]
OneNAND: Remove unused read_spareram
Remove unused read_spareram and add unlock_all as kernel does
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Eric Millbrandt [Tue, 25 Aug 2009 15:30:26 +0000 (10:30 -0500)]
galaxy5200: Cleanup typo and trailing whitespace
Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>
Wolfgang Denk [Wed, 26 Aug 2009 19:29:32 +0000 (21:29 +0200)]
Merge branch 'next' of git://denx.de/git/u-boot-coldfire into next
TsiChung Liew [Wed, 22 Jul 2009 18:42:45 +0000 (18:42 +0000)]
ColdFire: Fix compile warning messages
Change %08lX to %08X in board.c. Remove unused variable
'oscillator' in mcf5227x/cpu_init.c and 'scm2' in
mcf532x/cpu_init.c. Provide argument type cast in
drivers/dma/MCD_dmaApi.c.
Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
TsiChung Liew [Wed, 22 Jul 2009 16:32:39 +0000 (16:32 +0000)]
ColdFire: Fix missing _IO_BASE which caused compile error
The compile error was caused by a recent patch. Affected platforms -
M5253DEMO.h, M5253EVBE.h, and M54455EVB.h. Adding the _IO_BASE
automatically defined to 0 in asm-m68k/io.h if it isn't set in
platform configuration file.
Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
Niklaus Giger [Wed, 22 Jul 2009 15:13:24 +0000 (17:13 +0200)]
Support up to 7 banks for ids as specified in JEDEC JEP106Z
see http://www.jedec.org/download/search/jep106Z.pdf
Add some second source legacy flash chips 256x8.
Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org>
Signed-off-by: Stefan Roese <sr@denx.de>
Wolfgang Denk [Tue, 25 Aug 2009 21:03:22 +0000 (23:03 +0200)]
Merge branch 'next' of git://git.denx.de/u-boot-net into next
Wolfgang Denk [Tue, 25 Aug 2009 20:57:10 +0000 (22:57 +0200)]
Merge branch 'master' into next
Wolfgang Denk [Tue, 25 Aug 2009 20:54:01 +0000 (22:54 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx
Wolfgang Denk [Tue, 25 Aug 2009 20:51:40 +0000 (22:51 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-blackfin
Kim Phillips [Mon, 24 Aug 2009 19:32:26 +0000 (14:32 -0500)]
net: tsec - handle user interrupt while waiting for PHY auto negotiation to complete
if you don't have firmware installed for the PHY to come to life, this
wait can be painful - let's give the option to avoid it if we want.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Robin Getz [Thu, 20 Aug 2009 14:50:20 +0000 (10:50 -0400)]
Add Transfer Size Option to tftp
Optionally add RFC 2349 "Transfer Size Option", so we can minimize the
time spent sending data over the UART (now print a single line during a
tftp transfer).
- If turned on (CONFIG_TFTP_TSIZE), U-Boot asks for the size of the file.
- if receives the file size, a single line (50 chars) are printed.
one hash mark == 2% of the file downloaded.
- if it doesn't receive the file size (the server doesn't support RFC
2349, prints standard hash marks (one mark for each UDP frame).
Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Robin Getz [Mon, 24 Aug 2009 14:33:39 +0000 (10:33 -0400)]
Add debug message for Blackfin Ethernet Rx function.
Add a simple print for the Blackfin's Ethernet Rx function,
so we can debug incomming Ethernet functions easier.
Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Ben Warren [Tue, 25 Aug 2009 20:09:37 +0000 (13:09 -0700)]
Convert CS8900 Ethernet driver to CONFIG_NET_MULTI API
All in-tree boards that use this controller have CONFIG_NET_MULTI added
Also:
- changed CONFIG_DRIVER_CS8900 to CONFIG_CS8900
- changed CS8900_BASE to CONFIG_CS8900_BASE
- changed CS8900_BUS?? to CONFIG_CS8900_BUS??
- cleaned up line lengths
- modified VCMA9 command function that accesses the device
- removed MAC address initialization from lib_arm/board.c
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Tested-by: Wolfgang Denk <wd@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
Alessandro Rubini [Fri, 7 Aug 2009 11:59:26 +0000 (13:59 +0200)]
arm nomadik: activate defrag choose 4k transfer block size
This chooses 4kB data size for both TFTP and NFS, as an example
about how to use support for IP fragments.
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Alessandro Rubini [Fri, 7 Aug 2009 11:59:16 +0000 (13:59 +0200)]
nfs: accept CONFIG_NFS_READ_SIZE from config file
To take advantage of defragmented packets, the config file
can define CONFIG_NFS_READ_SIZE to override the 1kB default.
No support is there for an environment variable by now.
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Alessandro Rubini [Fri, 7 Aug 2009 11:59:06 +0000 (13:59 +0200)]
tftp: get the tftp block size from config file and from the environment
Increasing the block size is useful if CONFIG_IP_DEFRAG is
used. Howerver, the last fragments in a burst may overflow the
receiving ethernet, so the default is left at 1468, with thre new
CONFIG_TFTP_BLOCKSIZE for config files. Further, "tftpblocksize"
can be set in the environment.
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Alessandro Rubini [Fri, 7 Aug 2009 11:58:56 +0000 (13:58 +0200)]
net: defragment IP packets
The defragmenting code is enabled by CONFIG_IP_DEFRAG; the code is
useful for TFTP and NFS transfers. The user can specify the maximum
defragmented payload as CONFIG_NET_MAXDEFRAG (default 16k).
Since NFS has a bigger per-packet overhead than TFTP, the static
reassembly buffer can hold CONFIG_NET_MAXDEFRAG + the NFS overhead.
The packet buffer is used as an array of "hole" structures, acting as
a double-linked list. Each new fragment can split a hole in two,
reduce a hole or fill a hole. No support is there for a fragment
overlapping two diffrent holes (i.e., thre new fragment is across an
already-received fragment).
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Feng Kan [Fri, 21 Aug 2009 17:59:42 +0000 (10:59 -0700)]
ppc4xx: Fix ECC Correction bug with SMC ordering for NDFC driver
Fix ECC Correction bug where the byte offset location were double
flipped causing correction routine to toggle the wrong byte location
in the ECC segment. The ndfc_calculate_ecc routine change the order
of getting the ECC code.
/* The NDFC uses Smart Media (SMC) bytes order */
ecc_code[0] = p[2];
ecc_code[1] = p[1];
ecc_code[2] = p[3];
But in the Correction algorithm when calculating the byte offset
location, the s1 is used as the upper part of the address. Which
again reverse the order making the final byte offset address
location incorrect.
byteoffs = (s1 << 0) & 0x80;
.
.
byteoffs |= (s0 >> 4) & 0x08;
The order is change to read it in straight and let the correction
function to revert it to SMC order.
Signed-off-by: Feng Kan <fkan@amcc.com>
Acked-by: Victor Gallardo <vgallardo@amcc.com>
Acked-by: Prodyut Hazarika <phazarika@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Eric Millbrandt [Thu, 13 Aug 2009 13:32:37 +0000 (08:32 -0500)]
Add support for USB on PSC3 for the mpc5200
Support USB on PSC3 on the mpc5200. Before this patch, enabling USB support
would reconfigure PSC4 and PSC5 to USB. The mpc5200 does not support USB
enabled on both the standard USB port and PSC3. This patch masks the
appropriate bits when enabling USB.
Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Remy Bohmer <linux@bohmer.net>
Albin Tonnerre [Thu, 13 Aug 2009 17:12:44 +0000 (19:12 +0200)]
Add driver for the ST M41T94 SPI RTC
This RTC is used in some Calao boards. The driver code is taken from
the linux rtc-m41t94 driver
Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
Albin Tonnerre [Thu, 13 Aug 2009 13:31:12 +0000 (15:31 +0200)]
Switch from per-driver to common definition of bin2bcd and bcd2bin
Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
Acked-by: Stefan Roese <sr@denx.de>
Albin Tonnerre [Thu, 13 Aug 2009 13:31:11 +0000 (15:31 +0200)]
Replace BCD2BIN and BIN2BCD macros with inline functions
In the process, also remove backward-compatiblity macros BIN_TO_BCD and
BCD_TO_BIN and update the sole board using them to use the new bin2bcd
and bcd2bin instead
Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
Eric Millbrandt [Thu, 13 Aug 2009 15:14:21 +0000 (10:14 -0500)]
Add support for the galaxy5200
Add support for the DEKA Research and Development galaxy5200 board
The galaxy5200 is an Freescale mpc5200 based embedded industrial
control board.
Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>
Mike Frysinger [Fri, 24 Jul 2009 20:34:32 +0000 (16:34 -0400)]
unify {CONFIG_,}ENV_IS_EMBEDDED
Some boards have fallen out of sync by defining CONFIG_ENV_IS_EMBEDDED
manually. While it is useful to have this available to the build system,
let's do it automatically rather than forcing people to opt into it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Robin Getz [Mon, 27 Jul 2009 04:07:59 +0000 (00:07 -0400)]
Add md5sum and sha1 commands...
Now that we have sha1 and md5 in lib_generic, allow people to use
them on the command line, for checking downloaded files.
Signed-off-by: Robin Getz <rgetz@analog.com>
Wolfgang Denk [Tue, 25 Aug 2009 10:22:38 +0000 (12:22 +0200)]
include/s3c24x0.h: fix S3C24X0_SPI_CHANNEL declaration
The SPI controller on the S3C24X0 has 8 bit registers, not 32 bit.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Mike Frysinger [Thu, 20 Aug 2009 23:17:59 +0000 (19:17 -0400)]
Blackfin: fix typos in gpio comments
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Harald Krapfenbauer [Tue, 18 Aug 2009 08:49:57 +0000 (04:49 -0400)]
Blackfin: cm-bf527/cm-bf537: increase flash sectors
Newer revisions of these boards have slightly larger flashes, so increase
the configured number of sectors so that U-Boot works on all revisions.
Signed-off-by: Harald Krapfenbauer <Harald.Krapfenbauer@bluetechnix.at>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Jean-Christophe PLAGNIOL-VILLARD [Sun, 23 Aug 2009 12:14:52 +0000 (14:14 +0200)]
sh/rsk7203: add missing include net.h
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Mike Frysinger [Sun, 23 Aug 2009 06:47:59 +0000 (02:47 -0400)]
start a linker script helper file
Start a common header file for common linker script code (such as
workarounds for older linkers) rather than doing this in the build system.
As fallout, we no longer execute the linker every time config.mk is
included by a build file (which can easily be 70+ times), but rather only
execute it once.
This also fixes a bug in the major version checking by creating a macro to
easily compare versions and keep people from making the same common
mistake (forgetting to check major and minor together).
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Sat, 22 Aug 2009 23:50:22 +0000 (19:50 -0400)]
Blackfin: use common code to preprocess linker script
Now that the common code preprocesses the linker script, the Blackfin code
no longer needs to do it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Sat, 22 Aug 2009 23:48:56 +0000 (19:48 -0400)]
.gitignore: ignore generated u-boot.lds
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Albin Tonnerre [Sat, 22 Aug 2009 12:21:53 +0000 (14:21 +0200)]
include/mmc.h: Fix typo in IS_SD() macro
Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
Wolfgang Denk [Sat, 22 Aug 2009 21:27:26 +0000 (23:27 +0200)]
Prepare 2009.08-rc3
Update CHANGELOG, minor Coding Style cleanup.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Wolfgang Denk [Fri, 21 Aug 2009 22:24:54 +0000 (00:24 +0200)]
Merge branch 'master' of /home/wd/git/u-boot/custodians
Michal Simek [Thu, 20 Aug 2009 20:52:25 +0000 (06:52 +1000)]
qemu-mips: Fix Qemu website
Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@petalogix.com>
Acked-by: Shinya Kuribayashi <skuribay@pobox.com>
Kim Phillips [Fri, 21 Aug 2009 21:34:38 +0000 (16:34 -0500)]
mpc83xx: accommodate larger kernel sizes by default
linux mpc83xx_defconfig kernels are getting bigger, accommodate for
their growth by adjusting default load and fdt addresses.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Kim Phillips [Fri, 21 Aug 2009 21:33:15 +0000 (16:33 -0500)]
mpc83xx: mpc8377erdb - change DDR settings to those from latest bsp
when using Linus' 83xx_defconfig, the mpc8377rdb would hang at boot
at either:
NET: Registered protocol family 16
or the
io scheduler cfq registered
message. Fixing up these DDR settings appears to fix the problem.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Kim Phillips [Fri, 21 Aug 2009 21:31:20 +0000 (16:31 -0500)]
mpc83xx: tqm8349 - remove pci & flash window conflict
commit
9993e196da707a0a1cd4584f1fcef12382c1c144 "mpc83xx: convert all
remaining boards over to 83XX_GENERIC_PCI" remapped pci windows on
tqm834x to make it more consistent with the other 83xx boards. During
that time however, the author failed to realize that FLASH_BASE was
occupying the same range as what PCI1_MEM_BASE was being assigned.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Tested-by: Wolfgang Denk <wd@denx.de>
Heiko Schocher [Fri, 21 Aug 2009 21:30:30 +0000 (16:30 -0500)]
mpc83xx: add missing CSCONFIG_ODT_WR_CFG for 832x CPUs
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Paul Gortmaker [Fri, 21 Aug 2009 21:27:05 +0000 (16:27 -0500)]
mpc83xx: mpc8349 - delete unused SYS_MID_FLASH_JUMP
This was introduced with the MPC8349EMDS board, and then copied to
a couple other boards by nature of being the reference implementation.
u-boot$git grep CONFIG_SYS_MID_FLASH_JUMP
include/configs/MPC8349EMDS.h:#define CONFIG_SYS_MID_FLASH_JUMP 0x7F000000
include/configs/sbc8349.h:#define CONFIG_SYS_MID_FLASH_JUMP 0x7F000000
include/configs/vme8349.h:#define CONFIG_SYS_MID_FLASH_JUMP 0x7F000000
u-boot$
It currently isn't used, so delete it before it spreads further.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Paul Gortmaker [Fri, 21 Aug 2009 21:21:58 +0000 (16:21 -0500)]
mpc83xx: sbc8349 - make enabling PCI more user friendly
Prior to this commit, to enable PCI, you had to go manually
edit the board config header, which isn't really user friendly.
This adds the typical PCI make targets to the toplevel Makefile
in accordance with what is being done with other boards.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Jean-Christophe PLAGNIOL-VILLARD [Fri, 7 Aug 2009 21:37:54 +0000 (23:37 +0200)]
eeprom_m95xxx: remove unused variable i
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Ilya Yanok [Fri, 17 Jul 2009 11:02:42 +0000 (15:02 +0400)]
jffs2: some fixes to summary support
This patch fixes some issues with JFFS2 summary support in U-Boot.
1/ Summary support made compilation configurable (as summary support
considered expiremental even in Linux).
2/ Summary code can do unaligned 16-bit and 32-bit memory accesses.
We need to get data byte by byte to exclude data aborts.
3/ Make summary scan in two passes so we can safely fall back to full
scan if we found unsupported entry in the summary.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Prafulla Wadaskar [Mon, 10 Aug 2009 13:25:54 +0000 (18:55 +0530)]
arm: rd6281a: Fixed NAND specific warning
It is recommended to define the macro CONFIG_SYS_64BIT_VSPRINTF
for NAND specific warning removal, same is done in this patch
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Wolfgang Denk [Wed, 12 Aug 2009 22:37:16 +0000 (00:37 +0200)]
TRAB: make independent of specific libgcc helper routines
The TRAB board references local libgcc helper routines
(lib_arm/div0.o and lib_arm/_umodsi3.o) which cause build problems
when we try to use the normal, compiler provided libgcc instead.
Removing these references allows to build both with and without the
local libgcc helper routines.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Wolfgang Denk [Mon, 17 Aug 2009 12:00:53 +0000 (14:00 +0200)]
Fix all linker scripts for older binutils versions (pre-2.16)
Commit
f62fb99941c6 fixed handling of all rodata sections by using a
wildcard combined with calls to ld's builtin functions SORT_BY_ALIGNMENT()
and SORT_BY_NAME(). Unfortunately these functions were only
introduced with biunutils version 2.16, so the modification broke
building with all tool chains using older binutils.
This patch makes it work again. This is done by omitting the use of
these functions for such old tool chains. This will result in
slightly larger target binaries, as the rodata sections are no longer
in optimal order alignment-wise which reauls in unused gaps, but the
effect was found to be insignificant - especially compared to the fact
that you cannot build U-Boot at all in the current state.
As ld seems to have no support for conditionals we run the linker
script through the C preprocessor which can be easily used to remove
the unwanted function calls.
Note that the C preprocessor must be run with the "-ansi" (or a
"-std=") option to make sure all the system-specific predefined
macros outside the reserved namespace are suppressed. Otherise, cpp
might for example substitute "powerpc" to "1", thus corrupting for
example "OUTPUT_ARCH(powerpc)" etc.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
Wolfgang Denk [Mon, 17 Aug 2009 11:17:29 +0000 (13:17 +0200)]
ARM: compiler options cleanup - improve tool chain support
For some time there have been repeated reports about build problems
with some ARM (cross) tool chains. Especially issues about
(in)compatibility with the tool chain provided runtime support
library libgcc.a caused to add and support a private implementation
of such runtime support code in U-Boot. A closer look at the code
indicated that some of these issues are actually home-made. This
patch attempts to clean up some of the most obvious problems and make
building of U-Boot with different tool chains easier:
- Even though all ARM systems basicy used the same compiler options
to select a specific ABI from the tool chain, the code for this was
distributed over all cpu/*/config.mk files. We move this one level
up into lib_arm/config.mk instead.
- So far, we only checked if "-mapcs-32" was supported by the tool
chain; if yes, this was used, if not, "-mabi=apcs-gnu" was
selected, no matter if the tool chain actually understood this
option. There was no support for EABI conformant tool chains.
This patch implements the following logic:
1) If the tool chain supports
"-mabi=aapcs-linux -mno-thumb-interwork"
we use these options (EABI conformant tool chain).
2) Otherwise, we check first if
"-mapcs-32"
is supported, and then check for
"-mabi=apcs-gnu"
If one test succeeds, we use the first found option.
3) In case 2), we also test if "-mno-thumb-interwork", and use
this if the test succeeds. [For "-mabi=aapcs-linux" we set
"-mno-thumb-interwork" mandatorily.]
This way we use a similar logic for the compile options as the
Linux kernel does.
- Some EABI conformant tool chains cause external references to
utility functions like raise(); such functions are provided in the
new file lib_arm/eabi_compat.c
Note that lib_arm/config.mk gets parsed several times, so we must
make sure to add eabi_compat.o only once to the linker list.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Dirk Behme <dirk.behme@googlemail.com>
Cc: Magnus Lilja <lilja.magnus@gmail.com>
Cc: Tom Rix <Tom.Rix@windriver.com>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Sergey Kubushyn <ksi@koi8.net>
Tested-by: Magnus Lilja <lilja.magnus@gmail.com>
Tested-by: Andrzej Wolski <awolski@poczta.fm>
Tested-by: Gaye Abdoulaye Walsimou <walsimou@walsimou.com>
Tested-by: Tom Rix <Tom.Rix@windriver.com>
Tested-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Wolfgang Denk [Fri, 21 Aug 2009 21:04:03 +0000 (23:04 +0200)]
Merge branch 'master' of /home/wd/git/u-boot/custodians
Wolfgang Denk [Fri, 21 Aug 2009 21:03:58 +0000 (23:03 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-net
Wolfgang Denk [Fri, 21 Aug 2009 20:56:01 +0000 (22:56 +0200)]
Merge branch 'master' of /home/wd/git/u-boot/custodians
Mingkai Hu [Thu, 30 Jul 2009 09:56:51 +0000 (17:56 +0800)]
NAND boot: fix nand_load overlap issue
The code copy data from NAND flash block by block, so when
the data length isn't a whole-number multiple of the block
size, it will overlap the rest space.
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Giulio Benetti [Fri, 31 Jul 2009 22:30:34 +0000 (17:30 -0500)]
add WATCHDOG_RESET() on nand write and read
Signed-off-by: giulio.benetti@micronovasrl.com
Acked-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>