Tom Rini [Fri, 26 Apr 2019 17:50:00 +0000 (13:50 -0400)]
Merge git://git.denx.de/u-boot-marvell
- Add DM based generic watchdog start and reset implementation
and remove all ad-hoc implementations (Stefan)
- Move mv_sdhci to DM (Pierre)
- Misc turris_omnia updates (Pierre)
- Change openrd targets to correctly build again (size changes
and fixes to the dts targets) and bring it back into Travis
builds (Stefan)
- Add Kirkwood db-
88f6281-bp board (Chris)
Tom Rini [Fri, 26 Apr 2019 17:49:58 +0000 (13:49 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
Stefan Roese [Thu, 25 Apr 2019 09:53:18 +0000 (11:53 +0200)]
arm: kirkwood: openrd: Mark openrd boards as maintained again
With the latest size increase of the openrd boards, they all compile
clean again. Let's mark them as maintained again and add the Travis
job.
Please note that I can only compile-test these targets as I don't
have access to one of those boards.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Albert ARIBAUD <albert-u-boot@aribaud.net>
Cc: Vagrant Cascadian <vagrant@debian.org>
Cc: Chris Packham <judge.packham@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Stefan Roese [Thu, 11 Apr 2019 13:58:47 +0000 (15:58 +0200)]
watchdog: at91sam9_wdt: Remove now superfluous wdt start and reset
With the new generic function, the scattered other functions are now
removed to be replaced by the generic one. The new version also enables
the configuration of the watchdog timeout via the DT "timeout-sec"
property (if enabled via CONFIG_OF_CONTROL).
The watchdog servicing is enabled via CONFIG_WATCHDOG.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Stefan Roese [Thu, 11 Apr 2019 13:58:46 +0000 (15:58 +0200)]
watchdog: mpc8xx_wdt: Watchdog driver and macros cleanup
With the generic watchdog driver now implemented, this patch removes
some legacy stuff from the MPC8xx watchdog driver and its Kconfig
integration. CONFIG_MPC8xx_WATCHDOG is completely removed and
hw_watchdog_reset() is made static, as the watchdog will now get
serviced via the DM infrastructure if enabled via CONFIG_WATCHDOG.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Christophe Leroy <christophe.leroy@c-s.fr>
Stefan Roese [Thu, 11 Apr 2019 13:58:45 +0000 (15:58 +0200)]
watchdog: cadence: Remove driver specific "timeout-sec" handling
Now that we have a generic DT property "timeout-sec" handling, the
driver specific implementation can be dropped.
This patch also changes the timeout restriction to the min and max
values (clipping). Before this patch, the value provided via
"timeout-sec" was used if the parameter was too high or low. Now
the driver specific min and max values are used instead.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Michal Simek <michal.simek@xilinx.com> (on zcu100)
Stefan Roese [Thu, 11 Apr 2019 13:58:44 +0000 (15:58 +0200)]
watchdog: Implement generic watchdog_reset() version
This patch tries to implement a generic watchdog_reset() function that
can be used by all boards that want to service the watchdog device in
U-Boot. This watchdog servicing is enabled via CONFIG_WATCHDOG.
Without this approach, new boards or platforms needed to implement a
board specific version of this functionality, mostly copy'ing the same
code over and over again into their board or platforms code base.
With this new generic function, the scattered other functions are now
removed to be replaced by the generic one. The new version also enables
the configuration of the watchdog timeout via the DT "timeout-sec"
property (if enabled via CONFIG_OF_CONTROL).
This patch also adds a new flag to the GD flags, to flag that the
watchdog is ready to use and adds the pointer to the watchdog device
to the GD. This enables us to remove the global "watchdog_dev"
variable, which was prone to cause problems because of its potentially
very early use in watchdog_reset(), even before the BSS is cleared.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: "Marek Behún" <marek.behun@nic.cz>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Maxim Sloyko <maxims@google.com>
Cc: Erik van Luijk <evanluijk@interact.nl>
Cc: Ryder Lee <ryder.lee@mediatek.com>
Cc: Weijie Gao <weijie.gao@mediatek.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: "Álvaro Fernández Rojas" <noltari@gmail.com>
Cc: Philippe Reynes <philippe.reynes@softathome.com>
Cc: Christophe Leroy <christophe.leroy@c-s.fr>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Michal Simek <michal.simek@xilinx.com> (on zcu100)
Stefan Roese [Wed, 24 Apr 2019 14:05:06 +0000 (16:05 +0200)]
arm: mvebu: turris_omnia: Use thumb instructions in SPL to save space
With the latest changes to the drivers (SPI_FLASH_SPANSION etc), Travis
reports that the SPL image is too big. Let's use the thumb instructions
in SPL to save some space and make the image fit again.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Baruch Siach <baruch@tkos.co.il>
Cc: Marek Behun <marek.behun@nic.cz>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Chris Packham [Sat, 13 Apr 2019 08:21:19 +0000 (20:21 +1200)]
ARM: kirkwood: enable CONFIG_DM_USB on db-
88f6281-bp
Switch to the driver model for USB on the db-
88f6281-bp board.
CONFIG_BLK can't be enabled yet because mvebu_mmc.c needs converting.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Chris Packham [Sat, 13 Apr 2019 08:21:18 +0000 (20:21 +1200)]
ARM: kirkwood: add db-
88f6281-bp board
This is Marvell's Kirkwood development board. It has the following
features
- 512M DDR2
- 2 PCI connectors
- 1 x1 PCI-e interface
- 1 Gigabit Ethernet Port
- 2 SATA Ports
- USB 2.0 Interface
- SDIO
- 128M NAND Flash
- 16M SPI Flash
It can be strapped to boot from SPI or NAND so there are two defconfigs
(one per boot media).
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Michael Walle [Thu, 11 Apr 2019 13:36:21 +0000 (15:36 +0200)]
arm: kirkwood: lsxl: add note about sata in README
The boot commands have changed in the environment. Add a note about the
incompatible change and how resolve the issue in the board's README.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Thu, 11 Apr 2019 10:33:36 +0000 (12:33 +0200)]
arm: kirkwood: openrd: Increase U-Boot size in flash to make it fit
We have run now multiple times into size issues with the openrd
board port. To finally fix this, this patch now moves the U-Boot size
from 0x6.0000 to 0x8.0000, giving enough space for the next time.
This also changes the environment location and potentially the
MTD partitioning, but I see no better fix for now. Especially since
this board does not have an active maintainer.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Thu, 11 Apr 2019 10:33:35 +0000 (12:33 +0200)]
arm: kirkwood: openrd: Remove superfluous CONFIG_ENV_ADDR
Remove the superfluous CONFIG_ENV_ADDR definition. Its not needed
as CONFIG_ENV_OFFSET is also set to the same value.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Thu, 11 Apr 2019 10:33:34 +0000 (12:33 +0200)]
arm: kirkwood: dts: Add openrd-* dtb makefile build targets
The following Kirkwood dtb build targets are currently missing:
kirkwood-openrd-base.dtb
kirkwood-openrd-client.dtb
kirkwood-openrd-ultimate.dtb
This patch adds them to the Makefile to fix the build error.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Pierre Bourdon [Thu, 11 Apr 2019 02:56:59 +0000 (04:56 +0200)]
arm: mvebu: turris_omnia: use MMC driver model
Enable DM_MMC for compliance with the driver model migration.
Signed-off-by: Pierre Bourdon <delroth@gmail.com>
Cc: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
Pierre Bourdon [Thu, 11 Apr 2019 02:56:58 +0000 (04:56 +0200)]
mmc: mv_sdhci: add driver model support
The new DM implementation currently does not support the Sheeva
88SV331xV5 specific quirk present in the legacy implementation. The
legacy code is thus kept for this SoC and others not yet migrated to
DM_MMC.
Signed-off-by: Pierre Bourdon <delroth@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Pierre Bourdon [Wed, 10 Apr 2019 23:00:23 +0000 (01:00 +0200)]
arm: mvebu: turris_omnia: fix eeprom/mcu device names
Commit
c4bd12a7dad4 ("i2c: mux: Generate longer i2c mux name") changed
the naming scheme of i2c devices within a mux. This broke references to
i2c@0 in the Turris Omnia board initialization code.
Signed-off-by: Pierre Bourdon <delroth@gmail.com>
Cc: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
Ley Foon Tan [Wed, 24 Apr 2019 05:21:47 +0000 (13:21 +0800)]
arm: socfpga: mailbox: Fix off-by-one error on command length checking
A mailbox command contains 1-u32 header + arguments. The "len" variable
only contains the length of the arguments, but not the 1-u32 header.
Include the length of header when checking the ring buffer space to
prevent off-by-one error.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Simon Goldschmidt [Tue, 2 Apr 2019 19:29:41 +0000 (21:29 +0200)]
arm: socfpga: clean up board config files
Remove outdated defines (not used any more, outdated due to DM
conversion) from various socfpga files in include/config.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
Series-version: 3
Series-changes: 2
- added (this) patch with further cleanups to the socfpga board config
files
Simon Goldschmidt [Wed, 9 Jan 2019 19:49:09 +0000 (20:49 +0100)]
arm: socfpga: remove CONFIG_SYS_BOOTMAPSZ
socfpga_common.h defines CONFIG_SYS_BOOTMAPSZ to 64 MiB.
Since having this define overrides the 'bootm_size' env variable for
the whole socfpga platform, let's remove this define from socfpga_common.h
and instead rely on the 'bootm_size' env variable (which is initialized
to 160 MiB in the same file's default env). This gives users the
chance to override it in their own environment.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
Series-to: Marek Vasut <marex@denx.de>
Series-to: u-boot@lists.denx.de
Cover-letter:
arm: socfpga: clean up socfpga_common.h
This series cleans up the include/configs/socfpga_common.h file a bit.
It removes some defines that are used nowhere and cleans up some
leftovers after various subsystems have been converted to use DM.
END
Simon Goldschmidt [Wed, 9 Jan 2019 19:47:52 +0000 (20:47 +0100)]
arm: socfpga: clean up socfpga_common.h
Remove outdated macros and comments (not used any more, outdated due to
DM conversion) from socfpga_common.h.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Series-changes: 3
- changed commit message: s/defines/macros and comments/
Series-changes: 2
- remove even more outdated things
Simon Goldschmidt [Thu, 28 Mar 2019 21:09:35 +0000 (22:09 +0100)]
arm: socfpga: move vining_fpga to DM_I2C
All socfpga boards except for vining_fpga use DM_I2C. Enable
DM_I2C for this board and set the EEPROM defines via Kconfig
(enabling CONFIG_I2C_EEPROM from MISC).
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Series-changes: 2
- added (this) patch to move socfpga_vining to DM_I2C
Simon Goldschmidt [Tue, 9 Apr 2019 19:02:06 +0000 (21:02 +0200)]
arm: socfpga: gen5: reduce SPL pre-reloc malloc
By enabling debug prints in malloc_simple, we can see that SPL for socfpga
gen5 does by far not need the 8 KiB malloc pool currently allocated for
SPL in pre-reloc phase.
On socfpga_socrates, 1304 bytes are currently used (and this increases by
~200 bytes only for the sdram/reset fixes in socfpga-next).
To prevent wasting precious SRAM space, let's reduce the initial heap used
for SPL to 2 KiB. This is still some hundred bytes more than currently
used. Also, the gen5 SPL enables stack and heap in DDR memory pretty
early. Only the initial uclass/dm parsing, serial console and DDR
initialization is done in the initial heap, so these 2 KiB should be
enough for all boards.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
Simon Goldschmidt [Tue, 9 Apr 2019 19:02:05 +0000 (21:02 +0200)]
arm: socfpga: imply/default common config options
This commit moves common config options used in all socfpga boards
to select/imply in Kconfig. This both cleans up the defconfig files
as well as makes future changes easier.
Options implied/defaulted for all sub-arches:
- SPL, SPL_DM, USE_TINY_PRINTF, NR_DRAM_BANKS
Options implied/defaulted for implied for A10 & gen5:
- FPGA_SOCFPGA, SYS_MALLOC_F_LEN, SYS_TEXT_BASE
Options implied/defaulted for gen5:
- SPL_STACK_R, SPL_SYS_MALLOC_SIMPLE, SPL_STACK_R_ADDR
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
Simon Goldschmidt [Tue, 9 Apr 2019 19:02:04 +0000 (21:02 +0200)]
arm: socfpga: put initial U-Boot stack into DDR
If SPL post-reloc stage puts the stack into DDR, U-Boot should be able to
do that, too.
The reason to do so is that this way, U-Boot initial stack can be larger
than SPL initial stack. In situations where we want to save the SPL
in SRAM for next boot without reloading, this prevents overwriting the
SPL DTB in SRAM if U-Boot stack usage gets too high.
To achieve this, the malloc definition for a10 is moved up and sligthly
changed to ensure CONFIG_SYS_INIT_RAM_SIZE is the remaining available size.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
Simon Goldschmidt [Tue, 9 Apr 2019 19:02:03 +0000 (21:02 +0200)]
arm: socfpga: fix comment about SPL memory layout
The comment about SPL memory layout for socfpga gen5 is outdated: the
initial malloc memory is now at the end of the SRAM, gd is below it
(see board_init_f_alloc_reserve).
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
Simon Goldschmidt [Thu, 28 Mar 2019 20:11:51 +0000 (21:11 +0100)]
configs: socfpga: socrates: enable rtc support
This enables DM_RTC and RTC_M41T62 to enable support for the rtc on the
socrates board.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Simon Goldschmidt [Thu, 28 Mar 2019 20:11:50 +0000 (21:11 +0100)]
arm: socfpga: socrates: make rtc work
This patch makes the on-board RTC work on the socfpga_socrates board.
This rtc is present on the board, but it does not work (fails with a
timeout).
This patch adds a weak pull-up on the I2C0-SCL pin connected to the m41t82
RTC on this board. While the SDA line has a pull-up on the pcb, the pull-up
on the SCL line seems to be missing. To work around this, enable the
weak-pull-up feature on this pin.
After applying this patch, the rtc timeout is gone and the 'date' command
can access the rtc chip.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Simon Goldschmidt [Thu, 28 Mar 2019 20:11:49 +0000 (21:11 +0100)]
rtc: m41t62: add compatible for m41t82
This adds a compatible string for m41t82. This ensures that this driver
can be used for m41t82 in DM mode, too (asit was usable for this model in
non-DM mode before).
In addition, the HT bit has to be reset during probe, since the m41t82
chip sets it when entering battery standby mode.
This patch ensures this driver works on socfpga_socrates.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Simon Goldschmidt [Thu, 28 Mar 2019 20:11:48 +0000 (21:11 +0100)]
i2c: designware: fix reset handling on socfpga gen5
Using this driver on socfpga gen5 with DM_I2C enabled leads to a data abort
as the 'i2c' reset property cannot be found (the gen5 dtsi does not provide
reset-names).
The actual bug was to check 'if (&priv->reset_ctl)', which is never false.
While at it, convert the driver to use 'reset_get_bulk' instead of looking
at a specific named reset and also make it release the reset on driver
remove before starting the OS.
Fixes:
622597dee4f6 ("i2c: designware: add reset ctrl to driver")
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Goldschmidt [Tue, 26 Mar 2019 12:38:53 +0000 (13:38 +0100)]
Revert "cmd: Kconfig: Do not include EEPROM if DM_I2C is used without DM_I2C_COMPAT"
This reverts commit
65a97e7fcf54feb7c4ebe1aee8a572830af4cf51.
The 'eeprom' command has been converted to work with DM_I2C in a patch
submitted around the same time as this commit:
commit
0c07a9b4078d ("eeprom: Add device model based I2C support to eeprom command")
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Goldschmidt [Tue, 26 Mar 2019 12:38:52 +0000 (13:38 +0100)]
eeprom: fix DM_I2C support without CONFIG_SYS_I2C_EEPROM_BUS
The current device model enabled eeprom code only works if
CONFIG_SYS_I2C_EEPROM_BUS is set.
This patch makes it work without that define so that the bus
number passed to 'eeprom_init' is used.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tom Rini [Wed, 24 Apr 2019 16:27:29 +0000 (12:27 -0400)]
Merge tag 'pull-24apr19' of git://git.denx.de/u-boot-dm
Various minor sandbox iumprovements
Fixes for tracing with sandbox
Refactoring for boot_get_fdt()
Tom Rini [Wed, 24 Apr 2019 16:26:58 +0000 (12:26 -0400)]
Merge tag 'efi-2019-07-rc1-3' of git://git.denx.de/u-boot-efi
Pull request for UEFI sub-system for v2019.07-rc1 (3)
This patch series reworks the implementation of the `bootefi` command to
remove code duplication by using the LoadImage() boot service to load
binaries.
Missing short texts for UEFI protocols are added for display by the
`efidebug dh` command.
Missing parameter checks for AllocatePages() and CreateDeviceNode() are
implemented.
The constants for protocol GUIDs are changed to match the names in the UEFI
specification.
Tom Rini [Wed, 24 Apr 2019 16:26:39 +0000 (12:26 -0400)]
Merge tag 'u-boot-stm32-mcu-
20190423' of https://github.com/pchotard/u-boot
STM32 MCUs update:
- DT rework and alignment with DT kernel v4.20
- mmc: arm_pl180_mmci: Synchronize compatible with kernel v4.20
- mmc: stm32_sdmmc2: Synchronize properties with kernel v4.20
- configs: update for F746/769 boards
Tom Rini [Wed, 24 Apr 2019 16:26:25 +0000 (12:26 -0400)]
Merge tag 'u-boot-amlogic-
20190423' of git://git.denx.de/u-boot-amlogic
- Add support for Amlogic p200 & p201 Reference Designs
- Add Amlogic SoC information display
- Add support for the Libretech-AC AML-S805X-AC board
- Add Amlogic AXG reset compatible
- Add I2C support for Amlogic AXG
- Fix AXG PIN and BANK pinctrl definitions
- Fix regmap_read_poll_timeout warning about sandbox_timer_add_offset
- Add initial support for Amlogic G12A SoC and U200 board
- Enable PHY_REALTEK for selected boards
- Fix Khadas VIM2 README
Simon Goldschmidt [Thu, 28 Mar 2019 21:27:53 +0000 (22:27 +0100)]
socfpga: add Simon Goldschmidt as co-custodian
This updates MAINTAINERS and git-mailrc to add me as a
co-custodian for socfpga.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Tom Rini [Wed, 24 Apr 2019 13:04:23 +0000 (09:04 -0400)]
Merge branch '2019-04-22-master-imports'
- Add and enable brcmnand driver on a number of relevant platforms.
Also add and enable LED drivers on more bcm platforms.
- Various ARMv8 fixes/improvements, including extending PSCI
functionality.
- fs_loader improvments
- Various FIT/SPL improvements
- PCI bugfixes
- Poplar platform ethernet support
- MediaTek MMC improvements
- Android boot improvements
Eugeniu Rosca [Mon, 8 Apr 2019 15:35:28 +0000 (17:35 +0200)]
image: android: fix 'iminfo' typo
Fix below CP warning triggered by the 'iminfo' output in another patch:
WARNING: 'addrress' may be misspelled - perhaps 'address'?
Fixes:
4f1318b29c7a20 ("common: image: minimal android image iminfo support")
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Eugeniu Rosca [Mon, 8 Apr 2019 15:35:27 +0000 (17:35 +0200)]
image: android: allow booting lz4-compressed kernels
According to Android image format [1], kernel image resides at 1 page
offset from the boot image address. Grab the magic number from there
and allow U-Boot to handle LZ4-compressed KNL binaries instead of
hardcoding compression type to IH_COMP_NONE. Other compression types,
if needed, can be added later.
Tested on H3ULCB-KF using the image detailed in [2].
[1] Excerpt from include/android_image.h
+-----------------+
| boot header | 1 page
+-----------------+
| kernel | n pages
+-----------------+
| ramdisk | m pages
+-----------------+
| second stage | o pages
+-----------------+
[2] => iminfo
4c000000
## Checking Image at
4c000000 ...
Android image found
kernel size: 85b9d1
kernel address:
48080000
ramdisk size: 54ddbc
ramdisk addrress:
4a180000
second size: 0
second address:
48000800
tags address:
48000100
page size: 800
os_version:
1200012a (ver: 0.9.0, level: 2018.10)
name:
cmdline: buildvariant=userdebug
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Heinrich Schuchardt [Sun, 7 Apr 2019 15:57:40 +0000 (17:57 +0200)]
test: env: Enable env unit tests by default
If CONFIG_UNIT_TEST is enabled we should enable the individual tests by
default to ensure good test coverage.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Ramon Fried [Sat, 6 Apr 2019 02:12:01 +0000 (05:12 +0300)]
pci: pci.h: add missing maskbit
PCI_MSI_FLAGS_MASKBIT was missing from include file,
add it.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Thierry Reding [Mon, 15 Apr 2019 08:08:20 +0000 (10:08 +0200)]
fdtdec: Use fdt_setprop_u32() for fdtdec_set_phandle()
The fdt_setprop_u32() function does everything that we need, so we
really only use the function as a convenience wrapper, in which case it
can simply be a static inline function.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Stefan Roese [Fri, 12 Apr 2019 14:42:28 +0000 (16:42 +0200)]
dm: core: Change platform specific translation-offset handling
Testing has shown that the current DM implementation of a platform /
board specific translation offset, as its needed for the SPL on MVEBU
platforms is buggy. The translation offset is confingured too late,
after the driver bind functions are run. This may result in incorrect
address translations. With the current implementation its not possible
to configure the offset earlier, as the DM code has not run at all.
This patch now removed the set_/get_translation_offset() calls and
moves the translation offset into the GD variable translation_offset.
This variable will get used when CONFIG_TRANSLATION_OFFSET is enabled.
This option is enabled only for MVEBU on ARM32 platforms, where its
currenty needed and configured in the SPL.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Pierre Bourdon <delroth@gmail.com>
Cc: Baruch Siach <baruch@tkos.co.il>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Tested-by: Pierre Bourdon <delroth@gmail.com>
Tested-by: Baruch Siach <baruch@tkos.co.il>
Lukas Auer [Wed, 10 Apr 2019 12:46:07 +0000 (14:46 +0200)]
simple-bus: add DM_FLAG_PRE_RELOC flag to simple-bus driver
Boards such as qemu-riscv, which receive their device tree at runtime,
for example from QEMU or firmware, are unable to add the appropriate
device tree properties to make devices available pre relocation.
Instead, they must rely on the DM_FLAG_PRE_RELOC flag to be set for the
required drivers.
Add the DM_FLAG_PRE_RELOC flag to the simple-bus driver to make devices
under it with drivers that have set the flag as well available pre
relocation for these boards.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 8 Apr 2019 19:20:53 +0000 (13:20 -0600)]
sandbox: Enable the 'trace' command when tracing is used
Enable this by default so that tracing can be inspected if enabled. This
cannot rely on the 'imply' in lib/Kconfig since this method of enabling
tracing relates on an environment variable (FTRACE) and does not use
Kconfig.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 8 Apr 2019 19:20:52 +0000 (13:20 -0600)]
Convert CONFIG_TRACE_BUFFER_SIZE et al to Kconfig
This converts the following to Kconfig:
CONFIG_TRACE_BUFFER_SIZE
CONFIG_TRACE_EARLY_SIZE
CONFIG_TRACE_EARLY
CONFIG_TRACE_EARLY_ADDR
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 8 Apr 2019 19:20:51 +0000 (13:20 -0600)]
Convert CONFIG_TRACE to Kconfig
This converts the following to Kconfig:
CONFIG_TRACE
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 8 Apr 2019 19:20:50 +0000 (13:20 -0600)]
trace: Tidy up error returns
At present many functions in this file return -1. Update them to return a
valid error code. Also tidy up the 'return' statements at the same time,
since these should have a blank line before them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 8 Apr 2019 19:20:49 +0000 (13:20 -0600)]
div64: Don't instrument the division function
This function may be called from tracing code, since that code needs to
read the timer and this often requires calling do_div(), which calls
__div64_32(). If this function is instrumented it causes an infinite loop,
since emitting a trace record requests the time, which in turn emits a
trace record, etc.
Update the prototype to prevent instrumentation code being added.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 8 Apr 2019 19:20:48 +0000 (13:20 -0600)]
div64: Use kernel types
These functions still use uint32_t and uint64_t but checkpatch now
requests that the kernel types be used instead. Update them as well as a
few resulting checkpatch errors.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 8 Apr 2019 19:20:47 +0000 (13:20 -0600)]
initcall: Drop use of header files
This file should not include header files. They have already been included
by the time initcall.h is included. Also, document how to enable debugging
in this file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 8 Apr 2019 19:20:46 +0000 (13:20 -0600)]
sandbox: Increase the early-trace-buffer size
This buffer is too small now that sandbox has grown in size. Increase it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 8 Apr 2019 19:20:45 +0000 (13:20 -0600)]
bootstage: Allow calling bootstage_mark() before bootstage_init()
It is possible for this to happen if something goes wrong very early in
the init sequence. Add a check for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 8 Apr 2019 19:20:44 +0000 (13:20 -0600)]
sandbox: Move pre-console buffer out of the way of tracing
These two buffers currently conflict if tracing is enabled. Move the
pre-console buffer and update the documentation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 8 Apr 2019 19:20:43 +0000 (13:20 -0600)]
sandbox: Drop the printf() in setup_ram_buf()
This was really intended for debugging. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 8 Apr 2019 19:20:42 +0000 (13:20 -0600)]
sandbox: Correct maths in allocation routines
Allocation routines were adjusted to ensure that the returned addresses
are a multiple of the page size, but the header code was not updated to
take account of this. These routines assume that the header size is the
same as the page size which is unlikely.
At present os_realloc() does not work correctly due to this bug. The only
user is the hostfs 'ls' command, and only if the directory contains a
unusually long filename, which likely explains why this bug was not
caught earlier.
Fix this by doing the calculations using the obtained page size.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 8 Apr 2019 19:20:41 +0000 (13:20 -0600)]
sandbox: Improve debugging in initcall_run_list()
At present if one of the initcalls fails on sandbox the address printing
is not help, e.g.:
initcall sequence
0000557678967c80 failed at call
00005576709dfe1f (err=-96)
This is because U-Boot gets relocated high into memory and the relocation
offset (gd->reloc_off) does not work correctly for sandbox.
Add support for finding the base address of the text region (at least on
Linux) and use that to set the relocation offset. This makes the output
better:
initcall sequence
0000560775957c80 failed at call
0000000000048134 (err=-96)
Then you use can use grep to see which init call failed, e.g.:
$ grep
0000000000048134 u-boot.map
stdio_add_devices
Of course another option is to run it with a debugger such as gdb:
$ gdb u-boot
...
(gdb) br initcall.h:41
Breakpoint 1 at 0x4db9d: initcall.h:41. (2 locations)
Note that two locations are reported, since this function is used in both
board_init_f() and board_init_r().
(gdb) r
Starting program: /tmp/b/sandbox/u-boot
[Thread debugging using libthread_db enabled]
Using host libthread_db library "/lib/x86_64-linux-gnu/libthread_db.so.1".
U-Boot
2018.09-00264-ge0c2ba9814-dirty (Sep 22 2018 - 12:21:46 -0600)
DRAM: 128 MiB
MMC:
Breakpoint 1, initcall_run_list (init_sequence=0x5555559619e0 <init_sequence_f>)
at /scratch/sglass/cosarm/src/third_party/u-boot/files/include/initcall.h:41
41 printf("initcall sequence %p failed at call %p (err=%d)\n",
(gdb) print *init_fnc_ptr
$1 = (const init_fnc_t) 0x55555559c114 <stdio_add_devices>
(gdb)
Signed-off-by: Simon Glass <sjg@chromium.org>
Christoph Muellner [Fri, 5 Apr 2019 11:03:46 +0000 (13:03 +0200)]
common: command: Add command execution tracer.
When using boot scripts it can become quite hard to understand
which commands are actually executed during bootup (e.g. where
is a kernel image loaded from or which DTB is in use).
Shell scripts suffer from a similar problem and many shells address
this problem with a command execution tracer (e.g. BASH has xtrace,
which can be enabled by "set -x").
This patch introduces a command tracer for U-Boot, which prints
every command with its arguments before it is executed.
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Eugeniu Rosca [Mon, 1 Apr 2019 10:52:52 +0000 (12:52 +0200)]
fdt: boot_get_fdt: android: use ENV 'fdtaddr' as fallback
Our platform doesn't store the DTB into the Android image second area,
but rather copies the DTB to RAM from a dedicated dtb.img partition [0],
prior to booting the Android image by calling bootm.
Similar to [1], we find it useful to just call 'bootm' and have the
right DTB being passed to OS (assuming its address has been previously
stored in 'fdtaddr' by calling `fdt addr <dtb-addr>`).
Booting Android with DTB from 'fdtaddr' will only occur if:
- No DTB is embedded in the second area of Android image
- 'fdtaddr' points to a valid DTB in RAM
[0] https://source.android.com/devices/architecture/dto/partitions
[1] https://patchwork.ozlabs.org/patch/
1046652/
("Support boot Android image without address on bootm command")
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Eugeniu Rosca [Mon, 1 Apr 2019 10:45:36 +0000 (12:45 +0200)]
fdt: boot_get_fdt: android: compress handling (non-functional)
Prepare for booting Android images which lack any DTB in the second
area by using 'fdtaddr' environment variable as source/address of FDT.
No functional/behavioral change expected in this patch.
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Eugeniu Rosca [Mon, 1 Apr 2019 10:45:35 +0000 (12:45 +0200)]
fdt: boot_get_fdt: simplify no_fdt handling (non-functional)
Increase the readability of boot_get_fdt().
No change in behavior is expected.
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Eugeniu Rosca [Mon, 1 Apr 2019 10:45:34 +0000 (12:45 +0200)]
fdt: boot_get_fdt: really boot w/o FDT when "goto no_fdt"
The 'no_fdt' goto label was introduced by v2015.01 commit [0] and it
had two review stages [1-2]. The *documented* purpose behind commit [0]
is (excerpt from commit description):
> allows both FDT and non-FDT kernels to boot by making the
> third parameter to the bootm/bootz optional
While [1] and [2] share the same goal, they have very different
implementations:
- [1] was based on a very simple 'argc' check at function error out
with returning success to the caller if the third parameter was NOT
passed to bootm/bootz command. This approach had the downside of
returning success to the caller even in case of legitimate internal
errors, which should halt booting.
- [2] added the "no_fdt" label and several "goto no_fdt" statements.
This allowed to report the legitimate internal errors to the caller.
IOW the major difference between [1] and [2] is:
- [1] boot w/o FDT if FDT address is not passed to boot{m,z,*}
- [2] give *freedom* to the developer to boot w/o FDT from any
(more or less) arbitrary point in the function flow (and here
comes the peculiar aspect, which looks to be a leftover from [1])
with the precondition that the 3rd argument (FDT address) is NOT
provided to boot{m,z,*}. In practice, this means that only a subset
of "goto no_fdt" end up booting w/o FDT while the other subset is
returning an error to the caller.
This patch removes the peculiar behavior described above, such that
"goto no_fdt" performs really what it tells to the developer.
The motivation of this patch is to decrease the unneeded complexity
and increase the readability of boot_get_fdt().
[0]
48aead71c1ad ("fdt: Allow non-FDT kernels to boot when CONFIG_OF_LIBFDT is defined")
[1] https://patchwork.ozlabs.org/patch/412923/
("[U-Boot,v1] fdt: Allow non-FDT kernels to boot when CONFIG_OF_LIBFDT is defined")
[2] https://patchwork.ozlabs.org/patch/415635/
("[U-Boot,v2] fdt: Allow non-FDT kernels to boot when CONFIG_OF_LIBFDT is defined")
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Eugeniu Rosca [Mon, 1 Apr 2019 10:45:33 +0000 (12:45 +0200)]
fdt: boot_get_fdt: remove redundant zeroing out
Paranoid programming [1] lies at the foundation of proper software
development, but the repetitive zeroing-out of output arguments in the
context of the same function rather clutters the code and inhibits
further refactoring/optimization than is doing any good.
In boot_get_fdt(), we already perform zero/NULL-initialization of
*of_flat_tree and *of_size at the beginning of the function, so doing
the same at function error-out is redundant/superfluous.
Moreover, keeping the code unchanged might encourage the developers to
update *of_flat_tree and *of_size during some interim computations,
which is against the current design of boot_get_fdt(). Currently,
writing useful data into these arguments happens just before
successfully returning from boot_get_fdt() and it should better stay so.
[1] https://blog.regehr.org/archives/1106
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Lars Povlsen [Thu, 4 Apr 2019 12:38:50 +0000 (14:38 +0200)]
ARMv8: PSCI: Fix PSCI_TABLE relocation issue
This fixes relaction isses with the PSCI_TABLE entries in
the psci_32_table and psci_64_table.
When using 32-bit adress pointers relocation was not being applied to
the tables, causing PSCI handlers to point to the un-relocated code
area. By using 64-bit data relocation is properly applied. The
handlers are thus in the "secure data" area, which is protected by
/memreserve/ in the FDT.
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Trent Piepho [Wed, 27 Mar 2019 23:50:09 +0000 (23:50 +0000)]
bootm: Simplying cache flush code
The cache flush of the kernel load area needs to be aligned outward to
the DMA cache alignment. The operations are simpler if we think of this
as aligning the start down, ALIGN_DOWN(load, ARCH_DMA_MINALIGN), and
aligning the end up, ALIGN(load_end, ARCH_DMA_MINALIGN), and then find
the length of the flushed region by subtracting the former from the
latter.
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Andreas Dannenberg [Wed, 27 Mar 2019 18:17:26 +0000 (13:17 -0500)]
malloc: Fix memalign not honoring alignment prior to full malloc init
When using memalign() in a scenario where U-Boot is configured for full
malloc support with simple malloc not explicitly enabled and before the
full malloc support is initialized, a memory block is being allocated
and returned without the alignment parameter getting honored.
Fix this issue by replacing the existing memalign pre-full malloc init
logic with a call to memalign_simple() this way ensuring proper alignment
of the returned memory block.
Fixes:
ee038c58d519 ("malloc: Use malloc simple before malloc is fully initialized in memalign()")
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Stefan Roese [Tue, 26 Mar 2019 12:04:00 +0000 (13:04 +0100)]
spl: spl_nand.c: Add NAND loading message
This patch adds a short message to the SPL NAND loader, which displays
the source and destinations addresses including the size of the
loaded image, like this:
U-Boot SPL
2019.04-rc3-00113-g486efd8aaf (Mar 15 2019 - 14:18:02 +0100)
Trying to boot from NAND
Loading U-Boot from 0x00040000 (size 0x000a0000) to 0x22900000
I find this message quite helpful - hopefully others do so as well.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Fabien Parent [Sun, 24 Mar 2019 15:46:38 +0000 (16:46 +0100)]
ARM: MediaTek: Add support for MT8516 SoC
Add support for MediaTek MT8516 SoC. This include the file
that will initialize the SoC after boot and its device tree.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Fabien Parent [Sun, 24 Mar 2019 15:46:37 +0000 (16:46 +0100)]
pinctrl: add driver for MT8516
Add Pinctrl driver for MediaTek MT8516 SoC.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Acked-by: Ryder Lee <ryder.lee@mediatek.com>
Fabien Parent [Sun, 24 Mar 2019 15:46:36 +0000 (16:46 +0100)]
clk: mediatek: add driver for MT8516
Add clock driver for MediaTek MT8516 SoC.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Acked-by: Ryder Lee <ryder.lee@mediatek.com>
[trini: Redo whitespace]
Signed-off-by: Tom Rini <trini@konsulko.com>
Fabien Parent [Sun, 24 Mar 2019 15:46:35 +0000 (16:46 +0100)]
clk: mediatek: add support for SETCLR_INV and NO_SETCLR flags
Add the implementation for the CLK_GATE_SETCLR_INV and
CLK_GATE_NO_SETCLR flags.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Acked-by: Ryder Lee <ryder.lee@mediatek.com>
Fabien Parent [Sun, 24 Mar 2019 15:46:34 +0000 (16:46 +0100)]
mmc: mtk-sd: fix configuration option check
We either need to use IS_ENABLED(CONFIG_FOO) or CONFIG_IS_ENABLED(FOO).
IS_ENABLE(FOO) will always return false.
This commit fixes the comparison by using the CONFIG_IS_ENABLED(FOO)
syntax.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Fabien Parent [Sun, 24 Mar 2019 15:46:33 +0000 (16:46 +0100)]
mmc: mtk-sd: add support for MT8516
Add config for handling MT8516 SoC.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Acked-by: Ryder Lee <ryder.lee@mediatek.com>
Fabien Parent [Sun, 24 Mar 2019 15:46:32 +0000 (16:46 +0100)]
mmc: mtk-sd: add source_cg clock support
Some MediaTek SoC need an additional clock "source_cg". Enable
this new clock. We reuse the same clock name as in the kernel.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Acked-by: Ryder Lee <ryder.lee@mediatek.com>
Shawn Guo [Wed, 20 Mar 2019 07:32:41 +0000 (15:32 +0800)]
poplar: enable Ethernet driver support
The 'phy' reset of gmac device in kernel device tree is not generic
enough for u-boot to use, so we need to overwrite the 'resets' property
as needed. With this device tree fixup and poplar_defconfig changes,
Ethernet starts working on Poplar board.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Shawn Guo [Wed, 20 Mar 2019 07:32:40 +0000 (15:32 +0800)]
net: add higmacv300 Ethernet driver for HiSilicon platform
It adds the driver for HIGMACV300 Ethernet controller found on HiSilicon
SoCs like Hi3798CV200. It's based on a downstream U-Boot driver, but
quite a lot of code gets rewritten and cleaned up to adopt driver model
and PHY API.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Shawn Guo [Wed, 20 Mar 2019 07:32:39 +0000 (15:32 +0800)]
reset: add reset driver for HiSilicon platform
It adds a Driver Model compatible reset driver for HiSlicon platform.
The driver implements a custom .of_xlate function, and uses .data field
as reset register offset and .id field as bit shift.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Shawn Guo [Wed, 20 Mar 2019 07:32:38 +0000 (15:32 +0800)]
reset: add polarity field into struct reset_ctl
Some reset controllers support different polarities for reset operation,
so let's add a polarity field into struct reset_ctl.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Thierry Reding [Fri, 15 Mar 2019 15:32:33 +0000 (16:32 +0100)]
pci: Scale MAX_PCI_REGIONS based on CONFIG_NR_DRAM_BANKS
If a platform defines CONFIG_NR_DRAM_BANKS, each DRAM bank will be added
as a PCI region. The number of MAX_PCI_REGIONS therefore needs to scale
with the number of DRAM banks, otherwise we will end up with too little
space in the hose->regions array to store all system memory regions.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Thierry Reding [Fri, 15 Mar 2019 15:32:32 +0000 (16:32 +0100)]
pci: Add boundary check for hose->regions
Make sure that we don't overflow the hose->regions array, otherwise we
would end up overwriting the hose->region_count field and cause mayhem
to ensue. Also print an error message when we'd be overflowing because
it indicates that there aren't enough regions available and the number
needs to be increased.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Adam Ford [Fri, 15 Mar 2019 19:29:20 +0000 (14:29 -0500)]
ARM: da850evm: Remove legacy MMC code
With the migration to DM in SPL and the DT support, the
old legacy code is no longer neaded, so this patch removes it
Signed-off-by: Adam Ford <aford173@gmail.com>
Philippe Reynes [Fri, 22 Mar 2019 16:02:08 +0000 (17:02 +0100)]
bcm963158: enable led support
Enable the led support in the configuration
of the board bcm963158.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Philippe Reynes [Fri, 22 Mar 2019 16:02:07 +0000 (17:02 +0100)]
dt: bcm963158: enable led controller
Enable the led controller in the device tree
of the board bcm963158.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Philippe Reynes [Fri, 22 Mar 2019 16:02:06 +0000 (17:02 +0100)]
dt: bcm63158: add led controller
Add the led controller in the bcm63158 device tree.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Philippe Reynes [Fri, 22 Mar 2019 16:02:05 +0000 (17:02 +0100)]
led: bcm6858: allow to use this driver on ARCH_963158
Allow the led bcm6858 driver to be used on bcm63158.
They have the same led controller.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Philippe Reynes [Fri, 22 Mar 2019 16:02:04 +0000 (17:02 +0100)]
bcm968580xref: enable led support
Enable the led support in the configuration
of the board bcm968580xref.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Philippe Reynes [Fri, 22 Mar 2019 16:02:03 +0000 (17:02 +0100)]
dt: bcm968580xref: enable led controller
Enable the led controller in the device tree
of the board bcm968580xref.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Christophe Kerello [Thu, 6 Dec 2018 14:58:10 +0000 (15:58 +0100)]
mmc: stm32_sdmmc2: Fix r1b timeout issue
On response type r1b, if DTIME is not defined or too short,
the Datatimeout and DPSM flag occurs. Like the DPSM is
activated all next data transfer will be frozen.
To avoid this freeze:
-The driver must define a DTIME on all r1b response type.
-DTIME of SDMMC must be defined for alls stop transmission
(for read and write request) even if MMC_RSP_BUSY is not set.
-If busy timeout occur, an abort request must be sent to
reinitialize the DPSM.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Tested-by: Patrick DELAUNAY <patrick.delaunay@st.com>
Patrick Delaunay [Fri, 16 Nov 2018 09:25:54 +0000 (10:25 +0100)]
mmc: stm32_sdmmc2: Update DT properties with v4.19 bindings
Some properties name has been updated:
- st,dirpol becomes st,sig-dir
- st,negedge becomes st,neg-edge
- st,pin-ckin becomes st,use-ckin
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Tue, 12 Feb 2019 16:17:58 +0000 (17:17 +0100)]
ARM: dts: stm32: Update sdmmc binding for stm32mp157c-ed1
Update some sdmmc properties which have been updated with
v4.19 DT bindings:
- st,dirpol becomes st,sig-dir
- st,negedge becomes st,neg-edge
- st,pin-ckin becomes st,use-ckin
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Wed, 17 Apr 2019 09:53:29 +0000 (11:53 +0200)]
ARM: dts: stm32: Update sdmmc binding for stm32h743i-eval
Update some sdmmc properties which have been updated with
v4.19 DT bindings:
- st,dirpol becomes st,sig-dir
- st,negedge becomes st,neg-edge
- st,pin-ckin becomes st,use-ckin
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Fri, 22 Feb 2019 14:04:44 +0000 (15:04 +0100)]
board: stm32f746-disco: Get MII/RMII phy_mode from DT
This is needed to make ethernet work on stm32f746-eval which
uses MII mode.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Patrice Chotard [Fri, 22 Feb 2019 14:04:43 +0000 (15:04 +0100)]
configs: stm32f746-disco: Enable SPI_FLASH_MACRONIX
This config file is shared between stm32f746-disco and stm32f769-disco.
These 2 boards doesn't embed the same qspi flash (Micron n25q128a on
f746-disco, Macronix mx66l51235l on f769-disco).
To be able to use Macronix mx66l51235l on F769-disco, flags
SPI_FLASH_MACRONIX must be enabled.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Thu, 21 Feb 2019 09:12:08 +0000 (10:12 +0100)]
configs: stm32f746-disco: enable CONFIG_DISTRO_DEFAULTS
Allows to boot linux distribution
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Thu, 21 Feb 2019 09:07:54 +0000 (10:07 +0100)]
configs: stm32f746-disco: update EXTRA_ENV_SETTINGS
Allows to boot linux distribution.
As stm32f746-disco and stm32f769-disco are sharing the same defconfig
file, in case of stm32f769-disco build, "fdtfile=..." must be updated
with the correct stm32f769 DTB file name.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Wed, 5 Dec 2018 13:04:32 +0000 (14:04 +0100)]
mmc: arm_pl180_mmci: Sync compatible with kernel
Initially the compatible string was wrongly set to "st,stm32f4xx-sdio".
Use compatible string used by kernel instead and identify mmci variant
using "arm,primecell-periphid" property.
Currently, the DM part of mmci driver is only used by STM32 SoCs,
that's why the switch case gets only one entry. It will be populated
easily with new variant in the future.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Tue, 11 Dec 2018 13:49:18 +0000 (14:49 +0100)]
pinctrl: stm32: Add st,stm32f769-pinctrl compatible string
Due to DT kernel synchronisation, add new pinctrl compatible
string for stm32f769.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Mon, 18 Feb 2019 22:19:45 +0000 (23:19 +0100)]
ARM: dts: stm32: Restore old usart1 clock bindings for stm32f7
As U-boot stm32f clock driver doesn't support new
bindings for auxiliary clocks (clocks = <&rcc 1 ....>),
restore old bindings for usart1 to get console output.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Thu, 6 Dec 2018 10:53:39 +0000 (11:53 +0100)]
ARM: dts: stm32: Sync DT with v4.20 kernel for stm32h7
Synchronize stm32h7 device tree with kernel v4.20.
U-boot DT files and pinctrl bindings are updated,
useless nodes are removed and gpio compatible added.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>