From: Markus Klotzbücher Date: Wed, 22 Feb 2006 13:05:44 +0000 (+0100) Subject: SDRAM now working for delta board, but there are still aliasing problems, X-Git-Tag: LABEL_2006_03_12_0025~30 X-Git-Url: https://git.librecmc.org/?a=commitdiff_plain;h=ff3c2a947889a9d60fc1c869565aa88b2e44b37b;p=oweals%2Fu-boot.git SDRAM now working for delta board, but there are still aliasing problems, we only see 64MB. --- diff --git a/Makefile b/Makefile index 736ffb6a03..229f5760a1 100644 --- a/Makefile +++ b/Makefile @@ -1838,6 +1838,7 @@ clean: rm -f board/cray/L1/bootscript.c board/cray/L1/bootscript.image rm -f board/trab/trab_fkt board/voiceblue/eeprom rm -f board/integratorap/u-boot.lds board/integratorcp/u-boot.lds + rm -f u-boot.objdump-* clobber: clean find . -type f \( -name .depend \ diff --git a/board/delta/config.mk b/board/delta/config.mk index 09b0f71557..4b0fa679ee 100644 --- a/board/delta/config.mk +++ b/board/delta/config.mk @@ -1,4 +1,5 @@ #TEXT_BASE = 0x0 #TEXT_BASE = 0xa1700000 #TEXT_BASE = 0xa3080000 -TEXT_BASE = 0xa3008000 +#TEXT_BASE = 0xa3008000 +TEXT_BASE = 0x9ffe0000 diff --git a/board/delta/lowlevel_init.S b/board/delta/lowlevel_init.S index 35716f245e..66e75750bd 100644 --- a/board/delta/lowlevel_init.S +++ b/board/delta/lowlevel_init.S @@ -49,20 +49,6 @@ DRAM_SIZE: .long CFG_DRAM_SIZE bls 0b .endm - -#define SDRAM_CMD_NOP 0x40000000 - -.macro do_nop_cmd num - ldr r2, =MDMRS - ldr r3, =SDRAM_CMD_NOP - ldr r4, =0x0 -loop: - str r3, [r2] - add r4, r4, #1 - cmp r4, \num - bls loop -.endm - /* * Memory setup */ @@ -96,7 +82,7 @@ lowlevel_init: /* clocks to settle. Only necessary after hard reset... */ /* FIXME: can be optimized later */ /* ---------------------------------------------------------------- */ - wait #300 +; wait #300 mem_init: @@ -138,7 +124,7 @@ mem_init: /* Set MDMRS */ ldr r0, =MDMRS - ldr r1, =0x60000023 + ldr r1, =0x60000033 str r1, [r0] wait #300 @@ -269,13 +255,11 @@ mem_init: #endif /* NEW_SDRAM_INIT */ +#ifndef CFG_SKIP_DRAM_SCRUB /* scrub/init SDRAM if enabled/present */ -/* ldr r11, =0xa0000000 /\* base address of SDRAM (CFG_DRAM_BASE) *\/ */ -/* ldr r12, =0x04000000 /\* size of memory to scrub (CFG_DRAM_SIZE) *\/ */ -/* mov r8,r12 /\* save DRAM size (mk: why???) *\/ */ - ldr r8, =0xa0000000 /* base address of SDRAM (CFG_DRAM_BASE) */ - ldr r9, =0x04000000 /* size of memory to scrub (CFG_DRAM_SIZE) */ - mov r0, #0 /* scrub with 0x0000:0000 */ + ldr r8, =CFG_DRAM_BASE /* base address of SDRAM (CFG_DRAM_BASE) */ + ldr r9, =CFG_DRAM_SIZE /* size of memory to scrub (CFG_DRAM_SIZE) */ + mov r0, #0 /* scrub with 0x0000:0000 */ mov r1, #0 mov r2, #0 mov r3, #0 @@ -284,10 +268,11 @@ mem_init: mov r6, #0 mov r7, #0 10: /* fastScrubLoop */ - subs r9, r9, #32 // 32 bytes/line + subs r9, r9, #32 /* 8 words/line */ stmia r8!, {r0-r7} beq 15f b 10b +#endif /* CFG_SKIP_DRAM_SCRUB */ 15: /* Mask all interrupts */ diff --git a/include/configs/delta.h b/include/configs/delta.h index 7b923c22e9..786ed9a815 100644 --- a/include/configs/delta.h +++ b/include/configs/delta.h @@ -143,14 +143,14 @@ * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 4 /* we have 2 banks of DRAM */ -#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ -#define PHYS_SDRAM_2 0xa4000000 /* SDRAM Bank #2 */ -#define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 MB */ -#define PHYS_SDRAM_3 0xa8000000 /* SDRAM Bank #3 */ -#define PHYS_SDRAM_3_SIZE 0x00000000 /* 0 MB */ -#define PHYS_SDRAM_4 0xac000000 /* SDRAM Bank #4 */ -#define PHYS_SDRAM_4_SIZE 0x00000000 /* 0 MB */ +#define PHYS_SDRAM_1 0x80000000 /* SDRAM Bank #1 */ +#define PHYS_SDRAM_1_SIZE 0x8000000 /* 128 MB */ +#define PHYS_SDRAM_2 0x88000000 /* SDRAM Bank #2 */ +#define PHYS_SDRAM_2_SIZE 0x8000000 /* 128 MB */ +#define PHYS_SDRAM_3 0x90000000 /* SDRAM Bank #3 */ +#define PHYS_SDRAM_3_SIZE 0x8000000 /* 128 MB */ +#define PHYS_SDRAM_4 0x98000000 /* SDRAM Bank #4 */ +#define PHYS_SDRAM_4_SIZE 0x8000000 /* 128 MB */ #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ #define PHYS_FLASH_2 0x04000000 /* Flash Bank #2 */ @@ -158,8 +158,10 @@ #define PHYS_FLASH_BANK_SIZE 0x02000000 /* 32 MB Banks */ #define PHYS_FLASH_SECT_SIZE 0x00040000 /* 256 KB sectors (x2) */ -#define CFG_DRAM_BASE 0xa0000000 -#define CFG_DRAM_SIZE 0x04000000 +#define CFG_DRAM_BASE 0x80000000 /* at CS0 */ +#define CFG_DRAM_SIZE 0x20000000 /* 512 MB Ram */ + +#define CFG_SKIP_DRAM_SCRUB 1 #define CFG_FLASH_BASE PHYS_FLASH_1 diff --git a/include/configs/zylonite.h b/include/configs/zylonite.h index a8ff9fdf4d..4232d504ee 100644 --- a/include/configs/zylonite.h +++ b/include/configs/zylonite.h @@ -120,8 +120,8 @@ #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ #define CFG_DEVICE_NULLDEV 1 -#define CFG_MEMTEST_START 0xa0400000 /* memtest works on */ -#define CFG_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ +#define CFG_MEMTEST_START 0x9c000000 /* memtest works on */ +#define CFG_MEMTEST_END 0x9c400000 /* 4 ... 8 MB in DRAM */ #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */