From: Mugunthan V N Date: Mon, 8 Jul 2013 10:34:40 +0000 (+0530) Subject: ARM: DRA7xx: Enable GMAC clock control X-Git-Tag: v2013.10-rc1~22^2~65 X-Git-Url: https://git.librecmc.org/?a=commitdiff_plain;h=f986d9720836433ded29f06c8f5aed462bd20924;p=oweals%2Fu-boot.git ARM: DRA7xx: Enable GMAC clock control Enabling CPSW module by enabling GMAC clock control Signed-off-by: Mugunthan V N --- diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c index c21674a755..fbbc486621 100644 --- a/arch/arm/cpu/armv7/omap5/hw_data.c +++ b/arch/arm/cpu/armv7/omap5/hw_data.c @@ -393,6 +393,9 @@ void enable_basic_clocks(void) (*prcm)->cm_l3init_clkstctrl, (*prcm)->cm_memif_clkstctrl, (*prcm)->cm_l4cfg_clkstctrl, +#ifdef CONFIG_DRIVER_TI_CPSW + (*prcm)->cm_gmac_clkstctrl, +#endif 0 }; @@ -420,6 +423,9 @@ void enable_basic_clocks(void) (*prcm)->cm_wkup_wdtimer2_clkctrl, (*prcm)->cm_l4per_uart3_clkctrl, (*prcm)->cm_l4per_i2c1_clkctrl, +#ifdef CONFIG_DRIVER_TI_CPSW + (*prcm)->cm_gmac_gmac_clkctrl, +#endif 0 }; @@ -476,7 +482,6 @@ void enable_basic_uboot_clocks(void) (*prcm)->cm_l3init_fsusb_clkctrl, 0 }; - do_enable_clocks(clk_domains_essential, clk_modules_hw_auto_essential, clk_modules_explicit_en_essential, diff --git a/arch/arm/cpu/armv7/omap5/prcm-regs.c b/arch/arm/cpu/armv7/omap5/prcm-regs.c index b0416ad9a3..9dfeff9d50 100644 --- a/arch/arm/cpu/armv7/omap5/prcm-regs.c +++ b/arch/arm/cpu/armv7/omap5/prcm-regs.c @@ -896,6 +896,8 @@ struct prcm_regs const dra7xx_prcm = { .cm_l3init_hsusbhost_clkctrl = 0x4a009340, .cm_l3init_hsusbotg_clkctrl = 0x4a009348, .cm_l3init_hsusbtll_clkctrl = 0x4a009350, + .cm_gmac_clkstctrl = 0x4a0093c0, + .cm_gmac_gmac_clkctrl = 0x4a0093d0, .cm_l3init_ocp2scp1_clkctrl = 0x4a0093e0, /* cm2.l4per */ diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h index ad27db2a94..2c5bd1ab75 100644 --- a/arch/arm/include/asm/omap_common.h +++ b/arch/arm/include/asm/omap_common.h @@ -340,6 +340,10 @@ struct prcm_regs { /* SCRM stuff, used by some boards */ u32 scrm_auxclk0; u32 scrm_auxclk1; + + /* GMAC Clk Ctrl */ + u32 cm_gmac_gmac_clkctrl; + u32 cm_gmac_clkstctrl; }; struct omap_sys_ctrl_regs {