From: Tom Rini <trini@konsulko.com>
Date: Thu, 9 May 2019 11:12:51 +0000 (-0400)
Subject: Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip
X-Git-Tag: v2019.07-rc2~8
X-Git-Url: https://git.librecmc.org/?a=commitdiff_plain;h=f30f268a07b0c9e4418366debc9ad0100a47cea4;p=oweals%2Fu-boot.git

Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip

Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie
---

f30f268a07b0c9e4418366debc9ad0100a47cea4
diff --cc configs/chromebook_samus_tpl_defconfig
index 6ebfaa83a1,0000000000..40f6bb9830
mode 100644,000000..100644
--- a/configs/chromebook_samus_tpl_defconfig
+++ b/configs/chromebook_samus_tpl_defconfig
@@@ -1,82 -1,0 +1,83 @@@
 +CONFIG_X86=y
 +CONFIG_SYS_TEXT_BASE=0xffed0000
 +CONFIG_SYS_MALLOC_F_LEN=0x1a00
 +CONFIG_NR_DRAM_BANKS=8
 +CONFIG_DEBUG_UART_BOARD_INIT=y
 +CONFIG_DEBUG_UART_BASE=0x3f8
 +CONFIG_DEBUG_UART_CLOCK=1843200
 +CONFIG_VENDOR_GOOGLE=y
 +CONFIG_TARGET_CHROMEBOOK_SAMUS_TPL=y
 +CONFIG_DEBUG_UART=y
 +CONFIG_HAVE_MRC=y
 +CONFIG_HAVE_REFCODE=y
 +CONFIG_SMP=y
 +CONFIG_HAVE_VGA_BIOS=y
 +CONFIG_BOOTSTAGE=y
 +CONFIG_BOOTSTAGE_REPORT=y
 +CONFIG_USE_BOOTARGS=y
 +CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
 +CONFIG_SYS_CONSOLE_INFO_QUIET=y
 +CONFIG_MISC_INIT_R=y
 +CONFIG_DISPLAY_BOARDINFO_LATE=y
 +CONFIG_LAST_STAGE_INIT=y
 +CONFIG_BLOBLIST=y
 +CONFIG_BLOBLIST_SIZE=0x1000
 +CONFIG_BLOBLIST_ADDR=0xff7c0000
 +CONFIG_HANDOFF=y
 +CONFIG_SPL_TEXT_BASE=0xffe70000
 +CONFIG_SPL_SEPARATE_BSS=y
 +CONFIG_SPL_NET_SUPPORT=y
 +CONFIG_SPL_PCI=y
 +CONFIG_SPL_PCH_SUPPORT=y
 +CONFIG_TPL_PCI=y
 +CONFIG_TPL_PCH_SUPPORT=y
 +CONFIG_HUSH_PARSER=y
 +CONFIG_CMD_CPU=y
 +# CONFIG_CMD_FLASH is not set
 +CONFIG_CMD_GPIO=y
 +CONFIG_CMD_I2C=y
 +CONFIG_CMD_PART=y
 +CONFIG_CMD_SATA=y
 +CONFIG_CMD_SF=y
 +CONFIG_CMD_SPI=y
 +CONFIG_CMD_USB=y
 +# CONFIG_CMD_SETEXPR is not set
 +CONFIG_CMD_TIME=y
 +CONFIG_CMD_SOUND=y
 +CONFIG_CMD_BOOTSTAGE=y
 +CONFIG_CMD_TPM=y
 +CONFIG_CMD_TPM_TEST=y
 +CONFIG_CMD_EXT2=y
 +CONFIG_CMD_EXT4=y
 +CONFIG_CMD_EXT4_WRITE=y
 +CONFIG_CMD_FAT=y
 +CONFIG_CMD_FS_GENERIC=y
 +CONFIG_MAC_PARTITION=y
 +# CONFIG_SPL_MAC_PARTITION is not set
 +# CONFIG_SPL_DOS_PARTITION is not set
 +CONFIG_ISO_PARTITION=y
 +CONFIG_EFI_PARTITION=y
 +# CONFIG_SPL_EFI_PARTITION is not set
 +CONFIG_DEFAULT_DEVICE_TREE="chromebook_samus"
 +# CONFIG_NET is not set
 +CONFIG_REGMAP=y
 +CONFIG_SYSCON=y
 +CONFIG_CPU=y
 +CONFIG_DM_I2C=y
 +CONFIG_SYS_I2C_DW=y
 +CONFIG_TPL_MISC=y
 +CONFIG_CROS_EC=y
 +CONFIG_CROS_EC_LPC=y
 +CONFIG_SYS_NS16550=y
 +CONFIG_SOUND=y
 +CONFIG_SOUND_I8254=y
 +CONFIG_SOUND_RT5677=y
 +CONFIG_SPI=y
++CONFIG_TPL_SYSRESET=y
 +CONFIG_TPM_TIS_LPC=y
 +CONFIG_USB_STORAGE=y
 +CONFIG_USB_KEYBOARD=y
 +CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
 +CONFIG_FRAMEBUFFER_VESA_MODE_11A=y
 +CONFIG_CONSOLE_SCROLL_LINES=5
 +CONFIG_TPM=y