From: Atish Patra <atish.patra@wdc.com>
Date: Mon, 25 Feb 2019 08:15:08 +0000 (+0000)
Subject: drivers: serial_sifive: Skip baudrate config if no input clock
X-Git-Tag: v2019.04-rc3~9^2~4
X-Git-Url: https://git.librecmc.org/?a=commitdiff_plain;h=ee0633ef8b027960bd53ab62abb6f6fc25b1c66b;p=oweals%2Fu-boot.git

drivers: serial_sifive: Skip baudrate config if no input clock

It is possible that input clock is not available because clk
device was not available and 'clock-frequency' DT property is
also not available.

In this case, instead of failing we should just skip baudrate
config by returning zero.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
---

diff --git a/drivers/serial/serial_sifive.c b/drivers/serial/serial_sifive.c
index ea4d35d48c..537bc7a975 100644
--- a/drivers/serial/serial_sifive.c
+++ b/drivers/serial/serial_sifive.c
@@ -99,27 +99,27 @@ static int _sifive_serial_getc(struct uart_sifive *regs)
 
 static int sifive_serial_setbrg(struct udevice *dev, int baudrate)
 {
-	int err;
+	int ret;
 	struct clk clk;
 	struct sifive_uart_platdata *platdata = dev_get_platdata(dev);
+	u32 clock = 0;
 
-	err = clk_get_by_index(dev, 0, &clk);
-	if (!err) {
-		err = clk_get_rate(&clk);
-		if (!IS_ERR_VALUE(err))
-			platdata->clock = err;
-	} else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) {
+	ret = clk_get_by_index(dev, 0, &clk);
+	if (IS_ERR_VALUE(ret)) {
 		debug("SiFive UART failed to get clock\n");
-		return err;
-	}
-
-	if (!platdata->clock)
-		platdata->clock = dev_read_u32_default(dev, "clock-frequency", 0);
-	if (!platdata->clock) {
-		debug("SiFive UART clock not defined\n");
-		return -EINVAL;
+		ret = dev_read_u32(dev, "clock-frequency", &clock);
+		if (IS_ERR_VALUE(ret)) {
+			debug("SiFive UART clock not defined\n");
+			return 0;
+		}
+	} else {
+		clock = clk_get_rate(&clk);
+		if (IS_ERR_VALUE(clock)) {
+			debug("SiFive UART clock get rate failed\n");
+			return 0;
+		}
 	}
-
+	platdata->clock = clock;
 	_sifive_serial_setbrg(platdata->regs, platdata->clock, baudrate);
 
 	return 0;