From: Neil Armstrong Date: Wed, 18 Oct 2017 08:02:11 +0000 (+0200) Subject: arm: meson: Add supplementary ethernet registers definitions X-Git-Tag: v2018.01-rc1~110 X-Git-Url: https://git.librecmc.org/?a=commitdiff_plain;h=ea990816fe96c86d3acb9aaa38776c10de2fb4b0;p=oweals%2Fu-boot.git arm: meson: Add supplementary ethernet registers definitions On Amlogic Meson GXL/GXM, supplementary ethernet configuration registers were added to configure the internal RMII PHY interface. Signed-off-by: Neil Armstrong --- diff --git a/arch/arm/include/asm/arch-meson/gxbb.h b/arch/arm/include/asm/arch-meson/gxbb.h index ce41349792..74d5290340 100644 --- a/arch/arm/include/asm/arch-meson/gxbb.h +++ b/arch/arm/include/asm/arch-meson/gxbb.h @@ -22,11 +22,14 @@ #define GXBB_ETH_REG_0 GXBB_PERIPHS_ADDR(0x50) #define GXBB_ETH_REG_1 GXBB_PERIPHS_ADDR(0x51) +#define GXBB_ETH_REG_2 GXBB_PERIPHS_ADDR(0x56) +#define GXBB_ETH_REG_3 GXBB_PERIPHS_ADDR(0x57) #define GXBB_ETH_REG_0_PHY_INTF BIT(0) #define GXBB_ETH_REG_0_TX_PHASE(x) (((x) & 3) << 5) #define GXBB_ETH_REG_0_TX_RATIO(x) (((x) & 7) << 7) #define GXBB_ETH_REG_0_PHY_CLK_EN BIT(10) +#define GXBB_ETH_REG_0_INVERT_RMII_CLK BIT(11) #define GXBB_ETH_REG_0_CLK_EN BIT(12) /* HIU registers */