From: Weijie Gao <weijie.gao@mediatek.com>
Date: Wed, 10 Jul 2019 09:35:42 +0000 (+0800)
Subject: arm: mediatek: add missing arch timer configuration for MT7629
X-Git-Tag: v2019.10-rc1~24^2~8
X-Git-Url: https://git.librecmc.org/?a=commitdiff_plain;h=ea804eb340906c7e3434310de3fa647e747d4eeb;p=oweals%2Fu-boot.git

arm: mediatek: add missing arch timer configuration for MT7629

This patch sets CNTVOFF of ARM CP15 timer to zero to make sure the virtual
counter is fully usable for linux kernel.

Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---

diff --git a/arch/arm/mach-mediatek/mt7629/lowlevel_init.S b/arch/arm/mach-mediatek/mt7629/lowlevel_init.S
index 3375796b79..0a0672cbea 100644
--- a/arch/arm/mach-mediatek/mt7629/lowlevel_init.S
+++ b/arch/arm/mach-mediatek/mt7629/lowlevel_init.S
@@ -4,6 +4,7 @@
  */
 
 #include <linux/linkage.h>
+#include <asm/proc-armv/ptrace.h>
 
 #define WAIT_CODE_SRAM_BASE	0x0010ff00
 
@@ -27,6 +28,18 @@ ENTRY(lowlevel_init)
 	movt	r0, #0x131
 	mcr	p15, 0, r0, c14, c0, 0
 
+	cps	#MON_MODE
+	mrc	p15, 0, r1, c1, c1, 0	@ Get Secure Config
+	orr	r0, r1, #1
+	mcr	p15, 0, r0, c1, c1, 0	@ Set Non Secure bit
+	isb
+	mov	r0, #0
+	mcrr	p15, 4, r0, r0, c14	@ CNTVOFF = 0
+	isb
+	mcr	p15, 0, r1, c1, c1, 0	@ Set Secure bit
+	isb
+	cps	#SVC_MODE
+
 	/* enable SMP bit */
 	mrc	p15, 0, r0, c1, c0, 1
 	orr	r0, r0, #0x40