From: Stefan Mavrodiev <stefan@olimex.com>
Date: Wed, 31 Jul 2019 13:15:52 +0000 (+0300)
Subject: sunxi: Fix pll1 clock calculation
X-Git-Tag: v2020.01-rc1~3^2~2
X-Git-Url: https://git.librecmc.org/?a=commitdiff_plain;h=e6467df1eb3acc238c14a712c46c41bd5c9b1e52;p=oweals%2Fu-boot.git

sunxi: Fix pll1 clock calculation

clock_sun6i.c is used for sun6i, sun8i and sun50i SoC families.
PLL1 clock sets the default system clock, defined as:
  sun6i: 1008000000
  sun8i: 1008000000
  sun50i: 816000000

With the current calculation, m = 2 and k = 3. Solving for n,
this results 28. Solving back:
  (24MHz * 28 * 3) / 2 = 1008MHz

However if the requested clock is 816, n is 22.66 rounded
to 22, which results:
  (24MHz * 28 * 3) / 2 = 792MHz

Changing k to 4 satisfies both system clocks:
  (24E6 * 21 * 4) / 2 = 1008MHz
  (24E6 * 17 * 4) / 2 = 816MHz

Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
---

diff --git a/arch/arm/mach-sunxi/clock_sun6i.c b/arch/arm/mach-sunxi/clock_sun6i.c
index 1628f3a7b6..6ca38f73d9 100644
--- a/arch/arm/mach-sunxi/clock_sun6i.c
+++ b/arch/arm/mach-sunxi/clock_sun6i.c
@@ -118,7 +118,7 @@ void clock_set_pll1(unsigned int clk)
 	if (clk > 1152000000) {
 		k = 2;
 	} else if (clk > 768000000) {
-		k = 3;
+		k = 4;
 		m = 2;
 	}