From: Felix Fietkau <nbd@openwrt.org>
Date: Thu, 20 Aug 2009 15:09:03 +0000 (+0000)
Subject: mac80211: fix ath5k dma size workaround for ar71xx Atheros legacy hardware does not... 
X-Git-Tag: reboot~22622
X-Git-Url: https://git.librecmc.org/?a=commitdiff_plain;h=d5a641bcdf1f38b15ca5c6af886c929e9533beed;p=oweals%2Fopenwrt.git

mac80211: fix ath5k dma size workaround for ar71xx Atheros legacy hardware does not perform well on ar71xx unless both TXCFG and RXCFG are forced to 4 bytes. The previous patch only changed RXCFG. The OpenWrt Madwifi HAL also sets both RXCFG and TXCFG

SVN-Revision: 17328
---

diff --git a/package/mac80211/patches/201-ath5k-WAR-for-AR71xx-PCI-bug.patch b/package/mac80211/patches/201-ath5k-WAR-for-AR71xx-PCI-bug.patch
index b72c5bd82d..9223f4fc5d 100644
--- a/package/mac80211/patches/201-ath5k-WAR-for-AR71xx-PCI-bug.patch
+++ b/package/mac80211/patches/201-ath5k-WAR-for-AR71xx-PCI-bug.patch
@@ -1,14 +1,18 @@
 --- a/drivers/net/wireless/ath/ath5k/reset.c
 +++ b/drivers/net/wireless/ath/ath5k/reset.c
-@@ -1370,8 +1370,14 @@ int ath5k_hw_reset(struct ath5k_hw *ah, 
+@@ -1368,10 +1368,18 @@ int ath5k_hw_reset(struct ath5k_hw *ah, 
+ 	 * guess we can tweak it and see how it goes ;-)
+ 	 */
  	if (ah->ah_version != AR5K_AR5210) {
++#ifndef CONFIG_ATHEROS_AR71XX
  		AR5K_REG_WRITE_BITS(ah, AR5K_TXCFG,
  			AR5K_TXCFG_SDMAMR, AR5K_DMASIZE_128B);
-+#ifndef CONFIG_ATHEROS_AR71XX
  		AR5K_REG_WRITE_BITS(ah, AR5K_RXCFG,
  			AR5K_RXCFG_SDMAMW, AR5K_DMASIZE_128B);
 +#else
 +		/* WAR for AR71xx PCI bug */
++		AR5K_REG_WRITE_BITS(ah, AR5K_TXCFG,
++			AR5K_TXCFG_SDMAMR, AR5K_DMASIZE_4B);
 +		AR5K_REG_WRITE_BITS(ah, AR5K_RXCFG,
 +			AR5K_RXCFG_SDMAMW, AR5K_DMASIZE_4B);
 +#endif
@@ -17,14 +21,16 @@
  	/* Pre-enable interrupts on 5211/5212*/
 --- a/drivers/net/wireless/ath/ath5k/initvals.c
 +++ b/drivers/net/wireless/ath/ath5k/initvals.c
-@@ -59,7 +59,12 @@ static const struct ath5k_ini ar5210_ini
+@@ -58,8 +58,14 @@ static const struct ath5k_ini ar5210_ini
+ 	{ AR5K_IMR,		0 },
  	{ AR5K_IER,		AR5K_IER_DISABLE },
  	{ AR5K_BSR,		0, AR5K_INI_READ },
- 	{ AR5K_TXCFG,		AR5K_DMASIZE_128B },
 +#ifndef CONFIG_ATHEROS_AR71XX
+ 	{ AR5K_TXCFG,		AR5K_DMASIZE_128B },
  	{ AR5K_RXCFG,		AR5K_DMASIZE_128B },
 +#else
 +	/* WAR for AR71xx PCI bug */
++	{ AR5K_TXCFG,		AR5K_DMASIZE_4B },
 +	{ AR5K_RXCFG,		AR5K_DMASIZE_4B },
 +#endif
  	{ AR5K_CFG,		AR5K_INIT_CFG },