From: Bin Meng Date: Thu, 26 Nov 2015 01:46:08 +0000 (-0800) Subject: x86: Remove CPU_INTEL_SOCKET_RPGA989 X-Git-Tag: v2016.01-rc3~40 X-Git-Url: https://git.librecmc.org/?a=commitdiff_plain;h=d475d59020af32bd5b55ca48a5bc73213e53a7c8;p=oweals%2Fu-boot.git x86: Remove CPU_INTEL_SOCKET_RPGA989 This Kconfig option name indicates it has something to do with cpu socket, however it is actually not the case. Remove it and move options inside it to NORTHBRIDGE_INTEL_IVYBRIDGE. Signed-off-by: Bin Meng Acked-by: Simon Glass Tested-by: Simon Glass --- diff --git a/arch/x86/cpu/ivybridge/Kconfig b/arch/x86/cpu/ivybridge/Kconfig index 09703822d9..56abd8fae3 100644 --- a/arch/x86/cpu/ivybridge/Kconfig +++ b/arch/x86/cpu/ivybridge/Kconfig @@ -11,6 +11,10 @@ config NORTHBRIDGE_INTEL_IVYBRIDGE if NORTHBRIDGE_INTEL_IVYBRIDGE +config CACHE_MRC_BIN + bool + default n + config CACHE_MRC_SIZE_KB int default 512 @@ -69,14 +73,3 @@ config ENABLE_VMX slowly. endif - -config CPU_INTEL_SOCKET_RPGA989 - bool - -if CPU_INTEL_SOCKET_RPGA989 - -config CACHE_MRC_BIN - bool - default n - -endif diff --git a/board/google/chromebook_link/Kconfig b/board/google/chromebook_link/Kconfig index 3843517f24..ce976db8b0 100644 --- a/board/google/chromebook_link/Kconfig +++ b/board/google/chromebook_link/Kconfig @@ -18,7 +18,6 @@ config SYS_TEXT_BASE config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select X86_RESET_VECTOR - select CPU_INTEL_SOCKET_RPGA989 select NORTHBRIDGE_INTEL_IVYBRIDGE select HAVE_ACPI_RESUME select BOARD_ROMSIZE_KB_8192 diff --git a/board/google/chromebox_panther/Kconfig b/board/google/chromebox_panther/Kconfig index 88afff3443..c1cf89cbeb 100644 --- a/board/google/chromebox_panther/Kconfig +++ b/board/google/chromebox_panther/Kconfig @@ -19,7 +19,6 @@ config SYS_TEXT_BASE config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select X86_RESET_VECTOR - select CPU_INTEL_SOCKET_RPGA989 select NORTHBRIDGE_INTEL_IVYBRIDGE select HAVE_ACPI_RESUME select BOARD_ROMSIZE_KB_8192