From: Piotr Dymacz <pepe2k@gmail.com>
Date: Sun, 20 Mar 2016 21:22:45 +0000 (+0100)
Subject: Reset also DDR controller in AR9331 during first boot
X-Git-Url: https://git.librecmc.org/?a=commitdiff_plain;h=d450805d2ccc247afb55b21ce3e2478722512172;p=oweals%2Fu-boot_mod.git

Reset also DDR controller in AR9331 during first boot
---

diff --git a/u-boot/cpu/mips/ar7240/qca_gpio_init.S b/u-boot/cpu/mips/ar7240/qca_gpio_init.S
index 9009928..41af006 100644
--- a/u-boot/cpu/mips/ar7240/qca_gpio_init.S
+++ b/u-boot/cpu/mips/ar7240/qca_gpio_init.S
@@ -467,9 +467,13 @@ first_boot:
 full_reset:
 	li t8, QCA_RST_RESET_REG
 	lw t9, 0(t8)
-	or t9, t9, QCA_RST_RESET_FULL_CHIP_RST_MASK
+	or t9, t9, (QCA_RST_RESET_FULL_CHIP_RST_MASK | \
+				QCA_RST_RESET_DDR_RST_MASK)
 	sw t9, 0(t8)
 	nop
+	nop
+	nop
+	nop
 
 	/*
 	 * GPIO configuration, using GPIO_FUNCTION_1 register: