From: Masahiro Yamada Date: Sun, 13 Aug 2017 00:01:15 +0000 (+0900) Subject: Revert "ARM: uniphier: fix ROM boot mode for PH1-sLD3" X-Git-Tag: v2017.09-rc3~52^2~2 X-Git-Url: https://git.librecmc.org/?a=commitdiff_plain;h=c5161eee3831a1909675f2a97e66aa0565eac641;p=oweals%2Fu-boot.git Revert "ARM: uniphier: fix ROM boot mode for PH1-sLD3" This reverts commit 82d075e79fa509ffb8ecd8dd2dc216929d6e8289. Commit 82d075e79fa5 ("ARM: uniphier: fix ROM boot mode for PH1-sLD3") was a workaround for sLD3. Now the sLD3 SoC support has been removed. Revert it to allow to simplify the init code. Signed-off-by: Masahiro Yamada --- diff --git a/arch/arm/mach-uniphier/arm32/lowlevel_init.S b/arch/arm/mach-uniphier/arm32/lowlevel_init.S index 3c7c650279..a399a169a9 100644 --- a/arch/arm/mach-uniphier/arm32/lowlevel_init.S +++ b/arch/arm/mach-uniphier/arm32/lowlevel_init.S @@ -98,11 +98,6 @@ ENDPROC(enable_mmu) ENTRY(setup_init_ram) ldr r1, = SSCO_BASE - mrc p15, 0, r0, c2, c0, 0 @ TTBR0 - ldr r0, [r0, #0x400] @ entry for virtual address 0x100***** - bfc r0, #0, #20 - cmp r0, #0x50000000 @ is sLD3 page table? - biceq r1, r1, #0xc0000000 @ sLD3 ROM maps 0x5******* to 0x1******* /* Touch to zero for the boot way */ 0: ldr r0, = 0x00408006 @ touch to zero with address range