From: Kever Yang Date: Fri, 23 Jun 2017 09:17:54 +0000 (+0800) Subject: rockchip: add evb_rk3229 board X-Git-Tag: v2017.09-rc1~215^2~29 X-Git-Url: https://git.librecmc.org/?a=commitdiff_plain;h=b24a8ec15c926337763871f95baa6b6b019c97b6;p=oweals%2Fu-boot.git rockchip: add evb_rk3229 board evb_rk3229 is a RK3229 based board, with: - 8GB eMMC; - 1GB DDR SDRAM; - 2 USB2.0 HOST port; - 1 MAC port; - 1 HDMI port; - IR; - WiFi; Signed-off-by: Kever Yang Reviewed-by: Philipp Tomsich --- diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 33bd17f372..bb44c61566 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -124,6 +124,7 @@ config SPL_MMC_SUPPORT source "arch/arm/mach-rockchip/rk3036/Kconfig" source "arch/arm/mach-rockchip/rk3188/Kconfig" +source "arch/arm/mach-rockchip/rk322x/Kconfig" source "arch/arm/mach-rockchip/rk3288/Kconfig" source "arch/arm/mach-rockchip/rk3328/Kconfig" source "arch/arm/mach-rockchip/rk3368/Kconfig" diff --git a/board/rockchip/evb_rk3229/Kconfig b/board/rockchip/evb_rk3229/Kconfig new file mode 100644 index 0000000000..361dcb1860 --- /dev/null +++ b/board/rockchip/evb_rk3229/Kconfig @@ -0,0 +1,15 @@ +if TARGET_EVB_RK3229 + +config SYS_BOARD + default "evb_rk3229" + +config SYS_VENDOR + default "rockchip" + +config SYS_CONFIG_NAME + default "evb_rk3229" + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + +endif diff --git a/board/rockchip/evb_rk3229/MAINTAINERS b/board/rockchip/evb_rk3229/MAINTAINERS new file mode 100644 index 0000000000..dfa1090c3e --- /dev/null +++ b/board/rockchip/evb_rk3229/MAINTAINERS @@ -0,0 +1,6 @@ +EVB-RK3229 +M: Kever Yang +S: Maintained +F: board/rockchip/evb_rk3229 +F: include/configs/evb_rk3229.h +F: configs/evb-rk3229_defconfig diff --git a/board/rockchip/evb_rk3229/Makefile b/board/rockchip/evb_rk3229/Makefile new file mode 100644 index 0000000000..65dcd8be35 --- /dev/null +++ b/board/rockchip/evb_rk3229/Makefile @@ -0,0 +1,7 @@ +# +# (C) Copyright 2015 Google, Inc +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += evb_rk3229.o diff --git a/board/rockchip/evb_rk3229/evb_rk3229.c b/board/rockchip/evb_rk3229/evb_rk3229.c new file mode 100644 index 0000000000..a9a3a40ce8 --- /dev/null +++ b/board/rockchip/evb_rk3229/evb_rk3229.c @@ -0,0 +1,12 @@ +/* + * (C) Copyright 2017 Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig new file mode 100644 index 0000000000..0c3b6f780a --- /dev/null +++ b/configs/evb-rk3229_defconfig @@ -0,0 +1,44 @@ +CONFIG_ARM=y +CONFIG_ARCH_ROCKCHIP=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MALLOC_F_LEN=0x800 +CONFIG_ROCKCHIP_RK322X=y +CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y +CONFIG_TARGET_EVB_RK3229=y +CONFIG_SPL_STACK_R_ADDR=0x80000 +CONFIG_DEFAULT_DEVICE_TREE="rk3229-evb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200 +CONFIG_FASTBOOT=y +# CONFIG_CMD_IMLS is not set +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TIME=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_REGMAP=y +CONFIG_SPL_REGMAP=y +CONFIG_SYSCON=y +CONFIG_SPL_SYSCON=y +CONFIG_CLK=y +CONFIG_SPL_CLK=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_ROCKCHIP_RK322X=y +# CONFIG_SPL_PINCTRL_FULL is not set +CONFIG_RAM=y +CONFIG_SPL_RAM=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART=y +CONFIG_DEBUG_UART_BASE=0x11030000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550=y +CONFIG_SYSRESET=y +CONFIG_ERRNO_STR=y diff --git a/include/configs/evb_rk3229.h b/include/configs/evb_rk3229.h new file mode 100644 index 0000000000..8f8e50fb60 --- /dev/null +++ b/include/configs/evb_rk3229.h @@ -0,0 +1,60 @@ +/* + * (C) Copyright 2017 Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include + + +/* Store env in emmc */ +#undef CONFIG_ENV_SIZE +#define CONFIG_ENV_SIZE (32 << 10) +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_SYS_MMC_ENV_PART 0 +#define CONFIG_SYS_REDUNDAND_ENVIRONMENT + +#ifndef CONFIG_SPL_BUILD +/* Enable gpt partition table */ +#undef PARTS_DEFAULT +#define PARTS_DEFAULT \ + "uuid_disk=${uuid_gpt_disk};" \ + "name=loader_a,start=4M,size=4M,uuid=${uuid_gpt_loader};" \ + "name=loader_b,size=4M,uuid=${uuid_gpt_reserved};" \ + "name=trust_a,size=4M,uuid=${uuid_gpt_reserved};" \ + "name=trust_b,size=4M,uuid=${uuid_gpt_reserved};" \ + "name=misc,size=4M,uuid=${uuid_gpt_misc};" \ + "name=metadata,size=16M,uuid=${uuid_gpt_metadata};" \ + "name=boot_a,size=32M,uuid=${uuid_gpt_boot_a};" \ + "name=boot_b,size=32M,uuid=${uuid_gpt_boot_b};" \ + "name=system_a,size=818M,uuid=${uuid_gpt_system_a};" \ + "name=system_b,size=818M,uuid=${uuid_gpt_system_b};" \ + "name=vendor_a,size=50M,uuid=${uuid_gpt_vendor_a};" \ + "name=vendor_b,size=50M,uuid=${uuid_gpt_vendor_b};" \ + "name=cache,size=100M,uuid=${uuid_gpt_cache};" \ + "name=persist,size=4M,uuid=${uuid_gpt_persist};" \ + "name=userdata,size=-,uuid=${uuid_gpt_userdata};\0" \ + +#define CONFIG_PREBOOT + +#define CONFIG_ANDROID_BOOT_IMAGE +#define CONFIG_SYS_BOOT_RAMDISK_HIGH + +#undef CONFIG_BOOTCOMMAND +#define CONFIG_BOOTCOMMAND \ + "mmc read 0x61000000 0x8000 0x5000;" \ + "bootm 0x61000000" \ + +/* Enable atags */ +#define CONFIG_SYS_BOOTPARAMS_LEN (64*1024) +#define CONFIG_INITRD_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_CMDLINE_TAG + +#endif + +#endif