From: Prabhakar Kushwaha Date: Tue, 18 Dec 2012 00:15:45 +0000 (+0000) Subject: board/T4240qds:Fix TLB and LAW size of NAND flash X-Git-Tag: v2013.04-rc1~166 X-Git-Url: https://git.librecmc.org/?a=commitdiff_plain;h=ac13eb5de0e465b1bfddab2cdb3a902f583043e8;p=oweals%2Fu-boot.git board/T4240qds:Fix TLB and LAW size of NAND flash The internal SRAM of Freescale's IFC NAND machine is of 64K and controller's Address Mask Registers is initialised with the same. So Update TLB and LAW size of NAND flash accordingly. Signed-off-by: Prabhakar Kushwaha Signed-off-by: Andy Fleming --- diff --git a/board/freescale/t4qds/law.c b/board/freescale/t4qds/law.c index 5debcf612a..6f2c5c86b4 100644 --- a/board/freescale/t4qds/law.c +++ b/board/freescale/t4qds/law.c @@ -40,7 +40,7 @@ struct law_entry law_table[] = { SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_4M, LAW_TRGT_IF_DCSR), #endif #ifdef CONFIG_SYS_NAND_BASE_PHYS - SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_IFC), + SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_IFC), #endif }; diff --git a/board/freescale/t4qds/tlb.c b/board/freescale/t4qds/tlb.c index 078a6e415c..80eb511e1d 100644 --- a/board/freescale/t4qds/tlb.c +++ b/board/freescale/t4qds/tlb.c @@ -125,7 +125,7 @@ struct fsl_e_tlb_entry tlb_table[] = { */ SET_TLB_ENTRY(1, CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_BASE_PHYS, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, - 0, 16, BOOKE_PAGESZ_1M, 1), + 0, 16, BOOKE_PAGESZ_64K, 1), #endif SET_TLB_ENTRY(1, QIXIS_BASE, QIXIS_BASE_PHYS, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,