From: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Date: Tue, 13 Nov 2012 09:57:48 +0000 (+0000)
Subject: ehci-mxc: Make i.MX25 EHCI configurable
X-Git-Tag: v2013.01-rc3~9^2~3^2~22
X-Git-Url: https://git.librecmc.org/?a=commitdiff_plain;h=9fa3d093d626b25c64c695e29d381dd2ae7bf8cc;p=oweals%2Fu-boot.git

ehci-mxc: Make i.MX25 EHCI configurable

Use EHCI MXC configuration options for i.MX25.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matthias Weisser <weisserm@arcor.de>
---

diff --git a/drivers/usb/host/ehci-mxc.c b/drivers/usb/host/ehci-mxc.c
index e21f2c54ac..846aa3b7c9 100644
--- a/drivers/usb/host/ehci-mxc.c
+++ b/drivers/usb/host/ehci-mxc.c
@@ -28,10 +28,21 @@
 
 #define USBCTRL_OTGBASE_OFFSET	0x600
 
-#define MX25_USB_CTRL_IP_PUE_DOWN_BIT	(1<<6)
-#define MX25_USB_CTRL_HSTD_BIT		(1<<5)
-#define MX25_USB_CTRL_USBTE_BIT		(1<<4)
-#define MX25_USB_CTRL_OCPOL_OTG_BIT	(1<<3)
+#define MX25_OTG_SIC_SHIFT	29
+#define MX25_OTG_SIC_MASK	(0x3 << MX25_OTG_SIC_SHIFT)
+#define MX25_OTG_PM_BIT		(1 << 24)
+#define MX25_OTG_PP_BIT		(1 << 11)
+#define MX25_OTG_OCPOL_BIT	(1 << 3)
+
+#define MX25_H1_SIC_SHIFT	21
+#define MX25_H1_SIC_MASK	(0x3 << MX25_H1_SIC_SHIFT)
+#define MX25_H1_PP_BIT		(1 << 18)
+#define MX25_H1_PM_BIT		(1 << 8)
+#define MX25_H1_IPPUE_UP_BIT	(1 << 7)
+#define MX25_H1_IPPUE_DOWN_BIT	(1 << 6)
+#define MX25_H1_TLL_BIT		(1 << 5)
+#define MX25_H1_USBTE_BIT	(1 << 4)
+#define MX25_H1_OCPOL_BIT	(1 << 2)
 
 #define MX31_OTG_SIC_SHIFT	29
 #define MX31_OTG_SIC_MASK	(0x3 << MX31_OTG_SIC_SHIFT)
@@ -51,12 +62,57 @@ static int mxc_set_usbcontrol(int port, unsigned int flags)
 {
 	unsigned int v;
 
-#if defined(CONFIG_MX25)
-	v = MX25_USB_CTRL_IP_PUE_DOWN_BIT | MX25_USB_CTRL_HSTD_BIT |
-		MX25_USB_CTRL_USBTE_BIT | MX25_USB_CTRL_OCPOL_OTG_BIT;
-#elif defined(CONFIG_MX31)
 	v = readl(IMX_USB_BASE + USBCTRL_OTGBASE_OFFSET);
+#if defined(CONFIG_MX25)
+	switch (port) {
+	case 0:	/* OTG port */
+		v &= ~(MX25_OTG_SIC_MASK | MX25_OTG_PM_BIT | MX25_OTG_PP_BIT |
+				MX25_OTG_OCPOL_BIT);
+		v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX25_OTG_SIC_SHIFT;
+
+		if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
+			v |= MX25_OTG_PM_BIT;
+
+		if (flags & MXC_EHCI_PWR_PIN_ACTIVE_HIGH)
+			v |= MX25_OTG_PP_BIT;
+
+		if (!(flags & MXC_EHCI_OC_PIN_ACTIVE_LOW))
+			v |= MX25_OTG_OCPOL_BIT;
+
+		break;
+	case 1: /* H1 port */
+		v &= ~(MX25_H1_SIC_MASK | MX25_H1_PM_BIT | MX25_H1_PP_BIT |
+				MX25_H1_OCPOL_BIT | MX25_H1_TLL_BIT |
+				MX25_H1_USBTE_BIT | MX25_H1_IPPUE_DOWN_BIT |
+				MX25_H1_IPPUE_UP_BIT);
+		v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX25_H1_SIC_SHIFT;
+
+		if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
+			v |= MX25_H1_PM_BIT;
+
+		if (flags & MXC_EHCI_PWR_PIN_ACTIVE_HIGH)
+			v |= MX25_H1_PP_BIT;
+
+		if (!(flags & MXC_EHCI_OC_PIN_ACTIVE_LOW))
+			v |= MX25_H1_OCPOL_BIT;
+
+		if (!(flags & MXC_EHCI_TTL_ENABLED))
+			v |= MX25_H1_TLL_BIT;
+
+		if (flags & MXC_EHCI_INTERNAL_PHY)
+			v |= MX25_H1_USBTE_BIT;
+
+		if (flags & MXC_EHCI_IPPUE_DOWN)
+			v |= MX25_H1_IPPUE_DOWN_BIT;
 
+		if (flags & MXC_EHCI_IPPUE_UP)
+			v |= MX25_H1_IPPUE_UP_BIT;
+
+		break;
+	default:
+		return -EINVAL;
+	}
+#elif defined(CONFIG_MX31)
 	switch (port) {
 	case 0:	/* OTG port */
 		v &= ~(MX31_OTG_SIC_MASK | MX31_OTG_PM_BIT);
diff --git a/include/configs/zmx25.h b/include/configs/zmx25.h
index 447683a490..e9216d9b64 100644
--- a/include/configs/zmx25.h
+++ b/include/configs/zmx25.h
@@ -109,9 +109,9 @@
 #define CONFIG_USB_EHCI			/* Enable EHCI USB support */
 #define CONFIG_USB_EHCI_MXC
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
-#define CONFIG_MXC_USB_PORT	2
-#define CONFIG_MXC_USB_PORTSC	0xC0000000
-#define CONFIG_MXC_USB_FLAGS	0
+#define CONFIG_MXC_USB_PORT	1
+#define CONFIG_MXC_USB_PORTSC	MXC_EHCI_MODE_SERIAL
+#define CONFIG_MXC_USB_FLAGS	(MXC_EHCI_INTERNAL_PHY | MXC_EHCI_IPPUE_DOWN)
 #define CONFIG_EHCI_IS_TDI
 #define CONFIG_USB_STORAGE
 #define CONFIG_DOS_PARTITION