From: Daniel Golle Date: Sun, 10 Mar 2019 16:53:34 +0000 (+0100) Subject: oxnas: fix PCIe register ranges in device-tree X-Git-Tag: v19.07.0-rc1~1081 X-Git-Url: https://git.librecmc.org/?a=commitdiff_plain;h=8f9155fe7ac9417ed4bfdaf4256d1758987024a8;p=oweals%2Fopenwrt.git oxnas: fix PCIe register ranges in device-tree They should be relative to apb-bridge@47000000 rather than to the pcie-controller@c00000 inside it. Signed-off-by: Daniel Golle --- diff --git a/target/linux/oxnas/patches-4.14/340-oxnas-pcie.patch b/target/linux/oxnas/patches-4.14/340-oxnas-pcie.patch index 16f47d9056..2e4b5714f4 100644 --- a/target/linux/oxnas/patches-4.14/340-oxnas-pcie.patch +++ b/target/linux/oxnas/patches-4.14/340-oxnas-pcie.patch @@ -42,7 +42,7 @@ + bus-range = <0x00 0x7f>; + + /* cfg inbound translator */ -+ reg = <0x0 0x1000>, <0x100000 0x100>; ++ reg = <0xc00000 0x1000>, <0xd00000 0x100>; + + phys = <&pcie_phy>; + phy-names = "pcie-phy"; @@ -83,7 +83,7 @@ + bus-range = <0x80 0xff>; + + /* cfg inbound translator */ -+ reg = <0x0 0x1000>, <0x100000 0x100>; ++ reg = <0xe00000 0x1000>, <0xf00000 0x100>; + + phys = <&pcie_phy>; + phy-names = "pcie-phy";