From: Rich Felker <dalias@aerifal.cx>
Date: Wed, 17 Jul 2019 22:50:15 +0000 (-0400)
Subject: fix riscv64 syscall asm constraint
X-Git-Tag: v1.1.24~123
X-Git-Url: https://git.librecmc.org/?a=commitdiff_plain;h=8eb49e0485fc547eead9e47200bbee6d81f391c1;p=oweals%2Fmusl.git

fix riscv64 syscall asm constraint

having "+r"(a0) is redundant with "0"(a0) in syscalls with at least 1
arg, which is arguably a constraint violation (clang treats it as
such), and an invalid input with indeterminate value in the 0-arg
case. use the "=r"(a0) form instead.
---

diff --git a/arch/riscv64/syscall_arch.h b/arch/riscv64/syscall_arch.h
index 1aaeb631..3e0804ef 100644
--- a/arch/riscv64/syscall_arch.h
+++ b/arch/riscv64/syscall_arch.h
@@ -3,7 +3,7 @@
 
 #define __asm_syscall(...) \
 	__asm__ __volatile__ ("ecall\n\t" \
-	: "+r"(a0) : __VA_ARGS__ : "memory"); \
+	: "=r"(a0) : __VA_ARGS__ : "memory"); \
 	return a0; \
 
 static inline long __syscall0(long n)