From: Mario Six Date: Thu, 9 Aug 2018 12:51:20 +0000 (+0200) Subject: test: Add AXI test X-Git-Tag: v2018.09-rc2~35^2~3 X-Git-Url: https://git.librecmc.org/?a=commitdiff_plain;h=87940ec40708c14b83fa33e9e3d72d91a5fd2cee;p=oweals%2Fu-boot.git test: Add AXI test Add tests for the AXI uclass. Reviewed-by: Simon Glass Signed-off-by: Mario Six --- diff --git a/test/dm/Makefile b/test/dm/Makefile index d2ed96c615..564e8460bd 100644 --- a/test/dm/Makefile +++ b/test/dm/Makefile @@ -44,4 +44,5 @@ obj-$(CONFIG_DM_VIDEO) += video.o obj-$(CONFIG_ADC) += adc.o obj-$(CONFIG_SPMI) += spmi.o obj-$(CONFIG_WDT) += wdt.o +obj-$(CONFIG_AXI) += axi.o endif diff --git a/test/dm/axi.c b/test/dm/axi.c new file mode 100644 index 0000000000..e234ab82e6 --- /dev/null +++ b/test/dm/axi.c @@ -0,0 +1,77 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2018 + * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc + */ + +#include +#include +#include +#include +#include +#include + +/* Test that sandbox AXI works correctly */ +static int dm_test_axi_base(struct unit_test_state *uts) +{ + struct udevice *bus; + + ut_assertok(uclass_get_device(UCLASS_AXI, 0, &bus)); + + return 0; +} + +DM_TEST(dm_test_axi_base, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); + +/* Test that sandbox PCI bus numbering works correctly */ +static int dm_test_axi_busnum(struct unit_test_state *uts) +{ + struct udevice *bus; + + ut_assertok(uclass_get_device_by_seq(UCLASS_AXI, 0, &bus)); + + return 0; +} + +DM_TEST(dm_test_axi_busnum, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); + +/* Test that we can use the store device correctly */ +static int dm_test_axi_store(struct unit_test_state *uts) +{ + struct udevice *store; + u8 tdata1[] = {0x55, 0x66, 0x77, 0x88}; + u8 tdata2[] = {0xaa, 0xbb, 0xcc, 0xdd}; + u32 val; + u8 *data; + + /* Check that asking for the device automatically fires up AXI */ + ut_assertok(uclass_get_device(UCLASS_AXI_EMUL, 0, &store)); + ut_assert(device_active(store)); + + axi_get_store(store, &data); + + /* Test reading */ + memcpy(data, tdata1, ARRAY_SIZE(tdata1)); + axi_read(store, 0, &val, AXI_SIZE_32); + ut_asserteq(0x55667788, val); + + memcpy(data + 3, tdata2, ARRAY_SIZE(tdata2)); + axi_read(store, 3, &val, AXI_SIZE_32); + ut_asserteq(0xaabbccdd, val); + + /* Reset data store */ + memset(data, 0, 16); + + /* Test writing */ + val = 0x55667788; + axi_write(store, 0, &val, AXI_SIZE_32); + ut_asserteq(0, memcmp(data, tdata1, ARRAY_SIZE(tdata1))); + + val = 0xaabbccdd; + axi_write(store, 3, &val, AXI_SIZE_32); + ut_asserteq(0, memcmp(data + 3, tdata2, ARRAY_SIZE(tdata1))); + + return 0; +} + +DM_TEST(dm_test_axi_store, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);