From: Mike Frysinger Date: Fri, 8 Apr 2011 04:52:06 +0000 (-0400) Subject: Blackfin: use common LDSCRIPT logic X-Git-Tag: v2011.06-rc3~30 X-Git-Url: https://git.librecmc.org/?a=commitdiff_plain;h=867f54cc35aafd3179fd3b6efbeacf5978ce53b9;p=oweals%2Fu-boot.git Blackfin: use common LDSCRIPT logic Now that common code is a bit smarter when it comes to default LDSCRIPT values, rename the default Blackfin file and drop the Blackfin-specific config.mk logic. Signed-off-by: Mike Frysinger --- diff --git a/arch/blackfin/config.mk b/arch/blackfin/config.mk index f0909e95d2..71fd53fba6 100644 --- a/arch/blackfin/config.mk +++ b/arch/blackfin/config.mk @@ -76,10 +76,6 @@ LDR_FLAGS += $(LDR_FLAGS-y) # Set some default LDR flags based on boot mode. LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE)) -ifeq ($(wildcard $(TOPDIR)/board/$(BOARD)/u-boot.lds*),) -LDSCRIPT = $(obj)arch/$(ARCH)/lib/u-boot.lds.S -endif - ifneq ($(CONFIG_SYS_TEXT_BASE),) $(error do not set CONFIG_SYS_TEXT_BASE for Blackfin boards) endif diff --git a/arch/blackfin/cpu/u-boot.lds b/arch/blackfin/cpu/u-boot.lds new file mode 100644 index 0000000000..2b8d285e1f --- /dev/null +++ b/arch/blackfin/cpu/u-boot.lds @@ -0,0 +1,158 @@ +/* + * U-boot - u-boot.lds.S + * + * Copyright (c) 2005-2010 Analog Device Inc. + * + * (C) Copyright 2000-2004 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#undef ALIGN +#undef ENTRY + +#ifndef LDS_BOARD_TEXT +# define LDS_BOARD_TEXT +#endif + +/* If we don't actually load anything into L1 data, this will avoid + * a syntax error. If we do actually load something into L1 data, + * we'll get a linker memory load error (which is what we'd want). + * This is here in the first place so we can quickly test building + * for different CPU's which may lack non-cache L1 data. + */ +#ifndef L1_DATA_A_SRAM +# define L1_DATA_A_SRAM 0 +# define L1_DATA_A_SRAM_SIZE 0 +#endif +#ifndef L1_DATA_B_SRAM +# define L1_DATA_B_SRAM L1_DATA_A_SRAM +# define L1_DATA_B_SRAM_SIZE L1_DATA_A_SRAM_SIZE +#endif + +/* The 0xC offset is so we don't clobber the tiny LDR jump block. */ +#ifdef CONFIG_BFIN_BOOTROM_USES_EVT1 +# define L1_CODE_ORIGIN L1_INST_SRAM +#else +# define L1_CODE_ORIGIN L1_INST_SRAM + 0xC +#endif + +OUTPUT_ARCH(bfin) + +MEMORY +{ +#if CONFIG_MEM_SIZE + ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN +# define ram_code ram +# define ram_data ram +#else +# define ram_code l1_code +# define ram_data l1_data +#endif + l1_code : ORIGIN = L1_CODE_ORIGIN, LENGTH = L1_INST_SRAM_SIZE + l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE +} + +ENTRY(_start) +SECTIONS +{ + .text.pre : + { + arch/blackfin/cpu/start.o (.text .text.*) + + LDS_BOARD_TEXT + } >ram_code + + .text.init : + { + arch/blackfin/cpu/initcode.o (.text .text.*) + } >ram_code + __initcode_lma = LOADADDR(.text.init); + __initcode_len = SIZEOF(.text.init); + + .text : + { + *(.text .text.*) + } >ram_code + + .rodata : + { + . = ALIGN(4); + *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) + . = ALIGN(4); + } >ram_data + + .data : + { + . = ALIGN(4); + *(.data .data.*) + *(.data1) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } >ram_data + + .u_boot_cmd : + { + ___u_boot_cmd_start = .; + *(.u_boot_cmd) + ___u_boot_cmd_end = .; + } >ram_data + + .text_l1 : + { + . = ALIGN(4); + __stext_l1 = .; + *(.l1.text) + . = ALIGN(4); + __etext_l1 = .; + } >l1_code AT>ram_code + __text_l1_lma = LOADADDR(.text_l1); + __text_l1_len = SIZEOF(.text_l1); + ASSERT (__text_l1_len <= L1_INST_SRAM_SIZE, "L1 text overflow!") + + .data_l1 : + { + . = ALIGN(4); + __sdata_l1 = .; + *(.l1.data) + *(.l1.bss) + . = ALIGN(4); + __edata_l1 = .; + } >l1_data AT>ram_data + __data_l1_lma = LOADADDR(.data_l1); + __data_l1_len = SIZEOF(.data_l1); + ASSERT (__data_l1_len <= L1_DATA_B_SRAM_SIZE, "L1 data overflow!") + + .bss : + { + . = ALIGN(4); + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss .bss.*) + *(COMMON) + . = ALIGN(4); + } >ram_data + __bss_vma = ADDR(.bss); + __bss_len = SIZEOF(.bss); +} diff --git a/arch/blackfin/lib/u-boot.lds.S b/arch/blackfin/lib/u-boot.lds.S deleted file mode 100644 index 2b8d285e1f..0000000000 --- a/arch/blackfin/lib/u-boot.lds.S +++ /dev/null @@ -1,158 +0,0 @@ -/* - * U-boot - u-boot.lds.S - * - * Copyright (c) 2005-2010 Analog Device Inc. - * - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include -#undef ALIGN -#undef ENTRY - -#ifndef LDS_BOARD_TEXT -# define LDS_BOARD_TEXT -#endif - -/* If we don't actually load anything into L1 data, this will avoid - * a syntax error. If we do actually load something into L1 data, - * we'll get a linker memory load error (which is what we'd want). - * This is here in the first place so we can quickly test building - * for different CPU's which may lack non-cache L1 data. - */ -#ifndef L1_DATA_A_SRAM -# define L1_DATA_A_SRAM 0 -# define L1_DATA_A_SRAM_SIZE 0 -#endif -#ifndef L1_DATA_B_SRAM -# define L1_DATA_B_SRAM L1_DATA_A_SRAM -# define L1_DATA_B_SRAM_SIZE L1_DATA_A_SRAM_SIZE -#endif - -/* The 0xC offset is so we don't clobber the tiny LDR jump block. */ -#ifdef CONFIG_BFIN_BOOTROM_USES_EVT1 -# define L1_CODE_ORIGIN L1_INST_SRAM -#else -# define L1_CODE_ORIGIN L1_INST_SRAM + 0xC -#endif - -OUTPUT_ARCH(bfin) - -MEMORY -{ -#if CONFIG_MEM_SIZE - ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN -# define ram_code ram -# define ram_data ram -#else -# define ram_code l1_code -# define ram_data l1_data -#endif - l1_code : ORIGIN = L1_CODE_ORIGIN, LENGTH = L1_INST_SRAM_SIZE - l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE -} - -ENTRY(_start) -SECTIONS -{ - .text.pre : - { - arch/blackfin/cpu/start.o (.text .text.*) - - LDS_BOARD_TEXT - } >ram_code - - .text.init : - { - arch/blackfin/cpu/initcode.o (.text .text.*) - } >ram_code - __initcode_lma = LOADADDR(.text.init); - __initcode_len = SIZEOF(.text.init); - - .text : - { - *(.text .text.*) - } >ram_code - - .rodata : - { - . = ALIGN(4); - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - . = ALIGN(4); - } >ram_data - - .data : - { - . = ALIGN(4); - *(.data .data.*) - *(.data1) - *(.sdata) - *(.sdata2) - *(.dynamic) - CONSTRUCTORS - } >ram_data - - .u_boot_cmd : - { - ___u_boot_cmd_start = .; - *(.u_boot_cmd) - ___u_boot_cmd_end = .; - } >ram_data - - .text_l1 : - { - . = ALIGN(4); - __stext_l1 = .; - *(.l1.text) - . = ALIGN(4); - __etext_l1 = .; - } >l1_code AT>ram_code - __text_l1_lma = LOADADDR(.text_l1); - __text_l1_len = SIZEOF(.text_l1); - ASSERT (__text_l1_len <= L1_INST_SRAM_SIZE, "L1 text overflow!") - - .data_l1 : - { - . = ALIGN(4); - __sdata_l1 = .; - *(.l1.data) - *(.l1.bss) - . = ALIGN(4); - __edata_l1 = .; - } >l1_data AT>ram_data - __data_l1_lma = LOADADDR(.data_l1); - __data_l1_len = SIZEOF(.data_l1); - ASSERT (__data_l1_len <= L1_DATA_B_SRAM_SIZE, "L1 data overflow!") - - .bss : - { - . = ALIGN(4); - *(.sbss) *(.scommon) - *(.dynbss) - *(.bss .bss.*) - *(COMMON) - . = ALIGN(4); - } >ram_data - __bss_vma = ADDR(.bss); - __bss_len = SIZEOF(.bss); -}