From: Rich Felker <dalias@aerifal.cx>
Date: Fri, 10 Oct 2014 22:17:09 +0000 (-0400)
Subject: add explicit barrier operation to internal atomic.h API
X-Git-Tag: v1.1.5~5
X-Git-Url: https://git.librecmc.org/?a=commitdiff_plain;h=867b1822f30a76cb9c8342da29eb28ed75908fa9;p=oweals%2Fmusl.git

add explicit barrier operation to internal atomic.h API
---

diff --git a/arch/arm/atomic.h b/arch/arm/atomic.h
index 738f528c..8665c874 100644
--- a/arch/arm/atomic.h
+++ b/arch/arm/atomic.h
@@ -101,7 +101,9 @@ static inline void a_store(volatile int *p, int x)
 	while (__k_cas(*p, x, p));
 }
 
-static inline void a_spin()
+#define a_spin a_barrier
+
+static inline void a_barrier()
 {
 	__k_cas(0, 0, &(int){0});
 }
diff --git a/arch/i386/atomic.h b/arch/i386/atomic.h
index 8a2a1234..4fe7bded 100644
--- a/arch/i386/atomic.h
+++ b/arch/i386/atomic.h
@@ -96,6 +96,11 @@ static inline void a_spin()
 	__asm__ __volatile__( "pause" : : : "memory" );
 }
 
+static inline void a_barrier()
+{
+	__asm__ __volatile__( "" : : : "memory" );
+}
+
 static inline void a_crash()
 {
 	__asm__ __volatile__( "hlt" : : : "memory" );
diff --git a/arch/microblaze/atomic.h b/arch/microblaze/atomic.h
index abb79b53..93404b94 100644
--- a/arch/microblaze/atomic.h
+++ b/arch/microblaze/atomic.h
@@ -95,7 +95,9 @@ static inline void a_store(volatile int *p, int x)
 		: "=m"(*p) : "r"(x) : "memory" );
 }
 
-static inline void a_spin()
+#define a_spin a_barrier
+
+static inline void a_barrier()
 {
 	a_cas(&(int){0}, 0, 0);
 }
diff --git a/arch/mips/atomic.h b/arch/mips/atomic.h
index cc5bf498..c82046a8 100644
--- a/arch/mips/atomic.h
+++ b/arch/mips/atomic.h
@@ -135,7 +135,9 @@ static inline void a_store(volatile int *p, int x)
 		: "+m"(*p) : "r"(x) : "memory" );
 }
 
-static inline void a_spin()
+#define a_spin a_barrier
+
+static inline void a_barrier()
 {
 	a_cas(&(int){0}, 0, 0);
 }
diff --git a/arch/or1k/atomic.h b/arch/or1k/atomic.h
index f9e69815..640ff430 100644
--- a/arch/or1k/atomic.h
+++ b/arch/or1k/atomic.h
@@ -72,7 +72,9 @@ static inline void a_store(volatile int *p, int x)
 	a_swap(p, x);
 }
 
-static inline void a_spin()
+#define a_spin a_barrier
+
+static inline void a_barrier()
 {
 	a_cas(&(int){0}, 0, 0);
 }
diff --git a/arch/powerpc/atomic.h b/arch/powerpc/atomic.h
index 1c50361e..f706543a 100644
--- a/arch/powerpc/atomic.h
+++ b/arch/powerpc/atomic.h
@@ -78,7 +78,9 @@ static inline void a_store(volatile int *p, int x)
 		: "=m"(*p) : "r"(x) : "memory" );
 }
 
-static inline void a_spin()
+#define a_spin a_barrier
+
+static inline void a_barrier()
 {
 	a_cas(&(int){0}, 0, 0);
 }
diff --git a/arch/sh/atomic.h b/arch/sh/atomic.h
index b95bbffc..a1d22e4a 100644
--- a/arch/sh/atomic.h
+++ b/arch/sh/atomic.h
@@ -51,7 +51,9 @@ static inline void a_dec(volatile int *x)
 	a_fetch_add(x, -1);
 }
 
-static inline void a_spin()
+#define a_spin a_barrier
+
+static inline void a_barrier()
 {
 	a_cas(&(int){0}, 0, 0);
 }
diff --git a/arch/x32/atomic.h b/arch/x32/atomic.h
index ae0a576c..333098c3 100644
--- a/arch/x32/atomic.h
+++ b/arch/x32/atomic.h
@@ -91,6 +91,11 @@ static inline void a_spin()
 	__asm__ __volatile__( "pause" : : : "memory" );
 }
 
+static inline void a_barrier()
+{
+	__asm__ __volatile__( "" : : : "memory" );
+}
+
 static inline void a_crash()
 {
 	__asm__ __volatile__( "hlt" : : : "memory" );
diff --git a/arch/x86_64/atomic.h b/arch/x86_64/atomic.h
index ae0a576c..333098c3 100644
--- a/arch/x86_64/atomic.h
+++ b/arch/x86_64/atomic.h
@@ -91,6 +91,11 @@ static inline void a_spin()
 	__asm__ __volatile__( "pause" : : : "memory" );
 }
 
+static inline void a_barrier()
+{
+	__asm__ __volatile__( "" : : : "memory" );
+}
+
 static inline void a_crash()
 {
 	__asm__ __volatile__( "hlt" : : : "memory" );