From: Mike Frysinger <vapier@gentoo.org>
Date: Wed, 11 Aug 2010 21:54:00 +0000 (-0400)
Subject: usb: musb: stub out MUSB_TXCSR_MODE for Blackfin parts
X-Git-Tag: v2010.12-rc1~174^2~27^2^2~12
X-Git-Url: https://git.librecmc.org/?a=commitdiff_plain;h=70fccb3f2469f5cfd75ad17c6e452a382fbabbcf;p=oweals%2Fu-boot.git

usb: musb: stub out MUSB_TXCSR_MODE for Blackfin parts

The MUSB_TXCSR_MODE register setting isn't supported on Blackfin musb
parts, so stub it out to 0.  This matches Linux behavior.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
---

diff --git a/drivers/usb/musb/musb_core.h b/drivers/usb/musb/musb_core.h
index 4771876445..8f73876f80 100644
--- a/drivers/usb/musb/musb_core.h
+++ b/drivers/usb/musb/musb_core.h
@@ -369,6 +369,8 @@ extern void read_fifo(u8 ep, u32 length, void *fifo_data);
 # define readb(addr)     (u8)bfin_read16(addr)
 # undef  writeb
 # define writeb(b, addr) bfin_write16(addr, b)
+# undef MUSB_TXCSR_MODE /* not supported */
+# define MUSB_TXCSR_MODE 0
 /*
  * The USB PHY on current Blackfin processors is a UTMI+ level 2 PHY.
  * However, it has no ULPI support - so there are no registers at all.