From: Piotr Dymacz Date: Sat, 14 Nov 2015 14:25:56 +0000 (+0100) Subject: Add support for reading MIPS CPU type and print it during booting X-Git-Url: https://git.librecmc.org/?a=commitdiff_plain;h=6a90448acdb852c2b9e851e497c52fbbbcaae66e;p=oweals%2Fu-boot_mod.git Add support for reading MIPS CPU type and print it during booting --- diff --git a/u-boot/board/ar7240/common/common.c b/u-boot/board/ar7240/common/common.c index 326f012..1f1e2df 100644 --- a/u-boot/board/ar7240/common/common.c +++ b/u-boot/board/ar7240/common/common.c @@ -18,7 +18,7 @@ void print_board_info(void) { u32 ahb_clk, cpu_clk, ddr_clk, spi_clk, ref_clk; bd_t *bd = gd->bd; - char soc_buffer[24]; + char buffer[24]; /* Board name */ #ifdef BOARD_CUSTOM_STRING @@ -26,8 +26,12 @@ void print_board_info(void) #endif /* SOC name, version and revision */ - qca_soc_name_rev(soc_buffer); - printf("%" ALIGN_SIZE "s %s\n", "SOC:", soc_buffer); + qca_soc_name_rev(buffer); + printf("%" ALIGN_SIZE "s %s\n", "SOC:", buffer); + + /* MIPS CPU type */ + cpu_name(buffer); + printf("%" ALIGN_SIZE "s %s\n", "CPU:", buffer); /* RAM size and type */ printf("%" ALIGN_SIZE "s ", "RAM:"); diff --git a/u-boot/cpu/mips/cpu.c b/u-boot/cpu/mips/cpu.c index 9126dd6..12e16cc 100644 --- a/u-boot/cpu/mips/cpu.c +++ b/u-boot/cpu/mips/cpu.c @@ -78,3 +78,25 @@ void flush_cache(ulong start_addr, ulong size){ dcache_flush_range(a, end); } + +/* + * Read CPU type and put its name into buffer + * For now only 24/74Kc are supported as all + * supported SOCs are based on one of them + */ +void cpu_name(char *name) +{ + u32 cpu_id = read_c0_prid(); + + switch (cpu_id & PRID_IMP_MASK) { + case PRID_IMP_24K: + sprintf(name, "MIPS 24Kc"); + break; + case PRID_IMP_74K: + sprintf(name, "MIPS 74Kc"); + break; + default: + sprintf(name, "MIPS Unknown"); + break; + } +} diff --git a/u-boot/include/asm-mips/mipsregs.h b/u-boot/include/asm-mips/mipsregs.h index 0586c53..09a641d 100644 --- a/u-boot/include/asm-mips/mipsregs.h +++ b/u-boot/include/asm-mips/mipsregs.h @@ -174,6 +174,21 @@ /* * Macros to access the system control coprocessor */ +#define __read_32bit_c0_register(source, sel) \ +({ int __res; \ + if (sel == 0) \ + __asm__ __volatile__( \ + "mfc0\t%0, " #source "\n\t" \ + : "=r" (__res)); \ + else \ + __asm__ __volatile__( \ + ".set\tmips32\n\t" \ + "mfc0\t%0, " #source ", " #sel "\n\t" \ + ".set\tmips0\n\t" \ + : "=r" (__res)); \ + __res; \ +}) + #define read_32bit_cp0_register(source) \ ({ int __res; \ __asm__ __volatile__( \ @@ -544,4 +559,37 @@ __BUILD_SET_CP0(config,CP0_CONFIG) #define CEB_KERNEL 2 /* Count events in kernel mode EXL = ERL = 0 */ #define CEB_EXL 1 /* Count events with EXL = 1, ERL = 0 */ +/* + * MIPS processor ID, based on: + * Linux/arch/mips/include/asm/cpu.h + */ +#define read_c0_prid() __read_32bit_c0_register($15, 0) +#define PRID_IMP_MASK 0xFF00 + +#define PRID_IMP_QEMU_GENERIC 0x0000 +#define PRID_IMP_4KC 0x8000 +#define PRID_IMP_5KC 0x8100 +#define PRID_IMP_20KC 0x8200 +#define PRID_IMP_4KEC 0x8400 +#define PRID_IMP_4KSC 0x8600 +#define PRID_IMP_25KF 0x8800 +#define PRID_IMP_5KE 0x8900 +#define PRID_IMP_4KECR2 0x9000 +#define PRID_IMP_4KEMPR2 0x9100 +#define PRID_IMP_4KSD 0x9200 +#define PRID_IMP_24K 0x9300 +#define PRID_IMP_34K 0x9500 +#define PRID_IMP_24KE 0x9600 +#define PRID_IMP_74K 0x9700 +#define PRID_IMP_1004K 0x9900 +#define PRID_IMP_1074K 0x9a00 +#define PRID_IMP_M14KC 0x9c00 +#define PRID_IMP_M14KEC 0x9e00 +#define PRID_IMP_INTERAPTIV_UP 0xa000 +#define PRID_IMP_INTERAPTIV_MP 0xa100 +#define PRID_IMP_PROAPTIV_UP 0xa200 +#define PRID_IMP_PROAPTIV_MP 0xa300 +#define PRID_IMP_M5150 0xa700 +#define PRID_IMP_P5600 0xa800 + #endif /* _ASM_MIPSREGS_H */ diff --git a/u-boot/include/common.h b/u-boot/include/common.h index 2274b04..f601b4a 100644 --- a/u-boot/include/common.h +++ b/u-boot/include/common.h @@ -173,6 +173,7 @@ void print_size(ulong, const char *); void print_board_info(void); void macaddr_init(unsigned char *); void flash_print_name(void); +void cpu_name(char *name); unsigned int main_cpu_clk(void); /* common/main.c */