From: Yangbo Lu Date: Thu, 19 Dec 2019 10:59:25 +0000 (+0800) Subject: mmc: fsl_esdhc_imx: drop QorIQ eSDHC specific peripheral clock code X-Git-Tag: v2020.04-rc1~18^2~7 X-Git-Url: https://git.librecmc.org/?a=commitdiff_plain;h=6982315adffa80f66091dd417086e97bfb6a013d;p=oweals%2Fu-boot.git mmc: fsl_esdhc_imx: drop QorIQ eSDHC specific peripheral clock code Drop QorIQ eSDHC specific peripheral clock code. Signed-off-by: Yangbo Lu --- diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c index 96fe01e26d..462ad2878a 100644 --- a/drivers/mmc/fsl_esdhc_imx.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -661,35 +661,6 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock) priv->clock = clock; } -#ifdef CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK -static void esdhc_clock_control(struct fsl_esdhc_priv *priv, bool enable) -{ - struct fsl_esdhc *regs = priv->esdhc_regs; - u32 value; - u32 time_out; - - value = esdhc_read32(®s->sysctl); - - if (enable) - value |= SYSCTL_CKEN; - else - value &= ~SYSCTL_CKEN; - - esdhc_write32(®s->sysctl, value); - - time_out = 20; - value = PRSSTAT_SDSTB; - while (!(esdhc_read32(®s->prsstat) & value)) { - if (time_out == 0) { - printf("fsl_esdhc: Internal clock never stabilised.\n"); - break; - } - time_out--; - mdelay(1); - } -} -#endif - #ifdef MMC_SUPPORTS_TUNING static int esdhc_change_pinstate(struct udevice *dev) { @@ -961,12 +932,6 @@ static int esdhc_set_ios_common(struct fsl_esdhc_priv *priv, struct mmc *mmc) int ret __maybe_unused; u32 clock; -#ifdef CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK - /* Select to use peripheral clock */ - esdhc_clock_control(priv, false); - esdhc_setbits32(®s->scr, ESDHCCTL_PCS); - esdhc_clock_control(priv, true); -#endif /* Set the clock speed */ clock = mmc->clock; if (clock < mmc->cfg->f_min) @@ -1394,13 +1359,8 @@ void fdt_fixup_esdhc(void *blob, bd_t *bd) if (esdhc_status_fixup(blob, compat)) return; -#ifdef CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK - do_fixup_by_compat_u32(blob, compat, "peripheral-frequency", - gd->arch.sdhc_clk, 1); -#else do_fixup_by_compat_u32(blob, compat, "clock-frequency", gd->arch.sdhc_clk, 1); -#endif } #endif