From: Mirko Vogt Date: Fri, 12 Dec 2008 11:58:53 +0000 (+0000) Subject: changed Makefile and profiles, added patches for kernel 2.6.24 (stable-branch of... X-Git-Url: https://git.librecmc.org/?a=commitdiff_plain;h=614683faf8029100802db06a825648d0b6490285;p=librecmc%2Flibrecmc.git changed Makefile and profiles, added patches for kernel 2.6.24 (stable-branch of Openmoko) SVN-Revision: 13613 --- diff --git a/target/linux/s3c24xx/Makefile b/target/linux/s3c24xx/Makefile index 66496fc9f8..afcbc78564 100755 --- a/target/linux/s3c24xx/Makefile +++ b/target/linux/s3c24xx/Makefile @@ -20,6 +20,5 @@ define Target/Description endef include $(INCLUDE_DIR)/target.mk -DEFAULT_PACKAGES += xglamo enlightenment $(eval $(call BuildTarget)) diff --git a/target/linux/s3c24xx/config-2.6.24 b/target/linux/s3c24xx/config-2.6.24 new file mode 100644 index 0000000000..b048c08846 --- /dev/null +++ b/target/linux/s3c24xx/config-2.6.24 @@ -0,0 +1,597 @@ +CONFIG_AEABI=y +CONFIG_ALIGNMENT_TRAP=y +CONFIG_APM_EMULATION=y +CONFIG_APM_POWER=y +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_BAST is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_H1940 is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_RPC is not set +CONFIG_ARCH_S3C2410=y +CONFIG_ARCH_S3C2440=y +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_SMDK2410 is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_ARCH_VERSATILE is not set +CONFIG_ARM=y +CONFIG_ARM_THUMB=y +# CONFIG_ARPD is not set +# CONFIG_ATM is not set +CONFIG_AUTOFS4_FS=m +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_CORGI is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_BASE_SMALL=0 +# CONFIG_BATTERY_DS2760 is not set +# CONFIG_BINFMT_AOUT is not set +CONFIG_BITREVERSE=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=4096 +CONFIG_BLK_DEV_SR=m +# CONFIG_BLK_DEV_SR_VENDOR is not set +CONFIG_BLK_DEV_UB=m +# CONFIG_BONDING is not set +# CONFIG_BOOT_PRINTK_DELAY is not set +CONFIG_BOUNCE=y +# CONFIG_BRIDGE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBFUSB is not set +# CONFIG_BT_HCIBPA10X is not set +# CONFIG_BT_HCIUART is not set +# CONFIG_BT_HCIVHCI is not set +CONFIG_CHR_DEV_SG=m +# CONFIG_CIFS_STATS is not set +CONFIG_CIFS_WEAK_PW_HASH=y +CONFIG_CMDLINE="unused -- bootloader passes ATAG list" +CONFIG_CONFIGFS_FS=m +CONFIG_CONNECTOR=m +CONFIG_CPU_32=y +CONFIG_CPU_32v4T=y +CONFIG_CPU_ABRT_EV4T=y +CONFIG_CPU_ARM920T=y +CONFIG_CPU_CACHE_V4WT=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_V4WB=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set +# CONFIG_CPU_ICACHE_DISABLE is not set +CONFIG_CPU_LLSERIAL_S3C2410=y +CONFIG_CPU_LLSERIAL_S3C2440=y +CONFIG_CPU_S3C2410=y +CONFIG_CPU_S3C2410_DMA=y +CONFIG_CPU_S3C2440=y +CONFIG_CPU_S3C2442=y +CONFIG_CPU_S3C244X=y +CONFIG_CPU_TLB_V4WBI=y +CONFIG_CRAMFS=y +# CONFIG_CRC_ITU_T is not set +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_CBC=y +CONFIG_CRYPTO_DES=y +CONFIG_CRYPTO_FCRYPT=m +CONFIG_CRYPTO_GF128MUL=m +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HMAC=y +CONFIG_CRYPTO_HW=y +CONFIG_CRYPTO_LRW=m +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_PCBC=m +CONFIG_CRYPTO_XCBC=m +CONFIG_DAB=y +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_DEBUG_DRIVER is not set +CONFIG_DEBUG_ERRORS=y +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_KOBJECT is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_LL is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_DEBUG_MUTEXES is not set +CONFIG_DEBUG_PREEMPT=y +# CONFIG_DEBUG_RT_MUTEXES is not set +CONFIG_DEBUG_S3C_UART=2 +# CONFIG_DEBUG_SG is not set +# CONFIG_DEBUG_SHIRQ is not set +# CONFIG_DEBUG_SLAB is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_USER is not set +# CONFIG_DEBUG_VM is not set +CONFIG_DEFAULT_TCP_CONG="cubic" +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_DM9000 is not set +CONFIG_DNOTIFY=y +CONFIG_DUMMY_CONSOLE=y +# CONFIG_EEPROM_93CX6 is not set +CONFIG_ELF_CORE=y +# CONFIG_EMBEDDED is not set +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_EXT2_FS=y +CONFIG_EXT3_FS=y +CONFIG_FAT_FS=y +# CONFIG_FAULT_INJECTION is not set +CONFIG_FB=y +# CONFIG_FB_BACKLIGHT is not set +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_DDC is not set +CONFIG_FB_DEFERRED_IO=y +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_S1D13XXX is not set +CONFIG_FB_S3C2410=y +# CONFIG_FB_S3C2410_DEBUG is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_TILEBLITTING is not set +# CONFIG_FB_UVESA is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FIRMWARE_EDID is not set +CONFIG_FONTS=y +# CONFIG_FONT_10x18 is not set +CONFIG_FONT_6x11=y +# CONFIG_FONT_7x14 is not set +# CONFIG_FONT_8x16 is not set +# CONFIG_FONT_8x8 is not set +# CONFIG_FONT_ACORN_8x8 is not set +# CONFIG_FONT_MINI_4x6 is not set +# CONFIG_FONT_PEARL_8x8 is not set +# CONFIG_FONT_SUN12x22 is not set +# CONFIG_FONT_SUN8x16 is not set +CONFIG_FORCED_INLINING=y +# CONFIG_FPE_FASTFPE is not set +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +CONFIG_FRAME_POINTER=y +CONFIG_FS_POSIX_ACL=y +CONFIG_FUSE_FS=m +CONFIG_FW_LOADER=m +# CONFIG_GENERIC_CLOCKEVENTS is not set +CONFIG_GENERIC_GPIO=y +# CONFIG_GENERIC_TIME is not set +# CONFIG_HAMRADIO is not set +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +# CONFIG_HFSPLUS_FS is not set +# CONFIG_HFS_FS is not set +CONFIG_HID=y +CONFIG_HID_SUPPORT=y +CONFIG_HW_CONSOLE=y +# CONFIG_HW_RANDOM is not set +CONFIG_HZ=200 +CONFIG_I2C=y +# CONFIG_I2C_ALGOBIT is not set +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_S3C2410=y +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IDE is not set +# CONFIG_IEEE80211 is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_INPUT=y +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_GPIO_BUTTONS is not set +CONFIG_INPUT_KEYBOARD=y +CONFIG_INPUT_MISC=y +CONFIG_INPUT_MOUSE=y +CONFIG_INPUT_MOUSEDEV=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_MOUSEDEV_SCREEN_X=480 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=640 +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_INPUT_UINPUT=m +# CONFIG_INPUT_YEALINK is not set +CONFIG_INSTRUMENTATION=y +CONFIG_IOSCHED_AS=m +CONFIG_IOSCHED_CFQ=m +# CONFIG_IP6_NF_QUEUE is not set +# CONFIG_IP6_NF_RAW is not set +# CONFIG_IPV6_ROUTER_PREF is not set +CONFIG_IPV6_TUNNEL=m +# CONFIG_IP_NF_ARPTABLES is not set +# CONFIG_IP_NF_MATCH_RECENT is not set +# CONFIG_IP_NF_QUEUE is not set +# CONFIG_IP_NF_RAW is not set +CONFIG_IP_NF_TARGET_CLUSTERIP=m +CONFIG_IP_PNP=y +# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_DHCP is not set +# CONFIG_IP_PNP_RARP is not set +# CONFIG_IP_ROUTE_MULTIPATH is not set +# CONFIG_IP_ROUTE_VERBOSE is not set +# CONFIG_ISDN is not set +CONFIG_JBD=y +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +CONFIG_KEXEC=y +# CONFIG_KEYBOARD_ATKBD is not set +CONFIG_KEYBOARD_GPIO=m +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_NEWTON is not set +CONFIG_KEYBOARD_STOWAWAY=m +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +CONFIG_KMOD=y +CONFIG_LCD_CLASS_DEVICE=y +# CONFIG_LCD_LTV350QV is not set +CONFIG_LEDS_S3C24XX=m +# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set +# CONFIG_LLC2 is not set +CONFIG_LOCKD=y +CONFIG_LOCK_KERNEL=y +# CONFIG_LOCK_STAT is not set +# CONFIG_LOGO is not set +# CONFIG_MACH_AML_M5900 is not set +# CONFIG_MACH_ANUBIS is not set +# CONFIG_MACH_N30 is not set +# CONFIG_MACH_NEXCODER_2440 is not set +# CONFIG_MACH_OSIRIS is not set +# CONFIG_MACH_OTOM is not set +CONFIG_MACH_QT2410=y +# CONFIG_MACH_RX3715 is not set +CONFIG_MACH_SMDK=y +# CONFIG_MACH_SMDK2412 is not set +# CONFIG_MACH_SMDK2413 is not set +# CONFIG_MACH_SMDK2443 is not set +# CONFIG_MACH_VR1000 is not set +# CONFIG_MACH_VSTMS is not set +CONFIG_MAGIC_SYSRQ=y +# CONFIG_MARKERS is not set +# CONFIG_MINIX_FS is not set +CONFIG_MMC=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_SPI is not set +CONFIG_MMC_UNSAFE_RESUME=y +CONFIG_MODULE_FORCE_UNLOAD=y +# CONFIG_MOUSE_GPIO is not set +# CONFIG_MOUSE_PS2 is not set +# CONFIG_MOUSE_SERIAL is not set +# CONFIG_MOUSE_VSXXXAA is not set +CONFIG_MSDOS_FS=y +CONFIG_MTD=y +CONFIG_MTD_ABSENT=y +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_ALAUDA is not set +# CONFIG_MTD_ARM_INTEGRATOR is not set +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_MTD_BLOCK2MTD is not set +CONFIG_MTD_CFI=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +# CONFIG_MTD_CFI_AMDSTD is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +CONFIG_MTD_CFI_INTELEXT=y +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +CONFIG_MTD_CHAR=y +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_CONCAT is not set +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +CONFIG_MTD_MAP_BANK_WIDTH_2=y +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MTDRAM is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_PLATFORM is not set +CONFIG_MTD_NAND_S3C2410=y +# CONFIG_MTD_NAND_S3C2410_CLKSTOP is not set +# CONFIG_MTD_NAND_S3C2410_DEBUG is not set +CONFIG_MTD_NAND_S3C2410_HWECC=y +CONFIG_MTD_NAND_VERIFY_WRITE=y +# CONFIG_MTD_ONENAND is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_PHRAM is not set +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_PHYSMAP_BANKWIDTH=2 +CONFIG_MTD_PHYSMAP_LEN=0 +CONFIG_MTD_PHYSMAP_START=0x8000000 +# CONFIG_MTD_PLATRAM is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_SLRAM is not set +CONFIG_NETFILTER_NETLINK=m +CONFIG_NETFILTER_NETLINK_LOG=m +CONFIG_NETFILTER_NETLINK_QUEUE=m +# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set +CONFIG_NETFILTER_XT_MATCH_QUOTA=m +CONFIG_NETFILTER_XT_MATCH_STATISTIC=m +# CONFIG_NETFILTER_XT_MATCH_TIME is not set +# CONFIG_NETFILTER_XT_MATCH_U32 is not set +# CONFIG_NET_CLS_ACT is not set +# CONFIG_NET_CLS_IND is not set +# CONFIG_NET_CLS_POLICE is not set +# CONFIG_NET_EMATCH is not set +# CONFIG_NET_IPGRE_BROADCAST is not set +CONFIG_NET_KEY_MIGRATE=y +# CONFIG_NET_PKTGEN is not set +# CONFIG_NET_SCH_RR is not set +CONFIG_NFS_FS=y +# CONFIG_NF_CONNTRACK_AMANDA is not set +CONFIG_NF_CONNTRACK_ENABLED=m +CONFIG_NF_CONNTRACK_EVENTS=y +CONFIG_NF_CONNTRACK_NETBIOS_NS=m +CONFIG_NF_CONNTRACK_SANE=m +CONFIG_NF_CT_NETLINK=m +CONFIG_NF_CT_PROTO_SCTP=m +# CONFIG_NF_NAT_AMANDA is not set +CONFIG_NLS=y +# CONFIG_NLS_CODEPAGE_1250 is not set +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_CODEPAGE_936=m +CONFIG_NLS_CODEPAGE_950=m +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +CONFIG_NO_IDLE_HZ=y +CONFIG_NO_IOPORT=y +# CONFIG_NVRAM is not set +CONFIG_OABI_COMPAT=y +CONFIG_OPROFILE=m +# CONFIG_OUTER_CACHE is not set +# CONFIG_PARTITION_ADVANCED is not set +# CONFIG_PCI_SYSCALL is not set +# CONFIG_PDA_POWER is not set +CONFIG_PLAT_S3C=y +CONFIG_PLAT_S3C24XX=y +CONFIG_PM=y +CONFIG_PM_DEBUG=y +CONFIG_PM_LEGACY=y +CONFIG_PM_SLEEP=y +# CONFIG_PM_VERBOSE is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +# CONFIG_PPPOE is not set +# CONFIG_PPPOL2TP is not set +CONFIG_PREEMPT=y +CONFIG_PROFILING=y +# CONFIG_PROVE_LOCKING is not set +# CONFIG_RCU_TORTURE_TEST is not set +CONFIG_ROMFS_FS=y +CONFIG_ROOT_NFS=y +CONFIG_RPCSEC_GSS_KRB5=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DEBUG=y +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +CONFIG_RTC_DRV_S3C=m +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_TEST is not set +# CONFIG_RTC_DRV_V3020 is not set +# CONFIG_RTC_DRV_X1205 is not set +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_LIB=y +# CONFIG_RT_MUTEX_TESTER is not set +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_S3C2410_CLOCK=y +CONFIG_S3C2410_DMA=y +# CONFIG_S3C2410_DMA_DEBUG is not set +CONFIG_S3C2410_GPIO=y +CONFIG_S3C2410_PM=y +# CONFIG_S3C2410_PM_CHECK is not set +# CONFIG_S3C2410_PM_DEBUG is not set +CONFIG_S3C2410_WATCHDOG=m +CONFIG_S3C2440_DMA=y +# CONFIG_S3C_BOOT_ERROR_RESET is not set +# CONFIG_S3C_BOOT_WATCHDOG is not set +CONFIG_S3C_LOWLEVEL_UART_PORT=2 +# CONFIG_SCHEDSTATS is not set +# CONFIG_SCHED_DEBUG is not set +# CONFIG_SCSI_MULTI_LUN is not set +CONFIG_SCSI_SCAN_ASYNC=y +CONFIG_SCSI_WAIT_SCAN=m +# CONFIG_SDIO_UART is not set +# CONFIG_SERIAL_8250 is not set +CONFIG_SERIAL_S3C2410=y +CONFIG_SERIAL_S3C2410_CONSOLE=y +CONFIG_SERIO=y +# CONFIG_SERIO_RAW is not set +# CONFIG_SERIO_SERPORT is not set +CONFIG_SLABINFO=y +# CONFIG_SMC91X is not set +CONFIG_SMDK2440_CPU2440=y +CONFIG_SMDK2440_CPU2442=y +CONFIG_SND_S3C24XX_SOC=m +CONFIG_SND_SOC=m +CONFIG_SND_SUPPORT_OLD_API=y +# CONFIG_SND_USB_AUDIO is not set +# CONFIG_SOFT_WATCHDOG is not set +CONFIG_SOUND=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_SPI=y +CONFIG_SPI_BITBANG=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_S3C24XX=y +CONFIG_SPI_S3C24XX_GPIO=y +# CONFIG_SPI_SPIDEV is not set +CONFIG_SPLIT_PTLOCK_CPUS=4096 +CONFIG_SSB_POSSIBLE=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_SUSPEND=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_TCP_MD5SIG=y +# CONFIG_TICK_ONESHOT is not set +CONFIG_TIMER_STATS=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_UCB1400 is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +CONFIG_UID16=y +CONFIG_USB=y +# CONFIG_USBPCWATCHDOG is not set +# CONFIG_USB_ARCH_HAS_EHCI is not set +CONFIG_USB_BERRY_CHARGE=m +CONFIG_USB_DEVICE_CLASS=y +CONFIG_USB_EPSON2888=y +CONFIG_USB_ETH=m +CONFIG_USB_ETH_RNDIS=y +CONFIG_USB_FILE_STORAGE=m +# CONFIG_USB_FILE_STORAGE_TEST is not set +CONFIG_USB_GADGET=y +CONFIG_USB_GADGETFS=m +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_AT91 is not set +# CONFIG_USB_GADGET_ATMEL_USBA is not set +# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +# CONFIG_USB_GADGET_DUALSPEED is not set +# CONFIG_USB_GADGET_DUMMY_HCD is not set +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_M66592 is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_PXA2XX is not set +CONFIG_USB_GADGET_S3C2410=y +CONFIG_USB_GADGET_SELECTED=y +CONFIG_USB_G_SERIAL=m +CONFIG_USB_HID=y +CONFIG_USB_HIDDEV=y +CONFIG_USB_IOWARRIOR=m +CONFIG_USB_KC2190=y +CONFIG_USB_LIBUSUAL=y +CONFIG_USB_MIDI_GADGET=m +CONFIG_USB_MON=y +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set +CONFIG_USB_OHCI_HCD=m +# CONFIG_USB_PERSIST is not set +CONFIG_USB_RTL8150=m +CONFIG_USB_S3C2410=y +# CONFIG_USB_S3C2410_DEBUG is not set +# CONFIG_USB_SERIAL_CH341 is not set +# CONFIG_USB_SERIAL_OTI6858 is not set +CONFIG_USB_SUSPEND=y +CONFIG_USB_TRANCEVIBRATOR=m +CONFIG_USB_USBNET=y +# CONFIG_USB_ZERO is not set +# CONFIG_USER_NS is not set +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_VFAT_FS=y +# CONFIG_VGASTATE is not set +# CONFIG_VGA_CONSOLE is not set +# CONFIG_VIDEO_DEV is not set +# CONFIG_VLAN_8021Q is not set +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +# CONFIG_W1 is not set +# CONFIG_WLAN_80211 is not set +CONFIG_XFRM_MIGRATE=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFS_FS is not set +# CONFIG_XIP_KERNEL is not set +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_ZBOOT_ROM_TEXT=0x0 +# CONFIG_ZISOFS is not set diff --git a/target/linux/s3c24xx/image/Makefile b/target/linux/s3c24xx/image/Makefile index 9aa3fd389a..39f494a1a9 100755 --- a/target/linux/s3c24xx/image/Makefile +++ b/target/linux/s3c24xx/image/Makefile @@ -16,7 +16,7 @@ MAKE += -j5 define Image/BuildKernel - $(TARGET_CROSS)objcopy -O binary -R .note -R .comment -S $(KDIR)/linux-2.6.26/arch/arm/boot/compressed/vmlinux linux.bin + $(TARGET_CROSS)objcopy -O binary -R .note -R .comment -S $(LINUX_DIR)/arch/arm/boot/compressed/vmlinux linux.bin mkimage -A arm -O linux -T kernel -C none -a 30008000 -e 30008000 -n "Openmoko Kernel Image Freerunner (Neo1973(GTA02))" -d linux.bin uImage cp uImage $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-uImage diff --git a/target/linux/s3c24xx/patches-2.6.24/1001-explicitly-link-notes-section.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1001-explicitly-link-notes-section.patch.patch new file mode 100644 index 0000000000..59886a2237 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1001-explicitly-link-notes-section.patch.patch @@ -0,0 +1,29 @@ +From bc6ec8d17f2f4dcb70bc1a80ea0630eeb5372406 Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:29:03 +0100 +Subject: [PATCH] explicitly-link-notes-section.patch + +Since 2.6.23 kbuild produces a 3GB arch/arm/boot/Image because it includes a +.note.gnu.build-id section at address 0 which is followed by 3GB of 0x00. +The --build-id option is set in the toplevel Makefile. +This patch explicitly puts the notes section after the TEXT section. +--- + arch/arm/kernel/vmlinux.lds.S | 2 ++ + 1 files changed, 2 insertions(+), 0 deletions(-) + +diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S +index 5ff5406..e2922fc 100644 +--- a/arch/arm/kernel/vmlinux.lds.S ++++ b/arch/arm/kernel/vmlinux.lds.S +@@ -105,6 +105,8 @@ SECTIONS + *(.got) /* Global offset table */ + } + ++ NOTES ++ + RODATA + + _etext = .; /* End of text and rodata section */ +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1002-gta01-no_nand_partitions.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1002-gta01-no_nand_partitions.patch.patch new file mode 100644 index 0000000000..88b4d37c82 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1002-gta01-no_nand_partitions.patch.patch @@ -0,0 +1,60 @@ +From 219a4d34b71c37a2a23739718924b0915790f44f Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:29:16 +0100 +Subject: [PATCH] gta01-no_nand_partitions.patch + [PATCH] support mtd NAND commandline partitions for S3C2410 + +This patch adds support for the mtd NAND core standard method of passing +partition table information from the bootloader into the kernel by using +the kernel commandline. + +The board specific code can still manually override and provide a fixed +partition table, so this patch will behave backwards compatible. + +Signed-off-by: Harald Welte +Acked-byt: Ben Dooks +--- + drivers/mtd/nand/s3c2410.c | 18 ++++++++++++++++-- + 1 files changed, 16 insertions(+), 2 deletions(-) + +diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c +index 66f76e9..355de78 100644 +--- a/drivers/mtd/nand/s3c2410.c ++++ b/drivers/mtd/nand/s3c2410.c +@@ -559,17 +559,31 @@ static int s3c2410_nand_remove(struct platform_device *pdev) + } + + #ifdef CONFIG_MTD_PARTITIONS ++const char *part_probes[] = { "cmdlinepart", NULL }; + static int s3c2410_nand_add_partition(struct s3c2410_nand_info *info, + struct s3c2410_nand_mtd *mtd, + struct s3c2410_nand_set *set) + { ++ struct mtd_partition *part_info; ++ int nr_part = 0; ++ + if (set == NULL) + return add_mtd_device(&mtd->mtd); + +- if (set->nr_partitions > 0 && set->partitions != NULL) { +- return add_mtd_partitions(&mtd->mtd, set->partitions, set->nr_partitions); ++ if (set->nr_partitions == 0) { ++ mtd->mtd.name = set->name; ++ nr_part = parse_mtd_partitions(&mtd->mtd, part_probes, ++ &part_info, 0); ++ } else { ++ if (set->nr_partitions > 0 && set->partitions != NULL) { ++ nr_part = set->nr_partitions; ++ part_info = set->partitions; ++ } + } + ++ if (nr_part > 0 && part_info) ++ return add_mtd_partitions(&mtd->mtd, part_info, nr_part); ++ + return add_mtd_device(&mtd->mtd); + } + #else +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1003-neo1973-soc-include-fix.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1003-neo1973-soc-include-fix.patch.patch new file mode 100644 index 0000000000..f39e6f09af --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1003-neo1973-soc-include-fix.patch.patch @@ -0,0 +1,56 @@ +From ad7705d9145d87c6e94006d48d12372bb319f4e7 Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:29:27 +0100 +Subject: [PATCH] neo1973-soc-include-fix.patch + [PATCH] Fix s3c24xx include file path changes in asoc driver + +Signed-off-by: Harald Welte +--- + sound/soc/s3c24xx/neo1973_wm8753.c | 4 +++- + sound/soc/s3c24xx/s3c24xx-i2s.c | 3 ++- + 2 files changed, 5 insertions(+), 2 deletions(-) + +diff --git a/sound/soc/s3c24xx/neo1973_wm8753.c b/sound/soc/s3c24xx/neo1973_wm8753.c +index d5a8fc2..679b99d 100644 +--- a/sound/soc/s3c24xx/neo1973_wm8753.c ++++ b/sound/soc/s3c24xx/neo1973_wm8753.c +@@ -30,13 +30,15 @@ + + #include + #include +-#include + #include + #include + #include + #include + #include + #include ++ ++#include ++ + #include "../codecs/wm8753.h" + #include "lm4857.h" + #include "s3c24xx-pcm.h" +diff --git a/sound/soc/s3c24xx/s3c24xx-i2s.c b/sound/soc/s3c24xx/s3c24xx-i2s.c +index cd89c41..fe30e0d 100644 +--- a/sound/soc/s3c24xx/s3c24xx-i2s.c ++++ b/sound/soc/s3c24xx/s3c24xx-i2s.c +@@ -33,13 +33,14 @@ + + #include + #include +-#include + #include + #include + #include + #include + #include + ++#include ++ + #include "s3c24xx-pcm.h" + #include "s3c24xx-i2s.h" + +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1004-asoc-neo1973_wm8753-power.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1004-asoc-neo1973_wm8753-power.patch.patch new file mode 100644 index 0000000000..ffcbfce459 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1004-asoc-neo1973_wm8753-power.patch.patch @@ -0,0 +1,62 @@ +From dee63031aaa4377dea64113b0f6789ea053087fd Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:29:38 +0100 +Subject: [PATCH] asoc-neo1973_wm8753-power.patch + +--- + sound/soc/s3c24xx/neo1973_wm8753.c | 32 ++++++++++++++++++++++++++++++++ + 1 files changed, 32 insertions(+), 0 deletions(-) + +diff --git a/sound/soc/s3c24xx/neo1973_wm8753.c b/sound/soc/s3c24xx/neo1973_wm8753.c +index 679b99d..0289d1d 100644 +--- a/sound/soc/s3c24xx/neo1973_wm8753.c ++++ b/sound/soc/s3c24xx/neo1973_wm8753.c +@@ -617,6 +617,35 @@ static int lm4857_i2c_attach(struct i2c_adapter *adap) + return i2c_probe(adap, &addr_data, lm4857_amp_probe); + } + ++static u8 lm4857_state; ++ ++static int lm4857_suspend(struct i2c_client *dev, pm_message_t state) ++{ ++ dev_dbg(&dev->dev, "lm4857_suspend\n"); ++ lm4857_state = lm4857_regs[LM4857_CTRL] & 0xf; ++ if (lm4857_state) { ++ lm4857_regs[LM4857_CTRL] &= 0xf0; ++ lm4857_write_regs(); ++ } ++ return 0; ++} ++ ++static int lm4857_resume(struct i2c_client *dev) ++{ ++ if (lm4857_state) { ++ lm4857_regs[LM4857_CTRL] |= (lm4857_state & 0x0f); ++ lm4857_write_regs(); ++ } ++ return 0; ++} ++ ++static void lm4857_shutdown(struct i2c_client *dev) ++{ ++ dev_dbg(&dev->dev, "lm4857_shutdown\n"); ++ lm4857_regs[LM4857_CTRL] &= 0xf0; ++ lm4857_write_regs(); ++} ++ + /* corgi i2c codec control layer */ + static struct i2c_driver lm4857_i2c_driver = { + .driver = { +@@ -624,6 +653,9 @@ static struct i2c_driver lm4857_i2c_driver = { + .owner = THIS_MODULE, + }, + .id = I2C_DRIVERID_LM4857, ++ .suspend = lm4857_suspend, ++ .resume = lm4857_resume, ++ .shutdown = lm4857_shutdown, + .attach_adapter = lm4857_i2c_attach, + .detach_client = lm4857_i2c_detach, + .command = NULL, +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1005-asoc-core-suspend_resume.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1005-asoc-core-suspend_resume.patch.patch new file mode 100644 index 0000000000..6f0f08616e --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1005-asoc-core-suspend_resume.patch.patch @@ -0,0 +1,52 @@ +From 3ebb4e58d6f7a9f2710a4e174a3c8b59f9fa9bd5 Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 1 Jun 2007 12:56:55 +0100 +Subject: [PATCH] asoc-core-suspend_resume.patch + From 6c868238a5e083dca4d74439a7fd467b5c7726b0 Mon Sep 17 00:00:00 2001 + Subject: [PATCH] This fixes a bug whereby PCM's were not being suspended when the rest of the audio subsystem was suspended. + +--- + include/sound/soc.h | 3 +++ + sound/soc/soc-core.c | 5 +++++ + 2 files changed, 8 insertions(+), 0 deletions(-) + +diff --git a/include/sound/soc.h b/include/sound/soc.h +index f47ef1f..aedb348 100644 +--- a/include/sound/soc.h ++++ b/include/sound/soc.h +@@ -410,6 +410,9 @@ struct snd_soc_dai_link { + + /* codec/machine specific init - e.g. add machine controls */ + int (*init)(struct snd_soc_codec *codec); ++ ++ /* DAI pcm */ ++ struct snd_pcm *pcm; + }; + + /* SoC machine */ +diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c +index e6a67b5..25f7818 100644 +--- a/sound/soc/soc-core.c ++++ b/sound/soc/soc-core.c +@@ -639,6 +639,10 @@ static int soc_suspend(struct platform_device *pdev, pm_message_t state) + dai->dai_ops.digital_mute(dai, 1); + } + ++ /* suspend all pcm's */ ++ for(i = 0; i < machine->num_links; i++) ++ snd_pcm_suspend_all(machine->dai_link[i].pcm); ++ + if (machine->suspend_pre) + machine->suspend_pre(pdev, state); + +@@ -873,6 +877,7 @@ static int soc_new_pcm(struct snd_soc_device *socdev, + return ret; + } + ++ dai_link->pcm = pcm; + pcm->private_data = rtd; + soc_pcm_ops.mmap = socdev->platform->pcm_ops->mmap; + soc_pcm_ops.pointer = socdev->platform->pcm_ops->pointer; +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1006-fix-i2c-s3c2410-resume-race.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1006-fix-i2c-s3c2410-resume-race.patch.patch new file mode 100644 index 0000000000..720608ea93 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1006-fix-i2c-s3c2410-resume-race.patch.patch @@ -0,0 +1,115 @@ +From d3063c1ec65b37b45e808313133196185ea4901f Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:30:03 +0100 +Subject: [PATCH] fix-i2c-s3c2410-resume-race.patch + fix-i2c-s3c2410-resume-race.patch + +There is a nasty race between i2c-s3c2410 resume and resume of I2C +driver and the client drivers -- the watchdog device actually gets to +use the dead I2C bus before it is reinitialized by the I2C driver +resume! This patch makes sure any customers get turned away until +the shopkeeper has woken up. + +Signed-off-by: Andy Green +--- + drivers/i2c/busses/i2c-s3c2410.c | 35 ++++++++++++++++++++++++++++++++++- + 1 files changed, 34 insertions(+), 1 deletions(-) + +diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c +index c44ada5..5ac8309 100644 +--- a/drivers/i2c/busses/i2c-s3c2410.c ++++ b/drivers/i2c/busses/i2c-s3c2410.c +@@ -71,6 +71,8 @@ struct s3c24xx_i2c { + struct resource *irq; + struct resource *ioarea; + struct i2c_adapter adap; ++ ++ int suspended; + }; + + /* default platform data to use if not supplied in the platform_device +@@ -156,6 +158,14 @@ static inline void s3c24xx_i2c_disable_irq(struct s3c24xx_i2c *i2c) + unsigned long tmp; + + tmp = readl(i2c->regs + S3C2410_IICCON); ++ ++/* S3c2442 datasheet ++ * ++ * If the IICCON[5]=0, IICCON[4] does not operate correctly. ++ * So, It is recommended that you should set IICCON[5]=1, ++ * although you does not use the IIC interrupt. ++ */ ++ + writel(tmp & ~S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON); + } + +@@ -282,7 +292,7 @@ static int i2s_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat) + + case STATE_STOP: + dev_err(i2c->dev, "%s: called in STATE_STOP\n", __FUNCTION__); +- s3c24xx_i2c_disable_irq(i2c); ++ s3c24xx_i2c_disable_irq(i2c); + goto out_ack; + + case STATE_START: +@@ -502,6 +512,14 @@ static int s3c24xx_i2c_doxfer(struct s3c24xx_i2c *i2c, struct i2c_msg *msgs, int + unsigned long timeout; + int ret; + ++ if (i2c->suspended) { ++ dev_err(i2c->dev, ++ "Hey I am still asleep (suspended: %d), retry later\n", ++ i2c->suspended); ++ ret = -EAGAIN; ++ goto out; ++ } ++ + ret = s3c24xx_i2c_set_master(i2c); + if (ret != 0) { + dev_err(i2c->dev, "cannot get bus (error %d)\n", ret); +@@ -886,6 +904,17 @@ static int s3c24xx_i2c_remove(struct platform_device *pdev) + } + + #ifdef CONFIG_PM ++ ++static int s3c24xx_i2c_suspend(struct platform_device *dev, pm_message_t state) ++{ ++ struct s3c24xx_i2c *i2c = platform_get_drvdata(dev); ++ ++ if (i2c != NULL) ++ i2c->suspended++; ++ ++ return 0; ++} ++ + static int s3c24xx_i2c_resume(struct platform_device *dev) + { + struct s3c24xx_i2c *i2c = platform_get_drvdata(dev); +@@ -893,6 +922,8 @@ static int s3c24xx_i2c_resume(struct platform_device *dev) + if (i2c != NULL) + s3c24xx_i2c_init(i2c); + ++ i2c->suspended--; ++ + return 0; + } + +@@ -905,6 +936,7 @@ static int s3c24xx_i2c_resume(struct platform_device *dev) + static struct platform_driver s3c2410_i2c_driver = { + .probe = s3c24xx_i2c_probe, + .remove = s3c24xx_i2c_remove, ++ .suspend = s3c24xx_i2c_suspend, + .resume = s3c24xx_i2c_resume, + .driver = { + .owner = THIS_MODULE, +@@ -915,6 +947,7 @@ static struct platform_driver s3c2410_i2c_driver = { + static struct platform_driver s3c2440_i2c_driver = { + .probe = s3c24xx_i2c_probe, + .remove = s3c24xx_i2c_remove, ++ .suspend = s3c24xx_i2c_suspend, + .resume = s3c24xx_i2c_resume, + .driver = { + .owner = THIS_MODULE, +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1007-resume-timers-wq.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1007-resume-timers-wq.patch.patch new file mode 100644 index 0000000000..e7ce35ed3e --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1007-resume-timers-wq.patch.patch @@ -0,0 +1,45 @@ +From fa1e8c2fc849472cddb65bc3138944382b320589 Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:30:15 +0100 +Subject: [PATCH] resume-timers-wq.patch + The initialization of clocks uses mutexes, but we execute the resume in + an interrupt context. We therefore have to hand this task to a non-interrupt. + +Adapted from a patch by Andy Green. +--- + arch/arm/plat-s3c24xx/time.c | 18 +++++++++++++++++- + 1 files changed, 17 insertions(+), 1 deletions(-) + +diff --git a/arch/arm/plat-s3c24xx/time.c b/arch/arm/plat-s3c24xx/time.c +index 2ec1daa..c11d0dd 100644 +--- a/arch/arm/plat-s3c24xx/time.c ++++ b/arch/arm/plat-s3c24xx/time.c +@@ -255,8 +255,24 @@ static void __init s3c2410_timer_init (void) + setup_irq(IRQ_TIMER4, &s3c2410_timer_irq); + } + ++static void s3c2410_timer_resume_work(struct work_struct *work) ++{ ++ s3c2410_timer_setup(); ++} ++ ++static void s3c2410_timer_resume(void) ++{ ++ static DECLARE_WORK(work, s3c2410_timer_resume_work); ++ int res; ++ ++ res = schedule_work(&work); ++ if (!res) ++ printk(KERN_ERR ++ "s3c2410_timer_resume_work already queued ???\n"); ++} ++ + struct sys_timer s3c24xx_timer = { + .init = s3c2410_timer_init, + .offset = s3c2410_gettimeoffset, +- .resume = s3c2410_timer_setup ++ .resume = s3c2410_timer_resume, + }; +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1008-wm8753-rout2-inv.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1008-wm8753-rout2-inv.patch.patch new file mode 100644 index 0000000000..07649e164c --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1008-wm8753-rout2-inv.patch.patch @@ -0,0 +1,40 @@ +From 2f6a766ce9bfa4e593b1f88b564f91486cd96f80 Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:30:27 +0100 +Subject: [PATCH] wm8753-rout2-inv.patch + +--- + sound/soc/codecs/wm8753.c | 3 +++ + 1 files changed, 3 insertions(+), 0 deletions(-) + +diff --git a/sound/soc/codecs/wm8753.c b/sound/soc/codecs/wm8753.c +index efced93..52207d5 100644 +--- a/sound/soc/codecs/wm8753.c ++++ b/sound/soc/codecs/wm8753.c +@@ -198,6 +198,7 @@ static const char *wm8753_mic_sel[] = {"Mic 1", "Mic 2", "Mic 3"}; + static const char *wm8753_dai_mode[] = {"DAI 0", "DAI 1", "DAI 2", "DAI 3"}; + static const char *wm8753_dat_sel[] = {"Stereo", "Left ADC", "Right ADC", + "Channel Swap"}; ++static const char *wm8753_rout2_phase[] = {"Non Inverted", "Inverted"}; + + static const struct soc_enum wm8753_enum[] = { + SOC_ENUM_SINGLE(WM8753_BASS, 7, 2, wm8753_base), +@@ -228,6 +229,7 @@ SOC_ENUM_SINGLE(WM8753_ADC, 4, 2, wm8753_adc_filter), + SOC_ENUM_SINGLE(WM8753_MICBIAS, 6, 3, wm8753_mic_sel), + SOC_ENUM_SINGLE(WM8753_IOCTL, 2, 4, wm8753_dai_mode), + SOC_ENUM_SINGLE(WM8753_ADC, 7, 4, wm8753_dat_sel), ++SOC_ENUM_SINGLE(WM8753_OUTCTL, 2, 2, wm8753_rout2_phase), + }; + + +@@ -328,6 +330,7 @@ SOC_SINGLE("Mic1 Capture Volume", WM8753_INCTL1, 5, 3, 0), + SOC_ENUM_EXT("DAI Mode", wm8753_enum[26], wm8753_get_dai, wm8753_set_dai), + + SOC_ENUM("ADC Data Select", wm8753_enum[27]), ++SOC_ENUM("ROUT2 Phase", wm8753_enum[28]), + }; + + /* add non dapm controls */ +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1009-s3c2410-bbt.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1009-s3c2410-bbt.patch.patch new file mode 100644 index 0000000000..bfa3d1c915 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1009-s3c2410-bbt.patch.patch @@ -0,0 +1,54 @@ +From 8e01740813dc6a1d804e61d303549b04e160d153 Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:30:37 +0100 +Subject: [PATCH] s3c2410-bbt.patch + [PATCH] Add Kconfig option to enable NAND bad-block-table support for s3c2410 + +This patch adds a new CONFIG_MTD_NAND_S3C2410_BBT which, if enabled, +asks the mtd NAND core to use a bad-block table. + +Signed-off-by: Harald Welte +--- + drivers/mtd/nand/s3c2410.c | 6 +++++- + include/asm-arm/plat-s3c/nand.h | 3 +++ + 2 files changed, 8 insertions(+), 1 deletions(-) + +diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c +index 355de78..770306c 100644 +--- a/drivers/mtd/nand/s3c2410.c ++++ b/drivers/mtd/nand/s3c2410.c +@@ -612,9 +612,13 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info, + chip->select_chip = s3c2410_nand_select_chip; + chip->chip_delay = 50; + chip->priv = nmtd; +- chip->options = 0; + chip->controller = &info->controller; + ++ if (set->flags & S3C2410_NAND_BBT) ++ chip->options = NAND_USE_FLASH_BBT; ++ else ++ chip->options = 0; ++ + switch (info->cpu_type) { + case TYPE_S3C2410: + chip->IO_ADDR_W = regs + S3C2410_NFDATA; +diff --git a/include/asm-arm/plat-s3c/nand.h b/include/asm-arm/plat-s3c/nand.h +index 8816f7f..cb87f9e 100644 +--- a/include/asm-arm/plat-s3c/nand.h ++++ b/include/asm-arm/plat-s3c/nand.h +@@ -21,9 +21,12 @@ + * partitions = mtd partition list + */ + ++#define S3C2410_NAND_BBT 0x0001 ++ + struct s3c2410_nand_set { + int nr_chips; + int nr_partitions; ++ unsigned int flags; + char *name; + int *nr_map; + struct mtd_partition *partitions; +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1010-gta01-pcf50606.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1010-gta01-pcf50606.patch.patch new file mode 100644 index 0000000000..afd0980195 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1010-gta01-pcf50606.patch.patch @@ -0,0 +1,2443 @@ +From 926f25b2e7e1a96e3aa6c8ca38925b35f67dcbc7 Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:30:52 +0100 +Subject: [PATCH] gta01-pcf50606.patch + This is a NXP PCF50606 power management unit driver. + +The PCF50606 is used in the FIC/OpenMoko Neo1973 GTA01 GSM phone. + +Signed-off-by: Harald Welte +--- + drivers/i2c/chips/Kconfig | 11 + + drivers/i2c/chips/Makefile | 1 + + drivers/i2c/chips/pcf50606.c | 1945 ++++++++++++++++++++++++++++++++++++++++++ + drivers/i2c/chips/pcf50606.h | 302 +++++++ + include/linux/i2c-id.h | 1 + + include/linux/pcf50606.h | 108 +++ + 6 files changed, 2368 insertions(+), 0 deletions(-) + create mode 100644 drivers/i2c/chips/pcf50606.c + create mode 100644 drivers/i2c/chips/pcf50606.h + create mode 100644 include/linux/pcf50606.h + +diff --git a/drivers/i2c/chips/Kconfig b/drivers/i2c/chips/Kconfig +index 2e1c24f..c0011fc 100644 +--- a/drivers/i2c/chips/Kconfig ++++ b/drivers/i2c/chips/Kconfig +@@ -51,6 +51,17 @@ config SENSORS_EEPROM + This driver can also be built as a module. If so, the module + will be called eeprom. + ++config SENSORS_PCF50606 ++ tristate "Philips/NXP PCF50606" ++ depends on I2C ++ help ++ If you say yes here you get support for Philips/NXP PCF50606 ++ PMU (Power Management Unit) chips. ++ ++ This driver can also be built as a module. If so, the module ++ will be called pcf50606. ++ ++ + config SENSORS_PCF8574 + tristate "Philips PCF8574 and PCF8574A" + depends on EXPERIMENTAL +diff --git a/drivers/i2c/chips/Makefile b/drivers/i2c/chips/Makefile +index ca924e1..864e6cf 100644 +--- a/drivers/i2c/chips/Makefile ++++ b/drivers/i2c/chips/Makefile +@@ -9,6 +9,7 @@ obj-$(CONFIG_SENSORS_EEPROM) += eeprom.o + obj-$(CONFIG_SENSORS_MAX6875) += max6875.o + obj-$(CONFIG_SENSORS_M41T00) += m41t00.o + obj-$(CONFIG_SENSORS_PCA9539) += pca9539.o ++obj-$(CONFIG_SENSORS_PCF50606) += pcf50606.o + obj-$(CONFIG_SENSORS_PCF8574) += pcf8574.o + obj-$(CONFIG_SENSORS_PCF8591) += pcf8591.o + obj-$(CONFIG_ISP1301_OMAP) += isp1301_omap.o +diff --git a/drivers/i2c/chips/pcf50606.c b/drivers/i2c/chips/pcf50606.c +new file mode 100644 +index 0000000..6626c68 +--- /dev/null ++++ b/drivers/i2c/chips/pcf50606.c +@@ -0,0 +1,1945 @@ ++/* Philips/NXP PCF50606 Power Management Unit (PMU) driver ++ * ++ * (C) 2006-2007 by OpenMoko, Inc. ++ * Authors: Harald Welte , ++ * Matt Hsu ++ * All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ * ++ * This driver is a monster ;) It provides the following features ++ * - voltage control for a dozen different voltage domains ++ * - charging control for main and backup battery ++ * - rtc / alarm ++ * - watchdog ++ * - adc driver (hw_sensors like) ++ * - pwm driver ++ * - backlight ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include "pcf50606.h" ++ ++/* we use dev_dbg() throughout the code, but sometimes don't want to ++ * write an entire line of debug related information. This DEBUGPC ++ * macro is a continuation for dev_dbg() */ ++#ifdef DEBUG ++#define DEBUGPC(x, args ...) printk(x, ## args) ++#else ++#define DEBUGPC(x, args ...) ++#endif ++ ++/*********************************************************************** ++ * Static data / structures ++ ***********************************************************************/ ++ ++static unsigned short normal_i2c[] = { 0x08, I2C_CLIENT_END }; ++ ++I2C_CLIENT_INSMOD_1(pcf50606); ++ ++#define PCF50606_F_CHG_FAST 0x00000001 /* Charger Fast allowed */ ++#define PCF50606_F_CHG_PRESENT 0x00000002 /* Charger present */ ++#define PCF50606_F_CHG_FOK 0x00000004 /* Fast OK for battery */ ++#define PCF50606_F_CHG_ERR 0x00000008 /* Charger Error */ ++#define PCF50606_F_CHG_PROT 0x00000010 /* Charger Protection */ ++#define PCF50606_F_CHG_READY 0x00000020 /* Charging completed */ ++#define PCF50606_F_CHG_MASK 0x000000fc ++ ++#define PCF50606_F_PWR_PRESSED 0x00000100 ++#define PCF50606_F_RTC_SECOND 0x00000200 ++ ++enum close_state { ++ CLOSE_STATE_NOT, ++ CLOSE_STATE_ALLOW = 0x2342, ++}; ++ ++struct pcf50606_data { ++ struct i2c_client client; ++ struct pcf50606_platform_data *pdata; ++ struct backlight_device *backlight; ++ struct mutex lock; ++ unsigned int flags; ++ unsigned int working; ++ struct mutex working_lock; ++ struct work_struct work; ++ struct rtc_device *rtc; ++ struct input_dev *input_dev; ++ int allow_close; ++ int onkey_seconds; ++ int irq; ++#ifdef CONFIG_PM ++ struct { ++ u_int8_t dcdc1, dcdc2; ++ u_int8_t dcdec1; ++ u_int8_t dcudc1; ++ u_int8_t ioregc; ++ u_int8_t d1regc1; ++ u_int8_t d2regc1; ++ u_int8_t d3regc1; ++ u_int8_t lpregc1; ++ u_int8_t adcc1, adcc2; ++ u_int8_t pwmc1; ++ u_int8_t int1m, int2m, int3m; ++ } standby_regs; ++#endif ++}; ++ ++static struct i2c_driver pcf50606_driver; ++ ++/* This is an ugly construct on how to access the (currently single/global) ++ * pcf50606 handle from other code in the kernel. I didn't really come up with ++ * a more decent method of dynamically resolving this */ ++struct pcf50606_data *pcf50606_global; ++EXPORT_SYMBOL_GPL(pcf50606_global); ++ ++static struct platform_device *pcf50606_pdev; ++ ++/* This is a 10k, B=3370 NTC Thermistor -10..79 centigrade */ ++/* Table entries are offset by +0.5C so a properly rounded value is generated */ ++static const u_int16_t ntc_table_10k_3370B[] = { ++ /* -10 */ ++ 43888, 41819, 39862, 38010, 36257, 34596, 33024, 31534, 30121, 28781, ++ 27510, 26304, 25159, 24071, 23038, 22056, 21122, 20234, 19390, 18586, ++ 17821, 17093, 16399, 15738, 15107, 14506, 13933, 13387, 12865, 12367, ++ 11891, 11437, 11003, 10588, 10192, 9813, 9450, 9103, 8771, 8453, ++ 8149, 7857, 7578, 7310, 7054, 6808, 6572, 6346, 6129, 5920, ++ 5720, 5528, 5344, 5167, 4996, 4833, 4675, 4524, 4379, 4239, ++ 4104, 3975, 3850, 3730, 3614, 3503, 3396, 3292, 3193, 3097, ++ 3004, 2915, 2829, 2745, 2665, 2588, 2513, 2441, 2371, 2304, ++ 2239, 2176, 2116, 2057, 2000, 1945, 1892, 1841, 1791, 1743, ++}; ++ ++ ++/*********************************************************************** ++ * Low-Level routines ++ ***********************************************************************/ ++ ++static inline int __reg_write(struct pcf50606_data *pcf, u_int8_t reg, ++ u_int8_t val) ++{ ++ return i2c_smbus_write_byte_data(&pcf->client, reg, val); ++} ++ ++static int reg_write(struct pcf50606_data *pcf, u_int8_t reg, u_int8_t val) ++{ ++ int ret; ++ ++ mutex_lock(&pcf->lock); ++ ret = __reg_write(pcf, reg, val); ++ mutex_unlock(&pcf->lock); ++ ++ return ret; ++} ++ ++static inline int32_t __reg_read(struct pcf50606_data *pcf, u_int8_t reg) ++{ ++ int32_t ret; ++ ++ ret = i2c_smbus_read_byte_data(&pcf->client, reg); ++ ++ return ret; ++} ++ ++static u_int8_t reg_read(struct pcf50606_data *pcf, u_int8_t reg) ++{ ++ int32_t ret; ++ ++ mutex_lock(&pcf->lock); ++ ret = __reg_read(pcf, reg); ++ mutex_unlock(&pcf->lock); ++ ++ return ret & 0xff; ++} ++ ++static int reg_set_bit_mask(struct pcf50606_data *pcf, ++ u_int8_t reg, u_int8_t mask, u_int8_t val) ++{ ++ int ret; ++ u_int8_t tmp; ++ ++ val &= mask; ++ ++ mutex_lock(&pcf->lock); ++ ++ tmp = __reg_read(pcf, reg); ++ tmp &= ~mask; ++ tmp |= val; ++ ret = __reg_write(pcf, reg, tmp); ++ ++ mutex_unlock(&pcf->lock); ++ ++ return ret; ++} ++ ++static int reg_clear_bits(struct pcf50606_data *pcf, u_int8_t reg, u_int8_t val) ++{ ++ int ret; ++ u_int8_t tmp; ++ ++ mutex_lock(&pcf->lock); ++ ++ tmp = __reg_read(pcf, reg); ++ tmp &= ~val; ++ ret = __reg_write(pcf, reg, tmp); ++ ++ mutex_unlock(&pcf->lock); ++ ++ return ret; ++} ++ ++/* synchronously read one ADC channel (busy-wait for result to be complete) */ ++static u_int16_t adc_read(struct pcf50606_data *pcf, int channel, ++ u_int16_t *data2) ++{ ++ u_int8_t adcs2, adcs1; ++ u_int16_t ret; ++ ++ dev_dbg(&pcf->client.dev, "entering (pcf=%p, channel=%u, data2=%p)\n", ++ pcf, channel, data2); ++ ++ channel &= PCF50606_ADCC2_ADCMUX_MASK; ++ ++ mutex_lock(&pcf->lock); ++ ++ /* start ADC conversion of selected channel */ ++ __reg_write(pcf, PCF50606_REG_ADCC2, channel | ++ PCF50606_ADCC2_ADCSTART | PCF50606_ADCC2_RES_10BIT); ++ ++ do { ++ adcs2 = __reg_read(pcf, PCF50606_REG_ADCS2); ++ } while (!(adcs2 & PCF50606_ADCS2_ADCRDY)); ++ ++ adcs1 = __reg_read(pcf, PCF50606_REG_ADCS1); ++ ret = (adcs1 << 2) | (adcs2 & 0x03); ++ ++ if (data2) { ++ adcs1 = __reg_read(pcf, PCF50606_REG_ADCS3); ++ *data2 = (adcs1 << 2) | ((adcs2 & 0x0c) >> 2); ++ } ++ ++ mutex_unlock(&pcf->lock); ++ ++ dev_dbg(&pcf->client.dev, "returning %u %u\n", ret, ++ data2 ? *data2 : 0); ++ ++ return ret; ++} ++ ++/*********************************************************************** ++ * Voltage / ADC ++ ***********************************************************************/ ++ ++static u_int8_t dcudc_voltage(unsigned int millivolts) ++{ ++ if (millivolts < 900) ++ return 0; ++ if (millivolts > 5500) ++ return 0x1f; ++ if (millivolts <= 3300) { ++ millivolts -= 900; ++ return millivolts/300; ++ } ++ if (millivolts < 4000) ++ return 0x0f; ++ else { ++ millivolts -= 4000; ++ return millivolts/100; ++ } ++} ++ ++static unsigned int dcudc_2voltage(u_int8_t bits) ++{ ++ bits &= 0x1f; ++ if (bits < 0x08) ++ return 900 + bits * 300; ++ else if (bits < 0x10) ++ return 3300; ++ else ++ return 4000 + bits * 100; ++} ++ ++static u_int8_t dcdec_voltage(unsigned int millivolts) ++{ ++ if (millivolts < 900) ++ return 0; ++ else if (millivolts > 3300) ++ return 0x0f; ++ ++ millivolts -= 900; ++ return millivolts/300; ++} ++ ++static unsigned int dcdec_2voltage(u_int8_t bits) ++{ ++ bits &= 0x0f; ++ return 900 + bits*300; ++} ++ ++static u_int8_t dcdc_voltage(unsigned int millivolts) ++{ ++ if (millivolts < 900) ++ return 0; ++ else if (millivolts > 3600) ++ return 0x1f; ++ ++ if (millivolts < 1500) { ++ millivolts -= 900; ++ return millivolts/25; ++ } else { ++ millivolts -= 1500; ++ return 0x18 + millivolts/300; ++ } ++} ++ ++static unsigned int dcdc_2voltage(u_int8_t bits) ++{ ++ bits &= 0x1f; ++ if ((bits & 0x18) == 0x18) ++ return 1500 + ((bits & 0x7) * 300); ++ else ++ return 900 + (bits * 25); ++} ++ ++static u_int8_t dx_voltage(unsigned int millivolts) ++{ ++ if (millivolts < 900) ++ return 0; ++ else if (millivolts > 3300) ++ return 0x18; ++ ++ millivolts -= 900; ++ return millivolts/100; ++} ++ ++static unsigned int dx_2voltage(u_int8_t bits) ++{ ++ bits &= 0x1f; ++ return 900 + (bits * 100); ++} ++ ++static const u_int8_t regulator_registers[__NUM_PCF50606_REGULATORS] = { ++ [PCF50606_REGULATOR_DCD] = PCF50606_REG_DCDC1, ++ [PCF50606_REGULATOR_DCDE] = PCF50606_REG_DCDEC1, ++ [PCF50606_REGULATOR_DCUD] = PCF50606_REG_DCUDC1, ++ [PCF50606_REGULATOR_D1REG] = PCF50606_REG_D1REGC1, ++ [PCF50606_REGULATOR_D2REG] = PCF50606_REG_D2REGC1, ++ [PCF50606_REGULATOR_D3REG] = PCF50606_REG_D3REGC1, ++ [PCF50606_REGULATOR_LPREG] = PCF50606_REG_LPREGC1, ++ [PCF50606_REGULATOR_IOREG] = PCF50606_REG_IOREGC, ++}; ++ ++int pcf50606_onoff_set(struct pcf50606_data *pcf, ++ enum pcf50606_regulator_id reg, int on) ++{ ++ u_int8_t addr; ++ ++ if (reg >= __NUM_PCF50606_REGULATORS) ++ return -EINVAL; ++ ++ /* IOREG cannot be powered off since it powers the PMU I2C */ ++ if (reg == PCF50606_REGULATOR_IOREG) ++ return -EIO; ++ ++ addr = regulator_registers[reg]; ++ ++ if (on == 0) ++ reg_set_bit_mask(pcf, addr, 0xe0, 0x00); ++ else ++ reg_set_bit_mask(pcf, addr, 0xe0, 0xe0); ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(pcf50606_onoff_set); ++ ++int pcf50606_onoff_get(struct pcf50606_data *pcf, ++ enum pcf50606_regulator_id reg) ++{ ++ u_int8_t val, addr; ++ ++ if (reg >= __NUM_PCF50606_REGULATORS) ++ return -EINVAL; ++ ++ addr = regulator_registers[reg]; ++ val = (reg_read(pcf, addr) & 0xe0) >> 5; ++ ++ /* PWREN1 = 1, PWREN2 = 1, see table 16 of datasheet */ ++ switch (val) { ++ case 0: ++ case 5: ++ return 0; ++ default: ++ return 1; ++ } ++} ++EXPORT_SYMBOL_GPL(pcf50606_onoff_get); ++ ++int pcf50606_voltage_set(struct pcf50606_data *pcf, ++ enum pcf50606_regulator_id reg, ++ unsigned int millivolts) ++{ ++ u_int8_t volt_bits; ++ u_int8_t regnr; ++ int rc; ++ ++ dev_dbg(&pcf->client.dev, "pcf=%p, reg=%d, mvolts=%d\n", pcf, reg, ++ millivolts); ++ ++ if (reg >= __NUM_PCF50606_REGULATORS) ++ return -EINVAL; ++ ++ if (millivolts > pcf->pdata->rails[reg].voltage.max) ++ return -EINVAL; ++ ++ switch (reg) { ++ case PCF50606_REGULATOR_DCD: ++ volt_bits = dcdc_voltage(millivolts); ++ rc = reg_set_bit_mask(pcf, PCF50606_REG_DCDC1, 0x1f, ++ volt_bits); ++ break; ++ case PCF50606_REGULATOR_DCDE: ++ volt_bits = dcdec_voltage(millivolts); ++ rc = reg_set_bit_mask(pcf, PCF50606_REG_DCDEC1, 0x0f, ++ volt_bits); ++ break; ++ case PCF50606_REGULATOR_DCUD: ++ volt_bits = dcudc_voltage(millivolts); ++ rc = reg_set_bit_mask(pcf, PCF50606_REG_DCUDC1, 0x1f, ++ volt_bits); ++ break; ++ case PCF50606_REGULATOR_D1REG: ++ case PCF50606_REGULATOR_D2REG: ++ case PCF50606_REGULATOR_D3REG: ++ regnr = PCF50606_REG_D1REGC1 + (reg - PCF50606_REGULATOR_D1REG); ++ volt_bits = dx_voltage(millivolts); ++ rc = reg_set_bit_mask(pcf, regnr, 0x1f, volt_bits); ++ break; ++ case PCF50606_REGULATOR_LPREG: ++ volt_bits = dx_voltage(millivolts); ++ rc = reg_set_bit_mask(pcf, PCF50606_REG_LPREGC1, 0x1f, ++ volt_bits); ++ break; ++ case PCF50606_REGULATOR_IOREG: ++ if (millivolts < 1800) ++ return -EINVAL; ++ volt_bits = dx_voltage(millivolts); ++ rc = reg_set_bit_mask(pcf, PCF50606_REG_IOREGC, 0x1f, ++ volt_bits); ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ return rc; ++} ++EXPORT_SYMBOL_GPL(pcf50606_voltage_set); ++ ++unsigned int pcf50606_voltage_get(struct pcf50606_data *pcf, ++ enum pcf50606_regulator_id reg) ++{ ++ u_int8_t volt_bits; ++ u_int8_t regnr; ++ unsigned int rc = 0; ++ ++ if (reg >= __NUM_PCF50606_REGULATORS) ++ return -EINVAL; ++ ++ switch (reg) { ++ case PCF50606_REGULATOR_DCD: ++ volt_bits = reg_read(pcf, PCF50606_REG_DCDC1) & 0x1f; ++ rc = dcdc_2voltage(volt_bits); ++ break; ++ case PCF50606_REGULATOR_DCDE: ++ volt_bits = reg_read(pcf, PCF50606_REG_DCDEC1) & 0x0f; ++ rc = dcdec_2voltage(volt_bits); ++ break; ++ case PCF50606_REGULATOR_DCUD: ++ volt_bits = reg_read(pcf, PCF50606_REG_DCUDC1) & 0x1f; ++ rc = dcudc_2voltage(volt_bits); ++ break; ++ case PCF50606_REGULATOR_D1REG: ++ case PCF50606_REGULATOR_D2REG: ++ case PCF50606_REGULATOR_D3REG: ++ regnr = PCF50606_REG_D1REGC1 + (reg - PCF50606_REGULATOR_D1REG); ++ volt_bits = reg_read(pcf, regnr) & 0x1f; ++ if (volt_bits > 0x18) ++ volt_bits = 0x18; ++ rc = dx_2voltage(volt_bits); ++ break; ++ case PCF50606_REGULATOR_LPREG: ++ volt_bits = reg_read(pcf, PCF50606_REG_LPREGC1) & 0x1f; ++ if (volt_bits > 0x18) ++ volt_bits = 0x18; ++ rc = dx_2voltage(volt_bits); ++ break; ++ case PCF50606_REGULATOR_IOREG: ++ volt_bits = reg_read(pcf, PCF50606_REG_IOREGC) & 0x1f; ++ if (volt_bits > 0x18) ++ volt_bits = 0x18; ++ rc = dx_2voltage(volt_bits); ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ return rc; ++} ++EXPORT_SYMBOL_GPL(pcf50606_voltage_get); ++ ++/* go into 'STANDBY' mode, i.e. power off the main CPU and peripherals */ ++void pcf50606_go_standby(void) ++{ ++ reg_write(pcf50606_global, PCF50606_REG_OOCC1, ++ PCF50606_OOCC1_GOSTDBY); ++} ++EXPORT_SYMBOL_GPL(pcf50606_go_standby); ++ ++void pcf50606_gpo0_set(struct pcf50606_data *pcf, int on) ++{ ++ u_int8_t val; ++ ++ if (on) ++ val = 0x07; ++ else ++ val = 0x0f; ++ ++ reg_set_bit_mask(pcf, PCF50606_REG_GPOC1, 0x0f, val); ++} ++EXPORT_SYMBOL_GPL(pcf50606_gpo0_set); ++ ++int pcf50606_gpo0_get(struct pcf50606_data *pcf) ++{ ++ u_int8_t reg = reg_read(pcf, PCF50606_REG_GPOC1) & 0x0f; ++ ++ if (reg == 0x07 || reg == 0x08) ++ return 1; ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(pcf50606_gpo0_get); ++ ++static void pcf50606_work(struct work_struct *work) ++{ ++ struct pcf50606_data *pcf = ++ container_of(work, struct pcf50606_data, work); ++ u_int8_t pcfirq[3]; ++ int ret; ++ ++ mutex_lock(&pcf->working_lock); ++ pcf->working = 1; ++ /* ++ * p35 pcf50606 datasheet rev 2.2: ++ * ''The system controller shall read all interrupt registers in ++ * one I2C read action'' ++ * because if you don't INT# gets stuck asserted forever after a ++ * while ++ */ ++ ret = i2c_smbus_read_i2c_block_data(&pcf->client, PCF50606_REG_INT1, 3, ++ pcfirq); ++ if (ret != 3) ++ DEBUGPC("Oh crap PMU IRQ register read failed %d\n", ret); ++ ++ dev_dbg(&pcf->client.dev, "INT1=0x%02x INT2=0x%02x INT3=0x%02x:", ++ pcfirq[0], pcfirq[1], pcfirq[2]); ++ ++ if (pcfirq[0] & PCF50606_INT1_ONKEYF) { ++ /* ONKEY falling edge (start of button press) */ ++ DEBUGPC("ONKEYF "); ++ pcf->flags |= PCF50606_F_PWR_PRESSED; ++ input_report_key(pcf->input_dev, KEY_POWER, 1); ++ } ++ if (pcfirq[0] & PCF50606_INT1_ONKEY1S) { ++ /* ONKEY pressed for more than 1 second */ ++ pcf->onkey_seconds = 0; ++ DEBUGPC("ONKEY1S "); ++ /* Tell PMU we are taking care of this */ ++ reg_set_bit_mask(pcf, PCF50606_REG_OOCC1, ++ PCF50606_OOCC1_TOTRST, ++ PCF50606_OOCC1_TOTRST); ++ /* enable SECOND interrupt (hz tick) */ ++ reg_clear_bits(pcf, PCF50606_REG_INT1M, PCF50606_INT1_SECOND); ++ } ++ if (pcfirq[0] & PCF50606_INT1_ONKEYR) { ++ /* ONKEY rising edge (end of button press) */ ++ DEBUGPC("ONKEYR "); ++ pcf->flags &= ~PCF50606_F_PWR_PRESSED; ++ pcf->onkey_seconds = -1; ++ input_report_key(pcf->input_dev, KEY_POWER, 0); ++ /* disable SECOND interrupt in case RTC didn't ++ * request it */ ++ if (!(pcf->flags & PCF50606_F_RTC_SECOND)) ++ reg_set_bit_mask(pcf, PCF50606_REG_INT1M, ++ PCF50606_INT1_SECOND, ++ PCF50606_INT1_SECOND); ++ } ++ if (pcfirq[0] & PCF50606_INT1_EXTONR) { ++ DEBUGPC("EXTONR "); ++ input_report_key(pcf->input_dev, KEY_POWER2, 1); ++ } ++ if (pcfirq[0] & PCF50606_INT1_EXTONF) { ++ DEBUGPC("EXTONF "); ++ input_report_key(pcf->input_dev, KEY_POWER2, 0); ++ } ++ if (pcfirq[0] & PCF50606_INT1_SECOND) { ++ DEBUGPC("SECOND "); ++ if (pcf->flags & PCF50606_F_RTC_SECOND) ++ rtc_update_irq(pcf->rtc, 1, ++ RTC_PF | RTC_IRQF); ++ ++ if (pcf->onkey_seconds >= 0 && ++ pcf->flags & PCF50606_F_PWR_PRESSED) { ++ DEBUGPC("ONKEY_SECONDS(%u, OOCC1=0x%02x) ", ++ pcf->onkey_seconds, ++ reg_read(pcf, PCF50606_REG_OOCC1)); ++ pcf->onkey_seconds++; ++ if (pcf->onkey_seconds >= ++ pcf->pdata->onkey_seconds_required) { ++ /* Ask init to do 'ctrlaltdel' */ ++ DEBUGPC("SIGINT(init) "); ++ kill_proc(1, SIGINT, 1); ++ /* FIXME: what to do if userspace doesn't ++ * shut down? Do we want to force it? */ ++ } ++ } ++ } ++ if (pcfirq[0] & PCF50606_INT1_ALARM) { ++ DEBUGPC("ALARM "); ++ if (pcf->pdata->used_features & PCF50606_FEAT_RTC) ++ rtc_update_irq(pcf->rtc, 1, ++ RTC_AF | RTC_IRQF); ++ } ++ ++ if (pcfirq[1] & PCF50606_INT2_CHGINS) { ++ /* Charger inserted */ ++ DEBUGPC("CHGINS "); ++ input_report_key(pcf->input_dev, KEY_BATTERY, 1); ++ apm_queue_event(APM_POWER_STATUS_CHANGE); ++ pcf->flags |= PCF50606_F_CHG_PRESENT; ++ if (pcf->pdata->cb) ++ pcf->pdata->cb(&pcf->client.dev, ++ PCF50606_FEAT_MBC, PMU_EVT_INSERT); ++ /* FIXME: how to signal this to userspace */ ++ } ++ if (pcfirq[1] & PCF50606_INT2_CHGRM) { ++ /* Charger removed */ ++ DEBUGPC("CHGRM "); ++ input_report_key(pcf->input_dev, KEY_BATTERY, 0); ++ apm_queue_event(APM_POWER_STATUS_CHANGE); ++ pcf->flags &= ~(PCF50606_F_CHG_MASK|PCF50606_F_CHG_PRESENT); ++ if (pcf->pdata->cb) ++ pcf->pdata->cb(&pcf->client.dev, ++ PCF50606_FEAT_MBC, PMU_EVT_INSERT); ++ /* FIXME: how signal this to userspace */ ++ } ++ if (pcfirq[1] & PCF50606_INT2_CHGFOK) { ++ /* Battery ready for fast charging */ ++ DEBUGPC("CHGFOK "); ++ pcf->flags |= PCF50606_F_CHG_FOK; ++ /* FIXME: how to signal this to userspace */ ++ } ++ if (pcfirq[1] & PCF50606_INT2_CHGERR) { ++ /* Error in charge mode */ ++ DEBUGPC("CHGERR "); ++ pcf->flags |= PCF50606_F_CHG_ERR; ++ pcf->flags &= ~(PCF50606_F_CHG_FOK|PCF50606_F_CHG_READY); ++ /* FIXME: how to signal this to userspace */ ++ } ++ if (pcfirq[1] & PCF50606_INT2_CHGFRDY) { ++ /* Fast charge completed */ ++ DEBUGPC("CHGFRDY "); ++ pcf->flags |= PCF50606_F_CHG_READY; ++ pcf->flags &= ~PCF50606_F_CHG_FOK; ++ /* FIXME: how to signal this to userspace */ ++ } ++ if (pcfirq[1] & PCF50606_INT2_CHGPROT) { ++ /* Charging protection interrupt */ ++ DEBUGPC("CHGPROT "); ++ pcf->flags &= ~(PCF50606_F_CHG_FOK|PCF50606_F_CHG_READY); ++ /* FIXME: signal this to userspace */ ++ } ++ if (pcfirq[1] & PCF50606_INT2_CHGWD10S) { ++ /* Charger watchdog will expire in 10 seconds */ ++ DEBUGPC("CHGWD10S "); ++ reg_set_bit_mask(pcf, PCF50606_REG_OOCC1, ++ PCF50606_OOCC1_WDTRST, ++ PCF50606_OOCC1_WDTRST); ++ } ++ if (pcfirq[1] & PCF50606_INT2_CHGWDEXP) { ++ /* Charger watchdog expires */ ++ DEBUGPC("CHGWDEXP "); ++ /* FIXME: how to signal this to userspace */ ++ } ++ ++ if (pcfirq[2] & PCF50606_INT3_ADCRDY) { ++ /* ADC result ready */ ++ DEBUGPC("ADCRDY "); ++ } ++ if (pcfirq[2] & PCF50606_INT3_ACDINS) { ++ /* Accessory insertion detected */ ++ DEBUGPC("ACDINS "); ++ if (pcf->pdata->cb) ++ pcf->pdata->cb(&pcf->client.dev, ++ PCF50606_FEAT_ACD, PMU_EVT_INSERT); ++ } ++ if (pcfirq[2] & PCF50606_INT3_ACDREM) { ++ /* Accessory removal detected */ ++ DEBUGPC("ACDREM "); ++ if (pcf->pdata->cb) ++ pcf->pdata->cb(&pcf->client.dev, ++ PCF50606_FEAT_ACD, PMU_EVT_REMOVE); ++ } ++ /* FIXME: TSCPRES */ ++ if (pcfirq[2] & PCF50606_INT3_LOWBAT) { ++ /* Really low battery voltage, we have 8 seconds left */ ++ DEBUGPC("LOWBAT "); ++ apm_queue_event(APM_LOW_BATTERY); ++ DEBUGPC("SIGPWR(init) "); ++ kill_proc(1, SIGPWR, 1); ++ /* Tell PMU we are taking care of this */ ++ reg_set_bit_mask(pcf, PCF50606_REG_OOCC1, ++ PCF50606_OOCC1_TOTRST, ++ PCF50606_OOCC1_TOTRST); ++ } ++ if (pcfirq[2] & PCF50606_INT3_HIGHTMP) { ++ /* High temperature */ ++ DEBUGPC("HIGHTMP "); ++ apm_queue_event(APM_CRITICAL_SUSPEND); ++ } ++ ++ DEBUGPC("\n"); ++ ++ pcf->working = 0; ++ input_sync(pcf->input_dev); ++ put_device(&pcf->client.dev); ++ mutex_unlock(&pcf->working_lock); ++} ++ ++static irqreturn_t pcf50606_irq(int irq, void *_pcf) ++{ ++ struct pcf50606_data *pcf = _pcf; ++ ++ dev_dbg(&pcf->client.dev, "entering(irq=%u, pcf=%p): scheduling work\n", ++ irq, _pcf); ++ get_device(&pcf->client.dev); ++ if (!schedule_work(&pcf->work) && !pcf->working) ++ dev_dbg(&pcf->client.dev, "work item may be lost\n"); ++ ++ return IRQ_HANDLED; ++} ++ ++static u_int16_t adc_to_batt_millivolts(u_int16_t adc) ++{ ++ u_int16_t mvolts; ++ ++ mvolts = (adc * 6000) / 1024; ++ ++ return mvolts; ++} ++ ++#define BATTVOLT_SCALE_START 2800 ++#define BATTVOLT_SCALE_END 4200 ++#define BATTVOLT_SCALE_DIVIDER ((BATTVOLT_SCALE_END - BATTVOLT_SCALE_START)/100) ++ ++static u_int8_t battvolt_scale(u_int16_t battvolt) ++{ ++ /* FIXME: this linear scale is completely bogus */ ++ u_int16_t battvolt_relative = battvolt - BATTVOLT_SCALE_START; ++ unsigned int percent = battvolt_relative / BATTVOLT_SCALE_DIVIDER; ++ ++ return percent; ++} ++ ++u_int16_t pcf50606_battvolt(struct pcf50606_data *pcf) ++{ ++ u_int16_t adc; ++ adc = adc_read(pcf, PCF50606_ADCMUX_BATVOLT_RES, NULL); ++ ++ return adc_to_batt_millivolts(adc); ++} ++EXPORT_SYMBOL_GPL(pcf50606_battvolt); ++ ++static ssize_t show_battvolt(struct device *dev, struct device_attribute *attr, ++ char *buf) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct pcf50606_data *pcf = i2c_get_clientdata(client); ++ ++ return sprintf(buf, "%u\n", pcf50606_battvolt(pcf)); ++} ++static DEVICE_ATTR(battvolt, S_IRUGO | S_IWUSR, show_battvolt, NULL); ++ ++static int reg_id_by_name(const char *name) ++{ ++ int reg_id; ++ ++ if (!strcmp(name, "voltage_dcd")) ++ reg_id = PCF50606_REGULATOR_DCD; ++ else if (!strcmp(name, "voltage_dcde")) ++ reg_id = PCF50606_REGULATOR_DCDE; ++ else if (!strcmp(name, "voltage_dcud")) ++ reg_id = PCF50606_REGULATOR_DCUD; ++ else if (!strcmp(name, "voltage_d1reg")) ++ reg_id = PCF50606_REGULATOR_D1REG; ++ else if (!strcmp(name, "voltage_d2reg")) ++ reg_id = PCF50606_REGULATOR_D2REG; ++ else if (!strcmp(name, "voltage_d3reg")) ++ reg_id = PCF50606_REGULATOR_D3REG; ++ else if (!strcmp(name, "voltage_lpreg")) ++ reg_id = PCF50606_REGULATOR_LPREG; ++ else if (!strcmp(name, "voltage_ioreg")) ++ reg_id = PCF50606_REGULATOR_IOREG; ++ else ++ reg_id = -1; ++ ++ return reg_id; ++} ++ ++static ssize_t show_vreg(struct device *dev, struct device_attribute *attr, ++ char *buf) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct pcf50606_data *pcf = i2c_get_clientdata(client); ++ unsigned int reg_id; ++ ++ reg_id = reg_id_by_name(attr->attr.name); ++ if (reg_id < 0) ++ return 0; ++ ++ if (pcf50606_onoff_get(pcf, reg_id) > 0) ++ return sprintf(buf, "%u\n", pcf50606_voltage_get(pcf, reg_id)); ++ else ++ return strlcpy(buf, "0\n", PAGE_SIZE); ++} ++ ++static ssize_t set_vreg(struct device *dev, struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct pcf50606_data *pcf = i2c_get_clientdata(client); ++ unsigned long mvolts = simple_strtoul(buf, NULL, 10); ++ unsigned int reg_id; ++ ++ reg_id = reg_id_by_name(attr->attr.name); ++ if (reg_id < 0) ++ return -EIO; ++ ++ dev_dbg(dev, "attempting to set %s(%d) to %lu mvolts\n", ++ attr->attr.name, reg_id, mvolts); ++ ++ if (mvolts == 0) { ++ pcf50606_onoff_set(pcf, reg_id, 0); ++ } else { ++ if (pcf50606_voltage_set(pcf, reg_id, mvolts) < 0) { ++ dev_warn(dev, "refusing to set %s(%d) to %lu mvolts " ++ "(max=%u)\n", attr->attr.name, reg_id, mvolts, ++ pcf->pdata->rails[reg_id].voltage.max); ++ return -EINVAL; ++ } ++ pcf50606_onoff_set(pcf, reg_id, 1); ++ } ++ ++ return count; ++} ++ ++static DEVICE_ATTR(voltage_dcd, S_IRUGO | S_IWUSR, show_vreg, set_vreg); ++static DEVICE_ATTR(voltage_dcde, S_IRUGO | S_IWUSR, show_vreg, set_vreg); ++static DEVICE_ATTR(voltage_dcud, S_IRUGO | S_IWUSR, show_vreg, set_vreg); ++static DEVICE_ATTR(voltage_d1reg, S_IRUGO | S_IWUSR, show_vreg, set_vreg); ++static DEVICE_ATTR(voltage_d2reg, S_IRUGO | S_IWUSR, show_vreg, set_vreg); ++static DEVICE_ATTR(voltage_d3reg, S_IRUGO | S_IWUSR, show_vreg, set_vreg); ++static DEVICE_ATTR(voltage_lpreg, S_IRUGO | S_IWUSR, show_vreg, set_vreg); ++static DEVICE_ATTR(voltage_ioreg, S_IRUGO | S_IWUSR, show_vreg, set_vreg); ++ ++/*********************************************************************** ++ * Charger Control ++ ***********************************************************************/ ++ ++/* Enable/disable fast charging (500mA in the GTA01) */ ++void pcf50606_charge_fast(struct pcf50606_data *pcf, int on) ++{ ++ if (!(pcf->pdata->used_features & PCF50606_FEAT_MBC)) ++ return; ++ ++ if (on) { ++ /* We can allow PCF to automatically charge ++ * using Ifast */ ++ pcf->flags |= PCF50606_F_CHG_FAST; ++ reg_set_bit_mask(pcf, PCF50606_REG_MBCC1, ++ PCF50606_MBCC1_AUTOFST, ++ PCF50606_MBCC1_AUTOFST); ++ } else { ++ pcf->flags &= ~PCF50606_F_CHG_FAST; ++ /* disable automatic fast-charge */ ++ reg_clear_bits(pcf, PCF50606_REG_MBCC1, ++ PCF50606_MBCC1_AUTOFST); ++ /* switch to idle mode to abort existing charge ++ * process */ ++ reg_set_bit_mask(pcf, PCF50606_REG_MBCC1, ++ PCF50606_MBCC1_CHGMOD_MASK, ++ PCF50606_MBCC1_CHGMOD_IDLE); ++ } ++} ++EXPORT_SYMBOL_GPL(pcf50606_charge_fast); ++ ++static inline u_int16_t adc_to_rntc(struct pcf50606_data *pcf, u_int16_t adc) ++{ ++ u_int32_t r_ntc = (adc * (u_int32_t)pcf->pdata->r_fix_batt) / (1023 - adc); ++ ++ return r_ntc; ++} ++ ++static inline int16_t rntc_to_temp(u_int16_t rntc) ++{ ++ int i; ++ ++ for (i = 0; i < ARRAY_SIZE(ntc_table_10k_3370B); i++) { ++ if (rntc > ntc_table_10k_3370B[i]) ++ return i - 10; /* First element is -10 */ ++ } ++ return -99; /* Below our range */ ++} ++ ++static ssize_t show_battemp(struct device *dev, struct device_attribute *attr, ++ char *buf) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct pcf50606_data *pcf = i2c_get_clientdata(client); ++ u_int16_t adc; ++ ++ adc = adc_read(pcf, PCF50606_ADCMUX_BATTEMP, NULL); ++ ++ return sprintf(buf, "%d\n", rntc_to_temp(adc_to_rntc(pcf, adc))); ++} ++static DEVICE_ATTR(battemp, S_IRUGO | S_IWUSR, show_battemp, NULL); ++ ++static inline int16_t adc_to_chg_milliamps(struct pcf50606_data *pcf, ++ u_int16_t adc_adcin1, ++ u_int16_t adc_batvolt) ++{ ++ int32_t res = (adc_adcin1 - adc_batvolt) * 2400; ++ return (res * 1000) / (pcf->pdata->r_sense_milli * 1024); ++} ++ ++static ssize_t show_chgcur(struct device *dev, struct device_attribute *attr, ++ char *buf) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct pcf50606_data *pcf = i2c_get_clientdata(client); ++ u_int16_t adc_batvolt, adc_adcin1; ++ int16_t ma; ++ ++ adc_batvolt = adc_read(pcf, PCF50606_ADCMUX_BATVOLT_ADCIN1, ++ &adc_adcin1); ++ ma = adc_to_chg_milliamps(pcf, adc_adcin1, adc_batvolt); ++ ++ return sprintf(buf, "%d\n", ma); ++} ++static DEVICE_ATTR(chgcur, S_IRUGO | S_IWUSR, show_chgcur, NULL); ++ ++static const char *chgmode_names[] = { ++ [PCF50606_MBCC1_CHGMOD_QUAL] = "qualification", ++ [PCF50606_MBCC1_CHGMOD_PRE] = "pre", ++ [PCF50606_MBCC1_CHGMOD_TRICKLE] = "trickle", ++ [PCF50606_MBCC1_CHGMOD_FAST_CCCV] = "fast_cccv", ++ [PCF50606_MBCC1_CHGMOD_FAST_NOCC] = "fast_nocc", ++ [PCF50606_MBCC1_CHGMOD_FAST_NOCV] = "fast_nocv", ++ [PCF50606_MBCC1_CHGMOD_FAST_SW] = "fast_switch", ++ [PCF50606_MBCC1_CHGMOD_IDLE] = "idle", ++}; ++ ++static ssize_t show_chgmode(struct device *dev, struct device_attribute *attr, ++ char *buf) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct pcf50606_data *pcf = i2c_get_clientdata(client); ++ u_int8_t mbcc1 = reg_read(pcf, PCF50606_REG_MBCC1); ++ u_int8_t chgmod = (mbcc1 & PCF50606_MBCC1_CHGMOD_MASK); ++ ++ return sprintf(buf, "%s\n", chgmode_names[chgmod]); ++} ++ ++static ssize_t set_chgmode(struct device *dev, struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct pcf50606_data *pcf = i2c_get_clientdata(client); ++ u_int8_t mbcc1 = reg_read(pcf, PCF50606_REG_MBCC1); ++ ++ mbcc1 &= ~PCF50606_MBCC1_CHGMOD_MASK; ++ ++ if (!strcmp(buf, "qualification")) ++ mbcc1 |= PCF50606_MBCC1_CHGMOD_QUAL; ++ else if (!strcmp(buf, "pre")) ++ mbcc1 |= PCF50606_MBCC1_CHGMOD_PRE; ++ else if (!strcmp(buf, "trickle")) ++ mbcc1 |= PCF50606_MBCC1_CHGMOD_TRICKLE; ++ else if (!strcmp(buf, "fast_cccv")) ++ mbcc1 |= PCF50606_MBCC1_CHGMOD_FAST_CCCV; ++ /* We don't allow the other fast modes for security reasons */ ++ else if (!strcmp(buf, "idle")) ++ mbcc1 |= PCF50606_MBCC1_CHGMOD_IDLE; ++ else ++ return -EINVAL; ++ ++ reg_write(pcf, PCF50606_REG_MBCC1, mbcc1); ++ ++ return count; ++} ++ ++static DEVICE_ATTR(chgmode, S_IRUGO | S_IWUSR, show_chgmode, set_chgmode); ++ ++static const char *chgstate_names[] = { ++ [PCF50606_F_CHG_FAST] = "fast_enabled", ++ [PCF50606_F_CHG_PRESENT] = "present", ++ [PCF50606_F_CHG_FOK] = "fast_ok", ++ [PCF50606_F_CHG_ERR] = "error", ++ [PCF50606_F_CHG_PROT] = "protection", ++ [PCF50606_F_CHG_READY] = "ready", ++}; ++ ++static ssize_t show_chgstate(struct device *dev, struct device_attribute *attr, ++ char *buf) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct pcf50606_data *pcf = i2c_get_clientdata(client); ++ char *b = buf; ++ int i; ++ ++ for (i = 0; i < 32; i++) ++ if (pcf->flags & (1 << i) && i < ARRAY_SIZE(chgstate_names)) ++ b += sprintf(b, "%s ", chgstate_names[i]); ++ ++ if (b > buf) ++ b += sprintf(b, "\n"); ++ ++ return b - buf; ++} ++static DEVICE_ATTR(chgstate, S_IRUGO | S_IWUSR, show_chgstate, NULL); ++ ++/*********************************************************************** ++ * APM emulation ++ ***********************************************************************/ ++ ++static void pcf50606_get_power_status(struct apm_power_info *info) ++{ ++ struct pcf50606_data *pcf = pcf50606_global; ++ u_int8_t mbcc1 = reg_read(pcf, PCF50606_REG_MBCC1); ++ u_int8_t chgmod = mbcc1 & PCF50606_MBCC1_CHGMOD_MASK; ++ u_int16_t battvolt = pcf50606_battvolt(pcf); ++ ++ if (reg_read(pcf, PCF50606_REG_OOCS) & PCF50606_OOCS_EXTON) ++ info->ac_line_status = APM_AC_ONLINE; ++ else ++ info->ac_line_status = APM_AC_OFFLINE; ++ ++ switch (chgmod) { ++ case PCF50606_MBCC1_CHGMOD_QUAL: ++ case PCF50606_MBCC1_CHGMOD_PRE: ++ case PCF50606_MBCC1_CHGMOD_IDLE: ++ info->battery_life = battvolt_scale(battvolt); ++ break; ++ default: ++ info->battery_status = APM_BATTERY_STATUS_CHARGING; ++ info->battery_flag = APM_BATTERY_FLAG_CHARGING; ++ break; ++ } ++} ++ ++/*********************************************************************** ++ * RTC ++ ***********************************************************************/ ++ ++struct pcf50606_time { ++ u_int8_t sec; ++ u_int8_t min; ++ u_int8_t hour; ++ u_int8_t wkday; ++ u_int8_t day; ++ u_int8_t month; ++ u_int8_t year; ++}; ++ ++static void pcf2rtc_time(struct rtc_time *rtc, struct pcf50606_time *pcf) ++{ ++ rtc->tm_sec = BCD2BIN(pcf->sec); ++ rtc->tm_min = BCD2BIN(pcf->min); ++ rtc->tm_hour = BCD2BIN(pcf->hour); ++ rtc->tm_wday = BCD2BIN(pcf->wkday); ++ rtc->tm_mday = BCD2BIN(pcf->day); ++ rtc->tm_mon = BCD2BIN(pcf->month); ++ rtc->tm_year = BCD2BIN(pcf->year) + 100; ++} ++ ++static void rtc2pcf_time(struct pcf50606_time *pcf, struct rtc_time *rtc) ++{ ++ pcf->sec = BIN2BCD(rtc->tm_sec); ++ pcf->min = BIN2BCD(rtc->tm_min); ++ pcf->hour = BIN2BCD(rtc->tm_hour); ++ pcf->wkday = BIN2BCD(rtc->tm_wday); ++ pcf->day = BIN2BCD(rtc->tm_mday); ++ pcf->month = BIN2BCD(rtc->tm_mon); ++ pcf->year = BIN2BCD(rtc->tm_year - 100); ++} ++ ++static int pcf50606_rtc_ioctl(struct device *dev, unsigned int cmd, ++ unsigned long arg) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct pcf50606_data *pcf = i2c_get_clientdata(client); ++ switch (cmd) { ++ case RTC_PIE_OFF: ++ /* disable periodic interrupt (hz tick) */ ++ pcf->flags &= ~PCF50606_F_RTC_SECOND; ++ reg_set_bit_mask(pcf, PCF50606_REG_INT1M, ++ PCF50606_INT1_SECOND, PCF50606_INT1_SECOND); ++ return 0; ++ case RTC_PIE_ON: ++ /* ensable periodic interrupt (hz tick) */ ++ pcf->flags |= PCF50606_F_RTC_SECOND; ++ reg_clear_bits(pcf, PCF50606_REG_INT1M, PCF50606_INT1_SECOND); ++ return 0; ++ } ++ return -ENOIOCTLCMD; ++} ++ ++static int pcf50606_rtc_read_time(struct device *dev, struct rtc_time *tm) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct pcf50606_data *pcf = i2c_get_clientdata(client); ++ struct pcf50606_time pcf_tm; ++ ++ mutex_lock(&pcf->lock); ++ pcf_tm.sec = __reg_read(pcf, PCF50606_REG_RTCSC); ++ pcf_tm.min = __reg_read(pcf, PCF50606_REG_RTCMN); ++ pcf_tm.hour = __reg_read(pcf, PCF50606_REG_RTCHR); ++ pcf_tm.wkday = __reg_read(pcf, PCF50606_REG_RTCWD); ++ pcf_tm.day = __reg_read(pcf, PCF50606_REG_RTCDT); ++ pcf_tm.month = __reg_read(pcf, PCF50606_REG_RTCMT); ++ pcf_tm.year = __reg_read(pcf, PCF50606_REG_RTCYR); ++ mutex_unlock(&pcf->lock); ++ ++ dev_dbg(dev, "PCF_TIME: %02x.%02x.%02x %02x:%02x:%02x\n", ++ pcf_tm.day, pcf_tm.month, pcf_tm.year, ++ pcf_tm.hour, pcf_tm.min, pcf_tm.sec); ++ ++ pcf2rtc_time(tm, &pcf_tm); ++ ++ dev_dbg(dev, "RTC_TIME: %u.%u.%u %u:%u:%u\n", ++ tm->tm_mday, tm->tm_mon, tm->tm_year, ++ tm->tm_hour, tm->tm_min, tm->tm_sec); ++ ++ return 0; ++} ++ ++static int pcf50606_rtc_set_time(struct device *dev, struct rtc_time *tm) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct pcf50606_data *pcf = i2c_get_clientdata(client); ++ struct pcf50606_time pcf_tm; ++ u_int8_t int1m; ++ ++ dev_dbg(dev, "RTC_TIME: %u.%u.%u %u:%u:%u\n", ++ tm->tm_mday, tm->tm_mon, tm->tm_year, ++ tm->tm_hour, tm->tm_min, tm->tm_sec); ++ rtc2pcf_time(&pcf_tm, tm); ++ dev_dbg(dev, "PCF_TIME: %02x.%02x.%02x %02x:%02x:%02x\n", ++ pcf_tm.day, pcf_tm.month, pcf_tm.year, ++ pcf_tm.hour, pcf_tm.min, pcf_tm.sec); ++ ++ mutex_lock(&pcf->lock); ++ ++ /* disable SECOND interrupt */ ++ int1m = __reg_read(pcf, PCF50606_REG_INT1M); ++ __reg_write(pcf, PCF50606_REG_INT1M, int1m | PCF50606_INT1_SECOND); ++ ++ __reg_write(pcf, PCF50606_REG_RTCSC, pcf_tm.sec); ++ __reg_write(pcf, PCF50606_REG_RTCMN, pcf_tm.min); ++ __reg_write(pcf, PCF50606_REG_RTCHR, pcf_tm.hour); ++ __reg_write(pcf, PCF50606_REG_RTCWD, pcf_tm.wkday); ++ __reg_write(pcf, PCF50606_REG_RTCDT, pcf_tm.day); ++ __reg_write(pcf, PCF50606_REG_RTCMT, pcf_tm.month); ++ __reg_write(pcf, PCF50606_REG_RTCYR, pcf_tm.year); ++ ++ /* restore INT1M, potentially re-enable SECOND interrupt */ ++ __reg_write(pcf, PCF50606_REG_INT1M, int1m); ++ ++ mutex_unlock(&pcf->lock); ++ ++ return 0; ++} ++ ++static int pcf50606_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct pcf50606_data *pcf = i2c_get_clientdata(client); ++ struct pcf50606_time pcf_tm; ++ ++ mutex_lock(&pcf->lock); ++ alrm->enabled = ++ __reg_read(pcf, PCF50606_REG_INT1M) & PCF50606_INT1_ALARM ? 0 : 1; ++ pcf_tm.sec = __reg_read(pcf, PCF50606_REG_RTCSCA); ++ pcf_tm.min = __reg_read(pcf, PCF50606_REG_RTCMNA); ++ pcf_tm.hour = __reg_read(pcf, PCF50606_REG_RTCHRA); ++ pcf_tm.wkday = __reg_read(pcf, PCF50606_REG_RTCWDA); ++ pcf_tm.day = __reg_read(pcf, PCF50606_REG_RTCDTA); ++ pcf_tm.month = __reg_read(pcf, PCF50606_REG_RTCMTA); ++ pcf_tm.year = __reg_read(pcf, PCF50606_REG_RTCYRA); ++ mutex_unlock(&pcf->lock); ++ ++ pcf2rtc_time(&alrm->time, &pcf_tm); ++ ++ return 0; ++} ++ ++static int pcf50606_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct pcf50606_data *pcf = i2c_get_clientdata(client); ++ struct pcf50606_time pcf_tm; ++ u_int8_t irqmask; ++ ++ rtc2pcf_time(&pcf_tm, &alrm->time); ++ ++ mutex_lock(&pcf->lock); ++ ++ /* disable alarm interrupt */ ++ irqmask = __reg_read(pcf, PCF50606_REG_INT1M); ++ irqmask |= PCF50606_INT1_ALARM; ++ __reg_write(pcf, PCF50606_REG_INT1M, irqmask); ++ ++ __reg_write(pcf, PCF50606_REG_RTCSCA, pcf_tm.sec); ++ __reg_write(pcf, PCF50606_REG_RTCMNA, pcf_tm.min); ++ __reg_write(pcf, PCF50606_REG_RTCHRA, pcf_tm.hour); ++ __reg_write(pcf, PCF50606_REG_RTCWDA, pcf_tm.wkday); ++ __reg_write(pcf, PCF50606_REG_RTCDTA, pcf_tm.day); ++ __reg_write(pcf, PCF50606_REG_RTCMTA, pcf_tm.month); ++ __reg_write(pcf, PCF50606_REG_RTCYRA, pcf_tm.year); ++ ++ if (alrm->enabled) { ++ /* (re-)enaable alarm interrupt */ ++ irqmask = __reg_read(pcf, PCF50606_REG_INT1M); ++ irqmask &= ~PCF50606_INT1_ALARM; ++ __reg_write(pcf, PCF50606_REG_INT1M, irqmask); ++ } ++ ++ mutex_unlock(&pcf->lock); ++ ++ /* FIXME */ ++ return 0; ++} ++ ++static struct rtc_class_ops pcf50606_rtc_ops = { ++ .ioctl = pcf50606_rtc_ioctl, ++ .read_time = pcf50606_rtc_read_time, ++ .set_time = pcf50606_rtc_set_time, ++ .read_alarm = pcf50606_rtc_read_alarm, ++ .set_alarm = pcf50606_rtc_set_alarm, ++}; ++ ++/*********************************************************************** ++ * Watchdog ++ ***********************************************************************/ ++ ++static void pcf50606_wdt_start(struct pcf50606_data *pcf) ++{ ++ reg_set_bit_mask(pcf, PCF50606_REG_OOCC1, PCF50606_OOCC1_WDTRST, ++ PCF50606_OOCC1_WDTRST); ++} ++ ++static void pcf50606_wdt_stop(struct pcf50606_data *pcf) ++{ ++ reg_clear_bits(pcf, PCF50606_REG_OOCS, PCF50606_OOCS_WDTEXP); ++} ++ ++static void pcf50606_wdt_keepalive(struct pcf50606_data *pcf) ++{ ++ pcf50606_wdt_start(pcf); ++} ++ ++static int pcf50606_wdt_open(struct inode *inode, struct file *file) ++{ ++ struct pcf50606_data *pcf = pcf50606_global; ++ ++ file->private_data = pcf; ++ ++ /* start the timer */ ++ pcf50606_wdt_start(pcf); ++ ++ return nonseekable_open(inode, file); ++} ++ ++static int pcf50606_wdt_release(struct inode *inode, struct file *file) ++{ ++ struct pcf50606_data *pcf = file->private_data; ++ ++ if (pcf->allow_close == CLOSE_STATE_ALLOW) ++ pcf50606_wdt_stop(pcf); ++ else { ++ printk(KERN_CRIT "Unexpected close, not stopping watchdog!\n"); ++ pcf50606_wdt_keepalive(pcf); ++ } ++ ++ pcf->allow_close = CLOSE_STATE_NOT; ++ ++ return 0; ++} ++ ++static ssize_t pcf50606_wdt_write(struct file *file, const char __user *data, ++ size_t len, loff_t *ppos) ++{ ++ struct pcf50606_data *pcf = file->private_data; ++ if (len) { ++ size_t i; ++ ++ for (i = 0; i != len; i++) { ++ char c; ++ if (get_user(c, data + i)) ++ return -EFAULT; ++ if (c == 'V') ++ pcf->allow_close = CLOSE_STATE_ALLOW; ++ } ++ pcf50606_wdt_keepalive(pcf); ++ } ++ ++ return len; ++} ++ ++static struct watchdog_info pcf50606_wdt_ident = { ++ .options = WDIOF_MAGICCLOSE, ++ .firmware_version = 0, ++ .identity = "PCF50606 Watchdog", ++}; ++ ++static int pcf50606_wdt_ioctl(struct inode *inode, struct file *file, ++ unsigned int cmd, unsigned long arg) ++{ ++ struct pcf50606_data *pcf = file->private_data; ++ void __user *argp = (void __user *)arg; ++ int __user *p = argp; ++ ++ switch (cmd) { ++ case WDIOC_GETSUPPORT: ++ return copy_to_user(argp, &pcf50606_wdt_ident, ++ sizeof(pcf50606_wdt_ident)) ? -EFAULT : 0; ++ break; ++ case WDIOC_GETSTATUS: ++ case WDIOC_GETBOOTSTATUS: ++ return put_user(0, p); ++ case WDIOC_KEEPALIVE: ++ pcf50606_wdt_keepalive(pcf); ++ return 0; ++ case WDIOC_GETTIMEOUT: ++ return put_user(8, p); ++ default: ++ return -ENOIOCTLCMD; ++ } ++} ++ ++static struct file_operations pcf50606_wdt_fops = { ++ .owner = THIS_MODULE, ++ .llseek = no_llseek, ++ .write = &pcf50606_wdt_write, ++ .ioctl = &pcf50606_wdt_ioctl, ++ .open = &pcf50606_wdt_open, ++ .release = &pcf50606_wdt_release, ++}; ++ ++static struct miscdevice pcf50606_wdt_miscdev = { ++ .minor = WATCHDOG_MINOR, ++ .name = "watchdog", ++ .fops = &pcf50606_wdt_fops, ++}; ++ ++/*********************************************************************** ++ * PWM ++ ***********************************************************************/ ++ ++static const char *pwm_dc_table[] = { ++ "0/16", "1/16", "2/16", "3/16", ++ "4/16", "5/16", "6/16", "7/16", ++ "8/16", "9/16", "10/16", "11/16", ++ "12/16", "13/16", "14/16", "15/16", ++}; ++ ++static ssize_t show_pwm_dc(struct device *dev, struct device_attribute *attr, ++ char *buf) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct pcf50606_data *pcf = i2c_get_clientdata(client); ++ u_int8_t val; ++ ++ val = reg_read(pcf, PCF50606_REG_PWMC1) >> PCF50606_PWMC1_DC_SHIFT; ++ val &= 0xf; ++ ++ return sprintf(buf, "%s\n", pwm_dc_table[val]); ++} ++ ++static ssize_t set_pwm_dc(struct device *dev, struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct pcf50606_data *pcf = i2c_get_clientdata(client); ++ u_int8_t i; ++ ++ for (i = 0; i < ARRAY_SIZE(pwm_dc_table); i++) { ++ if (!strncmp(buf, pwm_dc_table[i], strlen(pwm_dc_table[i]))) { ++ dev_dbg(dev, "setting pwm dc %s\n\r", pwm_dc_table[i]); ++ reg_set_bit_mask(pcf, PCF50606_REG_PWMC1, 0x1e, ++ (i << PCF50606_PWMC1_DC_SHIFT)); ++ } ++ } ++ return count; ++} ++ ++static DEVICE_ATTR(pwm_dc, S_IRUGO | S_IWUSR, show_pwm_dc, set_pwm_dc); ++ ++static const char *pwm_clk_table[] = { ++ "512", "256", "128", "64", ++ "56300", "28100", "14100", "7000", ++}; ++ ++static ssize_t show_pwm_clk(struct device *dev, struct device_attribute *attr, ++ char *buf) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct pcf50606_data *pcf = i2c_get_clientdata(client); ++ u_int8_t val; ++ ++ val = reg_read(pcf, PCF50606_REG_PWMC1) >> PCF50606_PWMC1_CLK_SHIFT; ++ val &= 0x7; ++ ++ return sprintf(buf, "%s\n", pwm_clk_table[val]); ++} ++ ++static ssize_t set_pwm_clk(struct device *dev, struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct pcf50606_data *pcf = i2c_get_clientdata(client); ++ u_int8_t i; ++ ++ for (i = 0; i < ARRAY_SIZE(pwm_clk_table); i++) { ++ if (!strncmp(buf, pwm_clk_table[i], strlen(pwm_clk_table[i]))) { ++ dev_dbg(dev, "setting pwm clk %s\n\r", ++ pwm_clk_table[i]); ++ reg_set_bit_mask(pcf, PCF50606_REG_PWMC1, 0xe0, ++ (i << PCF50606_PWMC1_CLK_SHIFT)); ++ } ++ } ++ return count; ++} ++ ++static DEVICE_ATTR(pwm_clk, S_IRUGO | S_IWUSR, show_pwm_clk, set_pwm_clk); ++ ++static int pcf50606bl_get_intensity(struct backlight_device *bd) ++{ ++ struct pcf50606_data *pcf = bl_get_data(bd); ++ int intensity = reg_read(pcf, PCF50606_REG_PWMC1); ++ intensity = (intensity >> PCF50606_PWMC1_DC_SHIFT); ++ ++ return intensity & 0xf; ++} ++ ++static int pcf50606bl_set_intensity(struct backlight_device *bd) ++{ ++ struct pcf50606_data *pcf = bl_get_data(bd); ++ int intensity = bd->props.brightness; ++ ++ if (bd->props.power != FB_BLANK_UNBLANK) ++ intensity = 0; ++ if (bd->props.fb_blank != FB_BLANK_UNBLANK) ++ intensity = 0; ++ ++ return reg_set_bit_mask(pcf, PCF50606_REG_PWMC1, 0x1e, ++ (intensity << PCF50606_PWMC1_DC_SHIFT)); ++} ++ ++static struct backlight_ops pcf50606bl_ops = { ++ .get_brightness = pcf50606bl_get_intensity, ++ .update_status = pcf50606bl_set_intensity, ++}; ++ ++/*********************************************************************** ++ * Driver initialization ++ ***********************************************************************/ ++ ++#ifdef CONFIG_MACH_NEO1973_GTA01 ++/* We currently place those platform devices here to make sure the device ++ * suspend/resume order is correct */ ++static struct platform_device gta01_pm_gps_dev = { ++ .name = "neo1973-pm-gps", ++}; ++ ++static struct platform_device gta01_pm_bt_dev = { ++ .name = "neo1973-pm-bt", ++}; ++#endif ++ ++static struct attribute *pcf_sysfs_entries[16] = { ++ &dev_attr_voltage_dcd.attr, ++ &dev_attr_voltage_dcde.attr, ++ &dev_attr_voltage_dcud.attr, ++ &dev_attr_voltage_d1reg.attr, ++ &dev_attr_voltage_d2reg.attr, ++ &dev_attr_voltage_d3reg.attr, ++ &dev_attr_voltage_lpreg.attr, ++ &dev_attr_voltage_ioreg.attr, ++ NULL ++}; ++ ++static struct attribute_group pcf_attr_group = { ++ .name = NULL, /* put in device directory */ ++ .attrs = pcf_sysfs_entries, ++}; ++ ++static void populate_sysfs_group(struct pcf50606_data *pcf) ++{ ++ int i = 0; ++ struct attribute **attr; ++ ++ for (attr = pcf_sysfs_entries; *attr; attr++) ++ i++; ++ ++ if (pcf->pdata->used_features & PCF50606_FEAT_MBC) { ++ pcf_sysfs_entries[i++] = &dev_attr_chgstate.attr; ++ pcf_sysfs_entries[i++] = &dev_attr_chgmode.attr; ++ } ++ ++ if (pcf->pdata->used_features & PCF50606_FEAT_CHGCUR) ++ pcf_sysfs_entries[i++] = &dev_attr_chgcur.attr; ++ ++ if (pcf->pdata->used_features & PCF50606_FEAT_BATVOLT) ++ pcf_sysfs_entries[i++] = &dev_attr_battvolt.attr; ++ ++ if (pcf->pdata->used_features & PCF50606_FEAT_BATTEMP) ++ pcf_sysfs_entries[i++] = &dev_attr_battemp.attr; ++ ++ if (pcf->pdata->used_features & PCF50606_FEAT_PWM) { ++ pcf_sysfs_entries[i++] = &dev_attr_pwm_dc.attr; ++ pcf_sysfs_entries[i++] = &dev_attr_pwm_clk.attr; ++ } ++} ++ ++static int pcf50606_detect(struct i2c_adapter *adapter, int address, int kind) ++{ ++ struct i2c_client *new_client; ++ struct pcf50606_data *data; ++ int err = 0; ++ int irq; ++ ++ if (!pcf50606_pdev) { ++ printk(KERN_ERR "pcf50606: driver needs a platform_device!\n"); ++ return -EIO; ++ } ++ ++ irq = platform_get_irq(pcf50606_pdev, 0); ++ if (irq < 0) { ++ dev_err(&pcf50606_pdev->dev, "no irq in platform resources!\n"); ++ return -EIO; ++ } ++ ++ /* At the moment, we only support one PCF50606 in a system */ ++ if (pcf50606_global) { ++ dev_err(&pcf50606_pdev->dev, ++ "currently only one chip supported\n"); ++ return -EBUSY; ++ } ++ ++ data = kzalloc(sizeof(*data), GFP_KERNEL); ++ if (!data) ++ return -ENOMEM; ++ ++ mutex_init(&data->lock); ++ mutex_init(&data->working_lock); ++ INIT_WORK(&data->work, pcf50606_work); ++ data->irq = irq; ++ data->working = 0; ++ data->onkey_seconds = -1; ++ data->pdata = pcf50606_pdev->dev.platform_data; ++ ++ new_client = &data->client; ++ i2c_set_clientdata(new_client, data); ++ new_client->addr = address; ++ new_client->adapter = adapter; ++ new_client->driver = &pcf50606_driver; ++ new_client->flags = 0; ++ strlcpy(new_client->name, "pcf50606", I2C_NAME_SIZE); ++ ++ /* now we try to detect the chip */ ++ ++ /* register with i2c core */ ++ err = i2c_attach_client(new_client); ++ if (err) { ++ dev_err(&new_client->dev, ++ "error during i2c_attach_client()\n"); ++ goto exit_free; ++ } ++ ++ populate_sysfs_group(data); ++ ++ err = sysfs_create_group(&new_client->dev.kobj, &pcf_attr_group); ++ if (err) { ++ dev_err(&new_client->dev, "error creating sysfs group\n"); ++ goto exit_detach; ++ } ++ ++ /* create virtual charger 'device' */ ++ ++ /* input device registration */ ++ data->input_dev = input_allocate_device(); ++ if (!data->input_dev) ++ goto exit_sysfs; ++ ++ data->input_dev->name = "FIC Neo1973 PMU events"; ++ data->input_dev->phys = "I2C"; ++ data->input_dev->id.bustype = BUS_I2C; ++ data->input_dev->cdev.dev = &new_client->dev; ++ ++ data->input_dev->evbit[0] = BIT(EV_KEY) | BIT(EV_PWR); ++ set_bit(KEY_POWER, data->input_dev->keybit); ++ set_bit(KEY_POWER2, data->input_dev->keybit); ++ set_bit(KEY_BATTERY, data->input_dev->keybit); ++ ++ err = input_register_device(data->input_dev); ++ if (err) ++ goto exit_sysfs; ++ ++ /* register power off handler with core power management */ ++ pm_power_off = &pcf50606_go_standby; ++ ++ /* configure interrupt mask */ ++ reg_write(data, PCF50606_REG_INT1M, PCF50606_INT1_SECOND); ++ reg_write(data, PCF50606_REG_INT2M, 0x00); ++ reg_write(data, PCF50606_REG_INT3M, PCF50606_INT3_TSCPRES); ++ ++ err = request_irq(irq, pcf50606_irq, IRQF_TRIGGER_FALLING, ++ "pcf50606", data); ++ if (err < 0) ++ goto exit_input; ++ ++ if (enable_irq_wake(irq) < 0) ++ dev_err(&new_client->dev, "IRQ %u cannot be enabled as wake-up" ++ "source in this hardware revision!", irq); ++ ++ pcf50606_global = data; ++ ++ if (data->pdata->used_features & PCF50606_FEAT_RTC) { ++ data->rtc = rtc_device_register("pcf50606", &new_client->dev, ++ &pcf50606_rtc_ops, THIS_MODULE); ++ if (IS_ERR(data->rtc)) { ++ err = PTR_ERR(data->rtc); ++ goto exit_irq; ++ } ++ } ++ ++ if (data->pdata->used_features & PCF50606_FEAT_WDT) { ++ err = misc_register(&pcf50606_wdt_miscdev); ++ if (err) { ++ dev_err(&new_client->dev, "cannot register miscdev on " ++ "minor=%d (%d)\n", WATCHDOG_MINOR, err); ++ goto exit_rtc; ++ } ++ } ++ ++ if (data->pdata->used_features & PCF50606_FEAT_PWM) { ++ /* enable PWM controller */ ++ reg_set_bit_mask(data, PCF50606_REG_PWMC1, ++ PCF50606_PWMC1_ACTSET, ++ PCF50606_PWMC1_ACTSET); ++ } ++ ++ if (data->pdata->used_features & PCF50606_FEAT_PWM_BL) { ++ data->backlight = backlight_device_register("pcf50606-bl", ++ &new_client->dev, ++ data, ++ &pcf50606bl_ops); ++ if (!data->backlight) ++ goto exit_misc; ++ data->backlight->props.max_brightness = 16; ++ data->backlight->props.power = FB_BLANK_UNBLANK; ++ data->backlight->props.brightness = ++ data->pdata->init_brightness; ++ backlight_update_status(data->backlight); ++ } ++ ++ apm_get_power_status = pcf50606_get_power_status; ++ ++#ifdef CONFIG_MACH_NEO1973_GTA01 ++ if (machine_is_neo1973_gta01()) { ++ gta01_pm_gps_dev.dev.parent = &new_client->dev; ++ switch (system_rev) { ++ case GTA01Bv2_SYSTEM_REV: ++ case GTA01Bv3_SYSTEM_REV: ++ case GTA01Bv4_SYSTEM_REV: ++ gta01_pm_bt_dev.dev.parent = &new_client->dev; ++ platform_device_register(>a01_pm_bt_dev); ++ break; ++ } ++ platform_device_register(>a01_pm_gps_dev); ++ /* a link for gllin compatibility */ ++ err = sysfs_create_link(&platform_bus_type.devices.kobj, ++ >a01_pm_gps_dev.dev.kobj, "gta01-pm-gps.0"); ++ if (err) ++ printk(KERN_ERR ++ "sysfs_create_link (gta01-pm-gps.0): %d\n", err); ++ } ++#endif ++ ++ if (data->pdata->used_features & PCF50606_FEAT_ACD) ++ reg_set_bit_mask(data, PCF50606_REG_ACDC1, ++ PCF50606_ACDC1_ACDAPE, PCF50606_ACDC1_ACDAPE); ++ else ++ reg_clear_bits(data, PCF50606_REG_ACDC1, ++ PCF50606_ACDC1_ACDAPE); ++ ++ return 0; ++ ++exit_misc: ++ if (data->pdata->used_features & PCF50606_FEAT_WDT) ++ misc_deregister(&pcf50606_wdt_miscdev); ++exit_rtc: ++ if (data->pdata->used_features & PCF50606_FEAT_RTC) ++ rtc_device_unregister(pcf50606_global->rtc); ++exit_irq: ++ free_irq(pcf50606_global->irq, pcf50606_global); ++ pcf50606_global = NULL; ++exit_input: ++ pm_power_off = NULL; ++ input_unregister_device(data->input_dev); ++exit_sysfs: ++ sysfs_remove_group(&new_client->dev.kobj, &pcf_attr_group); ++exit_detach: ++ i2c_detach_client(new_client); ++exit_free: ++ kfree(data); ++ return err; ++} ++ ++static int pcf50606_attach_adapter(struct i2c_adapter *adapter) ++{ ++ return i2c_probe(adapter, &addr_data, &pcf50606_detect); ++} ++ ++static int pcf50606_detach_client(struct i2c_client *client) ++{ ++ struct pcf50606_data *pcf = i2c_get_clientdata(client); ++ ++ apm_get_power_status = NULL; ++ input_unregister_device(pcf->input_dev); ++ ++ if (pcf->pdata->used_features & PCF50606_FEAT_PWM_BL) ++ backlight_device_unregister(pcf->backlight); ++ ++ if (pcf->pdata->used_features & PCF50606_FEAT_WDT) ++ misc_deregister(&pcf50606_wdt_miscdev); ++ ++ if (pcf->pdata->used_features & PCF50606_FEAT_RTC) ++ rtc_device_unregister(pcf->rtc); ++ ++ free_irq(pcf->irq, pcf); ++ ++ sysfs_remove_group(&client->dev.kobj, &pcf_attr_group); ++ ++ pm_power_off = NULL; ++ ++ kfree(pcf); ++ ++ return 0; ++} ++ ++#ifdef CONFIG_PM ++#define INT1M_RESUMERS (PCF50606_INT1_ALARM | \ ++ PCF50606_INT1_ONKEYF | \ ++ PCF50606_INT1_EXTONR) ++#define INT2M_RESUMERS (PCF50606_INT2_CHGWD10S | \ ++ PCF50606_INT2_CHGPROT | \ ++ PCF50606_INT2_CHGERR) ++#define INT3M_RESUMERS (PCF50606_INT3_LOWBAT | \ ++ PCF50606_INT3_HIGHTMP | \ ++ PCF50606_INT3_ACDINS) ++static int pcf50606_suspend(struct device *dev, pm_message_t state) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct pcf50606_data *pcf = i2c_get_clientdata(client); ++ int i; ++ ++ /* The general idea is to power down all unused power supplies, ++ * and then mask all PCF50606 interrup sources but EXTONR, ONKEYF ++ * and ALARM */ ++ ++ mutex_lock(&pcf->lock); ++ ++ /* Save all registers that don't "survive" standby state */ ++ pcf->standby_regs.dcdc1 = __reg_read(pcf, PCF50606_REG_DCDC1); ++ pcf->standby_regs.dcdc2 = __reg_read(pcf, PCF50606_REG_DCDC2); ++ pcf->standby_regs.dcdec1 = __reg_read(pcf, PCF50606_REG_DCDEC1); ++ pcf->standby_regs.dcudc1 = __reg_read(pcf, PCF50606_REG_DCUDC1); ++ pcf->standby_regs.ioregc = __reg_read(pcf, PCF50606_REG_IOREGC); ++ pcf->standby_regs.d1regc1 = __reg_read(pcf, PCF50606_REG_D1REGC1); ++ pcf->standby_regs.d2regc1 = __reg_read(pcf, PCF50606_REG_D2REGC1); ++ pcf->standby_regs.d3regc1 = __reg_read(pcf, PCF50606_REG_D3REGC1); ++ pcf->standby_regs.lpregc1 = __reg_read(pcf, PCF50606_REG_LPREGC1); ++ pcf->standby_regs.adcc1 = __reg_read(pcf, PCF50606_REG_ADCC1); ++ pcf->standby_regs.adcc2 = __reg_read(pcf, PCF50606_REG_ADCC2); ++ pcf->standby_regs.pwmc1 = __reg_read(pcf, PCF50606_REG_PWMC1); ++ ++ /* switch off power supplies that are not needed during suspend */ ++ for (i = 0; i < __NUM_PCF50606_REGULATORS; i++) { ++ if (!(pcf->pdata->rails[i].flags & PMU_VRAIL_F_SUSPEND_ON)) { ++ u_int8_t tmp; ++ ++ /* IOREG powers the I@C interface so we cannot switch ++ * it off */ ++ if (i == PCF50606_REGULATOR_IOREG) ++ continue; ++ ++ dev_dbg(dev, "disabling pcf50606 regulator %u\n", i); ++ /* we cannot use pcf50606_onoff_set() because we're ++ * already under the mutex */ ++ tmp = __reg_read(pcf, regulator_registers[i]); ++ tmp &= 0x1f; ++ __reg_write(pcf, regulator_registers[i], tmp); ++ } ++ } ++ ++ pcf->standby_regs.int1m = __reg_read(pcf, PCF50606_REG_INT1M); ++ pcf->standby_regs.int2m = __reg_read(pcf, PCF50606_REG_INT2M); ++ pcf->standby_regs.int3m = __reg_read(pcf, PCF50606_REG_INT3M); ++ __reg_write(pcf, PCF50606_REG_INT1M, ~INT1M_RESUMERS & 0xff); ++ __reg_write(pcf, PCF50606_REG_INT2M, ~INT2M_RESUMERS & 0xff); ++ __reg_write(pcf, PCF50606_REG_INT3M, ~INT3M_RESUMERS & 0xff); ++ ++ mutex_unlock(&pcf->lock); ++ ++ return 0; ++} ++ ++static int pcf50606_resume(struct device *dev) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct pcf50606_data *pcf = i2c_get_clientdata(client); ++ ++ mutex_lock(&pcf->lock); ++ ++ /* Resume all saved registers that don't "survive" standby state */ ++ __reg_write(pcf, PCF50606_REG_INT1M, pcf->standby_regs.int1m); ++ __reg_write(pcf, PCF50606_REG_INT2M, pcf->standby_regs.int2m); ++ __reg_write(pcf, PCF50606_REG_INT3M, pcf->standby_regs.int3m); ++ ++ __reg_write(pcf, PCF50606_REG_DCDC1, pcf->standby_regs.dcdc1); ++ __reg_write(pcf, PCF50606_REG_DCDC2, pcf->standby_regs.dcdc2); ++ __reg_write(pcf, PCF50606_REG_DCDEC1, pcf->standby_regs.dcdec1); ++ __reg_write(pcf, PCF50606_REG_DCUDC1, pcf->standby_regs.dcudc1); ++ __reg_write(pcf, PCF50606_REG_IOREGC, pcf->standby_regs.ioregc); ++ __reg_write(pcf, PCF50606_REG_D1REGC1, pcf->standby_regs.d1regc1); ++ __reg_write(pcf, PCF50606_REG_D2REGC1, pcf->standby_regs.d2regc1); ++ __reg_write(pcf, PCF50606_REG_D3REGC1, pcf->standby_regs.d3regc1); ++ __reg_write(pcf, PCF50606_REG_LPREGC1, pcf->standby_regs.lpregc1); ++ __reg_write(pcf, PCF50606_REG_ADCC1, pcf->standby_regs.adcc1); ++ __reg_write(pcf, PCF50606_REG_ADCC2, pcf->standby_regs.adcc2); ++ __reg_write(pcf, PCF50606_REG_PWMC1, pcf->standby_regs.pwmc1); ++ ++ mutex_unlock(&pcf->lock); ++ ++ return 0; ++} ++#else ++#define pcf50606_suspend NULL ++#define pcf50606_resume NULL ++#endif ++ ++static struct i2c_driver pcf50606_driver = { ++ .driver = { ++ .name = "pcf50606", ++ .suspend = pcf50606_suspend, ++ .resume = pcf50606_resume, ++ }, ++ .id = I2C_DRIVERID_PCF50606, ++ .attach_adapter = pcf50606_attach_adapter, ++ .detach_client = pcf50606_detach_client, ++}; ++ ++/* platform driver, since i2c devices don't have platform_data */ ++static int __init pcf50606_plat_probe(struct platform_device *pdev) ++{ ++ struct pcf50606_platform_data *pdata = pdev->dev.platform_data; ++ ++ if (!pdata) ++ return -ENODEV; ++ ++ pcf50606_pdev = pdev; ++ ++ return 0; ++} ++ ++static int pcf50606_plat_remove(struct platform_device *pdev) ++{ ++ return 0; ++} ++ ++static struct platform_driver pcf50606_plat_driver = { ++ .probe = pcf50606_plat_probe, ++ .remove = pcf50606_plat_remove, ++ .driver = { ++ .owner = THIS_MODULE, ++ .name = "pcf50606", ++ }, ++}; ++ ++static int __init pcf50606_init(void) ++{ ++ int rc; ++ ++ rc = platform_driver_register(&pcf50606_plat_driver); ++ if (!rc) ++ rc = i2c_add_driver(&pcf50606_driver); ++ ++ return rc; ++} ++ ++static void pcf50606_exit(void) ++{ ++ i2c_del_driver(&pcf50606_driver); ++ platform_driver_unregister(&pcf50606_plat_driver); ++} ++ ++MODULE_DESCRIPTION("I2C chip driver for NXP PCF50606 power management unit"); ++MODULE_AUTHOR("Harald Welte "); ++MODULE_LICENSE("GPL"); ++ ++module_init(pcf50606_init); ++module_exit(pcf50606_exit); +diff --git a/drivers/i2c/chips/pcf50606.h b/drivers/i2c/chips/pcf50606.h +new file mode 100644 +index 0000000..15b350f +--- /dev/null ++++ b/drivers/i2c/chips/pcf50606.h +@@ -0,0 +1,302 @@ ++#ifndef _PCF50606_H ++#define _PCF50606_H ++ ++/* Philips PCF50606 Power Managemnt Unit (PMU) driver ++ * (C) 2006-2007 by OpenMoko, Inc. ++ * Author: Harald Welte ++ * ++ */ ++ ++enum pfc50606_regs { ++ PCF50606_REG_ID = 0x00, ++ PCF50606_REG_OOCS = 0x01, ++ PCF50606_REG_INT1 = 0x02, /* Interrupt Status */ ++ PCF50606_REG_INT2 = 0x03, /* Interrupt Status */ ++ PCF50606_REG_INT3 = 0x04, /* Interrupt Status */ ++ PCF50606_REG_INT1M = 0x05, /* Interrupt Mask */ ++ PCF50606_REG_INT2M = 0x06, /* Interrupt Mask */ ++ PCF50606_REG_INT3M = 0x07, /* Interrupt Mask */ ++ PCF50606_REG_OOCC1 = 0x08, ++ PCF50606_REG_OOCC2 = 0x09, ++ PCF50606_REG_RTCSC = 0x0a, /* Second */ ++ PCF50606_REG_RTCMN = 0x0b, /* Minute */ ++ PCF50606_REG_RTCHR = 0x0c, /* Hour */ ++ PCF50606_REG_RTCWD = 0x0d, /* Weekday */ ++ PCF50606_REG_RTCDT = 0x0e, /* Day */ ++ PCF50606_REG_RTCMT = 0x0f, /* Month */ ++ PCF50606_REG_RTCYR = 0x10, /* Year */ ++ PCF50606_REG_RTCSCA = 0x11, /* Alarm Second */ ++ PCF50606_REG_RTCMNA = 0x12, /* Alarm Minute */ ++ PCF50606_REG_RTCHRA = 0x13, /* Alarm Hour */ ++ PCF50606_REG_RTCWDA = 0x14, /* Alarm Weekday */ ++ PCF50606_REG_RTCDTA = 0x15, /* Alarm Day */ ++ PCF50606_REG_RTCMTA = 0x16, /* Alarm Month */ ++ PCF50606_REG_RTCYRA = 0x17, /* Alarm Year */ ++ PCF50606_REG_PSSC = 0x18, /* Power sequencing */ ++ PCF50606_REG_PWROKM = 0x19, /* PWROK mask */ ++ PCF50606_REG_PWROKS = 0x1a, /* PWROK status */ ++ PCF50606_REG_DCDC1 = 0x1b, ++ PCF50606_REG_DCDC2 = 0x1c, ++ PCF50606_REG_DCDC3 = 0x1d, ++ PCF50606_REG_DCDC4 = 0x1e, ++ PCF50606_REG_DCDEC1 = 0x1f, ++ PCF50606_REG_DCDEC2 = 0x20, ++ PCF50606_REG_DCUDC1 = 0x21, ++ PCF50606_REG_DCUDC2 = 0x22, ++ PCF50606_REG_IOREGC = 0x23, ++ PCF50606_REG_D1REGC1 = 0x24, ++ PCF50606_REG_D2REGC1 = 0x25, ++ PCF50606_REG_D3REGC1 = 0x26, ++ PCF50606_REG_LPREGC1 = 0x27, ++ PCF50606_REG_LPREGC2 = 0x28, ++ PCF50606_REG_MBCC1 = 0x29, ++ PCF50606_REG_MBCC2 = 0x2a, ++ PCF50606_REG_MBCC3 = 0x2b, ++ PCF50606_REG_MBCS1 = 0x2c, ++ PCF50606_REG_BBCC = 0x2d, ++ PCF50606_REG_ADCC1 = 0x2e, ++ PCF50606_REG_ADCC2 = 0x2f, ++ PCF50606_REG_ADCS1 = 0x30, ++ PCF50606_REG_ADCS2 = 0x31, ++ PCF50606_REG_ADCS3 = 0x32, ++ PCF50606_REG_ACDC1 = 0x33, ++ PCF50606_REG_BVMC = 0x34, ++ PCF50606_REG_PWMC1 = 0x35, ++ PCF50606_REG_LEDC1 = 0x36, ++ PCF50606_REG_LEDC2 = 0x37, ++ PCF50606_REG_GPOC1 = 0x38, ++ PCF50606_REG_GPOC2 = 0x39, ++ PCF50606_REG_GPOC3 = 0x3a, ++ PCF50606_REG_GPOC4 = 0x3b, ++ PCF50606_REG_GPOC5 = 0x3c, ++ __NUM_PCF50606_REGS ++}; ++ ++enum pcf50606_reg_oocs { ++ PFC50606_OOCS_ONKEY = 0x01, ++ PCF50606_OOCS_EXTON = 0x02, ++ PCF50606_OOCS_PWROKRST = 0x04, ++ PCF50606_OOCS_BATOK = 0x08, ++ PCF50606_OOCS_BACKOK = 0x10, ++ PCF50606_OOCS_CHGOK = 0x20, ++ PCF50606_OOCS_TEMPOK = 0x40, ++ PCF50606_OOCS_WDTEXP = 0x80, ++}; ++ ++enum pcf50606_reg_oocc1 { ++ PCF50606_OOCC1_GOSTDBY = 0x01, ++ PCF50606_OOCC1_TOTRST = 0x02, ++ PCF50606_OOCC1_CLK32ON = 0x04, ++ PCF50606_OOCC1_WDTRST = 0x08, ++ PCF50606_OOCC1_RTCWAK = 0x10, ++ PCF50606_OOCC1_CHGWAK = 0x20, ++ PCF50606_OOCC1_EXTONWAK_HIGH = 0x40, ++ PCF50606_OOCC1_EXTONWAK_LOW = 0x80, ++}; ++ ++enum pcf50606_reg_oocc2 { ++ PCF50606_OOCC2_ONKEYDB_NONE = 0x00, ++ PCF50606_OOCC2_ONKEYDB_14ms = 0x01, ++ PCF50606_OOCC2_ONKEYDB_62ms = 0x02, ++ PCF50606_OOCC2_ONKEYDB_500ms = 0x03, ++ PCF50606_OOCC2_EXTONDB_NONE = 0x00, ++ PCF50606_OOCC2_EXTONDB_14ms = 0x04, ++ PCF50606_OOCC2_EXTONDB_62ms = 0x08, ++ PCF50606_OOCC2_EXTONDB_500ms = 0x0c, ++}; ++ ++enum pcf50606_reg_int1 { ++ PCF50606_INT1_ONKEYR = 0x01, /* ONKEY rising edge */ ++ PCF50606_INT1_ONKEYF = 0x02, /* ONKEY falling edge */ ++ PCF50606_INT1_ONKEY1S = 0x04, /* OMKEY at least 1sec low */ ++ PCF50606_INT1_EXTONR = 0x08, /* EXTON rising edge */ ++ PCF50606_INT1_EXTONF = 0x10, /* EXTON falling edge */ ++ PCF50606_INT1_SECOND = 0x40, /* RTC periodic second interrupt */ ++ PCF50606_INT1_ALARM = 0x80, /* RTC alarm time is reached */ ++}; ++ ++enum pcf50606_reg_int2 { ++ PCF50606_INT2_CHGINS = 0x01, /* Charger inserted */ ++ PCF50606_INT2_CHGRM = 0x02, /* Charger removed */ ++ PCF50606_INT2_CHGFOK = 0x04, /* Fast charging OK */ ++ PCF50606_INT2_CHGERR = 0x08, /* Error in charging mode */ ++ PCF50606_INT2_CHGFRDY = 0x10, /* Fast charge completed */ ++ PCF50606_INT2_CHGPROT = 0x20, /* Charging protection interrupt */ ++ PCF50606_INT2_CHGWD10S = 0x40, /* Charger watchdig expires in 10s */ ++ PCF50606_INT2_CHGWDEXP = 0x80, /* Charger watchdog expires */ ++}; ++ ++enum pcf50606_reg_int3 { ++ PCF50606_INT3_ADCRDY = 0x01, /* ADC conversion finished */ ++ PCF50606_INT3_ACDINS = 0x02, /* Accessory inserted */ ++ PCF50606_INT3_ACDREM = 0x04, /* Accessory removed */ ++ PCF50606_INT3_TSCPRES = 0x08, /* Touch screen pressed */ ++ PCF50606_INT3_LOWBAT = 0x40, /* Low battery voltage */ ++ PCF50606_INT3_HIGHTMP = 0x80, /* High temperature */ ++}; ++ ++/* used by PSSC, PWROKM, PWROKS, */ ++enum pcf50606_regu { ++ PCF50606_REGU_DCD = 0x01, /* DCD in phase 2 */ ++ PCF50606_REGU_DCDE = 0x02, /* DCDE in phase 2 */ ++ PCF50606_REGU_DCUD = 0x04, /* DCDU in phase 2 */ ++ PCF50606_REGU_IO = 0x08, /* IO in phase 2 */ ++ PCF50606_REGU_D1 = 0x10, /* D1 in phase 2 */ ++ PCF50606_REGU_D2 = 0x20, /* D2 in phase 2 */ ++ PCF50606_REGU_D3 = 0x40, /* D3 in phase 2 */ ++ PCF50606_REGU_LP = 0x80, /* LP in phase 2 */ ++}; ++ ++enum pcf50606_reg_dcdc4 { ++ PCF50606_DCDC4_MODE_AUTO = 0x00, ++ PCF50606_DCDC4_MODE_PWM = 0x01, ++ PCF50606_DCDC4_MODE_PCF = 0x02, ++ PCF50606_DCDC4_OFF_FLOAT = 0x00, ++ PCF50606_DCDC4_OFF_BYPASS = 0x04, ++ PCF50606_DCDC4_OFF_PULLDOWN = 0x08, ++ PCF50606_DCDC4_CURLIM_500mA = 0x00, ++ PCF50606_DCDC4_CURLIM_750mA = 0x10, ++ PCF50606_DCDC4_CURLIM_1000mA = 0x20, ++ PCF50606_DCDC4_CURLIM_1250mA = 0x30, ++ PCF50606_DCDC4_TOGGLE = 0x40, ++ PCF50606_DCDC4_REGSEL_DCDC2 = 0x80, ++}; ++ ++enum pcf50606_reg_dcdec2 { ++ PCF50606_DCDEC2_MODE_AUTO = 0x00, ++ PCF50606_DCDEC2_MODE_PWM = 0x01, ++ PCF50606_DCDEC2_MODE_PCF = 0x02, ++ PCF50606_DCDEC2_OFF_FLOAT = 0x00, ++ PCF50606_DCDEC2_OFF_BYPASS = 0x04, ++}; ++ ++enum pcf50606_reg_dcudc2 { ++ PCF50606_DCUDC2_MODE_AUTO = 0x00, ++ PCF50606_DCUDC2_MODE_PWM = 0x01, ++ PCF50606_DCUDC2_MODE_PCF = 0x02, ++ PCF50606_DCUDC2_OFF_FLOAT = 0x00, ++ PCF50606_DCUDC2_OFF_BYPASS = 0x04, ++}; ++ ++enum pcf50606_reg_adcc1 { ++ PCF50606_ADCC1_TSCMODACT = 0x01, ++ PCF50606_ADCC1_TSCMODSTB = 0x02, ++ PCF50606_ADCC1_TRATSET = 0x04, ++ PCF50606_ADCC1_NTCSWAPE = 0x08, ++ PCF50606_ADCC1_NTCSWAOFF = 0x10, ++ PCF50606_ADCC1_EXTSYNCBREAK = 0x20, ++ /* reserved */ ++ PCF50606_ADCC1_TSCINT = 0x80, ++}; ++ ++enum pcf50606_reg_adcc2 { ++ PCF50606_ADCC2_ADCSTART = 0x01, ++ /* see enum pcf50606_adcc2_adcmux */ ++ PCF50606_ADCC2_SYNC_NONE = 0x00, ++ PCF50606_ADCC2_SYNC_TXON = 0x20, ++ PCF50606_ADCC2_SYNC_PWREN1 = 0x40, ++ PCF50606_ADCC2_SYNC_PWREN2 = 0x60, ++ PCF50606_ADCC2_RES_10BIT = 0x00, ++ PCF50606_ADCC2_RES_8BIT = 0x80, ++}; ++ ++#define PCF50606_ADCC2_ADCMUX_MASK (0xf << 1) ++ ++#define ADCMUX_SHIFT 1 ++enum pcf50606_adcc2_adcmux { ++ PCF50606_ADCMUX_BATVOLT_RES = 0x0 << ADCMUX_SHIFT, ++ PCF50606_ADCMUX_BATVOLT_SUBTR = 0x1 << ADCMUX_SHIFT, ++ PCF50606_ADCMUX_ADCIN1_RES = 0x2 << ADCMUX_SHIFT, ++ PCF50606_ADCMUX_ADCIN1_SUBTR = 0x3 << ADCMUX_SHIFT, ++ PCF50606_ADCMUX_BATTEMP = 0x4 << ADCMUX_SHIFT, ++ PCF50606_ADCMUX_ADCIN2 = 0x5 << ADCMUX_SHIFT, ++ PCF50606_ADCMUX_ADCIN3 = 0x6 << ADCMUX_SHIFT, ++ PCF50606_ADCMUX_ADCIN3_RATIO = 0x7 << ADCMUX_SHIFT, ++ PCF50606_ADCMUX_XPOS = 0x8 << ADCMUX_SHIFT, ++ PCF50606_ADCMUX_YPOS = 0x9 << ADCMUX_SHIFT, ++ PCF50606_ADCMUX_P1 = 0xa << ADCMUX_SHIFT, ++ PCF50606_ADCMUX_P2 = 0xb << ADCMUX_SHIFT, ++ PCF50606_ADCMUX_BATVOLT_ADCIN1 = 0xc << ADCMUX_SHIFT, ++ PCF50606_ADCMUX_XY_SEQUENCE = 0xe << ADCMUX_SHIFT, ++ PCF50606_P1_P2_RESISTANCE = 0xf << ADCMUX_SHIFT, ++}; ++ ++enum pcf50606_adcs2 { ++ PCF50606_ADCS2_ADCRDY = 0x80, ++}; ++ ++enum pcf50606_reg_mbcc1 { ++ PCF50606_MBCC1_CHGAPE = 0x01, ++ PCF50606_MBCC1_AUTOFST = 0x02, ++#define PCF50606_MBCC1_CHGMOD_MASK 0x1c ++#define PCF50606_MBCC1_CHGMOD_SHIFT 2 ++ PCF50606_MBCC1_CHGMOD_QUAL = 0x00, ++ PCF50606_MBCC1_CHGMOD_PRE = 0x04, ++ PCF50606_MBCC1_CHGMOD_TRICKLE = 0x08, ++ PCF50606_MBCC1_CHGMOD_FAST_CCCV = 0x0c, ++ PCF50606_MBCC1_CHGMOD_FAST_NOCC = 0x10, ++ PCF50606_MBCC1_CHGMOD_FAST_NOCV = 0x14, ++ PCF50606_MBCC1_CHGMOD_FAST_SW = 0x18, ++ PCF50606_MBCC1_CHGMOD_IDLE = 0x1c, ++ PCF50606_MBCC1_DETMOD_LOWCHG = 0x20, ++ PCF50606_MBCC1_DETMOD_WDRST = 0x40, ++}; ++ ++enum pcf50606_reg_acdc1 { ++ PCF50606_ACDC1_ACDDET = 0x01, ++ PCF50606_ACDC1_THRSHLD_1V0 = 0x00, ++ PCF50606_ACDC1_THRSHLD_1V2 = 0x02, ++ PCF50606_ACDC1_THRSHLD_1V4 = 0x04, ++ PCF50606_ACDC1_THRSHLD_1V6 = 0x06, ++ PCF50606_ACDC1_THRSHLD_1V8 = 0x08, ++ PCF50606_ACDC1_THRSHLD_2V0 = 0x0a, ++ PCF50606_ACDC1_THRSHLD_2V2 = 0x0c, ++ PCF50606_ACDC1_THRSHLD_2V4 = 0x0e, ++ PCF50606_ACDC1_DISDB = 0x10, ++ PCF50606_ACDC1_ACDAPE = 0x80, ++}; ++ ++enum pcf50606_reg_bvmc { ++ PCF50606_BVMC_LOWBAT = 0x01, ++ PCF50606_BVMC_THRSHLD_NULL = 0x00, ++ PCF50606_BVMC_THRSHLD_2V8 = 0x02, ++ PCF50606_BVMC_THRSHLD_2V9 = 0x04, ++ PCF50606_BVMC_THRSHLD_3V = 0x08, ++ PCF50606_BVMC_THRSHLD_3V1 = 0x08, ++ PCF50606_BVMC_THRSHLD_3V2 = 0x0a, ++ PCF50606_BVMC_THRSHLD_3V3 = 0x0c, ++ PCF50606_BVMC_THRSHLD_3V4 = 0x0e, ++ PCF50606_BVMC_DISDB = 0x10, ++}; ++ ++enum pcf50606_reg_pwmc1 { ++ PCF50606_PWMC1_ACTSET = 0x01, ++ PCF50606_PWMC1_PWMDC_0_16 = 0x00, ++ PCF50606_PWMC1_PWMDC_1_16 = 0x02, ++ PCF50606_PWMC1_PWMDC_2_16 = 0x04, ++ PCF50606_PWMC1_PWMDC_3_16 = 0x06, ++ PCF50606_PWMC1_PWMDC_4_16 = 0x08, ++ PCF50606_PWMC1_PWMDC_5_16 = 0x0a, ++ PCF50606_PWMC1_PWMDC_6_16 = 0x0c, ++ PCF50606_PWMC1_PWMDC_7_16 = 0x0e, ++ PCF50606_PWMC1_PWMDC_8_16 = 0x10, ++ PCF50606_PWMC1_PWMDC_9_16 = 0x12, ++ PCF50606_PWMC1_PWMDC_10_16 = 0x14, ++ PCF50606_PWMC1_PWMDC_11_16 = 0x16, ++ PCF50606_PWMC1_PWMDC_12_16 = 0x18, ++ PCF50606_PWMC1_PWMDC_13_16 = 0x1a, ++ PCF50606_PWMC1_PWMDC_14_16 = 0x1c, ++ PCF50606_PWMC1_PWMDC_15_16 = 0x1e, ++ PCF50606_PWMC1_PRESC_512Hz = 0x20, ++ PCF50606_PWMC1_PRESC_256Hz = 0x40, ++ PCF50606_PWMC1_PRESC_64Hz = 0x60, ++ PCF50606_PWMC1_PRESC_56kHz = 0x80, ++ PCF50606_PWMC1_PRESC_28kHz = 0xa0, ++ PCF50606_PWMC1_PRESC_14kHz = 0xc0, ++ PCF50606_PWMC1_PRESC_7kHz = 0xe0, ++}; ++#define PCF50606_PWMC1_CLK_SHIFT 5 ++#define PCF50606_PWMC1_DC_SHIFT 1 ++ ++#endif /* _PCF50606_H */ ++ +diff --git a/include/linux/i2c-id.h b/include/linux/i2c-id.h +index e18017d..9b8ae78 100644 +--- a/include/linux/i2c-id.h ++++ b/include/linux/i2c-id.h +@@ -167,6 +167,7 @@ + #define I2C_DRIVERID_FSCHER 1046 + #define I2C_DRIVERID_W83L785TS 1047 + #define I2C_DRIVERID_OV7670 1048 /* Omnivision 7670 camera */ ++#define I2C_DRIVERID_PCF50606 1049 + + /* + * ---- Adapter types ---------------------------------------------------- +diff --git a/include/linux/pcf50606.h b/include/linux/pcf50606.h +new file mode 100644 +index 0000000..bc98e47 +--- /dev/null ++++ b/include/linux/pcf50606.h +@@ -0,0 +1,108 @@ ++#ifndef _LINUX_PCF50606_H ++#define _LINUX_PCF50606_H ++ ++/* public in-kernel pcf50606 api */ ++enum pcf50606_regulator_id { ++ PCF50606_REGULATOR_DCD, ++ PCF50606_REGULATOR_DCDE, ++ PCF50606_REGULATOR_DCUD, ++ PCF50606_REGULATOR_D1REG, ++ PCF50606_REGULATOR_D2REG, ++ PCF50606_REGULATOR_D3REG, ++ PCF50606_REGULATOR_LPREG, ++ PCF50606_REGULATOR_IOREG, ++ __NUM_PCF50606_REGULATORS ++}; ++ ++struct pcf50606_data; ++ ++/* This is an ugly construct on how to access the (currently single/global) ++ * pcf50606 handle from other code in the kernel. I didn't really come up with ++ * a more decent method of dynamically resolving this */ ++extern struct pcf50606_data *pcf50606_global; ++ ++extern void ++pcf50606_go_standby(void); ++ ++extern void ++pcf50606_gpo0_set(struct pcf50606_data *pcf, int on); ++ ++extern int ++pcf50606_gpo0_get(struct pcf50606_data *pcf); ++ ++extern int ++pcf50606_voltage_set(struct pcf50606_data *pcf, ++ enum pcf50606_regulator_id reg, ++ unsigned int millivolts); ++extern unsigned int ++pcf50606_voltage_get(struct pcf50606_data *pcf, ++ enum pcf50606_regulator_id reg); ++extern int ++pcf50606_onoff_get(struct pcf50606_data *pcf, ++ enum pcf50606_regulator_id reg); ++ ++extern int ++pcf50606_onoff_set(struct pcf50606_data *pcf, ++ enum pcf50606_regulator_id reg, int on); ++ ++extern void ++pcf50606_charge_fast(struct pcf50606_data *pcf, int on); ++ ++#define PMU_VRAIL_F_SUSPEND_ON 0x00000001 /* Remains on during suspend */ ++#define PMU_VRAIL_F_UNUSED 0x00000002 /* This rail is not used */ ++struct pmu_voltage_rail { ++ char *name; ++ unsigned int flags; ++ struct { ++ unsigned int init; ++ unsigned int max; ++ } voltage; ++}; ++ ++enum pmu_event { ++ PMU_EVT_NONE, ++ PMU_EVT_INSERT, ++ PMU_EVT_REMOVE, ++ __NUM_PMU_EVTS ++}; ++ ++typedef int pmu_cb(struct device *dev, unsigned int feature, ++ enum pmu_event event); ++ ++#define PCF50606_FEAT_EXTON 0x00000001 /* not yet supported */ ++#define PCF50606_FEAT_MBC 0x00000002 ++#define PCF50606_FEAT_BBC 0x00000004 /* not yet supported */ ++#define PCF50606_FEAT_TSC 0x00000008 /* not yet supported */ ++#define PCF50606_FEAT_WDT 0x00000010 ++#define PCF50606_FEAT_ACD 0x00000020 ++#define PCF50606_FEAT_RTC 0x00000040 ++#define PCF50606_FEAT_PWM 0x00000080 ++#define PCF50606_FEAT_CHGCUR 0x00000100 ++#define PCF50606_FEAT_BATVOLT 0x00000200 ++#define PCF50606_FEAT_BATTEMP 0x00000400 ++#define PCF50606_FEAT_PWM_BL 0x00000800 ++ ++struct pcf50606_platform_data { ++ /* general */ ++ unsigned int used_features; ++ unsigned int onkey_seconds_required; ++ ++ /* voltage regulator related */ ++ struct pmu_voltage_rail rails[__NUM_PCF50606_REGULATORS]; ++ unsigned int used_regulators; ++ ++ /* charger related */ ++ unsigned int r_fix_batt; ++ unsigned int r_fix_batt_par; ++ unsigned int r_sense_milli; ++ ++ /* backlight related */ ++ unsigned int init_brightness; ++ ++ struct { ++ u_int8_t mbcc3; /* charger voltage / current */ ++ } charger; ++ pmu_cb *cb; ++}; ++ ++#endif +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1011-gta01-core.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1011-gta01-core.patch.patch new file mode 100644 index 0000000000..856bbf136a --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1011-gta01-core.patch.patch @@ -0,0 +1,822 @@ +From 4b0762543b611b44e96ace4feb80e2b4775ea000 Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:31:03 +0100 +Subject: [PATCH] gta01-core.patch + This patch adds support for the FIC Neo1973 GTA01 machine type to the ARM port + of the Linux kernel. + +Signed-off-by: Harald Welte +--- + MAINTAINERS | 8 + + arch/arm/mach-s3c2410/Kconfig | 8 + + arch/arm/mach-s3c2410/Makefile | 1 + + arch/arm/mach-s3c2410/mach-gta01.c | 658 ++++++++++++++++++++++++++++++++++ + arch/arm/plat-s3c24xx/Kconfig | 5 + + include/asm-arm/arch-s3c2410/gta01.h | 70 ++++ + 6 files changed, 750 insertions(+), 0 deletions(-) + create mode 100644 arch/arm/mach-s3c2410/mach-gta01.c + create mode 100644 include/asm-arm/arch-s3c2410/gta01.h + +diff --git a/MAINTAINERS b/MAINTAINERS +index 2340cfb..4538694 100644 +--- a/MAINTAINERS ++++ b/MAINTAINERS +@@ -1536,6 +1536,14 @@ P: Akinobu Mita + M: akinobu.mita@gmail.com + S: Supported + ++FIC/OPENMOKO NEO1973 GSM PHONE ++P: Harald Welte ++M: laforge@openmoko.org ++L: openmoko-kernel@lists.openmoko.org ++W: http://wiki.openmoko.org/wiki/Kernel ++W: http://wiki.openmoko.org/wiki/Neo1973 ++S: Maintained ++ + FRAMEBUFFER LAYER + P: Antonino Daplas + M: adaplas@gmail.com +diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig +index e2079cf..a2acd65 100644 +--- a/arch/arm/mach-s3c2410/Kconfig ++++ b/arch/arm/mach-s3c2410/Kconfig +@@ -110,5 +110,13 @@ config MACH_QT2410 + help + Say Y here if you are using the Armzone QT2410 + ++config MACH_NEO1973_GTA01 ++ bool "FIC Neo1973 GSM Phone (GTA01 Hardware)" ++ select CPU_S3C2410 ++ select MACH_NEO1973 ++ select SENSORS_PCF50606 ++ help ++ Say Y here if you are using the FIC Neo1973 GSM Phone ++ + endmenu + +diff --git a/arch/arm/mach-s3c2410/Makefile b/arch/arm/mach-s3c2410/Makefile +index 3e7a855..8952a8d 100644 +--- a/arch/arm/mach-s3c2410/Makefile ++++ b/arch/arm/mach-s3c2410/Makefile +@@ -29,3 +29,4 @@ obj-$(CONFIG_MACH_AML_M5900) += mach-amlm5900.o + obj-$(CONFIG_BAST_PC104_IRQ) += bast-irq.o + obj-$(CONFIG_MACH_VR1000) += mach-vr1000.o usb-simtec.o + obj-$(CONFIG_MACH_QT2410) += mach-qt2410.o ++obj-$(CONFIG_MACH_NEO1973_GTA01)+= mach-gta01.o +diff --git a/arch/arm/mach-s3c2410/mach-gta01.c b/arch/arm/mach-s3c2410/mach-gta01.c +new file mode 100644 +index 0000000..e690ed7 +--- /dev/null ++++ b/arch/arm/mach-s3c2410/mach-gta01.c +@@ -0,0 +1,658 @@ ++/* ++ * linux/arch/arm/mach-s3c2410/mach-gta01.c ++ * ++ * S3C2410 Machine Support for the FIC Neo1973 GTA01 ++ * ++ * Copyright (C) 2006-2007 by OpenMoko, Inc. ++ * Author: Harald Welte ++ * All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include ++ ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++static struct map_desc gta01_iodesc[] __initdata = { ++ { ++ .virtual = 0xe0000000, ++ .pfn = __phys_to_pfn(S3C2410_CS3+0x01000000), ++ .length = SZ_1M, ++ .type = MT_DEVICE ++ }, ++}; ++ ++#define UCON S3C2410_UCON_DEFAULT ++#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB ++#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE ++ ++static struct s3c2410_uartcfg gta01_uartcfgs[] = { ++ [0] = { ++ .hwport = 0, ++ .flags = 0, ++ .ucon = UCON, ++ .ulcon = ULCON, ++ .ufcon = UFCON, ++ }, ++ [1] = { ++ .hwport = 1, ++ .flags = 0, ++ .ucon = UCON, ++ .ulcon = ULCON, ++ .ufcon = UFCON, ++ }, ++}; ++ ++/* PMU driver info */ ++ ++static int pmu_callback(struct device *dev, unsigned int feature, ++ enum pmu_event event) ++{ ++ switch (feature) { ++ case PCF50606_FEAT_ACD: ++ switch (event) { ++ case PMU_EVT_INSERT: ++ pcf50606_charge_fast(pcf50606_global, 1); ++ break; ++ case PMU_EVT_REMOVE: ++ pcf50606_charge_fast(pcf50606_global, 0); ++ break; ++ default: ++ break; ++ } ++ break; ++ default: ++ break; ++ } ++ ++ return 0; ++} ++ ++static struct pcf50606_platform_data gta01_pcf_pdata = { ++ .used_features = PCF50606_FEAT_EXTON | ++ PCF50606_FEAT_MBC | ++ PCF50606_FEAT_BBC | ++ PCF50606_FEAT_RTC | ++ PCF50606_FEAT_WDT | ++ PCF50606_FEAT_CHGCUR | ++ PCF50606_FEAT_BATVOLT | ++ PCF50606_FEAT_BATTEMP, ++ .onkey_seconds_required = 3, ++ .cb = &pmu_callback, ++ .r_fix_batt = 10000, ++ .r_fix_batt_par = 10000, ++ .r_sense_milli = 220, ++ .rails = { ++ [PCF50606_REGULATOR_D1REG] = { ++ .name = "bt_3v15", ++ .voltage = { ++ .init = 3150, ++ .max = 3150, ++ }, ++ }, ++ [PCF50606_REGULATOR_D2REG] = { ++ .name = "gl_2v5", ++ .voltage = { ++ .init = 2500, ++ .max = 2500, ++ }, ++ }, ++ [PCF50606_REGULATOR_D3REG] = { ++ .name = "stby_1v8", ++ .flags = PMU_VRAIL_F_SUSPEND_ON, ++ .voltage = { ++ .init = 1800, ++ .max = 2100, ++ }, ++ }, ++ [PCF50606_REGULATOR_DCD] = { ++ .name = "gl_1v5", ++ .voltage = { ++ .init = 1500, ++ .max = 1500, ++ }, ++ }, ++ [PCF50606_REGULATOR_DCDE] = { ++ .name = "io_3v3", ++ .flags = PMU_VRAIL_F_SUSPEND_ON, ++ .voltage = { ++ .init = 3300, ++ .max = 3330, ++ }, ++ }, ++ [PCF50606_REGULATOR_DCUD] = { ++ .name = "core_1v8", ++ .flags = PMU_VRAIL_F_SUSPEND_ON, ++ .voltage = { ++ .init = 2100, ++ .max = 2100, ++ }, ++ }, ++ [PCF50606_REGULATOR_IOREG] = { ++ .name = "codec_3v3", ++ .voltage = { ++ .init = 3300, ++ .max = 3300, ++ }, ++ }, ++ [PCF50606_REGULATOR_LPREG] = { ++ .name = "lcm_3v3", ++ .voltage = { ++ .init = 3300, ++ .max = 3300, ++ }, ++ } ++ }, ++}; ++ ++static void cfg_pmu_vrail(struct pmu_voltage_rail *vrail, char *name, ++ unsigned int flags, unsigned int init, ++ unsigned int max) ++{ ++ vrail->name = name; ++ vrail->flags = flags; ++ vrail->voltage.init = init; ++ vrail->voltage.max = max; ++} ++ ++static void mangle_pmu_pdata_by_system_rev(void) ++{ ++ switch (system_rev) { ++ case GTA01Bv4_SYSTEM_REV: ++ gta01_pcf_pdata.used_features |= PCF50606_FEAT_ACD; ++ break; ++ case GTA01Bv3_SYSTEM_REV: ++ case GTA01Bv2_SYSTEM_REV: ++ gta01_pcf_pdata.rails[PCF50606_REGULATOR_D3REG] ++ .name = "user1"; ++ gta01_pcf_pdata.rails[PCF50606_REGULATOR_D3REG] ++ .flags &= ~PMU_VRAIL_F_SUSPEND_ON; ++ gta01_pcf_pdata.rails[PCF50606_REGULATOR_D3REG] ++ .flags = PMU_VRAIL_F_UNUSED; ++ break; ++ case GTA01v4_SYSTEM_REV: ++ cfg_pmu_vrail(>a01_pcf_pdata.rails[PCF50606_REGULATOR_DCUD], ++ "core_1v8", PMU_VRAIL_F_SUSPEND_ON, 1800, 1800); ++ cfg_pmu_vrail(>a01_pcf_pdata.rails[PCF50606_REGULATOR_D1REG], ++ "vrf_3v", 0, 3000, 3000); ++ cfg_pmu_vrail(>a01_pcf_pdata.rails[PCF50606_REGULATOR_D3REG], ++ "vtcxo_2v8", 0, 2800, 2800); ++ cfg_pmu_vrail(>a01_pcf_pdata.rails[PCF50606_REGULATOR_DCD], ++ "gl_3v5", 0, 3500, 3500); ++ break; ++ case GTA01v3_SYSTEM_REV: ++ cfg_pmu_vrail(>a01_pcf_pdata.rails[PCF50606_REGULATOR_D1REG], ++ "vrf_3v", 0, 3000, 3000); ++ cfg_pmu_vrail(>a01_pcf_pdata.rails[PCF50606_REGULATOR_D2REG], ++ "sd_3v3", 0, 3300, 3300); ++ cfg_pmu_vrail(>a01_pcf_pdata.rails[PCF50606_REGULATOR_D3REG], ++ "codec_3v3", 0, 3300, 3300); ++ cfg_pmu_vrail(>a01_pcf_pdata.rails[PCF50606_REGULATOR_DCD], ++ "gpsio_3v3", 0, 3300, 3300); ++ cfg_pmu_vrail(>a01_pcf_pdata.rails[PCF50606_REGULATOR_DCUD], ++ "core_1v8", PMU_VRAIL_F_SUSPEND_ON, 1800, 1800); ++ cfg_pmu_vrail(>a01_pcf_pdata.rails[PCF50606_REGULATOR_IOREG], ++ "vtcxo_2v8", 0, 2800, 2800); ++ break; ++ } ++} ++ ++static struct resource gta01_pmu_resources[] = { ++ [0] = { ++ .flags = IORESOURCE_IRQ, ++ .start = GTA01_IRQ_PCF50606, ++ .end = GTA01_IRQ_PCF50606, ++ }, ++}; ++ ++struct platform_device gta01_pmu_dev = { ++ .name = "pcf50606", ++ .num_resources = ARRAY_SIZE(gta01_pmu_resources), ++ .resource = gta01_pmu_resources, ++ .dev = { ++ .platform_data = >a01_pcf_pdata, ++ }, ++}; ++ ++/* LCD driver info */ ++ ++/* Configuration for 480x640 toppoly TD028TTEC1. ++ * Do not mark this as __initdata or it will break! */ ++static struct s3c2410fb_display gta01_displays[] = { ++ { ++ .type = S3C2410_LCDCON1_TFT, ++ .width = 43, ++ .height = 58, ++ .xres = 480, ++ .yres = 640, ++ .bpp = 16, ++ ++ .pixclock = 40000, /* HCLK/4 */ ++ .left_margin = 104, ++ .right_margin = 8, ++ .hsync_len = 8, ++ .upper_margin = 2, ++ .lower_margin = 16, ++ .vsync_len = 2, ++ .lcdcon5 = S3C2410_LCDCON5_FRM565 | ++ S3C2410_LCDCON5_INVVCLK | ++ S3C2410_LCDCON5_INVVLINE | ++ S3C2410_LCDCON5_INVVFRAME | ++ S3C2410_LCDCON5_PWREN | ++ S3C2410_LCDCON5_HWSWP, ++ }, ++ { ++ .type = S3C2410_LCDCON1_TFT, ++ .width = 43, ++ .height = 58, ++ .xres = 480, ++ .yres = 640, ++ .bpp = 32, ++ ++ .pixclock = 40000, /* HCLK/4 */ ++ .left_margin = 104, ++ .right_margin = 8, ++ .hsync_len = 8, ++ .upper_margin = 2, ++ .lower_margin = 16, ++ .vsync_len = 2, ++ .lcdcon5 = S3C2410_LCDCON5_FRM565 | ++ S3C2410_LCDCON5_INVVCLK | ++ S3C2410_LCDCON5_INVVLINE | ++ S3C2410_LCDCON5_INVVFRAME | ++ S3C2410_LCDCON5_PWREN | ++ S3C2410_LCDCON5_HWSWP, ++ }, ++ { ++ .type = S3C2410_LCDCON1_TFT, ++ .width = 43, ++ .height = 58, ++ .xres = 240, ++ .yres = 320, ++ .bpp = 16, ++ ++ .pixclock = 40000, /* HCLK/4 */ ++ .left_margin = 104, ++ .right_margin = 8, ++ .hsync_len = 8, ++ .upper_margin = 2, ++ .lower_margin = 16, ++ .vsync_len = 2, ++ .lcdcon5 = S3C2410_LCDCON5_FRM565 | ++ S3C2410_LCDCON5_INVVCLK | ++ S3C2410_LCDCON5_INVVLINE | ++ S3C2410_LCDCON5_INVVFRAME | ++ S3C2410_LCDCON5_PWREN | ++ S3C2410_LCDCON5_HWSWP, ++ }, ++}; ++ ++static struct s3c2410fb_mach_info gta01_lcd_cfg __initdata = { ++ .displays = gta01_displays, ++ .num_displays = ARRAY_SIZE(gta01_displays), ++ .default_display = 0, ++ ++ .lpcsel = ((0xCE6) & ~7) | 1<<4, ++}; ++ ++static struct platform_device *gta01_devices[] __initdata = { ++ &s3c_device_usb, ++ &s3c_device_lcd, ++ &s3c_device_wdt, ++ &s3c_device_i2c, ++ &s3c_device_iis, ++ &s3c_device_sdi, ++ &s3c_device_usbgadget, ++ &s3c_device_nand, ++}; ++ ++static struct s3c2410_nand_set gta01_nand_sets[] = { ++ [0] = { ++ .name = "neo1973-nand", ++ .nr_chips = 1, ++ .flags = S3C2410_NAND_BBT, ++ }, ++}; ++ ++static struct s3c2410_platform_nand gta01_nand_info = { ++ .tacls = 20, ++ .twrph0 = 60, ++ .twrph1 = 20, ++ .nr_sets = ARRAY_SIZE(gta01_nand_sets), ++ .sets = gta01_nand_sets, ++}; ++ ++static void gta01_udc_command(enum s3c2410_udc_cmd_e cmd) ++{ ++ printk(KERN_DEBUG "%s(%d)\n", __func__, cmd); ++ ++ switch (cmd) { ++ case S3C2410_UDC_P_ENABLE: ++ s3c2410_gpio_setpin(GTA01_GPIO_USB_PULLUP, 1); ++ break; ++ case S3C2410_UDC_P_DISABLE: ++ s3c2410_gpio_setpin(GTA01_GPIO_USB_PULLUP, 0); ++ break; ++ default: ++ break; ++ } ++} ++ ++/* use a work queue, since I2C API inherently schedules ++ * and we get called in hardirq context from UDC driver */ ++ ++struct vbus_draw { ++ struct work_struct work; ++ int ma; ++}; ++static struct vbus_draw gta01_udc_vbus_drawer; ++ ++static void __gta01_udc_vbus_draw(struct work_struct *work) ++{ ++ /* this is a fix to work around boot-time ordering problems if the ++ * s3c2410_udc is initialized before the pcf50606 driver has defined ++ * pcf50606_global */ ++ if (!pcf50606_global) ++ return; ++ ++ if (gta01_udc_vbus_drawer.ma >= 500) { ++ /* enable fast charge */ ++ printk(KERN_DEBUG "udc: enabling fast charge\n"); ++ pcf50606_charge_fast(pcf50606_global, 1); ++ } else { ++ /* disable fast charge */ ++ printk(KERN_DEBUG "udc: disabling fast charge\n"); ++ pcf50606_charge_fast(pcf50606_global, 0); ++ } ++} ++ ++static void gta01_udc_vbus_draw(unsigned int ma) ++{ ++ gta01_udc_vbus_drawer.ma = ma; ++ schedule_work(>a01_udc_vbus_drawer.work); ++} ++ ++static struct s3c2410_udc_mach_info gta01_udc_cfg = { ++ .vbus_draw = gta01_udc_vbus_draw, ++}; ++ ++/* SPI */ ++ ++static struct spi_board_info gta01_spi_board_info[] = { ++ { ++ .modalias = "jbt6k74", ++ /* platform_data */ ++ /* controller_data */ ++ /* irq */ ++ .max_speed_hz = 10 * 1000 * 1000, ++ .bus_num = 1, ++ /* chip_select */ ++ }, ++}; ++ ++static void spi_gpio_cs(struct s3c2410_spigpio_info *spi, int cs) ++{ ++ switch (cs) { ++ case BITBANG_CS_ACTIVE: ++ s3c2410_gpio_setpin(S3C2410_GPG3, 0); ++ break; ++ case BITBANG_CS_INACTIVE: ++ s3c2410_gpio_setpin(S3C2410_GPG3, 1); ++ break; ++ } ++} ++ ++static struct s3c2410_spigpio_info spi_gpio_cfg = { ++ .pin_clk = S3C2410_GPG7, ++ .pin_mosi = S3C2410_GPG6, ++ .pin_miso = S3C2410_GPG5, ++ .board_size = ARRAY_SIZE(gta01_spi_board_info), ++ .board_info = gta01_spi_board_info, ++ .chip_select = &spi_gpio_cs, ++}; ++ ++static struct resource s3c_spi_lcm_resource[] = { ++ [0] = { ++ .start = S3C2410_GPG3, ++ .end = S3C2410_GPG3, ++ }, ++ [1] = { ++ .start = S3C2410_GPG5, ++ .end = S3C2410_GPG5, ++ }, ++ [2] = { ++ .start = S3C2410_GPG6, ++ .end = S3C2410_GPG6, ++ }, ++ [3] = { ++ .start = S3C2410_GPG7, ++ .end = S3C2410_GPG7, ++ }, ++}; ++ ++struct platform_device s3c_device_spi_lcm = { ++ .name = "s3c24xx-spi-gpio", ++ .id = 1, ++ .num_resources = ARRAY_SIZE(s3c_spi_lcm_resource), ++ .resource = s3c_spi_lcm_resource, ++ .dev = { ++ .platform_data = &spi_gpio_cfg, ++ }, ++}; ++ ++static struct gta01bl_machinfo backlight_machinfo = { ++ .default_intensity = 1, ++ .max_intensity = 1, ++ .limit_mask = 1, ++}; ++ ++static struct resource gta01_bl_resources[] = { ++ [0] = { ++ .start = GTA01_GPIO_BACKLIGHT, ++ .end = GTA01_GPIO_BACKLIGHT, ++ }, ++}; ++ ++struct platform_device gta01_bl_dev = { ++ .name = "gta01-bl", ++ .num_resources = ARRAY_SIZE(gta01_bl_resources), ++ .resource = gta01_bl_resources, ++ .dev = { ++ .platform_data = &backlight_machinfo, ++ }, ++}; ++ ++static struct resource gta01_led_resources[] = { ++ [0] = { ++ .start = GTA01_GPIO_VIBRATOR_ON, ++ .end = GTA01_GPIO_VIBRATOR_ON, ++ }, ++}; ++ ++struct platform_device gta01_led_dev = { ++ .name = "neo1973-vibrator", ++ .num_resources = ARRAY_SIZE(gta01_led_resources), ++ .resource = gta01_led_resources, ++}; ++ ++static struct resource gta01_button_resources[] = { ++ [0] = { ++ .start = GTA01_GPIO_AUX_KEY, ++ .end = GTA01_GPIO_AUX_KEY, ++ }, ++ [1] = { ++ .start = GTA01_GPIO_HOLD_KEY, ++ .end = GTA01_GPIO_HOLD_KEY, ++ }, ++ [2] = { ++ .start = GTA01_GPIO_JACK_INSERT, ++ .end = GTA01_GPIO_JACK_INSERT, ++ }, ++}; ++ ++struct platform_device gta01_button_dev = { ++ .name = "neo1973-button", ++ .num_resources = ARRAY_SIZE(gta01_button_resources), ++ .resource = gta01_button_resources, ++}; ++ ++static struct platform_device gta01_pm_gsm_dev = { ++ .name = "neo1973-pm-gsm", ++}; ++ ++/* USB */ ++static struct s3c2410_hcd_info gta01_usb_info = { ++ .port[0] = { ++ .flags = S3C_HCDFLG_USED, ++ }, ++ .port[1] = { ++ .flags = 0, ++ }, ++}; ++ ++static void __init gta01_map_io(void) ++{ ++ s3c24xx_init_io(gta01_iodesc, ARRAY_SIZE(gta01_iodesc)); ++ s3c24xx_init_clocks(12*1000*1000); ++ s3c24xx_init_uarts(gta01_uartcfgs, ARRAY_SIZE(gta01_uartcfgs)); ++} ++ ++static irqreturn_t gta01_modem_irq(int irq, void *param) ++{ ++ printk(KERN_DEBUG "modem wakeup interrupt\n"); ++ return IRQ_HANDLED; ++} ++ ++static void __init gta01_machine_init(void) ++{ ++ int rc; ++ ++ if (system_rev == GTA01v4_SYSTEM_REV || ++ system_rev == GTA01Bv2_SYSTEM_REV || ++ system_rev == GTA01Bv3_SYSTEM_REV || ++ system_rev == GTA01Bv4_SYSTEM_REV) { ++ gta01_udc_cfg.udc_command = gta01_udc_command; ++ } ++ ++ s3c_device_usb.dev.platform_data = >a01_usb_info; ++ s3c_device_nand.dev.platform_data = >a01_nand_info; ++ ++ s3c24xx_fb_set_platdata(>a01_lcd_cfg); ++ ++ INIT_WORK(>a01_udc_vbus_drawer.work, __gta01_udc_vbus_draw); ++ s3c24xx_udc_set_platdata(>a01_udc_cfg); ++ ++ /* Set LCD_RESET / XRES to high */ ++ s3c2410_gpio_cfgpin(S3C2410_GPC6, S3C2410_GPIO_OUTPUT); ++ s3c2410_gpio_setpin(S3C2410_GPC6, 1); ++ ++ /* SPI chip select is gpio output */ ++ s3c2410_gpio_cfgpin(S3C2410_GPG3, S3C2410_GPIO_OUTPUT); ++ s3c2410_gpio_setpin(S3C2410_GPG3, 1); ++ platform_device_register(&s3c_device_spi_lcm); ++ ++ platform_device_register(>a01_bl_dev); ++ platform_device_register(>a01_button_dev); ++ platform_device_register(>a01_pm_gsm_dev); ++ ++ switch (system_rev) { ++ case GTA01v3_SYSTEM_REV: ++ case GTA01v4_SYSTEM_REV: ++ /* just use the default (GTA01_IRQ_PCF50606) */ ++ break; ++ case GTA01Bv2_SYSTEM_REV: ++ case GTA01Bv3_SYSTEM_REV: ++ /* just use the default (GTA01_IRQ_PCF50606) */ ++ gta01_led_resources[0].start = ++ gta01_led_resources[0].end = GTA01Bv2_GPIO_VIBRATOR_ON; ++ break; ++ case GTA01Bv4_SYSTEM_REV: ++ gta01_pmu_resources[0].start = ++ gta01_pmu_resources[0].end = GTA01Bv4_IRQ_PCF50606; ++ gta01_led_resources[0].start = ++ gta01_led_resources[0].end = GTA01Bv4_GPIO_VIBRATOR_ON; ++ break; ++ } ++ mangle_pmu_pdata_by_system_rev(); ++ platform_device_register(>a01_pmu_dev); ++ platform_device_register(>a01_led_dev); ++ ++ platform_add_devices(gta01_devices, ARRAY_SIZE(gta01_devices)); ++ ++ s3c2410_pm_init(); ++ ++ set_irq_type(GTA01_IRQ_MODEM, IRQT_RISING); ++ rc = request_irq(GTA01_IRQ_MODEM, gta01_modem_irq, IRQF_DISABLED, ++ "modem", NULL); ++ if (!rc) ++ printk(KERN_ERR "GTA01: can't request GSM modem wakeup IRQ\n"); ++ enable_irq_wake(GTA01_IRQ_MODEM); ++} ++ ++MACHINE_START(NEO1973_GTA01, "GTA01") ++ .phys_io = S3C2410_PA_UART, ++ .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, ++ .boot_params = S3C2410_SDRAM_PA + 0x100, ++ .map_io = gta01_map_io, ++ .init_irq = s3c24xx_init_irq, ++ .init_machine = gta01_machine_init, ++ .timer = &s3c24xx_timer, ++MACHINE_END +diff --git a/arch/arm/plat-s3c24xx/Kconfig b/arch/arm/plat-s3c24xx/Kconfig +index b66fb3c..7ee4b82 100644 +--- a/arch/arm/plat-s3c24xx/Kconfig ++++ b/arch/arm/plat-s3c24xx/Kconfig +@@ -46,4 +46,9 @@ config MACH_SMDK + help + Common machine code for SMDK2410 and SMDK2440 + ++config MACH_NEO1973 ++ bool ++ help ++ Common machine code for Neo1973 hardware ++ + endif +diff --git a/include/asm-arm/arch-s3c2410/gta01.h b/include/asm-arm/arch-s3c2410/gta01.h +new file mode 100644 +index 0000000..1cc2099 +--- /dev/null ++++ b/include/asm-arm/arch-s3c2410/gta01.h +@@ -0,0 +1,70 @@ ++#ifndef _GTA01_H ++#define _GTA01_H ++ ++#include ++#include ++ ++/* Different hardware revisions, passed in ATAG_REVISION by u-boot */ ++#define GTA01v3_SYSTEM_REV 0x00000130 ++#define GTA01v4_SYSTEM_REV 0x00000140 ++#define GTA01Bv2_SYSTEM_REV 0x00000220 ++#define GTA01Bv3_SYSTEM_REV 0x00000230 ++#define GTA01Bv4_SYSTEM_REV 0x00000240 ++ ++/* Backlight */ ++struct gta01bl_machinfo { ++ unsigned int default_intensity; ++ unsigned int max_intensity; ++ unsigned int limit_mask; ++}; ++ ++/* Definitions common to all revisions */ ++#define GTA01_GPIO_BACKLIGHT S3C2410_GPB0 ++#define GTA01_GPIO_GPS_PWRON S3C2410_GPB1 ++#define GTA01_GPIO_MODEM_RST S3C2410_GPB6 ++#define GTA01_GPIO_MODEM_ON S3C2410_GPB7 ++#define GTA01_GPIO_LCD_RESET S3C2410_GPC6 ++#define GTA01_GPIO_PMU_IRQ S3C2410_GPG8 ++#define GTA01_GPIO_JACK_INSERT S3C2410_GPF4 ++#define GTA01_GPIO_nSD_DETECT S3C2410_GPF5 ++#define GTA01_GPIO_AUX_KEY S3C2410_GPF6 ++#define GTA01_GPIO_HOLD_KEY S3C2410_GPF7 ++#define GTA01_GPIO_VIBRATOR_ON S3C2410_GPG11 ++ ++#define GTA01_IRQ_MODEM IRQ_EINT1 ++#define GTA01_IRQ_JACK_INSERT IRQ_EINT4 ++#define GTA01_IRQ_nSD_DETECT IRQ_EINT5 ++#define GTA01_IRQ_AUX_KEY IRQ_EINT6 ++#define GTA01_IRQ_PCF50606 IRQ_EINT16 ++ ++/* GTA01v3 */ ++#define GTA01v3_GPIO_nGSM_EN S3C2410_GPG9 ++ ++/* GTA01v4 */ ++#define GTA01_GPIO_MODEM_DNLOAD S3C2410_GPG0 ++ ++/* GTA01Bv2 */ ++#define GTA01Bv2_GPIO_nGSM_EN S3C2410_GPF2 ++#define GTA01Bv2_GPIO_VIBRATOR_ON S3C2410_GPB10 ++ ++/* GTA01Bv3 */ ++#define GTA01_GPIO_GPS_EN_3V3 S3C2410_GPG9 ++ ++#define GTA01_GPIO_SDMMC_ON S3C2410_GPB2 ++#define GTA01_GPIO_BT_EN S3C2410_GPB5 ++#define GTA01_GPIO_AB_DETECT S3C2410_GPB8 ++#define GTA01_GPIO_USB_PULLUP S3C2410_GPB9 ++#define GTA01_GPIO_USB_ATTACH S3C2410_GPB10 ++ ++#define GTA01_GPIO_GPS_EN_2V8 S3C2410_GPG9 ++#define GTA01_GPIO_GPS_EN_3V S3C2410_GPG10 ++#define GTA01_GPIO_GPS_RESET S3C2410_GPC0 ++ ++/* GTA01Bv4 */ ++#define GTA01Bv4_GPIO_nNAND_WP S3C2410_GPA16 ++#define GTA01Bv4_GPIO_VIBRATOR_ON S3C2410_GPB3 ++#define GTA01Bv4_GPIO_PMU_IRQ S3C2410_GPG1 ++ ++#define GTA01Bv4_IRQ_PCF50606 IRQ_EINT9 ++ ++#endif /* _GTA01_H */ +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1012-gta01-jbt6k74.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1012-gta01-jbt6k74.patch.patch new file mode 100644 index 0000000000..210d004126 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1012-gta01-jbt6k74.patch.patch @@ -0,0 +1,748 @@ +From 6887823c9ab409a15ea73bda8a8b0523cebbe444 Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:31:13 +0100 +Subject: [PATCH] gta01-jbt6k74.patch + This driver adds support for the SPI-based control interface of the LCM (LCD + Panel) found on the FIC GTA01 hardware. + +The specific panel in this hardware is a TPO TD028TTEC1, but the driver should +be able to drive any other diplay based on the JBT6K74-AS controller ASIC. + +Signed-off-by: Harald Welte +--- + arch/arm/mach-s3c2410/Kconfig | 1 + + drivers/video/display/Kconfig | 11 + + drivers/video/display/Makefile | 1 + + drivers/video/display/jbt6k74.c | 678 +++++++++++++++++++++++++++++++++++++++ + 4 files changed, 691 insertions(+), 0 deletions(-) + create mode 100644 drivers/video/display/jbt6k74.c + +diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig +index a2acd65..ff339e1 100644 +--- a/arch/arm/mach-s3c2410/Kconfig ++++ b/arch/arm/mach-s3c2410/Kconfig +@@ -107,6 +107,7 @@ config MACH_VR1000 + config MACH_QT2410 + bool "QT2410" + select CPU_S3C2410 ++ select DISPLAY_JBT6K74 + help + Say Y here if you are using the Armzone QT2410 + +diff --git a/drivers/video/display/Kconfig b/drivers/video/display/Kconfig +index f99af93..f0da483 100644 +--- a/drivers/video/display/Kconfig ++++ b/drivers/video/display/Kconfig +@@ -21,4 +21,15 @@ config DISPLAY_SUPPORT + comment "Display hardware drivers" + depends on DISPLAY_SUPPORT + ++config DISPLAY_JBT6K74 ++ tristate "TPO JBT6K74-AS TFT display ASIC control interface" ++ depends on SPI_MASTER && SYSFS ++ help ++ SPI driver for the control interface of TFT panels containing ++ the TPO JBT6K74-AS controller ASIC, such as the TPO TD028TTEC1 ++ TFT diplay module used in the FIC/OpenMoko Neo1973 GSM phones. ++ ++ The control interface is required for display operation, as it ++ controls power management, display timing and gamma calibration. ++ + endmenu +diff --git a/drivers/video/display/Makefile b/drivers/video/display/Makefile +index c0ea832..011b69d 100644 +--- a/drivers/video/display/Makefile ++++ b/drivers/video/display/Makefile +@@ -3,4 +3,5 @@ + display-objs := display-sysfs.o + + obj-$(CONFIG_DISPLAY_SUPPORT) += display.o ++obj-$(CONFIG_DISPLAY_JBT6K74) += jbt6k74.o + +diff --git a/drivers/video/display/jbt6k74.c b/drivers/video/display/jbt6k74.c +new file mode 100644 +index 0000000..d021d7e +--- /dev/null ++++ b/drivers/video/display/jbt6k74.c +@@ -0,0 +1,678 @@ ++/* Linux kernel driver for the tpo JBT6K74-AS LCM ASIC ++ * ++ * Copyright (C) 2006-2007 by OpenMoko, Inc. ++ * Author: Harald Welte , ++ * Stefan Schmidt ++ * All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ * ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++enum jbt_register { ++ JBT_REG_SLEEP_IN = 0x10, ++ JBT_REG_SLEEP_OUT = 0x11, ++ ++ JBT_REG_DISPLAY_OFF = 0x28, ++ JBT_REG_DISPLAY_ON = 0x29, ++ ++ JBT_REG_RGB_FORMAT = 0x3a, ++ JBT_REG_QUAD_RATE = 0x3b, ++ ++ JBT_REG_POWER_ON_OFF = 0xb0, ++ JBT_REG_BOOSTER_OP = 0xb1, ++ JBT_REG_BOOSTER_MODE = 0xb2, ++ JBT_REG_BOOSTER_FREQ = 0xb3, ++ JBT_REG_OPAMP_SYSCLK = 0xb4, ++ JBT_REG_VSC_VOLTAGE = 0xb5, ++ JBT_REG_VCOM_VOLTAGE = 0xb6, ++ JBT_REG_EXT_DISPL = 0xb7, ++ JBT_REG_OUTPUT_CONTROL = 0xb8, ++ JBT_REG_DCCLK_DCEV = 0xb9, ++ JBT_REG_DISPLAY_MODE1 = 0xba, ++ JBT_REG_DISPLAY_MODE2 = 0xbb, ++ JBT_REG_DISPLAY_MODE = 0xbc, ++ JBT_REG_ASW_SLEW = 0xbd, ++ JBT_REG_DUMMY_DISPLAY = 0xbe, ++ JBT_REG_DRIVE_SYSTEM = 0xbf, ++ ++ JBT_REG_SLEEP_OUT_FR_A = 0xc0, ++ JBT_REG_SLEEP_OUT_FR_B = 0xc1, ++ JBT_REG_SLEEP_OUT_FR_C = 0xc2, ++ JBT_REG_SLEEP_IN_LCCNT_D = 0xc3, ++ JBT_REG_SLEEP_IN_LCCNT_E = 0xc4, ++ JBT_REG_SLEEP_IN_LCCNT_F = 0xc5, ++ JBT_REG_SLEEP_IN_LCCNT_G = 0xc6, ++ ++ JBT_REG_GAMMA1_FINE_1 = 0xc7, ++ JBT_REG_GAMMA1_FINE_2 = 0xc8, ++ JBT_REG_GAMMA1_INCLINATION = 0xc9, ++ JBT_REG_GAMMA1_BLUE_OFFSET = 0xca, ++ ++ /* VGA */ ++ JBT_REG_BLANK_CONTROL = 0xcf, ++ JBT_REG_BLANK_TH_TV = 0xd0, ++ JBT_REG_CKV_ON_OFF = 0xd1, ++ JBT_REG_CKV_1_2 = 0xd2, ++ JBT_REG_OEV_TIMING = 0xd3, ++ JBT_REG_ASW_TIMING_1 = 0xd4, ++ JBT_REG_ASW_TIMING_2 = 0xd5, ++ ++ /* QVGA */ ++ JBT_REG_BLANK_CONTROL_QVGA = 0xd6, ++ JBT_REG_BLANK_TH_TV_QVGA = 0xd7, ++ JBT_REG_CKV_ON_OFF_QVGA = 0xd8, ++ JBT_REG_CKV_1_2_QVGA = 0xd9, ++ JBT_REG_OEV_TIMING_QVGA = 0xde, ++ JBT_REG_ASW_TIMING_1_QVGA = 0xdf, ++ JBT_REG_ASW_TIMING_2_QVGA = 0xe0, ++ ++ ++ JBT_REG_HCLOCK_VGA = 0xec, ++ JBT_REG_HCLOCK_QVGA = 0xed, ++ ++}; ++ ++enum jbt_state { ++ JBT_STATE_DEEP_STANDBY, ++ JBT_STATE_SLEEP, ++ JBT_STATE_NORMAL, ++ JBT_STATE_QVGA_NORMAL, ++}; ++ ++static const char *jbt_state_names[] = { ++ [JBT_STATE_DEEP_STANDBY] = "deep-standby", ++ [JBT_STATE_SLEEP] = "sleep", ++ [JBT_STATE_NORMAL] = "normal", ++ [JBT_STATE_QVGA_NORMAL] = "qvga-normal", ++}; ++ ++struct jbt_info { ++ enum jbt_state state, last_state; ++ struct spi_device *spi_dev; ++ struct mutex lock; /* protects tx_buf and reg_cache */ ++ u16 tx_buf[8]; ++ u16 reg_cache[0xEE]; ++}; ++ ++#define JBT_COMMAND 0x000 ++#define JBT_DATA 0x100 ++ ++static int jbt_reg_write_nodata(struct jbt_info *jbt, u8 reg) ++{ ++ int rc; ++ ++ mutex_lock(&jbt->lock); ++ ++ jbt->tx_buf[0] = JBT_COMMAND | reg; ++ rc = spi_write(jbt->spi_dev, (u8 *)jbt->tx_buf, ++ 1*sizeof(u16)); ++ if (rc == 0) ++ jbt->reg_cache[reg] = 0; ++ ++ mutex_unlock(&jbt->lock); ++ ++ return rc; ++} ++ ++ ++static int jbt_reg_write(struct jbt_info *jbt, u8 reg, u8 data) ++{ ++ int rc; ++ ++ mutex_lock(&jbt->lock); ++ ++ jbt->tx_buf[0] = JBT_COMMAND | reg; ++ jbt->tx_buf[1] = JBT_DATA | data; ++ rc = spi_write(jbt->spi_dev, (u8 *)jbt->tx_buf, ++ 2*sizeof(u16)); ++ if (rc == 0) ++ jbt->reg_cache[reg] = data; ++ ++ mutex_unlock(&jbt->lock); ++ ++ return rc; ++} ++ ++static int jbt_reg_write16(struct jbt_info *jbt, u8 reg, u16 data) ++{ ++ int rc; ++ ++ mutex_lock(&jbt->lock); ++ ++ jbt->tx_buf[0] = JBT_COMMAND | reg; ++ jbt->tx_buf[1] = JBT_DATA | (data >> 8); ++ jbt->tx_buf[2] = JBT_DATA | (data & 0xff); ++ ++ rc = spi_write(jbt->spi_dev, (u8 *)jbt->tx_buf, ++ 3*sizeof(u16)); ++ if (rc == 0) ++ jbt->reg_cache[reg] = data; ++ ++ mutex_unlock(&jbt->lock); ++ ++ return rc; ++} ++ ++static int jbt_init_regs(struct jbt_info *jbt, int qvga) ++{ ++ int rc; ++ ++ dev_dbg(&jbt->spi_dev->dev, "entering %cVGA mode\n", qvga ? 'Q' : ' '); ++ ++ rc = jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE1, 0x01); ++ rc |= jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE2, 0x00); ++ rc |= jbt_reg_write(jbt, JBT_REG_RGB_FORMAT, 0x60); ++ rc |= jbt_reg_write(jbt, JBT_REG_DRIVE_SYSTEM, 0x10); ++ rc |= jbt_reg_write(jbt, JBT_REG_BOOSTER_OP, 0x56); ++ rc |= jbt_reg_write(jbt, JBT_REG_BOOSTER_MODE, 0x33); ++ rc |= jbt_reg_write(jbt, JBT_REG_BOOSTER_FREQ, 0x11); ++ rc |= jbt_reg_write(jbt, JBT_REG_OPAMP_SYSCLK, 0x02); ++ rc |= jbt_reg_write(jbt, JBT_REG_VSC_VOLTAGE, 0x2b); ++ rc |= jbt_reg_write(jbt, JBT_REG_VCOM_VOLTAGE, 0x40); ++ rc |= jbt_reg_write(jbt, JBT_REG_EXT_DISPL, 0x03); ++ rc |= jbt_reg_write(jbt, JBT_REG_DCCLK_DCEV, 0x04); ++ /* ++ * default of 0x02 in JBT_REG_ASW_SLEW responsible for 72Hz requirement ++ * to avoid red / blue flicker ++ */ ++ rc |= jbt_reg_write(jbt, JBT_REG_ASW_SLEW, 0x04); ++ rc |= jbt_reg_write(jbt, JBT_REG_DUMMY_DISPLAY, 0x00); ++ ++ rc |= jbt_reg_write(jbt, JBT_REG_SLEEP_OUT_FR_A, 0x11); ++ rc |= jbt_reg_write(jbt, JBT_REG_SLEEP_OUT_FR_B, 0x11); ++ rc |= jbt_reg_write(jbt, JBT_REG_SLEEP_OUT_FR_C, 0x11); ++ rc |= jbt_reg_write16(jbt, JBT_REG_SLEEP_IN_LCCNT_D, 0x2040); ++ rc |= jbt_reg_write16(jbt, JBT_REG_SLEEP_IN_LCCNT_E, 0x60c0); ++ rc |= jbt_reg_write16(jbt, JBT_REG_SLEEP_IN_LCCNT_F, 0x1020); ++ rc |= jbt_reg_write16(jbt, JBT_REG_SLEEP_IN_LCCNT_G, 0x60c0); ++ ++ rc |= jbt_reg_write16(jbt, JBT_REG_GAMMA1_FINE_1, 0x5533); ++ rc |= jbt_reg_write(jbt, JBT_REG_GAMMA1_FINE_2, 0x00); ++ rc |= jbt_reg_write(jbt, JBT_REG_GAMMA1_INCLINATION, 0x00); ++ rc |= jbt_reg_write(jbt, JBT_REG_GAMMA1_BLUE_OFFSET, 0x00); ++ ++ if (!qvga) { ++ rc |= jbt_reg_write16(jbt, JBT_REG_HCLOCK_VGA, 0x1f0); ++ rc |= jbt_reg_write(jbt, JBT_REG_BLANK_CONTROL, 0x02); ++ rc |= jbt_reg_write16(jbt, JBT_REG_BLANK_TH_TV, 0x0804); ++ ++ rc |= jbt_reg_write(jbt, JBT_REG_CKV_ON_OFF, 0x01); ++ rc |= jbt_reg_write16(jbt, JBT_REG_CKV_1_2, 0x0000); ++ ++ rc |= jbt_reg_write16(jbt, JBT_REG_OEV_TIMING, 0x0d0e); ++ rc |= jbt_reg_write16(jbt, JBT_REG_ASW_TIMING_1, 0x11a4); ++ rc |= jbt_reg_write(jbt, JBT_REG_ASW_TIMING_2, 0x0e); ++ } else { ++ rc |= jbt_reg_write16(jbt, JBT_REG_HCLOCK_QVGA, 0x00ff); ++ rc |= jbt_reg_write(jbt, JBT_REG_BLANK_CONTROL_QVGA, 0x02); ++ rc |= jbt_reg_write16(jbt, JBT_REG_BLANK_TH_TV_QVGA, 0x0804); ++ ++ rc |= jbt_reg_write(jbt, JBT_REG_CKV_ON_OFF_QVGA, 0x01); ++ rc |= jbt_reg_write16(jbt, JBT_REG_CKV_1_2_QVGA, 0x0008); ++ ++ rc |= jbt_reg_write16(jbt, JBT_REG_OEV_TIMING_QVGA, 0x050a); ++ rc |= jbt_reg_write16(jbt, JBT_REG_ASW_TIMING_1_QVGA, 0x0a19); ++ rc |= jbt_reg_write(jbt, JBT_REG_ASW_TIMING_2_QVGA, 0x0a); ++ } ++ ++ return rc ? -EIO : 0; ++} ++ ++static int standby_to_sleep(struct jbt_info *jbt) ++{ ++ int rc; ++ ++ /* three times command zero */ ++ rc = jbt_reg_write_nodata(jbt, 0x00); ++ mdelay(1); ++ rc |= jbt_reg_write_nodata(jbt, 0x00); ++ mdelay(1); ++ rc |= jbt_reg_write_nodata(jbt, 0x00); ++ mdelay(1); ++ ++ /* deep standby out */ ++ rc |= jbt_reg_write(jbt, JBT_REG_POWER_ON_OFF, 0x17); ++ ++ return rc ? -EIO : 0; ++} ++ ++static int sleep_to_normal(struct jbt_info *jbt) ++{ ++ int rc; ++ ++ /* RGB I/F on, RAM wirte off, QVGA through, SIGCON enable */ ++ rc = jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE, 0x80); ++ ++ /* Quad mode off */ ++ rc |= jbt_reg_write(jbt, JBT_REG_QUAD_RATE, 0x00); ++ ++ /* AVDD on, XVDD on */ ++ rc |= jbt_reg_write(jbt, JBT_REG_POWER_ON_OFF, 0x16); ++ ++ /* Output control */ ++ rc |= jbt_reg_write16(jbt, JBT_REG_OUTPUT_CONTROL, 0xfff9); ++ ++ /* Sleep mode off */ ++ rc |= jbt_reg_write_nodata(jbt, JBT_REG_SLEEP_OUT); ++ ++ /* initialize register set */ ++ rc |= jbt_init_regs(jbt, 0); ++ ++ return rc ? -EIO : 0; ++} ++ ++static int sleep_to_qvga_normal(struct jbt_info *jbt) ++{ ++ int rc; ++ ++ /* RGB I/F on, RAM wirte off, QVGA through, SIGCON enable */ ++ rc = jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE, 0x81); ++ ++ /* Quad mode on */ ++ rc |= jbt_reg_write(jbt, JBT_REG_QUAD_RATE, 0x22); ++ ++ /* AVDD on, XVDD on */ ++ rc |= jbt_reg_write(jbt, JBT_REG_POWER_ON_OFF, 0x16); ++ ++ /* Output control */ ++ rc |= jbt_reg_write16(jbt, JBT_REG_OUTPUT_CONTROL, 0xfff9); ++ ++ /* Sleep mode off */ ++ rc |= jbt_reg_write_nodata(jbt, JBT_REG_SLEEP_OUT); ++ ++ /* initialize register set for qvga*/ ++ rc |= jbt_init_regs(jbt, 1); ++ ++ return rc ? -EIO : 0; ++} ++ ++static int normal_to_sleep(struct jbt_info *jbt) ++{ ++ int rc; ++ ++ rc = jbt_reg_write_nodata(jbt, JBT_REG_DISPLAY_OFF); ++ rc |= jbt_reg_write16(jbt, JBT_REG_OUTPUT_CONTROL, 0x8002); ++ rc |= jbt_reg_write_nodata(jbt, JBT_REG_SLEEP_IN); ++ ++ return rc ? -EIO : 0; ++} ++ ++static int sleep_to_standby(struct jbt_info *jbt) ++{ ++ return jbt_reg_write(jbt, JBT_REG_POWER_ON_OFF, 0x00); ++} ++ ++/* frontend function */ ++int jbt6k74_enter_state(struct jbt_info *jbt, enum jbt_state new_state) ++{ ++ int rc = -EINVAL; ++ ++ dev_dbg(&jbt->spi_dev->dev, "entering (old_state=%u, " ++ "new_state=%u)\n", jbt->state, new_state); ++ ++ switch (jbt->state) { ++ case JBT_STATE_DEEP_STANDBY: ++ switch (new_state) { ++ case JBT_STATE_DEEP_STANDBY: ++ rc = 0; ++ break; ++ case JBT_STATE_SLEEP: ++ rc = standby_to_sleep(jbt); ++ break; ++ case JBT_STATE_NORMAL: ++ /* first transition into sleep */ ++ rc = standby_to_sleep(jbt); ++ /* then transition into normal */ ++ rc |= sleep_to_normal(jbt); ++ break; ++ case JBT_STATE_QVGA_NORMAL: ++ /* first transition into sleep */ ++ rc = standby_to_sleep(jbt); ++ /* then transition into normal */ ++ rc |= sleep_to_qvga_normal(jbt); ++ break; ++ } ++ break; ++ case JBT_STATE_SLEEP: ++ switch (new_state) { ++ case JBT_STATE_SLEEP: ++ rc = 0; ++ break; ++ case JBT_STATE_DEEP_STANDBY: ++ rc = sleep_to_standby(jbt); ++ break; ++ case JBT_STATE_NORMAL: ++ rc = sleep_to_normal(jbt); ++ break; ++ case JBT_STATE_QVGA_NORMAL: ++ rc = sleep_to_qvga_normal(jbt); ++ break; ++ } ++ break; ++ case JBT_STATE_NORMAL: ++ switch (new_state) { ++ case JBT_STATE_NORMAL: ++ rc = 0; ++ break; ++ case JBT_STATE_DEEP_STANDBY: ++ /* first transition into sleep */ ++ rc = normal_to_sleep(jbt); ++ /* then transition into deep standby */ ++ rc |= sleep_to_standby(jbt); ++ break; ++ case JBT_STATE_SLEEP: ++ rc = normal_to_sleep(jbt); ++ break; ++ case JBT_STATE_QVGA_NORMAL: ++ /* first transition into sleep */ ++ rc = normal_to_sleep(jbt); ++ /* second transition into deep standby */ ++ rc |= sleep_to_standby(jbt); ++ /* third transition into sleep */ ++ rc |= standby_to_sleep(jbt); ++ /* fourth transition into normal */ ++ rc |= sleep_to_qvga_normal(jbt); ++ break; ++ } ++ break; ++ case JBT_STATE_QVGA_NORMAL: ++ switch (new_state) { ++ case JBT_STATE_QVGA_NORMAL: ++ rc = 0; ++ break; ++ case JBT_STATE_DEEP_STANDBY: ++ /* first transition into sleep */ ++ rc = normal_to_sleep(jbt); ++ /* then transition into deep standby */ ++ rc |= sleep_to_standby(jbt); ++ break; ++ case JBT_STATE_SLEEP: ++ rc = normal_to_sleep(jbt); ++ break; ++ case JBT_STATE_NORMAL: ++ /* first transition into sleep */ ++ rc = normal_to_sleep(jbt); ++ /* second transition into deep standby */ ++ rc |= sleep_to_standby(jbt); ++ /* third transition into sleep */ ++ rc |= standby_to_sleep(jbt); ++ /* fourth transition into normal */ ++ rc |= sleep_to_normal(jbt); ++ break; ++ } ++ break; ++ } ++ if (rc == 0) ++ jbt->state = new_state; ++ ++ return rc; ++} ++EXPORT_SYMBOL_GPL(jbt6k74_enter_state); ++ ++int jbt6k74_display_onoff(struct jbt_info *jbt, int on) ++{ ++ if (on) ++ return jbt_reg_write_nodata(jbt, JBT_REG_DISPLAY_ON); ++ else ++ return jbt_reg_write_nodata(jbt, JBT_REG_DISPLAY_OFF); ++} ++EXPORT_SYMBOL_GPL(jbt6k74_display_onoff); ++ ++static ssize_t state_read(struct device *dev, struct device_attribute *attr, ++ char *buf) ++{ ++ struct jbt_info *jbt = dev_get_drvdata(dev); ++ ++ if (jbt->state >= ARRAY_SIZE(jbt_state_names)) ++ return -EIO; ++ ++ return sprintf(buf, "%s\n", jbt_state_names[jbt->state]); ++} ++ ++static ssize_t state_write(struct device *dev, struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++ struct jbt_info *jbt = dev_get_drvdata(dev); ++ int i, rc; ++ ++ for (i = 0; i < ARRAY_SIZE(jbt_state_names); i++) { ++ if (!strncmp(buf, jbt_state_names[i], ++ strlen(jbt_state_names[i]))) { ++ rc = jbt6k74_enter_state(jbt, i); ++ if (rc) ++ return rc; ++ switch (i) { ++ case JBT_STATE_NORMAL: ++ case JBT_STATE_QVGA_NORMAL: ++ /* Enable display again after deep-standby */ ++ rc = jbt6k74_display_onoff(jbt, 1); ++ if (rc) ++ return rc; ++ break; ++ default: ++ break; ++ } ++ return count; ++ } ++ } ++ ++ return -EINVAL; ++} ++ ++static DEVICE_ATTR(state, 0644, state_read, state_write); ++ ++static int reg_by_string(const char *name) ++{ ++ if (!strcmp(name, "gamma_fine1")) ++ return JBT_REG_GAMMA1_FINE_1; ++ else if (!strcmp(name, "gamma_fine2")) ++ return JBT_REG_GAMMA1_FINE_2; ++ else if (!strcmp(name, "gamma_inclination")) ++ return JBT_REG_GAMMA1_INCLINATION; ++ else ++ return JBT_REG_GAMMA1_BLUE_OFFSET; ++} ++ ++static ssize_t gamma_read(struct device *dev, struct device_attribute *attr, ++ char *buf) ++{ ++ struct jbt_info *jbt = dev_get_drvdata(dev); ++ int reg = reg_by_string(attr->attr.name); ++ u16 val; ++ ++ mutex_lock(&jbt->lock); ++ val = jbt->reg_cache[reg]; ++ mutex_unlock(&jbt->lock); ++ ++ return sprintf(buf, "0x%04x\n", val); ++} ++ ++static ssize_t gamma_write(struct device *dev, struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++ struct jbt_info *jbt = dev_get_drvdata(dev); ++ int reg = reg_by_string(attr->attr.name); ++ unsigned long val = simple_strtoul(buf, NULL, 10); ++ ++ jbt_reg_write(jbt, reg, val & 0xff); ++ ++ return count; ++} ++ ++static DEVICE_ATTR(gamma_fine1, 0644, gamma_read, gamma_write); ++static DEVICE_ATTR(gamma_fine2, 0644, gamma_read, gamma_write); ++static DEVICE_ATTR(gamma_inclination, 0644, gamma_read, gamma_write); ++static DEVICE_ATTR(gamma_blue_offset, 0644, gamma_read, gamma_write); ++ ++static struct attribute *jbt_sysfs_entries[] = { ++ &dev_attr_state.attr, ++ &dev_attr_gamma_fine1.attr, ++ &dev_attr_gamma_fine2.attr, ++ &dev_attr_gamma_inclination.attr, ++ &dev_attr_gamma_blue_offset.attr, ++ NULL, ++}; ++ ++static struct attribute_group jbt_attr_group = { ++ .name = NULL, ++ .attrs = jbt_sysfs_entries, ++}; ++ ++/* linux device model infrastructure */ ++ ++static int __devinit jbt_probe(struct spi_device *spi) ++{ ++ int rc; ++ struct jbt_info *jbt; ++ ++ /* the controller doesn't have a MISO pin; we can't do detection */ ++ ++ spi->mode = SPI_CPOL | SPI_CPHA; ++ spi->bits_per_word = 9; ++ ++ rc = spi_setup(spi); ++ if (rc < 0) { ++ dev_err(&spi->dev, ++ "error during spi_setup of jbt6k74 driver\n"); ++ return rc; ++ } ++ ++ jbt = kzalloc(sizeof(*jbt), GFP_KERNEL); ++ if (!jbt) ++ return -ENOMEM; ++ ++ jbt->spi_dev = spi; ++ jbt->state = JBT_STATE_DEEP_STANDBY; ++ mutex_init(&jbt->lock); ++ ++ dev_set_drvdata(&spi->dev, jbt); ++ ++ rc = jbt6k74_enter_state(jbt, JBT_STATE_NORMAL); ++ if (rc < 0) { ++ dev_err(&spi->dev, "cannot enter NORMAL state\n"); ++ goto err_free_drvdata; ++ } ++ ++ rc = jbt6k74_display_onoff(jbt, 1); ++ if (rc < 0) { ++ dev_err(&spi->dev, "cannot switch display on\n"); ++ goto err_standby; ++ } ++ ++ rc = sysfs_create_group(&spi->dev.kobj, &jbt_attr_group); ++ if (rc < 0) { ++ dev_err(&spi->dev, "cannot create sysfs group\n"); ++ goto err_off; ++ } ++ ++ return 0; ++ ++err_off: ++ jbt6k74_display_onoff(jbt, 0); ++err_standby: ++ jbt6k74_enter_state(jbt, JBT_STATE_DEEP_STANDBY); ++err_free_drvdata: ++ dev_set_drvdata(&spi->dev, NULL); ++ kfree(jbt); ++ ++ return rc; ++} ++ ++static int __devexit jbt_remove(struct spi_device *spi) ++{ ++ struct jbt_info *jbt = dev_get_drvdata(&spi->dev); ++ ++ /* We don't want to switch off the display in case the user ++ * accidentially onloads the module (whose use count normally is 0) */ ++ ++ sysfs_remove_group(&spi->dev.kobj, &jbt_attr_group); ++ dev_set_drvdata(&spi->dev, NULL); ++ kfree(jbt); ++ ++ return 0; ++} ++ ++#ifdef CONFIG_PM ++static int jbt_suspend(struct spi_device *spi, pm_message_t state) ++{ ++ struct jbt_info *jbt = dev_get_drvdata(&spi->dev); ++ ++ /* Save mode for resume */ ++ jbt->last_state = jbt->state; ++ jbt6k74_enter_state(jbt, JBT_STATE_DEEP_STANDBY); ++ ++ return 0; ++} ++ ++static int jbt_resume(struct spi_device *spi) ++{ ++ struct jbt_info *jbt = dev_get_drvdata(&spi->dev); ++ ++ jbt6k74_enter_state(jbt, jbt->last_state); ++ ++ switch (jbt->last_state) { ++ case JBT_STATE_NORMAL: ++ case JBT_STATE_QVGA_NORMAL: ++ jbt6k74_display_onoff(jbt, 1); ++ break; ++ default: ++ break; ++ } ++ ++ return 0; ++} ++#else ++#define jbt_suspend NULL ++#define jbt_resume NULL ++#endif ++ ++static struct spi_driver jbt6k74_driver = { ++ .driver = { ++ .name = "jbt6k74", ++ .owner = THIS_MODULE, ++ }, ++ ++ .probe = jbt_probe, ++ .remove = __devexit_p(jbt_remove), ++ .suspend = jbt_suspend, ++ .resume = jbt_resume, ++}; ++ ++static int __init jbt_init(void) ++{ ++ return spi_register_driver(&jbt6k74_driver); ++} ++ ++static void __exit jbt_exit(void) ++{ ++ spi_unregister_driver(&jbt6k74_driver); ++} ++ ++MODULE_DESCRIPTION("SPI driver for tpo JBT6K74-AS LCM control interface"); ++MODULE_AUTHOR("Harald Welte "); ++MODULE_LICENSE("GPL"); ++ ++module_init(jbt_init); ++module_exit(jbt_exit); +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1013-gta01-inputdevice.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1013-gta01-inputdevice.patch.patch new file mode 100644 index 0000000000..5f00bc0ffd --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1013-gta01-inputdevice.patch.patch @@ -0,0 +1,298 @@ +From 042ef688ad9f49101fcb5a195a5ecdbad8fde2f8 Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:31:24 +0100 +Subject: [PATCH] gta01-inputdevice.patch + This provides support for the GTA01 keyboard + +Signed-off-by: Harald Welte +--- + drivers/input/keyboard/Kconfig | 12 ++ + drivers/input/keyboard/Makefile | 1 + + drivers/input/keyboard/neo1973kbd.c | 242 +++++++++++++++++++++++++++++++++++ + 3 files changed, 255 insertions(+), 0 deletions(-) + create mode 100644 drivers/input/keyboard/neo1973kbd.c + +diff --git a/drivers/input/keyboard/Kconfig b/drivers/input/keyboard/Kconfig +index 086d58c..3b9990e 100644 +--- a/drivers/input/keyboard/Kconfig ++++ b/drivers/input/keyboard/Kconfig +@@ -293,4 +293,16 @@ config KEYBOARD_BFIN + To compile this driver as a module, choose M here: the + module will be called bf54x-keys. + ++config KEYBOARD_NEO1973 ++ tristate "FIC Neo1973 buttons" ++ depends on MACH_NEO1973 ++ default y ++ help ++ Say Y here to enable the buttons on the FIC Neo1973 ++ GSM phone. ++ ++ To compile this driver as a module, choose M here: the ++ module will be called neo1973kbd. ++ ++ + endif +diff --git a/drivers/input/keyboard/Makefile b/drivers/input/keyboard/Makefile +index e97455f..68ecfc5 100644 +--- a/drivers/input/keyboard/Makefile ++++ b/drivers/input/keyboard/Makefile +@@ -14,6 +14,7 @@ obj-$(CONFIG_KEYBOARD_LOCOMO) += locomokbd.o + obj-$(CONFIG_KEYBOARD_NEWTON) += newtonkbd.o + obj-$(CONFIG_KEYBOARD_STOWAWAY) += stowaway.o + obj-$(CONFIG_KEYBOARD_CORGI) += corgikbd.o ++obj-$(CONFIG_KEYBOARD_NEO1973) += neo1973kbd.o + obj-$(CONFIG_KEYBOARD_SPITZ) += spitzkbd.o + obj-$(CONFIG_KEYBOARD_HIL) += hil_kbd.o + obj-$(CONFIG_KEYBOARD_HIL_OLD) += hilkbd.o +diff --git a/drivers/input/keyboard/neo1973kbd.c b/drivers/input/keyboard/neo1973kbd.c +new file mode 100644 +index 0000000..917d5ae +--- /dev/null ++++ b/drivers/input/keyboard/neo1973kbd.c +@@ -0,0 +1,242 @@ ++/* ++ * Keyboard driver for FIC Neo1973 GSM phone ++ * ++ * (C) 2006-2007 by OpenMoko, Inc. ++ * Author: Harald Welte ++ * All rights reserved. ++ * ++ * inspired by corkgbd.c by Richard Purdie ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++ ++struct neo1973kbd { ++ struct input_dev *input; ++ unsigned int suspended; ++ unsigned long suspend_jiffies; ++}; ++ ++static irqreturn_t neo1973kbd_aux_irq(int irq, void *dev_id) ++{ ++ struct neo1973kbd *neo1973kbd_data = dev_id; ++ ++ /* FIXME: use GPIO from platform_dev resources */ ++ if (s3c2410_gpio_getpin(GTA01_GPIO_AUX_KEY)) ++ input_report_key(neo1973kbd_data->input, KEY_PHONE, 0); ++ else ++ input_report_key(neo1973kbd_data->input, KEY_PHONE, 1); ++ ++ input_sync(neo1973kbd_data->input); ++ ++ return IRQ_HANDLED; ++} ++ ++static irqreturn_t neo1973kbd_hold_irq(int irq, void *dev_id) ++{ ++ struct neo1973kbd *neo1973kbd_data = dev_id; ++ ++ /* FIXME: use GPIO from platform_dev resources */ ++ if (s3c2410_gpio_getpin(GTA01_GPIO_HOLD_KEY)) ++ input_report_key(neo1973kbd_data->input, KEY_PAUSE, 1); ++ else ++ input_report_key(neo1973kbd_data->input, KEY_PAUSE, 0); ++ ++ input_sync(neo1973kbd_data->input); ++ ++ return IRQ_HANDLED; ++} ++ ++static irqreturn_t neo1973kbd_headphone_irq(int irq, void *dev_id) ++{ ++ struct neo1973kbd *neo1973kbd_data = dev_id; ++ ++ /* FIXME: use GPIO from platform_dev resources */ ++ if (s3c2410_gpio_getpin(GTA01_GPIO_JACK_INSERT)) ++ input_report_switch(neo1973kbd_data->input, ++ SW_HEADPHONE_INSERT, 1); ++ else ++ input_report_switch(neo1973kbd_data->input, ++ SW_HEADPHONE_INSERT, 0); ++ ++ input_sync(neo1973kbd_data->input); ++ ++ return IRQ_HANDLED; ++} ++ ++#ifdef CONFIG_PM ++static int neo1973kbd_suspend(struct platform_device *dev, pm_message_t state) ++{ ++ struct neo1973kbd *neo1973kbd = platform_get_drvdata(dev); ++ ++ neo1973kbd->suspended = 1; ++ ++ return 0; ++} ++ ++static int neo1973kbd_resume(struct platform_device *dev) ++{ ++ struct neo1973kbd *neo1973kbd = platform_get_drvdata(dev); ++ ++ neo1973kbd->suspended = 0; ++ ++ return 0; ++} ++#else ++#define neo1973kbd_suspend NULL ++#define neo1973kbd_resume NULL ++#endif ++ ++static int neo1973kbd_probe(struct platform_device *pdev) ++{ ++ struct neo1973kbd *neo1973kbd; ++ struct input_dev *input_dev; ++ int rc, irq_aux, irq_hold, irq_jack; ++ ++ neo1973kbd = kzalloc(sizeof(struct neo1973kbd), GFP_KERNEL); ++ input_dev = input_allocate_device(); ++ if (!neo1973kbd || !input_dev) { ++ kfree(neo1973kbd); ++ input_free_device(input_dev); ++ return -ENOMEM; ++ } ++ ++ if (pdev->resource[0].flags != 0) ++ return -EINVAL; ++ ++ irq_aux = s3c2410_gpio_getirq(pdev->resource[0].start); ++ if (irq_aux < 0) ++ return -EINVAL; ++ ++ irq_hold = s3c2410_gpio_getirq(pdev->resource[1].start); ++ if (irq_hold < 0) ++ return -EINVAL; ++ ++ irq_jack = s3c2410_gpio_getirq(pdev->resource[2].start); ++ if (irq_jack < 0) ++ return -EINVAL; ++ ++ platform_set_drvdata(pdev, neo1973kbd); ++ ++ neo1973kbd->input = input_dev; ++ ++ input_dev->name = "Neo1973 Buttons"; ++ input_dev->phys = "neo1973kbd/input0"; ++ input_dev->id.bustype = BUS_HOST; ++ input_dev->id.vendor = 0x0001; ++ input_dev->id.product = 0x0001; ++ input_dev->id.version = 0x0100; ++ input_dev->cdev.dev = &pdev->dev; ++ input_dev->private = neo1973kbd; ++ ++ input_dev->evbit[0] = BIT(EV_KEY) | BIT(EV_SW); ++ set_bit(SW_HEADPHONE_INSERT, input_dev->swbit); ++ set_bit(KEY_PHONE, input_dev->keybit); ++ set_bit(KEY_PAUSE, input_dev->keybit); ++ ++ rc = input_register_device(neo1973kbd->input); ++ if (rc) ++ goto out_register; ++ ++ if (request_irq(irq_aux, neo1973kbd_aux_irq, IRQF_DISABLED | ++ IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, ++ "Neo1973 AUX button", neo1973kbd)) { ++ dev_err(&pdev->dev, "Can't get IRQ %u\n", irq_aux); ++ goto out_aux; ++ } ++ ++ /* ++ * GTA01 revisions before Bv4 can't be resumed by the PMU, so we use ++ * resume by AUX. ++ */ ++ if (machine_is_neo1973_gta01()) ++ enable_irq_wake(irq_aux); ++ ++ if (request_irq(irq_hold, neo1973kbd_hold_irq, IRQF_DISABLED | ++ IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, ++ "Neo1973 HOLD button", neo1973kbd)) { ++ dev_err(&pdev->dev, "Can't get IRQ %u\n", irq_hold); ++ goto out_hold; ++ } ++ ++ if (request_irq(irq_jack, neo1973kbd_headphone_irq, IRQF_DISABLED | ++ IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, ++ "Neo1973 Headphone Jack", neo1973kbd)) { ++ dev_err(&pdev->dev, "Can't get IRQ %u\n", irq_jack); ++ goto out_jack; ++ } ++ enable_irq_wake(irq_jack); ++ ++ return 0; ++ ++out_jack: ++ free_irq(irq_hold, neo1973kbd); ++out_hold: ++ free_irq(irq_aux, neo1973kbd); ++out_aux: ++ input_unregister_device(neo1973kbd->input); ++out_register: ++ input_free_device(neo1973kbd->input); ++ platform_set_drvdata(pdev, NULL); ++ kfree(neo1973kbd); ++ ++ return -ENODEV; ++} ++ ++static int neo1973kbd_remove(struct platform_device *pdev) ++{ ++ struct neo1973kbd *neo1973kbd = platform_get_drvdata(pdev); ++ ++ free_irq(s3c2410_gpio_getirq(pdev->resource[2].start), neo1973kbd); ++ free_irq(s3c2410_gpio_getirq(pdev->resource[1].start), neo1973kbd); ++ free_irq(s3c2410_gpio_getirq(pdev->resource[0].start), neo1973kbd); ++ ++ input_unregister_device(neo1973kbd->input); ++ input_free_device(neo1973kbd->input); ++ platform_set_drvdata(pdev, NULL); ++ kfree(neo1973kbd); ++ ++ return 0; ++} ++ ++static struct platform_driver neo1973kbd_driver = { ++ .probe = neo1973kbd_probe, ++ .remove = neo1973kbd_remove, ++ .suspend = neo1973kbd_suspend, ++ .resume = neo1973kbd_resume, ++ .driver = { ++ .name = "neo1973-button", ++ }, ++}; ++ ++static int __devinit neo1973kbd_init(void) ++{ ++ return platform_driver_register(&neo1973kbd_driver); ++} ++ ++static void __exit neo1973kbd_exit(void) ++{ ++ platform_driver_unregister(&neo1973kbd_driver); ++} ++ ++module_init(neo1973kbd_init); ++module_exit(neo1973kbd_exit); ++ ++MODULE_AUTHOR("Harald Welte "); ++MODULE_DESCRIPTION("FIC Neo1973 buttons input driver"); ++MODULE_LICENSE("GPL"); +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1014-gta01-power_control.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1014-gta01-power_control.patch.patch new file mode 100644 index 0000000000..e1889aaf86 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1014-gta01-power_control.patch.patch @@ -0,0 +1,976 @@ +From b627ce9e57a5263ddcc4e6db49625057b6461ad3 Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:31:35 +0100 +Subject: [PATCH] gta01-power_control.patch + [PATCH] Neo1973 GPS / GSM / Bluetooth power control via sysfs + +Signed-off-by: Harald Welte +--- + arch/arm/plat-s3c24xx/Makefile | 1 + + arch/arm/plat-s3c24xx/neo1973_pm_bt.c | 152 +++++++++ + arch/arm/plat-s3c24xx/neo1973_pm_gps.c | 560 ++++++++++++++++++++++++++++++++ + arch/arm/plat-s3c24xx/neo1973_pm_gsm.c | 217 ++++++++++++ + 4 files changed, 930 insertions(+), 0 deletions(-) + create mode 100644 arch/arm/plat-s3c24xx/neo1973_pm_bt.c + create mode 100644 arch/arm/plat-s3c24xx/neo1973_pm_gps.c + create mode 100644 arch/arm/plat-s3c24xx/neo1973_pm_gsm.c + +diff --git a/arch/arm/plat-s3c24xx/Makefile b/arch/arm/plat-s3c24xx/Makefile +index 8e5ccaa..7192912 100644 +--- a/arch/arm/plat-s3c24xx/Makefile ++++ b/arch/arm/plat-s3c24xx/Makefile +@@ -28,3 +28,4 @@ obj-$(CONFIG_PM) += pm.o + obj-$(CONFIG_PM) += sleep.o + obj-$(CONFIG_S3C2410_DMA) += dma.o + obj-$(CONFIG_MACH_SMDK) += common-smdk.o ++obj-$(CONFIG_MACH_NEO1973) += neo1973_pm_gsm.o neo1973_pm_gps.o neo1973_pm_bt.o +diff --git a/arch/arm/plat-s3c24xx/neo1973_pm_bt.c b/arch/arm/plat-s3c24xx/neo1973_pm_bt.c +new file mode 100644 +index 0000000..b1af441 +--- /dev/null ++++ b/arch/arm/plat-s3c24xx/neo1973_pm_bt.c +@@ -0,0 +1,152 @@ ++/* ++ * Bluetooth PM code for the FIC Neo1973 GSM Phone ++ * ++ * (C) 2007 by OpenMoko Inc. ++ * Author: Harald Welte ++ * All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include ++#include ++ ++#define DRVMSG "FIC Neo1973 Bluetooth Power Management" ++ ++static ssize_t bt_read(struct device *dev, struct device_attribute *attr, ++ char *buf) ++{ ++ if (!strcmp(attr->attr.name, "power_on")) { ++ if (pcf50606_onoff_get(pcf50606_global, ++ PCF50606_REGULATOR_D1REG) && ++ pcf50606_voltage_get(pcf50606_global, ++ PCF50606_REGULATOR_D1REG) == 3100) ++ goto out_1; ++ } else if (!strcmp(attr->attr.name, "reset")) { ++ if (s3c2410_gpio_getpin(GTA01_GPIO_BT_EN) == 0) ++ goto out_1; ++ } ++ ++ return strlcpy(buf, "0\n", 3); ++out_1: ++ return strlcpy(buf, "1\n", 3); ++} ++ ++static ssize_t bt_write(struct device *dev, struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++ unsigned long on = simple_strtoul(buf, NULL, 10); ++ ++ if (!strcmp(attr->attr.name, "power_on")) { ++ /* if we are powering up, assert reset, then power, then ++ * release reset */ ++ if (on) { ++ s3c2410_gpio_setpin(GTA01_GPIO_BT_EN, 0); ++ pcf50606_voltage_set(pcf50606_global, ++ PCF50606_REGULATOR_D1REG, ++ 3100); ++ } ++ pcf50606_onoff_set(pcf50606_global, ++ PCF50606_REGULATOR_D1REG, on); ++ s3c2410_gpio_setpin(GTA01_GPIO_BT_EN, on); ++ } else if (!strcmp(attr->attr.name, "reset")) { ++ /* reset is low-active, so we need to invert */ ++ s3c2410_gpio_setpin(GTA01_GPIO_BT_EN, on ? 0 : 1); ++ } ++ ++ return count; ++} ++ ++static DEVICE_ATTR(power_on, 0644, bt_read, bt_write); ++static DEVICE_ATTR(reset, 0644, bt_read, bt_write); ++ ++#ifdef CONFIG_PM ++static int gta01_bt_suspend(struct platform_device *pdev, pm_message_t state) ++{ ++ dev_dbg(&pdev->dev, DRVMSG ": suspending\n"); ++ /* FIXME: The PMU should save the PMU status, and the GPIO code should ++ * preserve the GPIO level, so there shouldn't be anything left to do ++ * for us, should there? */ ++ ++ return 0; ++} ++ ++static int gta01_bt_resume(struct platform_device *pdev) ++{ ++ dev_dbg(&pdev->dev, DRVMSG ": resuming\n"); ++ ++ return 0; ++} ++#else ++#define gta01_bt_suspend NULL ++#define gta01_bt_resume NULL ++#endif ++ ++static struct attribute *gta01_bt_sysfs_entries[] = { ++ &dev_attr_power_on.attr, ++ &dev_attr_reset.attr, ++ NULL ++}; ++ ++static struct attribute_group gta01_bt_attr_group = { ++ .name = NULL, ++ .attrs = gta01_bt_sysfs_entries, ++}; ++ ++static int __init gta01_bt_probe(struct platform_device *pdev) ++{ ++ dev_info(&pdev->dev, DRVMSG ": starting\n"); ++ ++ /* we make sure that the voltage is off */ ++ pcf50606_onoff_set(pcf50606_global, ++ PCF50606_REGULATOR_D1REG, 0); ++ /* we pull reset to low to make sure that the chip doesn't ++ * drain power through the reset line */ ++ s3c2410_gpio_setpin(GTA01_GPIO_BT_EN, 0); ++ ++ return sysfs_create_group(&pdev->dev.kobj, >a01_bt_attr_group); ++} ++ ++static int gta01_bt_remove(struct platform_device *pdev) ++{ ++ sysfs_remove_group(&pdev->dev.kobj, >a01_bt_attr_group); ++ ++ return 0; ++} ++ ++static struct platform_driver gta01_bt_driver = { ++ .probe = gta01_bt_probe, ++ .remove = gta01_bt_remove, ++ .suspend = gta01_bt_suspend, ++ .resume = gta01_bt_resume, ++ .driver = { ++ .name = "neo1973-pm-bt", ++ }, ++}; ++ ++static int __devinit gta01_bt_init(void) ++{ ++ return platform_driver_register(>a01_bt_driver); ++} ++ ++static void gta01_bt_exit(void) ++{ ++ platform_driver_unregister(>a01_bt_driver); ++} ++ ++module_init(gta01_bt_init); ++module_exit(gta01_bt_exit); ++ ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("Harald Welte "); ++MODULE_DESCRIPTION(DRVMSG); +diff --git a/arch/arm/plat-s3c24xx/neo1973_pm_gps.c b/arch/arm/plat-s3c24xx/neo1973_pm_gps.c +new file mode 100644 +index 0000000..f8cf719 +--- /dev/null ++++ b/arch/arm/plat-s3c24xx/neo1973_pm_gps.c +@@ -0,0 +1,560 @@ ++/* ++ * GPS Power Management code for the FIC Neo1973 GSM Phone ++ * ++ * (C) 2007 by OpenMoko Inc. ++ * Author: Harald Welte ++ * All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include ++#include ++ ++/* This is the 2.8V supply for the RTC crystal, the mail clock crystal and ++ * the input to VDD_RF */ ++static void gps_power_2v8_set(int on) ++{ ++ switch (system_rev) { ++ case GTA01v3_SYSTEM_REV: ++ case GTA01v4_SYSTEM_REV: ++ if (on) ++ pcf50606_voltage_set(pcf50606_global, ++ PCF50606_REGULATOR_IOREG, 2800); ++ pcf50606_onoff_set(pcf50606_global, ++ PCF50606_REGULATOR_IOREG, on); ++ break; ++ case GTA01Bv2_SYSTEM_REV: ++ s3c2410_gpio_setpin(GTA01_GPIO_GPS_EN_2V8, on); ++ break; ++ case GTA01Bv3_SYSTEM_REV: ++ case GTA01Bv4_SYSTEM_REV: ++ break; ++ } ++} ++ ++static int gps_power_2v8_get(void) ++{ ++ int ret = 0; ++ ++ switch (system_rev) { ++ case GTA01v3_SYSTEM_REV: ++ case GTA01v4_SYSTEM_REV: ++ if (pcf50606_onoff_get(pcf50606_global, ++ PCF50606_REGULATOR_IOREG) && ++ pcf50606_voltage_get(pcf50606_global, ++ PCF50606_REGULATOR_IOREG) == 2800) ++ ret = 1; ++ break; ++ case GTA01Bv2_SYSTEM_REV: ++ if (s3c2410_gpio_getpin(GTA01_GPIO_GPS_EN_2V8)) ++ ret = 1; ++ break; ++ case GTA01Bv3_SYSTEM_REV: ++ case GTA01Bv4_SYSTEM_REV: ++ break; ++ } ++ ++ return ret; ++} ++ ++/* This is the 3V supply (AVDD) for the external RF frontend (LNA bias) */ ++static void gps_power_3v_set(int on) ++{ ++ switch (system_rev) { ++ case GTA01v3_SYSTEM_REV: ++ case GTA01v4_SYSTEM_REV: ++ if (on) ++ pcf50606_voltage_set(pcf50606_global, ++ PCF50606_REGULATOR_D1REG, 3000); ++ pcf50606_onoff_set(pcf50606_global, ++ PCF50606_REGULATOR_D1REG, on); ++ break; ++ case GTA01Bv2_SYSTEM_REV: ++ case GTA01Bv3_SYSTEM_REV: ++ case GTA01Bv4_SYSTEM_REV: ++ s3c2410_gpio_setpin(GTA01_GPIO_GPS_EN_3V, on); ++ break; ++ } ++} ++ ++static int gps_power_3v_get(void) ++{ ++ int ret = 0; ++ ++ switch (system_rev) { ++ case GTA01v3_SYSTEM_REV: ++ case GTA01v4_SYSTEM_REV: ++ if (pcf50606_onoff_get(pcf50606_global, ++ PCF50606_REGULATOR_D1REG) && ++ pcf50606_voltage_get(pcf50606_global, ++ PCF50606_REGULATOR_D1REG) == 3000) ++ ret = 1; ++ break; ++ case GTA01Bv2_SYSTEM_REV: ++ case GTA01Bv3_SYSTEM_REV: ++ case GTA01Bv4_SYSTEM_REV: ++ if (s3c2410_gpio_getpin(GTA01_GPIO_GPS_EN_3V)) ++ ret = 1; ++ break; ++ } ++ ++ return ret; ++} ++ ++/* This is the 3.3V supply for VDD_IO and VDD_LPREG input */ ++static void gps_power_3v3_set(int on) ++{ ++ switch (system_rev) { ++ case GTA01v3_SYSTEM_REV: ++ case GTA01v4_SYSTEM_REV: ++ case GTA01Bv2_SYSTEM_REV: ++ if (on) ++ pcf50606_voltage_set(pcf50606_global, ++ PCF50606_REGULATOR_DCD, 3300); ++ pcf50606_onoff_set(pcf50606_global, ++ PCF50606_REGULATOR_DCD, on); ++ break; ++ case GTA01Bv3_SYSTEM_REV: ++ case GTA01Bv4_SYSTEM_REV: ++ s3c2410_gpio_setpin(GTA01_GPIO_GPS_EN_3V3, on); ++ break; ++ } ++} ++ ++static int gps_power_3v3_get(void) ++{ ++ int ret = 0; ++ ++ switch (system_rev) { ++ case GTA01v3_SYSTEM_REV: ++ case GTA01v4_SYSTEM_REV: ++ case GTA01Bv2_SYSTEM_REV: ++ if (pcf50606_onoff_get(pcf50606_global, ++ PCF50606_REGULATOR_DCD) && ++ pcf50606_voltage_get(pcf50606_global, ++ PCF50606_REGULATOR_DCD) == 3300) ++ ret = 1; ++ break; ++ case GTA01Bv3_SYSTEM_REV: ++ case GTA01Bv4_SYSTEM_REV: ++ if (s3c2410_gpio_getpin(GTA01_GPIO_GPS_EN_3V3)) ++ ret = 1; ++ break; ++ } ++ ++ return ret; ++} ++ ++/* This is the 2.5V supply for VDD_PLLREG and VDD_COREREG input */ ++static void gps_power_2v5_set(int on) ++{ ++ switch (system_rev) { ++ case GTA01v3_SYSTEM_REV: ++ /* This is CORE_1V8 and cannot be disabled */ ++ break; ++ case GTA01v4_SYSTEM_REV: ++ case GTA01Bv2_SYSTEM_REV: ++ case GTA01Bv3_SYSTEM_REV: ++ case GTA01Bv4_SYSTEM_REV: ++ if (on) ++ pcf50606_voltage_set(pcf50606_global, ++ PCF50606_REGULATOR_D2REG, 2500); ++ pcf50606_onoff_set(pcf50606_global, ++ PCF50606_REGULATOR_D2REG, on); ++ break; ++ } ++} ++ ++static int gps_power_2v5_get(void) ++{ ++ int ret = 0; ++ ++ switch (system_rev) { ++ case GTA01v3_SYSTEM_REV: ++ /* This is CORE_1V8 and cannot be disabled */ ++ ret = 1; ++ break; ++ case GTA01v4_SYSTEM_REV: ++ case GTA01Bv2_SYSTEM_REV: ++ case GTA01Bv3_SYSTEM_REV: ++ case GTA01Bv4_SYSTEM_REV: ++ if (pcf50606_onoff_get(pcf50606_global, ++ PCF50606_REGULATOR_D2REG) && ++ pcf50606_voltage_get(pcf50606_global, ++ PCF50606_REGULATOR_D2REG) == 2500) ++ ret = 1; ++ break; ++ } ++ ++ return ret; ++} ++ ++/* This is the 1.5V supply for VDD_CORE */ ++static void gps_power_1v5_set(int on) ++{ ++ switch (system_rev) { ++ case GTA01v3_SYSTEM_REV: ++ case GTA01v4_SYSTEM_REV: ++ case GTA01Bv2_SYSTEM_REV: ++ /* This is switched via 2v5 */ ++ break; ++ case GTA01Bv3_SYSTEM_REV: ++ case GTA01Bv4_SYSTEM_REV: ++ if (on) ++ pcf50606_voltage_set(pcf50606_global, ++ PCF50606_REGULATOR_DCD, 1500); ++ pcf50606_onoff_set(pcf50606_global, ++ PCF50606_REGULATOR_DCD, on); ++ break; ++ } ++} ++ ++static int gps_power_1v5_get(void) ++{ ++ int ret = 0; ++ ++ switch (system_rev) { ++ case GTA01v3_SYSTEM_REV: ++ case GTA01v4_SYSTEM_REV: ++ case GTA01Bv2_SYSTEM_REV: ++ /* This is switched via 2v5 */ ++ ret = 1; ++ break; ++ case GTA01Bv3_SYSTEM_REV: ++ case GTA01Bv4_SYSTEM_REV: ++ if (pcf50606_onoff_get(pcf50606_global, ++ PCF50606_REGULATOR_DCD) && ++ pcf50606_voltage_get(pcf50606_global, ++ PCF50606_REGULATOR_DCD) == 1500) ++ ret = 1; ++ break; ++ } ++ ++ return ret; ++} ++ ++/* This is the POWERON pin */ ++static void gps_pwron_set(int on) ++{ ++ s3c2410_gpio_setpin(GTA01_GPIO_GPS_PWRON, on); ++} ++ ++static int gps_pwron_get(void) ++{ ++ if (s3c2410_gpio_getpin(GTA01_GPIO_GPS_PWRON)) ++ return 1; ++ else ++ return 0; ++} ++ ++/* This is the nRESET pin */ ++static void gps_rst_set(int on) ++{ ++ switch (system_rev) { ++ case GTA01v3_SYSTEM_REV: ++ pcf50606_gpo0_set(pcf50606_global, on); ++ break; ++ case GTA01v4_SYSTEM_REV: ++ case GTA01Bv2_SYSTEM_REV: ++ case GTA01Bv3_SYSTEM_REV: ++ case GTA01Bv4_SYSTEM_REV: ++ s3c2410_gpio_setpin(GTA01_GPIO_GPS_RESET, on); ++ break; ++ } ++} ++ ++static int gps_rst_get(void) ++{ ++ switch (system_rev) { ++ case GTA01v3_SYSTEM_REV: ++ if (pcf50606_gpo0_get(pcf50606_global)) ++ return 1; ++ break; ++ case GTA01v4_SYSTEM_REV: ++ case GTA01Bv2_SYSTEM_REV: ++ case GTA01Bv3_SYSTEM_REV: ++ case GTA01Bv4_SYSTEM_REV: ++ if (s3c2410_gpio_getpin(GTA01_GPIO_GPS_RESET)) ++ return 1; ++ break; ++ } ++ ++ return 0; ++} ++ ++static ssize_t power_gps_read(struct device *dev, ++ struct device_attribute *attr, char *buf) ++{ ++ int ret = 0; ++ ++ if (!strcmp(attr->attr.name, "power_tcxo_2v8")) { ++ ret = gps_power_2v8_get(); ++ } else if (!strcmp(attr->attr.name, "power_avdd_3v")) { ++ ret = gps_power_3v_get(); ++ } else if (!strcmp(attr->attr.name, "pwron")) { ++ ret = gps_pwron_get(); ++ } else if (!strcmp(attr->attr.name, "reset")) { ++ ret = gps_rst_get(); ++ } else if (!strcmp(attr->attr.name, "power_lp_io_3v3")) { ++ ret = gps_power_3v3_get(); ++ } else if (!strcmp(attr->attr.name, "power_pll_core_2v5")) { ++ ret = gps_power_2v5_get(); ++ } else if (!strcmp(attr->attr.name, "power_core_1v5") || ++ !strcmp(attr->attr.name, "power_vdd_core_1v5")) { ++ ret = gps_power_1v5_get(); ++ } ++ ++ if (ret) ++ return strlcpy(buf, "1\n", 3); ++ else ++ return strlcpy(buf, "0\n", 3); ++} ++ ++static ssize_t power_gps_write(struct device *dev, ++ struct device_attribute *attr, const char *buf, ++ size_t count) ++{ ++ unsigned long on = simple_strtoul(buf, NULL, 10); ++ ++ if (!strcmp(attr->attr.name, "power_tcxo_2v8")) { ++ gps_power_2v8_set(on); ++ } else if (!strcmp(attr->attr.name, "power_avdd_3v")) { ++ gps_power_3v_set(on); ++ } else if (!strcmp(attr->attr.name, "pwron")) { ++ gps_pwron_set(on); ++ } else if (!strcmp(attr->attr.name, "reset")) { ++ gps_rst_set(on); ++ } else if (!strcmp(attr->attr.name, "power_lp_io_3v3")) { ++ gps_power_3v3_set(on); ++ } else if (!strcmp(attr->attr.name, "power_pll_core_2v5")) { ++ gps_power_2v5_set(on); ++ } else if (!strcmp(attr->attr.name, "power_core_1v5") || ++ !strcmp(attr->attr.name, "power_vdd_core_1v5")) { ++ gps_power_1v5_set(on); ++ } ++ ++ return count; ++} ++ ++static void gps_power_sequence_up(void) ++{ ++ /* According to PMB2520 Data Sheet, Rev. 2006-06-05, ++ * Chapter 4.2.2 */ ++ ++ /* nRESET must be asserted low */ ++ gps_rst_set(0); ++ ++ /* POWERON must be de-asserted (low) */ ++ gps_pwron_set(0); ++ ++ /* Apply VDD_IO and VDD_LPREG_IN */ ++ gps_power_3v3_set(1); ++ ++ /* VDD_COREREG_IN, VDD_PLLREG_IN */ ++ gps_power_1v5_set(1); ++ gps_power_2v5_set(1); ++ ++ /* and VDD_RF may be applied */ ++ gps_power_2v8_set(1); ++ ++ /* We need to enable AVDD, since in GTA01Bv3 it is ++ * shared with RFREG_IN */ ++ gps_power_3v_set(1); ++ ++ msleep(3); /* Is 3ms enough? */ ++ ++ /* De-asert nRESET */ ++ gps_rst_set(1); ++ ++ /* Switch power on */ ++ gps_pwron_set(1); ++ ++} ++ ++static void gps_power_sequence_down(void) ++{ ++ /* According to PMB2520 Data Sheet, Rev. 2006-06-05, ++ * Chapter 4.2.3.1 */ ++ gps_pwron_set(0); ++ ++ /* Don't disable AVDD before PWRON is cleared, since ++ * in GTA01Bv3, AVDD and RFREG_IN are shared */ ++ gps_power_3v_set(0); ++ ++ /* Remove VDD_COREREG_IN, VDD_PLLREG_IN and VDD_REFREG_IN */ ++ gps_power_1v5_set(0); ++ gps_power_2v5_set(0); ++ gps_power_2v8_set(0); ++ ++ /* Remove VDD_LPREG_IN and VDD_IO */ ++ gps_power_3v3_set(0); ++} ++ ++ ++static ssize_t power_sequence_read(struct device *dev, ++ struct device_attribute *attr, ++ char *buf) ++{ ++ return strlcpy(buf, "power_up power_down\n", PAGE_SIZE); ++} ++ ++static ssize_t power_sequence_write(struct device *dev, ++ struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++ dev_dbg(dev, "wrote: '%s'\n", buf); ++ ++ if (!strncmp(buf, "power_up", 8)) ++ gps_power_sequence_up(); ++ else if (!strncmp(buf, "power_down", 10)) ++ gps_power_sequence_down(); ++ else ++ return -EINVAL; ++ ++ return count; ++} ++ ++static DEVICE_ATTR(power_tcxo_2v8, 0644, power_gps_read, power_gps_write); ++static DEVICE_ATTR(power_avdd_3v, 0644, power_gps_read, power_gps_write); ++static DEVICE_ATTR(pwron, 0644, power_gps_read, power_gps_write); ++static DEVICE_ATTR(reset, 0644, power_gps_read, power_gps_write); ++static DEVICE_ATTR(power_lp_io_3v3, 0644, power_gps_read, power_gps_write); ++static DEVICE_ATTR(power_pll_core_2v5, 0644, power_gps_read, power_gps_write); ++static DEVICE_ATTR(power_core_1v5, 0644, power_gps_read, power_gps_write); ++static DEVICE_ATTR(power_vdd_core_1v5, 0644, power_gps_read, power_gps_write); ++static DEVICE_ATTR(power_sequence, 0644, power_sequence_read, ++ power_sequence_write); ++ ++#ifdef CONFIG_PM ++static int gta01_pm_gps_suspend(struct platform_device *pdev, ++ pm_message_t state) ++{ ++ /* FIXME */ ++ gps_power_sequence_down(); ++ ++ return 0; ++} ++ ++static int gta01_pm_gps_resume(struct platform_device *pdev) ++{ ++ /* FIXME */ ++ gps_power_sequence_up(); ++ ++ return 0; ++} ++#else ++#define gta01_pm_gps_suspend NULL ++#define gta01_pm_gps_resume NULL ++#endif ++ ++static struct attribute *gta01_gps_sysfs_entries[] = { ++ &dev_attr_power_avdd_3v.attr, ++ &dev_attr_pwron.attr, ++ &dev_attr_reset.attr, ++ &dev_attr_power_lp_io_3v3.attr, ++ &dev_attr_power_pll_core_2v5.attr, ++ &dev_attr_power_sequence.attr, ++ NULL, /* power_core_1v5 */ ++ NULL, /* power_vdd_core_1v5 */ ++ NULL /* terminating entry */ ++}; ++ ++static struct attribute_group gta01_gps_attr_group = { ++ .name = NULL, ++ .attrs = gta01_gps_sysfs_entries, ++}; ++ ++static int __init gta01_pm_gps_probe(struct platform_device *pdev) ++{ ++ s3c2410_gpio_cfgpin(GTA01_GPIO_GPS_PWRON, S3C2410_GPIO_OUTPUT); ++ ++ switch (system_rev) { ++ case GTA01v3_SYSTEM_REV: ++ break; ++ case GTA01v4_SYSTEM_REV: ++ s3c2410_gpio_cfgpin(GTA01_GPIO_GPS_RESET, S3C2410_GPIO_OUTPUT); ++ break; ++ case GTA01Bv3_SYSTEM_REV: ++ case GTA01Bv4_SYSTEM_REV: ++ s3c2410_gpio_cfgpin(GTA01_GPIO_GPS_EN_3V3, S3C2410_GPIO_OUTPUT); ++ /* fallthrough */ ++ case GTA01Bv2_SYSTEM_REV: ++ s3c2410_gpio_cfgpin(GTA01_GPIO_GPS_EN_2V8, S3C2410_GPIO_OUTPUT); ++ s3c2410_gpio_cfgpin(GTA01_GPIO_GPS_EN_3V, S3C2410_GPIO_OUTPUT); ++ s3c2410_gpio_cfgpin(GTA01_GPIO_GPS_RESET, S3C2410_GPIO_OUTPUT); ++ break; ++ default: ++ dev_warn(&pdev->dev, "Unknown GTA01 Revision 0x%x, " ++ "AGPS PM features not available!!!\n", ++ system_rev); ++ return -1; ++ break; ++ } ++ ++ gps_power_sequence_down(); ++ ++ switch (system_rev) { ++ case GTA01v3_SYSTEM_REV: ++ case GTA01v4_SYSTEM_REV: ++ case GTA01Bv2_SYSTEM_REV: ++ gta01_gps_sysfs_entries[ARRAY_SIZE(gta01_gps_sysfs_entries)-3] = ++ &dev_attr_power_tcxo_2v8.attr; ++ break; ++ case GTA01Bv3_SYSTEM_REV: ++ case GTA01Bv4_SYSTEM_REV: ++ gta01_gps_sysfs_entries[ARRAY_SIZE(gta01_gps_sysfs_entries)-3] = ++ &dev_attr_power_core_1v5.attr; ++ gta01_gps_sysfs_entries[ARRAY_SIZE(gta01_gps_sysfs_entries)-2] = ++ &dev_attr_power_vdd_core_1v5.attr; ++ break; ++ } ++ ++ return sysfs_create_group(&pdev->dev.kobj, >a01_gps_attr_group); ++} ++ ++static int gta01_pm_gps_remove(struct platform_device *pdev) ++{ ++ gps_power_sequence_down(); ++ sysfs_remove_group(&pdev->dev.kobj, >a01_gps_attr_group); ++ ++ return 0; ++} ++ ++static struct platform_driver gta01_pm_gps_driver = { ++ .probe = gta01_pm_gps_probe, ++ .remove = gta01_pm_gps_remove, ++ .suspend = gta01_pm_gps_suspend, ++ .resume = gta01_pm_gps_resume, ++ .driver = { ++ .name = "neo1973-pm-gps", ++ }, ++}; ++ ++static int __devinit gta01_pm_gps_init(void) ++{ ++ return platform_driver_register(>a01_pm_gps_driver); ++} ++ ++static void gta01_pm_gps_exit(void) ++{ ++ platform_driver_unregister(>a01_pm_gps_driver); ++} ++ ++module_init(gta01_pm_gps_init); ++module_exit(gta01_pm_gps_exit); ++ ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("Harald Welte "); ++MODULE_DESCRIPTION("FIC Neo1973 GPS Power Management"); +diff --git a/arch/arm/plat-s3c24xx/neo1973_pm_gsm.c b/arch/arm/plat-s3c24xx/neo1973_pm_gsm.c +new file mode 100644 +index 0000000..a1615f8 +--- /dev/null ++++ b/arch/arm/plat-s3c24xx/neo1973_pm_gsm.c +@@ -0,0 +1,217 @@ ++/* ++ * GSM Management code for the FIC Neo1973 GSM Phone ++ * ++ * (C) 2007 by OpenMoko Inc. ++ * Author: Harald Welte ++ * All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++struct gta01pm_priv { ++ int gpio_ngsm_en; ++ struct console *con; ++}; ++ ++static struct gta01pm_priv gta01_gsm; ++ ++static struct console *find_s3c24xx_console(void) ++{ ++ struct console *con; ++ ++ acquire_console_sem(); ++ ++ for (con = console_drivers; con; con = con->next) { ++ if (!strcmp(con->name, "ttySAC")) ++ break; ++ } ++ ++ release_console_sem(); ++ ++ return con; ++} ++ ++static ssize_t gsm_read(struct device *dev, struct device_attribute *attr, ++ char *buf) ++{ ++ if (!strcmp(attr->attr.name, "power_on")) { ++ if (s3c2410_gpio_getpin(GTA01_GPIO_MODEM_ON)) ++ goto out_1; ++ } else if (!strcmp(attr->attr.name, "reset")) { ++ if (s3c2410_gpio_getpin(GTA01_GPIO_MODEM_RST)) ++ goto out_1; ++ } else if (!strcmp(attr->attr.name, "download")) { ++ if (s3c2410_gpio_getpin(GTA01_GPIO_MODEM_DNLOAD)) ++ goto out_1; ++ } ++ ++ return strlcpy(buf, "0\n", 3); ++out_1: ++ return strlcpy(buf, "1\n", 3); ++} ++ ++static ssize_t gsm_write(struct device *dev, struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++ unsigned long on = simple_strtoul(buf, NULL, 10); ++ ++ if (!strcmp(attr->attr.name, "power_on")) { ++ if (on) { ++ dev_info(dev, "powering up GSM, thus disconnecting " ++ "serial console\n"); ++ ++ if (gta01_gsm.con) ++ console_stop(gta01_gsm.con); ++ ++ if (gta01_gsm.gpio_ngsm_en) ++ s3c2410_gpio_setpin(gta01_gsm.gpio_ngsm_en, 0); ++ ++ s3c2410_gpio_setpin(GTA01_GPIO_MODEM_ON, 1); ++ } else { ++ s3c2410_gpio_setpin(GTA01_GPIO_MODEM_ON, 0); ++ ++ if (gta01_gsm.gpio_ngsm_en) ++ s3c2410_gpio_setpin(gta01_gsm.gpio_ngsm_en, 1); ++ ++ if (gta01_gsm.con) ++ console_start(gta01_gsm.con); ++ ++ dev_info(dev, "powered down GSM, thus enabling " ++ "serial console\n"); ++ } ++ } else if (!strcmp(attr->attr.name, "reset")) { ++ s3c2410_gpio_setpin(GTA01_GPIO_MODEM_RST, on); ++ } else if (!strcmp(attr->attr.name, "download")) { ++ s3c2410_gpio_setpin(GTA01_GPIO_MODEM_DNLOAD, on); ++ } ++ ++ return count; ++} ++ ++static DEVICE_ATTR(power_on, 0644, gsm_read, gsm_write); ++static DEVICE_ATTR(reset, 0644, gsm_read, gsm_write); ++static DEVICE_ATTR(download, 0644, gsm_read, gsm_write); ++ ++#ifdef CONFIG_PM ++static int gta01_gsm_suspend(struct platform_device *pdev, pm_message_t state) ++{ ++ /* GPIO state is saved/restored by S3C2410 core GPIO driver, so we ++ * don't need to do anything here */ ++ ++ return 0; ++} ++ ++static int gta01_gsm_resume(struct platform_device *pdev) ++{ ++ /* GPIO state is saved/restored by S3C2410 core GPIO driver, so we ++ * don't need to do anything here */ ++ ++ /* Make sure that the kernel console on the serial port is still ++ * disabled. FIXME: resume ordering race with serial driver! */ ++ if (s3c2410_gpio_getpin(GTA01_GPIO_MODEM_ON) && gta01_gsm.con) ++ console_stop(gta01_gsm.con); ++ ++ return 0; ++} ++#else ++#define gta01_gsm_suspend NULL ++#define gta01_gsm_resume NULL ++#endif ++ ++static struct attribute *gta01_gsm_sysfs_entries[] = { ++ &dev_attr_power_on.attr, ++ &dev_attr_reset.attr, ++ NULL, ++ NULL ++}; ++ ++static struct attribute_group gta01_gsm_attr_group = { ++ .name = NULL, ++ .attrs = gta01_gsm_sysfs_entries, ++}; ++ ++static int __init gta01_gsm_probe(struct platform_device *pdev) ++{ ++ switch (system_rev) { ++ case GTA01v3_SYSTEM_REV: ++ gta01_gsm.gpio_ngsm_en = GTA01v3_GPIO_nGSM_EN; ++ break; ++ case GTA01v4_SYSTEM_REV: ++ gta01_gsm.gpio_ngsm_en = 0; ++ break; ++ case GTA01Bv2_SYSTEM_REV: ++ case GTA01Bv3_SYSTEM_REV: ++ case GTA01Bv4_SYSTEM_REV: ++ gta01_gsm.gpio_ngsm_en = GTA01Bv2_GPIO_nGSM_EN; ++ s3c2410_gpio_setpin(GTA01v3_GPIO_nGSM_EN, 0); ++ break; ++ default: ++ dev_warn(&pdev->dev, "Unknown GTA01 Revision 0x%x, " ++ "some PM features not available!!!\n", ++ system_rev); ++ break; ++ } ++ ++ switch (system_rev) { ++ case GTA01v4_SYSTEM_REV: ++ case GTA01Bv2_SYSTEM_REV: ++ gta01_gsm_sysfs_entries[ARRAY_SIZE(gta01_gsm_sysfs_entries)-2] = ++ &dev_attr_download.attr; ++ break; ++ default: ++ break; ++ } ++ ++ gta01_gsm.con = find_s3c24xx_console(); ++ if (!gta01_gsm.con) ++ dev_warn(&pdev->dev, "cannot find S3C24xx console driver\n"); ++ ++ return sysfs_create_group(&pdev->dev.kobj, >a01_gsm_attr_group); ++} ++ ++static int gta01_gsm_remove(struct platform_device *pdev) ++{ ++ sysfs_remove_group(&pdev->dev.kobj, >a01_gsm_attr_group); ++ ++ return 0; ++} ++ ++static struct platform_driver gta01_gsm_driver = { ++ .probe = gta01_gsm_probe, ++ .remove = gta01_gsm_remove, ++ .suspend = gta01_gsm_suspend, ++ .resume = gta01_gsm_resume, ++ .driver = { ++ .name = "neo1973-pm-gsm", ++ }, ++}; ++ ++static int __devinit gta01_gsm_init(void) ++{ ++ return platform_driver_register(>a01_gsm_driver); ++} ++ ++static void gta01_gsm_exit(void) ++{ ++ platform_driver_unregister(>a01_gsm_driver); ++} ++ ++module_init(gta01_gsm_init); ++module_exit(gta01_gsm_exit); ++ ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("Harald Welte "); ++MODULE_DESCRIPTION("FIC Neo1973 GSM Power Management"); +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1015-s3c2410-pwm.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1015-s3c2410-pwm.patch.patch new file mode 100644 index 0000000000..a18a619457 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1015-s3c2410-pwm.patch.patch @@ -0,0 +1,322 @@ +From e9db29d62cbcef7974099c3a4deac69ad2a72190 Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:31:44 +0100 +Subject: [PATCH] s3c2410-pwm.patch + This patch adds a PWM api abstraction for the S3C2410 SoC + +Signed-off-by: Javi Roman +Signed-off-by: Harald Welte +--- + arch/arm/mach-s3c2410/Kconfig | 6 + + arch/arm/mach-s3c2410/Makefile | 1 + + arch/arm/mach-s3c2410/pwm.c | 214 ++++++++++++++++++++++++++++++++++++ + include/asm-arm/arch-s3c2410/pwm.h | 40 +++++++ + 4 files changed, 261 insertions(+), 0 deletions(-) + create mode 100644 arch/arm/mach-s3c2410/pwm.c + create mode 100644 include/asm-arm/arch-s3c2410/pwm.h + +diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig +index ff339e1..e42195f 100644 +--- a/arch/arm/mach-s3c2410/Kconfig ++++ b/arch/arm/mach-s3c2410/Kconfig +@@ -9,6 +9,7 @@ config CPU_S3C2410 + depends on ARCH_S3C2410 + select S3C2410_CLOCK + select S3C2410_GPIO ++ select S3C2410_PWM + select CPU_LLSERIAL_S3C2410 + select S3C2410_PM if PM + help +@@ -37,6 +38,11 @@ config S3C2410_CLOCK + help + Clock code for the S3C2410, and similar processors + ++config S3C2410_PWM ++ bool ++ help ++ PWM timer code for the S3C2410, and similar processors ++ + + menu "S3C2410 Machines" + +diff --git a/arch/arm/mach-s3c2410/Makefile b/arch/arm/mach-s3c2410/Makefile +index 8952a8d..bb577f4 100644 +--- a/arch/arm/mach-s3c2410/Makefile ++++ b/arch/arm/mach-s3c2410/Makefile +@@ -16,6 +16,7 @@ obj-$(CONFIG_CPU_S3C2410_DMA) += dma.o + obj-$(CONFIG_S3C2410_PM) += pm.o sleep.o + obj-$(CONFIG_S3C2410_GPIO) += gpio.o + obj-$(CONFIG_S3C2410_CLOCK) += clock.o ++obj-$(CONFIG_S3C2410_PWM) += pwm.o + + # Machine support + +diff --git a/arch/arm/mach-s3c2410/pwm.c b/arch/arm/mach-s3c2410/pwm.c +new file mode 100644 +index 0000000..8a07359 +--- /dev/null ++++ b/arch/arm/mach-s3c2410/pwm.c +@@ -0,0 +1,214 @@ ++/* ++ * arch/arm/mach-s3c2410/3c2410-pwm.c ++ * ++ * Copyright (c) by Javi Roman ++ * for the OpenMoko Project. ++ * ++ * S3C2410A SoC PWM support ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++int s3c2410_pwm_disable(struct s3c2410_pwm *pwm) ++{ ++ unsigned long tcon; ++ ++ /* stop timer */ ++ tcon = __raw_readl(S3C2410_TCON); ++ tcon &= 0xffffff00; ++ __raw_writel(tcon, S3C2410_TCON); ++ ++ clk_disable(pwm->pclk); ++ clk_put(pwm->pclk); ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(s3c2410_pwm_disable); ++ ++int s3c2410_pwm_init(struct s3c2410_pwm *pwm) ++{ ++ pwm->pclk = clk_get(NULL, "timers"); ++ if (IS_ERR(pwm->pclk)) ++ return PTR_ERR(pwm->pclk); ++ ++ clk_enable(pwm->pclk); ++ pwm->pclk_rate = clk_get_rate(pwm->pclk); ++ return 0; ++} ++EXPORT_SYMBOL_GPL(s3c2410_pwm_init); ++ ++int s3c2410_pwm_enable(struct s3c2410_pwm *pwm) ++{ ++ unsigned long tcfg0, tcfg1, tcnt, tcmp; ++ ++ /* control registers bits */ ++ tcfg1 = __raw_readl(S3C2410_TCFG1); ++ tcfg0 = __raw_readl(S3C2410_TCFG0); ++ ++ /* divider & scaler slection */ ++ switch (pwm->timerid) { ++ case PWM0: ++ tcfg1 &= ~S3C2410_TCFG1_MUX0_MASK; ++ tcfg0 &= ~S3C2410_TCFG_PRESCALER0_MASK; ++ break; ++ case PWM1: ++ tcfg1 &= ~S3C2410_TCFG1_MUX1_MASK; ++ tcfg0 &= ~S3C2410_TCFG_PRESCALER0_MASK; ++ break; ++ case PWM2: ++ tcfg1 &= ~S3C2410_TCFG1_MUX2_MASK; ++ tcfg0 &= ~S3C2410_TCFG_PRESCALER1_MASK; ++ break; ++ case PWM3: ++ tcfg1 &= ~S3C2410_TCFG1_MUX3_MASK; ++ tcfg0 &= ~S3C2410_TCFG_PRESCALER1_MASK; ++ break; ++ case PWM4: ++ /* timer four is not capable of doing PWM */ ++ break; ++ default: ++ clk_disable(pwm->pclk); ++ clk_put(pwm->pclk); ++ return -1; ++ } ++ ++ /* divider & scaler values */ ++ tcfg1 |= pwm->divider; ++ __raw_writel(tcfg1, S3C2410_TCFG1); ++ ++ switch (pwm->timerid) { ++ case PWM0: ++ case PWM1: ++ tcfg0 |= pwm->prescaler; ++ __raw_writel(tcfg0, S3C2410_TCFG0); ++ break; ++ default: ++ if ((tcfg0 | pwm->prescaler) != tcfg0) { ++ printk(KERN_WARNING "not changing prescaler of PWM %u," ++ " since it's shared with timer4 (clock tick)\n", ++ pwm->timerid); ++ } ++ break; ++ } ++ ++ /* timer count and compare buffer initial values */ ++ tcnt = pwm->counter; ++ tcmp = pwm->comparer; ++ ++ __raw_writel(tcnt, S3C2410_TCNTB(pwm->timerid)); ++ __raw_writel(tcmp, S3C2410_TCMPB(pwm->timerid)); ++ ++ /* ensure timer is stopped */ ++ s3c2410_pwm_stop(pwm); ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(s3c2410_pwm_enable); ++ ++int s3c2410_pwm_start(struct s3c2410_pwm *pwm) ++{ ++ unsigned long tcon; ++ ++ tcon = __raw_readl(S3C2410_TCON); ++ ++ switch (pwm->timerid) { ++ case PWM0: ++ tcon |= S3C2410_TCON_T0START; ++ tcon &= ~S3C2410_TCON_T0MANUALUPD; ++ break; ++ case PWM1: ++ tcon |= S3C2410_TCON_T1START; ++ tcon &= ~S3C2410_TCON_T1MANUALUPD; ++ break; ++ case PWM2: ++ tcon |= S3C2410_TCON_T2START; ++ tcon &= ~S3C2410_TCON_T2MANUALUPD; ++ break; ++ case PWM3: ++ tcon |= S3C2410_TCON_T3START; ++ tcon &= ~S3C2410_TCON_T3MANUALUPD; ++ break; ++ case PWM4: ++ /* timer four is not capable of doing PWM */ ++ default: ++ return -ENODEV; ++ } ++ ++ __raw_writel(tcon, S3C2410_TCON); ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(s3c2410_pwm_start); ++ ++int s3c2410_pwm_stop(struct s3c2410_pwm *pwm) ++{ ++ unsigned long tcon; ++ ++ tcon = __raw_readl(S3C2410_TCON); ++ ++ switch (pwm->timerid) { ++ case PWM0: ++ tcon &= ~0x00000000; ++ tcon |= S3C2410_TCON_T0RELOAD; ++ tcon |= S3C2410_TCON_T0MANUALUPD; ++ break; ++ case PWM1: ++ tcon &= ~0x00000080; ++ tcon |= S3C2410_TCON_T1RELOAD; ++ tcon |= S3C2410_TCON_T1MANUALUPD; ++ break; ++ case PWM2: ++ tcon &= ~0x00000800; ++ tcon |= S3C2410_TCON_T2RELOAD; ++ tcon |= S3C2410_TCON_T2MANUALUPD; ++ break; ++ case PWM3: ++ tcon &= ~0x00008000; ++ tcon |= S3C2410_TCON_T3RELOAD; ++ tcon |= S3C2410_TCON_T3MANUALUPD; ++ break; ++ case PWM4: ++ /* timer four is not capable of doing PWM */ ++ default: ++ return -ENODEV; ++ } ++ ++ __raw_writel(tcon, S3C2410_TCON); ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(s3c2410_pwm_stop); ++ ++int s3c2410_pwm_duty_cycle(int reg_value, struct s3c2410_pwm *pwm) ++{ ++ __raw_writel(reg_value, S3C2410_TCMPB(pwm->timerid)); ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(s3c2410_pwm_duty_cycle); ++ ++int s3c2410_pwm_dumpregs(void) ++{ ++ printk(KERN_INFO "TCON: %08lx, TCFG0: %08lx, TCFG1: %08lx\n", ++ (unsigned long) __raw_readl(S3C2410_TCON), ++ (unsigned long) __raw_readl(S3C2410_TCFG0), ++ (unsigned long) __raw_readl(S3C2410_TCFG1)); ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(s3c2410_pwm_dumpregs); +diff --git a/include/asm-arm/arch-s3c2410/pwm.h b/include/asm-arm/arch-s3c2410/pwm.h +new file mode 100644 +index 0000000..a797ec3 +--- /dev/null ++++ b/include/asm-arm/arch-s3c2410/pwm.h +@@ -0,0 +1,40 @@ ++#ifndef __S3C2410_PWM_H ++#define __S3C2410_PWM_H ++ ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++ ++enum pwm_timer { ++ PWM0, ++ PWM1, ++ PWM2, ++ PWM3, ++ PWM4 ++}; ++ ++struct s3c2410_pwm { ++ enum pwm_timer timerid; ++ struct clk *pclk; ++ unsigned long pclk_rate; ++ unsigned long prescaler; ++ unsigned long divider; ++ unsigned long counter; ++ unsigned long comparer; ++}; ++ ++int s3c2410_pwm_init(struct s3c2410_pwm *s3c2410_pwm); ++int s3c2410_pwm_enable(struct s3c2410_pwm *s3c2410_pwm); ++int s3c2410_pwm_disable(struct s3c2410_pwm *s3c2410_pwm); ++int s3c2410_pwm_start(struct s3c2410_pwm *s3c2410_pwm); ++int s3c2410_pwm_stop(struct s3c2410_pwm *s3c2410_pwm); ++int s3c2410_pwm_duty_cycle(int reg_value, struct s3c2410_pwm *s3c2410_pwm); ++int s3c2410_pwm_dumpregs(void); ++ ++#endif /* __S3C2410_PWM_H */ +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1016-gta01-vibrator.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1016-gta01-vibrator.patch.patch new file mode 100644 index 0000000000..bec59990bf --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1016-gta01-vibrator.patch.patch @@ -0,0 +1,244 @@ +From f7ad7d5e90a4ab68e7e25df3bd4a56b6c23f5e45 Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:31:55 +0100 +Subject: [PATCH] gta01-vibrator.patch + This patch adds driver support for the vibator device of the FIC/OpenMoko + Neo1973 GSM phone. The driver uses the existing LED class driver framework, + since there's a lot of similarity between the LED and the vibrator function. + +Signed-off-by: Harald Welte +--- + drivers/leds/Kconfig | 8 ++- + drivers/leds/Makefile | 1 + + drivers/leds/leds-neo1973-vibrator.c | 181 ++++++++++++++++++++++++++++++++++ + 3 files changed, 189 insertions(+), 1 deletions(-) + create mode 100644 drivers/leds/leds-neo1973-vibrator.c + +diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig +index ec568fa..4579a88 100644 +--- a/drivers/leds/Kconfig ++++ b/drivers/leds/Kconfig +@@ -57,7 +57,7 @@ config LEDS_TOSA + + config LEDS_S3C24XX + tristate "LED Support for Samsung S3C24XX GPIO LEDs" +- depends on LEDS_CLASS && ARCH_S3C2410 ++ depends on LEDS_CLASS && ARCH_S3C2410 && S3C2410_PWM + help + This option enables support for LEDs connected to GPIO lines + on Samsung S3C24XX series CPUs, such as the S3C2410 and S3C2440. +@@ -114,6 +114,12 @@ config LEDS_CM_X270 + help + This option enables support for the CM-X270 LEDs. + ++config LEDS_NEO1973_VIBRATOR ++ tristate "Vibrator Support for the FIC Neo1973 GSM phone" ++ depends on LEDS_CLASS && MACH_NEO1973 ++ help ++ This option enables support for the vibrator on the FIC Neo1973. ++ + comment "LED Triggers" + + config LEDS_TRIGGERS +diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile +index a60de1b..f64332d 100644 +--- a/drivers/leds/Makefile ++++ b/drivers/leds/Makefile +@@ -19,6 +19,7 @@ obj-$(CONFIG_LEDS_COBALT_QUBE) += leds-cobalt-qube.o + obj-$(CONFIG_LEDS_COBALT_RAQ) += leds-cobalt-raq.o + obj-$(CONFIG_LEDS_GPIO) += leds-gpio.o + obj-$(CONFIG_LEDS_CM_X270) += leds-cm-x270.o ++obj-$(CONFIG_LEDS_NEO1973_VIBRATOR) += leds-neo1973-vibrator.o + + # LED Triggers + obj-$(CONFIG_LEDS_TRIGGER_TIMER) += ledtrig-timer.o +diff --git a/drivers/leds/leds-neo1973-vibrator.c b/drivers/leds/leds-neo1973-vibrator.c +new file mode 100644 +index 0000000..0336e36 +--- /dev/null ++++ b/drivers/leds/leds-neo1973-vibrator.c +@@ -0,0 +1,181 @@ ++/* ++ * LED driver for the vibrator of the FIC Neo1973 GSM Phone ++ * ++ * (C) 2006-2007 by OpenMoko, Inc. ++ * Author: Harald Welte ++ * All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * Javi Roman : ++ * Implement PWM support for GTA01Bv4 and later ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define COUNTER 64 ++ ++struct neo1973_vib_priv { ++ struct led_classdev cdev; ++ unsigned int gpio; ++ struct mutex mutex; ++ unsigned int has_pwm; ++ struct s3c2410_pwm pwm; ++}; ++ ++static void neo1973_vib_vib_set(struct led_classdev *led_cdev, ++ enum led_brightness value) ++{ ++ struct neo1973_vib_priv *vp = ++ container_of(led_cdev, struct neo1973_vib_priv, cdev); ++ ++ /* ++ * value == 255 -> 99% duty cycle (full power) ++ * value == 128 -> 50% duty cycle (medium power) ++ * value == 0 -> 0% duty cycle (zero power) ++ */ ++ mutex_lock(&vp->mutex); ++ if (vp->has_pwm) ++ s3c2410_pwm_duty_cycle(value/4, &vp->pwm); ++ else { ++ if (value) ++ s3c2410_gpio_setpin(vp->gpio, 1); ++ else ++ s3c2410_gpio_setpin(vp->gpio, 0); ++ } ++ ++ mutex_unlock(&vp->mutex); ++} ++ ++static struct neo1973_vib_priv neo1973_vib_led = { ++ .cdev = { ++ .name = "neo1973:vibrator", ++ .brightness_set = neo1973_vib_vib_set, ++ }, ++}; ++ ++static int neo1973_vib_init_hw(struct neo1973_vib_priv *vp) ++{ ++ int rc; ++ ++ rc = s3c2410_pwm_init(&vp->pwm); ++ if (rc) ++ return rc; ++ ++ vp->pwm.timerid = PWM3; ++ /* use same prescaler as arch/arm/plat-s3c24xx/time.c */ ++ vp->pwm.prescaler = (6 - 1) / 2; ++ vp->pwm.divider = S3C2410_TCFG1_MUX3_DIV2; ++ vp->pwm.counter = COUNTER; ++ vp->pwm.comparer = COUNTER; ++ ++ rc = s3c2410_pwm_enable(&vp->pwm); ++ if (rc) ++ return rc; ++ ++ s3c2410_pwm_start(&vp->pwm); ++ ++ return 0; ++} ++ ++#ifdef CONFIG_PM ++static int neo1973_vib_suspend(struct platform_device *dev, pm_message_t state) ++{ ++ led_classdev_suspend(&neo1973_vib_led.cdev); ++ return 0; ++} ++ ++static int neo1973_vib_resume(struct platform_device *dev) ++{ ++ struct neo1973_vib_priv *vp = platform_get_drvdata(dev); ++ ++ if (vp->has_pwm) ++ neo1973_vib_init_hw(vp); ++ ++ led_classdev_resume(&neo1973_vib_led.cdev); ++ ++ return 0; ++} ++#endif /* CONFIG_PM */ ++ ++static int __init neo1973_vib_probe(struct platform_device *pdev) ++{ ++ struct resource *r; ++ int rc; ++ ++ if (!machine_is_neo1973_gta01()) ++ return -EIO; ++ ++ r = platform_get_resource(pdev, 0, 0); ++ if (!r || !r->start) ++ return -EIO; ++ ++ neo1973_vib_led.gpio = r->start; ++ platform_set_drvdata(pdev, &neo1973_vib_led); ++ ++ /* TOUT3 */ ++ if (neo1973_vib_led.gpio == S3C2410_GPB3) { ++ rc = neo1973_vib_init_hw(&neo1973_vib_led); ++ if (rc) ++ return rc; ++ ++ s3c2410_pwm_duty_cycle(0, &neo1973_vib_led.pwm); ++ s3c2410_gpio_cfgpin(neo1973_vib_led.gpio, S3C2410_GPB3_TOUT3); ++ neo1973_vib_led.has_pwm = 1; ++ } ++ ++ mutex_init(&neo1973_vib_led.mutex); ++ ++ return led_classdev_register(&pdev->dev, &neo1973_vib_led.cdev); ++} ++ ++static int neo1973_vib_remove(struct platform_device *pdev) ++{ ++ if (neo1973_vib_led.has_pwm) ++ s3c2410_pwm_disable(&neo1973_vib_led.pwm); ++ ++ led_classdev_unregister(&neo1973_vib_led.cdev); ++ ++ mutex_destroy(&neo1973_vib_led.mutex); ++ ++ return 0; ++} ++ ++static struct platform_driver neo1973_vib_driver = { ++ .probe = neo1973_vib_probe, ++ .remove = neo1973_vib_remove, ++#ifdef CONFIG_PM ++ .suspend = neo1973_vib_suspend, ++ .resume = neo1973_vib_resume, ++#endif ++ .driver = { ++ .name = "neo1973-vibrator", ++ }, ++}; ++ ++static int __init neo1973_vib_init(void) ++{ ++ return platform_driver_register(&neo1973_vib_driver); ++} ++ ++static void __exit neo1973_vib_exit(void) ++{ ++ platform_driver_unregister(&neo1973_vib_driver); ++} ++ ++module_init(neo1973_vib_init); ++module_exit(neo1973_vib_exit); ++ ++MODULE_AUTHOR("Harald Welte "); ++MODULE_DESCRIPTION("FIC Neo1973 vibrator driver"); ++MODULE_LICENSE("GPL"); +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1017-gta01-backlight.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1017-gta01-backlight.patch.patch new file mode 100644 index 0000000000..342d9407f9 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1017-gta01-backlight.patch.patch @@ -0,0 +1,309 @@ +From e6e1c20bc96cc397812ab07f0ccd0a16360f2e24 Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:32:08 +0100 +Subject: [PATCH] gta01-backlight.patch + This is a backlight driver for the FIC/OpenMoko Neo1973 GTA01 GSM Phone + +Signed-off-by: Harald Welte +--- + drivers/video/backlight/Kconfig | 8 + + drivers/video/backlight/Makefile | 1 + + drivers/video/backlight/gta01_bl.c | 255 ++++++++++++++++++++++++++++++++++++ + 3 files changed, 264 insertions(+), 0 deletions(-) + create mode 100644 drivers/video/backlight/gta01_bl.c + +diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig +index 9609a6c..b954d15 100644 +--- a/drivers/video/backlight/Kconfig ++++ b/drivers/video/backlight/Kconfig +@@ -67,6 +67,14 @@ config BACKLIGHT_LOCOMO + If you have a Sharp Zaurus SL-5500 (Collie) or SL-5600 (Poodle) say y to + enable the LCD/backlight driver. + ++config BACKLIGHT_GTA01 ++ tristate "FIC Neo1973 GTA01 Backlight Driver" ++ depends on BACKLIGHT_CLASS_DEVICE && MACH_NEO1973_GTA01 ++ default y ++ help ++ If you have a FIC Neo1973 GTA01, say y to enable the backlight driver. ++ ++ + config BACKLIGHT_HP680 + tristate "HP Jornada 680 Backlight Driver" + depends on BACKLIGHT_CLASS_DEVICE && SH_HP6XX +diff --git a/drivers/video/backlight/Makefile b/drivers/video/backlight/Makefile +index 965a78b..8b489f2 100644 +--- a/drivers/video/backlight/Makefile ++++ b/drivers/video/backlight/Makefile +@@ -5,6 +5,7 @@ obj-$(CONFIG_LCD_LTV350QV) += ltv350qv.o + + obj-$(CONFIG_BACKLIGHT_CLASS_DEVICE) += backlight.o + obj-$(CONFIG_BACKLIGHT_CORGI) += corgi_bl.o ++obj-$(CONFIG_BACKLIGHT_GTA01) += gta01_bl.o + obj-$(CONFIG_BACKLIGHT_HP680) += hp680_bl.o + obj-$(CONFIG_BACKLIGHT_LOCOMO) += locomolcd.o + obj-$(CONFIG_BACKLIGHT_PROGEAR) += progear_bl.o +diff --git a/drivers/video/backlight/gta01_bl.c b/drivers/video/backlight/gta01_bl.c +new file mode 100644 +index 0000000..c2bf0c9 +--- /dev/null ++++ b/drivers/video/backlight/gta01_bl.c +@@ -0,0 +1,255 @@ ++/* ++ * Backlight Driver for FIC GTA01 (Neo1973) GSM Phone ++ * ++ * Copyright (C) 2006-2007 by OpenMoko, Inc. ++ * Author: Harald Welte ++ * All rights reserved. ++ * ++ * based on corgi_cl.c, Copyright (c) 2004-2006 Richard Purdie ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation, version 2. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ * ++ * Javi Roman : ++ * implement PWM, instead of simple on/off switching ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++ ++#include ++ ++static struct backlight_properties gta01bl_prop; ++static struct backlight_device *gta01_backlight_device; ++static struct gta01bl_machinfo *bl_machinfo; ++ ++static unsigned long gta01bl_flags; ++ ++struct gta01bl_data { ++ int intensity; ++ struct mutex mutex; ++ struct clk *clk; ++ struct s3c2410_pwm pwm; ++}; ++ ++static struct gta01bl_data gta01bl; ++ ++#define GTA01BL_SUSPENDED 0x01 ++#define GTA01BL_BATTLOW 0x02 ++ ++/* On the GTA01 / Neo1973, we use a 50 or 66MHz PCLK, which gives ++ * us a 6.25..8.25MHz DIV8 clock, which is further divided by a ++ * prescaler of 4, resulting in a 1.56..2.06MHz tick. This results in a ++ * minimum frequency of 24..31Hz. At 400Hz, we need to set the count ++ * to something like 3906..5156, providing us a way sufficient resolution ++ * for display brightness adjustment. */ ++#define GTA01BL_COUNTER 5156 ++ ++static int gta01bl_send_intensity(struct backlight_device *bd) ++{ ++ int intensity = bd->props.brightness; ++ ++ if (bd->props.power != FB_BLANK_UNBLANK) ++ intensity = 0; ++ if (bd->props.fb_blank != FB_BLANK_UNBLANK) ++ intensity = 0; ++ if (gta01bl_flags & GTA01BL_SUSPENDED) ++ intensity = 0; ++ if (gta01bl_flags & GTA01BL_BATTLOW) ++ intensity &= bl_machinfo->limit_mask; ++ ++ mutex_lock(>a01bl.mutex); ++#ifdef GTA01_BACKLIGHT_ONOFF_ONLY ++ if (intensity) ++ s3c2410_gpio_setpin(GTA01_GPIO_BACKLIGHT, 1); ++ else ++ s3c2410_gpio_setpin(GTA01_GPIO_BACKLIGHT, 0); ++#else ++ if (intensity == bd->props.max_brightness) { ++ s3c2410_gpio_setpin(GTA01_GPIO_BACKLIGHT, 1); ++ s3c2410_gpio_cfgpin(GTA01_GPIO_BACKLIGHT, S3C2410_GPIO_OUTPUT); ++ } else { ++ s3c2410_pwm_duty_cycle(intensity & 0xffff, >a01bl.pwm); ++ s3c2410_gpio_cfgpin(GTA01_GPIO_BACKLIGHT, S3C2410_GPB0_TOUT0); ++ } ++#endif ++ mutex_unlock(>a01bl.mutex); ++ ++ gta01bl.intensity = intensity; ++ return 0; ++} ++ ++static int gta01bl_init_hw(void) ++{ ++ int rc; ++ ++ rc = s3c2410_pwm_init(>a01bl.pwm); ++ if (rc) ++ return rc; ++ ++ gta01bl.pwm.timerid = PWM0; ++ gta01bl.pwm.prescaler = (4 - 1); ++ gta01bl.pwm.divider = S3C2410_TCFG1_MUX0_DIV8; ++ gta01bl.pwm.counter = GTA01BL_COUNTER; ++ gta01bl.pwm.comparer = gta01bl.pwm.counter; ++ ++ rc = s3c2410_pwm_enable(>a01bl.pwm); ++ if (rc) ++ return rc; ++ ++ s3c2410_pwm_start(>a01bl.pwm); ++ ++ gta01bl_prop.max_brightness = gta01bl.pwm.counter; ++ ++ return 0; ++} ++ ++#ifdef CONFIG_PM ++static int gta01bl_suspend(struct platform_device *dev, pm_message_t state) ++{ ++ gta01bl_flags |= GTA01BL_SUSPENDED; ++ gta01bl_send_intensity(gta01_backlight_device); ++ return 0; ++} ++ ++static int gta01bl_resume(struct platform_device *dev) ++{ ++ mutex_lock(>a01bl.mutex); ++ gta01bl_init_hw(); ++ mutex_unlock(>a01bl.mutex); ++ ++ gta01bl_flags &= ~GTA01BL_SUSPENDED; ++ gta01bl_send_intensity(gta01_backlight_device); ++ return 0; ++} ++#else ++#define gta01bl_suspend NULL ++#define gta01bl_resume NULL ++#endif ++ ++static int gta01bl_get_intensity(struct backlight_device *bd) ++{ ++ return gta01bl.intensity; ++} ++ ++static int gta01bl_set_intensity(struct backlight_device *bd) ++{ ++ gta01bl_send_intensity(gta01_backlight_device); ++ return 0; ++} ++ ++/* ++ * Called when the battery is low to limit the backlight intensity. ++ * If limit==0 clear any limit, otherwise limit the intensity ++ */ ++void gta01bl_limit_intensity(int limit) ++{ ++ if (limit) ++ gta01bl_flags |= GTA01BL_BATTLOW; ++ else ++ gta01bl_flags &= ~GTA01BL_BATTLOW; ++ gta01bl_send_intensity(gta01_backlight_device); ++} ++EXPORT_SYMBOL_GPL(gta01bl_limit_intensity); ++ ++ ++static struct backlight_ops gta01bl_ops = { ++ .get_brightness = gta01bl_get_intensity, ++ .update_status = gta01bl_set_intensity, ++}; ++ ++static int __init gta01bl_probe(struct platform_device *pdev) ++{ ++ struct gta01bl_machinfo *machinfo = pdev->dev.platform_data; ++ int rc; ++ ++#ifdef GTA01_BACKLIGHT_ONOFF_ONLY ++ s3c2410_gpio_cfgpin(GTA01_GPIO_BACKLIGHT, S3C2410_GPIO_OUTPUT); ++ gta01bl_prop.max_brightness = 1; ++#else ++ rc = gta01bl_init_hw(); ++ if (rc < 0) ++ return rc; ++#endif ++ mutex_init(>a01bl.mutex); ++ ++ if (!machinfo->limit_mask) ++ machinfo->limit_mask = -1; ++ ++ gta01_backlight_device = backlight_device_register("gta01-bl", ++ &pdev->dev, NULL, ++ >a01bl_ops); ++ if (IS_ERR(gta01_backlight_device)) ++ return PTR_ERR(gta01_backlight_device); ++ ++ gta01bl_prop.power = FB_BLANK_UNBLANK; ++ gta01bl_prop.brightness = gta01bl_prop.max_brightness; ++ memcpy(>a01_backlight_device->props, ++ >a01bl_prop, sizeof(gta01bl_prop)); ++ gta01bl_send_intensity(gta01_backlight_device); ++ ++ return 0; ++} ++ ++static int gta01bl_remove(struct platform_device *dev) ++{ ++#ifndef GTA01_BACKLIGHT_ONOFF_ONLY ++ s3c2410_pwm_disable(>a01bl.pwm); ++#endif ++ backlight_device_unregister(gta01_backlight_device); ++ mutex_destroy(>a01bl.mutex); ++ ++ s3c2410_gpio_cfgpin(GTA01_GPIO_BACKLIGHT, S3C2410_GPIO_OUTPUT); ++ s3c2410_gpio_setpin(GTA01_GPIO_BACKLIGHT, 1); ++ ++ return 0; ++} ++ ++static struct platform_driver gta01bl_driver = { ++ .probe = gta01bl_probe, ++ .remove = gta01bl_remove, ++ .suspend = gta01bl_suspend, ++ .resume = gta01bl_resume, ++ .driver = { ++ .name = "gta01-bl", ++ }, ++}; ++ ++static int __init gta01bl_init(void) ++{ ++ return platform_driver_register(>a01bl_driver); ++} ++ ++static void __exit gta01bl_exit(void) ++{ ++ platform_driver_unregister(>a01bl_driver); ++} ++ ++module_init(gta01bl_init); ++module_exit(gta01bl_exit); ++ ++MODULE_DESCRIPTION("FIC GTA01 (Neo1973) Backlight Driver"); ++MODULE_AUTHOR("Harald Welte "); ++MODULE_LICENSE("GPL"); +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1018-s3c2410_touchscreen.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1018-s3c2410_touchscreen.patch.patch new file mode 100644 index 0000000000..b39162b42e --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1018-s3c2410_touchscreen.patch.patch @@ -0,0 +1,636 @@ +From 04cce88d3d6753ae23ec36cf383f81aaed5fc71b Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:32:18 +0100 +Subject: [PATCH] s3c2410_touchscreen.patch + +--- + arch/arm/mach-s3c2410/mach-h1940.c | 8 + + arch/arm/plat-s3c24xx/devs.c | 18 ++ + arch/arm/plat-s3c24xx/s3c244x.c | 1 + + drivers/input/touchscreen/Kconfig | 18 ++ + drivers/input/touchscreen/Makefile | 1 + + drivers/input/touchscreen/s3c2410_ts.c | 437 ++++++++++++++++++++++++++++++++ + include/asm-arm/arch-s3c2410/ts.h | 28 ++ + include/asm-arm/plat-s3c24xx/devs.h | 1 + + 8 files changed, 512 insertions(+), 0 deletions(-) + create mode 100644 drivers/input/touchscreen/s3c2410_ts.c + create mode 100644 include/asm-arm/arch-s3c2410/ts.h + +diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c +index 7c1145e..93cd8c8 100644 +--- a/arch/arm/mach-s3c2410/mach-h1940.c ++++ b/arch/arm/mach-s3c2410/mach-h1940.c +@@ -38,6 +38,7 @@ + #include + #include + #include ++#include + #include + + #include +@@ -129,6 +130,11 @@ static struct s3c2410_udc_mach_info h1940_udc_cfg __initdata = { + .vbus_pin_inverted = 1, + }; + ++static struct s3c2410_ts_mach_info h1940_ts_cfg __initdata = { ++ .delay = 10000, ++ .presc = 49, ++ .oversampling_shift = 2, ++}; + + /** + * Set lcd on or off +@@ -186,6 +192,7 @@ static struct platform_device *h1940_devices[] __initdata = { + &s3c_device_i2c, + &s3c_device_iis, + &s3c_device_usbgadget, ++ &s3c_device_ts, + &s3c_device_leds, + &s3c_device_bluetooth, + }; +@@ -214,6 +221,7 @@ static void __init h1940_init(void) + u32 tmp; + + s3c24xx_fb_set_platdata(&h1940_fb_info); ++ set_s3c2410ts_info(&h1940_ts_cfg); + s3c24xx_udc_set_platdata(&h1940_udc_cfg); + + /* Turn off suspend on both USB ports, and switch the +diff --git a/arch/arm/plat-s3c24xx/devs.c b/arch/arm/plat-s3c24xx/devs.c +index e546e93..c1fbe2d 100644 +--- a/arch/arm/plat-s3c24xx/devs.c ++++ b/arch/arm/plat-s3c24xx/devs.c +@@ -24,6 +24,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -207,6 +208,23 @@ struct platform_device s3c_device_nand = { + + EXPORT_SYMBOL(s3c_device_nand); + ++/* Touchscreen */ ++struct platform_device s3c_device_ts = { ++ .name = "s3c2410-ts", ++ .id = -1, ++}; ++ ++EXPORT_SYMBOL(s3c_device_ts); ++ ++static struct s3c2410_ts_mach_info s3c2410ts_info; ++ ++void set_s3c2410ts_info(struct s3c2410_ts_mach_info *hard_s3c2410ts_info) ++{ ++ memcpy(&s3c2410ts_info,hard_s3c2410ts_info,sizeof(struct s3c2410_ts_mach_info)); ++ s3c_device_ts.dev.platform_data = &s3c2410ts_info; ++} ++EXPORT_SYMBOL(set_s3c2410ts_info); ++ + /* USB Device (Gadget)*/ + + static struct resource s3c_usbgadget_resource[] = { +diff --git a/arch/arm/plat-s3c24xx/s3c244x.c b/arch/arm/plat-s3c24xx/s3c244x.c +index 3444b13..b9389b9 100644 +--- a/arch/arm/plat-s3c24xx/s3c244x.c ++++ b/arch/arm/plat-s3c24xx/s3c244x.c +@@ -67,6 +67,7 @@ void __init s3c244x_map_io(struct map_desc *mach_desc, int size) + + s3c_device_i2c.name = "s3c2440-i2c"; + s3c_device_nand.name = "s3c2440-nand"; ++ s3c_device_ts.name = "s3c2440-ts"; + s3c_device_usbgadget.name = "s3c2440-usbgadget"; + } + +diff --git a/drivers/input/touchscreen/Kconfig b/drivers/input/touchscreen/Kconfig +index 90e8e92..b94fa62 100644 +--- a/drivers/input/touchscreen/Kconfig ++++ b/drivers/input/touchscreen/Kconfig +@@ -67,6 +67,24 @@ config TOUCHSCREEN_FUJITSU + To compile this driver as a module, choose M here: the + module will be called fujitsu-ts. + ++config TOUCHSCREEN_S3C2410 ++ tristate "Samsung S3C2410 touchscreen input driver" ++ depends on ARCH_S3C2410 && INPUT && INPUT_TOUCHSCREEN ++ select SERIO ++ help ++ Say Y here if you have the s3c2410 touchscreen. ++ ++ If unsure, say N. ++ ++ To compile this driver as a module, choose M here: the ++ module will be called s3c2410_ts. ++ ++config TOUCHSCREEN_S3C2410_DEBUG ++ boolean "Samsung S3C2410 touchscreen debug messages" ++ depends on TOUCHSCREEN_S3C2410 ++ help ++ Select this if you want debug messages ++ + config TOUCHSCREEN_GUNZE + tristate "Gunze AHL-51S touchscreen" + select SERIO +diff --git a/drivers/input/touchscreen/Makefile b/drivers/input/touchscreen/Makefile +index 35d4097..6558e63 100644 +--- a/drivers/input/touchscreen/Makefile ++++ b/drivers/input/touchscreen/Makefile +@@ -19,3 +19,4 @@ obj-$(CONFIG_TOUCHSCREEN_PENMOUNT) += penmount.o + obj-$(CONFIG_TOUCHSCREEN_TOUCHRIGHT) += touchright.o + obj-$(CONFIG_TOUCHSCREEN_TOUCHWIN) += touchwin.o + obj-$(CONFIG_TOUCHSCREEN_UCB1400) += ucb1400_ts.o ++obj-$(CONFIG_TOUCHSCREEN_S3C2410) += s3c2410_ts.o +diff --git a/drivers/input/touchscreen/s3c2410_ts.c b/drivers/input/touchscreen/s3c2410_ts.c +new file mode 100644 +index 0000000..68071c2 +--- /dev/null ++++ b/drivers/input/touchscreen/s3c2410_ts.c +@@ -0,0 +1,437 @@ ++/* ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ * ++ * Copyright (c) 2004 Arnaud Patard ++ * iPAQ H1940 touchscreen support ++ * ++ * ChangeLog ++ * ++ * 2004-09-05: Herbert Pötzl ++ * - added clock (de-)allocation code ++ * ++ * 2005-03-06: Arnaud Patard ++ * - h1940_ -> s3c2410 (this driver is now also used on the n30 ++ * machines :P) ++ * - Debug messages are now enabled with the config option ++ * TOUCHSCREEN_S3C2410_DEBUG ++ * - Changed the way the value are read ++ * - Input subsystem should now work ++ * - Use ioremap and readl/writel ++ * ++ * 2005-03-23: Arnaud Patard ++ * - Make use of some undocumented features of the touchscreen ++ * controller ++ * ++ * 2007-05-23: Harald Welte ++ * - Add proper support for S32440 ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include ++ ++/* For ts.dev.id.version */ ++#define S3C2410TSVERSION 0x0101 ++ ++#define TSC_SLEEP (S3C2410_ADCTSC_PULL_UP_DISABLE | S3C2410_ADCTSC_XY_PST(0)) ++ ++#define WAIT4INT(x) (((x)<<8) | \ ++ S3C2410_ADCTSC_YM_SEN | S3C2410_ADCTSC_YP_SEN | S3C2410_ADCTSC_XP_SEN | \ ++ S3C2410_ADCTSC_XY_PST(3)) ++ ++#define AUTOPST (S3C2410_ADCTSC_YM_SEN | S3C2410_ADCTSC_YP_SEN | S3C2410_ADCTSC_XP_SEN | \ ++ S3C2410_ADCTSC_AUTO_PST | S3C2410_ADCTSC_XY_PST(0)) ++ ++#define DEBUG_LVL KERN_DEBUG ++ ++MODULE_AUTHOR("Arnaud Patard "); ++MODULE_DESCRIPTION("s3c2410 touchscreen driver"); ++MODULE_LICENSE("GPL"); ++ ++/* ++ * Definitions & global arrays. ++ */ ++ ++ ++static char *s3c2410ts_name = "s3c2410 TouchScreen"; ++ ++/* ++ * Per-touchscreen data. ++ */ ++ ++struct s3c2410ts { ++ struct input_dev *dev; ++ long xp; ++ long yp; ++ int count; ++ int shift; ++}; ++ ++static struct s3c2410ts ts; ++static void __iomem *base_addr; ++ ++static inline void s3c2410_ts_connect(void) ++{ ++ s3c2410_gpio_cfgpin(S3C2410_GPG12, S3C2410_GPG12_XMON); ++ s3c2410_gpio_cfgpin(S3C2410_GPG13, S3C2410_GPG13_nXPON); ++ s3c2410_gpio_cfgpin(S3C2410_GPG14, S3C2410_GPG14_YMON); ++ s3c2410_gpio_cfgpin(S3C2410_GPG15, S3C2410_GPG15_nYPON); ++} ++ ++static void touch_timer_fire(unsigned long data) ++{ ++ unsigned long data0; ++ unsigned long data1; ++ int updown; ++ ++ data0 = readl(base_addr+S3C2410_ADCDAT0); ++ data1 = readl(base_addr+S3C2410_ADCDAT1); ++ ++ updown = (!(data0 & S3C2410_ADCDAT0_UPDOWN)) && (!(data1 & S3C2410_ADCDAT0_UPDOWN)); ++ ++ if (updown) { ++ if (ts.count != 0) { ++ ts.xp >>= ts.shift; ++ ts.yp >>= ts.shift; ++ ++#ifdef CONFIG_TOUCHSCREEN_S3C2410_DEBUG ++ { ++ struct timeval tv; ++ do_gettimeofday(&tv); ++ printk(DEBUG_LVL "T: %06d, X: %03ld, Y: %03ld\n", (int)tv.tv_usec, ts.xp, ts.yp); ++ } ++#endif ++ ++ input_report_abs(ts.dev, ABS_X, ts.xp); ++ input_report_abs(ts.dev, ABS_Y, ts.yp); ++ ++ input_report_key(ts.dev, BTN_TOUCH, 1); ++ input_report_abs(ts.dev, ABS_PRESSURE, 1); ++ input_sync(ts.dev); ++ } ++ ++ ts.xp = 0; ++ ts.yp = 0; ++ ts.count = 0; ++ ++ writel(S3C2410_ADCTSC_PULL_UP_DISABLE | AUTOPST, base_addr+S3C2410_ADCTSC); ++ writel(readl(base_addr+S3C2410_ADCCON) | S3C2410_ADCCON_ENABLE_START, base_addr+S3C2410_ADCCON); ++ } else { ++ ts.count = 0; ++ ++ input_report_key(ts.dev, BTN_TOUCH, 0); ++ input_report_abs(ts.dev, ABS_PRESSURE, 0); ++ input_sync(ts.dev); ++ ++ writel(WAIT4INT(0), base_addr+S3C2410_ADCTSC); ++ } ++} ++ ++static struct timer_list touch_timer = ++ TIMER_INITIALIZER(touch_timer_fire, 0, 0); ++ ++static irqreturn_t stylus_updown(int irq, void *dev_id) ++{ ++ unsigned long data0; ++ unsigned long data1; ++ int updown; ++ ++ data0 = readl(base_addr+S3C2410_ADCDAT0); ++ data1 = readl(base_addr+S3C2410_ADCDAT1); ++ ++ updown = (!(data0 & S3C2410_ADCDAT0_UPDOWN)) && (!(data1 & S3C2410_ADCDAT0_UPDOWN)); ++ ++ /* TODO we should never get an interrupt with updown set while ++ * the timer is running, but maybe we ought to verify that the ++ * timer isn't running anyways. */ ++ ++ if (updown) ++ touch_timer_fire(0); ++ ++ return IRQ_HANDLED; ++} ++ ++ ++static irqreturn_t stylus_action(int irq, void *dev_id) ++{ ++ unsigned long data0; ++ unsigned long data1; ++ ++ data0 = readl(base_addr+S3C2410_ADCDAT0); ++ data1 = readl(base_addr+S3C2410_ADCDAT1); ++ ++ ts.xp += data0 & S3C2410_ADCDAT0_XPDATA_MASK; ++ ts.yp += data1 & S3C2410_ADCDAT1_YPDATA_MASK; ++ ts.count++; ++ ++ if (ts.count < (1<dev.platform_data; ++ ++ if (!info) ++ { ++ printk(KERN_ERR "Hm... too bad : no platform data for ts\n"); ++ return -EINVAL; ++ } ++ ++#ifdef CONFIG_TOUCHSCREEN_S3C2410_DEBUG ++ printk(DEBUG_LVL "Entering s3c2410ts_init\n"); ++#endif ++ ++ adc_clock = clk_get(NULL, "adc"); ++ if (!adc_clock) { ++ printk(KERN_ERR "failed to get adc clock source\n"); ++ return -ENOENT; ++ } ++ clk_enable(adc_clock); ++ ++#ifdef CONFIG_TOUCHSCREEN_S3C2410_DEBUG ++ printk(DEBUG_LVL "got and enabled clock\n"); ++#endif ++ ++ base_addr = ioremap(S3C2410_PA_ADC,0x20); ++ if (base_addr == NULL) { ++ printk(KERN_ERR "Failed to remap register block\n"); ++ return -ENOMEM; ++ } ++ ++ ++ /* If we acutally are a S3C2410: Configure GPIOs */ ++ if (!strcmp(pdev->name, "s3c2410-ts")) ++ s3c2410_ts_connect(); ++ ++ if ((info->presc&0xff) > 0) ++ writel(S3C2410_ADCCON_PRSCEN | S3C2410_ADCCON_PRSCVL(info->presc&0xFF),\ ++ base_addr+S3C2410_ADCCON); ++ else ++ writel(0,base_addr+S3C2410_ADCCON); ++ ++ ++ /* Initialise registers */ ++ if ((info->delay&0xffff) > 0) ++ writel(info->delay & 0xffff, base_addr+S3C2410_ADCDLY); ++ ++ writel(WAIT4INT(0), base_addr+S3C2410_ADCTSC); ++ ++ /* Initialise input stuff */ ++ memset(&ts, 0, sizeof(struct s3c2410ts)); ++ input_dev = input_allocate_device(); ++ ++ if (!input_dev) { ++ printk(KERN_ERR "Unable to allocate the input device !!\n"); ++ return -ENOMEM; ++ } ++ ++ ts.dev = input_dev; ++ ts.dev->evbit[0] = BIT_MASK(EV_SYN) | BIT_MASK(EV_KEY) | ++ BIT_MASK(EV_ABS); ++ ts.dev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH); ++ input_set_abs_params(ts.dev, ABS_X, 0, 0x3FF, 0, 0); ++ input_set_abs_params(ts.dev, ABS_Y, 0, 0x3FF, 0, 0); ++ input_set_abs_params(ts.dev, ABS_PRESSURE, 0, 1, 0, 0); ++ ++ ts.dev->private = &ts; ++ ts.dev->name = s3c2410ts_name; ++ ts.dev->id.bustype = BUS_RS232; ++ ts.dev->id.vendor = 0xDEAD; ++ ts.dev->id.product = 0xBEEF; ++ ts.dev->id.version = S3C2410TSVERSION; ++ ++ ts.shift = info->oversampling_shift; ++ ++ /* Get irqs */ ++ if (request_irq(IRQ_ADC, stylus_action, IRQF_SAMPLE_RANDOM, ++ "s3c2410_action", ts.dev)) { ++ printk(KERN_ERR "s3c2410_ts.c: Could not allocate ts IRQ_ADC !\n"); ++ iounmap(base_addr); ++ return -EIO; ++ } ++ if (request_irq(IRQ_TC, stylus_updown, IRQF_SAMPLE_RANDOM, ++ "s3c2410_action", ts.dev)) { ++ printk(KERN_ERR "s3c2410_ts.c: Could not allocate ts IRQ_TC !\n"); ++ free_irq(IRQ_ADC, ts.dev); ++ iounmap(base_addr); ++ return -EIO; ++ } ++ ++ printk(KERN_INFO "%s successfully loaded\n", s3c2410ts_name); ++ ++ /* All went ok, so register to the input system */ ++ rc = input_register_device(ts.dev); ++ if (rc) { ++ free_irq(IRQ_TC, ts.dev); ++ free_irq(IRQ_ADC, ts.dev); ++ clk_disable(adc_clock); ++ iounmap(base_addr); ++ return -EIO; ++ } ++ ++ return 0; ++} ++ ++static int s3c2410ts_remove(struct platform_device *pdev) ++{ ++ disable_irq(IRQ_ADC); ++ disable_irq(IRQ_TC); ++ free_irq(IRQ_TC,ts.dev); ++ free_irq(IRQ_ADC,ts.dev); ++ ++ if (adc_clock) { ++ clk_disable(adc_clock); ++ clk_put(adc_clock); ++ adc_clock = NULL; ++ } ++ ++ input_unregister_device(ts.dev); ++ iounmap(base_addr); ++ ++ return 0; ++} ++ ++#ifdef CONFIG_PM ++static int s3c2410ts_suspend(struct platform_device *pdev, pm_message_t state) ++{ ++ writel(TSC_SLEEP, base_addr+S3C2410_ADCTSC); ++ writel(readl(base_addr+S3C2410_ADCCON) | S3C2410_ADCCON_STDBM, ++ base_addr+S3C2410_ADCCON); ++ ++ disable_irq(IRQ_ADC); ++ disable_irq(IRQ_TC); ++ ++ clk_disable(adc_clock); ++ ++ return 0; ++} ++ ++static int s3c2410ts_resume(struct platform_device *pdev) ++{ ++ struct s3c2410_ts_mach_info *info = ++ ( struct s3c2410_ts_mach_info *)pdev->dev.platform_data; ++ ++ clk_enable(adc_clock); ++ msleep(1); ++ ++ enable_irq(IRQ_ADC); ++ enable_irq(IRQ_TC); ++ ++ if ((info->presc&0xff) > 0) ++ writel(S3C2410_ADCCON_PRSCEN | S3C2410_ADCCON_PRSCVL(info->presc&0xFF),\ ++ base_addr+S3C2410_ADCCON); ++ else ++ writel(0,base_addr+S3C2410_ADCCON); ++ ++ /* Initialise registers */ ++ if ((info->delay&0xffff) > 0) ++ writel(info->delay & 0xffff, base_addr+S3C2410_ADCDLY); ++ ++ writel(WAIT4INT(0), base_addr+S3C2410_ADCTSC); ++ ++ return 0; ++} ++ ++#else ++#define s3c2410ts_suspend NULL ++#define s3c2410ts_resume NULL ++#endif ++ ++static struct platform_driver s3c2410ts_driver = { ++ .driver = { ++ .name = "s3c2410-ts", ++ .owner = THIS_MODULE, ++ }, ++ .probe = s3c2410ts_probe, ++ .remove = s3c2410ts_remove, ++ .suspend = s3c2410ts_suspend, ++ .resume = s3c2410ts_resume, ++ ++}; ++ ++static struct platform_driver s3c2440ts_driver = { ++ .driver = { ++ .name = "s3c2440-ts", ++ .owner = THIS_MODULE, ++ }, ++ .probe = s3c2410ts_probe, ++ .remove = s3c2410ts_remove, ++ .suspend = s3c2410ts_suspend, ++ .resume = s3c2410ts_resume, ++ ++}; ++ ++static int __init s3c2410ts_init(void) ++{ ++ int rc; ++ ++ rc = platform_driver_register(&s3c2410ts_driver); ++ if (rc < 0) ++ return rc; ++ ++ rc = platform_driver_register(&s3c2440ts_driver); ++ if (rc < 0) ++ platform_driver_unregister(&s3c2410ts_driver); ++ ++ return rc; ++} ++ ++static void __exit s3c2410ts_exit(void) ++{ ++ platform_driver_unregister(&s3c2440ts_driver); ++ platform_driver_unregister(&s3c2410ts_driver); ++} ++ ++module_init(s3c2410ts_init); ++module_exit(s3c2410ts_exit); ++ ++/* ++ Local variables: ++ compile-command: "make ARCH=arm CROSS_COMPILE=/usr/local/arm/3.3.2/bin/arm-linux- -k -C ../../.." ++ c-basic-offset: 8 ++ End: ++*/ +diff --git a/include/asm-arm/arch-s3c2410/ts.h b/include/asm-arm/arch-s3c2410/ts.h +new file mode 100644 +index 0000000..593632a +--- /dev/null ++++ b/include/asm-arm/arch-s3c2410/ts.h +@@ -0,0 +1,28 @@ ++/* linux/include/asm/arch-s3c2410/ts.h ++ * ++ * Copyright (c) 2005 Arnaud Patard ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * ++ * Changelog: ++ * 24-Mar-2005 RTP Created file ++ * 03-Aug-2005 RTP Renamed to ts.h ++ */ ++ ++#ifndef __ASM_ARM_TS_H ++#define __ASM_ARM_TS_H ++ ++struct s3c2410_ts_mach_info { ++ int delay; ++ int presc; ++ int oversampling_shift; ++}; ++ ++void set_s3c2410ts_info(struct s3c2410_ts_mach_info *hard_s3c2410ts_info); ++ ++#endif /* __ASM_ARM_TS_H */ ++ +diff --git a/include/asm-arm/plat-s3c24xx/devs.h b/include/asm-arm/plat-s3c24xx/devs.h +index f9d6f03..43de9cc 100644 +--- a/include/asm-arm/plat-s3c24xx/devs.h ++++ b/include/asm-arm/plat-s3c24xx/devs.h +@@ -42,6 +42,7 @@ extern struct platform_device s3c_device_timer2; + extern struct platform_device s3c_device_timer3; + + extern struct platform_device s3c_device_usbgadget; ++extern struct platform_device s3c_device_ts; + + /* s3c2440 specific devices */ + +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1019-s3c2410_ts-gta01.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1019-s3c2410_ts-gta01.patch.patch new file mode 100644 index 0000000000..c40f85a79c --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1019-s3c2410_ts-gta01.patch.patch @@ -0,0 +1,53 @@ +From 31fc0f2354bb65ac59ccc1e257fdbd622bda9aef Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:32:30 +0100 +Subject: [PATCH] s3c2410_ts-gta01.patch + +--- + arch/arm/mach-s3c2410/mach-gta01.c | 9 +++++++++ + 1 files changed, 9 insertions(+), 0 deletions(-) + +diff --git a/arch/arm/mach-s3c2410/mach-gta01.c b/arch/arm/mach-s3c2410/mach-gta01.c +index e690ed7..3462c7f 100644 +--- a/arch/arm/mach-s3c2410/mach-gta01.c ++++ b/arch/arm/mach-s3c2410/mach-gta01.c +@@ -33,6 +33,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -362,6 +363,7 @@ static struct platform_device *gta01_devices[] __initdata = { + &s3c_device_sdi, + &s3c_device_usbgadget, + &s3c_device_nand, ++ &s3c_device_ts, + }; + + static struct s3c2410_nand_set gta01_nand_sets[] = { +@@ -434,6 +436,12 @@ static struct s3c2410_udc_mach_info gta01_udc_cfg = { + .vbus_draw = gta01_udc_vbus_draw, + }; + ++static struct s3c2410_ts_mach_info gta01_ts_cfg = { ++ .delay = 10000, ++ .presc = 65, ++ .oversampling_shift = 5, ++}; ++ + /* SPI */ + + static struct spi_board_info gta01_spi_board_info[] = { +@@ -599,6 +607,7 @@ static void __init gta01_machine_init(void) + + INIT_WORK(>a01_udc_vbus_drawer.work, __gta01_udc_vbus_draw); + s3c24xx_udc_set_platdata(>a01_udc_cfg); ++ set_s3c2410ts_info(>a01_ts_cfg); + + /* Set LCD_RESET / XRES to high */ + s3c2410_gpio_cfgpin(S3C2410_GPC6, S3C2410_GPIO_OUTPUT); +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1020-i2c-permit_invalid_addrs.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1020-i2c-permit_invalid_addrs.patch.patch new file mode 100644 index 0000000000..dd568dedbc --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1020-i2c-permit_invalid_addrs.patch.patch @@ -0,0 +1,33 @@ +From ae0e6a5c9e4cc1786c8b798ac19259a339476121 Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:32:41 +0100 +Subject: [PATCH] i2c-permit_invalid_addrs.patch + We need this stupid workaround since our amplifier chip uses a 'reserved' I2C + address + +Signed-off-by: Harald Welte +--- + drivers/i2c/i2c-core.c | 4 ++-- + 1 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c +index b5e13e4..2c802de 100644 +--- a/drivers/i2c/i2c-core.c ++++ b/drivers/i2c/i2c-core.c +@@ -941,11 +941,11 @@ static int i2c_probe_address(struct i2c_adapter *adapter, int addr, int kind, + int err; + + /* Make sure the address is valid */ +- if (addr < 0x03 || addr > 0x77) { ++ /*if (addr < 0x03 || addr > 0x77) { + dev_warn(&adapter->dev, "Invalid probe address 0x%02x\n", + addr); + return -EINVAL; +- } ++ }*/ + + /* Skip if already in use */ + if (i2c_check_addr(adapter, addr)) +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1021-g_ether-highpower.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1021-g_ether-highpower.patch.patch new file mode 100644 index 0000000000..61019b7cc5 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1021-g_ether-highpower.patch.patch @@ -0,0 +1,34 @@ +From 00f10ad5e63625961028479e4814953ff443dfff Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:32:51 +0100 +Subject: [PATCH] g_ether-highpower.patch + +--- + drivers/usb/gadget/ether.c | 4 ++-- + 1 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c +index 9e732bf..a7f38b6 100644 +--- a/drivers/usb/gadget/ether.c ++++ b/drivers/usb/gadget/ether.c +@@ -464,7 +464,7 @@ eth_config = { + .bConfigurationValue = DEV_CONFIG_VALUE, + .iConfiguration = STRING_CDC, + .bmAttributes = USB_CONFIG_ATT_ONE | USB_CONFIG_ATT_SELFPOWER, +- .bMaxPower = 50, ++ .bMaxPower = 250, + }; + + #ifdef CONFIG_USB_ETH_RNDIS +@@ -478,7 +478,7 @@ rndis_config = { + .bConfigurationValue = DEV_RNDIS_CONFIG_VALUE, + .iConfiguration = STRING_RNDIS, + .bmAttributes = USB_CONFIG_ATT_ONE | USB_CONFIG_ATT_SELFPOWER, +- .bMaxPower = 50, ++ .bMaxPower = 250, + }; + #endif + +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1022-g_ether-vendor_product.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1022-g_ether-vendor_product.patch.patch new file mode 100644 index 0000000000..925dc5fc46 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1022-g_ether-vendor_product.patch.patch @@ -0,0 +1,44 @@ +From f741358022646f390154cfc922bece654df26741 Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:33:02 +0100 +Subject: [PATCH] g_ether-vendor_product.patch + Use FIC's own USB Vendor ID rather than NetChip's + +Yes, we could solve this by some modprobe.conf parameters, but I'd like to +rather not rely on this. +--- + drivers/usb/gadget/ether.c | 11 ++++------- + 1 files changed, 4 insertions(+), 7 deletions(-) + +diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c +index a7f38b6..6efbb44 100644 +--- a/drivers/usb/gadget/ether.c ++++ b/drivers/usb/gadget/ether.c +@@ -134,11 +134,8 @@ struct eth_dev { + * Instead: allocate your own, using normal USB-IF procedures. + */ + +-/* Thanks to NetChip Technologies for donating this product ID. +- * It's for devices with only CDC Ethernet configurations. +- */ +-#define CDC_VENDOR_NUM 0x0525 /* NetChip */ +-#define CDC_PRODUCT_NUM 0xa4a1 /* Linux-USB Ethernet Gadget */ ++#define CDC_VENDOR_NUM 0x1457 /* First International Computer */ ++#define CDC_PRODUCT_NUM 0x5117 /* Linux-USB Ethernet Gadget */ + + /* For hardware that can't talk CDC, we use the same vendor ID that + * ARM Linux has used for ethernet-over-usb, both with sa1100 and +@@ -159,8 +156,8 @@ struct eth_dev { + * used with CDC Ethernet, Linux 2.4 hosts will need updates to choose + * the non-RNDIS configuration. + */ +-#define RNDIS_VENDOR_NUM 0x0525 /* NetChip */ +-#define RNDIS_PRODUCT_NUM 0xa4a2 /* Ethernet/RNDIS Gadget */ ++#define RNDIS_VENDOR_NUM 0x1457 /* NetChip */ ++#define RNDIS_PRODUCT_NUM 0x5122 /* Ethernet/RNDIS Gadget */ + + + /* Some systems will want different product identifers published in the +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1023-s3c_mci.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1023-s3c_mci.patch.patch new file mode 100644 index 0000000000..f9f3122f2d --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1023-s3c_mci.patch.patch @@ -0,0 +1,1704 @@ +From fbe3b2447eb15d4d34d906c8112bb33454163612 Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:33:15 +0100 +Subject: [PATCH] s3c_mci.patch + This is a MMC/SD driver for the Samsung S3C24xx SD/MMC controller, originally + developed years ago by Thomas Kleffel . + +Due to time restraints, he had no time to further maintain the driver and +follow the mainline Linux changes in the SD/MMC stack. + +With his authorization, I have taken over the task of making it compliant to +the current mainline SD/MMC API and take care of the mainline kernel merge. + +After a potential kernel inclusion, we would co-maintain the driver. + +Acked-by: Thomas Kleffel +Signed-off-by: Harald Welte +--- + arch/arm/mach-s3c2412/s3c2412.c | 3 + + arch/arm/mach-s3c2440/s3c2440.c | 3 + + arch/arm/mach-s3c2442/s3c2442.c | 4 + + drivers/mmc/host/Kconfig | 11 + + drivers/mmc/host/Makefile | 2 +- + drivers/mmc/host/s3cmci.c | 1419 +++++++++++++++++++++++++++++++ + drivers/mmc/host/s3cmci.h | 69 ++ + include/asm-arm/arch-s3c2410/mci.h | 13 + + include/asm-arm/arch-s3c2410/regs-sdi.h | 22 +- + 9 files changed, 1542 insertions(+), 4 deletions(-) + create mode 100644 drivers/mmc/host/s3cmci.c + create mode 100644 drivers/mmc/host/s3cmci.h + create mode 100644 include/asm-arm/arch-s3c2410/mci.h + +diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c2412/s3c2412.c +index 4f92a15..6b45fd9 100644 +--- a/arch/arm/mach-s3c2412/s3c2412.c ++++ b/arch/arm/mach-s3c2412/s3c2412.c +@@ -214,5 +214,8 @@ int __init s3c2412_init(void) + { + printk("S3C2412: Initialising architecture\n"); + ++ /* make sure SD/MMC driver can distinguish 2412 from 2410 */ ++ s3c_device_sdi.name = "s3c2412-sdi"; ++ + return sysdev_register(&s3c2412_sysdev); + } +diff --git a/arch/arm/mach-s3c2440/s3c2440.c b/arch/arm/mach-s3c2440/s3c2440.c +index 90e1da6..6c18cbd 100644 +--- a/arch/arm/mach-s3c2440/s3c2440.c ++++ b/arch/arm/mach-s3c2440/s3c2440.c +@@ -46,6 +46,9 @@ int __init s3c2440_init(void) + s3c_device_wdt.resource[1].start = IRQ_S3C2440_WDT; + s3c_device_wdt.resource[1].end = IRQ_S3C2440_WDT; + ++ /* make sure SD/MMC driver can distinguish 2440 from 2410 */ ++ s3c_device_sdi.name = "s3c2440-sdi"; ++ + /* register our system device for everything else */ + + return sysdev_register(&s3c2440_sysdev); +diff --git a/arch/arm/mach-s3c2442/s3c2442.c b/arch/arm/mach-s3c2442/s3c2442.c +index fbf8264..fbfb330 100644 +--- a/arch/arm/mach-s3c2442/s3c2442.c ++++ b/arch/arm/mach-s3c2442/s3c2442.c +@@ -21,6 +21,7 @@ + + #include + #include ++#include + + static struct sys_device s3c2442_sysdev = { + .cls = &s3c2442_sysclass, +@@ -30,5 +31,8 @@ int __init s3c2442_init(void) + { + printk("S3C2442: Initialising architecture\n"); + ++ /* make sure SD/MMC driver can distinguish 2440 from 2410 */ ++ s3c_device_sdi.name = "s3c2440-sdi"; ++ + return sysdev_register(&s3c2442_sysdev); + } +diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig +index 5fef678..6936802 100644 +--- a/drivers/mmc/host/Kconfig ++++ b/drivers/mmc/host/Kconfig +@@ -130,3 +130,14 @@ config MMC_SPI + + If unsure, or if your system has no SPI master driver, say N. + ++config MMC_S3C ++ tristate "Samsung S3C24xx SD/MMC Card Interface support" ++ depends on ARCH_S3C2410 && MMC ++ help ++ This selects a driver for the MCI interface found in ++ Samsung's S3C2410, S3C2412, S3C2440, S3C2442 CPUs. ++ If you have a board based on one of those and a MMC/SD ++ slot, say Y or M here. ++ ++ If unsure, say N. ++ +diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile +index 3877c87..071d256 100644 +--- a/drivers/mmc/host/Makefile ++++ b/drivers/mmc/host/Makefile +@@ -17,4 +17,4 @@ obj-$(CONFIG_MMC_OMAP) += omap.o + obj-$(CONFIG_MMC_AT91) += at91_mci.o + obj-$(CONFIG_MMC_TIFM_SD) += tifm_sd.o + obj-$(CONFIG_MMC_SPI) += mmc_spi.o +- ++obj-$(CONFIG_MMC_S3C) += s3cmci.o +diff --git a/drivers/mmc/host/s3cmci.c b/drivers/mmc/host/s3cmci.c +new file mode 100644 +index 0000000..edba055 +--- /dev/null ++++ b/drivers/mmc/host/s3cmci.c +@@ -0,0 +1,1419 @@ ++/* ++ * linux/drivers/mmc/s3cmci.h - Samsung S3C MCI driver ++ * ++ * Copyright (C) 2004-2006 maintech GmbH, Thomas Kleffel ++ * Copyright (C) 2007 Harald Welte ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include "s3cmci.h" ++ ++#define DRIVER_NAME "s3c-mci" ++ ++enum dbg_channels { ++ dbg_err = (1 << 0), ++ dbg_debug = (1 << 1), ++ dbg_info = (1 << 2), ++ dbg_irq = (1 << 3), ++ dbg_sg = (1 << 4), ++ dbg_dma = (1 << 5), ++ dbg_pio = (1 << 6), ++ dbg_fail = (1 << 7), ++ dbg_conf = (1 << 8), ++}; ++ ++static const int dbgmap_err = dbg_err | dbg_fail; ++static const int dbgmap_info = dbg_info | dbg_conf; ++static const int dbgmap_debug = dbg_debug; ++ ++#define dbg(host, channels, args...) \ ++ do { \ ++ if (dbgmap_err & channels) \ ++ dev_err(&host->pdev->dev, args); \ ++ else if (dbgmap_info & channels) \ ++ dev_info(&host->pdev->dev, args);\ ++ else if (dbgmap_debug & channels) \ ++ dev_dbg(&host->pdev->dev, args); \ ++ } while (0) ++ ++#define RESSIZE(ressource) (((ressource)->end - (ressource)->start)+1) ++ ++static struct s3c2410_dma_client s3cmci_dma_client = { ++ .name = "s3c-mci", ++}; ++ ++static void finalize_request(struct s3cmci_host *host); ++static void s3cmci_send_request(struct mmc_host *mmc); ++static void s3cmci_reset(struct s3cmci_host *host); ++ ++#ifdef CONFIG_MMC_DEBUG ++static inline void dbg_dumpregs(struct s3cmci_host *host, char *prefix) ++{ ++ u32 con, pre, cmdarg, cmdcon, cmdsta, r0, r1, r2, r3, timer, bsize; ++ u32 datcon, datcnt, datsta, fsta, imask; ++ ++ con = readl(host->base + S3C2410_SDICON); ++ pre = readl(host->base + S3C2410_SDIPRE); ++ cmdarg = readl(host->base + S3C2410_SDICMDARG); ++ cmdcon = readl(host->base + S3C2410_SDICMDCON); ++ cmdsta = readl(host->base + S3C2410_SDICMDSTAT); ++ r0 = readl(host->base + S3C2410_SDIRSP0); ++ r1 = readl(host->base + S3C2410_SDIRSP1); ++ r2 = readl(host->base + S3C2410_SDIRSP2); ++ r3 = readl(host->base + S3C2410_SDIRSP3); ++ timer = readl(host->base + S3C2410_SDITIMER); ++ bsize = readl(host->base + S3C2410_SDIBSIZE); ++ datcon = readl(host->base + S3C2410_SDIDCON); ++ datcnt = readl(host->base + S3C2410_SDIDCNT); ++ datsta = readl(host->base + S3C2410_SDIDSTA); ++ fsta = readl(host->base + S3C2410_SDIFSTA); ++ imask = readl(host->base + host->sdiimsk); ++ ++ dbg(host, dbg_debug, "%s CON:[%08x] PRE:[%08x] TMR:[%08x]\n", ++ prefix, con, pre, timer); ++ ++ dbg(host, dbg_debug, "%s CCON:[%08x] CARG:[%08x] CSTA:[%08x]\n", ++ prefix, cmdcon, cmdarg, cmdsta); ++ ++ dbg(host, dbg_debug, "%s DCON:[%08x] FSTA:[%08x]" ++ " DSTA:[%08x] DCNT:[%08x]\n", ++ prefix, datcon, fsta, datsta, datcnt); ++ ++ dbg(host, dbg_debug, "%s R0:[%08x] R1:[%08x]" ++ " R2:[%08x] R3:[%08x]\n", ++ prefix, r0, r1, r2, r3); ++} ++ ++static void prepare_dbgmsg(struct s3cmci_host *host, struct mmc_command *cmd, ++ int stop) ++{ ++ snprintf(host->dbgmsg_cmd, 300, ++ "#%u%s op:CMD%d arg:0x%08x flags:0x08%x retries:%u", ++ host->ccnt, (stop?" (STOP)":""), cmd->opcode, ++ cmd->arg, cmd->flags, cmd->retries); ++ ++ if (cmd->data) { ++ snprintf(host->dbgmsg_dat, 300, ++ "#%u bsize:%u blocks:%u bytes:%u", ++ host->dcnt, cmd->data->blksz, ++ cmd->data->blocks, ++ cmd->data->blocks * cmd->data->blksz); ++ } else { ++ host->dbgmsg_dat[0] = '\0'; ++ } ++} ++ ++static void dbg_dumpcmd(struct s3cmci_host *host, struct mmc_command *cmd, ++ int fail) ++{ ++ unsigned int dbglvl = fail?dbg_fail:dbg_debug; ++ ++ if (!cmd) ++ return; ++ ++ if (cmd->error == 0) ++ dbg(host, dbglvl, "CMD[OK] %s R0:0x%08x\n", ++ host->dbgmsg_cmd, cmd->resp[0]); ++ else ++ dbg(host, dbglvl, "CMD[FAIL(%d)] %s Status:%s\n", ++ cmd->error, host->dbgmsg_cmd, host->status); ++ ++ if (!cmd->data) ++ return; ++ ++ if (cmd->data->error == 0) ++ dbg(host, dbglvl, "DAT[OK] %s\n", host->dbgmsg_dat); ++ else ++ dbg(host, dbglvl, "DAT[FAIL(%d)] %s DCNT:0x%08x\n", ++ cmd->data->error, host->dbgmsg_dat, ++ readl(host->base + S3C2410_SDIDCNT)); ++} ++#endif /* CONFIG_MMC_DEBUG */ ++ ++static inline u32 enable_imask(struct s3cmci_host *host, u32 imask) ++{ ++ u32 newmask; ++ ++ newmask = readl(host->base + host->sdiimsk); ++ newmask |= imask; ++ ++ writel(newmask, host->base + host->sdiimsk); ++ ++ return newmask; ++} ++ ++static inline u32 disable_imask(struct s3cmci_host *host, u32 imask) ++{ ++ u32 newmask; ++ ++ newmask = readl(host->base + host->sdiimsk); ++ newmask &= ~imask; ++ ++ writel(newmask, host->base + host->sdiimsk); ++ ++ return newmask; ++} ++ ++static inline void clear_imask(struct s3cmci_host *host) ++{ ++ writel(0, host->base + host->sdiimsk); ++} ++ ++static inline int get_data_buffer(struct s3cmci_host *host, ++ u32 *bytes, u8 **pointer) ++{ ++ struct scatterlist *sg; ++ ++ if (host->pio_active == XFER_NONE) ++ return -EINVAL; ++ ++ if ((!host->mrq) || (!host->mrq->data)) ++ return -EINVAL; ++ ++ if (host->pio_sgptr >= host->mrq->data->sg_len) { ++ dbg(host, dbg_debug, "no more buffers (%i/%i)\n", ++ host->pio_sgptr, host->mrq->data->sg_len); ++ return -EBUSY; ++ } ++ sg = &host->mrq->data->sg[host->pio_sgptr]; ++ ++ *bytes = sg->length; ++ *pointer = page_address(sg_page(sg)) + sg->offset; ++ ++ host->pio_sgptr++; ++ ++ dbg(host, dbg_sg, "new buffer (%i/%i)\n", ++ host->pio_sgptr, host->mrq->data->sg_len); ++ ++ return 0; ++} ++ ++#define FIFO_FILL(host) (readl(host->base + S3C2410_SDIFSTA) & \ ++ S3C2410_SDIFSTA_COUNTMASK) ++#define FIFO_FREE(host) (63 - (readl(host->base + S3C2410_SDIFSTA) \ ++ & S3C2410_SDIFSTA_COUNTMASK)) ++ ++static inline void do_pio_read(struct s3cmci_host *host) ++{ ++ int res; ++ int fifo; ++ void __iomem *from_ptr; ++ ++ /* write real prescaler to host, it might be set slow to fix */ ++ writel(host->prescaler, host->base + S3C2410_SDIPRE); ++ ++ from_ptr = host->base + host->sdidata; ++ ++ while ((fifo = FIFO_FILL(host))) { ++ if (!host->pio_bytes) { ++ res = get_data_buffer(host, &host->pio_bytes, ++ &host->pio_ptr); ++ if (res) { ++ host->pio_active = XFER_NONE; ++ host->complete_what = COMPLETION_FINALIZE; ++ ++ dbg(host, dbg_pio, "pio_read(): " ++ "complete (no more data).\n"); ++ return; ++ } ++ ++ dbg(host, dbg_pio, "pio_read(): new target: " ++ "[%i]@[%p]\n", host->pio_bytes, host->pio_ptr); ++ } ++ ++ dbg(host, dbg_pio, "pio_read(): fifo:[%02i] " ++ "buffer:[%03i] dcnt:[%08X]\n", fifo, host->pio_bytes, ++ readl(host->base + S3C2410_SDIDCNT)); ++ ++ if (fifo > host->pio_bytes) ++ fifo = host->pio_bytes; ++ ++ host->pio_bytes -= fifo; ++ host->pio_count += fifo; ++ ++ /* we might have an unaligned start of data */ ++ while (((unsigned long)host->pio_ptr & 0x03) && fifo) { ++ *(host->pio_ptr++) = readb(host->base + host->sdidata_b); ++ fifo--; ++ } ++ ++ /* and a major chunk of data in the middle */ ++ for (; fifo >= 4; fifo -=4) { ++ *(u32 *) host->pio_ptr = readl(from_ptr); ++ host->pio_ptr+= 4; ++ } ++ ++ /* as well as some non-modulo-four trailer */ ++ while (fifo) { ++ *(host->pio_ptr++) = readb(host->base + host->sdidata_b); ++ fifo--; ++ } ++ } ++ ++ if (!host->pio_bytes) { ++ res = get_data_buffer(host, &host->pio_bytes, &host->pio_ptr); ++ if (res) { ++ dbg(host, dbg_pio, "pio_read(): " ++ "complete (no more buffers).\n"); ++ host->pio_active = XFER_NONE; ++ host->complete_what = COMPLETION_FINALIZE; ++ ++ return; ++ } ++ } ++ ++ enable_imask(host, S3C2410_SDIIMSK_RXFIFOHALF ++ | S3C2410_SDIIMSK_RXFIFOLAST); ++} ++ ++static inline void do_pio_write(struct s3cmci_host *host) ++{ ++ int res; ++ int fifo; ++ ++ void __iomem *to_ptr; ++ ++ to_ptr = host->base + host->sdidata; ++ ++ while ((fifo = FIFO_FREE(host))) { ++ if (!host->pio_bytes) { ++ res = get_data_buffer(host, &host->pio_bytes, ++ &host->pio_ptr); ++ if (res) { ++ dbg(host, dbg_pio, "pio_write(): " ++ "complete (no more data).\n"); ++ host->pio_active = XFER_NONE; ++ ++ return; ++ } ++ ++ dbg(host, dbg_pio, "pio_write(): " ++ "new source: [%i]@[%p]\n", ++ host->pio_bytes, host->pio_ptr); ++ ++ } ++ ++ if (fifo > host->pio_bytes) ++ fifo = host->pio_bytes; ++ ++ host->pio_bytes -= fifo; ++ host->pio_count += fifo; ++ ++ /* we might have an unaligned start of data */ ++ while (((unsigned long)host->pio_ptr & 0x03) && fifo) { ++ writeb(*(host->pio_ptr++), host->base + host->sdidata_b); ++ fifo--; ++ } ++ ++ /* and a major chunk of data in the middle */ ++ for (; fifo >= 4; fifo -=4) { ++ writel(*(u32 *) host->pio_ptr, to_ptr); ++ host->pio_ptr += 4; ++ } ++ ++ /* as well as some non-modulo-four trailer */ ++ while (fifo) { ++ writeb(*(host->pio_ptr++), host->base + host->sdidata_b); ++ fifo--; ++ } ++ } ++ ++ enable_imask(host, S3C2410_SDIIMSK_TXFIFOHALF); ++} ++ ++static void pio_tasklet(unsigned long data) ++{ ++ struct s3cmci_host *host = (struct s3cmci_host *) data; ++ ++ disable_irq(host->irq); ++ ++ if (host->pio_active == XFER_WRITE) ++ do_pio_write(host); ++ ++ if (host->pio_active == XFER_READ) ++ do_pio_read(host); ++ ++ if (host->complete_what == COMPLETION_FINALIZE) { ++ clear_imask(host); ++ if (host->pio_active != XFER_NONE) { ++ dbg(host, dbg_err, "unfinished %s " ++ "- pio_count:[%u] pio_bytes:[%u]\n", ++ (host->pio_active == XFER_READ)?"read":"write", ++ host->pio_count, host->pio_bytes); ++ ++ host->mrq->data->error = -EIO; ++ } ++ ++ finalize_request(host); ++ } else ++ enable_irq(host->irq); ++} ++ ++/* ++ * ISR for SDI Interface IRQ ++ * Communication between driver and ISR works as follows: ++ * host->mrq points to current request ++ * host->complete_what tells ISR when the request is considered done ++ * COMPLETION_CMDSENT when the command was sent ++ * COMPLETION_RSPFIN when a response was received ++ * COMPLETION_XFERFINISH when the data transfer is finished ++ * COMPLETION_XFERFINISH_RSPFIN both of the above. ++ * host->complete_request is the completion-object the driver waits for ++ * ++ * 1) Driver sets up host->mrq and host->complete_what ++ * 2) Driver prepares the transfer ++ * 3) Driver enables interrupts ++ * 4) Driver starts transfer ++ * 5) Driver waits for host->complete_rquest ++ * 6) ISR checks for request status (errors and success) ++ * 6) ISR sets host->mrq->cmd->error and host->mrq->data->error ++ * 7) ISR completes host->complete_request ++ * 8) ISR disables interrupts ++ * 9) Driver wakes up and takes care of the request ++ * ++ * Note: "->error"-fields are expected to be set to 0 before the request ++ * was issued by mmc.c - therefore they are only set, when an error ++ * contition comes up ++ */ ++ ++static irqreturn_t s3cmci_irq(int irq, void *dev_id) ++{ ++ struct s3cmci_host *host; ++ struct mmc_command *cmd; ++ u32 mci_csta, mci_dsta, mci_fsta, mci_dcnt, mci_imsk; ++ u32 mci_cclear, mci_dclear; ++ unsigned long iflags; ++ int cardint = 0; ++ ++ host = (struct s3cmci_host *)dev_id; ++ ++ spin_lock_irqsave(&host->complete_lock, iflags); ++ ++ mci_csta = readl(host->base + S3C2410_SDICMDSTAT); ++ mci_dsta = readl(host->base + S3C2410_SDIDSTA); ++ mci_dcnt = readl(host->base + S3C2410_SDIDCNT); ++ mci_fsta = readl(host->base + S3C2410_SDIFSTA); ++ mci_imsk = readl(host->base + host->sdiimsk); ++ mci_cclear = 0; ++ mci_dclear = 0; ++ ++ if ((host->complete_what == COMPLETION_NONE) || ++ (host->complete_what == COMPLETION_FINALIZE)) { ++ host->status = "nothing to complete"; ++ clear_imask(host); ++ goto irq_out; ++ } ++ ++ if (!host->mrq) { ++ host->status = "no active mrq"; ++ clear_imask(host); ++ goto irq_out; ++ } ++ ++ cmd = host->cmd_is_stop?host->mrq->stop:host->mrq->cmd; ++ ++ if (!cmd) { ++ host->status = "no active cmd"; ++ clear_imask(host); ++ goto irq_out; ++ } ++ ++ if (!host->dodma) { ++ if ((host->pio_active == XFER_WRITE) && ++ (mci_fsta & S3C2410_SDIFSTA_TFDET)) { ++ ++ disable_imask(host, S3C2410_SDIIMSK_TXFIFOHALF); ++ tasklet_schedule(&host->pio_tasklet); ++ host->status = "pio tx"; ++ } ++ ++ if ((host->pio_active == XFER_READ) && ++ (mci_fsta & S3C2410_SDIFSTA_RFDET)) { ++ ++ disable_imask(host, S3C2410_SDIIMSK_RXFIFOHALF | ++ S3C2410_SDIIMSK_RXFIFOLAST); ++ ++ tasklet_schedule(&host->pio_tasklet); ++ host->status = "pio rx"; ++ } ++ } ++ ++ if (mci_csta & S3C2410_SDICMDSTAT_CMDTIMEOUT) { ++ cmd->error = -ETIMEDOUT; ++ host->status = "error: command timeout"; ++ goto fail_transfer; ++ } ++ ++ if (mci_csta & S3C2410_SDICMDSTAT_CMDSENT) { ++ if (host->complete_what == COMPLETION_CMDSENT) { ++ host->status = "ok: command sent"; ++ goto close_transfer; ++ } ++ ++ mci_cclear |= S3C2410_SDICMDSTAT_CMDSENT; ++ } ++ ++ if (mci_csta & S3C2410_SDICMDSTAT_CRCFAIL) { ++ if (cmd->flags & MMC_RSP_CRC) { ++ if (host->mrq->cmd->flags & MMC_RSP_136) { ++ dbg(host, dbg_irq, "fixup for chip bug: " ++ "ignore CRC fail with long rsp\n"); ++ } else { ++ cmd->error = -EILSEQ; ++ host->status = "error: bad command crc"; ++ goto fail_transfer; ++ } ++ } ++ ++ mci_cclear |= S3C2410_SDICMDSTAT_CRCFAIL; ++ } ++ ++ if (mci_csta & S3C2410_SDICMDSTAT_RSPFIN) { ++ if (host->complete_what == COMPLETION_RSPFIN) { ++ host->status = "ok: command response received"; ++ goto close_transfer; ++ } ++ ++ if (host->complete_what == COMPLETION_XFERFINISH_RSPFIN) ++ host->complete_what = COMPLETION_XFERFINISH; ++ ++ mci_cclear |= S3C2410_SDICMDSTAT_RSPFIN; ++ } ++ ++ /* errors handled after this point are only relevant ++ when a data transfer is in progress */ ++ ++ if (!cmd->data) ++ goto clear_status_bits; ++ ++ /* Check for FIFO failure */ ++ if (host->is2440) { ++ if (mci_fsta & S3C2440_SDIFSTA_FIFOFAIL) { ++ host->mrq->data->error = -EIO; ++ host->status = "error: 2440 fifo failure"; ++ goto fail_transfer; ++ } ++ } else { ++ if (mci_dsta & S3C2410_SDIDSTA_FIFOFAIL) { ++ cmd->data->error = -EIO; ++ host->status = "error: fifo failure"; ++ goto fail_transfer; ++ } ++ } ++ ++ if (mci_dsta & S3C2410_SDIDSTA_RXCRCFAIL) { ++ cmd->data->error = -EILSEQ; ++ host->status = "error: bad data crc (outgoing)"; ++ goto fail_transfer; ++ } ++ ++ if (mci_dsta & S3C2410_SDIDSTA_CRCFAIL) { ++ cmd->data->error = -EIO; ++ host->status = "error: bad data crc (incoming)"; ++ goto fail_transfer; ++ } ++ ++ if (mci_dsta & S3C2410_SDIDSTA_DATATIMEOUT) { ++ cmd->data->error = -ETIMEDOUT; ++ host->status = "error: data timeout"; ++ goto fail_transfer; ++ } ++ ++ if (mci_dsta & S3C2410_SDIDSTA_XFERFINISH) { ++ if (host->complete_what == COMPLETION_XFERFINISH) { ++ host->status = "ok: data transfer completed"; ++ goto close_transfer; ++ } ++ ++ if (host->complete_what == COMPLETION_XFERFINISH_RSPFIN) ++ host->complete_what = COMPLETION_RSPFIN; ++ ++ mci_dclear |= S3C2410_SDIDSTA_XFERFINISH; ++ } ++ ++ if (mci_dsta & S3C2410_SDIDSTA_SDIOIRQDETECT) { ++ cardint = 1; ++ mci_dclear |= S3C2410_SDIDSTA_SDIOIRQDETECT; ++ } ++ ++clear_status_bits: ++ writel(mci_cclear, host->base + S3C2410_SDICMDSTAT); ++ writel(mci_dclear, host->base + S3C2410_SDIDSTA); ++ ++ goto irq_out; ++ ++fail_transfer: ++ host->pio_active = XFER_NONE; ++ ++close_transfer: ++ host->complete_what = COMPLETION_FINALIZE; ++ ++ clear_imask(host); ++ tasklet_schedule(&host->pio_tasklet); ++ ++ goto irq_out; ++ ++irq_out: ++ dbg(host, dbg_irq, "csta:0x%08x dsta:0x%08x " ++ "fsta:0x%08x dcnt:0x%08x status:%s.\n", ++ mci_csta, mci_dsta, mci_fsta, ++ mci_dcnt, host->status); ++ ++ spin_unlock_irqrestore(&host->complete_lock, iflags); ++ ++ /* We have to delay this as it calls back into the driver */ ++ if (cardint) ++ mmc_signal_sdio_irq(host->mmc); ++ ++ return IRQ_HANDLED; ++ ++} ++ ++/* ++ * ISR for the CardDetect Pin ++*/ ++ ++static irqreturn_t s3cmci_irq_cd(int irq, void *dev_id) ++{ ++ struct s3cmci_host *host = (struct s3cmci_host *)dev_id; ++ ++ dbg(host, dbg_irq, "card detect\n"); ++ ++ mmc_detect_change(host->mmc, 500); ++ ++ return IRQ_HANDLED; ++} ++ ++void s3cmci_dma_done_callback(struct s3c2410_dma_chan *dma_ch, void *buf_id, ++ int size, enum s3c2410_dma_buffresult result) ++{ ++ unsigned long iflags; ++ u32 mci_csta, mci_dsta, mci_fsta, mci_dcnt; ++ struct s3cmci_host *host = (struct s3cmci_host *)buf_id; ++ ++ mci_csta = readl(host->base + S3C2410_SDICMDSTAT); ++ mci_dsta = readl(host->base + S3C2410_SDIDSTA); ++ mci_fsta = readl(host->base + S3C2410_SDIFSTA); ++ mci_dcnt = readl(host->base + S3C2410_SDIDCNT); ++ ++ if ((!host->mrq) || (!host->mrq) || (!host->mrq->data)) ++ return; ++ ++ if (!host->dmatogo) ++ return; ++ ++ spin_lock_irqsave(&host->complete_lock, iflags); ++ ++ if (result != S3C2410_RES_OK) { ++ dbg(host, dbg_fail, "DMA FAILED: csta=0x%08x dsta=0x%08x " ++ "fsta=0x%08x dcnt:0x%08x result:0x%08x toGo:%u\n", ++ mci_csta, mci_dsta, mci_fsta, ++ mci_dcnt, result, host->dmatogo); ++ ++ goto fail_request; ++ } ++ ++ host->dmatogo--; ++ if (host->dmatogo) { ++ dbg(host, dbg_dma, "DMA DONE Size:%i DSTA:[%08x] " ++ "DCNT:[%08x] toGo:%u\n", ++ size, mci_dsta, mci_dcnt, host->dmatogo); ++ ++ goto out; ++ } ++ ++ dbg(host, dbg_dma, "DMA FINISHED Size:%i DSTA:%08x DCNT:%08x\n", ++ size, mci_dsta, mci_dcnt); ++ ++ host->complete_what = COMPLETION_FINALIZE; ++ ++out: ++ tasklet_schedule(&host->pio_tasklet); ++ spin_unlock_irqrestore(&host->complete_lock, iflags); ++ return; ++ ++ ++fail_request: ++ host->mrq->data->error = -EIO; ++ host->complete_what = COMPLETION_FINALIZE; ++ writel(0, host->base + host->sdiimsk); ++ goto out; ++ ++} ++ ++static void finalize_request(struct s3cmci_host *host) ++{ ++ struct mmc_request *mrq = host->mrq; ++ struct mmc_command *cmd = host->cmd_is_stop?mrq->stop:mrq->cmd; ++ int debug_as_failure = 0; ++ ++ if (host->complete_what != COMPLETION_FINALIZE) ++ return; ++ ++ if (!mrq) ++ return; ++ ++ if (cmd->data && (cmd->error == 0) && ++ (cmd->data->error == 0)) { ++ ++ if (host->dodma && (!host->dma_complete)) { ++ dbg(host, dbg_dma, "DMA Missing!\n"); ++ return; ++ } ++ } ++ ++ /* Read response */ ++ cmd->resp[0] = readl(host->base + S3C2410_SDIRSP0); ++ cmd->resp[1] = readl(host->base + S3C2410_SDIRSP1); ++ cmd->resp[2] = readl(host->base + S3C2410_SDIRSP2); ++ cmd->resp[3] = readl(host->base + S3C2410_SDIRSP3); ++ ++ /* reset clock speed, as it could still be set low for */ ++ writel(host->prescaler, host->base + S3C2410_SDIPRE); ++ ++ if (cmd->error) ++ debug_as_failure = 1; ++ ++ if (cmd->data && cmd->data->error) ++ debug_as_failure = 1; ++ ++#ifdef CONFIG_MMC_DEBUG ++ dbg_dumpcmd(host, cmd, debug_as_failure); ++#endif ++ /* Cleanup controller */ ++ writel(0, host->base + S3C2410_SDICMDARG); ++ writel(S3C2410_SDIDCON_STOP, host->base + S3C2410_SDIDCON); ++ writel(0, host->base + S3C2410_SDICMDCON); ++ writel(0, host->base + host->sdiimsk); ++ ++ if (cmd->data && cmd->error) ++ cmd->data->error = cmd->error; ++ ++ if (cmd->data && cmd->data->stop && (!host->cmd_is_stop)) { ++ host->cmd_is_stop = 1; ++ s3cmci_send_request(host->mmc); ++ return; ++ } ++ ++ /* If we have no data transfer we are finished here */ ++ if (!mrq->data) ++ goto request_done; ++ ++ /* Calulate the amout of bytes transfer, but only if there was ++ * no error */ ++ if (mrq->data->error == 0) ++ mrq->data->bytes_xfered = ++ (mrq->data->blocks * mrq->data->blksz); ++ else ++ mrq->data->bytes_xfered = 0; ++ ++ /* If we had an error while transfering data we flush the ++ * DMA channel and the fifo to clear out any garbage */ ++ if (mrq->data->error) { ++ if (host->dodma) ++ s3c2410_dma_ctrl(host->dma, S3C2410_DMAOP_FLUSH); ++ ++ if (host->is2440) { ++ /* Clear failure register and reset fifo */ ++ writel(S3C2440_SDIFSTA_FIFORESET | ++ S3C2440_SDIFSTA_FIFOFAIL, ++ host->base + S3C2410_SDIFSTA); ++ } else { ++ u32 mci_con; ++ ++ /* reset fifo */ ++ mci_con = readl(host->base + S3C2410_SDICON); ++ mci_con |= S3C2410_SDICON_FIFORESET; ++ ++ writel(mci_con, host->base + S3C2410_SDICON); ++ } ++ } ++ ++request_done: ++ host->complete_what = COMPLETION_NONE; ++ host->mrq = NULL; ++ mmc_request_done(host->mmc, mrq); ++} ++ ++ ++void s3cmci_dma_setup(struct s3cmci_host *host, enum s3c2410_dmasrc source) ++{ ++ static int setup_ok; ++ static enum s3c2410_dmasrc last_source = -1; ++ ++ if (last_source == source) ++ return; ++ ++ last_source = source; ++ ++ s3c2410_dma_devconfig(host->dma, source, 3, ++ host->mem->start + host->sdidata); ++ ++ if (!setup_ok) { ++ s3c2410_dma_config(host->dma, 4, ++ (S3C2410_DCON_HWTRIG | S3C2410_DCON_CH0_SDI)); ++ s3c2410_dma_set_buffdone_fn(host->dma, ++ s3cmci_dma_done_callback); ++ s3c2410_dma_setflags(host->dma, S3C2410_DMAF_AUTOSTART); ++ setup_ok = 1; ++ } ++} ++ ++static void s3cmci_send_command(struct s3cmci_host *host, ++ struct mmc_command *cmd) ++{ ++ u32 ccon, imsk; ++ ++ imsk = S3C2410_SDIIMSK_CRCSTATUS | S3C2410_SDIIMSK_CMDTIMEOUT | ++ S3C2410_SDIIMSK_RESPONSEND | S3C2410_SDIIMSK_CMDSENT | ++ S3C2410_SDIIMSK_RESPONSECRC; ++ ++ enable_imask(host, imsk); ++ ++ if (cmd->data) ++ host->complete_what = COMPLETION_XFERFINISH_RSPFIN; ++ else if (cmd->flags & MMC_RSP_PRESENT) ++ host->complete_what = COMPLETION_RSPFIN; ++ else ++ host->complete_what = COMPLETION_CMDSENT; ++ ++ writel(cmd->arg, host->base + S3C2410_SDICMDARG); ++ ++ ccon = cmd->opcode & S3C2410_SDICMDCON_INDEX; ++ ccon |= S3C2410_SDICMDCON_SENDERHOST | S3C2410_SDICMDCON_CMDSTART; ++ ++ if (cmd->flags & MMC_RSP_PRESENT) ++ ccon |= S3C2410_SDICMDCON_WAITRSP; ++ ++ if (cmd->flags & MMC_RSP_136) ++ ccon |= S3C2410_SDICMDCON_LONGRSP; ++ ++ writel(ccon, host->base + S3C2410_SDICMDCON); ++} ++ ++static int s3cmci_setup_data(struct s3cmci_host *host, struct mmc_data *data) ++{ ++ u32 dcon, imsk, stoptries = 3; ++ ++ /* write DCON register */ ++ ++ if (!data) { ++ writel(0, host->base + S3C2410_SDIDCON); ++ return 0; ++ } ++ ++ while (readl(host->base + S3C2410_SDIDSTA) & ++ (S3C2410_SDIDSTA_TXDATAON | S3C2410_SDIDSTA_RXDATAON)) { ++ ++ dbg(host, dbg_err, ++ "mci_setup_data() transfer stillin progress.\n"); ++ ++ writel(S3C2410_SDIDCON_STOP, host->base + S3C2410_SDIDCON); ++ s3cmci_reset(host); ++ ++ if (0 == (stoptries--)) { ++#ifdef CONFIG_MMC_DEBUG ++ dbg_dumpregs(host, "DRF"); ++#endif ++ ++ return -EINVAL; ++ } ++ } ++ ++ dcon = data->blocks & S3C2410_SDIDCON_BLKNUM_MASK; ++ ++ if (host->dodma) ++ dcon |= S3C2410_SDIDCON_DMAEN; ++ ++ if (host->bus_width == MMC_BUS_WIDTH_4) ++ dcon |= S3C2410_SDIDCON_WIDEBUS; ++ ++ if (!(data->flags & MMC_DATA_STREAM)) ++ dcon |= S3C2410_SDIDCON_BLOCKMODE; ++ ++ if (data->flags & MMC_DATA_WRITE) { ++ dcon |= S3C2410_SDIDCON_TXAFTERRESP; ++ dcon |= S3C2410_SDIDCON_XFER_TXSTART; ++ } ++ ++ if (data->flags & MMC_DATA_READ) { ++ dcon |= S3C2410_SDIDCON_RXAFTERCMD; ++ dcon |= S3C2410_SDIDCON_XFER_RXSTART; ++ } ++ ++ if (host->is2440) { ++ dcon |= S3C2440_SDIDCON_DS_WORD; ++ dcon |= S3C2440_SDIDCON_DATSTART; ++ } ++ ++ writel(dcon, host->base + S3C2410_SDIDCON); ++ ++ /* write BSIZE register */ ++ ++ writel(data->blksz, host->base + S3C2410_SDIBSIZE); ++ ++ /* add to IMASK register */ ++ imsk = S3C2410_SDIIMSK_FIFOFAIL | S3C2410_SDIIMSK_DATACRC | ++ S3C2410_SDIIMSK_DATATIMEOUT | S3C2410_SDIIMSK_DATAFINISH; ++ ++ enable_imask(host, imsk); ++ ++ /* write TIMER register */ ++ ++ if (host->is2440) { ++ writel(0x007FFFFF, host->base + S3C2410_SDITIMER); ++ } else { ++ writel(0x0000FFFF, host->base + S3C2410_SDITIMER); ++ ++ /* FIX: set slow clock to prevent timeouts on read */ ++ if (data->flags & MMC_DATA_READ) ++ writel(0xFF, host->base + S3C2410_SDIPRE); ++ } ++ ++ return 0; ++} ++ ++static int s3cmci_prepare_pio(struct s3cmci_host *host, struct mmc_data *data) ++{ ++ int rw = (data->flags & MMC_DATA_WRITE)?1:0; ++ ++ if (rw != ((data->flags & MMC_DATA_READ)?0:1)) ++ return -EINVAL; ++ ++ host->pio_sgptr = 0; ++ host->pio_bytes = 0; ++ host->pio_count = 0; ++ host->pio_active = rw?XFER_WRITE:XFER_READ; ++ ++ if (rw) { ++ do_pio_write(host); ++ enable_imask(host, S3C2410_SDIIMSK_TXFIFOHALF); ++ } else { ++ enable_imask(host, S3C2410_SDIIMSK_RXFIFOHALF ++ | S3C2410_SDIIMSK_RXFIFOLAST); ++ } ++ ++ return 0; ++} ++ ++static int s3cmci_prepare_dma(struct s3cmci_host *host, struct mmc_data *data) ++{ ++ int dma_len, i; ++ ++ int rw = (data->flags & MMC_DATA_WRITE)?1:0; ++ ++ if (rw != ((data->flags & MMC_DATA_READ)?0:1)) ++ return -EINVAL; ++ ++ s3cmci_dma_setup(host, rw?S3C2410_DMASRC_MEM:S3C2410_DMASRC_HW); ++ s3c2410_dma_ctrl(host->dma, S3C2410_DMAOP_FLUSH); ++ ++ dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len, ++ (rw)?DMA_TO_DEVICE:DMA_FROM_DEVICE); ++ ++ ++ if (dma_len == 0) ++ return -ENOMEM; ++ ++ host->dma_complete = 0; ++ host->dmatogo = dma_len; ++ ++ for (i = 0; i < dma_len; i++) { ++ int res; ++ ++ dbg(host, dbg_dma, "enqueue %i:%u@%u\n", i, ++ sg_dma_address(&data->sg[i]), ++ sg_dma_len(&data->sg[i])); ++ ++ res = s3c2410_dma_enqueue(host->dma, (void *) host, ++ sg_dma_address(&data->sg[i]), ++ sg_dma_len(&data->sg[i])); ++ ++ if (res) { ++ s3c2410_dma_ctrl(host->dma, S3C2410_DMAOP_FLUSH); ++ return -EBUSY; ++ } ++ } ++ ++ s3c2410_dma_ctrl(host->dma, S3C2410_DMAOP_START); ++ ++ return 0; ++} ++ ++static void s3cmci_send_request(struct mmc_host *mmc) ++{ ++ struct s3cmci_host *host = mmc_priv(mmc); ++ struct mmc_request *mrq = host->mrq; ++ struct mmc_command *cmd = host->cmd_is_stop?mrq->stop:mrq->cmd; ++ ++ host->ccnt++; ++#ifdef CONFIG_MMC_DEBUG ++ prepare_dbgmsg(host, cmd, host->cmd_is_stop); ++#endif ++ /* clear command, data and fifo status registers; ++ * Fifo clear only necessary on 2440, but doesn't hurt on 2410 */ ++ writel(0xFFFFFFFF, host->base + S3C2410_SDICMDSTAT); ++ writel(0xFFFFFFFF, host->base + S3C2410_SDIDSTA); ++ writel(0xFFFFFFFF, host->base + S3C2410_SDIFSTA); ++ ++ if (cmd->data) { ++ int res; ++ res = s3cmci_setup_data(host, cmd->data); ++ ++ host->dcnt++; ++ ++ if (res) { ++ cmd->error = -EIO; ++ cmd->data->error = -EIO; ++ ++ mmc_request_done(mmc, mrq); ++ return; ++ } ++ ++ ++ if (host->dodma) ++ res = s3cmci_prepare_dma(host, cmd->data); ++ else ++ res = s3cmci_prepare_pio(host, cmd->data); ++ ++ if (res) { ++ cmd->error = -EIO; ++ cmd->data->error = -EIO; ++ ++ mmc_request_done(mmc, mrq); ++ return; ++ } ++ ++ } ++ ++ s3cmci_send_command(host, cmd); ++ enable_irq(host->irq); ++} ++ ++static void s3cmci_request(struct mmc_host *mmc, struct mmc_request *mrq) ++{ ++ struct s3cmci_host *host = mmc_priv(mmc); ++ ++ host->cmd_is_stop = 0; ++ host->mrq = mrq; ++ ++ s3cmci_send_request(mmc); ++} ++ ++static void s3cmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) ++{ ++ struct s3cmci_host *host = mmc_priv(mmc); ++ u32 mci_psc, mci_con; ++ ++ /* Set power */ ++ mci_con = readl(host->base + S3C2410_SDICON); ++ switch (ios->power_mode) { ++ case MMC_POWER_ON: ++ case MMC_POWER_UP: ++ s3c2410_gpio_cfgpin(S3C2410_GPE5, S3C2410_GPE5_SDCLK); ++ s3c2410_gpio_cfgpin(S3C2410_GPE6, S3C2410_GPE6_SDCMD); ++ s3c2410_gpio_cfgpin(S3C2410_GPE7, S3C2410_GPE7_SDDAT0); ++ s3c2410_gpio_cfgpin(S3C2410_GPE8, S3C2410_GPE8_SDDAT1); ++ s3c2410_gpio_cfgpin(S3C2410_GPE9, S3C2410_GPE9_SDDAT2); ++ s3c2410_gpio_cfgpin(S3C2410_GPE10, S3C2410_GPE10_SDDAT3); ++ ++ if (host->pdata->set_power) ++ host->pdata->set_power(ios->power_mode, ios->vdd); ++ ++ if (!host->is2440) ++ mci_con |= S3C2410_SDICON_FIFORESET; ++ ++ break; ++ ++ case MMC_POWER_OFF: ++ default: ++ s3c2410_gpio_setpin(S3C2410_GPE5, 0); ++ s3c2410_gpio_cfgpin(S3C2410_GPE5, S3C2410_GPE5_OUTP); ++ ++ if (host->pdata->set_power) ++ host->pdata->set_power(ios->power_mode, ios->vdd); ++ ++ if (host->is2440) ++ mci_con |= S3C2440_SDICON_SDRESET; ++ ++ break; ++ } ++ ++ /* Set clock */ ++ for (mci_psc = 0; mci_psc < 255; mci_psc++) { ++ host->real_rate = host->clk_rate / (host->clk_div*(mci_psc+1)); ++ ++ if (host->real_rate <= ios->clock) ++ break; ++ } ++ ++ if (mci_psc > 255) ++ mci_psc = 255; ++ host->prescaler = mci_psc; ++ ++ writel(host->prescaler, host->base + S3C2410_SDIPRE); ++ ++ /* If requested clock is 0, real_rate will be 0, too */ ++ if (ios->clock == 0) ++ host->real_rate = 0; ++ ++ /* Set CLOCK_ENABLE */ ++ if (ios->clock) ++ mci_con |= S3C2410_SDICON_CLOCKTYPE; ++ else ++ mci_con &= ~S3C2410_SDICON_CLOCKTYPE; ++ ++ writel(mci_con, host->base + S3C2410_SDICON); ++ ++ if ((ios->power_mode == MMC_POWER_ON) ++ || (ios->power_mode == MMC_POWER_UP)) { ++ ++ dbg(host, dbg_conf, "running at %lukHz (requested: %ukHz).\n", ++ host->real_rate/1000, ios->clock/1000); ++ } else { ++ dbg(host, dbg_conf, "powered down.\n"); ++ } ++ ++ host->bus_width = ios->bus_width; ++ ++} ++ ++static void s3cmci_reset(struct s3cmci_host *host) ++{ ++ u32 con = readl(host->base + S3C2410_SDICON); ++ ++ con |= S3C2440_SDICON_SDRESET; ++ ++ writel(con, host->base + S3C2410_SDICON); ++} ++ ++static int s3cmci_get_ro(struct mmc_host *mmc) ++{ ++ struct s3cmci_host *host = mmc_priv(mmc); ++ ++ if (host->pdata->gpio_wprotect == 0) ++ return 0; ++ ++ return s3c2410_gpio_getpin(host->pdata->gpio_wprotect); ++} ++ ++static void s3cmci_enable_sdio_irq(struct mmc_host *mmc, int enable) ++{ ++ struct s3cmci_host *host = mmc_priv(mmc); ++ ++ if (enable) ++ enable_imask(host, S3C2410_SDIIMSK_SDIOIRQ); ++ else ++ disable_imask(host, S3C2410_SDIIMSK_SDIOIRQ); ++} ++ ++static struct mmc_host_ops s3cmci_ops = { ++ .request = s3cmci_request, ++ .set_ios = s3cmci_set_ios, ++ .get_ro = s3cmci_get_ro, ++ .enable_sdio_irq = s3cmci_enable_sdio_irq, ++}; ++ ++static struct s3c24xx_mci_pdata s3cmci_def_pdata = { ++ .do_dma = 0, ++ .gpio_detect = 0, ++ .set_power = NULL, ++ .ocr_avail = MMC_VDD_32_33, ++}; ++ ++static int s3cmci_probe(struct platform_device *pdev, int is2440) ++{ ++ struct mmc_host *mmc; ++ struct s3cmci_host *host; ++ ++ int ret; ++ ++ mmc = mmc_alloc_host(sizeof(struct s3cmci_host), &pdev->dev); ++ if (!mmc) { ++ ret = -ENOMEM; ++ goto probe_out; ++ } ++ ++ host = mmc_priv(mmc); ++ host->mmc = mmc; ++ host->pdev = pdev; ++ ++ host->pdata = pdev->dev.platform_data; ++ if (!host->pdata) { ++ pdev->dev.platform_data = &s3cmci_def_pdata; ++ host->pdata = &s3cmci_def_pdata; ++ } ++ ++ spin_lock_init(&host->complete_lock); ++ tasklet_init(&host->pio_tasklet, pio_tasklet, (unsigned long) host); ++ if (is2440) { ++ host->is2440 = 1; ++ host->sdiimsk = S3C2440_SDIIMSK; ++ host->sdidata = S3C2440_SDIDATA; ++ host->sdidata_b = S3C2440_SDIDATA_BYTE; ++ host->clk_div = 1; ++ } else { ++ host->is2440 = 0; ++ host->sdiimsk = S3C2410_SDIIMSK; ++ host->sdidata = S3C2410_SDIDATA; ++ host->sdidata_b = S3C2410_SDIDATA_BYTE; ++ host->clk_div = 2; ++ } ++ host->dodma = host->pdata->do_dma; ++ host->complete_what = COMPLETION_NONE; ++ host->pio_active = XFER_NONE; ++ ++ host->dma = DMACH_SDI; ++ host->irq_cd = s3c2410_gpio_getirq(host->pdata->gpio_detect); ++ s3c2410_gpio_cfgpin(host->pdata->gpio_detect, S3C2410_GPIO_IRQ); ++ ++ host->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (!host->mem) { ++ dev_err(&pdev->dev, ++ "failed to get io memory region resouce.\n"); ++ ++ ret = -ENOENT; ++ goto probe_free_host; ++ } ++ ++ host->mem = request_mem_region(host->mem->start, ++ RESSIZE(host->mem), pdev->name); ++ ++ if (!host->mem) { ++ dev_err(&pdev->dev, "failed to request io memory region.\n"); ++ ret = -ENOENT; ++ goto probe_free_host; ++ } ++ ++ host->base = ioremap(host->mem->start, RESSIZE(host->mem)); ++ if (host->base == 0) { ++ dev_err(&pdev->dev, "failed to ioremap() io memory region.\n"); ++ ret = -EINVAL; ++ goto probe_free_mem_region; ++ } ++ ++ host->irq = platform_get_irq(pdev, 0); ++ if (host->irq == 0) { ++ dev_err(&pdev->dev, "failed to get interrupt resouce.\n"); ++ ret = -EINVAL; ++ goto probe_iounmap; ++ } ++ ++ if (request_irq(host->irq, s3cmci_irq, 0, DRIVER_NAME, host)) { ++ dev_err(&pdev->dev, "failed to request mci interrupt.\n"); ++ ret = -ENOENT; ++ goto probe_iounmap; ++ } ++ ++ disable_irq(host->irq); ++ ++ s3c2410_gpio_cfgpin(host->pdata->gpio_detect, S3C2410_GPIO_IRQ); ++ set_irq_type(host->irq_cd, IRQT_BOTHEDGE); ++ ++ if (request_irq(host->irq_cd, s3cmci_irq_cd, 0, DRIVER_NAME, host)) { ++ dev_err(&pdev->dev, ++ "failed to request card detect interrupt.\n"); ++ ++ ret = -ENOENT; ++ goto probe_free_irq; ++ } ++ ++ if (host->pdata->gpio_wprotect) ++ s3c2410_gpio_cfgpin(host->pdata->gpio_wprotect, ++ S3C2410_GPIO_INPUT); ++ ++ if (s3c2410_dma_request(host->dma, &s3cmci_dma_client, NULL)) { ++ dev_err(&pdev->dev, "unable to get DMA channel.\n"); ++ ret = -EBUSY; ++ goto probe_free_irq_cd; ++ } ++ ++ host->clk = clk_get(&pdev->dev, "sdi"); ++ if (IS_ERR(host->clk)) { ++ dev_err(&pdev->dev, "failed to find clock source.\n"); ++ ret = PTR_ERR(host->clk); ++ host->clk = NULL; ++ goto probe_free_host; ++ } ++ ++ ret = clk_enable(host->clk); ++ if (ret) { ++ dev_err(&pdev->dev, "failed to enable clock source.\n"); ++ goto clk_free; ++ } ++ ++ host->clk_rate = clk_get_rate(host->clk); ++ ++ mmc->ops = &s3cmci_ops; ++ mmc->ocr_avail = host->pdata->ocr_avail; ++ mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ; ++ mmc->f_min = host->clk_rate / (host->clk_div * 256); ++ mmc->f_max = host->clk_rate / host->clk_div; ++ ++ mmc->max_blk_count = 4095; ++ mmc->max_blk_size = 4095; ++ mmc->max_req_size = 4095 * 512; ++ mmc->max_seg_size = mmc->max_req_size; ++ ++ mmc->max_phys_segs = 128; ++ mmc->max_hw_segs = 128; ++ ++ dbg(host, dbg_debug, "probe: mode:%s mapped mci_base:%p irq:%u " ++ "irq_cd:%u dma:%u.\n", (host->is2440?"2440":""), ++ host->base, host->irq, host->irq_cd, host->dma); ++ ++ ret = mmc_add_host(mmc); ++ if (ret) { ++ dev_err(&pdev->dev, "failed to add mmc host.\n"); ++ goto free_dmabuf; ++ } ++ ++ platform_set_drvdata(pdev, mmc); ++ ++ dev_info(&pdev->dev, "initialisation done.\n"); ++ return 0; ++ ++ free_dmabuf: ++ clk_disable(host->clk); ++ ++ clk_free: ++ clk_put(host->clk); ++ ++ probe_free_irq_cd: ++ free_irq(host->irq_cd, host); ++ ++ probe_free_irq: ++ free_irq(host->irq, host); ++ ++ probe_iounmap: ++ iounmap(host->base); ++ ++ probe_free_mem_region: ++ release_mem_region(host->mem->start, RESSIZE(host->mem)); ++ ++ probe_free_host: ++ mmc_free_host(mmc); ++ probe_out: ++ return ret; ++} ++ ++static int s3cmci_remove(struct platform_device *pdev) ++{ ++ struct mmc_host *mmc = platform_get_drvdata(pdev); ++ struct s3cmci_host *host = mmc_priv(mmc); ++ ++ mmc_remove_host(mmc); ++ clk_disable(host->clk); ++ clk_put(host->clk); ++ s3c2410_dma_free(host->dma, &s3cmci_dma_client); ++ free_irq(host->irq_cd, host); ++ free_irq(host->irq, host); ++ iounmap(host->base); ++ release_mem_region(host->mem->start, RESSIZE(host->mem)); ++ mmc_free_host(mmc); ++ ++ return 0; ++} ++ ++static int s3cmci_probe_2410(struct platform_device *dev) ++{ ++ return s3cmci_probe(dev, 0); ++} ++ ++static int s3cmci_probe_2412(struct platform_device *dev) ++{ ++ return s3cmci_probe(dev, 1); ++} ++ ++static int s3cmci_probe_2440(struct platform_device *dev) ++{ ++ return s3cmci_probe(dev, 1); ++} ++ ++#ifdef CONFIG_PM ++ ++static int s3cmci_suspend(struct platform_device *dev, pm_message_t state) ++{ ++ struct mmc_host *mmc = platform_get_drvdata(dev); ++ ++ return mmc_suspend_host(mmc, state); ++} ++ ++static int s3cmci_resume(struct platform_device *dev) ++{ ++ struct mmc_host *mmc = platform_get_drvdata(dev); ++ ++ return mmc_resume_host(mmc); ++} ++ ++#else /* CONFIG_PM */ ++#define s3cmci_suspend NULL ++#define s3cmci_resume NULL ++#endif /* CONFIG_PM */ ++ ++ ++static struct platform_driver s3cmci_driver_2410 = { ++ .driver.name = "s3c2410-sdi", ++ .probe = s3cmci_probe_2410, ++ .remove = s3cmci_remove, ++ .suspend = s3cmci_suspend, ++ .resume = s3cmci_resume, ++}; ++ ++static struct platform_driver s3cmci_driver_2412 = { ++ .driver.name = "s3c2412-sdi", ++ .probe = s3cmci_probe_2412, ++ .remove = s3cmci_remove, ++ .suspend = s3cmci_suspend, ++ .resume = s3cmci_resume, ++}; ++ ++static struct platform_driver s3cmci_driver_2440 = { ++ .driver.name = "s3c2440-sdi", ++ .probe = s3cmci_probe_2440, ++ .remove = s3cmci_remove, ++ .suspend = s3cmci_suspend, ++ .resume = s3cmci_resume, ++}; ++ ++ ++static int __init s3cmci_init(void) ++{ ++ platform_driver_register(&s3cmci_driver_2410); ++ platform_driver_register(&s3cmci_driver_2412); ++ platform_driver_register(&s3cmci_driver_2440); ++ return 0; ++} ++ ++static void __exit s3cmci_exit(void) ++{ ++ platform_driver_unregister(&s3cmci_driver_2410); ++ platform_driver_unregister(&s3cmci_driver_2412); ++ platform_driver_unregister(&s3cmci_driver_2440); ++} ++ ++module_init(s3cmci_init); ++module_exit(s3cmci_exit); ++ ++MODULE_DESCRIPTION("Samsung S3C MMC/SD Card Interface driver"); ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("Thomas Kleffel "); +diff --git a/drivers/mmc/host/s3cmci.h b/drivers/mmc/host/s3cmci.h +new file mode 100644 +index 0000000..9644b45 +--- /dev/null ++++ b/drivers/mmc/host/s3cmci.h +@@ -0,0 +1,69 @@ ++/* ++ * linux/drivers/mmc/s3cmci.h - Samsung S3C MCI driver ++ * ++ * Copyright (C) 2004-2006 Thomas Kleffel, All Rights Reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++enum s3cmci_waitfor { ++ COMPLETION_NONE, ++ COMPLETION_FINALIZE, ++ COMPLETION_CMDSENT, ++ COMPLETION_RSPFIN, ++ COMPLETION_XFERFINISH, ++ COMPLETION_XFERFINISH_RSPFIN, ++}; ++ ++struct s3cmci_host { ++ struct platform_device *pdev; ++ struct s3c24xx_mci_pdata *pdata; ++ struct mmc_host *mmc; ++ struct resource *mem; ++ struct clk *clk; ++ void __iomem *base; ++ int irq; ++ int irq_cd; ++ int dma; ++ ++ unsigned long clk_rate; ++ unsigned long clk_div; ++ unsigned long real_rate; ++ u8 prescaler; ++ ++ int is2440; ++ unsigned sdiimsk; ++ unsigned sdidata; ++ unsigned sdidata_b; ++ int dodma; ++ ++ int dmatogo; ++ ++ struct mmc_request *mrq; ++ int cmd_is_stop; ++ ++ spinlock_t complete_lock; ++ enum s3cmci_waitfor complete_what; ++ ++ int dma_complete; ++ ++ u32 pio_sgptr; ++ u32 pio_bytes; ++ u32 pio_count; ++ u8 *pio_ptr; ++#define XFER_NONE 0 ++#define XFER_READ 1 ++#define XFER_WRITE 2 ++ u32 pio_active; ++ ++ int bus_width; ++ ++ char dbgmsg_cmd[301]; ++ char dbgmsg_dat[301]; ++ char *status; ++ ++ unsigned int ccnt, dcnt; ++ struct tasklet_struct pio_tasklet; ++}; +diff --git a/include/asm-arm/arch-s3c2410/mci.h b/include/asm-arm/arch-s3c2410/mci.h +new file mode 100644 +index 0000000..24e6cd1 +--- /dev/null ++++ b/include/asm-arm/arch-s3c2410/mci.h +@@ -0,0 +1,13 @@ ++#ifndef _ARCH_MCI_H ++#define _ARCH_MCI_H ++ ++struct s3c24xx_mci_pdata { ++ unsigned int gpio_detect; ++ unsigned int gpio_wprotect; ++ unsigned long ocr_avail; ++ unsigned int do_dma; ++ void (*set_power)(unsigned char power_mode, ++ unsigned short vdd); ++}; ++ ++#endif /* _ARCH_NCI_H */ +diff --git a/include/asm-arm/arch-s3c2410/regs-sdi.h b/include/asm-arm/arch-s3c2410/regs-sdi.h +index bb9d30b..4bb1ec5 100644 +--- a/include/asm-arm/arch-s3c2410/regs-sdi.h ++++ b/include/asm-arm/arch-s3c2410/regs-sdi.h +@@ -28,9 +28,17 @@ + #define S3C2410_SDIDCNT (0x30) + #define S3C2410_SDIDSTA (0x34) + #define S3C2410_SDIFSTA (0x38) ++ + #define S3C2410_SDIDATA (0x3C) ++#define S3C2410_SDIDATA_BYTE (0x3C) + #define S3C2410_SDIIMSK (0x40) + ++#define S3C2440_SDIDATA (0x40) ++#define S3C2440_SDIDATA_BYTE (0x48) ++#define S3C2440_SDIIMSK (0x3C) ++ ++#define S3C2440_SDICON_SDRESET (1<<8) ++#define S3C2440_SDICON_MMCCLOCK (1<<5) + #define S3C2410_SDICON_BYTEORDER (1<<4) + #define S3C2410_SDICON_SDIOIRQ (1<<3) + #define S3C2410_SDICON_RWAITEN (1<<2) +@@ -42,7 +50,8 @@ + #define S3C2410_SDICMDCON_LONGRSP (1<<10) + #define S3C2410_SDICMDCON_WAITRSP (1<<9) + #define S3C2410_SDICMDCON_CMDSTART (1<<8) +-#define S3C2410_SDICMDCON_INDEX (0xff) ++#define S3C2410_SDICMDCON_SENDERHOST (1<<6) ++#define S3C2410_SDICMDCON_INDEX (0x3f) + + #define S3C2410_SDICMDSTAT_CRCFAIL (1<<12) + #define S3C2410_SDICMDSTAT_CMDSENT (1<<11) +@@ -51,6 +60,9 @@ + #define S3C2410_SDICMDSTAT_XFERING (1<<8) + #define S3C2410_SDICMDSTAT_INDEX (0xff) + ++#define S3C2440_SDIDCON_DS_BYTE (0<<22) ++#define S3C2440_SDIDCON_DS_HALFWORD (1<<22) ++#define S3C2440_SDIDCON_DS_WORD (2<<22) + #define S3C2410_SDIDCON_IRQPERIOD (1<<21) + #define S3C2410_SDIDCON_TXAFTERRESP (1<<20) + #define S3C2410_SDIDCON_RXAFTERCMD (1<<19) +@@ -59,6 +71,7 @@ + #define S3C2410_SDIDCON_WIDEBUS (1<<16) + #define S3C2410_SDIDCON_DMAEN (1<<15) + #define S3C2410_SDIDCON_STOP (1<<14) ++#define S3C2440_SDIDCON_DATSTART (1<<14) + #define S3C2410_SDIDCON_DATMODE (3<<12) + #define S3C2410_SDIDCON_BLKNUM (0x7ff) + +@@ -68,6 +81,7 @@ + #define S3C2410_SDIDCON_XFER_RXSTART (2<<12) + #define S3C2410_SDIDCON_XFER_TXSTART (3<<12) + ++#define S3C2410_SDIDCON_BLKNUM_MASK (0xFFF) + #define S3C2410_SDIDCNT_BLKNUM_SHIFT (12) + + #define S3C2410_SDIDSTA_RDYWAITREQ (1<<10) +@@ -82,10 +96,12 @@ + #define S3C2410_SDIDSTA_TXDATAON (1<<1) + #define S3C2410_SDIDSTA_RXDATAON (1<<0) + ++#define S3C2440_SDIFSTA_FIFORESET (1<<16) ++#define S3C2440_SDIFSTA_FIFOFAIL (3<<14) /* 3 is correct (2 bits) */ + #define S3C2410_SDIFSTA_TFDET (1<<13) + #define S3C2410_SDIFSTA_RFDET (1<<12) +-#define S3C2410_SDIFSTA_TXHALF (1<<11) +-#define S3C2410_SDIFSTA_TXEMPTY (1<<10) ++#define S3C2410_SDIFSTA_TFHALF (1<<11) ++#define S3C2410_SDIFSTA_TFEMPTY (1<<10) + #define S3C2410_SDIFSTA_RFLAST (1<<9) + #define S3C2410_SDIFSTA_RFFULL (1<<8) + #define S3C2410_SDIFSTA_RFHALF (1<<7) +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1024-s3c_mci-gta01.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1024-s3c_mci-gta01.patch.patch new file mode 100644 index 0000000000..cd5fb3aa97 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1024-s3c_mci-gta01.patch.patch @@ -0,0 +1,97 @@ +From 948f60af720f34294629041773d9947bcefc0a9a Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:33:24 +0100 +Subject: [PATCH] s3c_mci-gta01.patch + +--- + arch/arm/mach-s3c2410/mach-gta01.c | 56 ++++++++++++++++++++++++++++++++++++ + 1 files changed, 56 insertions(+), 0 deletions(-) + +diff --git a/arch/arm/mach-s3c2410/mach-gta01.c b/arch/arm/mach-s3c2410/mach-gta01.c +index 3462c7f..87bb189 100644 +--- a/arch/arm/mach-s3c2410/mach-gta01.c ++++ b/arch/arm/mach-s3c2410/mach-gta01.c +@@ -59,6 +59,7 @@ + + #include + #include ++#include + #include + #include + #include +@@ -382,6 +383,59 @@ static struct s3c2410_platform_nand gta01_nand_info = { + .sets = gta01_nand_sets, + }; + ++static void gta01_mmc_set_power(unsigned char power_mode, unsigned short vdd) ++{ ++ int bit; ++ int mv = 1700; /* 1.7V for MMC_VDD_165_195 */ ++ ++ printk(KERN_DEBUG "mmc_set_power(power_mode=%u, vdd=%u\n", ++ power_mode, vdd); ++ ++ switch (system_rev) { ++ case GTA01v3_SYSTEM_REV: ++ switch (power_mode) { ++ case MMC_POWER_OFF: ++ pcf50606_onoff_set(pcf50606_global, ++ PCF50606_REGULATOR_D2REG, 0); ++ break; ++ case MMC_POWER_ON: ++ /* translate MMC_VDD_* VDD bit to mv */ ++ for (bit = 8; bit != 24; bit++) ++ if (vdd == (1 << bit)) ++ mv += 100 * (bit - 4); ++ pcf50606_voltage_set(pcf50606_global, ++ PCF50606_REGULATOR_D2REG, mv); ++ pcf50606_onoff_set(pcf50606_global, ++ PCF50606_REGULATOR_D2REG, 1); ++ break; ++ } ++ break; ++ case GTA01v4_SYSTEM_REV: ++ case GTA01Bv2_SYSTEM_REV: ++ case GTA01Bv3_SYSTEM_REV: ++ case GTA01Bv4_SYSTEM_REV: ++ switch (power_mode) { ++ case MMC_POWER_OFF: ++ s3c2410_gpio_setpin(GTA01_GPIO_SDMMC_ON, 1); ++ break; ++ case MMC_POWER_ON: ++ s3c2410_gpio_setpin(GTA01_GPIO_SDMMC_ON, 0); ++ break; ++ } ++ break; ++ } ++} ++ ++static struct s3c24xx_mci_pdata gta01_mmc_cfg = { ++ .gpio_detect = GTA01_GPIO_nSD_DETECT, ++ .set_power = >a01_mmc_set_power, ++ .ocr_avail = MMC_VDD_165_195|MMC_VDD_20_21| ++ MMC_VDD_21_22|MMC_VDD_22_23|MMC_VDD_23_24| ++ MMC_VDD_24_25|MMC_VDD_25_26|MMC_VDD_26_27| ++ MMC_VDD_27_28|MMC_VDD_28_29|MMC_VDD_29_30| ++ MMC_VDD_30_31|MMC_VDD_31_32|MMC_VDD_32_33, ++}; ++ + static void gta01_udc_command(enum s3c2410_udc_cmd_e cmd) + { + printk(KERN_DEBUG "%s(%d)\n", __func__, cmd); +@@ -598,10 +652,12 @@ static void __init gta01_machine_init(void) + system_rev == GTA01Bv3_SYSTEM_REV || + system_rev == GTA01Bv4_SYSTEM_REV) { + gta01_udc_cfg.udc_command = gta01_udc_command; ++ gta01_mmc_cfg.ocr_avail = MMC_VDD_32_33; + } + + s3c_device_usb.dev.platform_data = >a01_usb_info; + s3c_device_nand.dev.platform_data = >a01_nand_info; ++ s3c_device_sdi.dev.platform_data = >a01_mmc_cfg; + + s3c24xx_fb_set_platdata(>a01_lcd_cfg); + +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1025-qt2410-s3c_mci-pdata.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1025-qt2410-s3c_mci-pdata.patch.patch new file mode 100644 index 0000000000..e69de29bb2 diff --git a/target/linux/s3c24xx/patches-2.6.24/1026-s3c24xx-nand-largepage.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1026-s3c24xx-nand-largepage.patch.patch new file mode 100644 index 0000000000..1f14c7c36d --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1026-s3c24xx-nand-largepage.patch.patch @@ -0,0 +1,143 @@ +From cddfb6f606768265f2b36658761ea9467f098f0a Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:33:44 +0100 +Subject: [PATCH] s3c24xx-nand-largepage.patch + MTD: S3C24XX large page NAND support + +This adds support for using large page NAND devices +with the S3C24XX NAND controller. This also adds the +file Documentation/arm/Samsung-S3C24XX/NAND.txt to +describe the differences. + +Signed-off-by: Ben Dooks +--- + Documentation/arm/Samsung-S3C24XX/NAND.txt | 30 +++++++++++++++++++ + Documentation/arm/Samsung-S3C24XX/Overview.txt | 2 + + drivers/mtd/nand/s3c2410.c | 38 ++++++++++++++++++++--- + 3 files changed, 65 insertions(+), 5 deletions(-) + create mode 100644 Documentation/arm/Samsung-S3C24XX/NAND.txt + +diff --git a/Documentation/arm/Samsung-S3C24XX/NAND.txt b/Documentation/arm/Samsung-S3C24XX/NAND.txt +new file mode 100644 +index 0000000..bc478a3 +--- /dev/null ++++ b/Documentation/arm/Samsung-S3C24XX/NAND.txt +@@ -0,0 +1,30 @@ ++ S3C24XX NAND Support ++ ==================== ++ ++Introduction ++------------ ++ ++Small Page NAND ++--------------- ++ ++The driver uses a 512 byte (1 page) ECC code for this setup. The ++ECC code is not directly compatible with the default kernel ECC ++code, so the driver enforces its own OOB layout and ECC parameters ++ ++Large Page NAND ++--------------- ++ ++The driver is capable of handling NAND flash with a 2KiB page ++size, with support for hardware ECC generation and correction. ++ ++Unlike the 512byte page mode, the driver generates ECC data for ++each 256 byte block in an 2KiB page. This means that more than ++one error in a page can be rectified. It also means that the ++OOB layout remains the default kernel layout for these flashes. ++ ++ ++Document Author ++--------------- ++ ++Ben Dooks, Copyright 2007 Simtec Electronics ++ +diff --git a/Documentation/arm/Samsung-S3C24XX/Overview.txt b/Documentation/arm/Samsung-S3C24XX/Overview.txt +index c31b76f..d04e1e3 100644 +--- a/Documentation/arm/Samsung-S3C24XX/Overview.txt ++++ b/Documentation/arm/Samsung-S3C24XX/Overview.txt +@@ -156,6 +156,8 @@ NAND + controller. If there are any problems the latest linux-mtd + code can be found from http://www.linux-mtd.infradead.org/ + ++ For more information see Documentation/arm/Samsung-S3C24XX/NAND.txt ++ + + Serial + ------ +diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c +index 770306c..5c1c09d 100644 +--- a/drivers/mtd/nand/s3c2410.c ++++ b/drivers/mtd/nand/s3c2410.c +@@ -473,7 +473,7 @@ static int s3c2440_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u + ecc_code[1] = ecc >> 8; + ecc_code[2] = ecc >> 16; + +- pr_debug("%s: returning ecc %06lx\n", __func__, ecc); ++ pr_debug("%s: returning ecc %06lx\n", __func__, ecc & 0xffffff); + + return 0; + } +@@ -662,9 +662,6 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info, + chip->ecc.calculate = s3c2410_nand_calculate_ecc; + chip->ecc.correct = s3c2410_nand_correct_data; + chip->ecc.mode = NAND_ECC_HW; +- chip->ecc.size = 512; +- chip->ecc.bytes = 3; +- chip->ecc.layout = &nand_hw_eccoob; + + switch (info->cpu_type) { + case TYPE_S3C2410: +@@ -688,6 +685,34 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info, + } + } + ++/* s3c2410_nand_update_chip ++ * ++ * post-probe chip update, to change any items, such as the ++ * layout for large page nand ++ */ ++ ++static void s3c2410_nand_update_chip(struct s3c2410_nand_info *info, ++ struct s3c2410_nand_mtd *nmtd) ++{ ++ struct nand_chip *chip = &nmtd->chip; ++ ++ printk("%s: chip %p: %d\n", __func__, chip, chip->page_shift); ++ ++ if (hardware_ecc) { ++ /* change the behaviour depending on wether we are using ++ * the large or small page nand device */ ++ ++ if (chip->page_shift > 10) { ++ chip->ecc.size = 256; ++ chip->ecc.bytes = 3; ++ } else { ++ chip->ecc.size = 512; ++ chip->ecc.bytes = 3; ++ chip->ecc.layout = &nand_hw_eccoob; ++ } ++ } ++} ++ + /* s3c2410_nand_probe + * + * called by device layer when it finds a device matching +@@ -794,9 +819,12 @@ static int s3c24xx_nand_probe(struct platform_device *pdev, + + s3c2410_nand_init_chip(info, nmtd, sets); + +- nmtd->scan_res = nand_scan(&nmtd->mtd, (sets) ? sets->nr_chips : 1); ++ nmtd->scan_res = nand_scan_ident(&nmtd->mtd, ++ (sets) ? sets->nr_chips : 1); + + if (nmtd->scan_res == 0) { ++ s3c2410_nand_update_chip(info, nmtd); ++ nand_scan_tail(&nmtd->mtd); + s3c2410_nand_add_partition(info, nmtd, sets); + } + +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1027-s3c2410_udc-2440_dual_packet-workaround.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1027-s3c2410_udc-2440_dual_packet-workaround.patch.patch new file mode 100644 index 0000000000..644da7a30c --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1027-s3c2410_udc-2440_dual_packet-workaround.patch.patch @@ -0,0 +1,61 @@ +From d8310bb7e4ee4a9f3433a9a1e0e87567337299cb Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:33:55 +0100 +Subject: [PATCH] s3c2410_udc-2440_dual_packet-workaround.patch + This is a patch that seems to make the USB hangs on the S3C2440 go away. At + least a good amount of ping torture didn't make them come back so far. + +The issue is that, if there are several back-to-back packets, +sometimes no interrupt is generated for one of them. This +seems to be caused by the mysterious dual packet mode, which +the USB hardware enters automatically if the endpoint size is +half that of the FIFO. (On the 2440, this is the normal +situation for bulk data endpoints.) + +There is also a timing factor in this. I think what happens is +that the USB hardware automatically sends an acknowledgement +if there is only one packet in the FIFO (the FIFO has space +for two). If another packet arrives before the host has +retrieved and acknowledged the previous one, no interrupt is +generated for that second one. + +However, there may be an indication. There is one undocumented +bit (none of the 244x manuals document it), OUT_CRS1_REG[1], +that seems to be set suspiciously often when this condition +occurs. There is also CLR_DATA_TOGGLE, OUT_CRS1_REG[7], which +may have a function related to this. (The Samsung manual is +rather terse on that, as usual.) + +This needs to be examined further. For now, the patch seems to do the +trick. + +Note that this is not a clean solution by any means, because we +might potentially get stuck in that interrupt for quite a while. +--- + drivers/usb/gadget/s3c2410_udc.c | 3 +++ + 1 files changed, 3 insertions(+), 0 deletions(-) + +diff --git a/drivers/usb/gadget/s3c2410_udc.c b/drivers/usb/gadget/s3c2410_udc.c +index 4ce050c..d4a17af 100644 +--- a/drivers/usb/gadget/s3c2410_udc.c ++++ b/drivers/usb/gadget/s3c2410_udc.c +@@ -845,6 +845,7 @@ static void s3c2410_udc_handle_ep(struct s3c2410_ep *ep) + u32 ep_csr1; + u32 idx; + ++handle_ep_again: + if (likely (!list_empty(&ep->queue))) + req = list_entry(ep->queue.next, + struct s3c2410_request, queue); +@@ -884,6 +885,8 @@ static void s3c2410_udc_handle_ep(struct s3c2410_ep *ep) + + if ((ep_csr1 & S3C2410_UDC_OCSR1_PKTRDY) && req) { + s3c2410_udc_read_fifo(ep,req); ++ if (s3c2410_udc_fifo_count_out()) ++ goto handle_ep_again; + } + } + } +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1028-hxd8-core.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1028-hxd8-core.patch.patch new file mode 100644 index 0000000000..9e16713bc3 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1028-hxd8-core.patch.patch @@ -0,0 +1,453 @@ +From 23b8a1e056b74101ae9d51ccbab2d208e46c01a4 Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:34:06 +0100 +Subject: [PATCH] hxd8-core.patch + This patch adds another machine, the FIC HXD8 + +--- + arch/arm/mach-s3c2440/Kconfig | 6 + + arch/arm/mach-s3c2440/Makefile | 1 + + arch/arm/mach-s3c2440/mach-hxd8.c | 381 +++++++++++++++++++++++++++++++++++ + include/asm-arm/arch-s3c2440/hxd8.h | 16 ++ + 4 files changed, 404 insertions(+), 0 deletions(-) + create mode 100644 arch/arm/mach-s3c2440/mach-hxd8.c + create mode 100644 include/asm-arm/arch-s3c2440/hxd8.h + +diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig +index f1915bd..6798d9c 100644 +--- a/arch/arm/mach-s3c2440/Kconfig ++++ b/arch/arm/mach-s3c2440/Kconfig +@@ -67,6 +67,12 @@ config SMDK2440_CPU2440 + default y if ARCH_S3C2440 + select CPU_S3C2440 + ++config MACH_HXD8 ++ bool "FIC HXD8" ++ select CPU_S3C2440 ++ select SENSORS_PCF50606 ++ help ++ Say Y here if you are using the FIC Neo1973 GSM Phone + + endmenu + +diff --git a/arch/arm/mach-s3c2440/Makefile b/arch/arm/mach-s3c2440/Makefile +index c81ed62..6f590d4 100644 +--- a/arch/arm/mach-s3c2440/Makefile ++++ b/arch/arm/mach-s3c2440/Makefile +@@ -21,3 +21,4 @@ obj-$(CONFIG_MACH_OSIRIS) += mach-osiris.o + obj-$(CONFIG_MACH_RX3715) += mach-rx3715.o + obj-$(CONFIG_ARCH_S3C2440) += mach-smdk2440.o + obj-$(CONFIG_MACH_NEXCODER_2440) += mach-nexcoder.o ++obj-$(CONFIG_MACH_HXD8) += mach-hxd8.o +diff --git a/arch/arm/mach-s3c2440/mach-hxd8.c b/arch/arm/mach-s3c2440/mach-hxd8.c +new file mode 100644 +index 0000000..3400ed3 +--- /dev/null ++++ b/arch/arm/mach-s3c2440/mach-hxd8.c +@@ -0,0 +1,381 @@ ++/* linux/arch/arm/mach-s3c2440/mach-hxd8.c ++ * ++ * S3C2440 Machine Support for the FIC HXD8 ++ * ++ * Copyright (c) 2007 OpenMoko, Inc. ++ * Author: Harald Welte ++ * All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++ ++//#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++//#include "s3c2410.h" ++//#include "s3c2440.h" ++//#include "clock.h" ++#include ++#include ++#include ++#include ++#include ++#include ++ ++static struct map_desc hxd8_iodesc[] __initdata = { ++ /* ISA IO Space map (memory space selected by A24) */ ++ ++ { ++ .virtual = (u32)S3C24XX_VA_ISA_WORD, ++ .pfn = __phys_to_pfn(S3C2410_CS2), ++ .length = 0x10000, ++ .type = MT_DEVICE, ++ }, { ++ .virtual = (u32)S3C24XX_VA_ISA_WORD + 0x10000, ++ .pfn = __phys_to_pfn(S3C2410_CS2 + (1<<24)), ++ .length = SZ_4M, ++ .type = MT_DEVICE, ++ }, { ++ .virtual = (u32)S3C24XX_VA_ISA_BYTE, ++ .pfn = __phys_to_pfn(S3C2410_CS2), ++ .length = 0x10000, ++ .type = MT_DEVICE, ++ }, { ++ .virtual = (u32)S3C24XX_VA_ISA_BYTE + 0x10000, ++ .pfn = __phys_to_pfn(S3C2410_CS2 + (1<<24)), ++ .length = SZ_4M, ++ .type = MT_DEVICE, ++ } ++}; ++ ++#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK ++#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB ++#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE ++ ++static struct s3c2410_uartcfg hxd8_uartcfgs[] __initdata = { ++ [0] = { ++ .hwport = 0, ++ .flags = 0, ++ .ucon = 0x3c5, ++ .ulcon = 0x03, ++ .ufcon = 0x51, ++ }, ++ [1] = { ++ .hwport = 1, ++ .flags = 0, ++ .ucon = 0x3c5, ++ .ulcon = 0x03, ++ .ufcon = 0x51, ++ }, ++ [2] = { ++ .hwport = 2, ++ .flags = 0, ++ .ucon = 0x3c5, ++ .ulcon = 0x03, ++ .ufcon = 0x51, ++ } ++}; ++ ++static struct s3c2410_nand_set hxd8_nand_sets[] = { ++ [0] = { ++ .name = "hxd8-nand", ++ .nr_chips = 1, ++ .flags = S3C2410_NAND_BBT, ++ }, ++ [1] = { ++ .name = "hxd8-nand-1", ++ .nr_chips = 1, ++ .flags = S3C2410_NAND_BBT, ++ }, ++ [2] = { ++ .name = "hxd8-nand-2", ++ .nr_chips = 1, ++ .flags = S3C2410_NAND_BBT, ++ }, ++}; ++ ++/* choose a set of timings which should suit most 512Mbit ++ * chips and beyond. ++*/ ++ ++static struct s3c2410_platform_nand hxd8_nand_info = { ++ .tacls = 20, ++ .twrph0 = 60, ++ .twrph1 = 20, ++ .nr_sets = ARRAY_SIZE(hxd8_nand_sets), ++ .sets = hxd8_nand_sets, ++}; ++ ++/* PMU configuration */ ++ ++static struct pcf50606_platform_data hxd8_pcf_pdata = { ++ .used_features = PCF50606_FEAT_EXTON | ++ PCF50606_FEAT_BBC | ++ PCF50606_FEAT_WDT | ++ PCF50606_FEAT_RTC | ++ PCF50606_FEAT_PWM | ++ PCF50606_FEAT_PWM_BL | ++ PCF50606_FEAT_BATVOLT, ++ .onkey_seconds_required = 5, ++ .init_brightness = 8, ++ .rails = { ++ [PCF50606_REGULATOR_D1REG] = { ++ .name = "rc_3v3", ++ .voltage = { ++ .init = 3300, ++ .max = 3300, ++ }, ++ }, ++ [PCF50606_REGULATOR_D2REG] = { ++ .name = "gps_3v3", ++ .voltage = { ++ .init = 3300, ++ .max = 3300, ++ }, ++ }, ++ [PCF50606_REGULATOR_D3REG] = { ++ .name = "io2_3v3", ++ .voltage = { ++ .init = 3300, ++ .max = 3300, ++ }, ++ }, ++ [PCF50606_REGULATOR_DCD] = { ++ .name = "core_1v3", ++ .voltage = { ++ .init = 1300, ++ .max = 1500, ++ }, ++ }, ++ [PCF50606_REGULATOR_DCDE] = { ++ .name = "io1_3v3", ++ .voltage = { ++ .init = 3300, ++ .max = 3300, ++ }, ++ }, ++ [PCF50606_REGULATOR_DCUD] = { ++ .name = "rf_3v3", ++ .voltage = { ++ .init = 3300, ++ .max = 3300, ++ }, ++ }, ++ [PCF50606_REGULATOR_IOREG] = { ++ .name = "audio_3v3", ++ .voltage = { ++ .init = 3300, ++ .max = 3300, ++ }, ++ }, ++ [PCF50606_REGULATOR_LPREG] = { ++ .name = "lcm_3v3", ++ .voltage = { ++ .init = 3300, ++ .max = 3300, ++ }, ++ }, ++ }, ++}; ++ ++static struct resource hxd8_pmu_resources[] = { ++ [0] = { ++ .flags = IORESOURCE_IRQ, ++ .start = HXD8_IRQ_PCF50606, ++ .end = HXD8_IRQ_PCF50606, ++ }, ++}; ++ ++static struct platform_device hxd8_pmu_dev = { ++ .name = "pcf50606", ++ .num_resources = ARRAY_SIZE(hxd8_pmu_resources), ++ .resource = hxd8_pmu_resources, ++ .dev = { ++ .platform_data = &hxd8_pcf_pdata, ++ }, ++}; ++ ++/* LCD driver info */ ++ ++static struct s3c2410fb_display hxd8_displays[] __initdata = { ++ { ++ .type = S3C2410_LCDCON1_TFT, ++ .width = 480, ++ .height = 272, ++ .xres = 480, ++ .yres = 272, ++ .bpp = 16, ++ ++ .pixclock = 40000, /* HCLK/4 */ ++ .left_margin = 2, ++ .right_margin = 2, ++ .hsync_len = 41, ++ .upper_margin = 2, ++ .lower_margin = 2, ++ .vsync_len = 10, ++ .lcdcon5 = S3C2410_LCDCON5_FRM565 | ++ S3C2410_LCDCON5_INVVLINE | ++ S3C2410_LCDCON5_INVVFRAME, ++ }, ++}; ++ ++static struct s3c2410fb_mach_info hxd8_lcd_cfg __initdata = { ++ .displays = hxd8_displays, ++ .num_displays = ARRAY_SIZE(hxd8_displays), ++ .default_display = 1, ++ ++ .lpcsel = ((0xCE6) & ~7), ++}; ++ ++static struct platform_device hxd8_pm_gsm_dev = { ++ .name = "neo1973-pm-gsm", ++}; ++ ++static void gta01_udc_command(enum s3c2410_udc_cmd_e cmd) ++{ ++ printk(KERN_DEBUG "%s(%d)\n", __func__, cmd); ++ ++ switch (cmd) { ++ case S3C2410_UDC_P_ENABLE: ++ s3c2410_gpio_setpin(HXD8_GPIO_USB_PULLUP, 1); ++ break; ++ case S3C2410_UDC_P_DISABLE: ++ s3c2410_gpio_setpin(HXD8_GPIO_USB_PULLUP, 0); ++ break; ++ case S3C2410_UDC_P_RESET: ++ /* FIXME! */ ++ break; ++ default: ++ break; ++ } ++} ++ ++/* USB Charger */ ++ ++static void hxd8_udc_vbus_draw(unsigned int ma) ++{ ++ if (ma >= 500) { ++ /* enable fast charge */ ++ printk(KERN_DEBUG "udc: enabling fast charge\n"); ++ s3c2410_gpio_setpin(HXD8_GPIO_USB_CUR_SEL, 1); ++ } else { ++ /* disable fast charge */ ++ printk(KERN_DEBUG "udc: disabling fast charge\n"); ++ s3c2410_gpio_setpin(HXD8_GPIO_USB_CUR_SEL, 0); ++ } ++} ++ ++static struct s3c2410_udc_mach_info hxd8_udc_cfg = { ++ .vbus_draw = hxd8_udc_vbus_draw, ++}; ++ ++/* Touch Screen */ ++static struct s3c2410_ts_mach_info hxd8_ts_cfg = { ++ .delay = 10000, ++ .presc = 49, ++ .oversampling_shift = 4, ++}; ++ ++static struct platform_device *hxd8_devices[] __initdata = { ++ &s3c_device_usb, ++ &s3c_device_lcd, ++ &s3c_device_wdt, ++ &s3c_device_i2c, ++ &s3c_device_iis, ++ &s3c_device_sdi, ++ &s3c_device_usbgadget, ++ &s3c_device_nand, ++ &s3c_device_ts, ++}; ++ ++static void __init hxd8_map_io(void) ++{ ++ s3c24xx_init_io(hxd8_iodesc, ARRAY_SIZE(hxd8_iodesc)); ++ s3c24xx_init_clocks(16934400); ++ s3c24xx_init_uarts(hxd8_uartcfgs, ARRAY_SIZE(hxd8_uartcfgs)); ++} ++ ++static void __init hxd8_machine_init(void) ++{ ++ hxd8_udc_cfg.udc_command = gta01_udc_command; ++ s3c_device_nand.dev.platform_data = &hxd8_nand_info; ++ ++ s3c24xx_fb_set_platdata(&hxd8_lcd_cfg); ++ ++ s3c24xx_udc_set_platdata(&hxd8_udc_cfg); ++ set_s3c2410ts_info(&hxd8_ts_cfg); ++ ++ //platform_device_register(>a01_button_dev); ++ platform_device_register(&hxd8_pm_gsm_dev); ++ ++ platform_device_register(&hxd8_pmu_dev); ++ ++ platform_add_devices(hxd8_devices, ARRAY_SIZE(hxd8_devices)); ++ ++ s3c2410_pm_init(); ++} ++ ++MACHINE_START(HXD8, "HXD8") ++ /* Maintainer: Harald Welte */ ++ .phys_io = S3C2410_PA_UART, ++ .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, ++ .boot_params = S3C2410_SDRAM_PA + 0x100, ++ ++ .init_irq = s3c24xx_init_irq, ++ .map_io = hxd8_map_io, ++ .init_machine = hxd8_machine_init, ++ .timer = &s3c24xx_timer, ++MACHINE_END +diff --git a/include/asm-arm/arch-s3c2440/hxd8.h b/include/asm-arm/arch-s3c2440/hxd8.h +new file mode 100644 +index 0000000..50e9c11 +--- /dev/null ++++ b/include/asm-arm/arch-s3c2440/hxd8.h +@@ -0,0 +1,16 @@ ++#ifndef _HXD8_H ++#define _HXD8_H ++ ++#include ++#include ++ ++#define HXD8v1_SYSTEM_REV 0x00000110 ++ ++#define HXD8_GPIO_USB_CUR_SEL S3C2410_GPA0 ++#define HXD8_GPIO_BACKLIGHT S3C2410_GPB0 ++#define HXD8_GPIO_USB_PULLUP S3C2410_GPB9 ++#define HXD8_GPIO_PCF50606 S3C2410_GPF6 ++ ++#define HXD8_IRQ_PCF50606 IRQ_EINT6 ++ ++#endif +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1029-hxd8-tsl256x.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1029-hxd8-tsl256x.patch.patch new file mode 100644 index 0000000000..e230a9be84 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1029-hxd8-tsl256x.patch.patch @@ -0,0 +1,537 @@ +From d238d3347d19a6df97670624bd0712e61b83b666 Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:34:17 +0100 +Subject: [PATCH] hxd8-tsl256x.patch + +--- + drivers/i2c/chips/Kconfig | 10 ++ + drivers/i2c/chips/Makefile | 1 + + drivers/i2c/chips/tsl256x.c | 310 +++++++++++++++++++++++++++++++++++++++++++ + drivers/i2c/chips/tsl256x.h | 154 +++++++++++++++++++++ + include/linux/i2c-id.h | 1 + + 5 files changed, 476 insertions(+), 0 deletions(-) + create mode 100644 drivers/i2c/chips/tsl256x.c + create mode 100644 drivers/i2c/chips/tsl256x.h + +diff --git a/drivers/i2c/chips/Kconfig b/drivers/i2c/chips/Kconfig +index c0011fc..bf0da3a 100644 +--- a/drivers/i2c/chips/Kconfig ++++ b/drivers/i2c/chips/Kconfig +@@ -174,4 +174,14 @@ config MENELAUS + and other features that are often used in portable devices like + cell phones and PDAs. + ++config SENSORS_TSL256X ++ tristate "Texas TSL256X Ambient Light Sensor" ++ depends on I2C ++ help ++ If you say yes here you get support for the Texas TSL256X ++ ambient light sensor chip. ++ ++ This driver can also be built as a module. If so, the module ++ will be called tsl256x. ++ + endmenu +diff --git a/drivers/i2c/chips/Makefile b/drivers/i2c/chips/Makefile +index 864e6cf..a4772c7 100644 +--- a/drivers/i2c/chips/Makefile ++++ b/drivers/i2c/chips/Makefile +@@ -16,6 +16,7 @@ obj-$(CONFIG_ISP1301_OMAP) += isp1301_omap.o + obj-$(CONFIG_TPS65010) += tps65010.o + obj-$(CONFIG_MENELAUS) += menelaus.o + obj-$(CONFIG_SENSORS_TSL2550) += tsl2550.o ++obj-$(CONFIG_SENSORS_TSL256X) += tsl256x.o + + ifeq ($(CONFIG_I2C_DEBUG_CHIP),y) + EXTRA_CFLAGS += -DDEBUG +diff --git a/drivers/i2c/chips/tsl256x.c b/drivers/i2c/chips/tsl256x.c +new file mode 100644 +index 0000000..455ec5e +--- /dev/null ++++ b/drivers/i2c/chips/tsl256x.c +@@ -0,0 +1,310 @@ ++/* ++ * tsl256x.c -- TSL256x Light Sensor driver ++ * ++ * Copyright 2007 by Fiwin. ++ * Author: Alec Tsai ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * This I2C client driver refers to pcf50606.c. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include "tsl256x.h" ++ ++static unsigned short normal_i2c[] = { 0x39, I2C_CLIENT_END }; ++/* Magic definition of all other variables and things */ ++I2C_CLIENT_INSMOD; ++ ++struct tsl256x_data { ++ struct i2c_client client; ++ struct mutex lock; ++ struct input_dev *input_dev; ++}; ++ ++static struct i2c_driver tsl256x_driver; ++ ++/****************************************************************************** ++ * Low-Level routines ++ *****************************************************************************/ ++static inline int __reg_write(struct tsl256x_data *tsl, u_int8_t reg, ++ u_int8_t val) ++{ ++ return i2c_smbus_write_byte_data(&tsl->client, reg, val); ++} ++ ++static int reg_write(struct tsl256x_data *tsl, u_int8_t reg, u_int8_t val) ++{ ++ int ret; ++ ++ mutex_lock(&tsl->lock); ++ ret = __reg_write(tsl, reg, val); ++ mutex_unlock(&tsl->lock); ++ ++ return ret; ++} ++ ++static inline int32_t __reg_read(struct tsl256x_data *tsl, u_int8_t reg) ++{ ++ int32_t ret; ++ ++ ret = i2c_smbus_read_byte_data(&tsl->client, reg); ++ ++ return ret; ++} ++ ++static u_int8_t reg_read(struct tsl256x_data *tsl, u_int8_t reg) ++{ ++ int32_t ret; ++ ++ mutex_lock(&tsl->lock); ++ ret = __reg_read(tsl, reg); ++ mutex_unlock(&tsl->lock); ++ ++ return ret & 0xff; ++} ++ ++u_int32_t calculate_lux(u_int32_t iGain, u_int32_t iType, u_int32_t ch0, ++ u_int32_t ch1) ++{ ++ u_int32_t channel0 = ch0 * 636 / 10; ++ u_int32_t channel1 = ch1 * 636 / 10; ++ u_int32_t lux_value = 0; ++ u_int32_t ratio = (channel1 * (2^RATIO_SCALE)) / channel0; ++ u_int32_t b = 0, m = 0; ++ ++ if (0 == ch0) ++ return 0; ++ else { ++ if (ratio > (13 * (2^RATIO_SCALE) / 10)) ++ return 0; ++ } ++ ++ switch (iType) { ++ case 0: // T package ++ if ((ratio >= 0) && (ratio <= K1T)) { ++ b = B1T; ++ m = M1T; ++ } else if (ratio <= K2T) { ++ b = B2T; ++ m = M2T; ++ } else if (ratio <= K3T) { ++ b = B3T; ++ m = M3T; ++ } else if (ratio <= K4T) { ++ b = B4T; ++ m = M4T; ++ } else if (ratio <= K5T) { ++ b = B5T; ++ m = M5T; ++ } else if (ratio <= K6T) { ++ b = B6T; ++ m = M6T; ++ } else if (ratio <= K7T) { ++ b = B7T; ++ m = M7T; ++ } else if (ratio > K8T) { ++ b = B8T; ++ m = M8T; ++ } ++ break; ++ case 1:// CS package ++ if ((ratio >= 0) && (ratio <= K1C)) { ++ b = B1C; ++ m = M1C; ++ } else if (ratio <= K2C) { ++ b = B2C; ++ m = M2C; ++ } else if (ratio <= K3C) { ++ b = B3C; ++ m = M3C; ++ } else if (ratio <= K4C) { ++ b = B4C; ++ m = M4C; ++ } else if (ratio <= K5C) { ++ b = B5C; ++ m = M5C; ++ } else if (ratio <= K6C) { ++ b = B6C; ++ m = M6C; ++ } else if (ratio <= K7C) { ++ b = B7C; ++ m = M7C; ++ } else if (ratio > K8C) { ++ b = B8C; ++ m = M8C; ++ } ++ break; ++ default: ++ return 0; ++ break; ++ } ++ ++ lux_value = ((channel0 * b) - (channel1 * m)) / 16384; ++ return(lux_value); ++} ++ ++static ssize_t tsl256x_show_light_lux(struct device *dev, ++ struct device_attribute *attr, char *buf) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct tsl256x_data *tsl = i2c_get_clientdata(client); ++ u_int8_t low_byte_of_ch0 = 0, high_byte_of_ch0 = 0; ++ u_int8_t low_byte_of_ch1 = 0, high_byte_of_ch1 = 0; ++ u_int32_t adc_value_ch0, adc_value_ch1, adc_value; ++ ++ low_byte_of_ch0 = reg_read(tsl, TSL256X_REG_DATA0LOW); ++ high_byte_of_ch0 = reg_read(tsl, TSL256X_REG_DATA0HIGH); ++ low_byte_of_ch1 = reg_read(tsl, TSL256X_REG_DATA1LOW); ++ high_byte_of_ch1 = reg_read(tsl, TSL256X_REG_DATA1HIGH); ++ ++ adc_value_ch0 = (high_byte_of_ch0 * 256 + low_byte_of_ch0) * 16; ++ adc_value_ch1 = (high_byte_of_ch1 * 256 + low_byte_of_ch1) * 16; ++ ++ adc_value = calculate_lux(0, 0, adc_value_ch0, adc_value_ch1); ++ return sprintf(buf, "%d\n", adc_value); ++} ++ ++static DEVICE_ATTR(light_lux, S_IRUGO, tsl256x_show_light_lux, NULL); ++ ++static int tsl256x_detect(struct i2c_adapter *adapter, int address, int kind) ++{ ++ struct i2c_client *new_client = NULL; ++ struct tsl256x_data *tsl256x = NULL; ++ u_int8_t id = 0; ++ int res = 0; ++ ++ if (!(tsl256x = kzalloc(sizeof(*tsl256x), GFP_KERNEL))) ++ return -ENOMEM; ++ ++ mutex_init(&tsl256x->lock); ++ new_client = &tsl256x->client; ++ i2c_set_clientdata(new_client, tsl256x); ++ new_client->addr = address; ++ new_client->adapter = adapter; ++ new_client->driver = &tsl256x_driver; ++ new_client->flags = 0; ++ strlcpy(new_client->name, "tsl256x", I2C_NAME_SIZE); ++ ++ /* now we try to detect the chip */ ++ /* register with i2c core */ ++ res = i2c_attach_client(new_client); ++ if (res) { ++ printk(KERN_DEBUG "[%s]Error: during i2c_attach_client()\n", ++ new_client->name); ++ goto exit_free; ++ } else { ++ printk(KERN_INFO "TSL256X is attached to I2C bus.\n"); ++ } ++ ++ /* Configure TSL256X. */ ++ { ++ /* Power up TSL256X. */ ++ reg_write(tsl256x, TSL256X_REG_CONTROL, 0x03); ++ ++ /* Check TSL256X ID. */ ++ id = reg_read(tsl256x, TSL256X_REG_ID); ++ if (TSL2561_ID == (id & 0xF0)) { ++ /* Configuring the Timing Register. ++ High Gain (16x), integration time of 101ms. */ ++ reg_write(tsl256x, TSL256X_REG_TIMING, 0x11); ++ } else { ++ goto exit_free; ++ } ++ } ++ ++ res = device_create_file(&new_client->dev, &dev_attr_light_lux); ++ if (res) ++ goto exit_detach; ++ ++ return 0; ++ ++exit_free: ++ kfree(tsl256x); ++ return res; ++exit_detach: ++ i2c_detach_client(new_client); ++ return res; ++} ++ ++static int tsl256x_attach_adapter(struct i2c_adapter *adapter) ++{ ++ return i2c_probe(adapter, &addr_data, &tsl256x_detect); ++} ++ ++static int tsl256x_detach_client(struct i2c_client *client) ++{ ++ struct tsl256x_data *tsl256x = i2c_get_clientdata(client); ++ ++ printk(KERN_INFO "Detach TSL256X from I2C bus.\n"); ++ ++ /* Power down TSL256X. */ ++ reg_write(tsl256x, TSL256X_REG_CONTROL, 0x00); ++ ++ device_remove_file(&client->dev, &dev_attr_light_lux); ++ kfree(tsl256x); ++ ++ return 0; ++} ++ ++#ifdef CONFIG_PM ++static int tsl256x_suspend(struct device *dev, pm_message_t state) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct tsl256x_data *tsl256x = i2c_get_clientdata(client); ++ ++ /* Power down TSL256X. */ ++ reg_write(tsl256x, TSL256X_REG_CONTROL, 0x00); ++ ++ return 0; ++} ++ ++static int tsl256x_resume(struct device *dev) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct tsl256x_data *tsl256x = i2c_get_clientdata(client); ++ ++ /* Power up TSL256X. */ ++ reg_write(tsl256x, TSL256X_REG_CONTROL, 0x03); ++ ++ return 0; ++} ++#endif ++ ++static struct i2c_driver tsl256x_driver = { ++ .driver = { ++ .name = "tsl256x", ++ .owner = THIS_MODULE, ++#ifdef CONFIG_PM ++ .suspend = tsl256x_suspend, ++ .resume = tsl256x_resume, ++#endif ++ }, ++ .id = I2C_DRIVERID_TSL256X, ++ .attach_adapter = tsl256x_attach_adapter, ++ .detach_client = tsl256x_detach_client, ++}; ++ ++static int __init tsl256x_init(void) ++{ ++ return i2c_add_driver(&tsl256x_driver); ++} ++ ++static void __exit tsl256x_exit(void) ++{ ++ i2c_del_driver(&tsl256x_driver); ++} ++ ++MODULE_AUTHOR("Alec Tsai "); ++MODULE_LICENSE("GPL"); ++ ++module_init(tsl256x_init); ++module_exit(tsl256x_exit); ++ +diff --git a/drivers/i2c/chips/tsl256x.h b/drivers/i2c/chips/tsl256x.h +new file mode 100644 +index 0000000..88de0c6 +--- /dev/null ++++ b/drivers/i2c/chips/tsl256x.h +@@ -0,0 +1,154 @@ ++/* ++ * tsl256x.h -- TSL256x Light Sensor driver ++ * ++ * Copyright 2007 by Fiwin. ++ * Author: Alec Tsai ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * The contents of header file is copied from TSL256x Datasheet. ++ */ ++ ++#ifndef _TSL256X_H ++#define _TSL256X_H ++ ++#define TSL2560_ID 0x00 ++#define TSL2561_ID 0x10 ++ ++#define LUX_SCALE 14 /* scale by 2^14 */ ++#define RATIO_SCALE 9 /*scale ratio by 2^9 */ ++ ++/****************************************************************************** ++ * Integration time scaling factors ++ *****************************************************************************/ ++#define CH_SCALE 10 /* scale channel values by 2^10 */ ++#define CHSCALE_TINT0 0x7517 /* 322/11 * 2^CH_SCALE */ ++#define CHSCALE_TINT1 0x0fe7 /* 322/81 * 2^CH_SCALE */ ++ ++/****************************************************************************** ++ * T Package coefficients ++ *****************************************************************************/ ++/* ++ * For Ch1/Ch0=0.00 to 0.50 ++ * Lux/Ch0=0.0304.0.062*((Ch1/Ch0)^1.4) ++ * piecewise approximation ++ * For Ch1/Ch0=0.00 to 0.125: ++ * Lux/Ch0=0.0304.0.0272*(Ch1/Ch0) ++ * ++ * For Ch1/Ch0=0.125 to 0.250: ++ * Lux/Ch0=0.0325.0.0440*(Ch1/Ch0) ++ * ++ * For Ch1/Ch0=0.250 to 0.375: ++ * Lux/Ch0=0.0351.0.0544*(Ch1/Ch0) ++ * ++ * For Ch1/Ch0=0.375 to 0.50: ++ * Lux/Ch0=0.0381.0.0624*(Ch1/Ch0) ++ * ++ * For Ch1/Ch0=0.50 to 0.61: ++ * Lux/Ch0=0.0224.0.031*(Ch1/Ch0) ++ * ++ * For Ch1/Ch0=0.61 to 0.80: ++ * Lux/Ch0=0.0128.0.0153*(Ch1/Ch0) ++ * ++ * For Ch1/Ch0=0.80 to 1.30: ++ * Lux/Ch0=0.00146.0.00112*(Ch1/Ch0) ++ * ++ * For Ch1/Ch0>1.3: ++ * Lux/Ch0=0 ++ */ ++#define K1T 0x0040 /* 0.125 * 2^RATIO_SCALE */ ++#define B1T 0x01f2 /* 0.0304 * 2^LUX_SCALE */ ++#define M1T 0x01be /* 0.0272 * 2^LUX_SCALE */ ++#define K2T 0x0080 /* 0.250 * 2^RATIO_SCALE */ ++#define B2T 0x0214 /* 0.0325 * 2^LUX_SCALE */ ++#define M2T 0x02d1 /* 0.0440 * 2^LUX_SCALE */ ++#define K3T 0x00c0 /* 0.375 * 2^RATIO_SCALE */ ++#define B3T 0x023f /* 0.0351 * 2^LUX_SCALE */ ++#define M3T 0x037b /* 0.0544 * 2^LUX_SCALE */ ++#define K4T 0x0100 /* 0.50 * 2^RATIO_SCALE */ ++#define B4T 0x0270 /* 0.0381 * 2^LUX_SCALE */ ++#define M4T 0x03fe /* 0.0624 * 2^LUX_SCALE */ ++#define K5T 0x0138 /* 0.61 * 2^RATIO_SCALE */ ++#define B5T 0x016f /* 0.0224 * 2^LUX_SCALE */ ++#define M5T 0x01fc /* 0.0310 * 2^LUX_SCALE */ ++#define K6T 0x019a /* 0.80 * 2^RATIO_SCALE */ ++#define B6T 0x00d2 /* 0.0128 * 2^LUX_SCALE */ ++#define M6T 0x00fb /* 0.0153 * 2^LUX_SCALE */ ++#define K7T 0x029a /* 1.3 * 2^RATIO_SCALE */ ++#define B7T 0x0018 /* 0.00146 * 2^LUX_SCALE */ ++#define M7T 0x0012 /* 0.00112 * 2^LUX_SCALE */ ++#define K8T 0x029a /* 1.3 * 2^RATIO_SCALE */ ++#define B8T 0x0000 /* 0.000 * 2^LUX_SCALE */ ++#define M8T 0x0000 /* 0.000 * 2^LUX_SCALE */ ++ ++/****************************************************************************** ++ * CS package coefficients ++ *****************************************************************************/ ++/* ++ * For 0 <= Ch1/Ch0 <= 0.52 ++ * Lux/Ch0 = 0.0315.0.0593*((Ch1/Ch0)^1.4) ++ * piecewise approximation ++ * For 0 <= Ch1/Ch0 <= 0.13 ++ * Lux/Ch0 = 0.0315.0.0262*(Ch1/Ch0) ++ * For 0.13 <= Ch1/Ch0 <= 0.26 ++ * Lux/Ch0 = 0.0337.0.0430*(Ch1/Ch0) ++ * For 0.26 <= Ch1/Ch0 <= 0.39 ++ * Lux/Ch0 = 0.0363.0.0529*(Ch1/Ch0) ++ * For 0.39 <= Ch1/Ch0 <= 0.52 ++ * Lux/Ch0 = 0.0392.0.0605*(Ch1/Ch0) ++ * For 0.52 < Ch1/Ch0 <= 0.65 ++ * Lux/Ch0 = 0.0229.0.0291*(Ch1/Ch0) ++ * For 0.65 < Ch1/Ch0 <= 0.80 ++ * Lux/Ch0 = 0.00157.0.00180*(Ch1/Ch0) ++ * For 0.80 < Ch1/Ch0 <= 1.30 ++ * Lux/Ch0 = 0.00338.0.00260*(Ch1/Ch0) ++ * For Ch1/Ch0 > 1.30 ++ * Lux = 0 ++ */ ++#define K1C 0x0043 /* 0.130 * 2^RATIO_SCALE */ ++#define B1C 0x0204 /* 0.0315 * 2^LUX_SCALE */ ++#define M1C 0x01ad /* 0.0262 * 2^LUX_SCALE */ ++#define K2C 0x0085 /* 0.260 * 2^RATIO_SCALE */ ++#define B2C 0x0228 /* 0.0337 * 2^LUX_SCALE */ ++#define M2C 0x02c1 /* 0.0430 * 2^LUX_SCALE */ ++#define K3C 0x00c8 /* 0.390 * 2^RATIO_SCALE */ ++#define B3C 0x0253 /* 0.0363 * 2^LUX_SCALE */ ++#define M3C 0x0363 /* 0.0529 * 2^LUX_SCALE */ ++#define K4C 0x010a /* 0.520 * 2^RATIO_SCALE */ ++#define B4C 0x0282 /* 0.0392 * 2^LUX_SCALE */ ++#define M4C 0x03df /* 0.0605 * 2^LUX_SCALE */ ++#define K5C 0x014d /* 0.65 * 2^RATIO_SCALE */ ++#define B5C 0x0177 /* 0.0229 * 2^LUX_SCALE */ ++#define M5C 0x01dd /* 0.0291 * 2^LUX_SCALE */ ++#define K6C 0x019a /* 0.80 * 2^RATIO_SCALE */ ++#define B6C 0x0101 /* 0.0157 * 2^LUX_SCALE */ ++#define M6C 0x0127 /* 0.0180 * 2^LUX_SCALE */ ++#define K7C 0x029a /* 1.3 * 2^RATIO_SCALE */ ++#define B7C 0x0037 /* 0.00338 * 2^LUX_SCALE */ ++#define M7C 0x002b /* 0.00260 * 2^LUX_SCALE */ ++#define K8C 0x029a /* 1.3 * 2^RATIO_SCALE */ ++#define B8C 0x0000 /* 0.000 * 2^LUX_SCALE */ ++#define M8C 0x0000 /* 0.000 * 2^LUX_SCALE */ ++ ++/* TSL256x registers definition . */ ++enum tsl256x_regs { ++ TSL256X_REG_CONTROL = 0x80, /* Control of basic functions */ ++ TSL256X_REG_TIMING = 0x81, /* Integration time/gain control */ ++ TSL256X_REG_THRESHLOWLOW = 0x82, /* Low byte of low interrupt threshold */ ++ TSL256X_REG_THRESHLOWHIGH = 0x83, /* High byte of low interrupt threshold */ ++ TSL256X_REG_THRESHHIGHLOW = 0x84, /* Low byte of high interrupt threshold */ ++ TSL256X_REG_THRESHHIGHHIGH = 0x85, /* High byte of high interrupt threshold */ ++ TSL256X_REG_INTERRUPT = 0x86, /* Interrupt control */ ++ TSL256X_REG_CRC = 0x88, /* Factory test - not a user register */ ++ TSL256X_REG_ID = 0x8A, /* Part number/ Rev ID */ ++ TSL256X_REG_DATA0LOW = 0x8C, /* Low byte of ADC channel 0 */ ++ TSL256X_REG_DATA0HIGH = 0x8D, /* High byte of ADC channel 0 */ ++ TSL256X_REG_DATA1LOW = 0x8E, /* Low byte of ADC channel 1 */ ++ TSL256X_REG_DATA1HIGH = 0x8F, /* High byte of ADC channel 1 */ ++ __NUM_TSL256X_REGS ++}; ++ ++#endif /* _TSL256X_H */ ++ +diff --git a/include/linux/i2c-id.h b/include/linux/i2c-id.h +index 9b8ae78..a089554 100644 +--- a/include/linux/i2c-id.h ++++ b/include/linux/i2c-id.h +@@ -168,6 +168,7 @@ + #define I2C_DRIVERID_W83L785TS 1047 + #define I2C_DRIVERID_OV7670 1048 /* Omnivision 7670 camera */ + #define I2C_DRIVERID_PCF50606 1049 ++#define I2C_DRIVERID_TSL256X 1050 + + /* + * ---- Adapter types ---------------------------------------------------- +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1030-s3c2442b-cpuid.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1030-s3c2442b-cpuid.patch.patch new file mode 100644 index 0000000000..4045755a69 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1030-s3c2442b-cpuid.patch.patch @@ -0,0 +1,56 @@ +From 6635f1fbaf19b1d50e355bec73974faab070e46f Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:34:27 +0100 +Subject: [PATCH] s3c2442b-cpuid.patch + Add the Samsung S3C2442B CPU idcode to the samsung s3c24xx platform code + and fix a Kconfig typo related tot the 2442. + +--- + arch/arm/mach-s3c2442/Kconfig | 2 +- + arch/arm/plat-s3c24xx/cpu.c | 10 ++++++++++ + 2 files changed, 11 insertions(+), 1 deletions(-) + +diff --git a/arch/arm/mach-s3c2442/Kconfig b/arch/arm/mach-s3c2442/Kconfig +index 26d131a..6cc68a1 100644 +--- a/arch/arm/mach-s3c2442/Kconfig ++++ b/arch/arm/mach-s3c2442/Kconfig +@@ -6,7 +6,7 @@ + + config CPU_S3C2442 + bool +- depends on ARCH_S3C2410 ++ depends on ARCH_S3C2440 + select S3C2410_CLOCK + select S3C2410_GPIO + select S3C2410_PM if PM +diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c +index f513ab0..bebbc14 100644 +--- a/arch/arm/plat-s3c24xx/cpu.c ++++ b/arch/arm/plat-s3c24xx/cpu.c +@@ -68,6 +68,7 @@ static const char name_s3c2410[] = "S3C2410"; + static const char name_s3c2412[] = "S3C2412"; + static const char name_s3c2440[] = "S3C2440"; + static const char name_s3c2442[] = "S3C2442"; ++static const char name_s3c2442b[] = "S3C2442B"; + static const char name_s3c2443[] = "S3C2443"; + static const char name_s3c2410a[] = "S3C2410A"; + static const char name_s3c2440a[] = "S3C2440A"; +@@ -119,6 +120,15 @@ static struct cpu_table cpu_ids[] __initdata = { + .name = name_s3c2442 + }, + { ++ .idcode = 0x32440aab, ++ .idmask = 0xffffffff, ++ .map_io = s3c244x_map_io, ++ .init_clocks = s3c244x_init_clocks, ++ .init_uarts = s3c244x_init_uarts, ++ .init = s3c2442_init, ++ .name = name_s3c2442b ++ }, ++ { + .idcode = 0x32412001, + .idmask = 0xffffffff, + .map_io = s3c2412_map_io, +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1031-pcf50633.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1031-pcf50633.patch.patch new file mode 100644 index 0000000000..9de2cd7707 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1031-pcf50633.patch.patch @@ -0,0 +1,2562 @@ +From d485cabe5b95e0b277459ca1c605a0751f5e1dea Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:34:36 +0100 +Subject: [PATCH] pcf50633.patch + +--- + drivers/i2c/chips/Kconfig | 9 + + drivers/i2c/chips/Makefile | 1 + + drivers/i2c/chips/pcf50633.c | 1964 ++++++++++++++++++++++++++++++++++++++++++ + drivers/i2c/chips/pcf50633.h | 402 +++++++++ + include/linux/i2c-id.h | 1 + + include/linux/pcf50633.h | 114 +++ + 6 files changed, 2491 insertions(+), 0 deletions(-) + create mode 100644 drivers/i2c/chips/pcf50633.c + create mode 100644 drivers/i2c/chips/pcf50633.h + create mode 100644 include/linux/pcf50633.h + +diff --git a/drivers/i2c/chips/Kconfig b/drivers/i2c/chips/Kconfig +index bf0da3a..1d6d36f 100644 +--- a/drivers/i2c/chips/Kconfig ++++ b/drivers/i2c/chips/Kconfig +@@ -61,6 +61,15 @@ config SENSORS_PCF50606 + This driver can also be built as a module. If so, the module + will be called pcf50606. + ++config SENSORS_PCF50633 ++ tristate "Philips PCF50633" ++ depends on I2C ++ help ++ If you say yes here you get support for Philips PCF50633 ++ PMU (Power Management Unit) chips. ++ ++ This driver can also be built as a module. If so, the module ++ will be called pcf50633. + + config SENSORS_PCF8574 + tristate "Philips PCF8574 and PCF8574A" +diff --git a/drivers/i2c/chips/Makefile b/drivers/i2c/chips/Makefile +index a4772c7..4b6ba04 100644 +--- a/drivers/i2c/chips/Makefile ++++ b/drivers/i2c/chips/Makefile +@@ -10,6 +10,7 @@ obj-$(CONFIG_SENSORS_MAX6875) += max6875.o + obj-$(CONFIG_SENSORS_M41T00) += m41t00.o + obj-$(CONFIG_SENSORS_PCA9539) += pca9539.o + obj-$(CONFIG_SENSORS_PCF50606) += pcf50606.o ++obj-$(CONFIG_SENSORS_PCF50633) += pcf50633.o + obj-$(CONFIG_SENSORS_PCF8574) += pcf8574.o + obj-$(CONFIG_SENSORS_PCF8591) += pcf8591.o + obj-$(CONFIG_ISP1301_OMAP) += isp1301_omap.o +diff --git a/drivers/i2c/chips/pcf50633.c b/drivers/i2c/chips/pcf50633.c +new file mode 100644 +index 0000000..5488084 +--- /dev/null ++++ b/drivers/i2c/chips/pcf50633.c +@@ -0,0 +1,1964 @@ ++/* Philips PCF50633 Power Management Unit (PMU) driver ++ * ++ * (C) 2006-2007 by OpenMoko, Inc. ++ * Author: Harald Welte ++ * All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ * ++ * This driver is a monster ;) It provides the following features ++ * - voltage control for a dozen different voltage domains ++ * - charging control for main and backup battery ++ * - rtc / alarm ++ * - adc driver (hw_sensors like) ++ * - backlight ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include "pcf50633.h" ++ ++#if 1 ++#define DEBUGP(x, args ...) printk("%s: " x, __FUNCTION__, ## args) ++#define DEBUGPC(x, args ...) printk(x, ## args) ++#else ++#define DEBUGP(x, args ...) ++#define DEBUGPC(x, args ...) ++#endif ++ ++/*********************************************************************** ++ * Static data / structures ++ ***********************************************************************/ ++ ++static unsigned short normal_i2c[] = { 0x73, I2C_CLIENT_END }; ++ ++I2C_CLIENT_INSMOD_1(pcf50633); ++ ++#define PCF50633_FIDX_CHG_ENABLED 0 /* Charger enabled */ ++#define PCF50633_FIDX_CHG_PRESENT 1 /* Charger present */ ++#define PCF50633_FIDX_CHG_ERR 3 /* Charger Error */ ++#define PCF50633_FIDX_CHG_PROT 4 /* Charger Protection */ ++#define PCF50633_FIDX_CHG_READY 5 /* Charging completed */ ++#define PCF50633_FIDX_PWR_PRESSED 8 ++#define PCF50633_FIDX_RTC_SECOND 9 ++#define PCF50633_FIDX_USB_PRESENT 10 ++ ++#define PCF50633_F_CHG_ENABLED (1 << PCF50633_FIDX_CHG_ENABLED) ++#define PCF50633_F_CHG_PRESENT (1 << PCF50633_FIDX_CHG_PRESENT) ++#define PCF50633_F_CHG_ERR (1 << PCF50633_FIDX_CHG_ERR) ++#define PCF50633_F_CHG_PROT (1 << PCF50633_FIDX_CHG_PROT) ++#define PCF50633_F_CHG_READY (1 << PCF50633_FIDX_CHG_READY) ++ ++#define PCF50633_F_CHG_MASK 0x000000fc ++ ++#define PCF50633_F_PWR_PRESSED (1 << PCF50633_FIDX_PWR_PRESSED) ++#define PCF50633_F_RTC_SECOND (1 << PCF50633_FIDX_RTC_SECOND) ++#define PCF50633_F_USB_PRESENT (1 << PCF50633_FIDX_USB_PRESENT) ++ ++enum close_state { ++ CLOSE_STATE_NOT, ++ CLOSE_STATE_ALLOW = 0x2342, ++}; ++ ++enum charger_type { ++ CHARGER_TYPE_NONE = 0, ++ CHARGER_TYPE_HOSTUSB, ++ CHARGER_TYPE_1A ++}; ++ ++#define ADC_NOM_CHG_DETECT_1A 6 ++#define ADC_NOM_CHG_DETECT_NONE 43 ++ ++#define MAX_ADC_FIFO_DEPTH 8 ++ ++struct pcf50633_data { ++ struct i2c_client client; ++ struct pcf50633_platform_data *pdata; ++ struct backlight_device *backlight; ++ struct mutex lock; ++ unsigned int flags; ++ unsigned int working; ++ struct mutex working_lock; ++ struct work_struct work; ++ struct rtc_device *rtc; ++ struct input_dev *input_dev; ++ int allow_close; ++ int onkey_seconds; ++ int irq; ++ ++ int coldplug_done; /* cleared by probe, set by first work service */ ++ int flag_bat_voltage_read; /* ipc to /sys batt voltage read func */ ++ ++ int charger_adc_result_raw; ++ enum charger_type charger_type; ++ ++ /* we have a FIFO of ADC measurement requests that are used only by ++ * the workqueue service code after the ADC completion interrupt ++ */ ++ int adc_queue_mux[MAX_ADC_FIFO_DEPTH]; /* which ADC input to use */ ++ int adc_queue_avg[MAX_ADC_FIFO_DEPTH]; /* amount of averaging */ ++ int adc_queue_head; /* head owned by foreground code */ ++ int adc_queue_tail; /* tail owned by service code */ ++ ++#ifdef CONFIG_PM ++ struct { ++ u_int8_t int1m, int2m, int3m, int4m, int5m; ++ u_int8_t ooctim2; ++ u_int8_t autoout, autoena, automxc; ++ u_int8_t down1out, down1mxc; ++ u_int8_t down2out, down2ena; ++ u_int8_t memldoout, memldoena; ++ u_int8_t ledout, ledena, leddim; ++ struct { ++ u_int8_t out; ++ u_int8_t ena; ++ } ldo[__NUM_PCF50633_REGS]; ++ } standby_regs; ++#endif ++}; ++ ++static struct i2c_driver pcf50633_driver; ++ ++struct pcf50633_data *pcf50633_global; ++EXPORT_SYMBOL_GPL(pcf50633_global); ++ ++static struct platform_device *pcf50633_pdev; ++ ++/*********************************************************************** ++ * Low-Level routines ++ ***********************************************************************/ ++ ++static int __reg_write(struct pcf50633_data *pcf, u_int8_t reg, u_int8_t val) ++{ ++ return i2c_smbus_write_byte_data(&pcf->client, reg, val); ++} ++ ++static int reg_write(struct pcf50633_data *pcf, u_int8_t reg, u_int8_t val) ++{ ++ int ret; ++ ++ mutex_lock(&pcf->lock); ++ ret = __reg_write(pcf, reg, val); ++ mutex_unlock(&pcf->lock); ++ ++ return ret; ++} ++ ++static int32_t __reg_read(struct pcf50633_data *pcf, u_int8_t reg) ++{ ++ int32_t ret; ++ ++ ret = i2c_smbus_read_byte_data(&pcf->client, reg); ++ ++ return ret; ++} ++ ++static u_int8_t reg_read(struct pcf50633_data *pcf, u_int8_t reg) ++{ ++ int32_t ret; ++ ++ mutex_lock(&pcf->lock); ++ ret = __reg_read(pcf, reg); ++ mutex_unlock(&pcf->lock); ++ ++ return ret & 0xff; ++} ++ ++static int reg_set_bit_mask(struct pcf50633_data *pcf, ++ u_int8_t reg, u_int8_t mask, u_int8_t val) ++{ ++ int ret; ++ u_int8_t tmp; ++ ++ val &= mask; ++ ++ mutex_lock(&pcf->lock); ++ ++ tmp = __reg_read(pcf, reg); ++ tmp &= ~mask; ++ tmp |= val; ++ ret = __reg_write(pcf, reg, tmp); ++ ++ mutex_unlock(&pcf->lock); ++ ++ return ret; ++} ++ ++static int reg_clear_bits(struct pcf50633_data *pcf, u_int8_t reg, u_int8_t val) ++{ ++ int ret; ++ u_int8_t tmp; ++ ++ mutex_lock(&pcf->lock); ++ ++ tmp = __reg_read(pcf, reg); ++ tmp &= ~val; ++ ret = __reg_write(pcf, reg, tmp); ++ ++ mutex_unlock(&pcf->lock); ++ ++ return ret; ++} ++ ++/* asynchronously setup reading one ADC channel */ ++static void async_adc_read_setup(struct pcf50633_data *pcf, ++ int channel, int avg) ++{ ++ channel &= PCF50633_ADCC1_ADCMUX_MASK; ++ ++ /* kill ratiometric, but enable ACCSW biasing */ ++ __reg_write(pcf, PCF50633_REG_ADCC2, 0x00); ++ __reg_write(pcf, PCF50633_REG_ADCC3, 0x01); ++ ++ /* start ADC conversion of selected channel */ ++ __reg_write(pcf, PCF50633_REG_ADCC1, channel | avg | ++ PCF50633_ADCC1_ADCSTART | PCF50633_ADCC1_RES_10BIT); ++ ++} ++ ++static u_int16_t async_adc_complete(struct pcf50633_data *pcf) ++{ ++ u_int16_t ret = (__reg_read(pcf, PCF50633_REG_ADCS1) << 2) | ++ (__reg_read(pcf, PCF50633_REG_ADCS3) & ++ PCF50633_ADCS3_ADCDAT1L_MASK); ++ ++ return ret; ++} ++ ++ ++ ++ ++/*********************************************************************** ++ * Voltage / ADC ++ ***********************************************************************/ ++ ++static u_int8_t auto_voltage(unsigned int millivolts) ++{ ++ if (millivolts < 1800) ++ return 0; ++ if (millivolts > 3800) ++ return 0xff; ++ ++ millivolts -= 625; ++ return millivolts/25; ++} ++ ++static unsigned int auto_2voltage(u_int8_t bits) ++{ ++ if (bits < 0x2f) ++ return 0; ++ return 625 + (bits * 25); ++} ++ ++static u_int8_t down_voltage(unsigned int millivolts) ++{ ++ if (millivolts < 625) ++ return 0; ++ else if (millivolts > 3000) ++ return 0xff; ++ ++ millivolts -= 625; ++ return millivolts/25; ++} ++ ++static unsigned int down_2voltage(u_int8_t bits) ++{ ++ return 625 + (bits*25); ++} ++ ++static u_int8_t ldo_voltage(unsigned int millivolts) ++{ ++ if (millivolts < 900) ++ return 0; ++ else if (millivolts > 3600) ++ return 0x1f; ++ ++ millivolts -= 900; ++ return millivolts/100; ++} ++ ++static unsigned int ldo_2voltage(u_int8_t bits) ++{ ++ bits &= 0x1f; ++ return 900 + (bits * 100); ++} ++ ++static const u_int8_t regulator_registers[__NUM_PCF50633_REGULATORS] = { ++ [PCF50633_REGULATOR_AUTO] = PCF50633_REG_AUTOOUT, ++ [PCF50633_REGULATOR_DOWN1] = PCF50633_REG_DOWN1OUT, ++ [PCF50633_REGULATOR_DOWN2] = PCF50633_REG_DOWN2OUT, ++ [PCF50633_REGULATOR_MEMLDO] = PCF50633_REG_MEMLDOOUT, ++ [PCF50633_REGULATOR_LDO1] = PCF50633_REG_LDO1OUT, ++ [PCF50633_REGULATOR_LDO2] = PCF50633_REG_LDO2OUT, ++ [PCF50633_REGULATOR_LDO3] = PCF50633_REG_LDO3OUT, ++ [PCF50633_REGULATOR_LDO4] = PCF50633_REG_LDO4OUT, ++ [PCF50633_REGULATOR_LDO5] = PCF50633_REG_LDO5OUT, ++ [PCF50633_REGULATOR_LDO6] = PCF50633_REG_LDO6OUT, ++ [PCF50633_REGULATOR_HCLDO] = PCF50633_REG_HCLDOOUT, ++}; ++ ++int pcf50633_onoff_set(struct pcf50633_data *pcf, ++ enum pcf50633_regulator_id reg, int on) ++{ ++ u_int8_t addr; ++ ++ if (reg >= __NUM_PCF50633_REGULATORS) ++ return -EINVAL; ++ ++ /* the *ENA register is always one after the *OUT register */ ++ addr = regulator_registers[reg] + 1; ++ ++ if (on == 0) ++ reg_set_bit_mask(pcf, addr, PCF50633_REGULATOR_ON, 0); ++ else ++ reg_set_bit_mask(pcf, addr, PCF50633_REGULATOR_ON, ++ PCF50633_REGULATOR_ON); ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(pcf50633_onoff_set); ++ ++int pcf50633_onoff_get(struct pcf50633_data *pcf, ++ enum pcf50633_regulator_id reg) ++{ ++ u_int8_t val, addr; ++ ++ if (reg >= __NUM_PCF50633_REGULATORS) ++ return -EINVAL; ++ ++ /* the *ENA register is always one after the *OUT register */ ++ addr = regulator_registers[reg] + 1; ++ val = reg_read(pcf, addr) & PCF50633_REGULATOR_ON; ++ ++ return val; ++} ++EXPORT_SYMBOL_GPL(pcf50633_onoff_get); ++ ++int pcf50633_voltage_set(struct pcf50633_data *pcf, ++ enum pcf50633_regulator_id reg, ++ unsigned int millivolts) ++{ ++ u_int8_t volt_bits; ++ u_int8_t regnr; ++ ++ DEBUGP("pcf=%p, reg=%d, mvolts=%d\n", pcf, reg, millivolts); ++ ++ if (reg >= __NUM_PCF50633_REGULATORS) ++ return -EINVAL; ++ ++ regnr = regulator_registers[reg]; ++ ++ if (millivolts > pcf->pdata->rails[reg].voltage.max) ++ return -EINVAL; ++ ++ switch (reg) { ++ case PCF50633_REGULATOR_AUTO: ++ volt_bits = auto_voltage(millivolts); ++ break; ++ case PCF50633_REGULATOR_DOWN1: ++ volt_bits = down_voltage(millivolts); ++ break; ++ case PCF50633_REGULATOR_DOWN2: ++ volt_bits = down_voltage(millivolts); ++ break; ++ case PCF50633_REGULATOR_LDO1: ++ case PCF50633_REGULATOR_LDO2: ++ case PCF50633_REGULATOR_LDO3: ++ case PCF50633_REGULATOR_LDO4: ++ case PCF50633_REGULATOR_LDO5: ++ case PCF50633_REGULATOR_LDO6: ++ case PCF50633_REGULATOR_HCLDO: ++ volt_bits = ldo_voltage(millivolts); ++ DEBUGP("ldo_voltage(0x%x)=%u\n", millivolts, volt_bits); ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ return reg_write(pcf, regnr, volt_bits); ++} ++EXPORT_SYMBOL_GPL(pcf50633_voltage_set); ++ ++unsigned int pcf50633_voltage_get(struct pcf50633_data *pcf, ++ enum pcf50633_regulator_id reg) ++{ ++ u_int8_t volt_bits; ++ u_int8_t regnr; ++ unsigned int rc = 0; ++ ++ if (reg >= __NUM_PCF50633_REGULATORS) ++ return -EINVAL; ++ ++ regnr = regulator_registers[reg]; ++ volt_bits = reg_read(pcf, regnr); ++ ++ switch (reg) { ++ case PCF50633_REGULATOR_AUTO: ++ rc = auto_2voltage(volt_bits); ++ break; ++ case PCF50633_REGULATOR_DOWN1: ++ rc = down_2voltage(volt_bits); ++ break; ++ case PCF50633_REGULATOR_DOWN2: ++ rc = down_2voltage(volt_bits); ++ break; ++ case PCF50633_REGULATOR_LDO1: ++ case PCF50633_REGULATOR_LDO2: ++ case PCF50633_REGULATOR_LDO3: ++ case PCF50633_REGULATOR_LDO4: ++ case PCF50633_REGULATOR_LDO5: ++ case PCF50633_REGULATOR_LDO6: ++ case PCF50633_REGULATOR_HCLDO: ++ rc = ldo_2voltage(volt_bits); ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ return rc; ++} ++EXPORT_SYMBOL_GPL(pcf50633_voltage_get); ++ ++/* go into 'STANDBY' mode, i.e. power off the main CPU and peripherals */ ++void pcf50633_go_standby(void) ++{ ++ reg_set_bit_mask(pcf50633_global, PCF50633_REG_OOCSHDWN, ++ PCF50633_OOCSHDWN_GOSTDBY, PCF50633_OOCSHDWN_GOSTDBY); ++} ++EXPORT_SYMBOL_GPL(pcf50633_go_standby); ++ ++void pcf50633_gpio_set(struct pcf50633_data *pcf, enum pcf50633_gpio gpio, ++ int on) ++{ ++ u_int8_t reg = gpio - PCF50633_GPIO1 + PCF50633_REG_GPIO1CFG; ++ ++ if (on) ++ reg_set_bit_mask(pcf, reg, 0x0f, 0x07); ++ else ++ reg_set_bit_mask(pcf, reg, 0x0f, 0x00); ++} ++EXPORT_SYMBOL_GPL(pcf50633_gpio_set); ++ ++int pcf50633_gpio_get(struct pcf50633_data *pcf, enum pcf50633_gpio gpio) ++{ ++ u_int8_t reg = gpio - PCF50633_GPIO1 + PCF50633_REG_GPIO1CFG; ++ u_int8_t val = reg_read(pcf, reg) & 0x0f; ++ ++ if (val == PCF50633_GPOCFG_GPOSEL_1 || ++ val == (PCF50633_GPOCFG_GPOSEL_0|PCF50633_GPOCFG_GPOSEL_INVERSE)) ++ return 1; ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(pcf50633_gpio_get); ++ ++static int interpret_charger_type_from_adc(struct pcf50633_data *pcf, ++ int sample) ++{ ++ /* 1A capable charger? */ ++ ++ if (sample < ((ADC_NOM_CHG_DETECT_NONE + ADC_NOM_CHG_DETECT_1A) / 2)) ++ return CHARGER_TYPE_1A; ++ ++ /* well then, nothing in the USB hole, or USB host / unk adapter */ ++ ++ if (pcf->flags & PCF50633_F_USB_PRESENT) /* ooh power is in there */ ++ return CHARGER_TYPE_HOSTUSB; /* HOSTUSB is the catchall */ ++ ++ return CHARGER_TYPE_NONE; /* no really -- nothing in there */ ++} ++ ++ ++ ++static void configure_pmu_for_charger(struct pcf50633_data *pcf, ++ enum charger_type type) ++{ ++ switch (type) { ++ case CHARGER_TYPE_NONE: ++ __reg_write(pcf, PCF50633_REG_MBCC7, ++ PCF50633_MBCC7_USB_SUSPEND); ++ break; ++ /* ++ * the PCF50633 has a feature that it will supply only excess current ++ * from the charger that is not used to power the device. So this ++ * 500mA setting is "up to 500mA" according to that. ++ */ ++ case CHARGER_TYPE_HOSTUSB: ++ __reg_write(pcf, PCF50633_REG_MBCC7, PCF50633_MBCC7_USB_500mA); ++ break; ++ case CHARGER_TYPE_1A: ++ __reg_write(pcf, PCF50633_REG_MBCC7, PCF50633_MBCC7_USB_1000mA); ++ break; ++ } ++} ++ ++static void trigger_next_adc_job_if_any(struct pcf50633_data *pcf) ++{ ++ if (pcf->adc_queue_head == pcf->adc_queue_tail) ++ return; ++ async_adc_read_setup(pcf, ++ pcf->adc_queue_mux[pcf->adc_queue_tail], ++ pcf->adc_queue_avg[pcf->adc_queue_tail]); ++} ++ ++static void add_request_to_adc_queue(struct pcf50633_data *pcf, ++ int mux, int avg) ++{ ++ int old_head = pcf->adc_queue_head; ++ pcf->adc_queue_mux[pcf->adc_queue_head] = mux; ++ pcf->adc_queue_avg[pcf->adc_queue_head] = avg; ++ ++ pcf->adc_queue_head = (pcf->adc_queue_head + 1) & ++ (MAX_ADC_FIFO_DEPTH - 1); ++ ++ /* it was idle before we just added this? we need to kick it then */ ++ if (old_head == pcf->adc_queue_tail) ++ trigger_next_adc_job_if_any(pcf); ++} ++ ++static void pcf50633_work(struct work_struct *work) ++{ ++ struct pcf50633_data *pcf = ++ container_of(work, struct pcf50633_data, work); ++ u_int8_t pcfirq[5]; ++ int ret; ++ int tail; ++ ++ mutex_lock(&pcf->working_lock); ++ pcf->working = 1; ++ /* ++ * datasheet says we have to read the five IRQ ++ * status regs in one transaction ++ */ ++ ret = i2c_smbus_read_i2c_block_data(&pcf->client, PCF50633_REG_INT1, 5, ++ pcfirq); ++ if (ret != 5) ++ DEBUGP("Oh crap PMU IRQ register read failed %d\n", ret); ++ ++ if (!pcf->coldplug_done) { ++ DEBUGP("PMU Coldplug init\n"); ++ ++ /* we used SECOND to kick ourselves started -- turn it off */ ++ pcfirq[0] &= ~PCF50633_INT1_SECOND; ++ reg_set_bit_mask(pcf, PCF50633_REG_INT1M, ++ PCF50633_INT1_SECOND, ++ PCF50633_INT1_SECOND); ++ ++ /* coldplug the USB if present */ ++ if ((__reg_read(pcf, PCF50633_REG_MBCS1) & ++ (PCF50633_MBCS1_USBPRES | PCF50633_MBCS1_USBOK)) == ++ (PCF50633_MBCS1_USBPRES | PCF50633_MBCS1_USBOK)) { ++ DEBUGPC("COLD USBINS\n"); ++ input_report_key(pcf->input_dev, KEY_POWER2, 1); ++ apm_queue_event(APM_POWER_STATUS_CHANGE); ++ pcf->flags |= PCF50633_F_USB_PRESENT; ++ if (pcf->pdata->cb) ++ pcf->pdata->cb(&pcf->client.dev, ++ PCF50633_FEAT_MBC, PMU_EVT_USB_INSERT); ++ } ++ ++ /* figure out our initial charging stance */ ++ add_request_to_adc_queue(pcf, PCF50633_ADCC1_MUX_ADCIN1, ++ PCF50633_ADCC1_AVERAGE_16); ++ ++ pcf->coldplug_done = 1; ++ } ++ ++ DEBUGP("INT1=0x%02x INT2=0x%02x INT3=0x%02x INT4=0x%02x INT5=0x%02x\n", ++ pcfirq[0], pcfirq[1], pcfirq[2], pcfirq[3], pcfirq[4]); ++ ++ if (pcfirq[0] & PCF50633_INT1_ADPINS) { ++ /* Charger inserted */ ++ DEBUGPC("ADPINS "); ++ input_report_key(pcf->input_dev, KEY_BATTERY, 1); ++ apm_queue_event(APM_POWER_STATUS_CHANGE); ++ pcf->flags |= PCF50633_F_CHG_PRESENT; ++ if (pcf->pdata->cb) ++ pcf->pdata->cb(&pcf->client.dev, ++ PCF50633_FEAT_MBC, PMU_EVT_INSERT); ++ /* FIXME: signal this to userspace */ ++ //kobject_uevent( ,KOBJ_ADD); ++ } ++ if (pcfirq[0] & PCF50633_INT1_ADPREM) { ++ /* Charger removed */ ++ DEBUGPC("ADPREM "); ++ input_report_key(pcf->input_dev, KEY_BATTERY, 0); ++ apm_queue_event(APM_POWER_STATUS_CHANGE); ++ pcf->flags &= ~PCF50633_F_CHG_PRESENT; ++ if (pcf->pdata->cb) ++ pcf->pdata->cb(&pcf->client.dev, ++ PCF50633_FEAT_MBC, PMU_EVT_REMOVE); ++ /* FIXME: signal this to userspace */ ++ //kobject_uevent( ,KOBJ_ADD); ++ } ++ if (pcfirq[0] & PCF50633_INT1_USBINS) { ++ DEBUGPC("USBINS "); ++ input_report_key(pcf->input_dev, KEY_POWER2, 1); ++ apm_queue_event(APM_POWER_STATUS_CHANGE); ++ pcf->flags |= PCF50633_F_USB_PRESENT; ++ if (pcf->pdata->cb) ++ pcf->pdata->cb(&pcf->client.dev, ++ PCF50633_FEAT_MBC, PMU_EVT_USB_INSERT); ++ /* completion irq will figure out our charging stance */ ++ add_request_to_adc_queue(pcf, PCF50633_ADCC1_MUX_ADCIN1, ++ PCF50633_ADCC1_AVERAGE_16); ++ } ++ if (pcfirq[0] & PCF50633_INT1_USBREM) { ++ DEBUGPC("USBREM "); ++ /* only deal if we had understood it was in */ ++ if (pcf->flags & PCF50633_F_USB_PRESENT) { ++ input_report_key(pcf->input_dev, KEY_POWER2, 0); ++ apm_queue_event(APM_POWER_STATUS_CHANGE); ++ pcf->flags &= ~PCF50633_F_USB_PRESENT; ++ if (pcf->pdata->cb) ++ pcf->pdata->cb(&pcf->client.dev, ++ PCF50633_FEAT_MBC, PMU_EVT_USB_REMOVE); ++ /* completion irq will figure out our charging stance */ ++ add_request_to_adc_queue(pcf, PCF50633_ADCC1_MUX_ADCIN1, ++ PCF50633_ADCC1_AVERAGE_16); ++ } ++ } ++ if (pcfirq[0] & PCF50633_INT1_ALARM) { ++ DEBUGPC("ALARM "); ++ if (pcf->pdata->used_features & PCF50633_FEAT_RTC) ++ rtc_update_irq(pcf->rtc, 1, RTC_AF | RTC_IRQF); ++ } ++ if (pcfirq[0] & PCF50633_INT1_SECOND) { ++ DEBUGPC("SECOND "); ++ if (pcf->flags & PCF50633_F_RTC_SECOND) ++ rtc_update_irq(pcf->rtc, 1, RTC_PF | RTC_IRQF); ++ ++ if (pcf->onkey_seconds >= 0 && ++ pcf->flags & PCF50633_F_PWR_PRESSED) { ++ DEBUGP("ONKEY_SECONDS(%u, OOCSTAT=0x%02x) ", ++ pcf->onkey_seconds, ++ reg_read(pcf, PCF50633_REG_OOCSTAT)); ++ pcf->onkey_seconds++; ++ if (pcf->onkey_seconds >= ++ pcf->pdata->onkey_seconds_sig_init) { ++ /* Ask init to do 'ctrlaltdel' */ ++ DEBUGPC("SIGINT(init) "); ++ kill_proc(1, SIGINT, 1); ++ /* FIXME: what if userspace doesn't shut down? */ ++ } ++ if (pcf->onkey_seconds >= ++ pcf->pdata->onkey_seconds_shutdown) { ++ DEBUGPC("Power Off "); ++ pcf50633_go_standby(); ++ } ++ } ++ } ++ ++ if (pcfirq[1] & PCF50633_INT2_ONKEYF) { ++ /* ONKEY falling edge (start of button press) */ ++ DEBUGPC("ONKEYF "); ++ pcf->flags |= PCF50633_F_PWR_PRESSED; ++ input_report_key(pcf->input_dev, KEY_POWER, 1); ++ } ++ if (pcfirq[1] & PCF50633_INT2_ONKEYR) { ++ /* ONKEY rising edge (end of button press) */ ++ DEBUGPC("ONKEYR "); ++ pcf->flags &= ~PCF50633_F_PWR_PRESSED; ++ pcf->onkey_seconds = -1; ++ input_report_key(pcf->input_dev, KEY_POWER, 0); ++ /* disable SECOND interrupt in case RTC didn't ++ * request it */ ++ if (!(pcf->flags & PCF50633_F_RTC_SECOND)) ++ reg_set_bit_mask(pcf, PCF50633_REG_INT1M, ++ PCF50633_INT1_SECOND, ++ PCF50633_INT1_SECOND); ++ } ++ /* FIXME: we don't use EXTON1/2/3. thats why we skip it */ ++ ++ if (pcfirq[2] & PCF50633_INT3_BATFULL) { ++ DEBUGPC("BATFULL "); ++ /* FIXME: signal this to userspace */ ++ } ++ if (pcfirq[2] & PCF50633_INT3_CHGHALT) { ++ DEBUGPC("CHGHALT "); ++ /* ++ * this is really "battery not pulling current" -- it can ++ * appear with no battery attached ++ */ ++ /* FIXME: signal this to userspace */ ++ } ++ if (pcfirq[2] & PCF50633_INT3_THLIMON) { ++ DEBUGPC("THLIMON "); ++ pcf->flags |= PCF50633_F_CHG_PROT; ++ /* FIXME: signal this to userspace */ ++ } ++ if (pcfirq[2] & PCF50633_INT3_THLIMOFF) { ++ DEBUGPC("THLIMOFF "); ++ pcf->flags &= ~PCF50633_F_CHG_PROT; ++ /* FIXME: signal this to userspace */ ++ } ++ if (pcfirq[2] & PCF50633_INT3_USBLIMON) { ++ DEBUGPC("USBLIMON "); ++ /* FIXME: signal this to userspace */ ++ } ++ if (pcfirq[2] & PCF50633_INT3_USBLIMOFF) { ++ DEBUGPC("USBLIMOFF "); ++ /* FIXME: signal this to userspace */ ++ } ++ if (pcfirq[2] & PCF50633_INT3_ADCRDY) { ++ /* ADC result ready */ ++ DEBUGPC("ADCRDY "); ++ tail = pcf->adc_queue_tail; ++ pcf->adc_queue_tail = (pcf->adc_queue_tail + 1) & ++ (MAX_ADC_FIFO_DEPTH - 1); ++ ++ switch (pcf->adc_queue_mux[tail]) { ++ case PCF50633_ADCC1_MUX_BATSNS_RES: /* battery voltage */ ++ pcf->flag_bat_voltage_read = ++ async_adc_complete(pcf); ++ break; ++ case PCF50633_ADCC1_MUX_ADCIN1: /* charger type */ ++ pcf->charger_adc_result_raw = async_adc_complete(pcf); ++ pcf->charger_type = interpret_charger_type_from_adc( ++ pcf, pcf->charger_adc_result_raw); ++ configure_pmu_for_charger(pcf, pcf->charger_type); ++ break; ++ default: ++ async_adc_complete(pcf); ++ break; ++ } ++ trigger_next_adc_job_if_any(pcf); ++ } ++ if (pcfirq[2] & PCF50633_INT3_ONKEY1S) { ++ /* ONKEY pressed for more than 1 second */ ++ pcf->onkey_seconds = 0; ++ DEBUGPC("ONKEY1S "); ++ /* Tell PMU we are taking care of this */ ++ reg_set_bit_mask(pcf, PCF50633_REG_OOCSHDWN, ++ PCF50633_OOCSHDWN_TOTRST, ++ PCF50633_OOCSHDWN_TOTRST); ++ /* enable SECOND interrupt (hz tick) */ ++ reg_clear_bits(pcf, PCF50633_REG_INT1M, PCF50633_INT1_SECOND); ++ } ++ ++ if (pcfirq[3] & (PCF50633_INT4_LOWBAT|PCF50633_INT4_LOWSYS)) { ++ /* Really low battery voltage, we have 8 seconds left */ ++ DEBUGPC("LOWBAT "); ++ apm_queue_event(APM_LOW_BATTERY); ++ DEBUGPC("SIGPWR(init) "); ++ kill_proc(1, SIGPWR, 1); ++ /* Tell PMU we are taking care of this */ ++ reg_set_bit_mask(pcf, PCF50633_REG_OOCSHDWN, ++ PCF50633_OOCSHDWN_TOTRST, ++ PCF50633_OOCSHDWN_TOTRST); ++ } ++ if (pcfirq[3] & PCF50633_INT4_HIGHTMP) { ++ /* High temperature */ ++ DEBUGPC("HIGHTMP "); ++ apm_queue_event(APM_CRITICAL_SUSPEND); ++ } ++ if (pcfirq[3] & PCF50633_INT4_AUTOPWRFAIL) { ++ DEBUGPC("PCF50633_INT4_AUTOPWRFAIL "); ++ /* FIXME: deal with this */ ++ } ++ if (pcfirq[3] & PCF50633_INT4_DWN1PWRFAIL) { ++ DEBUGPC("PCF50633_INT4_DWN1PWRFAIL "); ++ /* FIXME: deal with this */ ++ } ++ if (pcfirq[3] & PCF50633_INT4_DWN2PWRFAIL) { ++ DEBUGPC("PCF50633_INT4_DWN2PWRFAIL "); ++ /* FIXME: deal with this */ ++ } ++ if (pcfirq[3] & PCF50633_INT4_LEDPWRFAIL) { ++ DEBUGPC("PCF50633_INT4_LEDPWRFAIL "); ++ /* FIXME: deal with this */ ++ } ++ if (pcfirq[3] & PCF50633_INT4_LEDOVP) { ++ DEBUGPC("PCF50633_INT4_LEDOVP "); ++ /* FIXME: deal with this */ ++ } ++ ++ DEBUGPC("\n"); ++ ++ pcf->working = 0; ++ input_sync(pcf->input_dev); ++ put_device(&pcf->client.dev); ++ mutex_unlock(&pcf->working_lock); ++} ++ ++static irqreturn_t pcf50633_irq(int irq, void *_pcf) ++{ ++ struct pcf50633_data *pcf = _pcf; ++ ++ DEBUGP("entering(irq=%u, pcf=%p): scheduling work\n", irq, _pcf); ++ ++ get_device(&pcf->client.dev); ++ if (!schedule_work(&pcf->work) && !pcf->working) ++ dev_dbg(&pcf->client.dev, "work item may be lost\n"); ++ ++ return IRQ_HANDLED; ++} ++ ++static u_int16_t adc_to_batt_millivolts(u_int16_t adc) ++{ ++ u_int16_t mvolts; ++ ++ mvolts = (adc * 6000) / 1024; ++ ++ return mvolts; ++} ++ ++#define BATTVOLT_SCALE_START 2800 ++#define BATTVOLT_SCALE_END 4200 ++#define BATTVOLT_SCALE_DIVIDER ((BATTVOLT_SCALE_END - BATTVOLT_SCALE_START)/100) ++ ++static u_int8_t battvolt_scale(u_int16_t battvolt) ++{ ++ /* FIXME: this linear scale is completely bogus */ ++ u_int16_t battvolt_relative = battvolt - BATTVOLT_SCALE_START; ++ unsigned int percent = battvolt_relative / BATTVOLT_SCALE_DIVIDER; ++ ++ return percent; ++} ++ ++u_int16_t pcf50633_battvolt(struct pcf50633_data *pcf) ++{ ++ int count = 10; ++ ++ pcf->flag_bat_voltage_read = -1; ++ add_request_to_adc_queue(pcf, PCF50633_ADCC1_MUX_BATSNS_RES, ++ PCF50633_ADCC1_AVERAGE_16); ++ ++ while ((count--) && (pcf->flag_bat_voltage_read < 0)) ++ msleep(1); ++ ++ if (count < 0) { /* timeout somehow */ ++ DEBUGPC("pcf50633_battvolt timeout :-(\n"); ++ return -1; ++ } ++ ++ return adc_to_batt_millivolts(pcf->flag_bat_voltage_read); ++} ++EXPORT_SYMBOL_GPL(pcf50633_battvolt); ++ ++static ssize_t show_battvolt(struct device *dev, struct device_attribute *attr, ++ char *buf) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct pcf50633_data *pcf = i2c_get_clientdata(client); ++ ++ return sprintf(buf, "%u\n", pcf50633_battvolt(pcf)); ++} ++static DEVICE_ATTR(battvolt, S_IRUGO | S_IWUSR, show_battvolt, NULL); ++ ++static int reg_id_by_name(const char *name) ++{ ++ int reg_id; ++ ++ if (!strcmp(name, "voltage_auto")) ++ reg_id = PCF50633_REGULATOR_AUTO; ++ else if (!strcmp(name, "voltage_down1")) ++ reg_id = PCF50633_REGULATOR_DOWN1; ++ else if (!strcmp(name, "voltage_down2")) ++ reg_id = PCF50633_REGULATOR_DOWN2; ++ else if (!strcmp(name, "voltage_memldo")) ++ reg_id = PCF50633_REGULATOR_MEMLDO; ++ else if (!strcmp(name, "voltage_ldo1")) ++ reg_id = PCF50633_REGULATOR_LDO1; ++ else if (!strcmp(name, "voltage_ldo2")) ++ reg_id = PCF50633_REGULATOR_LDO2; ++ else if (!strcmp(name, "voltage_ldo3")) ++ reg_id = PCF50633_REGULATOR_LDO3; ++ else if (!strcmp(name, "voltage_ldo4")) ++ reg_id = PCF50633_REGULATOR_LDO4; ++ else if (!strcmp(name, "voltage_ldo5")) ++ reg_id = PCF50633_REGULATOR_LDO5; ++ else if (!strcmp(name, "voltage_ldo6")) ++ reg_id = PCF50633_REGULATOR_LDO6; ++ else if (!strcmp(name, "voltage_hcldo")) ++ reg_id = PCF50633_REGULATOR_HCLDO; ++ else ++ reg_id = -1; ++ ++ return reg_id; ++} ++ ++static ssize_t show_vreg(struct device *dev, struct device_attribute *attr, ++ char *buf) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct pcf50633_data *pcf = i2c_get_clientdata(client); ++ unsigned int reg_id; ++ ++ reg_id = reg_id_by_name(attr->attr.name); ++ if (reg_id < 0) ++ return 0; ++ ++ if (pcf50633_onoff_get(pcf, reg_id) > 0) ++ return sprintf(buf, "%u\n", pcf50633_voltage_get(pcf, reg_id)); ++ else ++ return strlcpy(buf, "0\n", PAGE_SIZE); ++} ++ ++static ssize_t set_vreg(struct device *dev, struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct pcf50633_data *pcf = i2c_get_clientdata(client); ++ unsigned long mvolts = simple_strtoul(buf, NULL, 10); ++ unsigned int reg_id; ++ ++ reg_id = reg_id_by_name(attr->attr.name); ++ if (reg_id < 0) ++ return -EIO; ++ ++ DEBUGP("attempting to set %s(%d) to %lu mvolts\n", attr->attr.name, ++ reg_id, mvolts); ++ ++ if (mvolts == 0) { ++ pcf50633_onoff_set(pcf, reg_id, 0); ++ } else { ++ if (pcf50633_voltage_set(pcf, reg_id, mvolts) < 0) { ++ dev_warn(dev, "refusing to set %s(%d) to %lu mvolts " ++ "(max=%u)\n", attr->attr.name, reg_id, mvolts, ++ pcf->pdata->rails[reg_id].voltage.max); ++ return -EINVAL; ++ } ++ pcf50633_onoff_set(pcf, reg_id, 1); ++ } ++ ++ return count; ++} ++ ++static DEVICE_ATTR(voltage_auto, S_IRUGO | S_IWUSR, show_vreg, set_vreg); ++static DEVICE_ATTR(voltage_down1, S_IRUGO | S_IWUSR, show_vreg, set_vreg); ++static DEVICE_ATTR(voltage_down2, S_IRUGO | S_IWUSR, show_vreg, set_vreg); ++static DEVICE_ATTR(voltage_memldo, S_IRUGO | S_IWUSR, show_vreg, set_vreg); ++static DEVICE_ATTR(voltage_ldo1, S_IRUGO | S_IWUSR, show_vreg, set_vreg); ++static DEVICE_ATTR(voltage_ldo2, S_IRUGO | S_IWUSR, show_vreg, set_vreg); ++static DEVICE_ATTR(voltage_ldo3, S_IRUGO | S_IWUSR, show_vreg, set_vreg); ++static DEVICE_ATTR(voltage_ldo4, S_IRUGO | S_IWUSR, show_vreg, set_vreg); ++static DEVICE_ATTR(voltage_ldo5, S_IRUGO | S_IWUSR, show_vreg, set_vreg); ++static DEVICE_ATTR(voltage_ldo6, S_IRUGO | S_IWUSR, show_vreg, set_vreg); ++static DEVICE_ATTR(voltage_hcldo, S_IRUGO | S_IWUSR, show_vreg, set_vreg); ++ ++/*********************************************************************** ++ * Charger Control ++ ***********************************************************************/ ++ ++/* Set maximum USB current limit */ ++void pcf50633_usb_curlim_set(struct pcf50633_data *pcf, int ma) ++{ ++ u_int8_t bits; ++ ++ dev_dbg(&pcf->client.dev, "setting usb current limit to %d ma", ma); ++ ++ if (ma >= 1000) ++ bits = PCF50633_MBCC7_USB_1000mA; ++ else if (ma >= 500) ++ bits = PCF50633_MBCC7_USB_500mA; ++ else if (ma >= 100) ++ bits = PCF50633_MBCC7_USB_100mA; ++ else ++ bits = PCF50633_MBCC7_USB_SUSPEND; ++ ++ reg_set_bit_mask(pcf, PCF50633_REG_MBCC7, PCF56033_MBCC7_USB_MASK, ++ bits); ++} ++EXPORT_SYMBOL_GPL(pcf50633_usb_curlim_set); ++ ++static ssize_t show_usblim(struct device *dev, struct device_attribute *attr, ++ char *buf) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct pcf50633_data *pcf = i2c_get_clientdata(client); ++ u_int8_t usblim = reg_read(pcf, PCF50633_REG_MBCC7) & ++ PCF56033_MBCC7_USB_MASK; ++ unsigned int ma; ++ ++ if (usblim == PCF50633_MBCC7_USB_1000mA) ++ ma = 1000; ++ else if (usblim == PCF50633_MBCC7_USB_500mA) ++ ma = 500; ++ else if (usblim == PCF50633_MBCC7_USB_100mA) ++ ma = 100; ++ else ++ ma = 0; ++ ++ return sprintf(buf, "%u\n", ma); ++} ++static DEVICE_ATTR(usb_curlim, S_IRUGO | S_IWUSR, show_usblim, NULL); ++ ++/* Enable/disable charging */ ++void pcf50633_charge_enable(struct pcf50633_data *pcf, int on) ++{ ++ u_int8_t bits; ++ ++ if (!(pcf->pdata->used_features & PCF50633_FEAT_MBC)) ++ return; ++ ++ if (on) { ++ pcf->flags |= PCF50633_F_CHG_ENABLED; ++ bits = PCF50633_MBCC1_CHGENA; ++ } else { ++ pcf->flags &= ~PCF50633_F_CHG_ENABLED; ++ bits = 0; ++ } ++ reg_set_bit_mask(pcf, PCF50633_REG_MBCC1, PCF50633_MBCC1_CHGENA, ++ bits); ++} ++EXPORT_SYMBOL_GPL(pcf50633_charge_enable); ++ ++#if 0 ++#define ONE 1000000 ++static u_int16_t adc_to_rntc(struct pcf50633_data *pcf, u_int16_t adc) ++{ ++ u_int32_t r_batt = (adc * pcf->pdata->r_fix_batt) / (1023 - adc); ++ u_int16_t r_ntc; ++ ++ /* The battery NTC has a parallell 10kOhms resistor */ ++ r_ntc = ONE / ((ONE/r_batt) - (ONE/pcf->pdata->r_fix_batt_par)); ++ ++ return r_ntc; ++} ++#endif ++static ssize_t show_battemp(struct device *dev, struct device_attribute *attr, ++ char *buf) ++{ ++ return sprintf(buf, "\n"); ++} ++static DEVICE_ATTR(battemp, S_IRUGO | S_IWUSR, show_battemp, NULL); ++#if 0 ++static u_int16_t adc_to_chg_milliamps(struct pcf50633_data *pcf, ++ u_int16_t adc_adcin1, ++ u_int16_t adc_batvolt) ++{ ++ u_int32_t res = ((adc_adcin1 - adc_batvolt) * 6000); ++ return res / (pcf->pdata->r_sense_milli * 1024 / 1000); ++} ++#endif ++static ssize_t show_chgcur(struct device *dev, struct device_attribute *attr, ++ char *buf) ++{ ++ return sprintf(buf, "\n"); ++} ++static DEVICE_ATTR(chgcur, S_IRUGO | S_IWUSR, show_chgcur, NULL); ++ ++static const char *chgmode_names[] = { ++ [PCF50633_MBCS2_MBC_PLAY] = "play-only", ++ [PCF50633_MBCS2_MBC_USB_PRE] = "pre", ++ [PCF50633_MBCS2_MBC_ADP_PRE] = "pre", ++ [PCF50633_MBCS2_MBC_USB_PRE_WAIT] = "pre-wait", ++ [PCF50633_MBCS2_MBC_ADP_PRE_WAIT] = "pre-wait", ++ [PCF50633_MBCS2_MBC_USB_FAST] = "fast", ++ [PCF50633_MBCS2_MBC_ADP_FAST] = "fast", ++ [PCF50633_MBCS2_MBC_USB_FAST_WAIT] = "fast-wait", ++ [PCF50633_MBCS2_MBC_ADP_FAST_WAIT] = "fast-wait", ++ [PCF50633_MBCS2_MBC_ADP_FAST_WAIT] = "bat-full", ++}; ++ ++static ssize_t show_chgmode(struct device *dev, struct device_attribute *attr, ++ char *buf) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct pcf50633_data *pcf = i2c_get_clientdata(client); ++ u_int8_t mbcs2 = reg_read(pcf, PCF50633_REG_MBCS2); ++ u_int8_t chgmod = (mbcs2 & PCF50633_MBCS2_MBC_MASK); ++ ++ return sprintf(buf, "%s\n", chgmode_names[chgmod]); ++} ++ ++static ssize_t set_chgmode(struct device *dev, struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct pcf50633_data *pcf = i2c_get_clientdata(client); ++ ++ /* As opposed to the PCF50606, we can only enable or disable ++ * charging and not directly jump into a certain mode! */ ++ ++ if (!strcmp(buf, "0\n")) ++ pcf50633_charge_enable(pcf, 0); ++ else ++ pcf50633_charge_enable(pcf, 1); ++ ++ return count; ++} ++ ++static DEVICE_ATTR(chgmode, S_IRUGO | S_IWUSR, show_chgmode, set_chgmode); ++ ++static const char *chgstate_names[] = { ++ [PCF50633_FIDX_CHG_ENABLED] = "enabled", ++ [PCF50633_FIDX_CHG_PRESENT] = "charger_present", ++ [PCF50633_FIDX_USB_PRESENT] = "usb_present", ++ [PCF50633_FIDX_CHG_ERR] = "error", ++ [PCF50633_FIDX_CHG_PROT] = "protection", ++ [PCF50633_FIDX_CHG_READY] = "ready", ++}; ++ ++static ssize_t show_chgstate(struct device *dev, struct device_attribute *attr, ++ char *buf) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct pcf50633_data *pcf = i2c_get_clientdata(client); ++ ++ char *b = buf; ++ int i; ++ ++ for (i = 0; i < 32; i++) ++ if (pcf->flags & (1 << i) && i < ARRAY_SIZE(chgstate_names)) ++ b += sprintf(b, "%s ", chgstate_names[i]); ++ ++ if (b > buf) ++ b += sprintf(b, "\n"); ++ ++ return b - buf; ++} ++static DEVICE_ATTR(chgstate, S_IRUGO | S_IWUSR, show_chgstate, NULL); ++ ++/*********************************************************************** ++ * APM emulation ++ ***********************************************************************/ ++ ++extern void (*apm_get_power_status)(struct apm_power_info *); ++ ++static void pcf50633_get_power_status(struct apm_power_info *info) ++{ ++ struct pcf50633_data *pcf = pcf50633_global; ++ u_int8_t chgmod = reg_read(pcf, PCF50633_REG_MBCS2) & ++ PCF50633_MBCS2_MBC_MASK; ++ ++ u_int16_t battvolt = pcf50633_battvolt(pcf); ++ ++ if (reg_read(pcf, PCF50633_REG_MBCS1) & ++ (PCF50633_MBCS1_USBPRES|PCF50633_MBCS1_ADAPTPRES)) ++ info->ac_line_status = APM_AC_ONLINE; ++ else ++ info->ac_line_status = APM_AC_OFFLINE; ++ ++ switch (chgmod) { ++ case PCF50633_MBCS2_MBC_PLAY: ++ case PCF50633_MBCS2_MBC_USB_PRE: ++ case PCF50633_MBCS2_MBC_USB_PRE_WAIT: ++ case PCF50633_MBCS2_MBC_USB_FAST_WAIT: ++ case PCF50633_MBCS2_MBC_ADP_PRE: ++ case PCF50633_MBCS2_MBC_ADP_PRE_WAIT: ++ case PCF50633_MBCS2_MBC_ADP_FAST_WAIT: ++ case PCF50633_MBCS2_MBC_BAT_FULL: ++ case PCF50633_MBCS2_MBC_HALT: ++ info->battery_life = battvolt_scale(battvolt); ++ break; ++ case PCF50633_MBCS2_MBC_USB_FAST: ++ case PCF50633_MBCS2_MBC_ADP_FAST: ++ info->battery_status = APM_BATTERY_STATUS_CHARGING; ++ info->battery_flag = APM_BATTERY_FLAG_CHARGING; ++ default: ++ break; ++ } ++} ++ ++/*********************************************************************** ++ * RTC ++ ***********************************************************************/ ++ ++struct pcf50633_time { ++ u_int8_t sec; ++ u_int8_t min; ++ u_int8_t hour; ++ u_int8_t wkday; ++ u_int8_t day; ++ u_int8_t month; ++ u_int8_t year; ++}; ++ ++static void pcf2rtc_time(struct rtc_time *rtc, struct pcf50633_time *pcf) ++{ ++ rtc->tm_sec = BCD2BIN(pcf->sec); ++ rtc->tm_min = BCD2BIN(pcf->min); ++ rtc->tm_hour = BCD2BIN(pcf->hour); ++ rtc->tm_wday = BCD2BIN(pcf->wkday); ++ rtc->tm_mday = BCD2BIN(pcf->day); ++ rtc->tm_mon = BCD2BIN(pcf->month); ++ rtc->tm_year = BCD2BIN(pcf->year) + 100; ++} ++ ++static void rtc2pcf_time(struct pcf50633_time *pcf, struct rtc_time *rtc) ++{ ++ pcf->sec = BIN2BCD(rtc->tm_sec); ++ pcf->min = BIN2BCD(rtc->tm_min); ++ pcf->hour = BIN2BCD(rtc->tm_hour); ++ pcf->wkday = BIN2BCD(rtc->tm_wday); ++ pcf->day = BIN2BCD(rtc->tm_mday); ++ pcf->month = BIN2BCD(rtc->tm_mon); ++ pcf->year = BIN2BCD(rtc->tm_year - 100); ++} ++ ++static int pcf50633_rtc_ioctl(struct device *dev, unsigned int cmd, ++ unsigned long arg) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct pcf50633_data *pcf = i2c_get_clientdata(client); ++ switch (cmd) { ++ case RTC_PIE_OFF: ++ /* disable periodic interrupt (hz tick) */ ++ pcf->flags &= ~PCF50633_F_RTC_SECOND; ++ reg_set_bit_mask(pcf, PCF50633_REG_INT1M, ++ PCF50633_INT1_SECOND, PCF50633_INT1_SECOND); ++ return 0; ++ case RTC_PIE_ON: ++ /* ensable periodic interrupt (hz tick) */ ++ pcf->flags |= PCF50633_F_RTC_SECOND; ++ reg_clear_bits(pcf, PCF50633_REG_INT1M, PCF50633_INT1_SECOND); ++ return 0; ++ } ++ return -ENOIOCTLCMD; ++} ++ ++static int pcf50633_rtc_read_time(struct device *dev, struct rtc_time *tm) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct pcf50633_data *pcf = i2c_get_clientdata(client); ++ struct pcf50633_time pcf_tm; ++ ++ mutex_lock(&pcf->lock); ++ pcf_tm.sec = __reg_read(pcf, PCF50633_REG_RTCSC); ++ pcf_tm.min = __reg_read(pcf, PCF50633_REG_RTCMN); ++ pcf_tm.hour = __reg_read(pcf, PCF50633_REG_RTCHR); ++ pcf_tm.wkday = __reg_read(pcf, PCF50633_REG_RTCWD); ++ pcf_tm.day = __reg_read(pcf, PCF50633_REG_RTCDT); ++ pcf_tm.month = __reg_read(pcf, PCF50633_REG_RTCMT); ++ pcf_tm.year = __reg_read(pcf, PCF50633_REG_RTCYR); ++ mutex_unlock(&pcf->lock); ++ ++ DEBUGP("PCF_TIME: %02x.%02x.%02x %02x:%02x:%02x\n", ++ pcf_tm.day, pcf_tm.month, pcf_tm.year, ++ pcf_tm.hour, pcf_tm.min, pcf_tm.sec); ++ ++ pcf2rtc_time(tm, &pcf_tm); ++ ++ DEBUGP("RTC_TIME: %u.%u.%u %u:%u:%u\n", ++ tm->tm_mday, tm->tm_mon, tm->tm_year, ++ tm->tm_hour, tm->tm_min, tm->tm_sec); ++ ++ return 0; ++} ++ ++static int pcf50633_rtc_set_time(struct device *dev, struct rtc_time *tm) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct pcf50633_data *pcf = i2c_get_clientdata(client); ++ struct pcf50633_time pcf_tm; ++ ++ DEBUGP("RTC_TIME: %u.%u.%u %u:%u:%u\n", ++ tm->tm_mday, tm->tm_mon, tm->tm_year, ++ tm->tm_hour, tm->tm_min, tm->tm_sec); ++ rtc2pcf_time(&pcf_tm, tm); ++ DEBUGP("PCF_TIME: %02x.%02x.%02x %02x:%02x:%02x\n", ++ pcf_tm.day, pcf_tm.month, pcf_tm.year, ++ pcf_tm.hour, pcf_tm.min, pcf_tm.sec); ++ ++ mutex_lock(&pcf->lock); ++ /* FIXME: disable second interrupt */ ++ __reg_write(pcf, PCF50633_REG_RTCSC, pcf_tm.sec); ++ __reg_write(pcf, PCF50633_REG_RTCMN, pcf_tm.min); ++ __reg_write(pcf, PCF50633_REG_RTCHR, pcf_tm.hour); ++ __reg_write(pcf, PCF50633_REG_RTCWD, pcf_tm.wkday); ++ __reg_write(pcf, PCF50633_REG_RTCDT, pcf_tm.day); ++ __reg_write(pcf, PCF50633_REG_RTCMT, pcf_tm.month); ++ __reg_write(pcf, PCF50633_REG_RTCYR, pcf_tm.year); ++ /* FIXME: re-enable second interrupt */ ++ mutex_unlock(&pcf->lock); ++ ++ return 0; ++} ++ ++static int pcf50633_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct pcf50633_data *pcf = i2c_get_clientdata(client); ++ struct pcf50633_time pcf_tm; ++ ++ mutex_lock(&pcf->lock); ++ alrm->enabled = ++ __reg_read(pcf, PCF50633_REG_INT1M) & PCF50633_INT1_ALARM ? 0 : 1; ++ pcf_tm.sec = __reg_read(pcf, PCF50633_REG_RTCSCA); ++ pcf_tm.min = __reg_read(pcf, PCF50633_REG_RTCMNA); ++ pcf_tm.hour = __reg_read(pcf, PCF50633_REG_RTCHRA); ++ pcf_tm.wkday = __reg_read(pcf, PCF50633_REG_RTCWDA); ++ pcf_tm.day = __reg_read(pcf, PCF50633_REG_RTCDTA); ++ pcf_tm.month = __reg_read(pcf, PCF50633_REG_RTCMTA); ++ pcf_tm.year = __reg_read(pcf, PCF50633_REG_RTCYRA); ++ mutex_unlock(&pcf->lock); ++ ++ pcf2rtc_time(&alrm->time, &pcf_tm); ++ ++ return 0; ++} ++ ++static int pcf50633_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct pcf50633_data *pcf = i2c_get_clientdata(client); ++ struct pcf50633_time pcf_tm; ++ u_int8_t irqmask; ++ ++ rtc2pcf_time(&pcf_tm, &alrm->time); ++ ++ mutex_lock(&pcf->lock); ++ ++ /* disable alarm interrupt */ ++ irqmask = __reg_read(pcf, PCF50633_REG_INT1M); ++ irqmask |= PCF50633_INT1_ALARM; ++ __reg_write(pcf, PCF50633_REG_INT1M, irqmask); ++ ++ __reg_write(pcf, PCF50633_REG_RTCSCA, pcf_tm.sec); ++ __reg_write(pcf, PCF50633_REG_RTCMNA, pcf_tm.min); ++ __reg_write(pcf, PCF50633_REG_RTCHRA, pcf_tm.hour); ++ __reg_write(pcf, PCF50633_REG_RTCWDA, pcf_tm.wkday); ++ __reg_write(pcf, PCF50633_REG_RTCDTA, pcf_tm.day); ++ __reg_write(pcf, PCF50633_REG_RTCMTA, pcf_tm.month); ++ __reg_write(pcf, PCF50633_REG_RTCYRA, pcf_tm.year); ++ ++ if (alrm->enabled) { ++ /* (re-)enaable alarm interrupt */ ++ irqmask = __reg_read(pcf, PCF50633_REG_INT1M); ++ irqmask &= ~PCF50633_INT1_ALARM; ++ __reg_write(pcf, PCF50633_REG_INT1M, irqmask); ++ } ++ ++ mutex_unlock(&pcf->lock); ++ ++ /* FIXME */ ++ return 0; ++} ++ ++static struct rtc_class_ops pcf50633_rtc_ops = { ++ .ioctl = pcf50633_rtc_ioctl, ++ .read_time = pcf50633_rtc_read_time, ++ .set_time = pcf50633_rtc_set_time, ++ .read_alarm = pcf50633_rtc_read_alarm, ++ .set_alarm = pcf50633_rtc_set_alarm, ++}; ++ ++/*********************************************************************** ++ * Backlight device ++ ***********************************************************************/ ++ ++static int pcf50633bl_get_intensity(struct backlight_device *bd) ++{ ++ struct pcf50633_data *pcf = bl_get_data(bd); ++ int intensity = reg_read(pcf, PCF50633_REG_LEDOUT); ++ ++ return intensity & 0x3f; ++} ++ ++static int pcf50633bl_set_intensity(struct backlight_device *bd) ++{ ++ struct pcf50633_data *pcf = bl_get_data(bd); ++ int intensity = bd->props.brightness; ++ int old_intensity = reg_read(pcf, PCF50633_REG_LEDOUT); ++ u_int8_t ledena; ++ int ret; ++ ++ if (bd->props.power != FB_BLANK_UNBLANK) ++ intensity = 0; ++ if (bd->props.fb_blank != FB_BLANK_UNBLANK) ++ intensity = 0; ++ ++ /* The PCF50633 seems to have some kind of oddity (bug?) when ++ * the intensity was 0, you need to completely switch it off ++ * and re-enable it, before it produces any output voltage again */ ++ ++ if (intensity != 0 && old_intensity == 0) { ++ ledena = reg_read(pcf, PCF50633_REG_LEDENA); ++ reg_write(pcf, PCF50633_REG_LEDENA, 0x00); ++ } ++ ++ ret = reg_set_bit_mask(pcf, PCF50633_REG_LEDOUT, 0x3f, ++ intensity); ++ ++ if (intensity != 0 && old_intensity == 0) ++ reg_write(pcf, PCF50633_REG_LEDENA, ledena); ++ ++ return ret; ++} ++ ++static struct backlight_ops pcf50633bl_ops = { ++ .get_brightness = pcf50633bl_get_intensity, ++ .update_status = pcf50633bl_set_intensity, ++}; ++ ++/* ++ * Charger type ++ */ ++ ++static ssize_t show_charger_type(struct device *dev, ++ struct device_attribute *attr, char *buf) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct pcf50633_data *pcf = i2c_get_clientdata(client); ++ static const char *names_charger_type[] = { ++ [CHARGER_TYPE_NONE] = "none", ++ [CHARGER_TYPE_HOSTUSB] = "host/500mA usb", ++ [CHARGER_TYPE_1A] = "charger 1A", ++ }; ++ static const char *names_charger_modes[] = { ++ [PCF50633_MBCC7_USB_1000mA] = "1A", ++ [PCF50633_MBCC7_USB_500mA] = "500mA", ++ [PCF50633_MBCC7_USB_100mA] = "100mA", ++ [PCF50633_MBCC7_USB_SUSPEND] = "suspend", ++ }; ++ int mode = reg_read(pcf, PCF50633_REG_MBCC7) & PCF56033_MBCC7_USB_MASK; ++ ++ return sprintf(buf, "%s mode %s\n", ++ names_charger_type[pcf->charger_type], ++ names_charger_modes[mode]); ++} ++ ++static DEVICE_ATTR(charger_type, 0444, show_charger_type, NULL); ++ ++/* ++ * Charger adc ++ */ ++ ++static ssize_t show_charger_adc(struct device *dev, ++ struct device_attribute *attr, char *buf) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct pcf50633_data *pcf = i2c_get_clientdata(client); ++ ++ return sprintf(buf, "%d\n", pcf->charger_adc_result_raw); ++} ++ ++static DEVICE_ATTR(charger_adc, 0444, show_charger_adc, NULL); ++ ++/* ++ * Dump regs ++ */ ++ ++static ssize_t show_dump_regs(struct device *dev, struct device_attribute *attr, ++ char *buf) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct pcf50633_data *pcf = i2c_get_clientdata(client); ++ u8 dump[16]; ++ int n, n1, idx = 0; ++ char *buf1 = buf; ++ static u8 address_no_read[] = { /* must be ascending */ ++ PCF50633_REG_INT1, ++ PCF50633_REG_INT2, ++ PCF50633_REG_INT3, ++ PCF50633_REG_INT4, ++ PCF50633_REG_INT5, ++ 0 /* terminator */ ++ }; ++ ++ for (n = 0; n < 256; n += sizeof(dump)) { ++ ++ for (n1 = 0; n1 < sizeof(dump); n1++) ++ if (n == address_no_read[idx]) { ++ idx++; ++ dump[n1] = 0x00; ++ } else ++ dump[n1] = reg_read(pcf, n + n1); ++ ++ hex_dump_to_buffer(dump, sizeof(dump), 16, 1, buf1, 128, 0); ++ buf1 += strlen(buf1); ++ *buf1++ = '\n'; ++ *buf1 = '\0'; ++ } ++ ++ return buf1 - buf; ++} ++ ++static DEVICE_ATTR(dump_regs, 0400, show_dump_regs, NULL); ++ ++ ++/*********************************************************************** ++ * Driver initialization ++ ***********************************************************************/ ++ ++#ifdef CONFIG_MACH_NEO1973_GTA02 ++/* We currently place those platform devices here to make sure the device ++ * suspend/resume order is correct */ ++static struct platform_device gta01_pm_gps_dev = { ++ .name = "neo1973-pm-gps", ++}; ++ ++static struct platform_device gta01_pm_bt_dev = { ++ .name = "neo1973-pm-bt", ++}; ++#endif ++ ++/* ++ * CARE! This table is modified at runtime! ++ */ ++static struct attribute *pcf_sysfs_entries[] = { ++ &dev_attr_voltage_auto.attr, ++ &dev_attr_voltage_down1.attr, ++ &dev_attr_voltage_down2.attr, ++ &dev_attr_voltage_memldo.attr, ++ &dev_attr_voltage_ldo1.attr, ++ &dev_attr_voltage_ldo2.attr, ++ &dev_attr_voltage_ldo3.attr, ++ &dev_attr_voltage_ldo4.attr, ++ &dev_attr_voltage_ldo5.attr, ++ &dev_attr_voltage_ldo6.attr, ++ &dev_attr_voltage_hcldo.attr, ++ &dev_attr_charger_type.attr, ++ &dev_attr_charger_adc.attr, ++ &dev_attr_dump_regs.attr, ++ NULL, /* going to add things at this point! */ ++ NULL, ++ NULL, ++ NULL, ++ NULL, ++ NULL, ++ NULL, ++}; ++ ++static struct attribute_group pcf_attr_group = { ++ .name = NULL, /* put in device directory */ ++ .attrs = pcf_sysfs_entries, ++}; ++ ++static void populate_sysfs_group(struct pcf50633_data *pcf) ++{ ++ int i = 0; ++ struct attribute **attr; ++ ++ for (attr = pcf_sysfs_entries; *attr; attr++) ++ i++; ++ ++ if (pcf->pdata->used_features & PCF50633_FEAT_MBC) { ++ pcf_sysfs_entries[i++] = &dev_attr_chgstate.attr; ++ pcf_sysfs_entries[i++] = &dev_attr_chgmode.attr; ++ pcf_sysfs_entries[i++] = &dev_attr_usb_curlim.attr; ++ } ++ ++ if (pcf->pdata->used_features & PCF50633_FEAT_CHGCUR) ++ pcf_sysfs_entries[i++] = &dev_attr_chgcur.attr; ++ ++ if (pcf->pdata->used_features & PCF50633_FEAT_BATVOLT) ++ pcf_sysfs_entries[i++] = &dev_attr_battvolt.attr; ++ ++ if (pcf->pdata->used_features & PCF50633_FEAT_BATTEMP) ++ pcf_sysfs_entries[i++] = &dev_attr_battemp.attr; ++ ++} ++ ++static int pcf50633_detect(struct i2c_adapter *adapter, int address, int kind) ++{ ++ struct i2c_client *new_client; ++ struct pcf50633_data *data; ++ int err = 0; ++ int irq; ++ ++ DEBUGP("entering\n"); ++ if (!pcf50633_pdev) { ++ printk(KERN_ERR "pcf50633: driver needs a platform_device!\n"); ++ return -EIO; ++ } ++ ++ irq = platform_get_irq(pcf50633_pdev, 0); ++ if (irq < 0) { ++ dev_err(&pcf50633_pdev->dev, "no irq in platform resources!\n"); ++ return -EIO; ++ } ++ ++ /* At the moment, we only support one PCF50633 in a system */ ++ if (pcf50633_global) { ++ dev_err(&pcf50633_pdev->dev, ++ "currently only one chip supported\n"); ++ return -EBUSY; ++ } ++ ++ if (!(data = kzalloc(sizeof(*data), GFP_KERNEL))) ++ return -ENOMEM; ++ ++ mutex_init(&data->lock); ++ mutex_init(&data->working_lock); ++ INIT_WORK(&data->work, pcf50633_work); ++ data->irq = irq; ++ data->working = 0; ++ data->onkey_seconds = -1; ++ data->pdata = pcf50633_pdev->dev.platform_data; ++ ++ new_client = &data->client; ++ i2c_set_clientdata(new_client, data); ++ new_client->addr = address; ++ new_client->adapter = adapter; ++ new_client->driver = &pcf50633_driver; ++ new_client->flags = 0; ++ strlcpy(new_client->name, "pcf50633", I2C_NAME_SIZE); ++ ++ /* now we try to detect the chip */ ++ ++ /* register with i2c core */ ++ if ((err = i2c_attach_client(new_client))) { ++ dev_err(&new_client->dev, ++ "error during i2c_attach_client()\n"); ++ goto exit_free; ++ } ++ ++ pcf50633_global = data; ++ ++ populate_sysfs_group(data); ++ ++ err = sysfs_create_group(&new_client->dev.kobj, &pcf_attr_group); ++ if (err) { ++ dev_err(&new_client->dev, "error creating sysfs group\n"); ++ goto exit_detach; ++ } ++ ++ /* create virtual charger 'device' */ ++ ++ /* register power off handler with core power management */ ++ pm_power_off = &pcf50633_go_standby; ++ ++ data->input_dev = input_allocate_device(); ++ if (!data->input_dev) ++ goto exit_sysfs; ++ ++ data->input_dev->name = "GTA02 PMU events"; ++ data->input_dev->phys = "FIXME"; ++ data->input_dev->id.bustype = BUS_I2C; ++ data->input_dev->cdev.dev = &new_client->dev; ++ ++ data->input_dev->evbit[0] = BIT(EV_KEY) | BIT(EV_PWR); ++ set_bit(KEY_POWER, data->input_dev->keybit); ++ set_bit(KEY_POWER2, data->input_dev->keybit); ++ set_bit(KEY_BATTERY, data->input_dev->keybit); ++ ++ err = input_register_device(data->input_dev); ++ if (err) ++ goto exit_sysfs; ++ ++ /* configure interrupt mask */ ++ reg_write(data, PCF50633_REG_INT1M, 0x00); /* we want SECOND to kick */ ++ reg_write(data, PCF50633_REG_INT2M, 0x00); ++ reg_write(data, PCF50633_REG_INT3M, 0x00); ++ reg_write(data, PCF50633_REG_INT4M, 0x00); ++ reg_write(data, PCF50633_REG_INT5M, 0x00); ++ ++ err = request_irq(irq, pcf50633_irq, IRQF_TRIGGER_FALLING, ++ "pcf50633", data); ++ if (err < 0) ++ goto exit_input; ++ ++ if (enable_irq_wake(irq) < 0) ++ dev_err(&new_client->dev, "IRQ %u cannot be enabled as wake-up" ++ "source in this hardware revision!", irq); ++ ++ if (data->pdata->used_features & PCF50633_FEAT_RTC) { ++ data->rtc = rtc_device_register("pcf50633", &new_client->dev, ++ &pcf50633_rtc_ops, THIS_MODULE); ++ if (IS_ERR(data->rtc)) { ++ err = PTR_ERR(data->rtc); ++ goto exit_irq; ++ } ++ } ++ ++ if (data->pdata->used_features & PCF50633_FEAT_PWM_BL) { ++ data->backlight = backlight_device_register("pcf50633-bl", ++ &new_client->dev, ++ data, ++ &pcf50633bl_ops); ++ if (!data->backlight) ++ goto exit_rtc; ++ /* FIXME: are we sure we want default == off? */ ++ data->backlight->props.max_brightness = 0x3f; ++ data->backlight->props.power = FB_BLANK_UNBLANK; ++ data->backlight->props.fb_blank = FB_BLANK_UNBLANK; ++ data->backlight->props.brightness = ++ data->backlight->props.max_brightness; ++ backlight_update_status(data->backlight); ++ } ++ ++ apm_get_power_status = pcf50633_get_power_status; ++ ++#ifdef CONFIG_MACH_NEO1973_GTA02 ++ if (machine_is_neo1973_gta02()) { ++ gta01_pm_gps_dev.dev.parent = &new_client->dev; ++ gta01_pm_bt_dev.dev.parent = &new_client->dev; ++ platform_device_register(>a01_pm_bt_dev); ++ platform_device_register(>a01_pm_gps_dev); ++ } ++#endif ++ ++ return 0; ++exit_rtc: ++ if (data->pdata->used_features & PCF50633_FEAT_RTC) ++ rtc_device_unregister(pcf50633_global->rtc); ++exit_irq: ++ free_irq(pcf50633_global->irq, pcf50633_global); ++exit_input: ++ input_unregister_device(data->input_dev); ++exit_sysfs: ++ pm_power_off = NULL; ++ sysfs_remove_group(&new_client->dev.kobj, &pcf_attr_group); ++exit_detach: ++ i2c_detach_client(new_client); ++exit_free: ++ kfree(data); ++ pcf50633_global = NULL; ++ return err; ++} ++ ++static int pcf50633_attach_adapter(struct i2c_adapter *adapter) ++{ ++ DEBUGP("entering, calling i2c_probe\n"); ++ return i2c_probe(adapter, &addr_data, &pcf50633_detect); ++} ++ ++static int pcf50633_detach_client(struct i2c_client *client) ++{ ++ struct pcf50633_data *pcf = i2c_get_clientdata(client); ++ ++ DEBUGP("entering\n"); ++ ++ apm_get_power_status = NULL; ++ ++ free_irq(pcf->irq, pcf); ++ ++ input_unregister_device(pcf->input_dev); ++ ++ if (pcf->pdata->used_features & PCF50633_FEAT_PWM_BL) ++ backlight_device_unregister(pcf->backlight); ++ ++ if (pcf->pdata->used_features & PCF50633_FEAT_RTC) ++ rtc_device_unregister(pcf->rtc); ++ ++#ifdef CONFIG_MACH_NEO1973_GTA02 ++ if (machine_is_neo1973_gta02()) { ++ platform_device_unregister(>a01_pm_bt_dev); ++ platform_device_unregister(>a01_pm_gps_dev); ++ } ++#endif ++ ++ sysfs_remove_group(&client->dev.kobj, &pcf_attr_group); ++ ++ pm_power_off = NULL; ++ ++ kfree(pcf); ++ ++ return 0; ++} ++ ++#ifdef CONFIG_PM ++#define INT1M_RESUMERS (PCF50633_INT1_ADPINS | \ ++ PCF50633_INT1_ADPREM | \ ++ PCF50633_INT1_USBINS | \ ++ PCF50633_INT1_USBREM | \ ++ PCF50633_INT1_ALARM) ++#define INT2M_RESUMERS (PCF50633_INT2_ONKEYF) ++#define INT3M_RESUMERS (PCF50633_INT3_BATFULL | \ ++ PCF50633_INT3_CHGHALT | \ ++ PCF50633_INT3_THLIMON | \ ++ PCF50633_INT3_THLIMOFF | \ ++ PCF50633_INT3_USBLIMON | \ ++ PCF50633_INT3_USBLIMOFF | \ ++ PCF50633_INT3_ONKEY1S) ++#define INT4M_RESUMERS (PCF50633_INT4_LOWSYS | \ ++ PCF50633_INT4_LOWBAT | \ ++ PCF50633_INT4_HIGHTMP) ++#define INT5M_RESUMERS (0) ++ ++static int pcf50633_suspend(struct device *dev, pm_message_t state) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct pcf50633_data *pcf = i2c_get_clientdata(client); ++ int i; ++ ++ /* The general idea is to power down all unused power supplies, ++ * and then mask all PCF50606 interrup sources but EXTONR, ONKEYF ++ * and ALARM */ ++ ++ mutex_lock(&pcf->lock); ++ ++ /* Save all registers that don't "survive" standby state */ ++ pcf->standby_regs.ooctim2 = __reg_read(pcf, PCF50633_REG_OOCTIM2); ++ pcf->standby_regs.autoout = __reg_read(pcf, PCF50633_REG_AUTOOUT); ++ pcf->standby_regs.autoena = __reg_read(pcf, PCF50633_REG_AUTOENA); ++ pcf->standby_regs.automxc = __reg_read(pcf, PCF50633_REG_AUTOMXC); ++ pcf->standby_regs.down1out = __reg_read(pcf, PCF50633_REG_DOWN1OUT); ++ pcf->standby_regs.down1mxc = __reg_read(pcf, PCF50633_REG_DOWN1MXC); ++ pcf->standby_regs.down2out = __reg_read(pcf, PCF50633_REG_DOWN2OUT); ++ pcf->standby_regs.down2ena = __reg_read(pcf, PCF50633_REG_DOWN2ENA); ++ pcf->standby_regs.memldoout = __reg_read(pcf, PCF50633_REG_MEMLDOOUT); ++ pcf->standby_regs.memldoena = __reg_read(pcf, PCF50633_REG_MEMLDOENA); ++ pcf->standby_regs.ledout = __reg_read(pcf, PCF50633_REG_LEDOUT); ++ pcf->standby_regs.ledena = __reg_read(pcf, PCF50633_REG_LEDENA); ++ pcf->standby_regs.leddim = __reg_read(pcf, PCF50633_REG_LEDDIM); ++ /* FIXME: one big read? */ ++ for (i = 0; i < 7; i++) { ++ u_int8_t reg_out = PCF50633_REG_LDO1OUT + 2*i; ++ pcf->standby_regs.ldo[i].out = __reg_read(pcf, reg_out); ++ pcf->standby_regs.ldo[i].ena = __reg_read(pcf, reg_out+1); ++ } ++ ++ /* switch off power supplies that are not needed during suspend */ ++ for (i = 0; i < __NUM_PCF50633_REGULATORS; i++) { ++ if (!(pcf->pdata->rails[i].flags & PMU_VRAIL_F_SUSPEND_ON)) { ++ u_int8_t tmp; ++ ++ DEBUGP("disabling pcf50633 regulator %u\n", i); ++ /* we cannot use pcf50633_onoff_set() because we're ++ * already under the mutex */ ++ tmp = __reg_read(pcf, regulator_registers[i]+1); ++ tmp &= 0xfe; ++ __reg_write(pcf, regulator_registers[i]+1, tmp); ++ } ++ } ++ ++ pcf->standby_regs.int1m = __reg_read(pcf, PCF50633_REG_INT1M); ++ pcf->standby_regs.int2m = __reg_read(pcf, PCF50633_REG_INT2M); ++ pcf->standby_regs.int3m = __reg_read(pcf, PCF50633_REG_INT3M); ++ pcf->standby_regs.int4m = __reg_read(pcf, PCF50633_REG_INT4M); ++ pcf->standby_regs.int5m = __reg_read(pcf, PCF50633_REG_INT5M); ++ __reg_write(pcf, PCF50633_REG_INT1M, ~INT1M_RESUMERS & 0xff); ++ __reg_write(pcf, PCF50633_REG_INT2M, ~INT2M_RESUMERS & 0xff); ++ __reg_write(pcf, PCF50633_REG_INT3M, ~INT3M_RESUMERS & 0xff); ++ __reg_write(pcf, PCF50633_REG_INT4M, ~INT4M_RESUMERS & 0xff); ++ __reg_write(pcf, PCF50633_REG_INT5M, ~INT5M_RESUMERS & 0xff); ++ ++ mutex_unlock(&pcf->lock); ++ ++ return 0; ++} ++ ++static int pcf50633_resume(struct device *dev) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct pcf50633_data *pcf = i2c_get_clientdata(client); ++ int i; ++ ++ mutex_lock(&pcf->lock); ++ ++ /* Resume all saved registers that don't "survive" standby state */ ++ __reg_write(pcf, PCF50633_REG_INT1M, pcf->standby_regs.int1m); ++ __reg_write(pcf, PCF50633_REG_INT2M, pcf->standby_regs.int2m); ++ __reg_write(pcf, PCF50633_REG_INT3M, pcf->standby_regs.int3m); ++ __reg_write(pcf, PCF50633_REG_INT4M, pcf->standby_regs.int4m); ++ __reg_write(pcf, PCF50633_REG_INT5M, pcf->standby_regs.int5m); ++ ++ __reg_write(pcf, PCF50633_REG_OOCTIM2, pcf->standby_regs.ooctim2); ++ __reg_write(pcf, PCF50633_REG_AUTOOUT, pcf->standby_regs.autoout); ++ __reg_write(pcf, PCF50633_REG_AUTOMXC, pcf->standby_regs.automxc); ++ __reg_write(pcf, PCF50633_REG_DOWN1OUT, pcf->standby_regs.down1out); ++ __reg_write(pcf, PCF50633_REG_DOWN1MXC, pcf->standby_regs.down1mxc); ++ __reg_write(pcf, PCF50633_REG_DOWN2OUT, pcf->standby_regs.down2out); ++ __reg_write(pcf, PCF50633_REG_DOWN2ENA, pcf->standby_regs.down2ena); ++ __reg_write(pcf, PCF50633_REG_MEMLDOOUT, pcf->standby_regs.memldoout); ++ __reg_write(pcf, PCF50633_REG_MEMLDOENA, pcf->standby_regs.memldoena); ++ __reg_write(pcf, PCF50633_REG_LEDOUT, pcf->standby_regs.ledout); ++ __reg_write(pcf, PCF50633_REG_LEDENA, pcf->standby_regs.ledena); ++ __reg_write(pcf, PCF50633_REG_LEDDIM, pcf->standby_regs.leddim); ++ /* FIXME: one big read? */ ++ for (i = 0; i < 7; i++) { ++ u_int8_t reg_out = PCF50633_REG_LDO1OUT + 2*i; ++ __reg_write(pcf, reg_out, pcf->standby_regs.ldo[i].out); ++ __reg_write(pcf, reg_out+1, pcf->standby_regs.ldo[i].ena); ++ } ++ ++ mutex_unlock(&pcf->lock); ++ ++ pcf50633_irq(pcf->irq, pcf); ++ ++ return 0; ++} ++#else ++#define pcf50633_suspend NULL ++#define pcf50633_resume NULL ++#endif ++ ++static struct i2c_driver pcf50633_driver = { ++ .driver = { ++ .name = "pcf50633", ++ .suspend= pcf50633_suspend, ++ .resume = pcf50633_resume, ++ }, ++ .id = I2C_DRIVERID_PCF50633, ++ .attach_adapter = pcf50633_attach_adapter, ++ .detach_client = pcf50633_detach_client, ++}; ++ ++/* platform driver, since i2c devices don't have platform_data */ ++static int __init pcf50633_plat_probe(struct platform_device *pdev) ++{ ++ struct pcf50633_platform_data *pdata = pdev->dev.platform_data; ++ ++ if (!pdata) ++ return -ENODEV; ++ ++ pcf50633_pdev = pdev; ++ ++ return 0; ++} ++ ++static int pcf50633_plat_remove(struct platform_device *pdev) ++{ ++ return 0; ++} ++ ++static struct platform_driver pcf50633_plat_driver = { ++ .probe = pcf50633_plat_probe, ++ .remove = pcf50633_plat_remove, ++ .driver = { ++ .owner = THIS_MODULE, ++ .name = "pcf50633", ++ }, ++}; ++ ++static int __init pcf50633_init(void) ++{ ++ int rc; ++ ++ if (!(rc = platform_driver_register(&pcf50633_plat_driver))) ++ rc = i2c_add_driver(&pcf50633_driver); ++ ++ return rc; ++} ++ ++static void pcf50633_exit(void) ++{ ++ i2c_del_driver(&pcf50633_driver); ++ platform_driver_unregister(&pcf50633_plat_driver); ++} ++ ++MODULE_DESCRIPTION("I2C chip driver for NXP PCF50633 power management unit"); ++MODULE_AUTHOR("Harald Welte "); ++MODULE_LICENSE("GPL"); ++ ++module_init(pcf50633_init); ++module_exit(pcf50633_exit); +diff --git a/drivers/i2c/chips/pcf50633.h b/drivers/i2c/chips/pcf50633.h +new file mode 100644 +index 0000000..9aad206 +--- /dev/null ++++ b/drivers/i2c/chips/pcf50633.h +@@ -0,0 +1,402 @@ ++#ifndef _PCF50633_H ++#define _PCF50633_H ++ ++/* Philips PCF50633 Power Managemnt Unit (PMU) driver ++ * (C) 2006-2007 by OpenMoko, Inc. ++ * Author: Harald Welte ++ * ++ */ ++ ++enum pfc50633_regs { ++ PCF50633_REG_VERSION = 0x00, ++ PCF50633_REG_VARIANT = 0x01, ++ PCF50633_REG_INT1 = 0x02, /* Interrupt Status */ ++ PCF50633_REG_INT2 = 0x03, /* Interrupt Status */ ++ PCF50633_REG_INT3 = 0x04, /* Interrupt Status */ ++ PCF50633_REG_INT4 = 0x05, /* Interrupt Status */ ++ PCF50633_REG_INT5 = 0x06, /* Interrupt Status */ ++ PCF50633_REG_INT1M = 0x07, /* Interrupt Mask */ ++ PCF50633_REG_INT2M = 0x08, /* Interrupt Mask */ ++ PCF50633_REG_INT3M = 0x09, /* Interrupt Mask */ ++ PCF50633_REG_INT4M = 0x0a, /* Interrupt Mask */ ++ PCF50633_REG_INT5M = 0x0b, /* Interrupt Mask */ ++ PCF50633_REG_OOCSHDWN = 0x0c, ++ PCF50633_REG_OOCWAKE = 0x0d, ++ PCF50633_REG_OOCTIM1 = 0x0e, ++ PCF50633_REG_OOCTIM2 = 0x0f, ++ PCF50633_REG_OOCMODE = 0x10, ++ PCF50633_REG_OOCCTL = 0x11, ++ PCF50633_REG_OOCSTAT = 0x12, ++ PCF50633_REG_GPIOCTL = 0x13, ++ PCF50633_REG_GPIO1CFG = 0x14, ++ PCF50633_REG_GPIO2CFG = 0x15, ++ PCF50633_REG_GPIO3CFG = 0x16, ++ PCF50633_REG_GPOCFG = 0x17, ++ PCF50633_REG_BVMCTL = 0x18, ++ PCF50633_REG_SVMCTL = 0x19, ++ PCF50633_REG_AUTOOUT = 0x1a, ++ PCF50633_REG_AUTOENA = 0x1b, ++ PCF50633_REG_AUTOCTL = 0x1c, ++ PCF50633_REG_AUTOMXC = 0x1d, ++ PCF50633_REG_DOWN1OUT = 0x1e, ++ PCF50633_REG_DOWN1ENA = 0x1f, ++ PCF50633_REG_DOWN1CTL = 0x20, ++ PCF50633_REG_DOWN1MXC = 0x21, ++ PCF50633_REG_DOWN2OUT = 0x22, ++ PCF50633_REG_DOWN2ENA = 0x23, ++ PCF50633_REG_DOWN2CTL = 0x24, ++ PCF50633_REG_DOWN2MXC = 0x25, ++ PCF50633_REG_MEMLDOOUT = 0x26, ++ PCF50633_REG_MEMLDOENA = 0x27, ++ PCF50633_REG_LEDOUT = 0x28, ++ PCF50633_REG_LEDENA = 0x29, ++ PCF50633_REG_LEDCTL = 0x2a, ++ PCF50633_REG_LEDDIM = 0x2b, ++ /* reserved */ ++ PCF50633_REG_LDO1OUT = 0x2d, ++ PCF50633_REG_LDO1ENA = 0x2e, ++ PCF50633_REG_LDO2OUT = 0x2f, ++ PCF50633_REG_LDO2ENA = 0x30, ++ PCF50633_REG_LDO3OUT = 0x31, ++ PCF50633_REG_LDO3ENA = 0x32, ++ PCF50633_REG_LDO4OUT = 0x33, ++ PCF50633_REG_LDO4ENA = 0x34, ++ PCF50633_REG_LDO5OUT = 0x35, ++ PCF50633_REG_LDO5ENA = 0x36, ++ PCF50633_REG_LDO6OUT = 0x37, ++ PCF50633_REG_LDO6ENA = 0x38, ++ PCF50633_REG_HCLDOOUT = 0x39, ++ PCF50633_REG_HCLDOENA = 0x3a, ++ PCF50633_REG_STBYCTL1 = 0x3b, ++ PCF50633_REG_STBYCTL2 = 0x3c, ++ PCF50633_REG_DEBPF1 = 0x3d, ++ PCF50633_REG_DEBPF2 = 0x3e, ++ PCF50633_REG_DEBPF3 = 0x3f, ++ PCF50633_REG_HCLDOOVL = 0x40, ++ PCF50633_REG_DCDCSTAT = 0x41, ++ PCF50633_REG_LDOSTAT = 0x42, ++ PCF50633_REG_MBCC1 = 0x43, ++ PCF50633_REG_MBCC2 = 0x44, ++ PCF50633_REG_MBCC3 = 0x45, ++ PCF50633_REG_MBCC4 = 0x46, ++ PCF50633_REG_MBCC5 = 0x47, ++ PCF50633_REG_MBCC6 = 0x48, ++ PCF50633_REG_MBCC7 = 0x49, ++ PCF50633_REG_MBCC8 = 0x4a, ++ PCF50633_REG_MBCS1 = 0x4b, ++ PCF50633_REG_MBCS2 = 0x4c, ++ PCF50633_REG_MBCS3 = 0x4d, ++ PCF50633_REG_BBCCTL = 0x4e, ++ PCF50633_REG_ALMGAIN = 0x4f, ++ PCF50633_REG_ALMDATA = 0x50, ++ /* reserved */ ++ PCF50633_REG_ADCC3 = 0x52, ++ PCF50633_REG_ADCC2 = 0x53, ++ PCF50633_REG_ADCC1 = 0x54, ++ PCF50633_REG_ADCS1 = 0x55, ++ PCF50633_REG_ADCS2 = 0x56, ++ PCF50633_REG_ADCS3 = 0x57, ++ /* reserved */ ++ PCF50633_REG_RTCSC = 0x59, /* Second */ ++ PCF50633_REG_RTCMN = 0x5a, /* Minute */ ++ PCF50633_REG_RTCHR = 0x5b, /* Hour */ ++ PCF50633_REG_RTCWD = 0x5c, /* Weekday */ ++ PCF50633_REG_RTCDT = 0x5d, /* Day */ ++ PCF50633_REG_RTCMT = 0x5e, /* Month */ ++ PCF50633_REG_RTCYR = 0x5f, /* Year */ ++ PCF50633_REG_RTCSCA = 0x60, /* Alarm Second */ ++ PCF50633_REG_RTCMNA = 0x61, /* Alarm Minute */ ++ PCF50633_REG_RTCHRA = 0x62, /* Alarm Hour */ ++ PCF50633_REG_RTCWDA = 0x63, /* Alarm Weekday */ ++ PCF50633_REG_RTCDTA = 0x64, /* Alarm Day */ ++ PCF50633_REG_RTCMTA = 0x65, /* Alarm Month */ ++ PCF50633_REG_RTCYRA = 0x66, /* Alarm Year */ ++ ++ PCF50633_REG_MEMBYTE0 = 0x67, ++ PCF50633_REG_MEMBYTE1 = 0x68, ++ PCF50633_REG_MEMBYTE2 = 0x69, ++ PCF50633_REG_MEMBYTE3 = 0x6a, ++ PCF50633_REG_MEMBYTE4 = 0x6b, ++ PCF50633_REG_MEMBYTE5 = 0x6c, ++ PCF50633_REG_MEMBYTE6 = 0x6d, ++ PCF50633_REG_MEMBYTE7 = 0x6e, ++ /* reserved */ ++ PCF50633_REG_DCDCPFM = 0x84, ++ __NUM_PCF50633_REGS ++}; ++ ++enum pcf50633_reg_int1 { ++ PCF50633_INT1_ADPINS = 0x01, /* Adapter inserted */ ++ PCF50633_INT1_ADPREM = 0x02, /* Adapter removed */ ++ PCF50633_INT1_USBINS = 0x04, /* USB inserted */ ++ PCF50633_INT1_USBREM = 0x08, /* USB removed */ ++ /* reserved */ ++ PCF50633_INT1_ALARM = 0x40, /* RTC alarm time is reached */ ++ PCF50633_INT1_SECOND = 0x80, /* RTC periodic second interrupt */ ++}; ++ ++enum pcf50633_reg_int2 { ++ PCF50633_INT2_ONKEYR = 0x01, /* ONKEY rising edge */ ++ PCF50633_INT2_ONKEYF = 0x02, /* ONKEY falling edge */ ++ PCF50633_INT2_EXTON1R = 0x04, /* EXTON1 rising edge */ ++ PCF50633_INT2_EXTON1F = 0x08, /* EXTON1 falling edge */ ++ PCF50633_INT2_EXTON2R = 0x10, /* EXTON2 rising edge */ ++ PCF50633_INT2_EXTON2F = 0x20, /* EXTON2 falling edge */ ++ PCF50633_INT2_EXTON3R = 0x40, /* EXTON3 rising edge */ ++ PCF50633_INT2_EXTON3F = 0x80, /* EXTON3 falling edge */ ++}; ++ ++enum pcf50633_reg_int3 { ++ PCF50633_INT3_BATFULL = 0x01, /* Battery full */ ++ PCF50633_INT3_CHGHALT = 0x02, /* Charger halt */ ++ PCF50633_INT3_THLIMON = 0x04, ++ PCF50633_INT3_THLIMOFF = 0x08, ++ PCF50633_INT3_USBLIMON = 0x10, ++ PCF50633_INT3_USBLIMOFF = 0x20, ++ PCF50633_INT3_ADCRDY = 0x40, /* ADC conversion finished */ ++ PCF50633_INT3_ONKEY1S = 0x80, /* ONKEY pressed 1 second */ ++}; ++ ++enum pcf50633_reg_int4 { ++ PCF50633_INT4_LOWSYS = 0x01, ++ PCF50633_INT4_LOWBAT = 0x02, ++ PCF50633_INT4_HIGHTMP = 0x04, ++ PCF50633_INT4_AUTOPWRFAIL = 0x08, ++ PCF50633_INT4_DWN1PWRFAIL = 0x10, ++ PCF50633_INT4_DWN2PWRFAIL = 0x20, ++ PCF50633_INT4_LEDPWRFAIL = 0x40, ++ PCF50633_INT4_LEDOVP = 0x80, ++}; ++ ++enum pcf50633_reg_int5 { ++ PCF50633_INT5_LDO1PWRFAIL = 0x01, ++ PCF50633_INT5_LDO2PWRFAIL = 0x02, ++ PCF50633_INT5_LDO3PWRFAIL = 0x04, ++ PCF50633_INT5_LDO4PWRFAIL = 0x08, ++ PCF50633_INT5_LDO5PWRFAIL = 0x10, ++ PCF50633_INT5_LDO6PWRFAIL = 0x20, ++ PCF50633_INT5_HCLDOPWRFAIL = 0x40, ++ PCF50633_INT5_HCLDOOVL = 0x80, ++}; ++ ++enum pcf50633_reg_oocshdwn { ++ PCF50633_OOCSHDWN_GOSTDBY = 0x01, ++ PCF50633_OOCSHDWN_TOTRST = 0x04, ++ PCF50633_OOCSHDWN_COLDBOOT = 0x08, ++}; ++ ++enum pcf50633_reg_oocwake { ++ PCF50633_OOCWAKE_ONKEY = 0x01, ++ PCF50633_OOCWAKE_EXTON1 = 0x02, ++ PCF50633_OOCWAKE_EXTON2 = 0x04, ++ PCF50633_OOCWAKE_EXTON3 = 0x08, ++ PCF50633_OOCWAKE_RTC = 0x10, ++ /* reserved */ ++ PCF50633_OOCWAKE_USB = 0x40, ++ PCF50633_OOCWAKE_ADP = 0x80, ++}; ++ ++enum pcf50633_reg_mbcc1 { ++ PCF50633_MBCC1_CHGENA = 0x01, /* Charger enable */ ++ PCF50633_MBCC1_AUTOSTOP = 0x02, ++ PCF50633_MBCC1_AUTORES = 0x04, /* automatic resume */ ++ PCF50633_MBCC1_RESUME = 0x08, /* explicit resume cmd */ ++ PCF50633_MBCC1_RESTART = 0x10, /* restart charging */ ++ PCF50633_MBCC1_PREWDTIME_60M = 0x20, /* max. precharging time */ ++ PCF50633_MBCC1_WDTIME_1H = 0x00, ++ PCF50633_MBCC1_WDTIME_2H = 0x40, ++ PCF50633_MBCC1_WDTIME_4H = 0x80, ++ PCF50633_MBCC1_WDTIME_6H = 0xc0, ++}; ++#define PCF50633_MBCC1_WDTIME_MASK 0xc0 ++ ++enum pcf50633_reg_mbcc2 { ++ PCF50633_MBCC2_VBATCOND_2V7 = 0x00, ++ PCF50633_MBCC2_VBATCOND_2V85 = 0x01, ++ PCF50633_MBCC2_VBATCOND_3V0 = 0x02, ++ PCF50633_MBCC2_VBATCOND_3V15 = 0x03, ++ PCF50633_MBCC2_VMAX_4V = 0x00, ++ PCF50633_MBCC2_VMAX_4V20 = 0x28, ++ PCF50633_MBCC2_VRESDEBTIME_64S = 0x80, /* debounce time (32/64sec) */ ++}; ++#define PCF50633_MBCC2_VBATCOND_MASK 0x03 ++#define PCF50633_MBCC2_VMAX_MASK 0x3c ++ ++enum pcf50633_reg_adcc1 { ++ PCF50633_ADCC1_ADCSTART = 0x01, ++ PCF50633_ADCC1_RES_10BIT = 0x02, ++ PCF50633_ADCC1_AVERAGE_NO = 0x00, ++ PCF50633_ADCC1_AVERAGE_4 = 0x04, ++ PCF50633_ADCC1_AVERAGE_8 = 0x08, ++ PCF50633_ADCC1_AVERAGE_16 = 0x0c, ++ ++ PCF50633_ADCC1_MUX_BATSNS_RES = 0x00, ++ PCF50633_ADCC1_MUX_BATSNS_SUBTR = 0x10, ++ PCF50633_ADCC1_MUX_ADCIN2_RES = 0x20, ++ PCF50633_ADCC1_MUX_ADCIN2_SUBTR = 0x30, ++ PCF50633_ADCC1_MUX_BATTEMP = 0x60, ++ PCF50633_ADCC1_MUX_ADCIN1 = 0x70, ++}; ++#define PCF50633_ADCC1_AVERAGE_MASK 0x0c ++#define PCF50633_ADCC1_ADCMUX_MASK 0xf0 ++ ++enum pcf50633_reg_adcc2 { ++ PCF50633_ADCC2_RATIO_NONE = 0x00, ++ PCF50633_ADCC2_RATIO_BATTEMP = 0x01, ++ PCF50633_ADCC2_RATIO_ADCIN1 = 0x02, ++ PCF50633_ADCC2_RATIO_BOTH = 0x03, ++ PCF50633_ADCC2_RATIOSETTL_100US = 0x04, ++}; ++#define PCF50633_ADCC2_RATIO_MASK 0x03 ++ ++enum pcf50633_reg_adcc3 { ++ PCF50633_ADCC3_ACCSW_EN = 0x01, ++ PCF50633_ADCC3_NTCSW_EN = 0x04, ++ PCF50633_ADCC3_RES_DIV_TWO = 0x10, ++ PCF50633_ADCC3_RES_DIV_THREE = 0x00, ++}; ++ ++enum pcf50633_reg_adcs3 { ++ PCF50633_ADCS3_REF_NTCSW = 0x00, ++ PCF50633_ADCS3_REF_ACCSW = 0x10, ++ PCF50633_ADCS3_REF_2V0 = 0x20, ++ PCF50633_ADCS3_REF_VISA = 0x30, ++ PCF50633_ADCS3_REF_2V0_2 = 0x70, ++ PCF50633_ADCS3_ADCRDY = 0x80, ++}; ++#define PCF50633_ADCS3_ADCDAT1L_MASK 0x03 ++#define PCF50633_ADCS3_ADCDAT2L_MASK 0x0c ++#define PCF50633_ADCS3_ADCDAT2L_SHIFT 2 ++#define PCF50633_ASCS3_REF_MASK 0x70 ++ ++enum pcf50633_regulator_enable { ++ PCF50633_REGULATOR_ON = 0x01, ++ PCF50633_REGULATOR_ON_GPIO1 = 0x02, ++ PCF50633_REGULATOR_ON_GPIO2 = 0x04, ++ PCF50633_REGULATOR_ON_GPIO3 = 0x08, ++}; ++#define PCF50633_REGULATOR_ON_MASK 0x0f ++ ++enum pcf50633_regulator_phase { ++ PCF50633_REGULATOR_ACTPH1 = 0x00, ++ PCF50633_REGULATOR_ACTPH2 = 0x10, ++ PCF50633_REGULATOR_ACTPH3 = 0x20, ++ PCF50633_REGULATOR_ACTPH4 = 0x30, ++}; ++#define PCF50633_REGULATOR_ACTPH_MASK 0x30 ++ ++enum pcf50633_reg_gpocfg { ++ PCF50633_GPOCFG_GPOSEL_0 = 0x00, ++ PCF50633_GPOCFG_GPOSEL_LED_NFET = 0x01, ++ PCF50633_GPOCFG_GPOSEL_SYSxOK = 0x02, ++ PCF50633_GPOCFG_GPOSEL_CLK32K = 0x03, ++ PCF50633_GPOCFG_GPOSEL_ADAPUSB = 0x04, ++ PCF50633_GPOCFG_GPOSEL_USBxOK = 0x05, ++ PCF50633_GPOCFG_GPOSEL_ACTPH4 = 0x06, ++ PCF50633_GPOCFG_GPOSEL_1 = 0x07, ++ PCF50633_GPOCFG_GPOSEL_INVERSE = 0x08, ++}; ++#define PCF50633_GPOCFG_GPOSEL_MASK 0x07 ++ ++#if 0 ++enum pcf50633_reg_mbcc1 { ++ PCF50633_MBCC1_CHGENA = 0x01, ++ PCF50633_MBCC1_AUTOSTOP = 0x02, ++ PCF50633_MBCC1_AUTORES = 0x04, ++ PCF50633_MBCC1_RESUME = 0x08, ++ PCF50633_MBCC1_RESTART = 0x10, ++ PCF50633_MBCC1_PREWDTIME_30MIN = 0x00, ++ PCF50633_MBCC1_PREWDTIME_60MIN = 0x20, ++ PCF50633_MBCC1_WDTIME_2HRS = 0x40, ++ PCF50633_MBCC1_WDTIME_4HRS = 0x80, ++ PCF50633_MBCC1_WDTIME_6HRS = 0xc0, ++}; ++ ++enum pcf50633_reg_mbcc2 { ++ PCF50633_MBCC2_VBATCOND_2V7 = 0x00, ++ PCF50633_MBCC2_VBATCOND_2V85 = 0x01, ++ PCF50633_MBCC2_VBATCOND_3V0 = 0x02, ++ PCF50633_MBCC2_VBATCOND_3V15 = 0x03, ++ PCF50633_MBCC2_VRESDEBTIME_64S = 0x80, ++}; ++#define PCF50633_MBCC2_VMAX_MASK 0x3c ++#endif ++ ++enum pcf50633_reg_mbcc7 { ++ PCF50633_MBCC7_USB_100mA = 0x00, ++ PCF50633_MBCC7_USB_500mA = 0x01, ++ PCF50633_MBCC7_USB_1000mA = 0x02, ++ PCF50633_MBCC7_USB_SUSPEND = 0x03, ++ PCF50633_MBCC7_BATTEMP_EN = 0x04, ++ PCF50633_MBCC7_BATSYSIMAX_1A6 = 0x00, ++ PCF50633_MBCC7_BATSYSIMAX_1A8 = 0x40, ++ PCF50633_MBCC7_BATSYSIMAX_2A0 = 0x80, ++ PCF50633_MBCC7_BATSYSIMAX_2A2 = 0xc0, ++}; ++#define PCF56033_MBCC7_USB_MASK 0x03 ++ ++enum pcf50633_reg_mbcc8 { ++ PCF50633_MBCC8_USBENASUS = 0x10, ++}; ++ ++enum pcf50633_reg_mbcs1 { ++ PCF50633_MBCS1_USBPRES = 0x01, ++ PCF50633_MBCS1_USBOK = 0x02, ++ PCF50633_MBCS1_ADAPTPRES = 0x04, ++ PCF50633_MBCS1_ADAPTOK = 0x08, ++ PCF50633_MBCS1_TBAT_OK = 0x00, ++ PCF50633_MBCS1_TBAT_ABOVE = 0x10, ++ PCF50633_MBCS1_TBAT_BELOW = 0x20, ++ PCF50633_MBCS1_TBAT_UNDEF = 0x30, ++ PCF50633_MBCS1_PREWDTEXP = 0x40, ++ PCF50633_MBCS1_WDTEXP = 0x80, ++}; ++ ++enum pcf50633_reg_mbcs2_mbcmod { ++ PCF50633_MBCS2_MBC_PLAY = 0x00, ++ PCF50633_MBCS2_MBC_USB_PRE = 0x01, ++ PCF50633_MBCS2_MBC_USB_PRE_WAIT = 0x02, ++ PCF50633_MBCS2_MBC_USB_FAST = 0x03, ++ PCF50633_MBCS2_MBC_USB_FAST_WAIT= 0x04, ++ PCF50633_MBCS2_MBC_USB_SUSPEND = 0x05, ++ PCF50633_MBCS2_MBC_ADP_PRE = 0x06, ++ PCF50633_MBCS2_MBC_ADP_PRE_WAIT = 0x07, ++ PCF50633_MBCS2_MBC_ADP_FAST = 0x08, ++ PCF50633_MBCS2_MBC_ADP_FAST_WAIT= 0x09, ++ PCF50633_MBCS2_MBC_BAT_FULL = 0x0a, ++ PCF50633_MBCS2_MBC_HALT = 0x0b, ++}; ++#define PCF50633_MBCS2_MBC_MASK 0x0f ++enum pcf50633_reg_mbcs2_chgstat { ++ PCF50633_MBCS2_CHGS_NONE = 0x00, ++ PCF50633_MBCS2_CHGS_ADAPTER = 0x10, ++ PCF50633_MBCS2_CHGS_USB = 0x20, ++ PCF50633_MBCS2_CHGS_BOTH = 0x30, ++}; ++#define PCF50633_MBCS2_RESSTAT_AUTO 0x40 ++ ++enum pcf50633_reg_mbcs3 { ++ PCF50633_MBCS3_USBLIM_PLAY = 0x01, ++ PCF50633_MBCS3_USBLIM_CGH = 0x02, ++ PCF50633_MBCS3_TLIM_PLAY = 0x04, ++ PCF50633_MBCS3_TLIM_CHG = 0x08, ++ PCF50633_MBCS3_ILIM = 0x10, /* 1: Ibat > Icutoff */ ++ PCF50633_MBCS3_VLIM = 0x20, /* 1: Vbat == Vmax */ ++ PCF50633_MBCS3_VBATSTAT = 0x40, /* 1: Vbat > Vbatcond */ ++ PCF50633_MBCS3_VRES = 0x80, /* 1: Vbat > Vth(RES) */ ++}; ++ ++/* this is to be provided by the board implementation */ ++extern const u_int8_t pcf50633_initial_regs[__NUM_PCF50633_REGS]; ++ ++void pcf50633_reg_write(u_int8_t reg, u_int8_t val); ++ ++u_int8_t pcf50633_reg_read(u_int8_t reg); ++ ++void pcf50633_reg_set_bit_mask(u_int8_t reg, u_int8_t mask, u_int8_t val); ++void pcf50633_reg_clear_bits(u_int8_t reg, u_int8_t bits); ++ ++void pcf50633_charge_autofast(int on); ++ ++#endif /* _PCF50606_H */ ++ +diff --git a/include/linux/i2c-id.h b/include/linux/i2c-id.h +index a089554..ee60156 100644 +--- a/include/linux/i2c-id.h ++++ b/include/linux/i2c-id.h +@@ -169,6 +169,7 @@ + #define I2C_DRIVERID_OV7670 1048 /* Omnivision 7670 camera */ + #define I2C_DRIVERID_PCF50606 1049 + #define I2C_DRIVERID_TSL256X 1050 ++#define I2C_DRIVERID_PCF50633 1051 + + /* + * ---- Adapter types ---------------------------------------------------- +diff --git a/include/linux/pcf50633.h b/include/linux/pcf50633.h +new file mode 100644 +index 0000000..5f32004 +--- /dev/null ++++ b/include/linux/pcf50633.h +@@ -0,0 +1,114 @@ ++#ifndef _LINUX_PCF50633_H ++#define _LINUX_PCF50633_H ++ ++/* public in-kernel pcf50633 api */ ++enum pcf50633_regulator_id { ++ PCF50633_REGULATOR_AUTO, ++ PCF50633_REGULATOR_DOWN1, ++ PCF50633_REGULATOR_DOWN2, ++ PCF50633_REGULATOR_MEMLDO, ++ PCF50633_REGULATOR_LDO1, ++ PCF50633_REGULATOR_LDO2, ++ PCF50633_REGULATOR_LDO3, ++ PCF50633_REGULATOR_LDO4, ++ PCF50633_REGULATOR_LDO5, ++ PCF50633_REGULATOR_LDO6, ++ PCF50633_REGULATOR_HCLDO, ++ __NUM_PCF50633_REGULATORS ++}; ++ ++struct pcf50633_data; ++extern struct pcf50633_data *pcf50633_global; ++ ++extern void ++pcf50633_go_standby(void); ++ ++enum pcf50633_gpio { ++ PCF50633_GPIO1 = 1, ++ PCF50633_GPIO2 = 2, ++ PCF50633_GPIO3 = 3, ++ PCF50633_GPO = 4, ++}; ++ ++extern void ++pcf50633_gpio_set(struct pcf50633_data *pcf, enum pcf50633_gpio gpio, int on); ++ ++extern int ++pcf50633_gpio_get(struct pcf50633_data *pcf, enum pcf50633_gpio gpio); ++ ++extern int ++pcf50633_voltage_set(struct pcf50633_data *pcf, ++ enum pcf50633_regulator_id reg, ++ unsigned int millivolts); ++extern unsigned int ++pcf50633_voltage_get(struct pcf50633_data *pcf, ++ enum pcf50633_regulator_id reg); ++extern int ++pcf50633_onoff_get(struct pcf50633_data *pcf, ++ enum pcf50633_regulator_id reg); ++ ++extern int ++pcf50633_onoff_set(struct pcf50633_data *pcf, ++ enum pcf50633_regulator_id reg, int on); ++ ++extern void ++pcf50633_usb_curlim_set(struct pcf50633_data *pcf, int ma); ++ ++extern void ++pcf50633_charge_enable(struct pcf50633_data *pcf, int on); ++ ++/* FIXME: sharded with pcf50606 */ ++#define PMU_VRAIL_F_SUSPEND_ON 0x00000001 /* Remains on during suspend */ ++#define PMU_VRAIL_F_UNUSED 0x00000002 /* This rail is not used */ ++struct pmu_voltage_rail { ++ char *name; ++ unsigned int flags; ++ struct { ++ unsigned int init; ++ unsigned int max; ++ } voltage; ++}; ++ ++enum pmu_event { ++ PMU_EVT_NONE, ++ PMU_EVT_INSERT, ++ PMU_EVT_REMOVE, ++ PMU_EVT_USB_INSERT, ++ PMU_EVT_USB_REMOVE, ++ __NUM_PMU_EVTS ++}; ++ ++typedef int pmu_cb(struct device *dev, unsigned int feature, ++ enum pmu_event event); ++ ++#define PCF50633_FEAT_EXTON 0x00000001 /* not yet supported */ ++#define PCF50633_FEAT_MBC 0x00000002 ++#define PCF50633_FEAT_BBC 0x00000004 /* not yet supported */ ++#define PCF50633_FEAT_RTC 0x00000040 ++#define PCF50633_FEAT_CHGCUR 0x00000100 ++#define PCF50633_FEAT_BATVOLT 0x00000200 ++#define PCF50633_FEAT_BATTEMP 0x00000400 ++#define PCF50633_FEAT_PWM_BL 0x00000800 ++ ++struct pcf50633_platform_data { ++ /* general */ ++ unsigned int used_features; ++ unsigned int onkey_seconds_sig_init; ++ unsigned int onkey_seconds_shutdown; ++ ++ /* voltage regulator related */ ++ struct pmu_voltage_rail rails[__NUM_PCF50633_REGULATORS]; ++ unsigned int used_regulators; ++ ++ /* charger related */ ++ unsigned int r_fix_batt; ++ unsigned int r_fix_batt_par; ++ unsigned int r_sense_milli; ++ ++ struct { ++ u_int8_t mbcc3; /* charger voltage / current */ ++ } charger; ++ pmu_cb *cb; ++}; ++ ++#endif /* _PCF50633_H */ +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1032-pcf50633-suspend-hacks.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1032-pcf50633-suspend-hacks.patch.patch new file mode 100644 index 0000000000..4c388994f1 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1032-pcf50633-suspend-hacks.patch.patch @@ -0,0 +1,45 @@ +From 56b25d1ddc3662594f9344bac89f08bcf993cc61 Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:34:44 +0100 +Subject: [PATCH] pcf50633-suspend-hacks.patch + +--- + drivers/i2c/chips/pcf50633.c | 22 ++++++++++++++++++++-- + 1 files changed, 20 insertions(+), 2 deletions(-) + +diff --git a/drivers/i2c/chips/pcf50633.c b/drivers/i2c/chips/pcf50633.c +index 5488084..0cf5e53 100644 +--- a/drivers/i2c/chips/pcf50633.c ++++ b/drivers/i2c/chips/pcf50633.c +@@ -567,8 +567,26 @@ static void pcf50633_work(struct work_struct *work) + */ + ret = i2c_smbus_read_i2c_block_data(&pcf->client, PCF50633_REG_INT1, 5, + pcfirq); +- if (ret != 5) +- DEBUGP("Oh crap PMU IRQ register read failed %d\n", ret); ++ if (ret != 5) { ++ DEBUGP("Oh crap PMU IRQ register read failed -- " ++ "retrying later %d\n", ret); ++ /* ++ * this situation can happen during resume, just defer ++ * handling the interrupt until enough I2C is up we can ++ * actually talk to the PMU. We can't just ignore this ++ * because we are on a falling edge interrupt and our ++ * PMU interrupt source does not clear until we read these ++ * interrupt source registers. ++ */ ++ if (!schedule_work(&pcf->work) && !pcf->working) ++ dev_dbg(&pcf->client.dev, "work item may be lost\n"); ++ ++ /* we don't put the device here, hold it for next time */ ++ mutex_unlock(&pcf->working_lock); ++ /* don't spew, delaying whatever else is happening */ ++ msleep(1); ++ return; ++ } + + if (!pcf->coldplug_done) { + DEBUGP("PMU Coldplug init\n"); +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1033-smedia-glamo.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1033-smedia-glamo.patch.patch new file mode 100644 index 0000000000..0e15f3ed1f --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1033-smedia-glamo.patch.patch @@ -0,0 +1,3498 @@ +From f9fc3f480aeb1fdfcdefdd3c560d06c8297c758b Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:34:54 +0100 +Subject: [PATCH] smedia-glamo.patch + [ FIXME: + include/asm-arm/arch-s3c2410/irqs.h shouldn't contain device-specific + changes. ] + +This is a Linux kernel driver for the Smedia Glamo336x / Glamo337x +multi-function peripheral device. + +Signed-off-by: Harald Welte +--- + drivers/mfd/Kconfig | 2 + + drivers/mfd/Makefile | 1 + + drivers/mfd/glamo/Kconfig | 35 ++ + drivers/mfd/glamo/Makefile | 11 + + drivers/mfd/glamo/glamo-core.c | 1151 +++++++++++++++++++++++++++++++++++ + drivers/mfd/glamo/glamo-core.h | 91 +++ + drivers/mfd/glamo/glamo-fb.c | 822 +++++++++++++++++++++++++ + drivers/mfd/glamo/glamo-gpio.c | 62 ++ + drivers/mfd/glamo/glamo-lcm-spi.c | 241 ++++++++ + drivers/mfd/glamo/glamo-regs.h | 477 +++++++++++++++ + drivers/mfd/glamo/glamo-spi-gpio.c | 256 ++++++++ + include/asm-arm/arch-s3c2410/irqs.h | 32 +- + include/linux/glamo-gpio.h | 99 +++ + include/linux/glamofb.h | 39 ++ + include/linux/spi/glamo.h | 28 + + 15 files changed, 3345 insertions(+), 2 deletions(-) + create mode 100644 drivers/mfd/glamo/Kconfig + create mode 100644 drivers/mfd/glamo/Makefile + create mode 100644 drivers/mfd/glamo/glamo-core.c + create mode 100644 drivers/mfd/glamo/glamo-core.h + create mode 100644 drivers/mfd/glamo/glamo-fb.c + create mode 100644 drivers/mfd/glamo/glamo-gpio.c + create mode 100644 drivers/mfd/glamo/glamo-lcm-spi.c + create mode 100644 drivers/mfd/glamo/glamo-regs.h + create mode 100644 drivers/mfd/glamo/glamo-spi-gpio.c + create mode 100644 include/linux/glamo-gpio.h + create mode 100644 include/linux/glamofb.h + create mode 100644 include/linux/spi/glamo.h + +diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig +index 2571619..fe06f8e 100644 +--- a/drivers/mfd/Kconfig ++++ b/drivers/mfd/Kconfig +@@ -15,6 +15,8 @@ config MFD_SM501 + interface. The device may be connected by PCI or local bus with + varying functions enabled. + ++source "drivers/mfd/glamo/Kconfig" ++ + endmenu + + menu "Multimedia Capabilities Port drivers" +diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile +index 5143209..a2da091 100644 +--- a/drivers/mfd/Makefile ++++ b/drivers/mfd/Makefile +@@ -3,6 +3,7 @@ + # + + obj-$(CONFIG_MFD_SM501) += sm501.o ++obj-$(CONFIG_MFD_GLAMO) += glamo/ + + obj-$(CONFIG_MCP) += mcp-core.o + obj-$(CONFIG_MCP_SA11X0) += mcp-sa11x0.o +diff --git a/drivers/mfd/glamo/Kconfig b/drivers/mfd/glamo/Kconfig +new file mode 100644 +index 0000000..b99f2b2 +--- /dev/null ++++ b/drivers/mfd/glamo/Kconfig +@@ -0,0 +1,35 @@ ++config MFD_GLAMO ++ bool "Smedia Glamo 336x/337x support" ++ help ++ This enables the core driver for the Smedia Glamo 336x/337x ++ multi-function device. It includes irq_chip demultiplex as ++ well as clock / power management and GPIO support. ++ ++config MFD_GLAMO_FB ++ tristate "Smedia Glamo 336x/337x framebuffer support" ++ depends on FB && MFD_GLAMO ++ help ++ Frame buffer driver for the LCD controller in the Smedia Glamo ++ 336x/337x. ++ ++ This driver is also available as a module ( = code which can be ++ inserted and removed from the running kernel whenever you want). The ++ module will be called glamofb. If you want to compile it as a module, ++ say M here and read . ++ ++ If unsure, say N. ++ ++config MFD_GLAMO_SPI_GPIO ++ tristate "Glamo GPIO SPI bitbang support" ++ depends on MFD_GLAMO ++ help ++ Enable a bitbanging SPI adapter driver for the Smedia Glamo. ++ ++config MFD_GLAMO_SPI_FB ++ tristate "Glamo LCM control channel SPI support" ++ depends on MFD_GLAMO_FB ++ help ++ Enable a bitbanging SPI adapter driver for the Smedia Glamo LCM ++ control channel. This SPI interface is frequently used to ++ interconnect the LCM control interface. ++ +diff --git a/drivers/mfd/glamo/Makefile b/drivers/mfd/glamo/Makefile +new file mode 100644 +index 0000000..fb53982 +--- /dev/null ++++ b/drivers/mfd/glamo/Makefile +@@ -0,0 +1,11 @@ ++# ++# Makefile for the Smedia Glamo framebuffer driver ++# ++ ++obj-$(CONFIG_MFD_GLAMO) += glamo-core.o glamo-gpio.o ++obj-$(CONFIG_MFD_GLAMO_SPI) += glamo-spi.o ++obj-$(CONFIG_MFD_GLAMO_SPI_GPIO) += glamo-spi-gpio.o ++ ++obj-$(CONFIG_MFD_GLAMO_FB) += glamo-fb.o ++obj-$(CONFIG_MFD_GLAMO_SPI_FB) += glamo-lcm-spi.o ++ +diff --git a/drivers/mfd/glamo/glamo-core.c b/drivers/mfd/glamo/glamo-core.c +new file mode 100644 +index 0000000..acf545f +--- /dev/null ++++ b/drivers/mfd/glamo/glamo-core.c +@@ -0,0 +1,1151 @@ ++/* Smedia Glamo 336x/337x driver ++ * ++ * (C) 2007 by OpenMoko, Inc. ++ * Author: Harald Welte ++ * All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++ ++#ifdef CONFIG_PM ++#include ++#endif ++ ++#include "glamo-regs.h" ++#include "glamo-core.h" ++ ++#define RESSIZE(ressource) (((ressource)->end - (ressource)->start)+1) ++ ++static struct glamo_core *glamo_handle; ++ ++static inline void __reg_write(struct glamo_core *glamo, ++ u_int16_t reg, u_int16_t val) ++{ ++ writew(val, glamo->base + reg); ++} ++ ++static inline u_int16_t __reg_read(struct glamo_core *glamo, ++ u_int16_t reg) ++{ ++ return readw(glamo->base + reg); ++} ++ ++static void __reg_set_bit_mask(struct glamo_core *glamo, ++ u_int16_t reg, u_int16_t mask, ++ u_int16_t val) ++{ ++ u_int16_t tmp; ++ ++ val &= mask; ++ ++ tmp = __reg_read(glamo, reg); ++ tmp &= ~mask; ++ tmp |= val; ++ __reg_write(glamo, reg, tmp); ++} ++ ++static void reg_set_bit_mask(struct glamo_core *glamo, ++ u_int16_t reg, u_int16_t mask, ++ u_int16_t val) ++{ ++ spin_lock(&glamo->lock); ++ __reg_set_bit_mask(glamo, reg, mask, val); ++ spin_unlock(&glamo->lock); ++} ++ ++static inline void __reg_set_bit(struct glamo_core *glamo, ++ u_int16_t reg, u_int16_t bit) ++{ ++ __reg_set_bit_mask(glamo, reg, bit, 0xffff); ++} ++ ++static inline void __reg_clear_bit(struct glamo_core *glamo, ++ u_int16_t reg, u_int16_t bit) ++{ ++ __reg_set_bit_mask(glamo, reg, bit, 0); ++} ++ ++static inline void glamo_vmem_write(struct glamo_core *glamo, u_int32_t addr, ++ u_int16_t *src, int len) ++{ ++ if (addr & 0x0001 || (unsigned long)src & 0x0001 || len & 0x0001) { ++ dev_err(&glamo->pdev->dev, "unaligned write(0x%08x, 0x%p, " ++ "0x%x)!!\n", addr, src, len); ++ } ++ ++} ++ ++static inline void glamo_vmem_read(struct glamo_core *glamo, u_int16_t *buf, ++ u_int32_t addr, int len) ++{ ++ if (addr & 0x0001 || (unsigned long) buf & 0x0001 || len & 0x0001) { ++ dev_err(&glamo->pdev->dev, "unaligned read(0x%p, 0x08%x, " ++ "0x%x)!!\n", buf, addr, len); ++ } ++ ++ ++} ++ ++/*********************************************************************** ++ * resources of sibling devices ++ ***********************************************************************/ ++ ++#if 0 ++static struct resource glamo_core_resources[] = { ++ { ++ .start = GLAMO_REGOFS_GENERIC, ++ .end = GLAMO_REGOFS_GENERIC + 0x400, ++ .flags = IORESOURCE_MEM, ++ }, { ++ .start = 0, ++ .end = 0, ++ .flags = IORESOURCE_IRQ, ++ }, ++}; ++ ++static struct platform_device glamo_core_dev = { ++ .name = "glamo-core", ++ .resource = &glamo_core_resources, ++ .num_resources = ARRAY_SIZE(glamo_core_resources), ++}; ++#endif ++ ++static struct resource glamo_jpeg_resources[] = { ++ { ++ .start = GLAMO_REGOFS_JPEG, ++ .end = GLAMO_REGOFS_MPEG - 1, ++ .flags = IORESOURCE_MEM, ++ }, { ++ .start = IRQ_GLAMO_JPEG, ++ .end = IRQ_GLAMO_JPEG, ++ .flags = IORESOURCE_IRQ, ++ }, ++}; ++ ++static struct platform_device glamo_jpeg_dev = { ++ .name = "glamo-jpeg", ++ .resource = glamo_jpeg_resources, ++ .num_resources = ARRAY_SIZE(glamo_jpeg_resources), ++}; ++ ++static struct resource glamo_mpeg_resources[] = { ++ { ++ .start = GLAMO_REGOFS_MPEG, ++ .end = GLAMO_REGOFS_LCD - 1, ++ .flags = IORESOURCE_MEM, ++ }, { ++ .start = IRQ_GLAMO_MPEG, ++ .end = IRQ_GLAMO_MPEG, ++ .flags = IORESOURCE_IRQ, ++ }, ++}; ++ ++static struct platform_device glamo_mpeg_dev = { ++ .name = "glamo-mpeg", ++ .resource = glamo_mpeg_resources, ++ .num_resources = ARRAY_SIZE(glamo_mpeg_resources), ++}; ++ ++static struct resource glamo_2d_resources[] = { ++ { ++ .start = GLAMO_REGOFS_2D, ++ .end = GLAMO_REGOFS_3D - 1, ++ .flags = IORESOURCE_MEM, ++ }, { ++ .start = IRQ_GLAMO_2D, ++ .end = IRQ_GLAMO_2D, ++ .flags = IORESOURCE_IRQ, ++ }, ++}; ++ ++static struct platform_device glamo_2d_dev = { ++ .name = "glamo-2d", ++ .resource = glamo_2d_resources, ++ .num_resources = ARRAY_SIZE(glamo_2d_resources), ++}; ++ ++static struct resource glamo_3d_resources[] = { ++ { ++ .start = GLAMO_REGOFS_3D, ++ .end = GLAMO_REGOFS_END - 1, ++ .flags = IORESOURCE_MEM, ++ }, ++}; ++ ++static struct platform_device glamo_3d_dev = { ++ .name = "glamo-3d", ++ .resource = glamo_3d_resources, ++ .num_resources = ARRAY_SIZE(glamo_3d_resources), ++}; ++ ++static struct platform_device glamo_spigpio_dev = { ++ .name = "glamo-spi-gpio", ++}; ++ ++static struct resource glamo_fb_resources[] = { ++ /* FIXME: those need to be incremented by parent base */ ++ { ++ .name = "glamo-fb-regs", ++ .start = GLAMO_REGOFS_LCD, ++ .end = GLAMO_REGOFS_MMC - 1, ++ .flags = IORESOURCE_MEM, ++ }, { ++ .name = "glamo-fb-mem", ++ .start = GLAMO_OFFSET_FB, ++ .end = GLAMO_OFFSET_FB + GLAMO_FB_SIZE - 1, ++ .flags = IORESOURCE_MEM, ++ }, ++}; ++ ++static struct platform_device glamo_fb_dev = { ++ .name = "glamo-fb", ++ .resource = glamo_fb_resources, ++ .num_resources = ARRAY_SIZE(glamo_fb_resources), ++}; ++ ++static struct resource glamo_mmc_resources[] = { ++ { ++ /* FIXME: those need to be incremented by parent base */ ++ .start = GLAMO_REGOFS_MMC, ++ .end = GLAMO_REGOFS_MPROC0 - 1, ++ .flags = IORESOURCE_MEM ++ }, { ++ .start = IRQ_GLAMO_MMC, ++ .end = IRQ_GLAMO_MMC, ++ .flags = IORESOURCE_IRQ, ++ }, { /* our data buffer for MMC transfers */ ++ .start = GLAMO_OFFSET_FB + GLAMO_FB_SIZE, ++ .end = GLAMO_OFFSET_FB + GLAMO_FB_SIZE + ++ GLAMO_MMC_BUFFER_SIZE - 1, ++ .flags = IORESOURCE_MEM ++ }, ++}; ++ ++static struct platform_device glamo_mmc_dev = { ++ .name = "glamo-mci", ++ .resource = glamo_mmc_resources, ++ .num_resources = ARRAY_SIZE(glamo_mmc_resources), ++}; ++ ++struct glamo_mci_pdata glamo_mci_def_pdata = { ++ .gpio_detect = 0, ++ .glamo_set_mci_power = NULL, /* filled in from MFD platform data */ ++ .ocr_avail = MMC_VDD_32_33, ++ .glamo_irq_is_wired = NULL, /* filled in from MFD platform data */ ++}; ++EXPORT_SYMBOL_GPL(glamo_mci_def_pdata); ++ ++ ++ ++static void mangle_mem_resources(struct resource *res, int num_res, ++ struct resource *parent) ++{ ++ int i; ++ ++ for (i = 0; i < num_res; i++) { ++ if (res[i].flags != IORESOURCE_MEM) ++ continue; ++ res[i].start += parent->start; ++ res[i].end += parent->start; ++ res[i].parent = parent; ++ } ++} ++ ++/*********************************************************************** ++ * IRQ demultiplexer ++ ***********************************************************************/ ++#define irq2glamo(x) (x - IRQ_GLAMO(0)) ++ ++static void glamo_ack_irq(unsigned int irq) ++{ ++ /* clear interrupt source */ ++ __reg_write(glamo_handle, GLAMO_REG_IRQ_CLEAR, ++ 1 << irq2glamo(irq)); ++} ++ ++static void glamo_mask_irq(unsigned int irq) ++{ ++ u_int16_t tmp; ++ ++ /* clear bit in enable register */ ++ tmp = __reg_read(glamo_handle, GLAMO_REG_IRQ_ENABLE); ++ tmp &= ~(1 << irq2glamo(irq)); ++ __reg_write(glamo_handle, GLAMO_REG_IRQ_ENABLE, tmp); ++} ++ ++static void glamo_unmask_irq(unsigned int irq) ++{ ++ u_int16_t tmp; ++ ++ /* set bit in enable register */ ++ tmp = __reg_read(glamo_handle, GLAMO_REG_IRQ_ENABLE); ++ tmp |= (1 << irq2glamo(irq)); ++ __reg_write(glamo_handle, GLAMO_REG_IRQ_ENABLE, tmp); ++} ++ ++static struct irq_chip glamo_irq_chip = { ++ .ack = glamo_ack_irq, ++ .mask = glamo_mask_irq, ++ .unmask = glamo_unmask_irq, ++}; ++ ++static void glamo_irq_demux_handler(unsigned int irq, struct irq_desc *desc) ++{ ++ const unsigned int cpu = smp_processor_id(); ++ ++ spin_lock(&desc->lock); ++ ++ desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); ++ ++ if (unlikely(desc->status & IRQ_INPROGRESS)) { ++ desc->status |= (IRQ_PENDING | IRQ_MASKED); ++ desc->chip->mask(irq); ++ desc->chip->ack(irq); ++ goto out_unlock; ++ } ++ ++ kstat_cpu(cpu).irqs[irq]++; ++ desc->chip->ack(irq); ++ desc->status |= IRQ_INPROGRESS; ++ ++ do { ++ u_int16_t irqstatus; ++ int i; ++ ++ if (unlikely((desc->status & ++ (IRQ_PENDING | IRQ_MASKED | IRQ_DISABLED)) == ++ (IRQ_PENDING | IRQ_MASKED))) { ++ /* dealing with pending IRQ, unmasking */ ++ desc->chip->unmask(irq); ++ desc->status &= ~IRQ_MASKED; ++ } ++ ++ desc->status &= ~IRQ_PENDING; ++ ++ /* read IRQ status register */ ++ irqstatus = __reg_read(glamo_handle, GLAMO_REG_IRQ_STATUS); ++ for (i = 0; i < 9; i++) ++ if (irqstatus & (1 << i)) ++ desc_handle_irq(IRQ_GLAMO(i), ++ irq_desc+IRQ_GLAMO(i)); ++ ++ } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING); ++ ++ desc->status &= ~IRQ_INPROGRESS; ++ ++out_unlock: ++ spin_unlock(&desc->lock); ++} ++ ++/*********************************************************************** ++ * 'engine' support ++ ***********************************************************************/ ++ ++int glamo_engine_enable(struct glamo_core *glamo, enum glamo_engine engine) ++{ ++ spin_lock(&glamo->lock); ++ switch (engine) { ++ case GLAMO_ENGINE_LCD: ++ __reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_LCD, ++ GLAMO_CLOCK_LCD_EN_M5CLK | ++ GLAMO_CLOCK_LCD_EN_DHCLK | ++ GLAMO_CLOCK_LCD_EN_DMCLK | ++ GLAMO_CLOCK_LCD_EN_DCLK | ++ GLAMO_CLOCK_LCD_DG_M5CLK | ++ GLAMO_CLOCK_LCD_DG_DMCLK, 0xffff); ++ __reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_GEN5_1, ++ GLAMO_CLOCK_GEN51_EN_DIV_DHCLK | ++ GLAMO_CLOCK_GEN51_EN_DIV_DMCLK | ++ GLAMO_CLOCK_GEN51_EN_DIV_DCLK, 0xffff); ++ __reg_set_bit_mask(glamo, GLAMO_REG_HOSTBUS(2), ++ GLAMO_HOSTBUS2_MMIO_EN_LCD, ++ 0xffff); ++ break; ++ case GLAMO_ENGINE_MMC: ++ __reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_MMC, ++ GLAMO_CLOCK_MMC_EN_M9CLK | ++ GLAMO_CLOCK_MMC_EN_TCLK | ++ GLAMO_CLOCK_MMC_DG_M9CLK | ++ GLAMO_CLOCK_MMC_DG_TCLK, 0xffff); ++ __reg_set_bit_mask(glamo, GLAMO_REG_HOSTBUS(2), ++ GLAMO_HOSTBUS2_MMIO_EN_MMC, ++ GLAMO_HOSTBUS2_MMIO_EN_MMC); ++ break; ++ case GLAMO_ENGINE_2D: ++ __reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_2D, ++ GLAMO_CLOCK_2D_EN_M7CLK | ++ GLAMO_CLOCK_2D_EN_GCLK | ++ GLAMO_CLOCK_2D_DG_M7CLK | ++ GLAMO_CLOCK_2D_DG_GCLK, 0xffff); ++ __reg_set_bit_mask(glamo, GLAMO_REG_HOSTBUS(2), ++ GLAMO_HOSTBUS2_MMIO_EN_2D, ++ GLAMO_HOSTBUS2_MMIO_EN_2D); ++ break; ++ case GLAMO_ENGINE_CMDQ: ++ __reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_2D, ++ GLAMO_CLOCK_2D_EN_M6CLK, 0xffff); ++ __reg_set_bit_mask(glamo, GLAMO_REG_HOSTBUS(2), ++ GLAMO_HOSTBUS2_MMIO_EN_CQ, ++ GLAMO_HOSTBUS2_MMIO_EN_CQ); ++ break; ++ /* FIXME: Implementation */ ++ default: ++ break; ++ } ++ spin_unlock(&glamo->lock); ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(glamo_engine_enable); ++ ++int glamo_engine_disable(struct glamo_core *glamo, enum glamo_engine engine) ++{ ++ spin_lock(&glamo->lock); ++ switch (engine) { ++ /* FIXME: Implementation */ ++ default: ++ break; ++ } ++ spin_unlock(&glamo->lock); ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(glamo_engine_disable); ++ ++struct glamo_script reset_regs[] = { ++ [GLAMO_ENGINE_LCD] = { ++ GLAMO_REG_CLOCK_LCD, GLAMO_CLOCK_LCD_RESET ++ }, ++#if 0 ++ [GLAMO_ENGINE_HOST] = { ++ GLAMO_REG_CLOCK_HOST, GLAMO_CLOCK_HOST_RESET ++ }, ++ [GLAMO_ENGINE_MEM] = { ++ GLAMO_REG_CLOCK_MEM, GLAMO_CLOCK_MEM_RESET ++ }, ++#endif ++ [GLAMO_ENGINE_MMC] = { ++ GLAMO_REG_CLOCK_MMC, GLAMO_CLOCK_MMC_RESET ++ }, ++ [GLAMO_ENGINE_2D] = { ++ GLAMO_REG_CLOCK_2D, GLAMO_CLOCK_2D_RESET ++ }, ++ [GLAMO_ENGINE_JPEG] = { ++ GLAMO_REG_CLOCK_JPEG, GLAMO_CLOCK_JPEG_RESET ++ }, ++}; ++ ++void glamo_engine_reset(struct glamo_core *glamo, enum glamo_engine engine) ++{ ++ struct glamo_script *rst; ++ ++ if (engine >= ARRAY_SIZE(reset_regs)) { ++ dev_warn(&glamo->pdev->dev, "unknown engine %u ", engine); ++ return; ++ } ++ ++ rst = &reset_regs[engine]; ++ ++ spin_lock(&glamo->lock); ++ __reg_set_bit(glamo, rst->reg, rst->val); ++ spin_unlock(&glamo->lock); ++ ++ msleep(1); ++ ++ spin_lock(&glamo->lock); ++ __reg_clear_bit(glamo, rst->reg, rst->val); ++ spin_unlock(&glamo->lock); ++ ++ msleep(1); ++} ++EXPORT_SYMBOL_GPL(glamo_engine_reset); ++ ++enum glamo_pll { ++ GLAMO_PLL1, ++ GLAMO_PLL2, ++}; ++ ++static int glamo_pll_rate(struct glamo_core *glamo, ++ enum glamo_pll pll) ++{ ++ u_int16_t reg; ++ unsigned int div = 512; ++ /* FIXME: move osci into platform_data */ ++ unsigned int osci = 32768; ++ ++ if (osci == 32768) ++ div = 1; ++ ++ switch (pll) { ++ case GLAMO_PLL1: ++ reg = __reg_read(glamo, GLAMO_REG_PLL_GEN1); ++ break; ++ case GLAMO_PLL2: ++ reg = __reg_read(glamo, GLAMO_REG_PLL_GEN3); ++ break; ++ default: ++ return -EINVAL; ++ } ++ return (osci/div)*reg; ++} ++ ++int glamo_engine_reclock(struct glamo_core *glamo, ++ enum glamo_engine engine, ++ int ps) ++{ ++ int pll, khz; ++ u_int16_t reg, mask, val = 0; ++ ++ if (!ps) ++ return 0; ++ ++ switch (engine) { ++ case GLAMO_ENGINE_LCD: ++ pll = GLAMO_PLL1; ++ reg = GLAMO_REG_CLOCK_GEN7; ++ mask = 0xff; ++ break; ++ default: ++ dev_warn(&glamo->pdev->dev, ++ "reclock of engine 0x%x not supported\n", engine); ++ return -EINVAL; ++ break; ++ } ++ ++ pll = glamo_pll_rate(glamo, pll); ++ khz = 1000000000UL / ps; ++ ++ if (khz) ++ val = (pll / khz) / 1000; ++ ++ dev_dbg(&glamo->pdev->dev, ++ "PLL %d, kHZ %d, div %d\n", pll, khz, val); ++ ++ if (val) { ++ val--; ++ reg_set_bit_mask(glamo, reg, mask, val); ++ msleep(5); /* wait some time to stabilize */ ++ ++ return 0; ++ } else { ++ return -EINVAL; ++ } ++} ++EXPORT_SYMBOL_GPL(glamo_engine_reclock); ++ ++/*********************************************************************** ++ * script support ++ ***********************************************************************/ ++ ++int glamo_run_script(struct glamo_core *glamo, struct glamo_script *script, ++ int len, int may_sleep) ++{ ++ int i; ++ ++ for (i = 0; i < len; i++) { ++ struct glamo_script *line = &script[i]; ++ ++ switch (line->reg) { ++ case 0xffff: ++ return 0; ++ case 0xfffe: ++ if (may_sleep) ++ msleep(line->val); ++ else ++ mdelay(line->val); ++ break; ++ case 0xfffd: ++ /* spin until PLLs lock */ ++ while ((__reg_read(glamo, GLAMO_REG_PLL_GEN5) & 3) != 3) ++ ; ++ break; ++ default: ++ __reg_write(glamo, script[i].reg, script[i].val); ++ break; ++ } ++ } ++ ++ return 0; ++} ++EXPORT_SYMBOL(glamo_run_script); ++ ++static struct glamo_script glamo_init_script[] = { ++ { GLAMO_REG_CLOCK_HOST, 0x1000 }, ++ { 0xfffe, 2 }, ++ { GLAMO_REG_CLOCK_MEMORY, 0x1000 }, ++ { GLAMO_REG_CLOCK_MEMORY, 0x2000 }, ++ { GLAMO_REG_CLOCK_LCD, 0x1000 }, ++ { GLAMO_REG_CLOCK_MMC, 0x1000 }, ++ { GLAMO_REG_CLOCK_ISP, 0x1000 }, ++ { GLAMO_REG_CLOCK_ISP, 0x3000 }, ++ { GLAMO_REG_CLOCK_JPEG, 0x1000 }, ++ { GLAMO_REG_CLOCK_3D, 0x1000 }, ++ { GLAMO_REG_CLOCK_3D, 0x3000 }, ++ { GLAMO_REG_CLOCK_2D, 0x1000 }, ++ { GLAMO_REG_CLOCK_2D, 0x3000 }, ++ { GLAMO_REG_CLOCK_RISC1, 0x1000 }, ++ { GLAMO_REG_CLOCK_MPEG, 0x3000 }, ++ { GLAMO_REG_CLOCK_MPEG, 0x3000 }, ++ { GLAMO_REG_CLOCK_MPROC, 0x1000 /*0x100f*/ }, ++ { 0xfffe, 2 }, ++ { GLAMO_REG_CLOCK_HOST, 0x0000 }, ++ { GLAMO_REG_CLOCK_MEMORY, 0x0000 }, ++ { GLAMO_REG_CLOCK_LCD, 0x0000 }, ++ { GLAMO_REG_CLOCK_MMC, 0x0000 }, ++#if 0 ++/* unused engines must be left in reset to stop MMC block read "blackouts" */ ++ { GLAMO_REG_CLOCK_ISP, 0x0000 }, ++ { GLAMO_REG_CLOCK_ISP, 0x0000 }, ++ { GLAMO_REG_CLOCK_JPEG, 0x0000 }, ++ { GLAMO_REG_CLOCK_3D, 0x0000 }, ++ { GLAMO_REG_CLOCK_3D, 0x0000 }, ++ { GLAMO_REG_CLOCK_2D, 0x0000 }, ++ { GLAMO_REG_CLOCK_2D, 0x0000 }, ++ { GLAMO_REG_CLOCK_RISC1, 0x0000 }, ++ { GLAMO_REG_CLOCK_MPEG, 0x0000 }, ++ { GLAMO_REG_CLOCK_MPEG, 0x0000 }, ++#endif ++ { GLAMO_REG_PLL_GEN1, 0x05db }, /* 48MHz */ ++ { GLAMO_REG_PLL_GEN3, 0x09c3 }, /* 80MHz */ ++ { 0xfffd, 0 }, ++ /* ++ * b9 of this register MUST be zero to get any interrupts on INT# ++ * the other set bits enable all the engine interrupt sources ++ */ ++ { GLAMO_REG_IRQ_ENABLE, 0x01ff }, ++ { GLAMO_REG_CLOCK_GEN6, 0x2000 }, ++ { GLAMO_REG_CLOCK_GEN7, 0x0101 }, ++ { GLAMO_REG_CLOCK_GEN8, 0x0100 }, ++ { GLAMO_REG_CLOCK_HOST, 0x000d }, ++ { 0x200, 0x0ef0 }, ++ { 0x202, 0x07ff }, ++ { 0x212, 0x0000 }, ++ { 0x214, 0x4000 }, ++ { 0x216, 0xf00e }, ++ { GLAMO_REG_MEM_TYPE, 0x0874 }, /* 8MB, 16 word pg wr+rd */ ++ { GLAMO_REG_MEM_GEN, 0xafaf }, /* 63 grants min + max */ ++ /* ++ * the register below originally 0x0108 makes unreliable Glamo MMC ++ * write operations. Cranked to 0x05ad to add a wait state, the ++ * unreliability is not seen after 4GB of write / read testing ++ */ ++ { GLAMO_REG_MEM_TIMING1, 0x0108 }, ++ { GLAMO_REG_MEM_TIMING2, 0x0010 }, /* Taa = 3 MCLK */ ++ { GLAMO_REG_MEM_TIMING3, 0x0000 }, ++ { GLAMO_REG_MEM_TIMING4, 0x0000 }, /* CE1# delay fall/rise */ ++ { GLAMO_REG_MEM_TIMING5, 0x0000 }, /* UB# LB# */ ++ { GLAMO_REG_MEM_TIMING6, 0x0000 }, /* OE# */ ++ { GLAMO_REG_MEM_TIMING7, 0x0000 }, /* WE# */ ++ { GLAMO_REG_MEM_TIMING8, 0x1002 }, /* MCLK delay, was 0x1000 */ ++ { GLAMO_REG_MEM_TIMING9, 0x6006 }, ++ { GLAMO_REG_MEM_TIMING10, 0x00ff }, ++ { GLAMO_REG_MEM_TIMING11, 0x0001 }, ++ { GLAMO_REG_MEM_POWER1, 0x0020 }, ++ { GLAMO_REG_MEM_POWER2, 0x0000 }, ++ { GLAMO_REG_MEM_DRAM1, 0x0000 }, ++ { 0xfffe, 1 }, ++ { GLAMO_REG_MEM_DRAM1, 0xc100 }, ++ { 0xfffe, 1 }, ++ { GLAMO_REG_MEM_DRAM1, 0xe100 }, ++ { GLAMO_REG_MEM_DRAM2, 0x01d6 }, ++ { GLAMO_REG_CLOCK_MEMORY, 0x000b }, ++}; ++ ++static struct glamo_script glamo_resume_script[] = { ++ { GLAMO_REG_IRQ_ENABLE, 0x01ff }, ++ { GLAMO_REG_CLOCK_GEN6, 0x2000 }, ++ { GLAMO_REG_CLOCK_GEN7, 0x0001 }, /* 0101 */ ++ { GLAMO_REG_CLOCK_GEN8, 0x0100 }, ++ { GLAMO_REG_CLOCK_HOST, 0x000d }, ++ { 0x200, 0x0ef0 }, ++ { 0x202, 0x07ff }, ++ { 0x212, 0x0000 }, ++ { 0x214, 0x4000 }, ++ { 0x216, 0xf00e }, ++ { GLAMO_REG_MEM_TYPE, 0x0874 }, /* 8MB, 16 word pg wr+rd */ ++ { GLAMO_REG_MEM_GEN, 0xafaf }, /* 63 grants min + max */ ++ ++ { GLAMO_REG_MEM_TIMING1, 0x0108 }, ++ { GLAMO_REG_MEM_TIMING2, 0x0010 }, /* Taa = 3 MCLK */ ++ { GLAMO_REG_MEM_TIMING3, 0x0000 }, ++ { GLAMO_REG_MEM_TIMING4, 0x0000 }, /* CE1# delay fall/rise */ ++ { GLAMO_REG_MEM_TIMING5, 0x0000 }, /* UB# LB# */ ++ { GLAMO_REG_MEM_TIMING6, 0x0000 }, /* OE# */ ++ { GLAMO_REG_MEM_TIMING7, 0x0000 }, /* WE# */ ++ { GLAMO_REG_MEM_TIMING8, 0x1002 }, /* MCLK delay, was 0x1000 */ ++ { GLAMO_REG_MEM_TIMING9, 0x6006 }, ++ { GLAMO_REG_MEM_TIMING10, 0x00ff }, ++ { GLAMO_REG_MEM_TIMING11, 0x0001 }, ++ { GLAMO_REG_MEM_POWER1, 0x0020 }, ++ { GLAMO_REG_MEM_POWER2, 0x0000 }, ++ { GLAMO_REG_MEM_DRAM1, 0x0000 }, ++ { 0xfffe, 1 }, ++ { GLAMO_REG_MEM_DRAM1, 0xc100 }, ++ { 0xfffe, 1 }, ++ { GLAMO_REG_MEM_DRAM1, 0xe100 }, ++ { GLAMO_REG_MEM_DRAM2, 0x01d6 }, ++ { GLAMO_REG_CLOCK_MEMORY, 0x000b }, ++}; ++ ++#if 0 /* MM370 */ ++static const struct glamo_script regs_vram_2mb = { ++ { GLAMO_REG_CLOCK_MEMORY, 0x3aaa }, ++ { 0xfffe, 50 }, ++ { GLAMO_REG_CLOCK_MEMORY, 0x0aaa }, ++ { 0xfffe, 3 }, ++ { GLAMO_REG_MEM_POWER1, 0x0020 }, ++ { 0x033a, 0x0000 }, ++ { 0x033c, 0x0000 }, ++ { 0x033e, 0x0000 }, ++ { 0x0340, 0x0000 }, ++ { 0x0342, 0x0000 }, ++ { 0x0344, 0x0000 }, ++ { 0x0346, 0x0240 }, ++ { GLAMO_REG_MEM_TIMING8, 0x1016 }, ++ { GLAMO_REG_MEM_TIMING9, 0x6067 }, ++ { GLAMO_REG_MEM_TIMING10, 0x00ff }, ++ { GLAMO_REG_MEM_TIMING11, 0x0030 }, ++ { GLAMO_REG_MEM_GEN, 0x3fff }, ++ { GLAMO_REG_MEM_GEN, 0xafaf }, ++ { GLAMO_REG_MEM_TIMING1, 0x0108 }, ++ { GLAMO_REG_MEM_TIMING2, 0x0010 }, ++ { GLAMO_REG_MEM_DRAM1, 0x0a00 }, ++ { 0xfffe, 3 }, ++ { GLAMO_REG_MEM_DRAM1, 0xe200 }, ++ { 0xfffe, 1 }, ++}; ++ ++static const struct glamo_script regs_vram_8mb = { ++ { GLAMO_REG_CLOCK_MEMORY, 0x3aaa }, ++ { 0xfffe, 50 }, ++ { GLAMO_REG_CLOCK_MEMORY, 0x0aaa }, ++ { 0xfffe, 3 }, ++ { GLAMO_REG_MEM_POWER1, 0x0020 }, ++ { 0x033a, 0x45cf }, ++ { 0x033c, 0x4240 }, ++ { 0x033e, 0x53e0 }, ++ { 0x0340, 0x1401 }, ++ { 0x0342, 0x0c44 }, ++ { 0x0344, 0x1d0b }, ++ { 0x0346, 0x25ac }, ++ { 0x0348, 0x1953 }, ++ { 0xfffe, 1 }, ++ { GLAMO_REG_MEM_TYPE, 0x087a }, ++ { GLAMO_REG_MEM_DRAM2, 0x01d6 }, ++ { GLAMO_REG_MEM_TIMING8, 0x1060 }, ++ { GLAMO_REG_MEM_TIMING9, 0x6067 }, ++ { GLAMO_REG_MEM_TIMING10, 0x00ff }, ++ { GLAMO_REG_MEM_TIMING11, 0x0030 }, ++ { GLAMO_REG_MEM_GEN, 0x3fff }, ++ { GLAMO_REG_MEM_GEN, 0xafaf }, ++ { GLAMO_REG_MEM_TIMING1, 0x3108 }, ++ { GLAMO_REG_MEM_TIMING2, 0x0010 }, ++ { GLAMO_REG_MEM_DRAM1, 0x0a00 }, ++ { 0xfffe, 3 }, ++ { GLAMO_REG_MEM_DRAM1, 0xe200 }, ++ { 0xfffe, 1 }, ++}; ++#endif ++ ++enum glamo_power { ++ GLAMO_POWER_ON, ++ GLAMO_POWER_STANDBY, ++ GLAMO_POWER_SUSPEND, ++}; ++ ++static void glamo_power(struct glamo_core *glamo, ++ enum glamo_power new_state) ++{ ++ spin_lock(&glamo->lock); ++ ++ switch (new_state) { ++ case GLAMO_POWER_ON: ++ /* power up PLL1 and PLL2 */ ++ __reg_set_bit_mask(glamo, GLAMO_REG_DFT_GEN6, 0x0001, 0xffff); ++ __reg_set_bit_mask(glamo, GLAMO_REG_PLL_GEN3, 0x2000, 0x0000); ++ ++ /* spin until PLL1 and PLL2 lock */ ++ while ((__reg_read(glamo, GLAMO_REG_PLL_GEN5) & 3) != 3) ++ ; ++ ++ /* enable memory clock and get it out of deep pwrdown */ ++ __reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_MEMORY, ++ GLAMO_CLOCK_MEM_EN_MOCACLK, 0xffff); ++ __reg_set_bit_mask(glamo, GLAMO_REG_MEM_DRAM2, ++ GLAMO_MEM_DRAM2_DEEP_PWRDOWN, 0x0000); ++ __reg_set_bit_mask(glamo, GLAMO_REG_MEM_DRAM1, ++ GLAMO_MEM_DRAM1_SELF_REFRESH, 0x0000); ++ ++ glamo_run_script(glamo, glamo_resume_script, ++ ARRAY_SIZE(glamo_resume_script), 0); ++ ++ break; ++ case GLAMO_POWER_STANDBY: ++ /* enable memory self-refresh */ ++ __reg_set_bit_mask(glamo, GLAMO_REG_MEM_DRAM1, ++ GLAMO_MEM_DRAM1_SELF_REFRESH, 0xffff); ++ /* stop memory clock */ ++ __reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_MEMORY, ++ GLAMO_CLOCK_MEM_EN_MOCACLK, 0x0000); ++ /* power down PLL2 and then PLL1 */ ++ __reg_set_bit_mask(glamo, GLAMO_REG_PLL_GEN3, 0x2000, 0xffff); ++ __reg_set_bit_mask(glamo, GLAMO_REG_DFT_GEN5, 0x0001, 0xffff); ++ break; ++ case GLAMO_POWER_SUSPEND: ++ __reg_set_bit_mask(glamo, GLAMO_REG_MEM_DRAM2, ++ GLAMO_MEM_DRAM2_DEEP_PWRDOWN, 0xffff); ++ /* stop memory clock */ ++ __reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_MEMORY, ++ GLAMO_CLOCK_MEM_EN_MOCACLK, 0x0000); ++ /* power down PLL2 and then PLL1 */ ++ __reg_set_bit_mask(glamo, GLAMO_REG_PLL_GEN3, 0x2000, 0xffff); ++ __reg_set_bit_mask(glamo, GLAMO_REG_DFT_GEN5, 0x0001, 0xffff); ++ break; ++ } ++ ++ spin_unlock(&glamo->lock); ++} ++ ++#if 0 ++#define MEMDETECT_RETRY 6 ++static unsigned int detect_memsize(struct glamo_core *glamo) ++{ ++ int i; ++ ++ /*static const u_int16_t pattern[] = { ++ 0x1111, 0x8a8a, 0x2222, 0x7a7a, ++ 0x3333, 0x6a6a, 0x4444, 0x5a5a, ++ 0x5555, 0x4a4a, 0x6666, 0x3a3a, ++ 0x7777, 0x2a2a, 0x8888, 0x1a1a ++ }; */ ++ ++ for (i = 0; i < MEMDETECT_RETRY; i++) { ++ switch (glamo->type) { ++ case 3600: ++ __reg_write(glamo, GLAMO_REG_MEM_TYPE, 0x0072); ++ __reg_write(glamo, GLAMO_REG_MEM_DRAM1, 0xc100); ++ break; ++ case 3650: ++ switch (glamo->revision) { ++ case GLAMO_CORE_REV_A0: ++ if (i & 1) ++ __reg_write(glamo, GLAMO_REG_MEM_TYPE, ++ 0x097a); ++ else ++ __reg_write(glamo, GLAMO_REG_MEM_TYPE, ++ 0x0173); ++ ++ __reg_write(glamo, GLAMO_REG_MEM_DRAM1, 0x0000); ++ msleep(1); ++ __reg_write(glamo, GLAMO_REG_MEM_DRAM1, 0xc100); ++ break; ++ default: ++ if (i & 1) ++ __reg_write(glamo, GLAMO_REG_MEM_TYPE, ++ 0x0972); ++ else ++ __reg_write(glamo, GLAMO_REG_MEM_TYPE, ++ 0x0872); ++ ++ __reg_write(glamo, GLAMO_REG_MEM_DRAM1, 0x0000); ++ msleep(1); ++ __reg_write(glamo, GLAMO_REG_MEM_DRAM1, 0xe100); ++ break; ++ } ++ break; ++ case 3700: ++ /* FIXME */ ++ default: ++ break; ++ } ++ ++#if 0 ++ /* FIXME: finish implementation */ ++ for (j = 0; j < 8; j++) { ++ __ ++#endif ++ } ++ ++ return 0; ++} ++#endif ++ ++/* Find out if we can support this version of the Glamo chip */ ++static int glamo_supported(struct glamo_core *glamo) ++{ ++ u_int16_t dev_id, rev_id; /*, memsize; */ ++ ++ dev_id = __reg_read(glamo, GLAMO_REG_DEVICE_ID); ++ rev_id = __reg_read(glamo, GLAMO_REG_REVISION_ID); ++ ++ switch (dev_id) { ++ case 0x3650: ++ switch (rev_id) { ++ case GLAMO_CORE_REV_A2: ++ break; ++ case GLAMO_CORE_REV_A0: ++ case GLAMO_CORE_REV_A1: ++ case GLAMO_CORE_REV_A3: ++ dev_warn(&glamo->pdev->dev, "untested core revision " ++ "%04x, your mileage may vary\n", rev_id); ++ break; ++ default: ++ dev_warn(&glamo->pdev->dev, "unknown glamo revision " ++ "%04x, your mileage may vary\n", rev_id); ++ /* maybe should abort ? */ ++ } ++ break; ++ case 0x3600: ++ case 0x3700: ++ default: ++ dev_err(&glamo->pdev->dev, "unsupported Glamo device %04x\n", ++ dev_id); ++ return 0; ++ } ++ ++ dev_info(&glamo->pdev->dev, "Detected Glamo core %04x Revision %04x " ++ "(%uHz CPU / %uHz Memory)\n", dev_id, rev_id, ++ glamo_pll_rate(glamo, GLAMO_PLL1), ++ glamo_pll_rate(glamo, GLAMO_PLL2)); ++ ++ return 1; ++} ++ ++ ++static int __init glamo_probe(struct platform_device *pdev) ++{ ++ int rc, irq; ++ struct glamo_core *glamo; ++ ++ if (glamo_handle) { ++ dev_err(&pdev->dev, ++ "This driver supports only one instance\n"); ++ return -EBUSY; ++ } ++ ++ glamo = kmalloc(GFP_KERNEL, sizeof(*glamo)); ++ if (!glamo) ++ return -ENOMEM; ++ ++ spin_lock_init(&glamo->lock); ++ glamo_handle = glamo; ++ glamo->pdev = pdev; ++ glamo->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ glamo->irq = platform_get_irq(pdev, 0); ++ glamo->pdata = pdev->dev.platform_data; ++ if (!glamo->mem || !glamo->pdata) { ++ dev_err(&pdev->dev, "platform device with no MEM/PDATA ?\n"); ++ rc = -ENOENT; ++ goto out_free; ++ } ++ ++ /* register a number of sibling devices whoise IOMEM resources ++ * are siblings of pdev's IOMEM resource */ ++#if 0 ++ glamo_core_dev.dev.parent = &pdev.dev; ++ mangle_mem_resources(glamo_core_dev.resources, ++ glamo_core_dev.num_resources, glamo->mem); ++ glamo_core_dev.resources[1].start = glamo->irq; ++ glamo_core_dev.resources[1].end = glamo->irq; ++ platform_device_register(&glamo_core_dev); ++#endif ++ /* only remap the generic, hostbus and memory controller registers */ ++ glamo->base = ioremap(glamo->mem->start, GLAMO_REGOFS_VIDCAP); ++ if (!glamo->base) { ++ dev_err(&pdev->dev, "failed to ioremap() memory region\n"); ++ goto out_free; ++ } ++ ++ /* bring MCI specific stuff over from our MFD platform data */ ++ glamo_mci_def_pdata.glamo_set_mci_power = ++ glamo->pdata->glamo_set_mci_power; ++ glamo_mci_def_pdata.glamo_irq_is_wired = ++ glamo->pdata->glamo_irq_is_wired; ++ ++ glamo_mmc_dev.dev.parent = &pdev->dev; ++ /* we need it later to give to the engine enable and disable */ ++ glamo_mci_def_pdata.pglamo = glamo; ++ mangle_mem_resources(glamo_mmc_dev.resource, ++ glamo_mmc_dev.num_resources, glamo->mem); ++ platform_device_register(&glamo_mmc_dev); ++ ++ glamo_2d_dev.dev.parent = &pdev->dev; ++ mangle_mem_resources(glamo_2d_dev.resource, ++ glamo_2d_dev.num_resources, glamo->mem); ++ platform_device_register(&glamo_2d_dev); ++ ++ glamo_3d_dev.dev.parent = &pdev->dev; ++ mangle_mem_resources(glamo_3d_dev.resource, ++ glamo_3d_dev.num_resources, glamo->mem); ++ platform_device_register(&glamo_3d_dev); ++ ++ glamo_jpeg_dev.dev.parent = &pdev->dev; ++ mangle_mem_resources(glamo_jpeg_dev.resource, ++ glamo_jpeg_dev.num_resources, glamo->mem); ++ platform_device_register(&glamo_jpeg_dev); ++ ++ glamo_mpeg_dev.dev.parent = &pdev->dev; ++ mangle_mem_resources(glamo_mpeg_dev.resource, ++ glamo_mpeg_dev.num_resources, glamo->mem); ++ platform_device_register(&glamo_mpeg_dev); ++ ++ glamo->pdata->glamo = glamo; ++ glamo_fb_dev.dev.parent = &pdev->dev; ++ glamo_fb_dev.dev.platform_data = glamo->pdata; ++ mangle_mem_resources(glamo_fb_dev.resource, ++ glamo_fb_dev.num_resources, glamo->mem); ++ platform_device_register(&glamo_fb_dev); ++ ++ glamo->pdata->spigpio_info->glamo = glamo; ++ glamo_spigpio_dev.dev.parent = &pdev->dev; ++ glamo_spigpio_dev.dev.platform_data = glamo->pdata->spigpio_info; ++ platform_device_register(&glamo_spigpio_dev); ++ ++ /* only request the generic, hostbus and memory controller MMIO */ ++ glamo->mem = request_mem_region(glamo->mem->start, ++ GLAMO_REGOFS_VIDCAP, "glamo-core"); ++ if (!glamo->mem) { ++ dev_err(&pdev->dev, "failed to request memory region\n"); ++ goto out_free; ++ } ++ ++ if (!glamo_supported(glamo)) { ++ dev_err(&pdev->dev, "This Glamo is not supported\n"); ++ goto out_free; ++ } ++ ++ platform_set_drvdata(pdev, glamo); ++ ++ dev_dbg(&glamo->pdev->dev, "running init script\n"); ++ glamo_run_script(glamo, glamo_init_script, ++ ARRAY_SIZE(glamo_init_script), 1); ++ ++ dev_info(&glamo->pdev->dev, "Glamo core now %uHz CPU / %uHz Memory)\n", ++ glamo_pll_rate(glamo, GLAMO_PLL1), ++ glamo_pll_rate(glamo, GLAMO_PLL2)); ++ ++ for (irq = IRQ_GLAMO(0); irq <= IRQ_GLAMO(8); irq++) { ++ set_irq_chip(irq, &glamo_irq_chip); ++ set_irq_handler(irq, handle_level_irq); ++ set_irq_flags(irq, IRQF_VALID); ++ } ++ ++ if (glamo->pdata->glamo_irq_is_wired && ++ !glamo->pdata->glamo_irq_is_wired()) { ++ set_irq_chained_handler(glamo->irq, glamo_irq_demux_handler); ++ set_irq_type(glamo->irq, IRQT_FALLING); ++ glamo->irq_works = 1; ++ } else ++ glamo->irq_works = 0; ++ return 0; ++ ++out_free: ++ glamo_handle = NULL; ++ kfree(glamo); ++ return rc; ++} ++ ++static int glamo_remove(struct platform_device *pdev) ++{ ++ struct glamo_core *glamo = platform_get_drvdata(pdev); ++ int irq; ++ ++ disable_irq(glamo->irq); ++ set_irq_chained_handler(glamo->irq, NULL); ++ ++ for (irq = IRQ_GLAMO(0); irq <= IRQ_GLAMO(8); irq++) { ++ set_irq_flags(irq, 0); ++ set_irq_chip(irq, NULL); ++ } ++ ++ platform_set_drvdata(pdev, NULL); ++ platform_device_unregister(&glamo_fb_dev); ++ platform_device_unregister(&glamo_mmc_dev); ++ iounmap(glamo->base); ++ release_mem_region(glamo->mem->start, GLAMO_REGOFS_VIDCAP); ++ glamo_handle = NULL; ++ kfree(glamo); ++ ++ return 0; ++} ++ ++#ifdef CONFIG_PM ++static int glamo_suspend(struct platform_device *pdev, pm_message_t state) ++{ ++ return 0; ++} ++ ++static int glamo_resume(struct platform_device *pdev) ++{ ++ return 0; ++} ++#else ++#define glamo_suspend NULL ++#define glamo_resume NULL ++#endif ++ ++static struct platform_driver glamo_driver = { ++ .probe = glamo_probe, ++ .remove = glamo_remove, ++ .suspend = glamo_suspend, ++ .resume = glamo_resume, ++ .driver = { ++ .name = "glamo3362", ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static int __devinit glamo_init(void) ++{ ++ return platform_driver_register(&glamo_driver); ++} ++ ++static void __exit glamo_cleanup(void) ++{ ++ platform_driver_unregister(&glamo_driver); ++} ++ ++module_init(glamo_init); ++module_exit(glamo_cleanup); ++ ++MODULE_AUTHOR("Harald Welte "); ++MODULE_DESCRIPTION("Smedia Glamo 336x/337x core/resource driver"); ++MODULE_LICENSE("GPL"); +diff --git a/drivers/mfd/glamo/glamo-core.h b/drivers/mfd/glamo/glamo-core.h +new file mode 100644 +index 0000000..cf89f03 +--- /dev/null ++++ b/drivers/mfd/glamo/glamo-core.h +@@ -0,0 +1,91 @@ ++#ifndef __GLAMO_CORE_H ++#define __GLAMO_CORE_H ++ ++#include ++ ++ ++/* for the time being, we put the on-screen framebuffer into the lowest ++ * VRAM space. This should make the code easily compatible with the various ++ * 2MB/4MB/8MB variants of the Smedia chips */ ++#define GLAMO_OFFSET_VRAM 0x800000 ++#define GLAMO_OFFSET_FB (GLAMO_OFFSET_VRAM) ++ ++/* we only allocate the minimum possible size for the framebuffer to make ++ * sure we have sufficient memory for other functions of the chip */ ++//#define GLAMO_FB_SIZE (640*480*4) /* == 0x12c000 */ ++#define GLAMO_INTERNAL_RAM_SIZE 0x800000 ++#define GLAMO_MMC_BUFFER_SIZE (64 * 1024) ++#define GLAMO_FB_SIZE (GLAMO_INTERNAL_RAM_SIZE - GLAMO_MMC_BUFFER_SIZE) ++ ++ ++struct glamo_core { ++ int irq; ++ int irq_works; /* 0 means PCB does not support Glamo IRQ */ ++ struct resource *mem; ++ struct resource *mem_core; ++ void __iomem *base; ++ struct platform_device *pdev; ++ struct glamofb_platform_data *pdata; ++ u_int16_t type; ++ u_int16_t revision; ++ spinlock_t lock; ++}; ++ ++struct glamo_script { ++ u_int16_t reg; ++ u_int16_t val; ++}; ++ ++int glamo_run_script(struct glamo_core *glamo, ++ struct glamo_script *script, int len, int may_sleep); ++ ++enum glamo_engine { ++ GLAMO_ENGINE_CAPTURE, ++ GLAMO_ENGINE_ISP, ++ GLAMO_ENGINE_JPEG, ++ GLAMO_ENGINE_MPEG_ENC, ++ GLAMO_ENGINE_MPEG_DEC, ++ GLAMO_ENGINE_LCD, ++ GLAMO_ENGINE_CMDQ, ++ GLAMO_ENGINE_2D, ++ GLAMO_ENGINE_3D, ++ GLAMO_ENGINE_MMC, ++ GLAMO_ENGINE_MICROP0, ++ GLAMO_ENGINE_RISC, ++ GLAMO_ENGINE_MICROP1_MPEG_ENC, ++ GLAMO_ENGINE_MICROP1_MPEG_DEC, ++#if 0 ++ GLAMO_ENGINE_H264_DEC, ++ GLAMO_ENGINE_RISC1, ++ GLAMO_ENGINE_SPI, ++#endif ++ __NUM_GLAMO_ENGINES ++}; ++ ++struct glamo_mci_pdata { ++ struct glamo_core * pglamo; ++ unsigned int gpio_detect; ++ unsigned int gpio_wprotect; ++ unsigned long ocr_avail; ++ void (*glamo_set_mci_power)(unsigned char power_mode, ++ unsigned short vdd); ++ int (*glamo_irq_is_wired)(void); ++}; ++ ++ ++static inline void glamo_reg_access_delay(void) ++{ ++ int n; ++ ++ for (n = 0; n != 2; n++) ++ nop(); ++} ++ ++ ++int glamo_engine_enable(struct glamo_core *glamo, enum glamo_engine engine); ++int glamo_engine_disable(struct glamo_core *glamo, enum glamo_engine engine); ++void glamo_engine_reset(struct glamo_core *glamo, enum glamo_engine engine); ++int glamo_engine_reclock(struct glamo_core *glamo, ++ enum glamo_engine engine, int ps); ++ ++#endif /* __GLAMO_CORE_H */ +diff --git a/drivers/mfd/glamo/glamo-fb.c b/drivers/mfd/glamo/glamo-fb.c +new file mode 100644 +index 0000000..394a0ad +--- /dev/null ++++ b/drivers/mfd/glamo/glamo-fb.c +@@ -0,0 +1,822 @@ ++/* Smedia Glamo 336x/337x driver ++ * ++ * (C) 2007 by OpenMoko, Inc. ++ * Author: Harald Welte ++ * All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++ ++#ifdef CONFIG_PM ++#include ++#endif ++ ++#include ++ ++#include "glamo-regs.h" ++#include "glamo-core.h" ++ ++#ifdef DEBUG ++#define GLAMO_LOG(...) ++#else ++#define GLAMO_LOG(...) \ ++do { \ ++ printk(KERN_DEBUG "in %s:%s:%d", __FILE__, __func__, __LINE__); \ ++ printk(KERN_DEBUG __VA_ARGS__); \ ++} while (0); ++#endif ++ ++ ++#define RESSIZE(ressource) (((ressource)->end - (ressource)->start)+1) ++ ++struct glamofb_handle { ++ struct fb_info *fb; ++ struct device *dev; ++ struct resource *reg; ++ struct resource *fb_res; ++ char __iomem *base; ++ struct glamofb_platform_data *mach_info; ++ char __iomem *cursor_addr; ++ u_int32_t pseudo_pal[16]; ++}; ++ ++/* 'sibling' spi device for lcm init */ ++static struct platform_device glamo_spi_dev = { ++ .name = "glamo-lcm-spi", ++}; ++ ++ ++static int reg_read(struct glamofb_handle *glamo, ++ u_int16_t reg) ++{ ++ glamo_reg_access_delay(); ++ return readw(glamo->base + reg); ++} ++ ++static void reg_write(struct glamofb_handle *glamo, ++ u_int16_t reg, u_int16_t val) ++{ ++ glamo_reg_access_delay(); ++ writew(val, glamo->base + reg); ++} ++ ++static struct glamo_script glamo_regs[] = { ++ { GLAMO_REG_LCD_MODE1, 0x0020 }, ++ /* no display rotation, no hardware cursor, no dither, no gamma, ++ * no retrace flip, vsync low-active, hsync low active, ++ * no TVCLK, no partial display, hw dest color from fb, ++ * no partial display mode, LCD1, software flip, */ ++ { GLAMO_REG_LCD_MODE2, 0x1020 }, ++ /* no video flip, no ptr, no ptr, dhclk, ++ * normal mode, no cpuif, ++ * res, serial msb first, single fb, no fr ctrl, ++ * cpu if bits all zero, no crc ++ * 0000 0000 0010 0000 */ ++ { GLAMO_REG_LCD_MODE3, 0x0b40 }, ++ /* src data rgb565, res, 18bit rgb666 ++ * 000 01 011 0100 0000 */ ++ { GLAMO_REG_LCD_POLARITY, 0x440c }, ++ /* DE high active, no cpu/lcd if, cs0 force low, a0 low active, ++ * np cpu if, 9bit serial data, sclk rising edge latch data ++ * 01 00 0 100 0 000 01 0 0 */ ++ { GLAMO_REG_LCD_A_BASE1, 0x0000 }, /* display A base address 15:0 */ ++ { GLAMO_REG_LCD_A_BASE2, 0x0000 }, /* display A base address 22:16 */ ++}; ++ ++static int glamofb_run_script(struct glamofb_handle *glamo, ++ struct glamo_script *script, int len) ++{ ++ int i; ++ ++ for (i = 0; i < len; i++) { ++ struct glamo_script *line = &script[i]; ++ ++ if (line->reg == 0xffff) ++ return 0; ++ else if (line->reg == 0xfffe) ++ msleep(line->val); ++ else ++ reg_write(glamo, script[i].reg, script[i].val); ++ } ++ ++ return 0; ++} ++ ++static int glamofb_check_var(struct fb_var_screeninfo *var, ++ struct fb_info *info) ++{ ++ struct glamofb_handle *glamo = info->par; ++ ++ if (var->yres > glamo->mach_info->yres.max) ++ var->yres = glamo->mach_info->yres.max; ++ else if (var->yres < glamo->mach_info->yres.min) ++ var->yres = glamo->mach_info->yres.min; ++ ++ if (var->xres > glamo->mach_info->xres.max) ++ var->xres = glamo->mach_info->xres.max; ++ else if (var->xres < glamo->mach_info->xres.min) ++ var->xres = glamo->mach_info->xres.min; ++ ++ if (var->bits_per_pixel > glamo->mach_info->bpp.max) ++ var->bits_per_pixel = glamo->mach_info->bpp.max; ++ else if (var->bits_per_pixel < glamo->mach_info->bpp.min) ++ var->bits_per_pixel = glamo->mach_info->bpp.min; ++ ++ /* FIXME: set rgb positions */ ++ switch (var->bits_per_pixel) { ++ case 16: ++ switch (reg_read(glamo, GLAMO_REG_LCD_MODE3) & 0xc000) { ++ case GLAMO_LCD_SRC_RGB565: ++ var->red.offset = 11; ++ var->green.offset = 5; ++ var->blue.offset = 0; ++ var->red.length = 5; ++ var->green.length = 6; ++ var->blue.length = 5; ++ var->transp.length = 0; ++ break; ++ case GLAMO_LCD_SRC_ARGB1555: ++ var->transp.offset = 15; ++ var->red.offset = 10; ++ var->green.offset = 5; ++ var->blue.offset = 0; ++ var->transp.length = 1; ++ var->red.length = 5; ++ var->green.length = 5; ++ var->blue.length = 5; ++ break; ++ case GLAMO_LCD_SRC_ARGB4444: ++ var->transp.offset = 12; ++ var->red.offset = 8; ++ var->green.offset = 4; ++ var->blue.offset = 0; ++ var->transp.length = 4; ++ var->red.length = 4; ++ var->green.length = 4; ++ var->blue.length = 4; ++ break; ++ } ++ break; ++ case 24: ++ case 32: ++ default: ++ /* The Smedia Glamo doesn't support anything but 16bit color */ ++ printk(KERN_ERR ++ "Smedia driver does not [yet?] support 24/32bpp\n"); ++ return -EINVAL; ++ break; ++ } ++ ++ return 0; ++} ++ ++static void reg_set_bit_mask(struct glamofb_handle *glamo, ++ u_int16_t reg, u_int16_t mask, ++ u_int16_t val) ++{ ++ u_int16_t tmp; ++ ++ val &= mask; ++ ++ tmp = reg_read(glamo, reg); ++ tmp &= ~mask; ++ tmp |= val; ++ reg_write(glamo, reg, tmp); ++} ++ ++#define GLAMO_LCD_WIDTH_MASK 0x03FF ++#define GLAMO_LCD_HEIGHT_MASK 0x03FF ++#define GLAMO_LCD_PITCH_MASK 0x07FE ++#define GLAMO_LCD_HV_TOTAL_MASK 0x03FF ++#define GLAMO_LCD_HV_RETR_START_MASK 0x03FF ++#define GLAMO_LCD_HV_RETR_END_MASK 0x03FF ++#define GLAMO_LCD_HV_RETR_DISP_START_MASK 0x03FF ++#define GLAMO_LCD_HV_RETR_DISP_END_MASK 0x03FF ++ ++enum orientation { ++ ORIENTATION_PORTRAIT, ++ ORIENTATION_LANDSCAPE ++}; ++ ++ ++static void rotate_lcd(struct glamofb_handle *glamo, ++ __u32 rotation) ++{ ++ int glamo_rot; ++ ++ switch (rotation) { ++ case FB_ROTATE_UR: ++ glamo_rot = GLAMO_LCD_ROT_MODE_0; ++ break; ++ case FB_ROTATE_CW: ++ glamo_rot = GLAMO_LCD_ROT_MODE_90; ++ break; ++ case FB_ROTATE_UD: ++ glamo_rot = GLAMO_LCD_ROT_MODE_180; ++ break; ++ case FB_ROTATE_CCW: ++ glamo_rot = GLAMO_LCD_ROT_MODE_270; ++ break; ++ default: ++ glamo_rot = GLAMO_LCD_ROT_MODE_0; ++ break; ++ } ++ glamofb_cmd_mode(glamo, 1); ++ reg_set_bit_mask(glamo, ++ GLAMO_REG_LCD_WIDTH, ++ GLAMO_LCD_ROT_MODE_MASK, ++ glamo_rot); ++ reg_set_bit_mask(glamo, ++ GLAMO_REG_LCD_MODE1, ++ GLAMO_LCD_MODE1_ROTATE_EN, ++ (glamo_rot != GLAMO_LCD_ROT_MODE_0)? ++ GLAMO_LCD_MODE1_ROTATE_EN : 0); ++ glamofb_cmd_mode(glamo, 0); ++} ++ ++static enum orientation get_orientation(struct fb_var_screeninfo *var) ++{ ++ GLAMO_LOG("mark\n") ++ if (var->xres <= var->yres) { ++ GLAMO_LOG("portrait\n") ++ return ORIENTATION_PORTRAIT; ++ } ++ GLAMO_LOG("landscape\n") ++ return ORIENTATION_LANDSCAPE; ++} ++ ++static int will_orientation_change(struct fb_var_screeninfo *var) ++{ ++ enum orientation orient = get_orientation(var); ++ switch (orient) { ++ case ORIENTATION_LANDSCAPE: ++ if (var->rotate == FB_ROTATE_UR || var->rotate == FB_ROTATE_UD) ++ return 1; ++ break; ++ case ORIENTATION_PORTRAIT: ++ if (var->rotate == FB_ROTATE_CW || var->rotate == FB_ROTATE_CCW) ++ return 1; ++ break; ++ } ++ return 0; ++} ++ ++static void glamofb_update_lcd_controller(struct glamofb_handle *glamo, ++ struct fb_var_screeninfo *var) ++{ ++ int sync, bp, disp, fp, total, xres, yres, pitch, orientation_changing; ++ ++ GLAMO_LOG("enter: glamo:%#x, var:%#x\n", (unsigned)glamo, (unsigned)var); ++ if (!glamo || !var) ++ return; ++ ++ glamofb_cmd_mode(glamo, 1); ++ ++ if (var->pixclock) ++ glamo_engine_reclock(glamo->mach_info->glamo, ++ GLAMO_ENGINE_LCD, ++ var->pixclock); ++ ++ xres = var->xres; ++ yres = var->yres; ++ GLAMO_LOG("xres:%d, yres:%d, rotate:%d\n", xres, yres, var->rotate); ++ ++ /* ++ * figure out if orientation is going to change ++ */ ++ orientation_changing = will_orientation_change(var); ++ GLAMO_LOG("orientation_changing:%d\n", orientation_changing); ++ ++ /* ++ * adjust the pitch according to new orientation to come ++ */ ++ if (orientation_changing) { ++ pitch = var->yres * var->bits_per_pixel / 8; ++ } else { ++ pitch = var->xres * var->bits_per_pixel / 8; ++ } ++ GLAMO_LOG("pitch:%d\n", pitch); ++ ++ /* ++ * set the awaiten LCD geometry ++ */ ++ reg_set_bit_mask(glamo, ++ GLAMO_REG_LCD_WIDTH, ++ GLAMO_LCD_WIDTH_MASK, ++ xres); ++ reg_set_bit_mask(glamo, ++ GLAMO_REG_LCD_HEIGHT, ++ GLAMO_LCD_HEIGHT_MASK, ++ yres); ++ reg_set_bit_mask(glamo, ++ GLAMO_REG_LCD_PITCH, ++ GLAMO_LCD_PITCH_MASK, ++ pitch); ++ ++ GLAMO_LOG("mark:\n"); ++ /* ++ * honour the rotation request ++ */ ++ rotate_lcd(glamo, var->rotate); ++ ++ /* ++ * update the reported geometry ++ * of the framebuffer. ++ */ ++ if (orientation_changing) { ++ var->xres_virtual = var->xres = yres; ++ var->yres_virtual = var->yres = xres; ++ } else { ++ var->xres_virtual = var->xres = xres; ++ var->yres_virtual = var->yres = yres; ++ } ++ ++ GLAMO_LOG("reported res:(%d,%d)\n", var->xres, var->yres); ++ /* ++ * update scannout timings ++ */ ++ sync = 0; ++ bp = sync + var->hsync_len; ++ disp = bp + var->left_margin; ++ fp = disp + xres; ++ total = fp + var->right_margin; ++ ++ reg_set_bit_mask(glamo, GLAMO_REG_LCD_HORIZ_TOTAL, ++ GLAMO_LCD_HV_TOTAL_MASK, total); ++ reg_set_bit_mask(glamo, GLAMO_REG_LCD_HORIZ_RETR_START, ++ GLAMO_LCD_HV_RETR_START_MASK, sync); ++ reg_set_bit_mask(glamo, GLAMO_REG_LCD_HORIZ_RETR_END, ++ GLAMO_LCD_HV_RETR_END_MASK, bp); ++ reg_set_bit_mask(glamo, GLAMO_REG_LCD_HORIZ_DISP_START, ++ GLAMO_LCD_HV_RETR_DISP_START_MASK, disp); ++ reg_set_bit_mask(glamo, GLAMO_REG_LCD_HORIZ_DISP_END, ++ GLAMO_LCD_HV_RETR_DISP_END_MASK, fp); ++ ++ GLAMO_LOG("mark:\n"); ++ ++ sync = 0; ++ bp = sync + var->vsync_len; ++ disp = bp + var->upper_margin; ++ fp = disp + yres; ++ total = fp + var->lower_margin; ++ ++ reg_set_bit_mask(glamo, GLAMO_REG_LCD_VERT_TOTAL, ++ GLAMO_LCD_HV_TOTAL_MASK, total); ++ reg_set_bit_mask(glamo, GLAMO_REG_LCD_VERT_RETR_START, ++ GLAMO_LCD_HV_RETR_START_MASK, sync); ++ reg_set_bit_mask(glamo, GLAMO_REG_LCD_VERT_RETR_END, ++ GLAMO_LCD_HV_RETR_END_MASK, bp); ++ reg_set_bit_mask(glamo, GLAMO_REG_LCD_VERT_DISP_START, ++ GLAMO_LCD_HV_RETR_DISP_START_MASK, disp); ++ reg_set_bit_mask(glamo, GLAMO_REG_LCD_VERT_DISP_END, ++ GLAMO_LCD_HV_RETR_DISP_END_MASK, fp); ++ ++ GLAMO_LOG("mark:\n"); ++ glamofb_cmd_mode(glamo, 0); ++ ++ GLAMO_LOG("leave:\n"); ++} ++ ++static int glamofb_set_par(struct fb_info *info) ++{ ++ struct glamofb_handle *glamo = info->par; ++ struct fb_var_screeninfo *var = &info->var; ++ ++ switch (var->bits_per_pixel) { ++ case 16: ++ info->fix.visual = FB_VISUAL_TRUECOLOR; ++ break; ++ default: ++ printk("Smedia driver doesn't support != 16bpp\n"); ++ return -EINVAL; ++ } ++ ++ info->fix.line_length = (var->xres * var->bits_per_pixel) / 8; ++ ++ glamofb_update_lcd_controller(glamo, var); ++ ++ return 0; ++} ++ ++static int glamofb_blank(int blank_mode, struct fb_info *info) ++{ ++ /* FIXME */ ++ return 0; ++} ++ ++static inline unsigned int chan_to_field(unsigned int chan, struct fb_bitfield *bf) ++{ ++ chan &= 0xffff; ++ chan >>= 16 - bf->length; ++ return chan << bf->offset; ++} ++ ++static int glamofb_setcolreg(unsigned regno, ++ unsigned red, unsigned green, unsigned blue, ++ unsigned transp, struct fb_info *info) ++{ ++ struct glamofb_handle *glamo = info->par; ++ unsigned int val; ++ ++ switch (glamo->fb->fix.visual) { ++ case FB_VISUAL_TRUECOLOR: ++ case FB_VISUAL_DIRECTCOLOR: ++ /* true-colour, use pseuo-palette */ ++ ++ if (regno < 16) { ++ u32 *pal = glamo->fb->pseudo_palette; ++ ++ val = chan_to_field(red, &glamo->fb->var.red); ++ val |= chan_to_field(green, &glamo->fb->var.green); ++ val |= chan_to_field(blue, &glamo->fb->var.blue); ++ ++ pal[regno] = val; ++ }; ++ break; ++ default: ++ return 1; /* unknown type */ ++ } ++ ++ return 0; ++} ++ ++static int glamofb_cursor(struct fb_info *info, struct fb_cursor *cursor) ++{ ++ struct glamofb_handle *glamo = info->par; ++ u_int16_t reg; ++ ++ if (cursor->image.depth > 2) ++ return -EINVAL; ++ ++ reg = reg_read(glamo, GLAMO_REG_LCD_MODE1); ++ ++ if (cursor->enable) ++ reg_write(glamo, GLAMO_REG_LCD_MODE1, ++ reg | GLAMO_LCD_MODE1_CURSOR_EN); ++ else ++ reg_write(glamo, GLAMO_REG_LCD_MODE1, ++ reg & ~GLAMO_LCD_MODE1_CURSOR_EN); ++ ++ if (cursor->set & FB_CUR_SETPOS) { ++ reg_write(glamo, GLAMO_REG_LCD_CURSOR_X_POS, ++ cursor->image.dx); ++ reg_write(glamo, GLAMO_REG_LCD_CURSOR_Y_POS, ++ cursor->image.dy); ++ } ++ ++ if (cursor->set & FB_CUR_SETCMAP) { ++ /* FIXME */ ++ } ++ ++ if (cursor->set & FB_CUR_SETSIZE || ++ cursor->set & (FB_CUR_SETIMAGE | FB_CUR_SETSHAPE)) { ++ int x, y, op; ++ const unsigned char *pcol = cursor->image.data; ++ const unsigned char *pmsk = cursor->mask; ++ void __iomem *dst = glamo->cursor_addr; ++ unsigned char dcol = 0; ++ unsigned char dmsk = 0; ++ ++ reg_write(glamo, GLAMO_REG_LCD_CURSOR_X_SIZE, ++ cursor->image.width); ++ reg_write(glamo, GLAMO_REG_LCD_CURSOR_PITCH, ++ cursor->image.width * 2); ++ reg_write(glamo, GLAMO_REG_LCD_CURSOR_Y_SIZE, ++ cursor->image.height); ++ ++ for (op = 0; op < (cursor->image.width * ++ cursor->image.height * 2)/8; op += 4) ++ writel(0x0, dst + op); ++ ++ for (y = 0; y < cursor->image.height; y++) { ++ for (x = 0; x < cursor->image.width; x++) { ++ if ((x % 8) == 0) { ++ dcol = *pcol++; ++ dmsk = *pmsk++; ++ } else { ++ dcol >>= 1; ++ dmsk >>= 1; ++ } ++ ++ if (dmsk & 1) { ++ unsigned int op; ++ ++ op = (dcol & 1) ? 1 : 3; ++ op <<= ((x % 4) * 2); ++ ++ op |= readb(dst + (x / 4)); ++ writeb(op, dst + (x / 4)); ++ } ++ } ++ } ++ } ++} ++ ++static inline int glamofb_cmdq_empty(struct glamofb_handle *gfb) ++{ ++ return reg_read(gfb, GLAMO_REG_LCD_STATUS1) & (1 << 15); ++} ++ ++void glamofb_cmd_mode(struct glamofb_handle *gfb, int on) ++{ ++ dev_dbg(gfb->dev, "glamofb_cmd_mode(gfb=%p, on=%d)\n", gfb, on); ++ if (on) { ++ dev_dbg(gfb->dev, "%s: waiting for cmdq empty: ", ++ __FUNCTION__); ++ while (!glamofb_cmdq_empty(gfb)) ++ yield(); ++ dev_dbg(gfb->dev, "empty!\n"); ++ ++ /* display the entire frame then switch to command */ ++ reg_write(gfb, GLAMO_REG_LCD_COMMAND1, ++ GLAMO_LCD_CMD_TYPE_DISP | ++ GLAMO_LCD_CMD_DATA_FIRE_VSYNC); ++ ++ /* wait until LCD is idle */ ++ dev_dbg(gfb->dev, "waiting for LCD idle: "); ++ while (!reg_read(gfb, GLAMO_REG_LCD_STATUS2) & (1 << 12)) ++ yield(); ++ dev_dbg(gfb->dev, "idle!\n"); ++ ++ msleep(90); ++ } else { ++ /* RGB interface needs vsync/hsync */ ++ if (reg_read(gfb, GLAMO_REG_LCD_MODE3) & GLAMO_LCD_MODE3_RGB) ++ reg_write(gfb, GLAMO_REG_LCD_COMMAND1, ++ GLAMO_LCD_CMD_TYPE_DISP | ++ GLAMO_LCD_CMD_DATA_DISP_SYNC); ++ ++ reg_write(gfb, GLAMO_REG_LCD_COMMAND1, ++ GLAMO_LCD_CMD_TYPE_DISP | ++ GLAMO_LCD_CMD_DATA_DISP_FIRE); ++ } ++} ++EXPORT_SYMBOL_GPL(glamofb_cmd_mode); ++ ++int glamofb_cmd_write(struct glamofb_handle *gfb, u_int16_t val) ++{ ++ dev_dbg(gfb->dev, "%s: waiting for cmdq empty\n", ++ __FUNCTION__); ++ while (!glamofb_cmdq_empty(gfb)) ++ yield(); ++ dev_dbg(gfb->dev, "idle, writing 0x%04x\n", val); ++ ++ reg_write(gfb, GLAMO_REG_LCD_COMMAND1, val); ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(glamofb_cmd_write); ++ ++static struct fb_ops glamofb_ops = { ++ .owner = THIS_MODULE, ++ .fb_check_var = glamofb_check_var, ++ .fb_set_par = glamofb_set_par, ++ .fb_blank = glamofb_blank, ++ .fb_setcolreg = glamofb_setcolreg, ++ //.fb_cursor = glamofb_cursor, ++ .fb_fillrect = cfb_fillrect, ++ .fb_copyarea = cfb_copyarea, ++ .fb_imageblit = cfb_imageblit, ++}; ++ ++static int glamofb_init_regs(struct glamofb_handle *glamo) ++{ ++ struct fb_info *info = glamo->fb; ++ ++ glamofb_check_var(&info->var, info); ++ glamofb_run_script(glamo, glamo_regs, ARRAY_SIZE(glamo_regs)); ++ glamofb_set_par(info); ++ ++ return 0; ++} ++ ++static int __init glamofb_probe(struct platform_device *pdev) ++{ ++ int rc = -EIO; ++ struct fb_info *fbinfo; ++ struct glamofb_handle *glamofb; ++ struct glamofb_platform_data *mach_info = pdev->dev.platform_data; ++ ++ printk(KERN_INFO "SMEDIA Glamo frame buffer driver (C) 2007 " ++ "OpenMoko, Inc.\n"); ++ ++ fbinfo = framebuffer_alloc(sizeof(struct glamofb_handle), &pdev->dev); ++ if (!fbinfo) ++ return -ENOMEM; ++ ++ glamofb = fbinfo->par; ++ glamofb->fb = fbinfo; ++ glamofb->dev = &pdev->dev; ++ ++ strcpy(fbinfo->fix.id, "SMedia Glamo"); ++ ++ glamofb->reg = platform_get_resource_byname(pdev, IORESOURCE_MEM, ++ "glamo-fb-regs"); ++ if (!glamofb->reg) { ++ dev_err(&pdev->dev, "platform device with no registers?\n"); ++ rc = -ENOENT; ++ goto out_free; ++ } ++ ++ glamofb->fb_res = platform_get_resource_byname(pdev, IORESOURCE_MEM, ++ "glamo-fb-mem"); ++ if (!glamofb->fb_res) { ++ dev_err(&pdev->dev, "platform device with no memory ?\n"); ++ rc = -ENOENT; ++ goto out_free; ++ } ++ ++ glamofb->reg = request_mem_region(glamofb->reg->start, ++ RESSIZE(glamofb->reg), pdev->name); ++ if (!glamofb->reg) { ++ dev_err(&pdev->dev, "failed to request mmio region\n"); ++ goto out_free; ++ } ++ ++ glamofb->fb_res = request_mem_region(glamofb->fb_res->start, ++ mach_info->fb_mem_size, ++ pdev->name); ++ if (!glamofb->fb_res) { ++ dev_err(&pdev->dev, "failed to request vram region\n"); ++ goto out_release_reg; ++ } ++ ++ /* we want to remap only the registers required for this core ++ * driver. */ ++ glamofb->base = ioremap(glamofb->reg->start, RESSIZE(glamofb->reg)); ++ if (!glamofb->base) { ++ dev_err(&pdev->dev, "failed to ioremap() mmio memory\n"); ++ goto out_release_fb; ++ } ++ fbinfo->fix.smem_start = (unsigned long) glamofb->fb_res->start; ++ fbinfo->fix.smem_len = mach_info->fb_mem_size; ++ ++ fbinfo->screen_base = ioremap(glamofb->fb_res->start, ++ RESSIZE(glamofb->fb_res)); ++ if (!fbinfo->screen_base) { ++ dev_err(&pdev->dev, "failed to ioremap() vram memory\n"); ++ goto out_release_fb; ++ } ++ ++ platform_set_drvdata(pdev, fbinfo); ++ ++ glamofb->mach_info = pdev->dev.platform_data; ++ ++ fbinfo->fix.visual = FB_VISUAL_TRUECOLOR; ++ fbinfo->fix.type = FB_TYPE_PACKED_PIXELS; ++ fbinfo->fix.type_aux = 0; ++ fbinfo->fix.xpanstep = 0; ++ fbinfo->fix.ypanstep = 0; ++ fbinfo->fix.ywrapstep = 0; ++ fbinfo->fix.accel = FB_ACCEL_NONE; /* FIXME */ ++ ++ fbinfo->var.nonstd = 0; ++ fbinfo->var.activate = FB_ACTIVATE_NOW; ++ fbinfo->var.height = mach_info->height; ++ fbinfo->var.width = mach_info->width; ++ fbinfo->var.accel_flags = 0; ++ fbinfo->var.vmode = FB_VMODE_NONINTERLACED; ++ ++ fbinfo->fbops = &glamofb_ops; ++ fbinfo->flags = FBINFO_FLAG_DEFAULT; ++ fbinfo->pseudo_palette = &glamofb->pseudo_pal; ++ ++ fbinfo->var.xres = mach_info->xres.defval; ++ fbinfo->var.xres_virtual = mach_info->xres.defval; ++ fbinfo->var.yres = mach_info->yres.defval; ++ fbinfo->var.yres_virtual = mach_info->yres.defval; ++ fbinfo->var.bits_per_pixel = mach_info->bpp.defval; ++ ++ fbinfo->var.pixclock = mach_info->pixclock; ++ fbinfo->var.left_margin = mach_info->left_margin; ++ fbinfo->var.right_margin = mach_info->right_margin; ++ fbinfo->var.upper_margin = mach_info->upper_margin; ++ fbinfo->var.lower_margin = mach_info->lower_margin; ++ fbinfo->var.hsync_len = mach_info->hsync_len; ++ fbinfo->var.vsync_len = mach_info->vsync_len; ++ ++ memset(fbinfo->screen_base, 0, fbinfo->fix.smem_len); ++ ++ glamo_engine_enable(mach_info->glamo, GLAMO_ENGINE_LCD); ++ glamo_engine_reset(mach_info->glamo, GLAMO_ENGINE_LCD); ++ glamofb_init_regs(glamofb); ++ ++ rc = register_framebuffer(fbinfo); ++ if (rc < 0) { ++ dev_err(&pdev->dev, "failed to register framebuffer\n"); ++ goto out_unmap_fb; ++ } ++ ++ if (mach_info->spi_info) { ++ /* register the sibling spi device */ ++ mach_info->spi_info->glamofb_handle = glamofb; ++ glamo_spi_dev.dev.parent = &pdev->dev; ++ glamo_spi_dev.dev.platform_data = mach_info->spi_info; ++ platform_device_register(&glamo_spi_dev); ++ } ++ ++ printk(KERN_INFO "fb%d: %s frame buffer device\n", ++ fbinfo->node, fbinfo->fix.id); ++ ++ return 0; ++ ++out_unmap_fb: ++ iounmap(fbinfo->screen_base); ++ iounmap(glamofb->base); ++out_release_fb: ++ release_mem_region(glamofb->fb_res->start, RESSIZE(glamofb->fb_res)); ++out_release_reg: ++ release_mem_region(glamofb->reg->start, RESSIZE(glamofb->reg)); ++out_free: ++ framebuffer_release(fbinfo); ++ return rc; ++} ++ ++static int glamofb_remove(struct platform_device *pdev) ++{ ++ struct glamofb_handle *glamofb = platform_get_drvdata(pdev); ++ ++ platform_set_drvdata(pdev, NULL); ++ iounmap(glamofb->base); ++ release_mem_region(glamofb->reg->start, RESSIZE(glamofb->reg)); ++ kfree(glamofb); ++ ++ return 0; ++} ++ ++#ifdef CONFIG_PM ++static int glamofb_suspend(struct platform_device *pdev, pm_message_t state) ++{ ++ return 0; ++} ++ ++static int glamofb_resume(struct platform_device *pdev) ++{ ++ return 0; ++} ++#else ++#define glamofb_suspend NULL ++#define glamofb_resume NULL ++#endif ++ ++static struct platform_driver glamofb_driver = { ++ .probe = glamofb_probe, ++ .remove = glamofb_remove, ++ .suspend = glamofb_suspend, ++ .resume = glamofb_resume, ++ .driver = { ++ .name = "glamo-fb", ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static int __devinit glamofb_init(void) ++{ ++ return platform_driver_register(&glamofb_driver); ++} ++ ++static void __exit glamofb_cleanup(void) ++{ ++ platform_driver_unregister(&glamofb_driver); ++} ++ ++module_init(glamofb_init); ++module_exit(glamofb_cleanup); ++ ++MODULE_AUTHOR("Harald Welte "); ++MODULE_DESCRIPTION("Smedia Glamo 336x/337x framebuffer driver"); ++MODULE_LICENSE("GPL"); +diff --git a/drivers/mfd/glamo/glamo-gpio.c b/drivers/mfd/glamo/glamo-gpio.c +new file mode 100644 +index 0000000..45d0bf9 +--- /dev/null ++++ b/drivers/mfd/glamo/glamo-gpio.c +@@ -0,0 +1,62 @@ ++ ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include "glamo-core.h" ++#include "glamo-regs.h" ++ ++void glamo_gpio_setpin(struct glamo_core *glamo, unsigned int pin, ++ unsigned int value) ++{ ++ unsigned int reg = REG_OF_GPIO(pin); ++ u_int16_t tmp; ++ ++ spin_lock(&glamo->lock); ++ tmp = readw(glamo->base + reg); ++ if (value) ++ tmp |= OUTPUT_BIT(pin); ++ else ++ tmp &= ~OUTPUT_BIT(pin); ++ writew(tmp, glamo->base + reg); ++ spin_unlock(&glamo->lock); ++} ++EXPORT_SYMBOL(glamo_gpio_setpin); ++ ++int glamo_gpio_getpin(struct glamo_core *glamo, unsigned int pin) ++{ ++ return readw(REG_OF_GPIO(pin)) & INPUT_BIT(pin) ? 1 : 0; ++} ++EXPORT_SYMBOL(glamo_gpio_getpin); ++ ++void glamo_gpio_cfgpin(struct glamo_core *glamo, unsigned int pinfunc) ++{ ++ unsigned int reg = REG_OF_GPIO(pinfunc); ++ u_int16_t tmp; ++ ++ spin_lock(&glamo->lock); ++ tmp = readw(glamo->base + reg); ++ ++ if ((pinfunc & 0x00f0) == GLAMO_GPIO_F_FUNC) { ++ /* pin is a function pin: clear gpio bit */ ++ tmp &= ~FUNC_BIT(pinfunc); ++ } else { ++ /* pin is gpio: set gpio bit */ ++ tmp |= FUNC_BIT(pinfunc); ++ ++ if (pinfunc & GLAMO_GPIO_F_IN) { ++ /* gpio input: set bit to disable output mode */ ++ tmp |= GPIO_OUT_BIT(pinfunc); ++ } else if (pinfunc & GLAMO_GPIO_F_OUT) { ++ /* gpio output: clear bit to enable output mode */ ++ tmp &= ~GPIO_OUT_BIT(pinfunc); ++ } ++ } ++ writew(tmp, glamo->base + reg); ++ spin_unlock(&glamo->lock); ++} ++EXPORT_SYMBOL(glamo_gpio_cfgpin); ++ +diff --git a/drivers/mfd/glamo/glamo-lcm-spi.c b/drivers/mfd/glamo/glamo-lcm-spi.c +new file mode 100644 +index 0000000..92cabe4 +--- /dev/null ++++ b/drivers/mfd/glamo/glamo-lcm-spi.c +@@ -0,0 +1,241 @@ ++/* ++ * Copyright (C) 2007 OpenMoko, Inc. ++ * Author: Harald Welte ++ * ++ * Smedia Glamo GPIO based SPI driver ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * This driver currently only implements a minimum subset of the hardware ++ * features, esp. those features that are required to drive the jbt6k74 ++ * LCM controller asic in the TD028TTEC1 LCM. ++ * ++*/ ++ ++#define DEBUG ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++ ++#include ++ ++#include ++ ++#include "glamo-core.h" ++#include "glamo-regs.h" ++ ++struct glamo_spi { ++ struct spi_bitbang bitbang; ++ struct spi_master *master; ++ struct glamo_spi_info *info; ++ struct device *dev; ++}; ++ ++static inline struct glamo_spi *to_gs(struct spi_device *spi) ++{ ++ return spi->controller_data; ++} ++ ++static int glamo_spi_setupxfer(struct spi_device *spi, struct spi_transfer *t) ++{ ++ struct glamo_spi *gs = to_gs(spi); ++ unsigned int bpw; ++ ++ bpw = t ? t->bits_per_word : spi->bits_per_word; ++ ++ if (bpw != 9 && bpw != 8) { ++ dev_err(&spi->dev, "invalid bits-per-word (%d)\n", bpw); ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static void glamo_spi_chipsel(struct spi_device *spi, int value) ++{ ++#if 0 ++ struct glamo_spi *gs = to_gs(spi); ++ ++ dev_dbg(&spi->dev, "chipsel %d: spi=%p, gs=%p, info=%p, handle=%p\n", ++ value, spi, gs, gs->info, gs->info->glamofb_handle); ++ ++ glamofb_cmd_mode(gs->info->glamofb_handle, value); ++#endif ++} ++ ++static int glamo_spi_txrx(struct spi_device *spi, struct spi_transfer *t) ++{ ++ struct glamo_spi *gs = to_gs(spi); ++ const u_int16_t *ui16 = (const u_int16_t *) t->tx_buf; ++ u_int16_t nine_bits; ++ int i; ++ ++ dev_dbg(&spi->dev, "txrx: tx %p, rx %p, bpw %d, len %d\n", ++ t->tx_buf, t->rx_buf, t->bits_per_word, t->len); ++ ++ if (spi->bits_per_word == 9) ++ nine_bits = (1 << 9); ++ else ++ nine_bits = 0; ++ ++ if (t->len > 3 * sizeof(u_int16_t)) { ++ dev_err(&spi->dev, "this driver doesn't support " ++ "%u sized xfers\n", t->len); ++ return -EINVAL; ++ } ++ ++ for (i = 0; i < t->len/sizeof(u_int16_t); i++) { ++ /* actually transfer the data */ ++#if 1 ++ glamofb_cmd_write(gs->info->glamofb_handle, ++ GLAMO_LCD_CMD_TYPE_SERIAL | nine_bits | ++ (1 << 10) | (1 << 11) | (ui16[i] & 0x1ff)); ++#endif ++ /* FIXME: fire ?!? */ ++ if (i == 0 && (ui16[i] & 0x1ff) == 0x29) { ++ dev_dbg(&spi->dev, "leaving command mode\n"); ++ glamofb_cmd_mode(gs->info->glamofb_handle, 0); ++ } ++ } ++ ++ return t->len; ++} ++ ++static int glamo_spi_setup(struct spi_device *spi) ++{ ++ int ret; ++ ++ if (!spi->bits_per_word) ++ spi->bits_per_word = 9; ++ ++ /* FIXME: hardware can do this */ ++ if (spi->mode & SPI_LSB_FIRST) ++ return -EINVAL; ++ ++ ret = glamo_spi_setupxfer(spi, NULL); ++ if (ret < 0) { ++ dev_err(&spi->dev, "setupxfer returned %d\n", ret); ++ return ret; ++ } ++ ++ dev_dbg(&spi->dev, "%s: mode %d, %u bpw\n", ++ __FUNCTION__, spi->mode, spi->bits_per_word); ++ ++ return 0; ++} ++ ++static int glamo_spi_probe(struct platform_device *pdev) ++{ ++ struct spi_master *master; ++ struct glamo_spi *sp; ++ int ret; ++ int i; ++ ++ master = spi_alloc_master(&pdev->dev, sizeof(struct glamo_spi)); ++ if (master == NULL) { ++ dev_err(&pdev->dev, "failed to allocate spi master\n"); ++ ret = -ENOMEM; ++ goto err; ++ } ++ ++ sp = spi_master_get_devdata(master); ++ memset(sp, 0, sizeof(struct glamo_spi)); ++ ++ sp->master = spi_master_get(master); ++ sp->info = pdev->dev.platform_data; ++ if (!sp->info) { ++ dev_err(&pdev->dev, "can't operate without platform data\n"); ++ ret = -EIO; ++ goto err_no_pdev; ++ } ++ dev_dbg(&pdev->dev, "sp->info(pdata) = %p\n", sp->info); ++ ++ sp->dev = &pdev->dev; ++ ++ platform_set_drvdata(pdev, sp); ++ ++ sp->bitbang.master = sp->master; ++ sp->bitbang.setup_transfer = glamo_spi_setupxfer; ++ sp->bitbang.chipselect = glamo_spi_chipsel; ++ sp->bitbang.txrx_bufs = glamo_spi_txrx; ++ sp->bitbang.master->setup = glamo_spi_setup; ++ ++ ret = spi_bitbang_start(&sp->bitbang); ++ if (ret) ++ goto err_no_bitbang; ++ ++ /* register the chips to go with the board */ ++ ++ glamofb_cmd_mode(sp->info->glamofb_handle, 1); ++ ++ for (i = 0; i < sp->info->board_size; i++) { ++ dev_info(&pdev->dev, "registering %p: %s\n", ++ &sp->info->board_info[i], ++ sp->info->board_info[i].modalias); ++ ++ sp->info->board_info[i].controller_data = sp; ++ spi_new_device(master, sp->info->board_info + i); ++ } ++ ++ return 0; ++ ++err_no_bitbang: ++ platform_set_drvdata(pdev, NULL); ++err_no_pdev: ++ spi_master_put(sp->bitbang.master); ++err: ++ return ret; ++ ++} ++ ++static int glamo_spi_remove(struct platform_device *pdev) ++{ ++ struct glamo_spi *sp = platform_get_drvdata(pdev); ++ ++ spi_bitbang_stop(&sp->bitbang); ++ spi_master_put(sp->bitbang.master); ++ ++ return 0; ++} ++ ++#define glamo_spi_suspend NULL ++#define glamo_spi_resume NULL ++ ++static struct platform_driver glamo_spi_drv = { ++ .probe = glamo_spi_probe, ++ .remove = glamo_spi_remove, ++ .suspend = glamo_spi_suspend, ++ .resume = glamo_spi_resume, ++ .driver = { ++ .name = "glamo-lcm-spi", ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static int __init glamo_spi_init(void) ++{ ++ return platform_driver_register(&glamo_spi_drv); ++} ++ ++static void __exit glamo_spi_exit(void) ++{ ++ platform_driver_unregister(&glamo_spi_drv); ++} ++ ++module_init(glamo_spi_init); ++module_exit(glamo_spi_exit); ++ ++MODULE_DESCRIPTION("Smedia Glamo 336x/337x LCM serial command SPI Driver"); ++MODULE_AUTHOR("Harald Welte ") ++MODULE_LICENSE("GPL"); +diff --git a/drivers/mfd/glamo/glamo-regs.h b/drivers/mfd/glamo/glamo-regs.h +new file mode 100644 +index 0000000..151cd66 +--- /dev/null ++++ b/drivers/mfd/glamo/glamo-regs.h +@@ -0,0 +1,477 @@ ++#ifndef _GLAMO_REGS_H ++#define _GLAMO_REGS_H ++ ++/* Smedia Glamo 336x/337x driver ++ * ++ * (C) 2007 by OpenMoko, Inc. ++ * Author: Harald Welte ++ * All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ */ ++ ++enum glamo_regster_offsets { ++ GLAMO_REGOFS_GENERIC = 0x0000, ++ GLAMO_REGOFS_HOSTBUS = 0x0200, ++ GLAMO_REGOFS_MEMORY = 0x0300, ++ GLAMO_REGOFS_VIDCAP = 0x0400, ++ GLAMO_REGOFS_ISP = 0x0500, ++ GLAMO_REGOFS_JPEG = 0x0800, ++ GLAMO_REGOFS_MPEG = 0x0c00, ++ GLAMO_REGOFS_LCD = 0x1100, ++ GLAMO_REGOFS_MMC = 0x1400, ++ GLAMO_REGOFS_MPROC0 = 0x1500, ++ GLAMO_REGOFS_MPROC1 = 0x1580, ++ GLAMO_REGOFS_CMDQUEUE = 0x1600, ++ GLAMO_REGOFS_RISC = 0x1680, ++ GLAMO_REGOFS_2D = 0x1700, ++ GLAMO_REGOFS_3D = 0x1b00, ++ GLAMO_REGOFS_END = 0x2400, ++}; ++ ++ ++enum glamo_register_generic { ++ GLAMO_REG_GCONF1 = 0x0000, ++ GLAMO_REG_GCONF2 = 0x0002, ++#define GLAMO_REG_DEVICE_ID GLAMO_REG_GCONF2 ++ GLAMO_REG_GCONF3 = 0x0004, ++#define GLAMO_REG_REVISION_ID GLAMO_REG_GCONF3 ++ GLAMO_REG_IRQ_GEN1 = 0x0006, ++#define GLAMO_REG_IRQ_ENABLE GLAMO_REG_IRQ_GEN1 ++ GLAMO_REG_IRQ_GEN2 = 0x0008, ++#define GLAMO_REG_IRQ_SET GLAMO_REG_IRQ_GEN2 ++ GLAMO_REG_IRQ_GEN3 = 0x000a, ++#define GLAMO_REG_IRQ_CLEAR GLAMO_REG_IRQ_GEN3 ++ GLAMO_REG_IRQ_GEN4 = 0x000c, ++#define GLAMO_REG_IRQ_STATUS GLAMO_REG_IRQ_GEN4 ++ GLAMO_REG_CLOCK_HOST = 0x0010, ++ GLAMO_REG_CLOCK_MEMORY = 0x0012, ++ GLAMO_REG_CLOCK_LCD = 0x0014, ++ GLAMO_REG_CLOCK_MMC = 0x0016, ++ GLAMO_REG_CLOCK_ISP = 0x0018, ++ GLAMO_REG_CLOCK_JPEG = 0x001a, ++ GLAMO_REG_CLOCK_3D = 0x001c, ++ GLAMO_REG_CLOCK_2D = 0x001e, ++ GLAMO_REG_CLOCK_RISC1 = 0x0020, /* 3365 only? */ ++ GLAMO_REG_CLOCK_RISC2 = 0x0022, /* 3365 only? */ ++ GLAMO_REG_CLOCK_MPEG = 0x0024, ++ GLAMO_REG_CLOCK_MPROC = 0x0026, ++ ++ GLAMO_REG_CLOCK_GEN5_1 = 0x0030, ++ GLAMO_REG_CLOCK_GEN5_2 = 0x0032, ++ GLAMO_REG_CLOCK_GEN6 = 0x0034, ++ GLAMO_REG_CLOCK_GEN7 = 0x0036, ++ GLAMO_REG_CLOCK_GEN8 = 0x0038, ++ GLAMO_REG_CLOCK_GEN9 = 0x003a, ++ GLAMO_REG_CLOCK_GEN10 = 0x003c, ++ GLAMO_REG_CLOCK_GEN11 = 0x003e, ++ GLAMO_REG_PLL_GEN1 = 0x0040, ++ GLAMO_REG_PLL_GEN2 = 0x0042, ++ GLAMO_REG_PLL_GEN3 = 0x0044, ++ GLAMO_REG_PLL_GEN4 = 0x0046, ++ GLAMO_REG_PLL_GEN5 = 0x0048, ++ GLAMO_REG_GPIO_GEN1 = 0x0050, ++ GLAMO_REG_GPIO_GEN2 = 0x0052, ++ GLAMO_REG_GPIO_GEN3 = 0x0054, ++ GLAMO_REG_GPIO_GEN4 = 0x0056, ++ GLAMO_REG_GPIO_GEN5 = 0x0058, ++ GLAMO_REG_GPIO_GEN6 = 0x005a, ++ GLAMO_REG_GPIO_GEN7 = 0x005c, ++ GLAMO_REG_GPIO_GEN8 = 0x005e, ++ GLAMO_REG_GPIO_GEN9 = 0x0060, ++ GLAMO_REG_GPIO_GEN10 = 0x0062, ++ GLAMO_REG_DFT_GEN1 = 0x0070, ++ GLAMO_REG_DFT_GEN2 = 0x0072, ++ GLAMO_REG_DFT_GEN3 = 0x0074, ++ GLAMO_REG_DFT_GEN4 = 0x0076, ++ ++ GLAMO_REG_DFT_GEN5 = 0x01e0, ++ GLAMO_REG_DFT_GEN6 = 0x01f0, ++}; ++ ++#define GLAMO_REG_HOSTBUS(x) (GLAMO_REGOFS_HOSTBUS-2+(x*2)) ++ ++#define REG_MEM(x) (GLAMO_REGOFS_MEMORY+(x)) ++#define GLAMO_REG_MEM_TIMING(x) (GLAMO_REG_MEM_TIMING1-2+(x*2)) ++ ++enum glamo_register_mem { ++ GLAMO_REG_MEM_TYPE = REG_MEM(0x00), ++ GLAMO_REG_MEM_GEN = REG_MEM(0x02), ++ GLAMO_REG_MEM_TIMING1 = REG_MEM(0x04), ++ GLAMO_REG_MEM_TIMING2 = REG_MEM(0x06), ++ GLAMO_REG_MEM_TIMING3 = REG_MEM(0x08), ++ GLAMO_REG_MEM_TIMING4 = REG_MEM(0x0a), ++ GLAMO_REG_MEM_TIMING5 = REG_MEM(0x0c), ++ GLAMO_REG_MEM_TIMING6 = REG_MEM(0x0e), ++ GLAMO_REG_MEM_TIMING7 = REG_MEM(0x10), ++ GLAMO_REG_MEM_TIMING8 = REG_MEM(0x12), ++ GLAMO_REG_MEM_TIMING9 = REG_MEM(0x14), ++ GLAMO_REG_MEM_TIMING10 = REG_MEM(0x16), ++ GLAMO_REG_MEM_TIMING11 = REG_MEM(0x18), ++ GLAMO_REG_MEM_POWER1 = REG_MEM(0x1a), ++ GLAMO_REG_MEM_POWER2 = REG_MEM(0x1c), ++ GLAMO_REG_MEM_LCD_BUF1 = REG_MEM(0x1e), ++ GLAMO_REG_MEM_LCD_BUF2 = REG_MEM(0x20), ++ GLAMO_REG_MEM_LCD_BUF3 = REG_MEM(0x22), ++ GLAMO_REG_MEM_LCD_BUF4 = REG_MEM(0x24), ++ GLAMO_REG_MEM_BIST1 = REG_MEM(0x26), ++ GLAMO_REG_MEM_BIST2 = REG_MEM(0x28), ++ GLAMO_REG_MEM_BIST3 = REG_MEM(0x2a), ++ GLAMO_REG_MEM_BIST4 = REG_MEM(0x2c), ++ GLAMO_REG_MEM_BIST5 = REG_MEM(0x2e), ++ GLAMO_REG_MEM_MAH1 = REG_MEM(0x30), ++ GLAMO_REG_MEM_MAH2 = REG_MEM(0x32), ++ GLAMO_REG_MEM_DRAM1 = REG_MEM(0x34), ++ GLAMO_REG_MEM_DRAM2 = REG_MEM(0x36), ++ GLAMO_REG_MEM_CRC = REG_MEM(0x38), ++}; ++ ++#define GLAMO_MEM_TYPE_MASK 0x03 ++ ++enum glamo_reg_mem_dram1 { ++ GLAMO_MEM_DRAM1_EN_SDRAM_CLK = (1 << 11), ++ GLAMO_MEM_DRAM1_SELF_REFRESH = (1 << 12), ++}; ++ ++enum glamo_reg_mem_dram2 { ++ GLAMO_MEM_DRAM2_DEEP_PWRDOWN = (1 << 12), ++}; ++ ++enum glamo_irq { ++ GLAMO_IRQ_HOSTBUS = 0x0001, ++ GLAMO_IRQ_JPEG = 0x0002, ++ GLAMO_IRQ_MPEG = 0x0004, ++ GLAMO_IRQ_MPROC1 = 0x0008, ++ GLAMO_IRQ_MPROC0 = 0x0010, ++ GLAMO_IRQ_CMDQUEUE = 0x0020, ++ GLAMO_IRQ_2D = 0x0040, ++ GLAMO_IRQ_MMC = 0x0080, ++ GLAMO_IRQ_RISC = 0x0100, ++}; ++ ++enum glamo_reg_clock_host { ++ GLAMO_CLOCK_HOST_DG_BCLK = 0x0001, ++ GLAMO_CLOCK_HOST_DG_M0CLK = 0x0004, ++ GLAMO_CLOCK_HOST_RESET = 0x1000, ++}; ++ ++enum glamo_reg_clock_mem { ++ GLAMO_CLOCK_MEM_DG_M1CLK = 0x0001, ++ GLAMO_CLOCK_MEM_EN_M1CLK = 0x0002, ++ GLAMO_CLOCK_MEM_DG_MOCACLK = 0x0004, ++ GLAMO_CLOCK_MEM_EN_MOCACLK = 0x0008, ++ GLAMO_CLOCK_MEM_RESET = 0x1000, ++ GLAMO_CLOCK_MOCA_RESET = 0x2000, ++}; ++ ++enum glamo_reg_clock_lcd { ++ GLAMO_CLOCK_LCD_DG_DCLK = 0x0001, ++ GLAMO_CLOCK_LCD_EN_DCLK = 0x0002, ++ GLAMO_CLOCK_LCD_DG_DMCLK = 0x0004, ++ GLAMO_CLOCK_LCD_EN_DMCLK = 0x0008, ++ // ++ GLAMO_CLOCK_LCD_EN_DHCLK = 0x0020, ++ GLAMO_CLOCK_LCD_DG_M5CLK = 0x0040, ++ GLAMO_CLOCK_LCD_EN_M5CLK = 0x0080, ++ GLAMO_CLOCK_LCD_RESET = 0x1000, ++}; ++ ++enum glamo_reg_clock_mmc { ++ GLAMO_CLOCK_MMC_DG_TCLK = 0x0001, ++ GLAMO_CLOCK_MMC_EN_TCLK = 0x0002, ++ GLAMO_CLOCK_MMC_DG_M9CLK = 0x0004, ++ GLAMO_CLOCK_MMC_EN_M9CLK = 0x0008, ++ GLAMO_CLOCK_MMC_RESET = 0x1000, ++}; ++ ++enum glamo_reg_clock_isp { ++ GLAMO_CLOCK_ISP_DG_I1CLK = 0x0001, ++ GLAMO_CLOCK_ISP_EN_I1CLK = 0x0002, ++ GLAMO_CLOCK_ISP_DG_CCLK = 0x0004, ++ GLAMO_CLOCK_ISP_EN_CCLK = 0x0008, ++ // ++ GLAMO_CLOCK_ISP_EN_SCLK = 0x0020, ++ GLAMO_CLOCK_ISP_DG_M2CLK = 0x0040, ++ GLAMO_CLOCK_ISP_EN_M2CLK = 0x0080, ++ GLAMO_CLOCK_ISP_DG_M15CLK = 0x0100, ++ GLAMO_CLOCK_ISP_EN_M15CLK = 0x0200, ++ GLAMO_CLOCK_ISP1_RESET = 0x1000, ++ GLAMO_CLOCK_ISP2_RESET = 0x2000, ++}; ++ ++enum glamo_reg_clock_jpeg { ++ GLAMO_CLOCK_JPEG_DG_JCLK = 0x0001, ++ GLAMO_CLOCK_JPEG_EN_JCLK = 0x0002, ++ GLAMO_CLOCK_JPEG_DG_M3CLK = 0x0004, ++ GLAMO_CLOCK_JPEG_EN_M3CLK = 0x0008, ++ GLAMO_CLOCK_JPEG_RESET = 0x1000, ++}; ++ ++enum glamo_reg_clock_2d { ++ GLAMO_CLOCK_2D_DG_GCLK = 0x0001, ++ GLAMO_CLOCK_2D_EN_GCLK = 0x0002, ++ GLAMO_CLOCK_2D_DG_M7CLK = 0x0004, ++ GLAMO_CLOCK_2D_EN_M7CLK = 0x0008, ++ GLAMO_CLOCK_2D_DG_M6CLK = 0x0010, ++ GLAMO_CLOCK_2D_EN_M6CLK = 0x0020, ++ GLAMO_CLOCK_2D_RESET = 0x1000, ++ GLAMO_CLOCK_2D_CQ_RESET = 0x2000, ++}; ++ ++enum glamo_reg_clock_3d { ++ GLAMO_CLOCK_3D_DG_ECLK = 0x0001, ++ GLAMO_CLOCK_3D_EN_ECLK = 0x0002, ++ GLAMO_CLOCK_3D_DG_RCLK = 0x0004, ++ GLAMO_CLOCK_3D_EN_RCLK = 0x0008, ++ GLAMO_CLOCK_3D_DG_M8CLK = 0x0010, ++ GLAMO_CLOCK_3D_EN_M8CLK = 0x0020, ++ GLAMO_CLOCK_3D_BACK_RESET = 0x1000, ++ GLAMO_CLOCK_3D_FRONT_RESET = 0x2000, ++}; ++ ++enum glamo_reg_clock_mpeg { ++ GLAMO_CLOCK_MPEG_DG_X0CLK = 0x0001, ++ GLAMO_CLOCK_MPEG_EN_X0CLK = 0x0002, ++ GLAMO_CLOCK_MPEG_DG_X1CLK = 0x0004, ++ GLAMO_CLOCK_MPEG_EN_X1CLK = 0x0008, ++ GLAMO_CLOCK_MPEG_DG_X2CLK = 0x0010, ++ GLAMO_CLOCK_MPEG_EN_X2CLK = 0x0020, ++ GLAMO_CLOCK_MPEG_DG_X3CLK = 0x0040, ++ GLAMO_CLOCK_MPEG_EN_X3CLK = 0x0080, ++ GLAMO_CLOCK_MPEG_DG_X4CLK = 0x0100, ++ GLAMO_CLOCK_MPEG_EN_X4CLK = 0x0200, ++ GLAMO_CLOCK_MPEG_DG_X6CLK = 0x0400, ++ GLAMO_CLOCK_MPEG_EN_X6CLK = 0x0800, ++ GLAMO_CLOCK_MPEG_ENC_RESET = 0x1000, ++ GLAMO_CLOCK_MPEG_DEC_RESET = 0x2000, ++}; ++ ++enum glamo_reg_clock51 { ++ GLAMO_CLOCK_GEN51_EN_DIV_MCLK = 0x0001, ++ GLAMO_CLOCK_GEN51_EN_DIV_SCLK = 0x0002, ++ GLAMO_CLOCK_GEN51_EN_DIV_JCLK = 0x0004, ++ GLAMO_CLOCK_GEN51_EN_DIV_DCLK = 0x0008, ++ GLAMO_CLOCK_GEN51_EN_DIV_DMCLK = 0x0010, ++ GLAMO_CLOCK_GEN51_EN_DIV_DHCLK = 0x0020, ++ GLAMO_CLOCK_GEN51_EN_DIV_GCLK = 0x0040, ++ GLAMO_CLOCK_GEN51_EN_DIV_TCLK = 0x0080, ++ /* FIXME: higher bits */ ++}; ++ ++enum glamo_reg_hostbus2 { ++ GLAMO_HOSTBUS2_MMIO_EN_ISP = 0x0001, ++ GLAMO_HOSTBUS2_MMIO_EN_JPEG = 0x0002, ++ GLAMO_HOSTBUS2_MMIO_EN_MPEG = 0x0004, ++ GLAMO_HOSTBUS2_MMIO_EN_LCD = 0x0008, ++ GLAMO_HOSTBUS2_MMIO_EN_MMC = 0x0010, ++ GLAMO_HOSTBUS2_MMIO_EN_MICROP0 = 0x0020, ++ GLAMO_HOSTBUS2_MMIO_EN_MICROP1 = 0x0040, ++ GLAMO_HOSTBUS2_MMIO_EN_CQ = 0x0080, ++ GLAMO_HOSTBUS2_MMIO_EN_RISC = 0x0100, ++ GLAMO_HOSTBUS2_MMIO_EN_2D = 0x0200, ++ GLAMO_HOSTBUS2_MMIO_EN_3D = 0x0400, ++}; ++ ++/* LCD Controller */ ++ ++#define REG_LCD(x) (x) ++enum glamo_reg_lcd { ++ GLAMO_REG_LCD_MODE1 = REG_LCD(0x00), ++ GLAMO_REG_LCD_MODE2 = REG_LCD(0x02), ++ GLAMO_REG_LCD_MODE3 = REG_LCD(0x04), ++ GLAMO_REG_LCD_WIDTH = REG_LCD(0x06), ++ GLAMO_REG_LCD_HEIGHT = REG_LCD(0x08), ++ GLAMO_REG_LCD_POLARITY = REG_LCD(0x0a), ++ GLAMO_REG_LCD_A_BASE1 = REG_LCD(0x0c), ++ GLAMO_REG_LCD_A_BASE2 = REG_LCD(0x0e), ++ GLAMO_REG_LCD_B_BASE1 = REG_LCD(0x10), ++ GLAMO_REG_LCD_B_BASE2 = REG_LCD(0x12), ++ GLAMO_REG_LCD_C_BASE1 = REG_LCD(0x14), ++ GLAMO_REG_LCD_C_BASE2 = REG_LCD(0x16), ++ GLAMO_REG_LCD_PITCH = REG_LCD(0x18), ++ /* RES */ ++ GLAMO_REG_LCD_HORIZ_TOTAL = REG_LCD(0x1c), ++ /* RES */ ++ GLAMO_REG_LCD_HORIZ_RETR_START = REG_LCD(0x20), ++ /* RES */ ++ GLAMO_REG_LCD_HORIZ_RETR_END = REG_LCD(0x24), ++ /* RES */ ++ GLAMO_REG_LCD_HORIZ_DISP_START = REG_LCD(0x28), ++ /* RES */ ++ GLAMO_REG_LCD_HORIZ_DISP_END = REG_LCD(0x2c), ++ /* RES */ ++ GLAMO_REG_LCD_VERT_TOTAL = REG_LCD(0x30), ++ /* RES */ ++ GLAMO_REG_LCD_VERT_RETR_START = REG_LCD(0x34), ++ /* RES */ ++ GLAMO_REG_LCD_VERT_RETR_END = REG_LCD(0x38), ++ /* RES */ ++ GLAMO_REG_LCD_VERT_DISP_START = REG_LCD(0x3c), ++ /* RES */ ++ GLAMO_REG_LCD_VERT_DISP_END = REG_LCD(0x40), ++ /* RES */ ++ GLAMO_REG_LCD_POL = REG_LCD(0x44), ++ GLAMO_REG_LCD_DATA_START = REG_LCD(0x46), ++ GLAMO_REG_LCD_FRATE_CONTRO = REG_LCD(0x48), ++ GLAMO_REG_LCD_DATA_CMD_HDR = REG_LCD(0x4a), ++ GLAMO_REG_LCD_SP_START = REG_LCD(0x4c), ++ GLAMO_REG_LCD_SP_END = REG_LCD(0x4e), ++ GLAMO_REG_LCD_CURSOR_BASE1 = REG_LCD(0x50), ++ GLAMO_REG_LCD_CURSOR_BASE2 = REG_LCD(0x52), ++ GLAMO_REG_LCD_CURSOR_PITCH = REG_LCD(0x54), ++ GLAMO_REG_LCD_CURSOR_X_SIZE = REG_LCD(0x56), ++ GLAMO_REG_LCD_CURSOR_Y_SIZE = REG_LCD(0x58), ++ GLAMO_REG_LCD_CURSOR_X_POS = REG_LCD(0x5a), ++ GLAMO_REG_LCD_CURSOR_Y_POS = REG_LCD(0x5c), ++ GLAMO_REG_LCD_CURSOR_PRESET = REG_LCD(0x5e), ++ GLAMO_REG_LCD_CURSOR_FG_COLOR = REG_LCD(0x60), ++ /* RES */ ++ GLAMO_REG_LCD_CURSOR_BG_COLOR = REG_LCD(0x64), ++ /* RES */ ++ GLAMO_REG_LCD_CURSOR_DST_COLOR = REG_LCD(0x68), ++ /* RES */ ++ GLAMO_REG_LCD_STATUS1 = REG_LCD(0x80), ++ GLAMO_REG_LCD_STATUS2 = REG_LCD(0x82), ++ GLAMO_REG_LCD_STATUS3 = REG_LCD(0x84), ++ GLAMO_REG_LCD_STATUS4 = REG_LCD(0x86), ++ /* RES */ ++ GLAMO_REG_LCD_COMMAND1 = REG_LCD(0xa0), ++ GLAMO_REG_LCD_COMMAND2 = REG_LCD(0xa2), ++ /* RES */ ++ GLAMO_REG_LCD_WFORM_DELAY1 = REG_LCD(0xb0), ++ GLAMO_REG_LCD_WFORM_DELAY2 = REG_LCD(0xb2), ++ /* RES */ ++ GLAMO_REG_LCD_GAMMA_CORR = REG_LCD(0x100), ++ /* RES */ ++ GLAMO_REG_LCD_GAMMA_R_ENTRY01 = REG_LCD(0x110), ++ GLAMO_REG_LCD_GAMMA_R_ENTRY23 = REG_LCD(0x112), ++ GLAMO_REG_LCD_GAMMA_R_ENTRY45 = REG_LCD(0x114), ++ GLAMO_REG_LCD_GAMMA_R_ENTRY67 = REG_LCD(0x116), ++ GLAMO_REG_LCD_GAMMA_R_ENTRY8 = REG_LCD(0x118), ++ /* RES */ ++ GLAMO_REG_LCD_GAMMA_G_ENTRY01 = REG_LCD(0x130), ++ GLAMO_REG_LCD_GAMMA_G_ENTRY23 = REG_LCD(0x132), ++ GLAMO_REG_LCD_GAMMA_G_ENTRY45 = REG_LCD(0x134), ++ GLAMO_REG_LCD_GAMMA_G_ENTRY67 = REG_LCD(0x136), ++ GLAMO_REG_LCD_GAMMA_G_ENTRY8 = REG_LCD(0x138), ++ /* RES */ ++ GLAMO_REG_LCD_GAMMA_B_ENTRY01 = REG_LCD(0x150), ++ GLAMO_REG_LCD_GAMMA_B_ENTRY23 = REG_LCD(0x152), ++ GLAMO_REG_LCD_GAMMA_B_ENTRY45 = REG_LCD(0x154), ++ GLAMO_REG_LCD_GAMMA_B_ENTRY67 = REG_LCD(0x156), ++ GLAMO_REG_LCD_GAMMA_B_ENTRY8 = REG_LCD(0x158), ++ /* RES */ ++ GLAMO_REG_LCD_SRAM_DRIVING1 = REG_LCD(0x160), ++ GLAMO_REG_LCD_SRAM_DRIVING2 = REG_LCD(0x162), ++ GLAMO_REG_LCD_SRAM_DRIVING3 = REG_LCD(0x164), ++}; ++ ++enum glamo_reg_lcd_mode1 { ++ GLAMO_LCD_MODE1_PWRSAVE = 0x0001, ++ GLAMO_LCD_MODE1_PARTIAL_PRT = 0x0002, ++ GLAMO_LCD_MODE1_HWFLIP = 0x0004, ++ GLAMO_LCD_MODE1_LCD2 = 0x0008, ++ /* RES */ ++ GLAMO_LCD_MODE1_PARTIAL_MODE = 0x0020, ++ GLAMO_LCD_MODE1_CURSOR_DSTCOLOR = 0x0040, ++ GLAMO_LCD_MODE1_PARTIAL_ENABLE = 0x0080, ++ GLAMO_LCD_MODE1_TVCLK_IN_ENABLE = 0x0100, ++ GLAMO_LCD_MODE1_HSYNC_HIGH_ACT = 0x0200, ++ GLAMO_LCD_MODE1_VSYNC_HIGH_ACT = 0x0400, ++ GLAMO_LCD_MODE1_HSYNC_FLIP = 0x0800, ++ GLAMO_LCD_MODE1_GAMMA_COR_EN = 0x1000, ++ GLAMO_LCD_MODE1_DITHER_EN = 0x2000, ++ GLAMO_LCD_MODE1_CURSOR_EN = 0x4000, ++ GLAMO_LCD_MODE1_ROTATE_EN = 0x8000, ++}; ++ ++enum glamo_reg_lcd_mode2 { ++ GLAMO_LCD_MODE2_CRC_CHECK_EN = 0x0001, ++ GLAMO_LCD_MODE2_DCMD_PER_LINE = 0x0002, ++ GLAMO_LCD_MODE2_NOUSE_BDEF = 0x0004, ++ GLAMO_LCD_MODE2_OUT_POS_MODE = 0x0008, ++ GLAMO_LCD_MODE2_FRATE_CTRL_EN = 0x0010, ++ GLAMO_LCD_MODE2_SINGLE_BUFFER = 0x0020, ++ GLAMO_LCD_MODE2_SER_LSB_TO_MSB = 0x0040, ++ /* FIXME */ ++}; ++ ++enum glamo_reg_lcd_mode3 { ++ /* LCD color source data format */ ++ GLAMO_LCD_SRC_RGB565 = 0x0000, ++ GLAMO_LCD_SRC_ARGB1555 = 0x4000, ++ GLAMO_LCD_SRC_ARGB4444 = 0x8000, ++ /* interface type */ ++ GLAMO_LCD_MODE3_LCD = 0x1000, ++ GLAMO_LCD_MODE3_RGB = 0x0800, ++ GLAMO_LCD_MODE3_CPU = 0x0000, ++ /* mode */ ++ GLAMO_LCD_MODE3_RGB332 = 0x0000, ++ GLAMO_LCD_MODE3_RGB444 = 0x0100, ++ GLAMO_LCD_MODE3_RGB565 = 0x0200, ++ GLAMO_LCD_MODE3_RGB666 = 0x0300, ++ /* depth */ ++ GLAMO_LCD_MODE3_6BITS = 0x0000, ++ GLAMO_LCD_MODE3_8BITS = 0x0010, ++ GLAMO_LCD_MODE3_9BITS = 0x0020, ++ GLAMO_LCD_MODE3_16BITS = 0x0030, ++ GLAMO_LCD_MODE3_18BITS = 0x0040, ++}; ++ ++enum glamo_lcd_rot_mode { ++ GLAMO_LCD_ROT_MODE_0 = 0x0000, ++ GLAMO_LCD_ROT_MODE_180 = 0x2000, ++ GLAMO_LCD_ROT_MODE_MIRROR = 0x4000, ++ GLAMO_LCD_ROT_MODE_FLIP = 0x6000, ++ GLAMO_LCD_ROT_MODE_90 = 0x8000, ++ GLAMO_LCD_ROT_MODE_270 = 0xa000, ++}; ++#define GLAMO_LCD_ROT_MODE_MASK 0xe000 ++ ++enum glamo_lcd_cmd_type { ++ GLAMO_LCD_CMD_TYPE_DISP = 0x0000, ++ GLAMO_LCD_CMD_TYPE_PARALLEL = 0x4000, ++ GLAMO_LCD_CMD_TYPE_SERIAL = 0x8000, ++ GLAMO_LCD_CMD_TYPE_SERIAL_DIRECT= 0xc000, ++}; ++#define GLAMO_LCD_CMD_TYPE_MASK 0xc000 ++ ++enum glamo_lcd_cmds { ++ GLAMO_LCD_CMD_DATA_DISP_FIRE = 0x00, ++ GLAMO_LCD_CMD_DATA_DISP_SYNC = 0x01, /* RGB only */ ++ /* switch to command mode, no display */ ++ GLAMO_LCD_CMD_DATA_FIRE_NO_DISP = 0x02, ++ /* display until VSYNC, switch to command */ ++ GLAMO_LCD_CMD_DATA_FIRE_VSYNC = 0x11, ++ /* display until HSYNC, switch to command */ ++ GLAMO_LCD_CMD_DATA_FIRE_HSYNC = 0x12, ++ /* display until VSYNC, 1 black frame, VSYNC, switch to command */ ++ GLAMO_LCD_CMD_DATA_FIRE_VSYNC_B = 0x13, ++ /* don't care about display and switch to command */ ++ GLAMO_LCD_CMD_DATA_FIRE_FREE = 0x14, /* RGB only */ ++ /* don't care about display, keep data display but disable data, ++ * and switch to command */ ++ GLAMO_LCD_CMD_DATA_FIRE_FREE_D = 0x15, /* RGB only */ ++}; ++ ++enum glamo_core_revisions { ++ GLAMO_CORE_REV_A0 = 0x0000, ++ GLAMO_CORE_REV_A1 = 0x0001, ++ GLAMO_CORE_REV_A2 = 0x0002, ++ GLAMO_CORE_REV_A3 = 0x0003, ++}; ++ ++#endif /* _GLAMO_REGS_H */ +diff --git a/drivers/mfd/glamo/glamo-spi-gpio.c b/drivers/mfd/glamo/glamo-spi-gpio.c +new file mode 100644 +index 0000000..73926bd +--- /dev/null ++++ b/drivers/mfd/glamo/glamo-spi-gpio.c +@@ -0,0 +1,256 @@ ++/* ++ * Copyright (C) 2007 OpenMoko, Inc. ++ * Author: Harald Welte ++ * ++ * Smedia Glamo GPIO based SPI driver ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * This driver currently only implements a minimum subset of the hardware ++ * features, esp. those features that are required to drive the jbt6k74 ++ * LCM controller asic in the TD028TTEC1 LCM. ++ * ++*/ ++ ++#define DEBUG ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++ ++#include ++ ++#include ++ ++#include "glamo-core.h" ++#include "glamo-regs.h" ++ ++struct glamo_spigpio { ++ struct spi_bitbang bitbang; ++ struct spi_master *master; ++ struct glamo_spigpio_info *info; ++ struct glamo_core *glamo; ++}; ++ ++static inline struct glamo_spigpio *to_sg(struct spi_device *spi) ++{ ++ return spi->controller_data; ++} ++ ++static inline void setsck(struct spi_device *dev, int on) ++{ ++ struct glamo_spigpio *sg = to_sg(dev); ++ glamo_gpio_setpin(sg->glamo, sg->info->pin_clk, on ? 1 : 0); ++} ++ ++static inline void setmosi(struct spi_device *dev, int on) ++{ ++ struct glamo_spigpio *sg = to_sg(dev); ++ glamo_gpio_setpin(sg->glamo, sg->info->pin_mosi, on ? 1 : 0); ++} ++ ++static inline u32 getmiso(struct spi_device *dev) ++{ ++ struct glamo_spigpio *sg = to_sg(dev); ++ if (sg->info->pin_miso) ++ return glamo_gpio_getpin(sg->glamo, sg->info->pin_miso) ? 1 : 0; ++ else ++ return 0; ++} ++ ++#define spidelay(x) ndelay(x) ++ ++#define EXPAND_BITBANG_TXRX ++#include ++ ++static u32 glamo_spigpio_txrx_mode0(struct spi_device *spi, ++ unsigned nsecs, u32 word, u8 bits) ++{ ++ return bitbang_txrx_be_cpha0(spi, nsecs, 0, word, bits); ++} ++ ++static u32 glamo_spigpio_txrx_mode1(struct spi_device *spi, ++ unsigned nsecs, u32 word, u8 bits) ++{ ++ return bitbang_txrx_be_cpha1(spi, nsecs, 0, word, bits); ++} ++ ++static u32 glamo_spigpio_txrx_mode2(struct spi_device *spi, ++ unsigned nsecs, u32 word, u8 bits) ++{ ++ return bitbang_txrx_be_cpha0(spi, nsecs, 1, word, bits); ++} ++ ++static u32 glamo_spigpio_txrx_mode3(struct spi_device *spi, ++ unsigned nsecs, u32 word, u8 bits) ++{ ++ return bitbang_txrx_be_cpha1(spi, nsecs, 1, word, bits); ++} ++ ++ ++#if 0 ++static int glamo_spigpio_setupxfer(struct spi_device *spi, ++ struct spi_transfer *t) ++{ ++ struct glamo_spi *gs = to_sg(spi); ++ unsigned int bpw; ++ ++ bpw = t ? t->bits_per_word : spi->bits_per_word; ++ ++ if (bpw != 9 && bpw != 8) { ++ dev_err(&spi->dev, "invalid bits-per-word (%d)\n", bpw); ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++#endif ++ ++static void glamo_spigpio_chipsel(struct spi_device *spi, int value) ++{ ++ struct glamo_spigpio *gs = to_sg(spi); ++#if 0 ++ dev_dbg(&spi->dev, "chipsel %d: spi=%p, gs=%p, info=%p, handle=%p\n", ++ value, spi, gs, gs->info, gs->info->glamo); ++#endif ++ glamo_gpio_setpin(gs->glamo, gs->info->pin_cs, value ? 0 : 1); ++} ++ ++ ++static int glamo_spigpio_probe(struct platform_device *pdev) ++{ ++ struct spi_master *master; ++ struct glamo_spigpio *sp; ++ int ret; ++ int i; ++ ++ master = spi_alloc_master(&pdev->dev, sizeof(struct glamo_spigpio)); ++ if (master == NULL) { ++ dev_err(&pdev->dev, "failed to allocate spi master\n"); ++ ret = -ENOMEM; ++ goto err; ++ } ++ ++ sp = spi_master_get_devdata(master); ++ platform_set_drvdata(pdev, sp); ++ sp->info = pdev->dev.platform_data; ++ if (!sp->info) { ++ dev_err(&pdev->dev, "can't operate without platform data\n"); ++ ret = -EIO; ++ goto err_no_pdev; ++ } ++ ++ master->num_chipselect = 1; ++ master->bus_num = 2; /* FIXME: use dynamic number */ ++ ++ sp->master = spi_master_get(master); ++ sp->glamo = sp->info->glamo; ++ ++ sp->bitbang.master = sp->master; ++ sp->bitbang.chipselect = glamo_spigpio_chipsel; ++ sp->bitbang.txrx_word[SPI_MODE_0] = glamo_spigpio_txrx_mode0; ++ sp->bitbang.txrx_word[SPI_MODE_1] = glamo_spigpio_txrx_mode1; ++ sp->bitbang.txrx_word[SPI_MODE_2] = glamo_spigpio_txrx_mode2; ++ sp->bitbang.txrx_word[SPI_MODE_3] = glamo_spigpio_txrx_mode3; ++ ++ /* set state of spi pins */ ++ glamo_gpio_setpin(sp->glamo, sp->info->pin_clk, 0); ++ glamo_gpio_setpin(sp->glamo, sp->info->pin_mosi, 0); ++ glamo_gpio_setpin(sp->glamo, sp->info->pin_cs, 1); ++ ++ glamo_gpio_cfgpin(sp->glamo, sp->info->pin_clk); ++ glamo_gpio_cfgpin(sp->glamo, sp->info->pin_mosi); ++ glamo_gpio_cfgpin(sp->glamo, sp->info->pin_cs); ++ if (sp->info->pin_miso) ++ glamo_gpio_cfgpin(sp->glamo, sp->info->pin_miso); ++ ++ /* bring the LCM panel out of reset if it isn't already */ ++ ++ glamo_gpio_setpin(sp->glamo, GLAMO_GPIO4, 1); ++ glamo_gpio_cfgpin(sp->glamo, GLAMO_GPIO4_OUTPUT); ++ msleep(90); ++ ++#if 0 ++ sp->dev = &pdev->dev; ++ ++ sp->bitbang.setup_transfer = glamo_spi_setupxfer; ++ sp->bitbang.txrx_bufs = glamo_spi_txrx; ++ sp->bitbang.master->setup = glamo_spi_setup; ++#endif ++ ++ ret = spi_bitbang_start(&sp->bitbang); ++ if (ret) ++ goto err_no_bitbang; ++ ++ /* register the chips to go with the board */ ++ ++ for (i = 0; i < sp->info->board_size; i++) { ++ dev_info(&pdev->dev, "registering %p: %s\n", ++ &sp->info->board_info[i], ++ sp->info->board_info[i].modalias); ++ ++ sp->info->board_info[i].controller_data = sp; ++ spi_new_device(master, sp->info->board_info + i); ++ } ++ ++ return 0; ++ ++err_no_bitbang: ++ platform_set_drvdata(pdev, NULL); ++err_no_pdev: ++ spi_master_put(sp->bitbang.master); ++err: ++ return ret; ++ ++} ++ ++static int glamo_spigpio_remove(struct platform_device *pdev) ++{ ++ struct glamo_spigpio *sp = platform_get_drvdata(pdev); ++ ++ spi_bitbang_stop(&sp->bitbang); ++ spi_master_put(sp->bitbang.master); ++ ++ return 0; ++} ++ ++#define glamo_spigpio_suspend NULL ++#define glamo_spigpio_resume NULL ++ ++static struct platform_driver glamo_spi_drv = { ++ .probe = glamo_spigpio_probe, ++ .remove = glamo_spigpio_remove, ++ .suspend = glamo_spigpio_suspend, ++ .resume = glamo_spigpio_resume, ++ .driver = { ++ .name = "glamo-spi-gpio", ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static int __init glamo_spi_init(void) ++{ ++ return platform_driver_register(&glamo_spi_drv); ++} ++ ++static void __exit glamo_spi_exit(void) ++{ ++ platform_driver_unregister(&glamo_spi_drv); ++} ++ ++module_init(glamo_spi_init); ++module_exit(glamo_spi_exit); ++ ++MODULE_DESCRIPTION("Smedia Glamo 336x/337x LCM serial command SPI Driver"); ++MODULE_AUTHOR("Harald Welte ") ++MODULE_LICENSE("GPL"); +diff --git a/include/asm-arm/arch-s3c2410/irqs.h b/include/asm-arm/arch-s3c2410/irqs.h +index 996f654..9522cd1 100644 +--- a/include/asm-arm/arch-s3c2410/irqs.h ++++ b/include/asm-arm/arch-s3c2410/irqs.h +@@ -155,9 +155,37 @@ + #define IRQ_S3C2443_AC97 S3C2410_IRQSUB(28) + + #ifdef CONFIG_CPU_S3C2443 +-#define NR_IRQS (IRQ_S3C2443_AC97+1) ++#define _NR_IRQS (IRQ_S3C2443_AC97+1) + #else +-#define NR_IRQS (IRQ_S3C2440_AC97+1) ++#define _NR_IRQS (IRQ_S3C2440_AC97+1) + #endif + ++/* ++ * The next 16 interrupts are for board specific purposes. Since ++ * the kernel can only run on one machine at a time, we can re-use ++ * these. If you need more, increase IRQ_BOARD_END, but keep it ++ * within sensible limits. ++ */ ++#define IRQ_BOARD_START _NR_IRQS ++#define IRQ_BOARD_END (_NR_IRQS + 10) ++ ++#if defined(CONFIG_MACH_NEO1973_GTA02) ++#define NR_IRQS (IRQ_BOARD_END) ++#else ++#define NR_IRQS (IRQ_BOARD_START) ++#endif ++ ++/* Neo1973 GTA02 interrupts */ ++#define NEO1973_GTA02_IRQ(x) (IRQ_BOARD_START + (x)) ++#define IRQ_GLAMO(x) NEO1973_GTA02_IRQ(x) ++#define IRQ_GLAMO_HOSTBUS IRQ_GLAMO(0) ++#define IRQ_GLAMO_JPEG IRQ_GLAMO(1) ++#define IRQ_GLAMO_MPEG IRQ_GLAMO(2) ++#define IRQ_GLAMO_MPROC1 IRQ_GLAMO(3) ++#define IRQ_GLAMO_MPROC0 IRQ_GLAMO(4) ++#define IRQ_GLAMO_CMDQUEUE IRQ_GLAMO(5) ++#define IRQ_GLAMO_2D IRQ_GLAMO(6) ++#define IRQ_GLAMO_MMC IRQ_GLAMO(7) ++#define IRQ_GLAMO_RISC IRQ_GLAMO(8) ++ + #endif /* __ASM_ARCH_IRQ_H */ +diff --git a/include/linux/glamo-gpio.h b/include/linux/glamo-gpio.h +new file mode 100644 +index 0000000..d00f7e9 +--- /dev/null ++++ b/include/linux/glamo-gpio.h +@@ -0,0 +1,99 @@ ++#ifndef __GLAMO_GPIO_H ++#define __GLAMO_GPIO_H ++ ++struct glamo_core; ++ ++#define GLAMO_GPIO_BANKA 0x0000 ++#define GLAMO_GPIO_BANKB 0x1000 ++#define GLAMO_GPIO_BANKC 0x2000 ++#define GLAMO_GPIO_BANKD 0x3000 ++ ++#define GLAMO_GPIONO(bank, pin) ((bank & 0xf000) | ((pin & 0xf) << 8)) ++ ++#define GLAMO_GPIO_F_IN 0x0010 ++#define GLAMO_GPIO_F_OUT 0x0020 ++#define GLAMO_GPIO_F_FUNC 0x0030 ++ ++#define GLAMO_GPIO0 GLAMO_GPIONO(GLAMO_GPIO_BANKA, 0) ++#define GLAMO_GPIO0_INPUT (GLAMO_GPIO0 | GLAMO_GPIO_F_IN) ++#define GLAMO_GPIO0_OUTPUT (GLAMO_GPIO0 | GLAMO_GPIO_F_OUT) ++#define GLAMO_GPIO0_HA20 (GLAMO_GPIO0 | GLAMO_GPIO_F_FUNC) ++ ++#define GLAMO_GPIO1 GLAMO_GPIONO(GLAMO_GPIO_BANKA, 1) ++#define GLAMO_GPIO1_INPUT (GLAMO_GPIO1 | GLAMO_GPIO_F_IN) ++#define GLAMO_GPIO1_OUTPUT (GLAMO_GPIO1 | GLAMO_GPIO_F_OUT) ++#define GLAMO_GPIO1_HA21 (GLAMO_GPIO1 | GLAMO_GPIO_F_FUNC) ++ ++#define GLAMO_GPIO2 GLAMO_GPIONO(GLAMO_GPIO_BANKA, 2) ++#define GLAMO_GPIO2_INPUT (GLAMO_GPIO2 | GLAMO_GPIO_F_IN) ++#define GLAMO_GPIO2_OUTPUT (GLAMO_GPIO2 | GLAMO_GPIO_F_OUT) ++#define GLAMO_GPIO2_HA22 (GLAMO_GPIO2 | GLAMO_GPIO_F_FUNC) ++ ++#define GLAMO_GPIO3 GLAMO_GPIONO(GLAMO_GPIO_BANKA, 3) ++#define GLAMO_GPIO3_INPUT (GLAMO_GPIO3 | GLAMO_GPIO_F_IN) ++#define GLAMO_GPIO3_OUTPUT (GLAMO_GPIO3 | GLAMO_GPIO_F_OUT) ++#define GLAMO_GPIO3_HA23 (GLAMO_GPIO3 | GLAMO_GPIO_F_FUNC) ++ ++#define GLAMO_GPIO4 GLAMO_GPIONO(GLAMO_GPIO_BANKB, 0) ++#define GLAMO_GPIO4_INPUT (GLAMO_GPIO4 | GLAMO_GPIO_F_IN) ++#define GLAMO_GPIO4_OUTPUT (GLAMO_GPIO4 | GLAMO_GPIO_F_OUT) ++#define GLAMO_GPIO4_nLCS0 (GLAMO_GPIO4 | GLAMO_GPIO_F_FUNC) ++ ++#define GLAMO_GPIO5 GLAMO_GPIONO(GLAMO_GPIO_BANKB, 1) ++#define GLAMO_GPIO5_INPUT (GLAMO_GPIO5 | GLAMO_GPIO_F_IN) ++#define GLAMO_GPIO5_OUTPUT (GLAMO_GPIO5 | GLAMO_GPIO_F_OUT) ++#define GLAMO_GPIO5_nLCS1 (GLAMO_GPIO5 | GLAMO_GPIO_F_FUNC) ++ ++#define GLAMO_GPIO6 GLAMO_GPIONO(GLAMO_GPIO_BANKB, 2) ++#define GLAMO_GPIO6_INPUT (GLAMO_GPIO6 | GLAMO_GPIO_F_IN) ++#define GLAMO_GPIO6_OUTPUT (GLAMO_GPIO6 | GLAMO_GPIO_F_OUT) ++#define GLAMO_GPIO6_LDCLK (GLAMO_GPIO6 | GLAMO_GPIO_F_FUNC) ++ ++#define GLAMO_GPIO7 GLAMO_GPIONO(GLAMO_GPIO_BANKB, 3) ++#define GLAMO_GPIO7_INPUT (GLAMO_GPIO7 | GLAMO_GPIO_F_IN) ++#define GLAMO_GPIO7_OUTPUT (GLAMO_GPIO7 | GLAMO_GPIO_F_OUT) ++#define GLAMO_GPIO7_nLDE (GLAMO_GPIO7 | GLAMO_GPIO_F_FUNC) ++ ++#define GLAMO_GPIO8 GLAMO_GPIONO(GLAMO_GPIO_BANKC, 0) ++#define GLAMO_GPIO8_INPUT (GLAMO_GPIO8 | GLAMO_GPIO_F_IN) ++#define GLAMO_GPIO8_OUTPUT (GLAMO_GPIO8 | GLAMO_GPIO_F_OUT) ++#define GLAMO_GPIO8_LD16 (GLAMO_GPIO8 | GLAMO_GPIO_F_FUNC) ++ ++#define GLAMO_GPIO9 GLAMO_GPIONO(GLAMO_GPIO_BANKC, 1) ++#define GLAMO_GPIO9_INPUT (GLAMO_GPIO9 | GLAMO_GPIO_F_IN) ++#define GLAMO_GPIO9_OUTPUT (GLAMO_GPIO9 | GLAMO_GPIO_F_OUT) ++#define GLAMO_GPIO9_LD17 (GLAMO_GPIO9 | GLAMO_GPIO_F_FUNC) ++ ++#define GLAMO_GPIO10 GLAMO_GPIONO(GLAMO_GPIO_BANKC, 2) ++#define GLAMO_GPIO10_INPUT (GLAMO_GPIO10 | GLAMO_GPIO_F_IN) ++#define GLAMO_GPIO10_OUTPUT (GLAMO_GPIO10 | GLAMO_GPIO_F_OUT) ++#define GLAMO_GPIO10_LSCK (GLAMO_GPIO10 | GLAMO_GPIO_F_FUNC) ++ ++#define GLAMO_GPIO11 GLAMO_GPIONO(GLAMO_GPIO_BANKC, 3) ++#define GLAMO_GPIO11_INPUT (GLAMO_GPIO11 | GLAMO_GPIO_F_IN) ++#define GLAMO_GPIO11_OUTPUT (GLAMO_GPIO11 | GLAMO_GPIO_F_OUT) ++#define GLAMO_GPIO11_LSDA (GLAMO_GPIO11 | GLAMO_GPIO_F_FUNC) ++ ++#define GLAMO_GPIO12 GLAMO_GPIONO(GLAMO_GPIO_BANKD, 0) ++#define GLAMO_GPIO12_INPUT (GLAMO_GPIO12 | GLAMO_GPIO_F_IN) ++#define GLAMO_GPIO12_OUTPUT (GLAMO_GPIO12 | GLAMO_GPIO_F_OUT) ++#define GLAMO_GPIO12_LSA0 (GLAMO_GPIO12 | GLAMO_GPIO_F_FUNC) ++ ++ ++#define REG_OF_GPIO(gpio) (((gpio & 0xf000) >> 12)*2 \ ++ + GLAMO_REG_GPIO_GEN1) ++#define NUM_OF_GPIO(gpio) ((gpio & 0x0f00) >> 8) ++#define GPIO_OUT_BIT(gpio) (1 << (NUM_OF_GPIO(gpio) + 0)) ++#define OUTPUT_BIT(gpio) (1 << (NUM_OF_GPIO(gpio) + 4)) ++#define INPUT_BIT(gpio) (1 << (NUM_OF_GPIO(gpio) + 8)) ++#define FUNC_BIT(gpio) (1 << (NUM_OF_GPIO(gpio) + 12)) ++ ++void glamo_gpio_setpin(struct glamo_core *glamo, unsigned int pin, ++ unsigned int value); ++ ++int glamo_gpio_getpin(struct glamo_core *glamo, unsigned int pin); ++ ++void glamo_gpio_cfgpin(struct glamo_core *glamo, unsigned int pinfunc); ++ ++ ++#endif /* _GLAMO_GPIO */ +diff --git a/include/linux/glamofb.h b/include/linux/glamofb.h +new file mode 100644 +index 0000000..24742a2 +--- /dev/null ++++ b/include/linux/glamofb.h +@@ -0,0 +1,39 @@ ++#ifndef _LINUX_GLAMOFB_H ++#define _LINUX_GLAMOFB_H ++ ++#include ++ ++struct glamofb_val { ++ unsigned int defval; ++ unsigned int min; ++ unsigned int max; ++}; ++ ++struct glamo_core; ++ ++struct glamofb_platform_data { ++ int width, height; ++ int pixclock; ++ int left_margin, right_margin; ++ int upper_margin, lower_margin; ++ int hsync_len, vsync_len; ++ int fb_mem_size; ++ ++ struct glamofb_val xres; ++ struct glamofb_val yres; ++ struct glamofb_val bpp; ++ ++ struct glamo_spi_info *spi_info; ++ struct glamo_spigpio_info *spigpio_info; ++ struct glamo_core *glamo; ++ ++ /* glamo mmc platform specific info */ ++ void (*glamo_set_mci_power)(unsigned char power_mode, ++ unsigned short vdd); ++ int (*glamo_irq_is_wired)(void); ++}; ++ ++void glamofb_cmd_mode(struct glamofb_handle *gfb, int on); ++int glamofb_cmd_write(struct glamofb_handle *gfb, u_int16_t val); ++ ++#endif +diff --git a/include/linux/spi/glamo.h b/include/linux/spi/glamo.h +new file mode 100644 +index 0000000..86419ea +--- /dev/null ++++ b/include/linux/spi/glamo.h +@@ -0,0 +1,28 @@ ++#ifndef __GLAMO_SPI_H ++#define __GLAMO_SPI_H ++ ++#include ++ ++struct spi_board_info; ++struct glamofb_handle; ++struct glamo_core; ++ ++struct glamo_spi_info { ++ unsigned long board_size; ++ struct spi_board_info *board_info; ++ struct glamofb_handle *glamofb_handle; ++}; ++ ++struct glamo_spigpio_info { ++ unsigned int pin_clk; ++ unsigned int pin_mosi; ++ unsigned int pin_miso; ++ unsigned int pin_cs; ++ ++ unsigned int board_size; ++ struct spi_board_info *board_info; ++ struct glamo_core *glamo; ++}; ++ ++ ++#endif +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1034-glamo-mmc.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1034-glamo-mmc.patch.patch new file mode 100644 index 0000000000..7acc6b2488 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1034-glamo-mmc.patch.patch @@ -0,0 +1,1188 @@ +From e37b54bbb7d7df4dc2fff9846daabbb6c552d47d Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:35:05 +0100 +Subject: [PATCH] glamo-mmc.patch + +--- + drivers/mfd/glamo/Kconfig | 9 + + drivers/mfd/glamo/Makefile | 1 + + drivers/mfd/glamo/glamo-core.c | 17 +- + drivers/mfd/glamo/glamo-mci.c | 837 ++++++++++++++++++++++++++++++++++++++++ + drivers/mfd/glamo/glamo-mci.h | 76 ++++ + drivers/mfd/glamo/glamo-regs.h | 169 ++++++++- + 6 files changed, 1099 insertions(+), 10 deletions(-) + create mode 100644 drivers/mfd/glamo/glamo-mci.c + create mode 100644 drivers/mfd/glamo/glamo-mci.h + +diff --git a/drivers/mfd/glamo/Kconfig b/drivers/mfd/glamo/Kconfig +index b99f2b2..ec2ae3d 100644 +--- a/drivers/mfd/glamo/Kconfig ++++ b/drivers/mfd/glamo/Kconfig +@@ -33,3 +33,12 @@ config MFD_GLAMO_SPI_FB + control channel. This SPI interface is frequently used to + interconnect the LCM control interface. + ++config MFD_GLAMO_MCI ++ tristate "Glamo S3C SD/MMC Card Interface support" ++ depends on MFD_GLAMO && MMC ++ help ++ This selects a driver for the MCI interface found in ++ the S-Media GLAMO chip, as used in OpenMoko ++ neo1973 GTA-02. ++ ++ If unsure, say N. +\ No newline at end of file +diff --git a/drivers/mfd/glamo/Makefile b/drivers/mfd/glamo/Makefile +index fb53982..dc64d50 100644 +--- a/drivers/mfd/glamo/Makefile ++++ b/drivers/mfd/glamo/Makefile +@@ -8,4 +8,5 @@ obj-$(CONFIG_MFD_GLAMO_SPI_GPIO) += glamo-spi-gpio.o + + obj-$(CONFIG_MFD_GLAMO_FB) += glamo-fb.o + obj-$(CONFIG_MFD_GLAMO_SPI_FB) += glamo-lcm-spi.o ++obj-$(CONFIG_MFD_GLAMO_MCI) += glamo-mci.o + +diff --git a/drivers/mfd/glamo/glamo-core.c b/drivers/mfd/glamo/glamo-core.c +index acf545f..8497de2 100644 +--- a/drivers/mfd/glamo/glamo-core.c ++++ b/drivers/mfd/glamo/glamo-core.c +@@ -440,7 +440,22 @@ int glamo_engine_disable(struct glamo_core *glamo, enum glamo_engine engine) + { + spin_lock(&glamo->lock); + switch (engine) { +- /* FIXME: Implementation */ ++ case GLAMO_ENGINE_MMC: ++ __reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_MMC, 0, ++ GLAMO_CLOCK_MMC_EN_M9CLK | ++ GLAMO_CLOCK_MMC_EN_TCLK | ++ GLAMO_CLOCK_MMC_DG_M9CLK | ++ GLAMO_CLOCK_MMC_DG_TCLK); ++ __reg_set_bit_mask(glamo, GLAMO_REG_HOSTBUS(2), 0, ++ GLAMO_HOSTBUS2_MMIO_EN_MMC); ++ /* disable the TCLK divider clk input */ ++ __reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_GEN5_1, 0, ++ GLAMO_CLOCK_GEN51_EN_DIV_TCLK); ++ /* good idea to hold the thing in reset when we power it off? */ ++/* writew(readw(glamo->base + GLAMO_REG_CLOCK_MMC) | ++ GLAMO_CLOCK_MMC_RESET, glamo->base + GLAMO_REG_CLOCK_MMC); ++*/ ++ break; + default: + break; + } +diff --git a/drivers/mfd/glamo/glamo-mci.c b/drivers/mfd/glamo/glamo-mci.c +new file mode 100644 +index 0000000..f559e5e +--- /dev/null ++++ b/drivers/mfd/glamo/glamo-mci.c +@@ -0,0 +1,837 @@ ++/* ++ * linux/drivers/mmc/host/glamo-mmc.c - Glamo MMC driver ++ * ++ * Copyright (C) 2007 OpenMoko, Inc, Andy Green ++ * Based on S3C MMC driver that was: ++ * Copyright (C) 2004-2006 maintech GmbH, Thomas Kleffel ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++ ++#include "glamo-mci.h" ++#include "glamo-core.h" ++#include "glamo-regs.h" ++ ++/* from glamo-core.c */ ++extern struct glamo_mci_pdata glamo_mci_def_pdata; ++ ++ ++#define DRIVER_NAME "glamo-mci" ++#define RESSIZE(ressource) (((ressource)->end - (ressource)->start) + 1) ++ ++static void glamo_mci_send_request(struct mmc_host *mmc); ++ ++unsigned char CRC7(u8 * pu8, int cnt) ++{ ++ u8 crc = 0; ++ ++ while (cnt--) { ++ int n; ++ u8 d = *pu8++; ++ for (n = 0; n < 8; n++) { ++ crc <<= 1; ++ if ((d & 0x80) ^ (crc & 0x80)) ++ crc ^= 0x09; ++ d <<= 1; ++ } ++ } ++ return (crc << 1) | 1; ++} ++ ++/* these _dly versions account for the dead time rules for reg access */ ++static u16 readw_dly(u16 __iomem * pu16) ++{ ++ glamo_reg_access_delay(); ++ return readw(pu16); ++} ++ ++static void writew_dly(u16 val, u16 __iomem * pu16) ++{ ++ glamo_reg_access_delay(); ++ writew(val, pu16); ++} ++ ++static int get_data_buffer(struct glamo_mci_host *host, ++ volatile u32 *words, volatile u16 **pointer) ++{ ++ struct scatterlist *sg; ++ ++ *words = 0; ++ *pointer = NULL; ++ ++ if (host->pio_active == XFER_NONE) ++ return -EINVAL; ++ ++ if ((!host->mrq) || (!host->mrq->data)) ++ return -EINVAL; ++ ++ if (host->pio_sgptr >= host->mrq->data->sg_len) { ++ dev_dbg(&host->pdev->dev, "no more buffers (%i/%i)\n", ++ host->pio_sgptr, host->mrq->data->sg_len); ++ return -EBUSY; ++ } ++ sg = &host->mrq->data->sg[host->pio_sgptr]; ++ ++ *words = sg->length >> 1; /* we are working with a 16-bit data bus */ ++ *pointer = page_address(sg_page(sg)) + sg->offset; ++ ++ BUG_ON(((long)(*pointer)) & 1); ++ ++ host->pio_sgptr++; ++ ++ /* dev_info(&host->pdev->dev, "new buffer (%i/%i)\n", ++ host->pio_sgptr, host->mrq->data->sg_len); */ ++ return 0; ++} ++ ++static void do_pio_read(struct glamo_mci_host *host) ++{ ++ int res; ++ u16 __iomem *from_ptr = host->base_data + (RESSIZE(host->mem_data) / ++ sizeof(u16) / 2); ++#ifdef DEBUG ++ u16 * block; ++#endif ++ ++ while (1) { ++ res = get_data_buffer(host, &host->pio_words, &host->pio_ptr); ++ if (res) { ++ host->pio_active = XFER_NONE; ++ host->complete_what = COMPLETION_FINALIZE; ++ ++ dev_dbg(&host->pdev->dev, "pio_read(): " ++ "complete (no more data).\n"); ++ return; ++ } ++ ++ dev_dbg(&host->pdev->dev, "pio_read(): host->pio_words: %d\n", ++ host->pio_words); ++ ++ host->pio_count += host->pio_words << 1; ++ ++#ifdef DEBUG ++ block = (u16 *)host->pio_ptr; ++ res = host->pio_words << 1; ++#endif ++ while (host->pio_words--) ++ *host->pio_ptr++ = *from_ptr++; ++#ifdef DEBUG ++ print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, 16, 1, ++ (void *)block, res, 1); ++#endif ++ } ++} ++ ++static int do_pio_write(struct glamo_mci_host *host) ++{ ++ int res = 0; ++ volatile u16 __iomem *to_ptr = host->base_data; ++ int err = 0; ++ ++ dev_dbg(&host->pdev->dev, "pio_write():\n"); ++ while (!res) { ++ res = get_data_buffer(host, &host->pio_words, &host->pio_ptr); ++ if (res) ++ continue; ++ ++ dev_dbg(&host->pdev->dev, "pio_write():new source: [%i]@[%p]\n", ++ host->pio_words, host->pio_ptr); ++ ++ host->pio_count += host->pio_words << 1; ++ while (host->pio_words--) ++ writew(*host->pio_ptr++, to_ptr++); ++ } ++ ++ dev_dbg(&host->pdev->dev, "pio_write(): complete\n"); ++ host->pio_active = XFER_NONE; ++ return err; ++} ++ ++static void glamo_mci_irq(unsigned int irq, struct irq_desc *desc) ++{ ++ struct glamo_mci_host *host = (struct glamo_mci_host *) ++ desc->handler_data; ++ u16 status; ++ struct mmc_command *cmd; ++ unsigned long iflags; ++ ++ if (!host) ++ return; ++ if (!host->mrq) ++ return; ++ cmd = host->mrq->cmd; ++ if (!cmd) ++ return; ++ ++ spin_lock_irqsave(&host->complete_lock, iflags); ++ ++ status = readw_dly(host->base + GLAMO_REG_MMC_RB_STAT1); ++ ++ /* ack this interrupt source */ ++ writew(GLAMO_IRQ_MMC, ++ glamo_mci_def_pdata.pglamo->base + GLAMO_REG_IRQ_CLEAR); ++ ++ if (status & (GLAMO_STAT1_MMC_RTOUT | ++ GLAMO_STAT1_MMC_DTOUT)) ++ cmd->error = -ETIMEDOUT; ++ if (status & (GLAMO_STAT1_MMC_BWERR | ++ GLAMO_STAT1_MMC_BRERR)) ++ cmd->error = -EILSEQ; ++ if (cmd->error) { ++ dev_err(&host->pdev->dev, "Error after cmd: 0x%x\n", status); ++ goto done; ++ } ++ ++ if (host->pio_active == XFER_READ) ++ do_pio_read(host); ++ ++ host->mrq->data->bytes_xfered = host->pio_count; ++ dev_dbg(&host->pdev->dev, "status = 0x%04x count=%d\n", ++ status, host->pio_count); ++ ++ /* issue STOP if we have been given one to use */ ++ if (host->mrq->stop) { ++ host->cmd_is_stop = 1; ++ glamo_mci_send_request(host->mmc); ++ host->cmd_is_stop = 0; ++ } ++done: ++ host->complete_what = COMPLETION_NONE; ++ host->mrq = NULL; ++ mmc_request_done(host->mmc, cmd->mrq); ++ spin_unlock_irqrestore(&host->complete_lock, iflags); ++} ++ ++static int glamo_mci_send_command(struct glamo_mci_host *host, ++ struct mmc_command *cmd) ++{ ++ u8 u8a[6]; ++ u16 fire = 0; ++ ++ /* if we can't do it, reject as busy */ ++ if (!readw_dly(host->base + GLAMO_REG_MMC_RB_STAT1) & ++ GLAMO_STAT1_MMC_IDLE) { ++ host->mrq = NULL; ++ cmd->error = -EBUSY; ++ mmc_request_done(host->mmc, host->mrq); ++ return -EBUSY; ++ } ++ ++ /* create an array in wire order for CRC computation */ ++ u8a[0] = 0x40 | (cmd->opcode & 0x3f); ++ u8a[1] = (u8)(cmd->arg >> 24); ++ u8a[2] = (u8)(cmd->arg >> 16); ++ u8a[3] = (u8)(cmd->arg >> 8); ++ u8a[4] = (u8)cmd->arg; ++ u8a[5] = CRC7(&u8a[0], 5); /* CRC7 on first 5 bytes of packet */ ++ ++ /* issue the wire-order array including CRC in register order */ ++ writew_dly((u8a[4] << 8) | u8a[5], host->base + GLAMO_REG_MMC_CMD_REG1); ++ writew_dly((u8a[2] << 8) | u8a[3], host->base + GLAMO_REG_MMC_CMD_REG2); ++ writew_dly((u8a[0] << 8) | u8a[1], host->base + GLAMO_REG_MMC_CMD_REG3); ++ ++ /* command index toggle */ ++ fire |= (host->ccnt & 1) << 12; ++ ++ /* set type of command */ ++ switch (mmc_cmd_type(cmd)) { ++ case MMC_CMD_BC: ++ fire |= GLAMO_FIRE_MMC_CMDT_BNR; ++ break; ++ case MMC_CMD_BCR: ++ fire |= GLAMO_FIRE_MMC_CMDT_BR; ++ break; ++ case MMC_CMD_AC: ++ fire |= GLAMO_FIRE_MMC_CMDT_AND; ++ break; ++ case MMC_CMD_ADTC: ++ fire |= GLAMO_FIRE_MMC_CMDT_AD; ++ break; ++ } ++ /* ++ * if it expects a response, set the type expected ++ * ++ * R1, Length : 48bit, Normal response ++ * R1b, Length : 48bit, same R1, but added card busy status ++ * R2, Length : 136bit (really 128 bits with CRC snipped) ++ * R3, Length : 48bit (OCR register value) ++ * R4, Length : 48bit, SDIO_OP_CONDITION, Reverse SDIO Card ++ * R5, Length : 48bit, IO_RW_DIRECTION, Reverse SDIO Card ++ * R6, Length : 48bit (RCA register) ++ * R7, Length : 48bit (interface condition, VHS(voltage supplied), ++ * check pattern, CRC7) ++ */ ++ switch (mmc_resp_type(cmd)) { ++ case MMC_RSP_R6: /* same index as R7 and R1 */ ++ fire |= GLAMO_FIRE_MMC_RSPT_R1; ++ break; ++ case MMC_RSP_R1B: ++ fire |= GLAMO_FIRE_MMC_RSPT_R1b; ++ break; ++ case MMC_RSP_R2: ++ fire |= GLAMO_FIRE_MMC_RSPT_R2; ++ break; ++ case MMC_RSP_R3: ++ fire |= GLAMO_FIRE_MMC_RSPT_R3; ++ break; ++ /* R4 and R5 supported by chip not defined in linux/mmc/core.h (sdio) */ ++ } ++ /* ++ * From the command index, set up the command class in the host ctrllr ++ * ++ * missing guys present on chip but couldn't figure out how to use yet: ++ * 0x0 "stream read" ++ * 0x9 "cancel running command" ++ */ ++ switch (cmd->opcode) { ++ case MMC_READ_SINGLE_BLOCK: ++ fire |= GLAMO_FIRE_MMC_CC_SBR; /* single block read */ ++ break; ++ case MMC_SWITCH: /* 64 byte payload */ ++ case 0x33: /* observed issued by MCI */ ++ case MMC_READ_MULTIPLE_BLOCK: ++ /* we will get an interrupt off this */ ++ if (!cmd->mrq->stop) ++ /* multiblock no stop */ ++ fire |= GLAMO_FIRE_MMC_CC_MBRNS; ++ else ++ /* multiblock with stop */ ++ fire |= GLAMO_FIRE_MMC_CC_MBRS; ++ break; ++ case MMC_WRITE_BLOCK: ++ fire |= GLAMO_FIRE_MMC_CC_SBW; /* single block write */ ++ break; ++ case MMC_WRITE_MULTIPLE_BLOCK: ++ if (cmd->mrq->stop) ++ /* multiblock with stop */ ++ fire |= GLAMO_FIRE_MMC_CC_MBWS; ++ else ++ /* multiblock NO stop-- 'RESERVED'? */ ++ fire |= GLAMO_FIRE_MMC_CC_MBWNS; ++ break; ++ case MMC_STOP_TRANSMISSION: ++ fire |= GLAMO_FIRE_MMC_CC_STOP; /* STOP */ ++ break; ++ default: ++ fire |= GLAMO_FIRE_MMC_CC_BASIC; /* "basic command" */ ++ break; ++ } ++ /* enforce timeout */ ++ if (cmd->data) { ++ if (cmd->data->timeout_clks) ++ writew_dly(cmd->data->timeout_clks >> 4, /* / 16 clks */ ++ host->base + GLAMO_REG_MMC_TIMEOUT); ++ else ++ writew_dly(0xfff, host->base + GLAMO_REG_MMC_TIMEOUT); ++ } else ++ writew(0xfff, host->base + GLAMO_REG_MMC_TIMEOUT); ++ ++ /* Generate interrupt on txfer; drive strength max */ ++ writew_dly((readw_dly(host->base + GLAMO_REG_MMC_BASIC) & 0xfe) | ++ 0x0800 | GLAMO_BASIC_MMC_NO_CLK_RD_WAIT | ++ GLAMO_BASIC_MMC_EN_COMPL_INT | ++ GLAMO_BASIC_MMC_EN_DR_STR0 | ++ GLAMO_BASIC_MMC_EN_DR_STR1, ++ host->base + GLAMO_REG_MMC_BASIC); ++ ++ /* send the command out on the wire */ ++ /* dev_info(&host->pdev->dev, "Using FIRE %04X\n", fire); */ ++ writew_dly(fire, host->base + GLAMO_REG_MMC_CMD_FIRE); ++ cmd->error = 0; ++ return 0; ++} ++ ++static int glamo_mci_prepare_pio(struct glamo_mci_host *host, ++ struct mmc_data *data) ++{ ++ /* ++ * the S-Media-internal RAM offset for our MMC buffer ++ * Read is halfway up the buffer and write is at the start ++ */ ++ if (data->flags & MMC_DATA_READ) { ++ writew_dly((u16)(GLAMO_FB_SIZE + (RESSIZE(host->mem_data) / 2)), ++ host->base + GLAMO_REG_MMC_WDATADS1); ++ writew_dly((u16)((GLAMO_FB_SIZE + ++ (RESSIZE(host->mem_data) / 2)) >> 16), ++ host->base + GLAMO_REG_MMC_WDATADS2); ++ } else { ++ writew_dly((u16)GLAMO_FB_SIZE, host->base + ++ GLAMO_REG_MMC_RDATADS1); ++ writew_dly((u16)(GLAMO_FB_SIZE >> 16), host->base + ++ GLAMO_REG_MMC_RDATADS2); ++ } ++ ++ /* set up the block info */ ++ writew_dly(data->blksz, host->base + GLAMO_REG_MMC_DATBLKLEN); ++ writew_dly(data->blocks, host->base + GLAMO_REG_MMC_DATBLKCNT); ++ dev_dbg(&host->pdev->dev, "(blksz=%d, count=%d)\n", ++ data->blksz, data->blocks); ++ host->pio_sgptr = 0; ++ host->pio_words = 0; ++ host->pio_count = 0; ++ host->pio_active = 0; ++ /* if write, prep the write into the shared RAM before the command */ ++ if (data->flags & MMC_DATA_WRITE) { ++ host->pio_active = XFER_WRITE; ++ return do_pio_write(host); ++ } ++ host->pio_active = XFER_READ; ++ return 0; ++} ++ ++static void glamo_mci_send_request(struct mmc_host *mmc) ++{ ++ struct glamo_mci_host *host = mmc_priv(mmc); ++ struct mmc_request *mrq = host->mrq; ++ struct mmc_command *cmd = host->cmd_is_stop ? mrq->stop : mrq->cmd; ++ u16 * pu16 = (u16 *)&cmd->resp[0]; ++ u16 * reg_resp = (u16 *)(host->base + GLAMO_REG_MMC_CMD_RSP1); ++ u16 status; ++ int n; ++ ++ host->ccnt++; ++ /* ++ * somehow 2.6.24 MCI manages to issue MMC_WRITE_BLOCK *without* the ++ * MMC_DATA_WRITE flag, WTF? Work around the madness. ++ */ ++ if (cmd->opcode == MMC_WRITE_BLOCK) ++ if (mrq->data) ++ mrq->data->flags |= MMC_DATA_WRITE; ++ ++ /* this guy has data to read/write? */ ++ if ((!host->cmd_is_stop) && cmd->data) { ++ int res; ++ host->dcnt++; ++ res = glamo_mci_prepare_pio(host, cmd->data); ++ if (res) { ++ cmd->error = -EIO; ++ cmd->data->error = -EIO; ++ mmc_request_done(mmc, mrq); ++ return; ++ } ++ } ++ ++ dev_dbg(&host->pdev->dev,"cmd 0x%x, " ++ "arg 0x%x data=%p mrq->stop=%p flags 0x%x\n", ++ cmd->opcode, cmd->arg, cmd->data, cmd->mrq->stop, ++ cmd->flags); ++ ++ if (glamo_mci_send_command(host, cmd)) ++ return; ++ /* ++ * we must spin until response is ready or timed out ++ * -- we don't get interrupts unless there is a bulk rx ++ */ ++ do ++ status = readw_dly(host->base + GLAMO_REG_MMC_RB_STAT1); ++ while ((((status >> 15) & 1) != (host->ccnt & 1)) || ++ (!(status & (GLAMO_STAT1_MMC_RB_RRDY | ++ GLAMO_STAT1_MMC_RTOUT | ++ GLAMO_STAT1_MMC_DTOUT | ++ GLAMO_STAT1_MMC_BWERR | ++ GLAMO_STAT1_MMC_BRERR)))); ++ ++ if (status & (GLAMO_STAT1_MMC_RTOUT | ++ GLAMO_STAT1_MMC_DTOUT)) ++ cmd->error = -ETIMEDOUT; ++ if (status & (GLAMO_STAT1_MMC_BWERR | ++ GLAMO_STAT1_MMC_BRERR)) ++ cmd->error = -EILSEQ; ++ ++ if (host->cmd_is_stop) ++ return; ++ ++ if (cmd->error) { ++ dev_err(&host->pdev->dev, "Error after cmd: 0x%x\n", status); ++ goto done; ++ } ++ /* ++ * mangle the response registers in two different exciting ++ * undocumented ways discovered by trial and error ++ */ ++ if (mmc_resp_type(cmd) == MMC_RSP_R2) ++ /* grab the response */ ++ for (n = 0; n < 8; n++) /* super mangle power 1 */ ++ pu16[n ^ 6] = readw_dly(®_resp[n]); ++ else ++ for (n = 0; n < 3; n++) /* super mangle power 2 */ ++ pu16[n] = (readw_dly(®_resp[n]) >> 8) | ++ (readw_dly(®_resp[n + 1]) << 8); ++ /* ++ * if we don't have bulk data to take care of, we're done ++ */ ++ if (!cmd->data) ++ goto done; ++ if (!(cmd->data->flags & (MMC_DATA_READ | MMC_DATA_WRITE))) ++ goto done; ++ /* ++ * Otherwise can can use the interrupt as async completion -- ++ * if there is read data coming, or we wait for write data to complete, ++ * exit without mmc_request_done() as the payload interrupt ++ * will service it ++ */ ++ dev_dbg(&host->pdev->dev, "Waiting for payload data\n"); ++ /* ++ * if the glamo INT# line isn't wired (*cough* it can happen) ++ * I'm afraid we have to spin on the IRQ status bit and "be ++ * our own INT# line" ++ */ ++ if (!glamo_mci_def_pdata.pglamo->irq_works) { ++ /* we have faith we will get an "interrupt"... */ ++ while (!(readw_dly(glamo_mci_def_pdata.pglamo->base + ++ GLAMO_REG_IRQ_STATUS) & GLAMO_IRQ_MMC)) ++ ; ++ /* yay we are an interrupt controller! -- call the ISR */ ++ glamo_mci_irq(IRQ_GLAMO(GLAMO_IRQIDX_MMC), ++ irq_desc + IRQ_GLAMO(GLAMO_IRQIDX_MMC)); ++ } ++ return; ++ ++done: ++ host->complete_what = COMPLETION_NONE; ++ host->mrq = NULL; ++ mmc_request_done(host->mmc, cmd->mrq); ++} ++ ++static void glamo_mci_request(struct mmc_host *mmc, struct mmc_request *mrq) ++{ ++ struct glamo_mci_host *host = mmc_priv(mmc); ++ ++ host->cmd_is_stop = 0; ++ host->mrq = mrq; ++ glamo_mci_send_request(mmc); ++} ++ ++static void glamo_mci_reset(struct glamo_mci_host *host) ++{ ++ /* reset MMC controller */ ++ writew_dly(GLAMO_CLOCK_MMC_RESET | GLAMO_CLOCK_MMC_DG_TCLK | ++ GLAMO_CLOCK_MMC_EN_TCLK | GLAMO_CLOCK_MMC_DG_M9CLK | ++ GLAMO_CLOCK_MMC_EN_M9CLK, ++ glamo_mci_def_pdata.pglamo->base + GLAMO_REG_CLOCK_MMC); ++ msleep(1); ++ /* and disable reset */ ++ writew_dly(GLAMO_CLOCK_MMC_DG_TCLK | ++ GLAMO_CLOCK_MMC_EN_TCLK | GLAMO_CLOCK_MMC_DG_M9CLK | ++ GLAMO_CLOCK_MMC_EN_M9CLK, ++ glamo_mci_def_pdata.pglamo->base + GLAMO_REG_CLOCK_MMC); ++} ++ ++static void glamo_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) ++{ ++ struct glamo_mci_host *host = mmc_priv(mmc); ++ int mci_psc = 0; ++ int n = 0; ++ ++ /* Set power */ ++ switch(ios->power_mode) { ++ case MMC_POWER_ON: ++ case MMC_POWER_UP: ++ if (host->power_mode_current != MMC_POWER_OFF) ++ break; ++ if (host->vdd_current != ios->vdd) { ++ host->pdata->glamo_set_mci_power(ios->power_mode, ++ ios->vdd); ++ host->vdd_current = ios->vdd; ++ } ++ glamo_engine_enable(glamo_mci_def_pdata.pglamo, ++ GLAMO_ENGINE_MMC); ++ glamo_mci_reset(host); ++ break; ++ ++ case MMC_POWER_OFF: ++ default: ++ if (host->power_mode_current == MMC_POWER_OFF) ++ break; ++ glamo_engine_disable(glamo_mci_def_pdata.pglamo, ++ GLAMO_ENGINE_MMC); ++ host->pdata->glamo_set_mci_power(MMC_POWER_OFF, 0); ++ host->vdd_current = -1; ++ break; ++ } ++ host->power_mode_current = ios->power_mode; ++ ++ /* Set clock */ ++/* if (ios->clock) { */ ++ for (mci_psc = 0; mci_psc < 256; mci_psc++) { ++ host->real_rate = host->clk_rate / (mci_psc + 1); ++ if (host->real_rate <= ios->clock) ++ break; ++ } ++ if (mci_psc > 255) ++ mci_psc = 255; ++ host->clk_div = mci_psc; ++ /* set the nearest prescaler factor ++ * ++ * register shared with SCLK divisor -- no chance of race because ++ * we don't use sensor interface ++ */ ++ writew_dly((readw(glamo_mci_def_pdata.pglamo->base + ++ GLAMO_REG_CLOCK_GEN8) & 0xff00) | host->clk_div, ++ glamo_mci_def_pdata.pglamo->base + GLAMO_REG_CLOCK_GEN8); ++ /* enable clock to divider input */ ++ writew_dly(readw(glamo_mci_def_pdata.pglamo->base + ++ GLAMO_REG_CLOCK_GEN5_1) | GLAMO_CLOCK_GEN51_EN_DIV_TCLK, ++ glamo_mci_def_pdata.pglamo->base + GLAMO_REG_CLOCK_GEN5_1); ++#if 0 ++ } else { /* stop clock */ ++ host->real_rate = 0; ++ /* remove clock from divider input */ ++ writew(readw(glamo_mci_def_pdata.pglamo->base + ++ GLAMO_REG_CLOCK_GEN5_1) & (~GLAMO_CLOCK_GEN51_EN_DIV_TCLK), ++ glamo_mci_def_pdata.pglamo->base + GLAMO_REG_CLOCK_GEN5_1); ++ } ++#endif ++ if ((ios->power_mode == MMC_POWER_ON) || ++ (ios->power_mode == MMC_POWER_UP)) { ++ dev_info(&host->pdev->dev, ++ "powered (vdd = %d) clk: %lukHz div=%d (req: %ukHz). " ++ "Bus width=%d\n",ios->vdd, ++ host->real_rate / 1000, mci_psc, ++ ios->clock / 1000, ios->bus_width); ++ } else ++ dev_info(&host->pdev->dev, "glamo_mci_set_ios: power down.\n"); ++ ++ /* set bus width */ ++ host->bus_width = ios->bus_width; ++ if (host->bus_width == MMC_BUS_WIDTH_4) ++ n = GLAMO_BASIC_MMC_EN_4BIT_DATA; ++ writew_dly((readw_dly(host->base + GLAMO_REG_MMC_BASIC) & ++ (~GLAMO_BASIC_MMC_EN_4BIT_DATA)) | n, ++ host->base + GLAMO_REG_MMC_BASIC); ++} ++ ++ ++/* ++ * no physical write protect supported by us ++ */ ++static int glamo_mci_get_ro(struct mmc_host *mmc) ++{ ++ return 0; ++} ++ ++static struct mmc_host_ops glamo_mci_ops = { ++ .request = glamo_mci_request, ++ .set_ios = glamo_mci_set_ios, ++ .get_ro = glamo_mci_get_ro, ++}; ++ ++static int glamo_mci_probe(struct platform_device *pdev) ++{ ++ struct mmc_host *mmc; ++ struct glamo_mci_host *host; ++ int ret; ++ ++ dev_info(&pdev->dev, "glamo_mci driver (C)2007 OpenMoko, Inc\n"); ++ ++ mmc = mmc_alloc_host(sizeof(struct glamo_mci_host), &pdev->dev); ++ if (!mmc) { ++ ret = -ENOMEM; ++ goto probe_out; ++ } ++ ++ host = mmc_priv(mmc); ++ host->mmc = mmc; ++ host->pdev = pdev; ++ host->pdata = &glamo_mci_def_pdata; ++ host->power_mode_current = MMC_POWER_OFF; ++ ++ host->complete_what = COMPLETION_NONE; ++ host->pio_active = XFER_NONE; ++ ++ spin_lock_init(&host->complete_lock); ++ ++ host->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (!host->mem) { ++ dev_err(&pdev->dev, ++ "failed to get io memory region resouce.\n"); ++ ++ ret = -ENOENT; ++ goto probe_free_host; ++ } ++ ++ host->mem = request_mem_region(host->mem->start, ++ RESSIZE(host->mem), pdev->name); ++ ++ if (!host->mem) { ++ dev_err(&pdev->dev, "failed to request io memory region.\n"); ++ ret = -ENOENT; ++ goto probe_free_host; ++ } ++ ++ host->base = ioremap(host->mem->start, RESSIZE(host->mem)); ++ if (!host->base) { ++ dev_err(&pdev->dev, "failed to ioremap() io memory region.\n"); ++ ret = -EINVAL; ++ goto probe_free_mem_region; ++ } ++ ++ /* set the handler for our bit of the shared chip irq register */ ++ set_irq_handler(IRQ_GLAMO(GLAMO_IRQIDX_MMC), glamo_mci_irq); ++ /* stash host as our handler's private data */ ++ set_irq_data(IRQ_GLAMO(GLAMO_IRQIDX_MMC), host); ++ ++ /* Get ahold of our data buffer we use for data in and out on MMC */ ++ host->mem_data = platform_get_resource(pdev, IORESOURCE_MEM, 1); ++ if (!host->mem_data) { ++ dev_err(&pdev->dev, ++ "failed to get io memory region resource.\n"); ++ ret = -ENOENT; ++ goto probe_iounmap; ++ } ++ ++ host->mem_data = request_mem_region(host->mem_data->start, ++ RESSIZE(host->mem_data), pdev->name); ++ ++ if (!host->mem_data) { ++ dev_err(&pdev->dev, "failed to request io memory region.\n"); ++ ret = -ENOENT; ++ goto probe_iounmap; ++ } ++ host->base_data = ioremap(host->mem_data->start, ++ RESSIZE(host->mem_data)); ++ host->data_max_size = RESSIZE(host->mem_data); ++ ++ if (host->base_data == 0) { ++ dev_err(&pdev->dev, "failed to ioremap() io memory region.\n"); ++ ret = -EINVAL; ++ goto probe_free_mem_region_data; ++ } ++ ++ host->vdd_current = 0; ++ host->clk_rate = 50000000; /* really it's 49152000 */ ++ host->clk_div = 16; ++ ++ /* explain our host controller capabilities */ ++ mmc->ops = &glamo_mci_ops; ++ mmc->ocr_avail = host->pdata->ocr_avail; ++ mmc->caps = MMC_CAP_4_BIT_DATA | ++ MMC_CAP_MULTIWRITE | ++ MMC_CAP_MMC_HIGHSPEED | ++ MMC_CAP_SD_HIGHSPEED; ++ mmc->f_min = host->clk_rate / 256; ++ /* ++ * held at /4 due to concerns of 100R recommended series resistor ++ * allows 16MHz @ 4-bit --> 8MBytes/sec raw ++ */ ++ mmc->f_max = host->clk_rate / 3; ++ ++ mmc->max_blk_count = (1 << 16) - 1; /* GLAMO_REG_MMC_RB_BLKCNT */ ++ mmc->max_blk_size = (1 << 12) - 1; /* GLAMO_REG_MMC_RB_BLKLEN */ ++ mmc->max_req_size = RESSIZE(host->mem_data) / 2; ++ mmc->max_seg_size = mmc->max_req_size; ++ mmc->max_phys_segs = 1; /* hw doesn't talk about segs??? */ ++ mmc->max_hw_segs = 1; ++ ++ dev_info(&host->pdev->dev, "probe: mapped mci_base:%p irq:%u.\n", ++ host->base, host->irq); ++ ++ if ((ret = mmc_add_host(mmc))) { ++ dev_err(&pdev->dev, "failed to add mmc host.\n"); ++ goto probe_free_mem_region_data; ++ } ++ ++ platform_set_drvdata(pdev, mmc); ++ ++ dev_info(&pdev->dev,"initialisation done.\n"); ++ return 0; ++ ++ probe_free_mem_region_data: ++ release_mem_region(host->mem_data->start, RESSIZE(host->mem_data)); ++ ++ probe_iounmap: ++ iounmap(host->base); ++ ++ probe_free_mem_region: ++ release_mem_region(host->mem->start, RESSIZE(host->mem)); ++ ++ probe_free_host: ++ mmc_free_host(mmc); ++ probe_out: ++ return ret; ++} ++ ++static int glamo_mci_remove(struct platform_device *pdev) ++{ ++ struct mmc_host *mmc = platform_get_drvdata(pdev); ++ struct glamo_mci_host *host = mmc_priv(mmc); ++ ++ mmc_remove_host(mmc); ++ /* stop using our handler, revert it to default */ ++ set_irq_handler(IRQ_GLAMO(GLAMO_IRQIDX_MMC), handle_level_irq); ++ iounmap(host->base); ++ iounmap(host->base_data); ++ release_mem_region(host->mem->start, RESSIZE(host->mem)); ++ release_mem_region(host->mem_data->start, RESSIZE(host->mem_data)); ++ mmc_free_host(mmc); ++ ++ glamo_engine_disable(glamo_mci_def_pdata.pglamo, GLAMO_ENGINE_MMC); ++ return 0; ++} ++ ++ ++#ifdef CONFIG_PM ++ ++static int glamo_mci_suspend(struct platform_device *dev, pm_message_t state) ++{ ++ struct mmc_host *mmc = platform_get_drvdata(dev); ++ ++ return mmc_suspend_host(mmc, state); ++} ++ ++static int glamo_mci_resume(struct platform_device *dev) ++{ ++ struct mmc_host *mmc = platform_get_drvdata(dev); ++ ++ return mmc_resume_host(mmc); ++} ++ ++#else /* CONFIG_PM */ ++#define glamo_mci_suspend NULL ++#define glamo_mci_resume NULL ++#endif /* CONFIG_PM */ ++ ++ ++static struct platform_driver glamo_mci_driver = ++{ ++ .driver.name = "glamo-mci", ++ .probe = glamo_mci_probe, ++ .remove = glamo_mci_remove, ++ .suspend = glamo_mci_suspend, ++ .resume = glamo_mci_resume, ++}; ++ ++static int __init glamo_mci_init(void) ++{ ++ platform_driver_register(&glamo_mci_driver); ++ return 0; ++} ++ ++static void __exit glamo_mci_exit(void) ++{ ++ platform_driver_unregister(&glamo_mci_driver); ++} ++ ++module_init(glamo_mci_init); ++module_exit(glamo_mci_exit); ++ ++MODULE_DESCRIPTION("Glamo MMC/SD Card Interface driver"); ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("Andy Green "); +diff --git a/drivers/mfd/glamo/glamo-mci.h b/drivers/mfd/glamo/glamo-mci.h +new file mode 100644 +index 0000000..40c3e24 +--- /dev/null ++++ b/drivers/mfd/glamo/glamo-mci.h +@@ -0,0 +1,76 @@ ++/* ++ * linux/drivers/mmc/host/glamo-mmc.h - GLAMO MCI driver ++ * ++ * Copyright (C) 2007-2008 OpenMoko, Inc, Andy Green ++ * based on S3C MMC driver --> ++ * Copyright (C) 2004-2006 Thomas Kleffel, All Rights Reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++ ++enum glamo_mci_waitfor { ++ COMPLETION_NONE, ++ COMPLETION_FINALIZE, ++ COMPLETION_CMDSENT, ++ COMPLETION_RSPFIN, ++ COMPLETION_XFERFINISH, ++ COMPLETION_XFERFINISH_RSPFIN, ++}; ++ ++struct glamo_mci_host { ++ struct platform_device *pdev; ++ struct glamo_mci_pdata *pdata; ++ struct mmc_host *mmc; ++ struct resource *mem; ++ struct resource *mem_data; ++ struct clk *clk; ++ void __iomem *base; ++ u16 __iomem *base_data; ++ int irq; ++ int irq_cd; ++ int dma; ++ int data_max_size; ++ ++ int power_mode_current; ++ unsigned int vdd_current; ++ ++ unsigned long clk_rate; ++ unsigned long clk_div; ++ unsigned long real_rate; ++ u8 prescaler; ++ ++ unsigned sdiimsk; ++ int dodma; ++ ++ volatile int dmatogo; ++ ++ struct mmc_request *mrq; ++ int cmd_is_stop; ++ ++ spinlock_t complete_lock; ++ volatile enum glamo_mci_waitfor ++ complete_what; ++ ++ volatile int dma_complete; ++ ++ volatile u32 pio_sgptr; ++ volatile u32 pio_words; ++ volatile u32 pio_count; ++ volatile u16 *pio_ptr; ++#define XFER_NONE 0 ++#define XFER_READ 1 ++#define XFER_WRITE 2 ++ volatile u32 pio_active; ++ ++ int bus_width; ++ ++ char dbgmsg_cmd[301]; ++ char dbgmsg_dat[301]; ++ volatile char *status; ++ ++ unsigned int ccnt, dcnt; ++ struct tasklet_struct pio_tasklet; ++}; +diff --git a/drivers/mfd/glamo/glamo-regs.h b/drivers/mfd/glamo/glamo-regs.h +index 151cd66..8f6c45c 100644 +--- a/drivers/mfd/glamo/glamo-regs.h ++++ b/drivers/mfd/glamo/glamo-regs.h +@@ -150,16 +150,28 @@ enum glamo_reg_mem_dram2 { + GLAMO_MEM_DRAM2_DEEP_PWRDOWN = (1 << 12), + }; + ++enum glamo_irq_index { ++ GLAMO_IRQIDX_HOSTBUS = 0, ++ GLAMO_IRQIDX_JPEG = 1, ++ GLAMO_IRQIDX_MPEG = 2, ++ GLAMO_IRQIDX_MPROC1 = 3, ++ GLAMO_IRQIDX_MPROC0 = 4, ++ GLAMO_IRQIDX_CMDQUEUE = 5, ++ GLAMO_IRQIDX_2D = 6, ++ GLAMO_IRQIDX_MMC = 7, ++ GLAMO_IRQIDX_RISC = 8, ++}; ++ + enum glamo_irq { +- GLAMO_IRQ_HOSTBUS = 0x0001, +- GLAMO_IRQ_JPEG = 0x0002, +- GLAMO_IRQ_MPEG = 0x0004, +- GLAMO_IRQ_MPROC1 = 0x0008, +- GLAMO_IRQ_MPROC0 = 0x0010, +- GLAMO_IRQ_CMDQUEUE = 0x0020, +- GLAMO_IRQ_2D = 0x0040, +- GLAMO_IRQ_MMC = 0x0080, +- GLAMO_IRQ_RISC = 0x0100, ++ GLAMO_IRQ_HOSTBUS = (1 << GLAMO_IRQIDX_HOSTBUS), ++ GLAMO_IRQ_JPEG = (1 << GLAMO_IRQIDX_JPEG), ++ GLAMO_IRQ_MPEG = (1 << GLAMO_IRQIDX_MPEG), ++ GLAMO_IRQ_MPROC1 = (1 << GLAMO_IRQIDX_MPROC1), ++ GLAMO_IRQ_MPROC0 = (1 << GLAMO_IRQIDX_MPROC0), ++ GLAMO_IRQ_CMDQUEUE = (1 << GLAMO_IRQIDX_CMDQUEUE), ++ GLAMO_IRQ_2D = (1 << GLAMO_IRQIDX_2D), ++ GLAMO_IRQ_MMC = (1 << GLAMO_IRQIDX_MMC), ++ GLAMO_IRQ_RISC = (1 << GLAMO_IRQIDX_RISC), + }; + + enum glamo_reg_clock_host { +@@ -197,6 +209,145 @@ enum glamo_reg_clock_mmc { + GLAMO_CLOCK_MMC_RESET = 0x1000, + }; + ++enum glamo_reg_basic_mmc { ++ /* set to disable CRC error rejection */ ++ GLAMO_BASIC_MMC_DISABLE_CRC = 0x0001, ++ /* enable completion interrupt */ ++ GLAMO_BASIC_MMC_EN_COMPL_INT = 0x0002, ++ /* stop MMC clock while enforced idle waiting for data from card */ ++ GLAMO_BASIC_MMC_NO_CLK_RD_WAIT = 0x0004, ++ /* 0 = 1-bit bus to card, 1 = use 4-bit bus (has to be negotiated) */ ++ GLAMO_BASIC_MMC_EN_4BIT_DATA = 0x0008, ++ /* enable 75K pullups on D3..D0 */ ++ GLAMO_BASIC_MMC_EN_DATA_PUPS = 0x0010, ++ /* enable 75K pullup on CMD */ ++ GLAMO_BASIC_MMC_EN_CMD_PUP = 0x0020, ++ /* IO drive strength 00=weak -> 11=strongest */ ++ GLAMO_BASIC_MMC_EN_DR_STR0 = 0x0040, ++ GLAMO_BASIC_MMC_EN_DR_STR1 = 0x0080, ++ /* TCLK delay stage A, 0000 = 500ps --> 1111 = 8ns */ ++ GLAMO_BASIC_MMC_EN_TCLK_DLYA0 = 0x0100, ++ GLAMO_BASIC_MMC_EN_TCLK_DLYA1 = 0x0200, ++ GLAMO_BASIC_MMC_EN_TCLK_DLYA2 = 0x0400, ++ GLAMO_BASIC_MMC_EN_TCLK_DLYA3 = 0x0800, ++ /* TCLK delay stage B (cumulative), 0000 = 500ps --> 1111 = 8ns */ ++ GLAMO_BASIC_MMC_EN_TCLK_DLYB0 = 0x1000, ++ GLAMO_BASIC_MMC_EN_TCLK_DLYB1 = 0x2000, ++ GLAMO_BASIC_MMC_EN_TCLK_DLYB2 = 0x4000, ++ GLAMO_BASIC_MMC_EN_TCLK_DLYB3 = 0x8000, ++}; ++ ++enum glamo_reg_stat1_mmc { ++ /* command "counter" (really: toggle) */ ++ GLAMO_STAT1_MMC_CMD_CTR = 0x8000, ++ /* engine is idle */ ++ GLAMO_STAT1_MMC_IDLE = 0x4000, ++ /* readback response is ready */ ++ GLAMO_STAT1_MMC_RB_RRDY = 0x0200, ++ /* readback data is ready */ ++ GLAMO_STAT1_MMC_RB_DRDY = 0x0100, ++ /* no response timeout */ ++ GLAMO_STAT1_MMC_RTOUT = 0x0020, ++ /* no data timeout */ ++ GLAMO_STAT1_MMC_DTOUT = 0x0010, ++ /* CRC error on block write */ ++ GLAMO_STAT1_MMC_BWERR = 0x0004, ++ /* CRC error on block read */ ++ GLAMO_STAT1_MMC_BRERR = 0x0002 ++}; ++ ++enum glamo_reg_fire_mmc { ++ /* command "counter" (really: toggle) ++ * the STAT1 register reflects this so you can ensure you don't look ++ * at status for previous command ++ */ ++ GLAMO_FIRE_MMC_CMD_CTR = 0x8000, ++ /* sets kind of response expected */ ++ GLAMO_FIRE_MMC_RES_MASK = 0x0700, ++ /* sets command type */ ++ GLAMO_FIRE_MMC_TYP_MASK = 0x00C0, ++ /* sets command class */ ++ GLAMO_FIRE_MMC_CLS_MASK = 0x000F, ++}; ++ ++enum glamo_fire_mmc_response_types { ++ GLAMO_FIRE_MMC_RSPT_R1 = 0x0000, ++ GLAMO_FIRE_MMC_RSPT_R1b = 0x0100, ++ GLAMO_FIRE_MMC_RSPT_R2 = 0x0200, ++ GLAMO_FIRE_MMC_RSPT_R3 = 0x0300, ++ GLAMO_FIRE_MMC_RSPT_R4 = 0x0400, ++ GLAMO_FIRE_MMC_RSPT_R5 = 0x0500, ++}; ++ ++enum glamo_fire_mmc_command_types { ++ /* broadcast, no response */ ++ GLAMO_FIRE_MMC_CMDT_BNR = 0x0000, ++ /* broadcast, with response */ ++ GLAMO_FIRE_MMC_CMDT_BR = 0x0040, ++ /* addressed, no data */ ++ GLAMO_FIRE_MMC_CMDT_AND = 0x0080, ++ /* addressed, with data */ ++ GLAMO_FIRE_MMC_CMDT_AD = 0x00C0, ++}; ++ ++enum glamo_fire_mmc_command_class { ++ /* "Stream Read" */ ++ GLAMO_FIRE_MMC_CC_STRR = 0x0000, ++ /* Single Block Read */ ++ GLAMO_FIRE_MMC_CC_SBR = 0x0001, ++ /* Multiple Block Read With Stop */ ++ GLAMO_FIRE_MMC_CC_MBRS = 0x0002, ++ /* Multiple Block Read No Stop */ ++ GLAMO_FIRE_MMC_CC_MBRNS = 0x0003, ++ /* RESERVED for "Stream Write" */ ++ GLAMO_FIRE_MMC_CC_STRW = 0x0004, ++ /* "Stream Write" */ ++ GLAMO_FIRE_MMC_CC_SBW = 0x0005, ++ /* RESERVED for Multiple Block Write With Stop */ ++ GLAMO_FIRE_MMC_CC_MBWS = 0x0006, ++ /* Multiple Block Write No Stop */ ++ GLAMO_FIRE_MMC_CC_MBWNS = 0x0007, ++ /* STOP command */ ++ GLAMO_FIRE_MMC_CC_STOP = 0x0008, ++ /* Cancel on Running Command */ ++ GLAMO_FIRE_MMC_CC_CANCL = 0x0009, ++ /* "Basic Command" */ ++ GLAMO_FIRE_MMC_CC_BASIC = 0x000a, ++}; ++ ++/* these are offsets from the start of the MMC register region */ ++enum glamo_register_mmc { ++ /* MMC command, b15..8 = cmd arg b7..0; b7..1 = CRC; b0 = end bit */ ++ GLAMO_REG_MMC_CMD_REG1 = 0x00, ++ /* MMC command, b15..0 = cmd arg b23 .. 8 */ ++ GLAMO_REG_MMC_CMD_REG2 = 0x02, ++ /* MMC command, b15=start, b14=transmission, ++ * b13..8=cmd idx, b7..0=cmd arg b31..24 ++ */ ++ GLAMO_REG_MMC_CMD_REG3 = 0x04, ++ GLAMO_REG_MMC_CMD_FIRE = 0x06, ++ GLAMO_REG_MMC_CMD_RSP1 = 0x10, ++ GLAMO_REG_MMC_CMD_RSP2 = 0x12, ++ GLAMO_REG_MMC_CMD_RSP3 = 0x14, ++ GLAMO_REG_MMC_CMD_RSP4 = 0x16, ++ GLAMO_REG_MMC_CMD_RSP5 = 0x18, ++ GLAMO_REG_MMC_CMD_RSP6 = 0x1a, ++ GLAMO_REG_MMC_CMD_RSP7 = 0x1c, ++ GLAMO_REG_MMC_CMD_RSP8 = 0x1e, ++ GLAMO_REG_MMC_RB_STAT1 = 0x20, ++ GLAMO_REG_MMC_RB_BLKCNT = 0x22, ++ GLAMO_REG_MMC_RB_BLKLEN = 0x24, ++ GLAMO_REG_MMC_BASIC = 0x30, ++ GLAMO_REG_MMC_RDATADS1 = 0x34, ++ GLAMO_REG_MMC_RDATADS2 = 0x36, ++ GLAMO_REG_MMC_WDATADS1 = 0x38, ++ GLAMO_REG_MMC_WDATADS2 = 0x3a, ++ GLAMO_REG_MMC_DATBLKCNT = 0x3c, ++ GLAMO_REG_MMC_DATBLKLEN = 0x3e, ++ GLAMO_REG_MMC_TIMEOUT = 0x40, ++ ++}; ++ + enum glamo_reg_clock_isp { + GLAMO_CLOCK_ISP_DG_I1CLK = 0x0001, + GLAMO_CLOCK_ISP_EN_I1CLK = 0x0002, +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1035-gta02-core.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1035-gta02-core.patch.patch new file mode 100644 index 0000000000..94dbba08f5 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1035-gta02-core.patch.patch @@ -0,0 +1,1027 @@ +From 565a3af138c80c15151d91647b7e92654997ecc8 Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:35:15 +0100 +Subject: [PATCH] gta02-core.patch + +--- + arch/arm/mach-s3c2440/Kconfig | 15 + + arch/arm/mach-s3c2440/Makefile | 1 + + arch/arm/mach-s3c2440/mach-gta02.c | 826 ++++++++++++++++++++++++++++++++++ + drivers/leds/leds-neo1973-vibrator.c | 2 +- + include/asm-arm/arch-s3c2410/gta02.h | 99 ++++ + sound/soc/s3c24xx/neo1973_wm8753.c | 8 +- + 6 files changed, 949 insertions(+), 2 deletions(-) + create mode 100644 arch/arm/mach-s3c2440/mach-gta02.c + create mode 100644 include/asm-arm/arch-s3c2410/gta02.h + +diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig +index 6798d9c..1fab1c0 100644 +--- a/arch/arm/mach-s3c2440/Kconfig ++++ b/arch/arm/mach-s3c2440/Kconfig +@@ -74,5 +74,20 @@ config MACH_HXD8 + help + Say Y here if you are using the FIC Neo1973 GSM Phone + ++config MACH_NEO1973_GTA02 ++ bool "FIC Neo1973 GSM Phone (GTA02 Hardware)" ++ select CPU_S3C2442 ++ select SENSORS_PCF50633 ++ help ++ Say Y here if you are using the FIC Neo1973 GSM Phone ++ ++config NEO1973_GTA02_2440 ++ bool "Old FIC Neo1973 GTA02 hardware using S3C2440 CPU" ++ depends on MACH_NEO1973_GTA02 ++ select CPU_S3C2440 ++ help ++ Say Y here if you are using an early hardware revision ++ of the FIC/OpenMoko Neo1973 GTA02 GSM Phone. ++ + endmenu + +diff --git a/arch/arm/mach-s3c2440/Makefile b/arch/arm/mach-s3c2440/Makefile +index 6f590d4..5305fdb 100644 +--- a/arch/arm/mach-s3c2440/Makefile ++++ b/arch/arm/mach-s3c2440/Makefile +@@ -22,3 +22,4 @@ obj-$(CONFIG_MACH_RX3715) += mach-rx3715.o + obj-$(CONFIG_ARCH_S3C2440) += mach-smdk2440.o + obj-$(CONFIG_MACH_NEXCODER_2440) += mach-nexcoder.o + obj-$(CONFIG_MACH_HXD8) += mach-hxd8.o ++obj-$(CONFIG_MACH_NEO1973_GTA02) += mach-gta02.o +diff --git a/arch/arm/mach-s3c2440/mach-gta02.c b/arch/arm/mach-s3c2440/mach-gta02.c +new file mode 100644 +index 0000000..f72a5ae +--- /dev/null ++++ b/arch/arm/mach-s3c2440/mach-gta02.c +@@ -0,0 +1,826 @@ ++/* ++ * linux/arch/arm/mach-s3c2440/mach-gta02.c ++ * ++ * S3C2440 Machine Support for the FIC GTA02 (Neo1973) ++ * ++ * Copyright (C) 2006-2007 by OpenMoko, Inc. ++ * Author: Harald Welte ++ * All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++static struct map_desc gta02_iodesc[] __initdata = { ++ { ++ .virtual = 0xe0000000, ++ .pfn = __phys_to_pfn(S3C2410_CS3+0x01000000), ++ .length = SZ_1M, ++ .type = MT_DEVICE ++ }, ++}; ++ ++#define UCON S3C2410_UCON_DEFAULT ++#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB ++#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE ++ ++static struct s3c2410_uartcfg gta02_uartcfgs[] = { ++ [0] = { ++ .hwport = 0, ++ .flags = 0, ++ .ucon = UCON, ++ .ulcon = ULCON, ++ .ufcon = UFCON, ++ }, ++ [1] = { ++ .hwport = 1, ++ .flags = 0, ++ .ucon = UCON, ++ .ulcon = ULCON, ++ .ufcon = UFCON, ++ }, ++ [2] = { ++ .hwport = 2, ++ .flags = 0, ++ .ucon = UCON, ++ .ulcon = ULCON, ++ .ufcon = UFCON, ++ }, ++ ++}; ++ ++/* PMU driver info */ ++ ++static int pmu_callback(struct device *dev, unsigned int feature, ++ enum pmu_event event) ++{ ++ switch (feature) { ++ case PCF50633_FEAT_MBC: ++ switch (event) { ++ case PMU_EVT_INSERT: ++ case PMU_EVT_USB_INSERT: ++ pcf50633_charge_enable(pcf50633_global, 1); ++ break; ++ case PMU_EVT_REMOVE: ++ case PMU_EVT_USB_REMOVE: ++ pcf50633_charge_enable(pcf50633_global, 0); ++ break; ++ default: ++ break; ++ } ++ break; ++ default: ++ break; ++ } ++ ++ return 0; ++} ++ ++static struct pcf50633_platform_data gta02_pcf_pdata = { ++ .used_features = PCF50633_FEAT_MBC | ++ PCF50633_FEAT_BBC | ++ PCF50633_FEAT_RTC | ++ PCF50633_FEAT_CHGCUR | ++ PCF50633_FEAT_BATVOLT | ++ PCF50633_FEAT_BATTEMP | ++ PCF50633_FEAT_PWM_BL, ++ .onkey_seconds_sig_init = 4, ++ .onkey_seconds_shutdown = 8, ++ .cb = &pmu_callback, ++ .r_fix_batt = 10000, ++ .r_fix_batt_par = 10000, ++ .r_sense_milli = 220, ++ .rails = { ++ [PCF50633_REGULATOR_AUTO] = { ++ .name = "io_3v3", ++ .flags = PMU_VRAIL_F_SUSPEND_ON, ++ .voltage = { ++ .init = 3300, ++ .max = 3300, ++ }, ++ }, ++ [PCF50633_REGULATOR_DOWN1] = { ++ .name = "core_1v3", ++ .voltage = { ++ .init = 1300, ++ .max = 1600, ++ }, ++ }, ++ [PCF50633_REGULATOR_DOWN2] = { ++ .name = "core_1v8", ++ .voltage = { ++ .init = 1800, ++ .max = 1800, ++ }, ++ }, ++ [PCF50633_REGULATOR_HCLDO] = { ++ .name = "sd_3v3", ++ .voltage = { ++ .init = 3300, ++ .max = 3300, ++ }, ++ }, ++ [PCF50633_REGULATOR_LDO1] = { ++ .name = "stby_1v3", ++ .flags = PMU_VRAIL_F_SUSPEND_ON, ++ .voltage = { ++ .init = 1300, ++ .max = 1330, ++ }, ++ }, ++ [PCF50633_REGULATOR_LDO2] = { ++ .name = "codec_3v3", ++ .voltage = { ++ .init = 3300, ++ .max = 3300, ++ }, ++ }, ++ [PCF50633_REGULATOR_LDO3] = { ++ .name = "lcm_3v", ++ .voltage = { ++ .init = 3000, ++ .max = 3000, ++ }, ++ }, ++ [PCF50633_REGULATOR_LDO4] = { ++ .name = "gl_2v5", ++ .voltage = { ++ .init = 2500, ++ .max = 2500, ++ }, ++ }, ++ [PCF50633_REGULATOR_LDO5] = { ++ .name = "gl_1v5", ++ .voltage = { ++ .init = 1500, ++ .max = 1500, ++ }, ++ }, ++ [PCF50633_REGULATOR_LDO6] = { ++ .name = "user1", ++ .voltage = { ++ .init = 0, ++ .max = 3300, ++ }, ++ }, ++ }, ++}; ++ ++#if 0 /* currently unused */ ++static void cfg_pmu_vrail(struct pmu_voltage_rail *vrail, char *name, ++ unsigned int flags, unsigned int init, ++ unsigned int max) ++{ ++ vrail->name = name; ++ vrail->flags = flags; ++ vrail->voltage.init = init; ++ vrail->voltage.max = max; ++} ++#endif ++ ++static void mangle_pmu_pdata_by_system_rev(void) ++{ ++ switch (system_rev) { ++ case GTA02v1_SYSTEM_REV: ++ /* FIXME: this is only in v1 due to wrong PMU variant */ ++ gta02_pcf_pdata.rails[PCF50633_REGULATOR_DOWN2].flags = ++ PMU_VRAIL_F_SUSPEND_ON; ++ break; ++ case GTA02v2_SYSTEM_REV: ++ case GTA02v3_SYSTEM_REV: ++ case GTA02v4_SYSTEM_REV: ++ case GTA02v5_SYSTEM_REV: ++ case GTA02v6_SYSTEM_REV: ++ /* we need to keep the 1.8V going since this is the SDRAM ++ * self-refresh voltage */ ++ gta02_pcf_pdata.rails[PCF50633_REGULATOR_DOWN2].flags = ++ PMU_VRAIL_F_SUSPEND_ON; ++ gta02_pcf_pdata.rails[PCF50633_REGULATOR_DOWN2].name = ++ "io_1v8", ++ gta02_pcf_pdata.rails[PCF50633_REGULATOR_LDO1].name = ++ "gsensor_3v3", ++ gta02_pcf_pdata.rails[PCF50633_REGULATOR_LDO1].voltage.init = ++ 3300; ++ gta02_pcf_pdata.rails[PCF50633_REGULATOR_LDO1].voltage.max = ++ 3300; ++ gta02_pcf_pdata.rails[PCF50633_REGULATOR_LDO1].flags &= ++ ~PMU_VRAIL_F_SUSPEND_ON; ++ gta02_pcf_pdata.rails[PCF50633_REGULATOR_LDO3].flags = ++ PMU_VRAIL_F_UNUSED; ++ gta02_pcf_pdata.rails[PCF50633_REGULATOR_LDO5] = ((struct pmu_voltage_rail) { ++ .name = "rf_3v", ++ .voltage = { ++ .init = 0, ++ .max = 3000, ++ } ++ }); ++ gta02_pcf_pdata.rails[PCF50633_REGULATOR_LDO6] = ((struct pmu_voltage_rail) { ++ .name = "lcm_3v", ++ .voltage = { ++ .init = 3000, ++ .max = 3000, ++ } ++ }); ++ break; ++ default: ++ break; ++ } ++} ++ ++static struct resource gta02_pmu_resources[] = { ++ [0] = { ++ .flags = IORESOURCE_IRQ, ++ .start = GTA02_IRQ_PCF50633, ++ .end = GTA02_IRQ_PCF50633, ++ }, ++}; ++ ++struct platform_device gta02_pmu_dev = { ++ .name = "pcf50633", ++ .num_resources = ARRAY_SIZE(gta02_pmu_resources), ++ .resource = gta02_pmu_resources, ++ .dev = { ++ .platform_data = >a02_pcf_pdata, ++ }, ++}; ++ ++ ++/* NOR Flash */ ++ ++#define GTA02_FLASH_BASE 0x18000000 /* GCS3 */ ++#define GTA02_FLASH_SIZE 0x200000 /* 2MBytes */ ++ ++static struct physmap_flash_data gta02_nor_flash_data = { ++ .width = 2, ++}; ++ ++static struct resource gta02_nor_flash_resource = { ++ .start = GTA02_FLASH_BASE, ++ .end = GTA02_FLASH_BASE + GTA02_FLASH_SIZE - 1, ++ .flags = IORESOURCE_MEM, ++}; ++ ++static struct platform_device gta02_nor_flash = { ++ .name = "physmap-flash", ++ .id = 0, ++ .dev = { ++ .platform_data = >a02_nor_flash_data, ++ }, ++ .resource = >a02_nor_flash_resource, ++ .num_resources = 1, ++}; ++ ++ ++ ++static struct resource gta02_sdio_resources[] = { ++ [0] = { ++ .flags = IORESOURCE_IRQ, ++ .start = IRQ_SDI, ++ .end = IRQ_SDI, ++ }, ++ [1] = { ++ .flags = IORESOURCE_MEM, ++ .start = S3C2410_PA_SDI, ++ .end = S3C2410_PA_SDI + S3C24XX_SZ_SDI - 1, ++ }, ++ [2] = { ++ .flags = IORESOURCE_DMA, ++ .start = 0, /* Channel 0 for SDI */ ++ .end = 0, ++ }, ++}; ++ ++ ++static struct platform_device gta02_sdio_dev = { ++ .name = "s3c24xx-sdio", ++ .id = -1, ++ .dev = { ++ .coherent_dma_mask = 0xffffffff, ++ }, ++ .resource = gta02_sdio_resources, ++ .num_resources = ARRAY_SIZE(gta02_sdio_resources), ++}; ++ ++static struct platform_device *gta02_devices[] __initdata = { ++ &s3c_device_usb, ++ &s3c_device_wdt, ++ &s3c_device_i2c, ++ &s3c_device_iis, ++ // &s3c_device_sdi, /* FIXME: temporary disable to avoid s3cmci bind */ ++ &s3c_device_usbgadget, ++ &s3c_device_nand, ++ &s3c_device_ts, ++ &s3c_device_spi0, ++ &s3c_device_spi1, ++ >a02_nor_flash, ++}; ++ ++static struct s3c2410_nand_set gta02_nand_sets[] = { ++ [0] = { ++ .name = "neo1973-nand", ++ .nr_chips = 1, ++ .flags = S3C2410_NAND_BBT, ++ }, ++}; ++ ++/* choose a set of timings which should suit most 512Mbit ++ * chips and beyond. ++ */ ++ ++static struct s3c2410_platform_nand gta02_nand_info = { ++ .tacls = 20, ++ .twrph0 = 60, ++ .twrph1 = 20, ++ .nr_sets = ARRAY_SIZE(gta02_nand_sets), ++ .sets = gta02_nand_sets, ++}; ++ ++static struct s3c24xx_mci_pdata gta02_mmc_cfg = { ++ .gpio_detect = GTA02v1_GPIO_nSD_DETECT, ++ .set_power = NULL, ++ .ocr_avail = MMC_VDD_32_33, ++}; ++ ++static void gta02_udc_command(enum s3c2410_udc_cmd_e cmd) ++{ ++ printk(KERN_DEBUG "%s(%d)\n", __func__, cmd); ++ ++ switch (cmd) { ++ case S3C2410_UDC_P_ENABLE: ++ s3c2410_gpio_setpin(GTA02_GPIO_USB_PULLUP, 1); ++ break; ++ case S3C2410_UDC_P_DISABLE: ++ s3c2410_gpio_setpin(GTA02_GPIO_USB_PULLUP, 0); ++ break; ++ case S3C2410_UDC_P_RESET: ++ /* FIXME! */ ++ break; ++ default: ++ break; ++ } ++} ++ ++/* use a work queue, since I2C API inherently schedules ++ * and we get called in hardirq context from UDC driver */ ++ ++struct vbus_draw { ++ struct work_struct work; ++ int ma; ++}; ++static struct vbus_draw gta02_udc_vbus_drawer; ++ ++static void __gta02_udc_vbus_draw(struct work_struct *work) ++{ ++ if (!pcf50633_global) { ++ printk(KERN_ERR "pcf50633 not initialized yet, can't change " ++ "vbus_draw\n"); ++ return; ++ } ++ pcf50633_usb_curlim_set(pcf50633_global, gta02_udc_vbus_drawer.ma); ++} ++ ++static void gta02_udc_vbus_draw(unsigned int ma) ++{ ++ gta02_udc_vbus_drawer.ma = ma; ++ schedule_work(>a02_udc_vbus_drawer.work); ++} ++ ++static struct s3c2410_udc_mach_info gta02_udc_cfg = { ++ .vbus_draw = gta02_udc_vbus_draw, ++ .udc_command = gta02_udc_command, ++ ++}; ++ ++static struct s3c2410_ts_mach_info gta02_ts_cfg = { ++ .delay = 10000, ++ .presc = 65, ++ .oversampling_shift = 5, ++}; ++ ++/* SPI */ ++ ++static struct spi_board_info gta02_spi_board_info[] = { ++ { ++ .modalias = "jbt6k74", ++ /* platform_data */ ++ /* controller_data */ ++ /* irq */ ++ .max_speed_hz = 10 * 1000 * 1000, ++ .bus_num = 2, ++ /* chip_select */ ++ }, ++}; ++ ++static struct glamo_spi_info glamo_spi_cfg = { ++ .board_size = ARRAY_SIZE(gta02_spi_board_info), ++ .board_info = gta02_spi_board_info, ++}; ++ ++static struct glamo_spigpio_info glamo_spigpio_cfg = { ++ .pin_clk = GLAMO_GPIO10_OUTPUT, ++ .pin_mosi = GLAMO_GPIO11_OUTPUT, ++ .pin_cs = GLAMO_GPIO12_OUTPUT, ++ .pin_miso = 0, ++ .board_size = ARRAY_SIZE(gta02_spi_board_info), ++ .board_info = gta02_spi_board_info, ++}; ++ ++static struct resource gta01_led_resources[] = { ++ [0] = { ++ .start = GTA02_GPIO_VIBRATOR_ON, ++ .end = GTA02_GPIO_VIBRATOR_ON, ++ }, ++}; ++ ++static struct platform_device gta01_led_dev = { ++ .name = "neo1973-vibrator", ++ .num_resources = ARRAY_SIZE(gta01_led_resources), ++ .resource = gta01_led_resources, ++}; ++ ++static struct resource gta02_led_resources[] = { ++ { ++ .name = "gta02-power:orange", ++ .start = GTA02_GPIO_PWR_LED1, ++ .end = GTA02_GPIO_PWR_LED1, ++ }, { ++ .name = "gta02-power:blue", ++ .start = GTA02_GPIO_PWR_LED2, ++ .end = GTA02_GPIO_PWR_LED2, ++ }, { ++ .name = "gta02-aux:red", ++ .start = GTA02_GPIO_AUX_LED, ++ .end = GTA02_GPIO_AUX_LED, ++ }, ++}; ++ ++struct platform_device gta02_led_dev = { ++ .name = "gta02-led", ++ .num_resources = ARRAY_SIZE(gta02_led_resources), ++ .resource = gta02_led_resources, ++}; ++ ++static struct resource gta01_button_resources[] = { ++ [0] = { ++ .start = GTA02_GPIO_AUX_KEY, ++ .end = GTA02_GPIO_AUX_KEY, ++ }, ++ [1] = { ++ .start = GTA02_GPIO_HOLD_KEY, ++ .end = GTA02_GPIO_HOLD_KEY, ++ }, ++ [2] = { ++ .start = GTA02_GPIO_JACK_INSERT, ++ .end = GTA02_GPIO_JACK_INSERT, ++ }, ++}; ++ ++static struct platform_device gta01_button_dev = { ++ .name = "neo1973-button", ++ .num_resources = ARRAY_SIZE(gta01_button_resources), ++ .resource = gta01_button_resources, ++}; ++ ++static struct platform_device gta01_pm_gsm_dev = { ++ .name = "neo1973-pm-gsm", ++}; ++ ++/* USB */ ++static struct s3c2410_hcd_info gta02_usb_info = { ++ .port[0] = { ++ .flags = S3C_HCDFLG_USED, ++ }, ++ .port[1] = { ++ .flags = 0, ++ }, ++}; ++ ++static int glamo_irq_is_wired(void) ++{ ++ int rc; ++ int count = 0; ++ ++ /* ++ * GTA02 S-Media IRQs prior to A5 are broken due to a lack of ++ * a pullup on the INT# line. Check for the bad behaviour. ++ */ ++ s3c2410_gpio_setpin(S3C2410_GPG4, 0); ++ s3c2410_gpio_cfgpin(S3C2410_GPG4, S3C2410_GPG4_OUTP); ++ s3c2410_gpio_cfgpin(S3C2410_GPG4, S3C2410_GPG4_INP); ++ /* ++ * we force it low ourselves for a moment and resume being input. ++ * If there is a pullup, it won't stay low for long. But if the ++ * level converter is there as on < A5 revision, the weak keeper ++ * on the input of the LC will hold the line low indefinitiely ++ */ ++ do ++ rc = s3c2410_gpio_getpin(S3C2410_GPG4); ++ while ((!rc) && ((count++) < 10)); ++ if (rc) { /* it got pulled back up, it's good */ ++ printk(KERN_INFO "Detected S-Media IRQ# pullup, " ++ "enabling interrupt\n"); ++ return 0; ++ } else /* Gah we can't work with this level converter */ ++ printk(KERN_WARNING "** Detected bad IRQ# circuit found" ++ " on pre-A5 GTA02: S-Media interrupt disabled **\n"); ++ return -ENODEV; ++} ++ ++ ++static void ++gta02_glamo_mmc_set_power(unsigned char power_mode, unsigned short vdd) ++{ ++ int mv = 1650; ++ ++ printk(KERN_DEBUG "mmc_set_power(power_mode=%u, vdd=%u\n", ++ power_mode, vdd); ++ ++ switch (system_rev) { ++ case GTA02v1_SYSTEM_REV: ++ case GTA02v2_SYSTEM_REV: ++ break; ++ case GTA02v3_SYSTEM_REV: ++ case GTA02v4_SYSTEM_REV: ++ case GTA02v5_SYSTEM_REV: ++ case GTA02v6_SYSTEM_REV: ++ /* depend on pcf50633 driver init */ ++ if (!pcf50633_global) ++ while (!pcf50633_global) ++ msleep(10); ++ switch (power_mode) { ++ case MMC_POWER_ON: ++ case MMC_POWER_UP: ++ /* select and set the voltage */ ++ if (vdd > 7) { ++ mv += 300 + 100 * (vdd - 8); ++ if (mv > 3500) ++ mv = 3500; ++ } ++ pcf50633_voltage_set(pcf50633_global, ++ PCF50633_REGULATOR_HCLDO, mv); ++ msleep(10); ++ pcf50633_onoff_set(pcf50633_global, ++ PCF50633_REGULATOR_HCLDO, 1); ++ msleep(1); ++ break; ++ case MMC_POWER_OFF: ++ pcf50633_onoff_set(pcf50633_global, ++ PCF50633_REGULATOR_HCLDO, 0); ++ msleep(1); ++ break; ++ } ++ break; ++ } ++} ++ ++/* Smedia Glamo 3362 */ ++ ++static struct glamofb_platform_data gta02_glamo_pdata = { ++ .width = 43, ++ .height = 58, ++ /* 24.5MHz --> 40.816ns */ ++ .pixclock = 40816, ++ .left_margin = 8, ++ .right_margin = 16, ++ .upper_margin = 2, ++ .lower_margin = 16, ++ .hsync_len = 8, ++ .vsync_len = 2, ++ .fb_mem_size = 0x400000, /* glamo has 8 megs of SRAM. we use 4 */ ++ .xres = { ++ .min = 240, ++ .max = 640, ++ .defval = 480, ++ }, ++ .yres = { ++ .min = 320, ++ .max = 640, ++ .defval = 640, ++ }, ++ .bpp = { ++ .min = 16, ++ .max = 16, ++ .defval = 16, ++ }, ++ //.spi_info = &glamo_spi_cfg, ++ .spigpio_info = &glamo_spigpio_cfg, ++ ++ /* glamo MMC function platform data */ ++ .glamo_set_mci_power = gta02_glamo_mmc_set_power, ++ .glamo_irq_is_wired = glamo_irq_is_wired, ++}; ++ ++static struct resource gta02_glamo_resources[] = { ++ [0] = { ++ .start = S3C2410_CS1, ++ .end = S3C2410_CS1 + 0x1000000 - 1, ++ .flags = IORESOURCE_MEM, ++ }, ++ [1] = { ++ .start = GTA02_IRQ_3D, ++ .end = GTA02_IRQ_3D, ++ .flags = IORESOURCE_IRQ, ++ }, ++ [2] = { ++ .start = GTA02v1_GPIO_3D_RESET, ++ .end = GTA02v1_GPIO_3D_RESET, ++ }, ++}; ++ ++static struct platform_device gta02_glamo_dev = { ++ .name = "glamo3362", ++ .num_resources = ARRAY_SIZE(gta02_glamo_resources), ++ .resource = gta02_glamo_resources, ++ .dev = { ++ .platform_data = >a02_glamo_pdata, ++ }, ++}; ++ ++static void mangle_glamo_res_by_system_rev(void) ++{ ++ switch (system_rev) { ++ case GTA02v1_SYSTEM_REV: ++ break; ++ default: ++ gta02_glamo_resources[2].start = GTA02_GPIO_3D_RESET; ++ gta02_glamo_resources[2].end = GTA02_GPIO_3D_RESET; ++ break; ++ } ++ ++ switch (system_rev) { ++ case GTA02v1_SYSTEM_REV: ++ case GTA02v2_SYSTEM_REV: ++ case GTA02v3_SYSTEM_REV: ++ /* case GTA02v4_SYSTEM_REV: - FIXME: handle this later */ ++ /* The hardware is missing a pull-up resistor and thus can't ++ * support the Smedia Glamo IRQ */ ++ gta02_glamo_resources[1].start = 0; ++ gta02_glamo_resources[1].end = 0; ++ break; ++ } ++} ++ ++static void __init gta02_map_io(void) ++{ ++ s3c24xx_init_io(gta02_iodesc, ARRAY_SIZE(gta02_iodesc)); ++ s3c24xx_init_clocks(12000000); ++ s3c24xx_init_uarts(gta02_uartcfgs, ARRAY_SIZE(gta02_uartcfgs)); ++} ++ ++static irqreturn_t gta02_modem_irq(int irq, void *param) ++{ ++ printk(KERN_DEBUG "modem wakeup interrupt\n"); ++ return IRQ_HANDLED; ++} ++ ++static void __init gta02_machine_init(void) ++{ ++ int rc; ++ ++ s3c_device_usb.dev.platform_data = >a02_usb_info; ++ s3c_device_nand.dev.platform_data = >a02_nand_info; ++ s3c_device_sdi.dev.platform_data = >a02_mmc_cfg; ++ ++ /* Only GTA02v1 has a SD_DETECT GPIO. Since the slot is not ++ * hot-pluggable, this is not required anyway */ ++ switch (system_rev) { ++ case GTA02v1_SYSTEM_REV: ++ break; ++ default: ++ gta02_mmc_cfg.gpio_detect = 0; ++ break; ++ } ++ ++ INIT_WORK(>a02_udc_vbus_drawer.work, __gta02_udc_vbus_draw); ++ s3c24xx_udc_set_platdata(>a02_udc_cfg); ++ set_s3c2410ts_info(>a02_ts_cfg); ++ ++ /* FIXME: hardcoded WLAN module power-up */ ++ s3c2410_gpio_cfgpin(GTA02_CHIP_PWD, S3C2410_GPIO_OUTPUT); ++ ++ /* Power is down */ ++ s3c2410_gpio_setpin(GTA02_CHIP_PWD, 1); ++ mdelay(100); ++ ++ switch (system_rev) { ++ case GTA02v1_SYSTEM_REV: ++ s3c2410_gpio_setpin(GTA02_CHIP_PWD, 0); ++ break; ++ default: ++ s3c2410_gpio_cfgpin(GTA02_GPIO_nWLAN_RESET, S3C2410_GPIO_OUTPUT); ++ /* Chip is in reset state */ ++ s3c2410_gpio_setpin(GTA02_GPIO_nWLAN_RESET, 0); ++ mdelay(100); ++ /* Power is up */ ++ s3c2410_gpio_setpin(GTA02_CHIP_PWD, 0); ++ mdelay(100); ++ /* Chip is out of reset */ ++ s3c2410_gpio_setpin(GTA02_GPIO_nWLAN_RESET, 1); ++ break; ++ } ++ ++ platform_device_register(>a01_button_dev); ++ platform_device_register(>a01_pm_gsm_dev); ++ ++ mangle_pmu_pdata_by_system_rev(); ++ platform_device_register(>a02_pmu_dev); ++ platform_device_register(>a01_led_dev); ++ platform_device_register(>a02_led_dev); ++ ++ mangle_glamo_res_by_system_rev(); ++ platform_device_register(>a02_glamo_dev); ++ ++ platform_device_register(>a02_sdio_dev); ++ ++ platform_add_devices(gta02_devices, ARRAY_SIZE(gta02_devices)); ++ ++ s3c2410_pm_init(); ++ ++ /* Set LCD_RESET / XRES to high */ ++ s3c2410_gpio_cfgpin(GTA01_GPIO_LCD_RESET, S3C2410_GPIO_OUTPUT); ++ s3c2410_gpio_setpin(GTA01_GPIO_LCD_RESET, 1); ++ ++ /* Make sure the modem can wake us up */ ++ set_irq_type(GTA02_IRQ_MODEM, IRQT_RISING); ++ rc = request_irq(GTA02_IRQ_MODEM, gta02_modem_irq, IRQF_DISABLED, ++ "modem", NULL); ++ if (rc < 0) ++ printk(KERN_ERR "GTA02: can't request GSM modem wakeup IRQ\n"); ++ enable_irq_wake(GTA02_IRQ_MODEM); ++} ++ ++MACHINE_START(NEO1973_GTA02, "GTA02") ++ .phys_io = S3C2410_PA_UART, ++ .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, ++ .boot_params = S3C2410_SDRAM_PA + 0x100, ++ .map_io = gta02_map_io, ++ .init_irq = s3c24xx_init_irq, ++ .init_machine = gta02_machine_init, ++ .timer = &s3c24xx_timer, ++MACHINE_END +diff --git a/drivers/leds/leds-neo1973-vibrator.c b/drivers/leds/leds-neo1973-vibrator.c +index 0336e36..c943a6a 100644 +--- a/drivers/leds/leds-neo1973-vibrator.c ++++ b/drivers/leds/leds-neo1973-vibrator.c +@@ -113,7 +113,7 @@ static int __init neo1973_vib_probe(struct platform_device *pdev) + struct resource *r; + int rc; + +- if (!machine_is_neo1973_gta01()) ++ if (!machine_is_neo1973_gta01() && !machine_is_neo1973_gta02()) + return -EIO; + + r = platform_get_resource(pdev, 0, 0); +diff --git a/include/asm-arm/arch-s3c2410/gta02.h b/include/asm-arm/arch-s3c2410/gta02.h +new file mode 100644 +index 0000000..fa49d93 +--- /dev/null ++++ b/include/asm-arm/arch-s3c2410/gta02.h +@@ -0,0 +1,99 @@ ++#ifndef _GTA02_H ++#define _GTA02_H ++ ++#include ++#include ++ ++/* Different hardware revisions, passed in ATAG_REVISION by u-boot */ ++#define GTA02v1_SYSTEM_REV 0x00000310 ++#define GTA02v2_SYSTEM_REV 0x00000320 ++#define GTA02v3_SYSTEM_REV 0x00000330 ++#define GTA02v4_SYSTEM_REV 0x00000340 ++#define GTA02v5_SYSTEM_REV 0x00000350 ++#define GTA02v6_SYSTEM_REV 0x00000360 ++ ++#define GTA02_GPIO_n3DL_GSM S3C2410_GPA13 /* v1 + v2 + v3 only */ ++ ++#define GTA02_GPIO_PWR_LED1 S3C2410_GPB0 ++#define GTA02_GPIO_PWR_LED2 S3C2410_GPB1 ++#define GTA02_GPIO_AUX_LED S3C2410_GPB2 ++#define GTA02_GPIO_VIBRATOR_ON S3C2410_GPB3 ++#define GTA02v1_GPIO_GPS_PWRON S3C2410_GPB4 /* v1 only */ ++#define GTA02_GPIO_MODEM_RST S3C2410_GPB5 ++#define GTA02_GPIO_BT_EN S3C2410_GPB6 ++#define GTA02_GPIO_MODEM_ON S3C2410_GPB7 ++#define GTA02v1_GPIO_EN_AGPS3V S3C2410_GPB8 /* v1 only */ ++#define GTA02_GPIO_EXTINT8 S3C2410_GPB8 ++#define GTA02_GPIO_USB_PULLUP S3C2410_GPB9 ++ ++#define GTA02v1_GPIO_nGPS_RST S3C2410_GPC0 /* v1 only */ ++#define GTA02v12_GPIO_PIO3 S3C2410_GPC5 /* v1 + v2 only */ ++#define GTA02_GPIO_PIO5 S3C2410_GPC5 /* v3 + v4 only */ ++#define GTA02_GPIO_LCD_RESET S3C2410_GPC6 /* v1 + v2 only */ ++#define GTA02v12_GPIO_PIO2 S3C2410_GPC7 /* v1 + v2 only */ ++#define GTA02v2_nUSB_FLT S3C2410_GPC9 /* v2 only */ ++#define GTA02v2_nUSB_OC S3C2410_GPC10 /* v2 only */ ++#define GTA02v2_nGSM_OC S3C2410_GPC12 /* v2 only */ ++ ++#define GTA02v3_GPIO_nG1_CS S3C2410_GPD12 /* v3 + v4 only */ ++#define GTA02v3_GPIO_nG2_CS S3C2410_GPD13 /* v3 + v4 only */ ++ ++#define GTA02_GPIO_nG1_INT S3C2410_GPF0 ++#define GTA02_GPIO_IO1 S3C2410_GPF1 ++#define GTA02v1_GPIO_nG2_INT S3C2410_GPF2 /* v1 only */ ++#define GTA02_GPIO_PIO_2 S3C2410_GPF2 /* v2 + v3 + v4 only */ ++#define GTA02_GPIO_JACK_INSERT S3C2410_GPF4 ++#define GTA02v1_GPIO_nSD_DETECT S3C2410_GPF5 /* v1 only */ ++#define GTA02_GPIO_WLAN_GPIO1 S3C2410_GPF5 /* v2 + v3 + v4 only */ ++#define GTA02_GPIO_AUX_KEY S3C2410_GPF6 ++#define GTA02_GPIO_HOLD_KEY S3C2410_GPF7 ++ ++#define GTA02_GPIO_3D_IRQ S3C2410_GPG4 ++#define GTA02v1_GPIO_nG1_CS S3C2410_GPG8 /* v1 only */ ++#define GTA02v2_GPIO_nG2_INT S3C2410_GPG8 /* v2 + v3 + v4 only */ ++#define GTA02v3_GPIO_nUSB_OC S3C2410_GPG9 /* v3 + v4 only */ ++#define GTA02v3_GPIO_nUSB_FLT S3C2410_GPG10 /* v3 + v4 only */ ++#define GTA02v1_GPIO_nG2_CS S3C2410_GPG11 /* v1 only */ ++#define GTA02v3_GPIO_nGSM_OC S3C2410_GPG11 /* v3 + v4 only */ ++ ++#define GTA02v1_GPIO_3D_RESET S3C2440_GPJ0 /* v1 only */ ++#define GTA02v2_GPIO_BAT_ID S3C2440_GPJ0 /* v2 only */ ++#define GTA02v1_GPIO_WLAN_GPIO8 S3C2440_GPJ1 /* v1 only */ ++#define GTA02_GPIO_AMP_SHUT S3C2440_GPJ1 /* v2 + v3 + v4 only */ ++#define GTA02v1_GPIO_WLAN_GPIO10 S3C2440_GPJ2 ++#define GTA02_GPIO_HP_IN S3C2440_GPJ2 /* v2 + v3 + v4 only */ ++#define GTA02v1_GPIO_KEEPACT S3C2440_GPJ3 /* v1 only */ ++#define GTA02_GPIO_INT0 S3C2440_GPJ3 /* v2 + v3 + v4 only */ ++#define GTA02_GPIO_nGSM_EN S3C2440_GPJ4 ++#define GTA02_GPIO_3D_RESET S3C2440_GPJ5 ++#define GTA02_GPIO_nDL_GSM S3C2440_GPJ6 /* v4 + v5 only */ ++#define GTA02_GPIO_WLAN_GPIO0 S3C2440_GPJ7 ++#define GTA02v1_GPIO_BAT_ID S3C2440_GPJ8 ++#define GTA02_GPIO_KEEPACT S3C2440_GPJ8 ++#define GTA02v1_GPIO_AMP_SHUT S3C2440_GPJ9 /* v1 only */ ++#define GTA02v2_nG1_CS S3C2440_GPJ9 /* v2 only */ ++#define GTA02v1_GPIO_HP_IN S3C2440_GPJ10 ++#define GTA02v2_nG2_CS S3C2440_GPJ10 /* v2 only */ ++#define GTA02v1_GPIO_INT0 S3C2440_GPJ11 /* v1 only */ ++#define GTA02_CHIP_PWD S3C2440_GPJ11 /* v2 + v3 + v4 only */ ++#define GTA02v1_GPIO_nGSM_EN S3C2440_GPJ12 /* v1 only */ ++#define GTA02_GPIO_nWLAN_RESET S3C2440_GPJ12 /* v2 + v3 + v4 only */ ++ ++#define GTA02_IRQ_GSENSOR_1 IRQ_EINT0 ++#define GTA02_IRQ_MODEM IRQ_EINT1 ++#define GTA02v1_IRQ_GSENSOR_2 IRQ_EINT2 /* v1 only */ ++#define GTA02_IRQ_PIO_2 IRQ_EINT2 /* v2 + v3 + v4 only */ ++#define GTA02_IRQ_nJACK_INSERT IRQ_EINT4 ++#define GTA02v1_IRQ_nSD_CD IRQ_EINT5 /* v1 only */ ++#define GTA02_IRQ_WLAN_GPIO1 IRQ_EINT5 ++#define GTA02_IRQ_AUX IRQ_EINT6 ++#define GTA02_IRQ_nHOLD IRQ_EINT7 ++#define GTA02v1_IRQ_nSIM_CD IRQ_EINT8 /* v1 only */ ++#define GTA02_IRQ_PCF50633 IRQ_EINT9 ++#define GTA02_IRQ_3D IRQ_EINT12 ++#define GTA02_IRQ_GSENSOR_2 IRQ_EINT16 /* v2 + v3 + v4 only */ ++#define GTA02v3_IRQ_nUSB_OC IRQ_EINT17 /* v3 + v4 only */ ++#define GTA02v3_IRQ_nUSB_FLT IRQ_EINT18 /* v3 + v4 only */ ++#define GTA02v3_IRQ_nGSM_OC IRQ_EINT19 /* v3 + v4 only */ ++ ++#endif /* _GTA02_H */ +diff --git a/sound/soc/s3c24xx/neo1973_wm8753.c b/sound/soc/s3c24xx/neo1973_wm8753.c +index 0289d1d..65a4060 100644 +--- a/sound/soc/s3c24xx/neo1973_wm8753.c ++++ b/sound/soc/s3c24xx/neo1973_wm8753.c +@@ -672,6 +672,12 @@ static int __init neo1973_init(void) + { + int ret; + ++ if (!machine_is_neo1973_gta01()) { ++ printk(KERN_INFO ++ "Only GTA01 hardware supported by ASoc driver\n"); ++ return -ENODEV; ++ } ++ + neo1973_snd_device = platform_device_alloc("soc-audio", -1); + if (!neo1973_snd_device) + return -ENOMEM; +@@ -700,5 +706,5 @@ module_exit(neo1973_exit); + + /* Module information */ + MODULE_AUTHOR("Graeme Gregory, graeme.gregory@wolfsonmicro.com, www.wolfsonmicro.com"); +-MODULE_DESCRIPTION("ALSA SoC WM8753 Neo1973"); ++MODULE_DESCRIPTION("ALSA SoC WM8753 Neo1973 GTA01"); + MODULE_LICENSE("GPL"); +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1036-gta02-power_control.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1036-gta02-power_control.patch.patch new file mode 100644 index 0000000000..b59cb64ef1 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1036-gta02-power_control.patch.patch @@ -0,0 +1,586 @@ +From a9206f415e86249bfecccd8b6dd86ab9ee362e07 Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:35:24 +0100 +Subject: [PATCH] gta02-power_control.patch + +--- + arch/arm/plat-s3c24xx/neo1973_pm_bt.c | 84 +++++++++--- + arch/arm/plat-s3c24xx/neo1973_pm_gps.c | 217 ++++++++++++++++++++++++-------- + arch/arm/plat-s3c24xx/neo1973_pm_gsm.c | 97 ++++++++++++-- + 3 files changed, 309 insertions(+), 89 deletions(-) + +diff --git a/arch/arm/plat-s3c24xx/neo1973_pm_bt.c b/arch/arm/plat-s3c24xx/neo1973_pm_bt.c +index b1af441..d685ef7 100644 +--- a/arch/arm/plat-s3c24xx/neo1973_pm_bt.c ++++ b/arch/arm/plat-s3c24xx/neo1973_pm_bt.c +@@ -19,7 +19,9 @@ + #include + + #include ++#include + #include ++#include + + #define DRVMSG "FIC Neo1973 Bluetooth Power Management" + +@@ -27,14 +29,30 @@ static ssize_t bt_read(struct device *dev, struct device_attribute *attr, + char *buf) + { + if (!strcmp(attr->attr.name, "power_on")) { +- if (pcf50606_onoff_get(pcf50606_global, +- PCF50606_REGULATOR_D1REG) && +- pcf50606_voltage_get(pcf50606_global, +- PCF50606_REGULATOR_D1REG) == 3100) +- goto out_1; ++ switch (machine_arch_type) { ++ case MACH_TYPE_NEO1973_GTA01: ++ if (pcf50606_onoff_get(pcf50606_global, ++ PCF50606_REGULATOR_D1REG) && ++ pcf50606_voltage_get(pcf50606_global, ++ PCF50606_REGULATOR_D1REG) == 3100) ++ goto out_1; ++ break; ++ case MACH_TYPE_NEO1973_GTA02: ++ if (s3c2410_gpio_getpin(GTA02_GPIO_BT_EN)) ++ goto out_1; ++ break; ++ } + } else if (!strcmp(attr->attr.name, "reset")) { +- if (s3c2410_gpio_getpin(GTA01_GPIO_BT_EN) == 0) +- goto out_1; ++ switch (machine_arch_type) { ++ case MACH_TYPE_NEO1973_GTA01: ++ if (s3c2410_gpio_getpin(GTA01_GPIO_BT_EN) == 0) ++ goto out_1; ++ break; ++ case MACH_TYPE_NEO1973_GTA02: ++ if (s3c2410_gpio_getpin(GTA02_GPIO_BT_EN) == 0) ++ goto out_1; ++ break; ++ } + } + + return strlcpy(buf, "0\n", 3); +@@ -48,20 +66,37 @@ static ssize_t bt_write(struct device *dev, struct device_attribute *attr, + unsigned long on = simple_strtoul(buf, NULL, 10); + + if (!strcmp(attr->attr.name, "power_on")) { +- /* if we are powering up, assert reset, then power, then +- * release reset */ +- if (on) { +- s3c2410_gpio_setpin(GTA01_GPIO_BT_EN, 0); +- pcf50606_voltage_set(pcf50606_global, +- PCF50606_REGULATOR_D1REG, +- 3100); ++ switch (machine_arch_type) { ++ case MACH_TYPE_NEO1973_GTA01: ++ /* if we are powering up, assert reset, then power, ++ * then release reset */ ++ if (on) { ++ s3c2410_gpio_setpin(GTA01_GPIO_BT_EN, 0); ++ pcf50606_voltage_set(pcf50606_global, ++ PCF50606_REGULATOR_D1REG, ++ 3100); ++ } ++ pcf50606_onoff_set(pcf50606_global, ++ PCF50606_REGULATOR_D1REG, on); ++ s3c2410_gpio_setpin(GTA01_GPIO_BT_EN, on); ++ break; ++ case MACH_TYPE_NEO1973_GTA02: ++ if (on) ++ s3c2410_gpio_setpin(GTA02_GPIO_BT_EN, 0); ++ else ++ s3c2410_gpio_setpin(GTA02_GPIO_BT_EN, 1); ++ break; + } +- pcf50606_onoff_set(pcf50606_global, +- PCF50606_REGULATOR_D1REG, on); +- s3c2410_gpio_setpin(GTA01_GPIO_BT_EN, on); + } else if (!strcmp(attr->attr.name, "reset")) { + /* reset is low-active, so we need to invert */ +- s3c2410_gpio_setpin(GTA01_GPIO_BT_EN, on ? 0 : 1); ++ switch (machine_arch_type) { ++ case MACH_TYPE_NEO1973_GTA01: ++ s3c2410_gpio_setpin(GTA01_GPIO_BT_EN, on ? 0 : 1); ++ break; ++ case MACH_TYPE_NEO1973_GTA02: ++ s3c2410_gpio_setpin(GTA02_GPIO_BT_EN, on ? 0 : 1); ++ break; ++ } + } + + return count; +@@ -107,9 +142,16 @@ static int __init gta01_bt_probe(struct platform_device *pdev) + { + dev_info(&pdev->dev, DRVMSG ": starting\n"); + +- /* we make sure that the voltage is off */ +- pcf50606_onoff_set(pcf50606_global, +- PCF50606_REGULATOR_D1REG, 0); ++ switch (machine_arch_type) { ++ case MACH_TYPE_NEO1973_GTA01: ++ /* we make sure that the voltage is off */ ++ pcf50606_onoff_set(pcf50606_global, ++ PCF50606_REGULATOR_D1REG, 0); ++ break; ++ case MACH_TYPE_NEO1973_GTA02: ++ /* FIXME: implementation */ ++ break; ++ } + /* we pull reset to low to make sure that the chip doesn't + * drain power through the reset line */ + s3c2410_gpio_setpin(GTA01_GPIO_BT_EN, 0); +diff --git a/arch/arm/plat-s3c24xx/neo1973_pm_gps.c b/arch/arm/plat-s3c24xx/neo1973_pm_gps.c +index f8cf719..6bd8054 100644 +--- a/arch/arm/plat-s3c24xx/neo1973_pm_gps.c ++++ b/arch/arm/plat-s3c24xx/neo1973_pm_gps.c +@@ -17,10 +17,18 @@ + #include + #include + +-#include +- + #include ++ ++#include ++#ifdef CONFIG_MACH_NEO1973_GTA01 + #include ++#include ++#endif ++ ++#ifdef CONFIG_MACH_NEO1973_GTA02 ++#include ++#include ++#endif + + /* This is the 2.8V supply for the RTC crystal, the mail clock crystal and + * the input to VDD_RF */ +@@ -248,15 +256,42 @@ static int gps_power_1v5_get(void) + /* This is the POWERON pin */ + static void gps_pwron_set(int on) + { +- s3c2410_gpio_setpin(GTA01_GPIO_GPS_PWRON, on); ++#ifdef CONFIG_MACH_NEO1973_GTA01 ++ if (machine_is_neo1973_gta01()) ++ s3c2410_gpio_setpin(GTA01_GPIO_GPS_PWRON, on); ++#endif /* CONFIG_MACH_NEO1973_GTA01 */ ++ ++#ifdef CONFIG_MACH_NEO1973_GTA02 ++ if (machine_is_neo1973_gta02()) { ++ if (on) ++ pcf50633_voltage_set(pcf50633_global, ++ PCF50633_REGULATOR_LDO5, 3000); ++ pcf50633_onoff_set(pcf50633_global, ++ PCF50633_REGULATOR_LDO5, on); ++ } ++#endif /* CONFIG_MACH_NEO1973_GTA02 */ + } + + static int gps_pwron_get(void) + { +- if (s3c2410_gpio_getpin(GTA01_GPIO_GPS_PWRON)) +- return 1; +- else +- return 0; ++#ifdef CONFIG_MACH_NEO1973_GTA01 ++ if (machine_is_neo1973_gta01()) { ++ if (s3c2410_gpio_getpin(GTA01_GPIO_GPS_PWRON)) ++ return 1; ++ else ++ return 0; ++ } ++#endif /* CONFIG_MACH_NEO1973_GTA01 */ ++ ++#ifdef CONFIG_MACH_NEO1973_GTA02 ++ if (machine_is_neo1973_gta02()) { ++ if (pcf50633_onoff_get(pcf50633_global, PCF50633_REGULATOR_LDO5)) ++ return 1; ++ else ++ return 0; ++ } ++#endif /* CONFIG_MACH_NEO1973_GTA02 */ ++ return -1; + } + + /* This is the nRESET pin */ +@@ -441,17 +476,40 @@ static DEVICE_ATTR(power_sequence, 0644, power_sequence_read, + static int gta01_pm_gps_suspend(struct platform_device *pdev, + pm_message_t state) + { +- /* FIXME */ +- gps_power_sequence_down(); ++#ifdef CONFIG_MACH_NEO1973_GTA01 ++ if (machine_is_neo1973_gta01()) { ++ /* FIXME */ ++ gps_power_sequence_down(); ++ } ++#endif /* CONFIG_MACH_NEO1973_GTA01 */ ++ ++#ifdef CONFIG_MACH_NEO1973_GTA02 ++ if (machine_is_neo1973_gta02()) { ++ /* FIXME */ ++ pcf50633_onoff_set(pcf50633_global, ++ PCF50633_REGULATOR_LDO5, 0); ++ } ++#endif /* CONFIG_MACH_NEO1973_GTA02 */ + + return 0; + } + + static int gta01_pm_gps_resume(struct platform_device *pdev) + { +- /* FIXME */ +- gps_power_sequence_up(); +- ++#ifdef CONFIG_MACH_NEO1973_GTA01 ++ if (machine_is_neo1973_gta01()) { ++ /* FIXME */ ++ gps_power_sequence_up(); ++ } ++#endif /* CONFIG_MACH_NEO1973_GTA01 */ ++ ++#ifdef CONFIG_MACH_NEO1973_GTA02 ++ if (machine_is_neo1973_gta02()) { ++ /* FIXME */ ++ pcf50633_onoff_set(pcf50633_global, ++ PCF50633_REGULATOR_LDO5, 1); ++#endif /* CONFIG_MACH_NEO1973_GTA02 */ ++ } + return 0; + } + #else +@@ -476,59 +534,110 @@ static struct attribute_group gta01_gps_attr_group = { + .attrs = gta01_gps_sysfs_entries, + }; + ++static struct attribute *gta02_gps_sysfs_entries[] = { ++ &dev_attr_pwron.attr, ++ NULL ++}; ++ ++static struct attribute_group gta02_gps_attr_group = { ++ .name = NULL, ++ .attrs = gta02_gps_sysfs_entries, ++}; ++ + static int __init gta01_pm_gps_probe(struct platform_device *pdev) + { +- s3c2410_gpio_cfgpin(GTA01_GPIO_GPS_PWRON, S3C2410_GPIO_OUTPUT); ++#ifdef CONFIG_MACH_NEO1973_GTA01 ++ if (machine_is_neo1973_gta01()) { ++ s3c2410_gpio_cfgpin(GTA01_GPIO_GPS_PWRON, S3C2410_GPIO_OUTPUT); + +- switch (system_rev) { +- case GTA01v3_SYSTEM_REV: +- break; +- case GTA01v4_SYSTEM_REV: +- s3c2410_gpio_cfgpin(GTA01_GPIO_GPS_RESET, S3C2410_GPIO_OUTPUT); +- break; +- case GTA01Bv3_SYSTEM_REV: +- case GTA01Bv4_SYSTEM_REV: +- s3c2410_gpio_cfgpin(GTA01_GPIO_GPS_EN_3V3, S3C2410_GPIO_OUTPUT); +- /* fallthrough */ +- case GTA01Bv2_SYSTEM_REV: +- s3c2410_gpio_cfgpin(GTA01_GPIO_GPS_EN_2V8, S3C2410_GPIO_OUTPUT); +- s3c2410_gpio_cfgpin(GTA01_GPIO_GPS_EN_3V, S3C2410_GPIO_OUTPUT); +- s3c2410_gpio_cfgpin(GTA01_GPIO_GPS_RESET, S3C2410_GPIO_OUTPUT); +- break; +- default: +- dev_warn(&pdev->dev, "Unknown GTA01 Revision 0x%x, " +- "AGPS PM features not available!!!\n", +- system_rev); +- return -1; +- break; +- } ++ switch (system_rev) { ++ case GTA01v3_SYSTEM_REV: ++ break; ++ case GTA01v4_SYSTEM_REV: ++ s3c2410_gpio_cfgpin(GTA01_GPIO_GPS_RESET, S3C2410_GPIO_OUTPUT); ++ break; ++ case GTA01Bv3_SYSTEM_REV: ++ case GTA01Bv4_SYSTEM_REV: ++ s3c2410_gpio_cfgpin(GTA01_GPIO_GPS_EN_3V3, S3C2410_GPIO_OUTPUT); ++ /* fallthrough */ ++ case GTA01Bv2_SYSTEM_REV: ++ s3c2410_gpio_cfgpin(GTA01_GPIO_GPS_EN_2V8, S3C2410_GPIO_OUTPUT); ++ s3c2410_gpio_cfgpin(GTA01_GPIO_GPS_EN_3V, S3C2410_GPIO_OUTPUT); ++ s3c2410_gpio_cfgpin(GTA01_GPIO_GPS_RESET, S3C2410_GPIO_OUTPUT); ++ break; ++ default: ++ dev_warn(&pdev->dev, "Unknown GTA01 Revision 0x%x, " ++ "AGPS PM features not available!!!\n", ++ system_rev); ++ return -1; ++ break; ++ } + +- gps_power_sequence_down(); ++ gps_power_sequence_down(); + +- switch (system_rev) { +- case GTA01v3_SYSTEM_REV: +- case GTA01v4_SYSTEM_REV: +- case GTA01Bv2_SYSTEM_REV: +- gta01_gps_sysfs_entries[ARRAY_SIZE(gta01_gps_sysfs_entries)-3] = +- &dev_attr_power_tcxo_2v8.attr; +- break; +- case GTA01Bv3_SYSTEM_REV: +- case GTA01Bv4_SYSTEM_REV: +- gta01_gps_sysfs_entries[ARRAY_SIZE(gta01_gps_sysfs_entries)-3] = +- &dev_attr_power_core_1v5.attr; +- gta01_gps_sysfs_entries[ARRAY_SIZE(gta01_gps_sysfs_entries)-2] = +- &dev_attr_power_vdd_core_1v5.attr; +- break; +- } ++ switch (system_rev) { ++ case GTA01v3_SYSTEM_REV: ++ case GTA01v4_SYSTEM_REV: ++ case GTA01Bv2_SYSTEM_REV: ++ gta01_gps_sysfs_entries[ARRAY_SIZE(gta01_gps_sysfs_entries)-3] = ++ &dev_attr_power_tcxo_2v8.attr; ++ break; ++ case GTA01Bv3_SYSTEM_REV: ++ case GTA01Bv4_SYSTEM_REV: ++ gta01_gps_sysfs_entries[ARRAY_SIZE(gta01_gps_sysfs_entries)-3] = ++ &dev_attr_power_core_1v5.attr; ++ gta01_gps_sysfs_entries[ARRAY_SIZE(gta01_gps_sysfs_entries)-2] = ++ &dev_attr_power_vdd_core_1v5.attr; ++ break; ++ } + +- return sysfs_create_group(&pdev->dev.kobj, >a01_gps_attr_group); ++ return sysfs_create_group(&pdev->dev.kobj, >a01_gps_attr_group); ++ } ++#endif /* CONFIG_MACH_NEO1973_GTA01 */ ++ ++#ifdef CONFIG_MACH_NEO1973_GTA02 ++ if (machine_is_neo1973_gta02()) { ++ switch (system_rev) { ++ case GTA02v2_SYSTEM_REV: ++ case GTA02v3_SYSTEM_REV: ++ case GTA02v4_SYSTEM_REV: ++ case GTA02v5_SYSTEM_REV: ++ case GTA02v6_SYSTEM_REV: ++ pcf50633_voltage_set(pcf50633_global, ++ PCF50633_REGULATOR_LDO5, 3000); ++ pcf50633_onoff_set(pcf50633_global, ++ PCF50633_REGULATOR_LDO5, 0); ++ dev_info(&pdev->dev, "FIC Neo1973 GPS Power Managerment:" ++ "starting\n"); ++ break; ++ default: ++ dev_warn(&pdev->dev, "Unknown GTA02 Revision 0x%x, " ++ "AGPS PM features not available!!!\n", ++ system_rev); ++ return -1; ++ break; ++ } ++ return sysfs_create_group(&pdev->dev.kobj, >a02_gps_attr_group); ++ } ++#endif /* CONFIG_MACH_NEO1973_GTA02 */ ++ return -1; + } + + static int gta01_pm_gps_remove(struct platform_device *pdev) + { +- gps_power_sequence_down(); +- sysfs_remove_group(&pdev->dev.kobj, >a01_gps_attr_group); ++#ifdef CONFIG_MACH_NEO1973_GTA01 ++ if (machine_is_neo1973_gta01()) { ++ gps_power_sequence_down(); ++ sysfs_remove_group(&pdev->dev.kobj, >a01_gps_attr_group); ++ } ++#endif /* CONFIG_MACH_NEO1973_GTA01 */ + ++#ifdef CONFIG_MACH_NEO1973_GTA02 ++ if (machine_is_neo1973_gta02()) { ++ pcf50633_onoff_set(pcf50633_global, PCF50633_REGULATOR_LDO5, 0); ++ sysfs_remove_group(&pdev->dev.kobj, >a02_gps_attr_group); ++ } ++#endif /* CONFIG_MACH_NEO1973_GTA02 */ + return 0; + } + +diff --git a/arch/arm/plat-s3c24xx/neo1973_pm_gsm.c b/arch/arm/plat-s3c24xx/neo1973_pm_gsm.c +index a1615f8..13cb45b 100644 +--- a/arch/arm/plat-s3c24xx/neo1973_pm_gsm.c ++++ b/arch/arm/plat-s3c24xx/neo1973_pm_gsm.c +@@ -19,8 +19,15 @@ + #include + + #include ++#include + #include + ++#ifdef CONFIG_MACH_NEO1973_GTA02 ++#include ++#include ++#include ++#endif ++ + struct gta01pm_priv { + int gpio_ngsm_en; + struct console *con; +@@ -54,8 +61,16 @@ static ssize_t gsm_read(struct device *dev, struct device_attribute *attr, + if (s3c2410_gpio_getpin(GTA01_GPIO_MODEM_RST)) + goto out_1; + } else if (!strcmp(attr->attr.name, "download")) { +- if (s3c2410_gpio_getpin(GTA01_GPIO_MODEM_DNLOAD)) +- goto out_1; ++#ifdef CONFIG_MACH_NEO1973_GTA01 ++ if (machine_is_neo1973_gta01()) ++ if (s3c2410_gpio_getpin(GTA01_GPIO_MODEM_DNLOAD)) ++ goto out_1; ++#endif ++#ifdef CONFIG_MACH_NEO1973_GTA02 ++ if (machine_is_neo1973_gta02()) ++ if (s3c2410_gpio_getpin(GTA02_GPIO_nDL_GSM)) ++ goto out_1; ++#endif + } + + return strlcpy(buf, "0\n", 3); +@@ -70,32 +85,67 @@ static ssize_t gsm_write(struct device *dev, struct device_attribute *attr, + + if (!strcmp(attr->attr.name, "power_on")) { + if (on) { +- dev_info(dev, "powering up GSM, thus disconnecting " +- "serial console\n"); ++ if (gta01_gsm.con) { ++ dev_info(dev, "powering up GSM, thus " ++ "disconnecting serial console\n"); + +- if (gta01_gsm.con) + console_stop(gta01_gsm.con); ++ } + + if (gta01_gsm.gpio_ngsm_en) + s3c2410_gpio_setpin(gta01_gsm.gpio_ngsm_en, 0); + ++ switch (system_rev) { ++#ifdef CONFIG_MACH_NEO1973_GTA02 ++ case GTA02v2_SYSTEM_REV: ++ case GTA02v3_SYSTEM_REV: ++ case GTA02v4_SYSTEM_REV: ++ case GTA02v5_SYSTEM_REV: ++ case GTA02v6_SYSTEM_REV: ++ pcf50633_gpio_set(pcf50633_global, ++ PCF50633_GPIO2, 1); ++ break; ++#endif ++ } ++ + s3c2410_gpio_setpin(GTA01_GPIO_MODEM_ON, 1); + } else { + s3c2410_gpio_setpin(GTA01_GPIO_MODEM_ON, 0); + ++ switch (system_rev) { ++#ifdef CONFIG_MACH_NEO1973_GTA02 ++ case GTA02v2_SYSTEM_REV: ++ case GTA02v3_SYSTEM_REV: ++ case GTA02v4_SYSTEM_REV: ++ case GTA02v5_SYSTEM_REV: ++ case GTA02v6_SYSTEM_REV: ++ pcf50633_gpio_set(pcf50633_global, ++ PCF50633_GPIO2, 0); ++ break; ++#endif ++ } ++ + if (gta01_gsm.gpio_ngsm_en) + s3c2410_gpio_setpin(gta01_gsm.gpio_ngsm_en, 1); + +- if (gta01_gsm.con) ++ if (gta01_gsm.con) { + console_start(gta01_gsm.con); + +- dev_info(dev, "powered down GSM, thus enabling " +- "serial console\n"); ++ dev_info(dev, "powered down GSM, thus enabling " ++ "serial console\n"); ++ } + } + } else if (!strcmp(attr->attr.name, "reset")) { + s3c2410_gpio_setpin(GTA01_GPIO_MODEM_RST, on); + } else if (!strcmp(attr->attr.name, "download")) { +- s3c2410_gpio_setpin(GTA01_GPIO_MODEM_DNLOAD, on); ++#ifdef CONFIG_MACH_NEO1973_GTA01 ++ if (machine_is_neo1973_gta01()) ++ s3c2410_gpio_setpin(GTA01_GPIO_MODEM_DNLOAD, on); ++#endif ++#ifdef CONFIG_MACH_NEO1973_GTA02 ++ if (machine_is_neo1973_gta02()) ++ s3c2410_gpio_setpin(GTA02_GPIO_nDL_GSM, on); ++#endif + } + + return count; +@@ -111,6 +161,9 @@ static int gta01_gsm_suspend(struct platform_device *pdev, pm_message_t state) + /* GPIO state is saved/restored by S3C2410 core GPIO driver, so we + * don't need to do anything here */ + ++ /* disable DL GSM to prevent jack_insert becoming flaoting */ ++ if (machine_is_neo1973_gta02()) ++ s3c2410_gpio_setpin(GTA02_GPIO_nDL_GSM, 1); + return 0; + } + +@@ -124,6 +177,8 @@ static int gta01_gsm_resume(struct platform_device *pdev) + if (s3c2410_gpio_getpin(GTA01_GPIO_MODEM_ON) && gta01_gsm.con) + console_stop(gta01_gsm.con); + ++ if (machine_is_neo1973_gta02()) ++ s3c2410_gpio_setpin(GTA02_GPIO_nDL_GSM, 0); + return 0; + } + #else +@@ -134,7 +189,7 @@ static int gta01_gsm_resume(struct platform_device *pdev) + static struct attribute *gta01_gsm_sysfs_entries[] = { + &dev_attr_power_on.attr, + &dev_attr_reset.attr, +- NULL, ++ &dev_attr_download.attr, + NULL + }; + +@@ -158,8 +213,18 @@ static int __init gta01_gsm_probe(struct platform_device *pdev) + gta01_gsm.gpio_ngsm_en = GTA01Bv2_GPIO_nGSM_EN; + s3c2410_gpio_setpin(GTA01v3_GPIO_nGSM_EN, 0); + break; ++#ifdef CONFIG_MACH_NEO1973_GTA02 ++ case GTA02v1_SYSTEM_REV: ++ case GTA02v2_SYSTEM_REV: ++ case GTA02v3_SYSTEM_REV: ++ case GTA02v4_SYSTEM_REV: ++ case GTA02v5_SYSTEM_REV: ++ case GTA02v6_SYSTEM_REV: ++ gta01_gsm.gpio_ngsm_en = 0; ++ break; ++#endif + default: +- dev_warn(&pdev->dev, "Unknown GTA01 Revision 0x%x, " ++ dev_warn(&pdev->dev, "Unknown Neo1973 Revision 0x%x, " + "some PM features not available!!!\n", + system_rev); + break; +@@ -175,9 +240,13 @@ static int __init gta01_gsm_probe(struct platform_device *pdev) + break; + } + +- gta01_gsm.con = find_s3c24xx_console(); +- if (!gta01_gsm.con) +- dev_warn(&pdev->dev, "cannot find S3C24xx console driver\n"); ++ if (machine_is_neo1973_gta01()) { ++ gta01_gsm.con = find_s3c24xx_console(); ++ if (!gta01_gsm.con) ++ dev_warn(&pdev->dev, ++ "cannot find S3C24xx console driver\n"); ++ } else ++ gta01_gsm.con = NULL; + + return sysfs_create_group(&pdev->dev.kobj, >a01_gsm_attr_group); + } +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1037-gta02-sound.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1037-gta02-sound.patch.patch new file mode 100644 index 0000000000..b1721e7516 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1037-gta02-sound.patch.patch @@ -0,0 +1,772 @@ +From c7b72aecf04a0a51e04f7d9346757c7068e0a74d Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:35:32 +0100 +Subject: [PATCH] gta02-sound.patch + +--- + include/sound/soc-dapm.h | 2 + + sound/soc/s3c24xx/Kconfig | 9 + + sound/soc/s3c24xx/Makefile | 3 + + sound/soc/s3c24xx/neo1973_gta02_wm8753.c | 667 ++++++++++++++++++++++++++++++ + sound/soc/soc-dapm.c | 24 ++ + 5 files changed, 705 insertions(+), 0 deletions(-) + create mode 100644 sound/soc/s3c24xx/neo1973_gta02_wm8753.c + +diff --git a/include/sound/soc-dapm.h b/include/sound/soc-dapm.h +index 2b1ae8e..204be0b 100644 +--- a/include/sound/soc-dapm.h ++++ b/include/sound/soc-dapm.h +@@ -206,6 +206,8 @@ int snd_soc_dapm_sys_add(struct device *dev); + /* dapm audio endpoint control */ + int snd_soc_dapm_set_endpoint(struct snd_soc_codec *codec, + char *pin, int status); ++int snd_soc_dapm_get_endpoint(struct snd_soc_codec *codec, ++ char *pin); + int snd_soc_dapm_sync_endpoints(struct snd_soc_codec *codec); + + /* dapm widget types */ +diff --git a/sound/soc/s3c24xx/Kconfig b/sound/soc/s3c24xx/Kconfig +index 5632a2e..4146ac4 100644 +--- a/sound/soc/s3c24xx/Kconfig ++++ b/sound/soc/s3c24xx/Kconfig +@@ -25,6 +25,15 @@ config SND_S3C24XX_SOC_NEO1973_WM8753 + Say Y if you want to add support for SoC audio on smdk2440 + with the WM8753. + ++config SND_S3C24XX_SOC_NEO1973_GTA02_WM8753 ++ tristate "SoC I2S Audio support for NEO1973 GTA02 - WM8753" ++ depends on SND_S3C24XX_SOC && MACH_NEO1973_GTA02 ++ select SND_S3C24XX_SOC_I2S ++ select SND_SOC_WM8753 ++ help ++ Say Y if you want to add support for SoC audio on neo1973 gta02 ++ with the WM8753 codec ++ + config SND_S3C24XX_SOC_SMDK2443_WM9710 + tristate "SoC AC97 Audio support for SMDK2443 - WM9710" + depends on SND_S3C24XX_SOC && MACH_SMDK2443 +diff --git a/sound/soc/s3c24xx/Makefile b/sound/soc/s3c24xx/Makefile +index 13c92f0..e356071 100644 +--- a/sound/soc/s3c24xx/Makefile ++++ b/sound/soc/s3c24xx/Makefile +@@ -10,6 +10,9 @@ obj-$(CONFIG_SND_S3C2443_SOC_AC97) += snd-soc-s3c2443-ac97.o + # S3C24XX Machine Support + snd-soc-neo1973-wm8753-objs := neo1973_wm8753.o + snd-soc-smdk2443-wm9710-objs := smdk2443_wm9710.o ++snd-soc-neo1973-gta02-wm8753-objs := neo1973_gta02_wm8753.o + + obj-$(CONFIG_SND_S3C24XX_SOC_NEO1973_WM8753) += snd-soc-neo1973-wm8753.o + obj-$(CONFIG_SND_S3C24XX_SOC_SMDK2443_WM9710) += snd-soc-smdk2443-wm9710.o ++obj-$(CONFIG_SND_S3C24XX_SOC_NEO1973_GTA02_WM8753) += snd-soc-neo1973-gta02-wm8753.o ++ +diff --git a/sound/soc/s3c24xx/neo1973_gta02_wm8753.c b/sound/soc/s3c24xx/neo1973_gta02_wm8753.c +new file mode 100644 +index 0000000..f32cba3 +--- /dev/null ++++ b/sound/soc/s3c24xx/neo1973_gta02_wm8753.c +@@ -0,0 +1,667 @@ ++/* ++ * neo1973_gta02_wm8753.c -- SoC audio for Neo1973 ++ * ++ * Copyright 2007 OpenMoko Inc ++ * Author: Graeme Gregory ++ * Copyright 2007 Wolfson Microelectronics PLC. ++ * Author: Graeme Gregory ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License as published by the ++ * Free Software Foundation; either version 2 of the License, or (at your ++ * option) any later version. ++ * ++ * Revision history ++ * 06th Nov 2007 Changed from GTA01 to GTA02 ++ * 20th Jan 2007 Initial version. ++ * 05th Feb 2007 Rename all to Neo1973 ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "../codecs/wm8753.h" ++#include "s3c24xx-pcm.h" ++#include "s3c24xx-i2s.h" ++ ++/* define the scenarios */ ++#define NEO_AUDIO_OFF 0 ++#define NEO_GSM_CALL_AUDIO_HANDSET 1 ++#define NEO_GSM_CALL_AUDIO_HEADSET 2 ++#define NEO_GSM_CALL_AUDIO_BLUETOOTH 3 ++#define NEO_STEREO_TO_SPEAKERS 4 ++#define NEO_STEREO_TO_HEADPHONES 5 ++#define NEO_CAPTURE_HANDSET 6 ++#define NEO_CAPTURE_HEADSET 7 ++#define NEO_CAPTURE_BLUETOOTH 8 ++#define NEO_STEREO_TO_HANDSET_SPK 9 ++ ++static struct snd_soc_machine neo1973_gta02; ++ ++static int neo1973_gta02_hifi_hw_params(struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *params) ++{ ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct snd_soc_codec_dai *codec_dai = rtd->dai->codec_dai; ++ struct snd_soc_cpu_dai *cpu_dai = rtd->dai->cpu_dai; ++ unsigned int pll_out = 0, bclk = 0; ++ int ret = 0; ++ unsigned long iis_clkrate; ++ ++ iis_clkrate = s3c24xx_i2s_get_clockrate(); ++ ++ switch (params_rate(params)) { ++ case 8000: ++ case 16000: ++ pll_out = 12288000; ++ break; ++ case 48000: ++ bclk = WM8753_BCLK_DIV_4; ++ pll_out = 12288000; ++ break; ++ case 96000: ++ bclk = WM8753_BCLK_DIV_2; ++ pll_out = 12288000; ++ break; ++ case 11025: ++ bclk = WM8753_BCLK_DIV_16; ++ pll_out = 11289600; ++ break; ++ case 22050: ++ bclk = WM8753_BCLK_DIV_8; ++ pll_out = 11289600; ++ break; ++ case 44100: ++ bclk = WM8753_BCLK_DIV_4; ++ pll_out = 11289600; ++ break; ++ case 88200: ++ bclk = WM8753_BCLK_DIV_2; ++ pll_out = 11289600; ++ break; ++ } ++ ++ /* set codec DAI configuration */ ++ ret = codec_dai->dai_ops.set_fmt(codec_dai, ++ SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | ++ SND_SOC_DAIFMT_CBM_CFM); ++ if (ret < 0) ++ return ret; ++ ++ /* set cpu DAI configuration */ ++ ret = cpu_dai->dai_ops.set_fmt(cpu_dai, ++ SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | ++ SND_SOC_DAIFMT_CBM_CFM); ++ if (ret < 0) ++ return ret; ++ ++ /* set the codec system clock for DAC and ADC */ ++ ret = codec_dai->dai_ops.set_sysclk(codec_dai, WM8753_MCLK, pll_out, ++ SND_SOC_CLOCK_IN); ++ if (ret < 0) ++ return ret; ++ ++ /* set MCLK division for sample rate */ ++ ret = cpu_dai->dai_ops.set_clkdiv(cpu_dai, S3C24XX_DIV_MCLK, ++ S3C2410_IISMOD_32FS ); ++ if (ret < 0) ++ return ret; ++ ++ /* set codec BCLK division for sample rate */ ++ ret = codec_dai->dai_ops.set_clkdiv(codec_dai, ++ WM8753_BCLKDIV, bclk); ++ if (ret < 0) ++ return ret; ++ ++ /* set prescaler division for sample rate */ ++ ret = cpu_dai->dai_ops.set_clkdiv(cpu_dai, S3C24XX_DIV_PRESCALER, ++ S3C24XX_PRESCALE(4,4)); ++ if (ret < 0) ++ return ret; ++ ++ /* codec PLL input is PCLK/4 */ ++ ret = codec_dai->dai_ops.set_pll(codec_dai, WM8753_PLL1, ++ iis_clkrate / 4, pll_out); ++ if (ret < 0) ++ return ret; ++ ++ return 0; ++} ++ ++static int neo1973_gta02_hifi_hw_free(struct snd_pcm_substream *substream) ++{ ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct snd_soc_codec_dai *codec_dai = rtd->dai->codec_dai; ++ ++ /* disable the PLL */ ++ return codec_dai->dai_ops.set_pll(codec_dai, WM8753_PLL1, 0, 0); ++} ++ ++/* ++ * Neo1973 WM8753 HiFi DAI opserations. ++ */ ++static struct snd_soc_ops neo1973_gta02_hifi_ops = { ++ .hw_params = neo1973_gta02_hifi_hw_params, ++ .hw_free = neo1973_gta02_hifi_hw_free, ++}; ++ ++static int neo1973_gta02_voice_hw_params( ++ struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *params) ++{ ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct snd_soc_codec_dai *codec_dai = rtd->dai->codec_dai; ++ unsigned int pcmdiv = 0; ++ int ret = 0; ++ unsigned long iis_clkrate; ++ ++ iis_clkrate = s3c24xx_i2s_get_clockrate(); ++ ++ if (params_rate(params) != 8000) ++ return -EINVAL; ++ if (params_channels(params) != 1) ++ return -EINVAL; ++ ++ pcmdiv = WM8753_PCM_DIV_6; /* 2.048 MHz */ ++ ++ /* todo: gg check mode (DSP_B) against CSR datasheet */ ++ /* set codec DAI configuration */ ++ ret = codec_dai->dai_ops.set_fmt(codec_dai, SND_SOC_DAIFMT_DSP_B | ++ SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS); ++ if (ret < 0) ++ return ret; ++ ++ /* set the codec system clock for DAC and ADC */ ++ ret = codec_dai->dai_ops.set_sysclk(codec_dai, WM8753_PCMCLK, ++ 12288000, SND_SOC_CLOCK_IN); ++ if (ret < 0) ++ return ret; ++ ++ /* set codec PCM division for sample rate */ ++ ret = codec_dai->dai_ops.set_clkdiv(codec_dai, WM8753_PCMDIV, ++ pcmdiv); ++ if (ret < 0) ++ return ret; ++ ++ /* configue and enable PLL for 12.288MHz output */ ++ ret = codec_dai->dai_ops.set_pll(codec_dai, WM8753_PLL2, ++ iis_clkrate / 4, 12288000); ++ if (ret < 0) ++ return ret; ++ ++ return 0; ++} ++ ++static int neo1973_gta02_voice_hw_free(struct snd_pcm_substream *substream) ++{ ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct snd_soc_codec_dai *codec_dai = rtd->dai->codec_dai; ++ ++ /* disable the PLL */ ++ return codec_dai->dai_ops.set_pll(codec_dai, WM8753_PLL2, 0, 0); ++} ++ ++static struct snd_soc_ops neo1973_gta02_voice_ops = { ++ .hw_params = neo1973_gta02_voice_hw_params, ++ .hw_free = neo1973_gta02_voice_hw_free, ++}; ++ ++#define LM4853_AMP 1 ++#define LM4853_SPK 2 ++ ++static u8 lm4853_state=0; ++ ++static int lm4853_set_state(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ int val = ucontrol->value.integer.value[0]; ++ ++ if(val) { ++ lm4853_state |= LM4853_AMP; ++ s3c2410_gpio_setpin(GTA02_GPIO_AMP_SHUT,0); ++ } else { ++ lm4853_state &= ~LM4853_AMP; ++ s3c2410_gpio_setpin(GTA02_GPIO_AMP_SHUT,1); ++ } ++ ++ return 0; ++} ++ ++static int lm4853_get_state(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ ucontrol->value.integer.value[0] = lm4853_state & LM4853_AMP; ++ ++ return 0; ++} ++ ++static int lm4853_set_spk(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ int val = ucontrol->value.integer.value[0]; ++ ++ if(val) { ++ lm4853_state |= LM4853_SPK; ++ s3c2410_gpio_setpin(GTA02_GPIO_HP_IN,0); ++ } else { ++ lm4853_state &= ~LM4853_SPK; ++ s3c2410_gpio_setpin(GTA02_GPIO_HP_IN,1); ++ } ++ ++ return 0; ++} ++ ++static int lm4853_get_spk(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ ucontrol->value.integer.value[0] = (lm4853_state & LM4853_SPK) >> 1; ++ ++ return 0; ++} ++ ++static int neo1973_gta02_set_stereo_out(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); ++ int val = ucontrol->value.integer.value[0]; ++ ++ snd_soc_dapm_set_endpoint(codec, "Stereo Out", val); ++ ++ snd_soc_dapm_sync_endpoints(codec); ++ ++ return 0; ++} ++ ++static int neo1973_gta02_get_stereo_out(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); ++ ++ ucontrol->value.integer.value[0] = ++ snd_soc_dapm_get_endpoint(codec, "Stereo Out"); ++ ++ return 0; ++} ++ ++ ++static int neo1973_gta02_set_gsm_out(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); ++ int val = ucontrol->value.integer.value[0]; ++ ++ snd_soc_dapm_set_endpoint(codec, "GSM Line Out", val); ++ ++ snd_soc_dapm_sync_endpoints(codec); ++ ++ return 0; ++} ++ ++static int neo1973_gta02_get_gsm_out(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); ++ ++ ucontrol->value.integer.value[0] = ++ snd_soc_dapm_get_endpoint(codec, "GSM Line Out"); ++ ++ return 0; ++} ++ ++static int neo1973_gta02_set_gsm_in(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); ++ int val = ucontrol->value.integer.value[0]; ++ ++ snd_soc_dapm_set_endpoint(codec, "GSM Line In", val); ++ ++ snd_soc_dapm_sync_endpoints(codec); ++ ++ return 0; ++} ++ ++static int neo1973_gta02_get_gsm_in(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); ++ ++ ucontrol->value.integer.value[0] = ++ snd_soc_dapm_get_endpoint(codec, "GSM Line In"); ++ ++ return 0; ++} ++ ++static int neo1973_gta02_set_headset_mic(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); ++ int val = ucontrol->value.integer.value[0]; ++ ++ snd_soc_dapm_set_endpoint(codec, "Headset Mic", val); ++ ++ snd_soc_dapm_sync_endpoints(codec); ++ ++ return 0; ++} ++ ++static int neo1973_gta02_get_headset_mic(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); ++ ++ ucontrol->value.integer.value[0] = ++ snd_soc_dapm_get_endpoint(codec, "Headset Mic"); ++ ++ return 0; ++} ++ ++static int neo1973_gta02_set_handset_mic(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); ++ int val = ucontrol->value.integer.value[0]; ++ ++ snd_soc_dapm_set_endpoint(codec, "Handset Mic", val); ++ ++ snd_soc_dapm_sync_endpoints(codec); ++ ++ return 0; ++} ++ ++static int neo1973_gta02_get_handset_mic(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); ++ ++ ucontrol->value.integer.value[0] = ++ snd_soc_dapm_get_endpoint(codec, "Handset Mic"); ++ ++ return 0; ++} ++ ++static int neo1973_gta02_set_handset_spk(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); ++ int val = ucontrol->value.integer.value[0]; ++ ++ snd_soc_dapm_set_endpoint(codec, "Handset Spk", val); ++ ++ snd_soc_dapm_sync_endpoints(codec); ++ ++ return 0; ++} ++ ++static int neo1973_gta02_get_handset_spk(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); ++ ++ ucontrol->value.integer.value[0] = ++ snd_soc_dapm_get_endpoint(codec, "Handset Spk"); ++ ++ return 0; ++} ++ ++static const struct snd_soc_dapm_widget wm8753_dapm_widgets[] = { ++ SND_SOC_DAPM_LINE("Stereo Out", NULL), ++ SND_SOC_DAPM_LINE("GSM Line Out", NULL), ++ SND_SOC_DAPM_LINE("GSM Line In", NULL), ++ SND_SOC_DAPM_MIC("Headset Mic", NULL), ++ SND_SOC_DAPM_MIC("Handset Mic", NULL), ++ SND_SOC_DAPM_SPK("Handset Spk", NULL), ++}; ++ ++ ++/* example machine audio_mapnections */ ++static const char* audio_map[][3] = { ++ ++ /* Connections to the lm4853 amp */ ++ {"Stereo Out", NULL, "LOUT1"}, ++ {"Stereo Out", NULL, "ROUT1"}, ++ ++ /* Connections to the GSM Module */ ++ {"GSM Line Out", NULL, "MONO1"}, ++ {"GSM Line Out", NULL, "MONO2"}, ++ {"RXP", NULL, "GSM Line In"}, ++ {"RXN", NULL, "GSM Line In"}, ++ ++ /* Connections to Headset */ ++ {"MIC1", NULL, "Mic Bias"}, ++ {"Mic Bias", NULL, "Headset Mic"}, ++ ++ /* Call Mic */ ++ {"MIC2", NULL, "Mic Bias"}, ++ {"MIC2N", NULL, "Mic Bias"}, ++ {"Mic Bias", NULL, "Handset Mic"}, ++ ++ /* Call Speaker */ ++ {"Handset Spk", NULL, "LOUT2"}, ++ {"Handset Spk", NULL, "ROUT2"}, ++ ++ /* Connect the ALC pins */ ++ {"ACIN", NULL, "ACOP"}, ++ ++ {NULL, NULL, NULL}, ++}; ++ ++static const struct snd_kcontrol_new wm8753_neo1973_gta02_controls[] = { ++ SOC_SINGLE_EXT("DAPM Stereo Out Switch", 0, 0, 1, 0, ++ neo1973_gta02_get_stereo_out, ++ neo1973_gta02_set_stereo_out), ++ SOC_SINGLE_EXT("DAPM GSM Line Out Switch", 1, 0, 1, 0, ++ neo1973_gta02_get_gsm_out, ++ neo1973_gta02_set_gsm_out), ++ SOC_SINGLE_EXT("DAPM GSM Line In Switch", 2, 0, 1, 0, ++ neo1973_gta02_get_gsm_in, ++ neo1973_gta02_set_gsm_in), ++ SOC_SINGLE_EXT("DAPM Headset Mic Switch", 3, 0, 1, 0, ++ neo1973_gta02_get_headset_mic, ++ neo1973_gta02_set_headset_mic), ++ SOC_SINGLE_EXT("DAPM Handset Mic Switch", 4, 0, 1, 0, ++ neo1973_gta02_get_handset_mic, ++ neo1973_gta02_set_handset_mic), ++ SOC_SINGLE_EXT("DAPM Handset Spk Switch", 5, 0, 1, 0, ++ neo1973_gta02_get_handset_spk, ++ neo1973_gta02_set_handset_spk), ++ SOC_SINGLE_EXT("Amp State Switch", 6, 0, 1, 0, ++ lm4853_get_state, ++ lm4853_set_state), ++ SOC_SINGLE_EXT("Amp Spk Switch", 7, 0, 1, 0, ++ lm4853_get_spk, ++ lm4853_set_spk), ++}; ++ ++/* ++ * This is an example machine initialisation for a wm8753 connected to a ++ * neo1973 GTA02. ++ */ ++static int neo1973_gta02_wm8753_init(struct snd_soc_codec *codec) ++{ ++ int i, err; ++ ++ /* set up NC codec pins */ ++ snd_soc_dapm_set_endpoint(codec, "OUT3", 0); ++ snd_soc_dapm_set_endpoint(codec, "OUT4", 0); ++ snd_soc_dapm_set_endpoint(codec, "LINE1", 0); ++ snd_soc_dapm_set_endpoint(codec, "LINE2", 0); ++ ++ /* Add neo1973 gta02 specific widgets */ ++ for (i = 0; i < ARRAY_SIZE(wm8753_dapm_widgets); i++) ++ snd_soc_dapm_new_control(codec, &wm8753_dapm_widgets[i]); ++ ++ /* add neo1973 gta02 specific controls */ ++ for (i = 0; i < ARRAY_SIZE(wm8753_neo1973_gta02_controls); i++) { ++ err = snd_ctl_add(codec->card, ++ snd_soc_cnew(&wm8753_neo1973_gta02_controls[i], ++ codec, NULL)); ++ if (err < 0) ++ return err; ++ } ++ ++ /* set up neo1973 gta02 specific audio path audio_mapnects */ ++ for (i = 0; audio_map[i][0] != NULL; i++) { ++ snd_soc_dapm_connect_input(codec, audio_map[i][0], ++ audio_map[i][1], audio_map[i][2]); ++ } ++ ++ /* set endpoints to default off mode */ ++ snd_soc_dapm_set_endpoint(codec, "Stereo Out", 0); ++ snd_soc_dapm_set_endpoint(codec, "GSM Line Out",0); ++ snd_soc_dapm_set_endpoint(codec, "GSM Line In", 0); ++ snd_soc_dapm_set_endpoint(codec, "Headset Mic", 0); ++ snd_soc_dapm_set_endpoint(codec, "Handset Mic", 0); ++ snd_soc_dapm_set_endpoint(codec, "Handset Spk", 0); ++ ++ snd_soc_dapm_sync_endpoints(codec); ++ return 0; ++} ++ ++/* ++ * BT Codec DAI ++ */ ++static struct snd_soc_cpu_dai bt_dai = ++{ .name = "Bluetooth", ++ .id = 0, ++ .type = SND_SOC_DAI_PCM, ++ .playback = { ++ .channels_min = 1, ++ .channels_max = 1, ++ .rates = SNDRV_PCM_RATE_8000, ++ .formats = SNDRV_PCM_FMTBIT_S16_LE,}, ++ .capture = { ++ .channels_min = 1, ++ .channels_max = 1, ++ .rates = SNDRV_PCM_RATE_8000, ++ .formats = SNDRV_PCM_FMTBIT_S16_LE,}, ++}; ++ ++static struct snd_soc_dai_link neo1973_gta02_dai[] = { ++{ /* Hifi Playback - for similatious use with voice below */ ++ .name = "WM8753", ++ .stream_name = "WM8753 HiFi", ++ .cpu_dai = &s3c24xx_i2s_dai, ++ .codec_dai = &wm8753_dai[WM8753_DAI_HIFI], ++ .init = neo1973_gta02_wm8753_init, ++ .ops = &neo1973_gta02_hifi_ops, ++}, ++{ /* Voice via BT */ ++ .name = "Bluetooth", ++ .stream_name = "Voice", ++ .cpu_dai = &bt_dai, ++ .codec_dai = &wm8753_dai[WM8753_DAI_VOICE], ++ .ops = &neo1973_gta02_voice_ops, ++}, ++}; ++ ++#ifdef CONFIG_PM ++int neo1973_gta02_suspend(struct platform_device *pdev, pm_message_t state) ++{ ++ s3c2410_gpio_setpin(GTA02_GPIO_AMP_SHUT, 1); ++ ++ return 0; ++} ++ ++int neo1973_gta02_resume(struct platform_device *pdev) ++{ ++ if(lm4853_state & LM4853_AMP) ++ s3c2410_gpio_setpin(GTA02_GPIO_AMP_SHUT, 0); ++ ++ return 0; ++} ++#else ++#define neo1973_gta02_suspend NULL ++#define neo1973_gta02_resume NULL ++#endif ++ ++static struct snd_soc_machine neo1973_gta02 = { ++ .name = "neo1973-gta02", ++ .suspend_pre = neo1973_gta02_suspend, ++ .resume_post = neo1973_gta02_resume, ++ .dai_link = neo1973_gta02_dai, ++ .num_links = ARRAY_SIZE(neo1973_gta02_dai), ++}; ++ ++static struct wm8753_setup_data neo1973_gta02_wm8753_setup = { ++ .i2c_address = 0x1a, ++}; ++ ++static struct snd_soc_device neo1973_gta02_snd_devdata = { ++ .machine = &neo1973_gta02, ++ .platform = &s3c24xx_soc_platform, ++ .codec_dev = &soc_codec_dev_wm8753, ++ .codec_data = &neo1973_gta02_wm8753_setup, ++}; ++ ++static struct platform_device *neo1973_gta02_snd_device; ++ ++static int __init neo1973_gta02_init(void) ++{ ++ int ret; ++ ++ if (!machine_is_neo1973_gta02()) { ++ printk(KERN_INFO ++ "Only GTA02 hardware supported by ASoc driver\n"); ++ return -ENODEV; ++ } ++ ++ neo1973_gta02_snd_device = platform_device_alloc("soc-audio", -1); ++ if (!neo1973_gta02_snd_device) ++ return -ENOMEM; ++ ++ platform_set_drvdata(neo1973_gta02_snd_device, ++ &neo1973_gta02_snd_devdata); ++ neo1973_gta02_snd_devdata.dev = &neo1973_gta02_snd_device->dev; ++ ret = platform_device_add(neo1973_gta02_snd_device); ++ ++ if (ret) ++ platform_device_put(neo1973_gta02_snd_device); ++ ++ /* Initialise GPIOs used by amp */ ++ s3c2410_gpio_cfgpin(GTA02_GPIO_HP_IN, S3C2410_GPIO_OUTPUT); ++ s3c2410_gpio_cfgpin(GTA02_GPIO_AMP_SHUT, S3C2410_GPIO_OUTPUT); ++ ++ /* Amp off by default */ ++ s3c2410_gpio_setpin(GTA02_GPIO_AMP_SHUT, 1); ++ ++ /* Speaker off by default */ ++ s3c2410_gpio_setpin(GTA02_GPIO_HP_IN, 1); ++ ++ return ret; ++} ++ ++static void __exit neo1973_gta02_exit(void) ++{ ++ platform_device_unregister(neo1973_gta02_snd_device); ++} ++ ++module_init(neo1973_gta02_init); ++module_exit(neo1973_gta02_exit); ++ ++/* Module information */ ++MODULE_AUTHOR("Graeme Gregory, graeme@openmoko.org"); ++MODULE_DESCRIPTION("ALSA SoC WM8753 Neo1973 GTA02"); ++MODULE_LICENSE("GPL"); ++ +diff --git a/sound/soc/soc-dapm.c b/sound/soc/soc-dapm.c +index 29a546f..84fa860 100644 +--- a/sound/soc/soc-dapm.c ++++ b/sound/soc/soc-dapm.c +@@ -1305,6 +1305,30 @@ int snd_soc_dapm_set_endpoint(struct snd_soc_codec *codec, + EXPORT_SYMBOL_GPL(snd_soc_dapm_set_endpoint); + + /** ++ * snd_soc_dapm_get_endpoint - get audio endpoint status ++ * @codec: audio codec ++ * @endpoint: audio signal endpoint (or start point) ++ * ++ * Get audio endpoint status - connected or disconnected. ++ * ++ * Returns status ++ */ ++int snd_soc_dapm_get_endpoint(struct snd_soc_codec *codec, ++ char *endpoint) ++{ ++ struct snd_soc_dapm_widget *w; ++ ++ list_for_each_entry(w, &codec->dapm_widgets, list) { ++ if (!strcmp(w->name, endpoint)) { ++ return w->connected; ++ } ++ } ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(snd_soc_dapm_get_endpoint); ++ ++/** + * snd_soc_dapm_free - free dapm resources + * @socdev: SoC device + * +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1038-lis302dl.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1038-lis302dl.patch.patch new file mode 100644 index 0000000000..6cd803ce24 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1038-lis302dl.patch.patch @@ -0,0 +1,781 @@ +From e31bab42367386736c07638683acb4da3c775eaf Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:35:42 +0100 +Subject: [PATCH] lis302dl.patch + This is a Linux driver for the STmicro LIS302DL 3-axis accelerometer. + +Signed-off-by: Harald Welte +--- + arch/arm/mach-s3c2440/mach-gta02.c | 46 +++- + drivers/input/misc/Kconfig | 9 + + drivers/input/misc/Makefile | 1 + + drivers/input/misc/lis302dl.c | 633 ++++++++++++++++++++++++++++++++++++ + include/linux/lis302dl.h | 11 + + 5 files changed, 699 insertions(+), 1 deletions(-) + create mode 100644 drivers/input/misc/lis302dl.c + create mode 100644 include/linux/lis302dl.h + +diff --git a/arch/arm/mach-s3c2440/mach-gta02.c b/arch/arm/mach-s3c2440/mach-gta02.c +index f72a5ae..d11da10 100644 +--- a/arch/arm/mach-s3c2440/mach-gta02.c ++++ b/arch/arm/mach-s3c2440/mach-gta02.c +@@ -46,6 +46,7 @@ + #include + + #include ++#include + + #include + #include +@@ -463,7 +464,7 @@ static struct s3c2410_ts_mach_info gta02_ts_cfg = { + .oversampling_shift = 5, + }; + +-/* SPI */ ++/* SPI: LCM control interface attached to Glamo3362 */ + + static struct spi_board_info gta02_spi_board_info[] = { + { +@@ -504,6 +505,48 @@ static struct platform_device gta01_led_dev = { + .resource = gta01_led_resources, + }; + ++/* SPI: Accelerometers attached to SPI of s3c244x */ ++ ++static void gta02_spi_acc_set_cs(struct s3c2410_spi_info *spi, int cs, int pol) ++{ ++ s3c2410_gpio_setpin(cs, pol); ++} ++ ++static const struct lis302dl_platform_data lis302_pdata[] = { ++ { ++ .name = "lis302-1 (top)" ++ }, { ++ .name = "lis302-2 (bottom)" ++ }, ++}; ++ ++static struct spi_board_info gta02_spi_acc_bdinfo[] = { ++ { ++ .modalias = "lis302dl", ++ .platform_data = &lis302_pdata[0], ++ .irq = GTA02_IRQ_GSENSOR_1, ++ .max_speed_hz = 400 * 1000, ++ .bus_num = 1, ++ .chip_select = S3C2410_GPD12, ++ .mode = SPI_MODE_3, ++ }, ++ { ++ .modalias = "lis302dl", ++ .platform_data = &lis302_pdata[1], ++ .irq = GTA02_IRQ_GSENSOR_2, ++ .max_speed_hz = 400 * 1000, ++ .bus_num = 1, ++ .chip_select = S3C2410_GPD13, ++ .mode = SPI_MODE_3, ++ }, ++}; ++ ++static struct s3c2410_spi_info gta02_spi_acc_cfg = { ++ .set_cs = gta02_spi_acc_set_cs, ++ .board_size = ARRAY_SIZE(gta02_spi_acc_bdinfo), ++ .board_info = gta02_spi_acc_bdinfo, ++}; ++ + static struct resource gta02_led_resources[] = { + { + .name = "gta02-power:orange", +@@ -746,6 +789,7 @@ static void __init gta02_machine_init(void) + s3c_device_usb.dev.platform_data = >a02_usb_info; + s3c_device_nand.dev.platform_data = >a02_nand_info; + s3c_device_sdi.dev.platform_data = >a02_mmc_cfg; ++ s3c_device_spi1.dev.platform_data = >a02_spi_acc_cfg; + + /* Only GTA02v1 has a SD_DETECT GPIO. Since the slot is not + * hot-pluggable, this is not required anyway */ +diff --git a/drivers/input/misc/Kconfig b/drivers/input/misc/Kconfig +index 8f5c7b9..5a15edd 100644 +--- a/drivers/input/misc/Kconfig ++++ b/drivers/input/misc/Kconfig +@@ -183,4 +183,13 @@ config HP_SDC_RTC + Say Y here if you want to support the built-in real time clock + of the HP SDC controller. + ++config INPUT_LIS302DL ++ tristate "STmicro LIS302DL 3-axis accelerometer" ++ depends on SPI_MASTER ++ help ++ SPI driver for the STmicro LIS302DL 3-axis accelerometer. ++ ++ The userspece interface is a 3-axis (X/Y/Z) relative movement ++ Linux input device, reporting REL_[XYZ] events. ++ + endif +diff --git a/drivers/input/misc/Makefile b/drivers/input/misc/Makefile +index 3585b50..f197a67 100644 +--- a/drivers/input/misc/Makefile ++++ b/drivers/input/misc/Makefile +@@ -18,3 +18,4 @@ obj-$(CONFIG_INPUT_POWERMATE) += powermate.o + obj-$(CONFIG_INPUT_YEALINK) += yealink.o + obj-$(CONFIG_HP_SDC_RTC) += hp_sdc_rtc.o + obj-$(CONFIG_INPUT_UINPUT) += uinput.o ++obj-$(CONFIG_INPUT_LIS302DL) += lis302dl.o +diff --git a/drivers/input/misc/lis302dl.c b/drivers/input/misc/lis302dl.c +new file mode 100644 +index 0000000..45c41c8 +--- /dev/null ++++ b/drivers/input/misc/lis302dl.c +@@ -0,0 +1,633 @@ ++/* Linux kernel driver for the ST LIS302D 3-axis accelerometer ++ * ++ * Copyright (C) 2007 by OpenMoko, Inc. ++ * Author: Harald Welte ++ * All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ * ++ * TODO ++ * * statistics for overflow events ++ * * configuration interface (sysfs) for ++ * * enable/disable x/y/z axis data ready ++ * * enable/disable resume from freee fall / click ++ * * free fall / click parameters ++ * * high pass filter parameters ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include ++ ++#define LIS302DL_WHO_AM_I_MAGIC 0x3b ++ ++enum lis302dl_reg { ++ LIS302DL_REG_WHO_AM_I = 0x0f, ++ LIS302DL_REG_CTRL1 = 0x20, ++ LIS302DL_REG_CTRL2 = 0x21, ++ LIS302DL_REG_CTRL3 = 0x22, ++ LIS302DL_REG_HP_FILTER_RESET = 0x23, ++ LIS302DL_REG_STATUS = 0x27, ++ LIS302DL_REG_OUT_X = 0x29, ++ LIS302DL_REG_OUT_Y = 0x2b, ++ LIS302DL_REG_OUT_Z = 0x2d, ++ LIS302DL_REG_FF_WU_CFG_1 = 0x30, ++ LIS302DL_REG_FF_WU_SRC_1 = 0x31, ++ LIS302DL_REG_FF_WU_THS_1 = 0x32, ++ LIS302DL_REG_FF_WU_DURATION_1 = 0x33, ++ LIS302DL_REG_FF_WU_CFG_2 = 0x34, ++ LIS302DL_REG_FF_WU_SRC_2 = 0x35, ++ LIS302DL_REG_FF_WU_THS_2 = 0x36, ++ LIS302DL_REG_FF_WU_DURATION_2 = 0x37, ++ LIS302DL_REG_CLICK_CFG = 0x38, ++ LIS302DL_REG_CLICK_SRC = 0x39, ++ LIS302DL_REG_CLICK_THSY_X = 0x3b, ++ LIS302DL_REG_CLICK_THSZ = 0x3c, ++ LIS302DL_REG_CLICK_TIME_LIMIT = 0x3d, ++ LIS302DL_REG_CLICK_LATENCY = 0x3e, ++ LIS302DL_REG_CLICK_WINDOW = 0x3f, ++}; ++ ++enum lis302dl_reg_ctrl1 { ++ LIS302DL_CTRL1_Xen = 0x01, ++ LIS302DL_CTRL1_Yen = 0x02, ++ LIS302DL_CTRL1_Zen = 0x04, ++ LIS302DL_CTRL1_STM = 0x08, ++ LIS302DL_CTRL1_STP = 0x10, ++ LIS302DL_CTRL1_FS = 0x20, ++ LIS302DL_CTRL1_PD = 0x40, ++ LIS302DL_CTRL1_DR = 0x80, ++}; ++ ++enum lis302dl_reg_ctrl3 { ++ LIS302DL_CTRL3_PP_OD = 0x40, ++}; ++ ++enum lis302dl_reg_status { ++ LIS302DL_STATUS_XDA = 0x01, ++ LIS302DL_STATUS_YDA = 0x02, ++ LIS302DL_STATUS_ZDA = 0x04, ++ LIS302DL_STATUS_XYZDA = 0x08, ++ LIS302DL_STATUS_XOR = 0x10, ++ LIS302DL_STATUS_YOR = 0x20, ++ LIS302DL_STATUS_ZOR = 0x40, ++ LIS302DL_STATUS_XYZOR = 0x80, ++}; ++ ++enum lis302dl_reg_ffwusrc1 { ++ LIS302DL_FFWUSRC1_XL = 0x01, ++ LIS302DL_FFWUSRC1_XH = 0x02, ++ LIS302DL_FFWUSRC1_YL = 0x04, ++ LIS302DL_FFWUSRC1_YH = 0x08, ++ LIS302DL_FFWUSRC1_ZL = 0x10, ++ LIS302DL_FFWUSRC1_ZH = 0x20, ++ LIS302DL_FFWUSRC1_IA = 0x40, ++}; ++ ++enum lis302dl_reg_cloik_src { ++ LIS302DL_CLICKSRC_SINGLE_X = 0x01, ++ LIS302DL_CLICKSRC_DOUBLE_X = 0x02, ++ LIS302DL_CLICKSRC_SINGLE_Y = 0x04, ++ LIS302DL_CLICKSRC_DOUBLE_Y = 0x08, ++ LIS302DL_CLICKSRC_SINGLE_Z = 0x10, ++ LIS302DL_CLICKSRC_DOUBLE_Z = 0x20, ++ LIS302DL_CLICKSRC_IA = 0x40, ++}; ++ ++struct lis302dl_info { ++ struct spi_device *spi_dev; ++ struct input_dev *input_dev; ++ struct mutex lock; ++ struct work_struct work; ++ unsigned int flags; ++ unsigned int working; ++ u_int8_t regs[0x40]; ++}; ++ ++#define LIS302DL_F_WUP_FF 0x0001 /* wake up from free fall */ ++#define LIS302DL_F_WUP_CLICK 0x0002 ++#define LIS302DL_F_POWER 0x0010 ++#define LIS302DL_F_FS 0x0020 /* ADC full scale */ ++ ++/* lowlevel register access functions */ ++ ++#define READ_BIT 0x01 ++#define MS_BIT 0x02 ++#define ADDR_SHIFT 2 ++ ++static inline u_int8_t __reg_read(struct lis302dl_info *lis, u_int8_t reg) ++{ ++ int rc; ++ u_int8_t cmd; ++ ++ cmd = (reg << ADDR_SHIFT) | READ_BIT; ++ ++ rc = spi_w8r8(lis->spi_dev, cmd); ++ ++ return rc; ++} ++ ++static u_int8_t reg_read(struct lis302dl_info *lis, u_int8_t reg) ++{ ++ u_int8_t ret; ++ ++ mutex_lock(&lis->lock); ++ ret = __reg_read(lis, reg); ++ mutex_unlock(&lis->lock); ++ ++ return ret; ++} ++ ++static inline int __reg_write(struct lis302dl_info *lis, u_int8_t reg, u_int8_t val) ++{ ++ u_int8_t buf[2]; ++ ++ buf[0] = (reg << ADDR_SHIFT); ++ buf[1] = val; ++ ++ return spi_write(lis->spi_dev, buf, sizeof(buf)); ++} ++ ++static int reg_write(struct lis302dl_info *lis, u_int8_t reg, u_int8_t val) ++{ ++ int ret; ++ ++ mutex_lock(&lis->lock); ++ ret = __reg_write(lis, reg, val); ++ mutex_unlock(&lis->lock); ++ ++ return ret; ++} ++ ++static int reg_set_bit_mask(struct lis302dl_info *lis, ++ u_int8_t reg, u_int8_t mask, u_int8_t val) ++{ ++ int ret; ++ u_int8_t tmp; ++ ++ val &= mask; ++ ++ mutex_lock(&lis->lock); ++ ++ tmp = __reg_read(lis, reg); ++ tmp &= ~mask; ++ tmp |= val; ++ ret = __reg_write(lis, reg, tmp); ++ ++ mutex_unlock(&lis->lock); ++ ++ return ret; ++} ++ ++/* interrupt handling related */ ++ ++enum lis302dl_intmode { ++ LIS302DL_INTMODE_GND = 0x00, ++ LIS302DL_INTMODE_FF_WU_1 = 0x01, ++ LIX302DL_INTMODE_FF_WU_2 = 0x02, ++ LIX302DL_INTMODE_FF_WU_12 = 0x03, ++ LIX302DL_INTMODE_DATA_READY = 0x04, ++ LIX302DL_INTMODE_CLICK = 0x07, ++}; ++ ++static void lis302dl_int_mode(struct spi_device *spi, int int_pin, ++ enum lis302dl_intmode mode) ++{ ++ struct lis302dl_info *lis = dev_get_drvdata(&spi->dev); ++ ++ if (int_pin == 1) ++ reg_set_bit_mask(lis, LIS302DL_REG_CTRL3, 0x07, mode); ++ else if (int_pin == 2) ++ reg_set_bit_mask(lis, LIS302DL_REG_CTRL3, 0x38, mode << 3); ++} ++ ++static void _report_btn_single(struct input_dev *inp, int btn) ++{ ++ input_report_key(inp, btn, 1); ++ input_sync(inp); ++ input_report_key(inp, btn, 0); ++} ++ ++static void _report_btn_double(struct input_dev *inp, int btn) ++{ ++ input_report_key(inp, btn, 1); ++ input_sync(inp); ++ input_report_key(inp, btn, 0); ++ input_sync(inp); ++ input_report_key(inp, btn, 1); ++ input_sync(inp); ++ input_report_key(inp, btn, 0); ++} ++ ++static void lis302dl_work(struct work_struct *work) ++{ ++ struct lis302dl_info *lis = ++ container_of(work, struct lis302dl_info, work); ++ ++ u_int8_t status, ff_wu_src_1, click_src; ++ u_int8_t val; ++ ++ lis->working = 1; ++ ++ status = reg_read(lis, LIS302DL_REG_STATUS); ++ ff_wu_src_1 = reg_read(lis, LIS302DL_REG_FF_WU_SRC_1); ++ click_src = reg_read(lis, LIS302DL_REG_CLICK_SRC); ++ ++ if (status & LIS302DL_STATUS_XDA) { ++ val = reg_read(lis, LIS302DL_REG_OUT_X); ++ if (lis->flags & LIS302DL_F_FS) ++ val = val << 2; ++ input_report_rel(lis->input_dev, REL_X, val); ++ } ++ ++ if (status & LIS302DL_STATUS_YDA) { ++ val = reg_read(lis, LIS302DL_REG_OUT_Y); ++ if (lis->flags & LIS302DL_F_FS) ++ val = val << 2; ++ input_report_rel(lis->input_dev, REL_Y, val); ++ } ++ ++ if (status & LIS302DL_STATUS_ZDA) { ++ val = reg_read(lis, LIS302DL_REG_OUT_Z); ++ if (lis->flags & LIS302DL_F_FS) ++ val = val << 2; ++ input_report_rel(lis->input_dev, REL_Z, val); ++ } ++ ++ if (status & 0xf0) ++ dev_dbg(&lis->spi_dev->dev, "overrun!\n"); ++ ++ /* FIXME: implement overrun statistics */ ++ ++ if (ff_wu_src_1 & LIS302DL_FFWUSRC1_IA) { ++ /* FIXME: free fall interrupt handling */ ++ } ++ ++ if (click_src & LIS302DL_CLICKSRC_IA) { ++ if (click_src & LIS302DL_CLICKSRC_SINGLE_X) ++ _report_btn_single(lis->input_dev, BTN_X); ++ if (click_src & LIS302DL_CLICKSRC_DOUBLE_X) ++ _report_btn_double(lis->input_dev, BTN_X); ++ ++ if (click_src & LIS302DL_CLICKSRC_SINGLE_Y) ++ _report_btn_single(lis->input_dev, BTN_Y); ++ if (click_src & LIS302DL_CLICKSRC_DOUBLE_Y) ++ _report_btn_double(lis->input_dev, BTN_Y); ++ ++ if (click_src & LIS302DL_CLICKSRC_SINGLE_Z) ++ _report_btn_single(lis->input_dev, BTN_Z); ++ if (click_src & LIS302DL_CLICKSRC_DOUBLE_Z) ++ _report_btn_double(lis->input_dev, BTN_Z); ++ } ++ ++ lis->working = 0; ++ input_sync(lis->input_dev); ++ put_device(&lis->spi_dev->dev); ++ ++ enable_irq(lis->spi_dev->irq); ++} ++ ++static void lis302dl_schedule_work(struct lis302dl_info *lis) ++{ ++ int status; ++ ++ get_device(&lis->spi_dev->dev); ++ status = schedule_work(&lis->work); ++ if (!status && !lis->working) ++ dev_dbg(&lis->spi_dev->dev, "work item may be lost\n"); ++} ++ ++static irqreturn_t lis302dl_interrupt(int irq, void *_lis) ++{ ++ struct lis302dl_info *lis = _lis; ++ ++ lis302dl_schedule_work(lis); ++ ++ /* Disable any further interrupts until we have processed ++ * the current one */ ++ disable_irq(lis->spi_dev->irq); ++ ++ return IRQ_HANDLED; ++} ++ ++/* sysfs */ ++ ++static ssize_t show_rate(struct device *dev, struct device_attribute *attr, ++ char *buf) ++{ ++ struct lis302dl_info *lis = dev_get_drvdata(dev); ++ u_int8_t ctrl1 = reg_read(lis, LIS302DL_REG_CTRL1); ++ ++ return sprintf(buf, "%d\n", ctrl1 & LIS302DL_CTRL1_DR ? 400 : 100); ++} ++ ++static ssize_t set_rate(struct device *dev, struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++ struct lis302dl_info *lis = dev_get_drvdata(dev); ++ ++ if (!strcmp(buf, "400\n")) ++ reg_set_bit_mask(lis, LIS302DL_REG_CTRL1, LIS302DL_CTRL1_DR, ++ LIS302DL_CTRL1_DR); ++ else ++ reg_set_bit_mask(lis, LIS302DL_REG_CTRL1, LIS302DL_CTRL1_DR, 0); ++ ++ return count; ++} ++ ++static DEVICE_ATTR(sample_rate, S_IRUGO | S_IWUSR, show_rate, set_rate); ++ ++static ssize_t show_scale(struct device *dev, struct device_attribute *attr, ++ char *buf) ++{ ++ struct lis302dl_info *lis = dev_get_drvdata(dev); ++ u_int8_t ctrl1 = reg_read(lis, LIS302DL_REG_CTRL1); ++ ++ return sprintf(buf, "%s\n", ctrl1 & LIS302DL_CTRL1_FS ? "9.2" : "2.3"); ++} ++ ++static ssize_t set_scale(struct device *dev, struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++ struct lis302dl_info *lis = dev_get_drvdata(dev); ++ ++ if (!strcmp(buf, "9.2\n")) ++ reg_set_bit_mask(lis, LIS302DL_REG_CTRL1, LIS302DL_CTRL1_FS, ++ LIS302DL_CTRL1_FS); ++ else ++ reg_set_bit_mask(lis, LIS302DL_REG_CTRL1, LIS302DL_CTRL1_FS, 0); ++ ++ return count; ++} ++ ++static DEVICE_ATTR(full_scale, S_IRUGO | S_IWUSR, show_scale, set_scale); ++ ++static struct attribute *lis302dl_sysfs_entries[] = { ++ &dev_attr_sample_rate.attr, ++ &dev_attr_full_scale.attr, ++}; ++ ++static struct attribute_group lis302dl_attr_group = { ++ .name = NULL, ++ .attrs = lis302dl_sysfs_entries, ++}; ++ ++/* input device handling and driver core interaction */ ++ ++static int lis302dl_input_open(struct input_dev *inp) ++{ ++ struct lis302dl_info *lis = inp->private; ++ u_int8_t ctrl1 = LIS302DL_CTRL1_PD | LIS302DL_CTRL1_Xen | ++ LIS302DL_CTRL1_Yen | LIS302DL_CTRL1_Zen; ++ ++ /* make sure we're powered up and generate data ready */ ++ reg_set_bit_mask(lis, LIS302DL_REG_CTRL1, ctrl1, ctrl1); ++ ++ return 0; ++} ++ ++static void lis302dl_input_close(struct input_dev *inp) ++{ ++ struct lis302dl_info *lis = inp->private; ++ u_int8_t ctrl1 = LIS302DL_CTRL1_Xen | LIS302DL_CTRL1_Yen | ++ LIS302DL_CTRL1_Zen; ++ ++ /* since the input core already serializes access and makes sure we ++ * only see close() for the close of the lastre user, we can safely ++ * disable the data ready events */ ++ reg_set_bit_mask(lis, LIS302DL_REG_CTRL1, ctrl1, 0x00); ++ ++ /* however, don't power down the whole device if still needed */ ++ if (!(lis->flags & LIS302DL_F_WUP_FF || ++ lis->flags & LIS302DL_F_WUP_CLICK)) { ++ reg_set_bit_mask(lis, LIS302DL_REG_CTRL1, LIS302DL_CTRL1_PD, ++ 0x00); ++ } ++} ++ ++static int __devinit lis302dl_probe(struct spi_device *spi) ++{ ++ int rc; ++ struct lis302dl_info *lis; ++ u_int8_t wai; ++ ++ lis = kzalloc(sizeof(*lis), GFP_KERNEL); ++ if (!lis) ++ return -ENOMEM; ++ ++ mutex_init(&lis->lock); ++ INIT_WORK(&lis->work, lis302dl_work); ++ lis->spi_dev = spi; ++ ++ spi_set_drvdata(spi, lis); ++ ++ rc = spi_setup(spi); ++ if (rc < 0) { ++ printk(KERN_ERR "error durign spi_setup of lis302dl driver\n"); ++ dev_set_drvdata(&spi->dev, NULL); ++ kfree(lis); ++ return rc; ++ } ++ ++ wai = reg_read(lis, LIS302DL_REG_WHO_AM_I); ++ if (wai != LIS302DL_WHO_AM_I_MAGIC) { ++ printk(KERN_ERR "unknown who_am_i signature 0x%02x\n", wai); ++ dev_set_drvdata(&spi->dev, NULL); ++ kfree(lis); ++ return -ENODEV; ++ } ++ ++ /* switch interrupt to open collector */ ++ reg_write(lis, LIS302DL_CTRL3_PP_OD, 0x7c); ++ ++ rc = request_irq(lis->spi_dev->irq, lis302dl_interrupt, IRQF_DISABLED, ++ "lis302dl", NULL); ++ if (rc < 0) { ++ dev_err(&spi->dev, "error requesting IRQ %d\n", ++ lis->spi_dev->irq); ++ /* FIXME */ ++ return rc; ++ } ++ ++ rc = sysfs_create_group(&spi->dev.kobj, &lis302dl_attr_group); ++ if (rc) { ++ dev_err(&spi->dev, "error creating sysfs group\n"); ++ /* FIXME */ ++ return rc; ++ } ++ ++ /* initialize input layer details */ ++ lis->input_dev = input_allocate_device(); ++ if (!lis->input_dev) { ++ dev_err(&spi->dev, "Unable to allocate input device\n"); ++ /* FIXME */ ++ } ++ ++ set_bit(EV_REL, lis->input_dev->evbit); ++ set_bit(EV_KEY, lis->input_dev->evbit); ++ set_bit(BTN_X, lis->input_dev->keybit); ++ set_bit(BTN_Y, lis->input_dev->keybit); ++ set_bit(BTN_Z, lis->input_dev->keybit); ++ ++ lis->input_dev->private = lis; ++ lis->input_dev->name = "lis302dl"; /* FIXME: platform data */ ++ lis->input_dev->id.bustype = BUS_I2C; /* FIXME: SPI Bus */ ++ lis->input_dev->open = lis302dl_input_open; ++ lis->input_dev->close = lis302dl_input_close; ++ ++ input_register_device(lis->input_dev); ++ ++ return 0; ++} ++ ++static int __devexit lis302dl_remove(struct spi_device *spi) ++{ ++ struct lis302dl_info *lis = dev_get_drvdata(&spi->dev); ++ ++ /* power down the device */ ++ reg_write(lis, LIS302DL_REG_CTRL1, 0x00); ++ sysfs_remove_group(&spi->dev.kobj, &lis302dl_attr_group); ++ input_unregister_device(lis->input_dev); ++ dev_set_drvdata(&spi->dev, NULL); ++ kfree(lis); ++ ++ return 0; ++} ++ ++#ifdef CONFIG_PM ++static int lis302dl_suspend(struct spi_device *spi, pm_message_t state) ++{ ++ struct lis302dl_info *lis = dev_get_drvdata(&spi->dev); ++ ++ /* save registers */ ++ lis->regs[LIS302DL_REG_CTRL1] = reg_read(lis, LIS302DL_REG_CTRL1); ++ lis->regs[LIS302DL_REG_CTRL2] = reg_read(lis, LIS302DL_REG_CTRL2); ++ lis->regs[LIS302DL_REG_CTRL3] = reg_read(lis, LIS302DL_REG_CTRL3); ++ lis->regs[LIS302DL_REG_FF_WU_CFG_1] = ++ reg_read(lis, LIS302DL_REG_FF_WU_CFG_1); ++ lis->regs[LIS302DL_REG_FF_WU_THS_1] = ++ reg_read(lis, LIS302DL_REG_FF_WU_THS_1); ++ lis->regs[LIS302DL_REG_FF_WU_DURATION_1] = ++ reg_read(lis, LIS302DL_REG_FF_WU_DURATION_1); ++ lis->regs[LIS302DL_REG_FF_WU_CFG_2] = ++ reg_read(lis, LIS302DL_REG_FF_WU_CFG_2); ++ lis->regs[LIS302DL_REG_FF_WU_THS_2] = ++ reg_read(lis, LIS302DL_REG_FF_WU_THS_2); ++ lis->regs[LIS302DL_REG_FF_WU_DURATION_2] = ++ reg_read(lis, LIS302DL_REG_FF_WU_DURATION_2); ++ lis->regs[LIS302DL_REG_CLICK_CFG] = ++ reg_read(lis, LIS302DL_REG_CLICK_CFG); ++ lis->regs[LIS302DL_REG_CLICK_THSY_X] = ++ reg_read(lis, LIS302DL_REG_CLICK_THSY_X); ++ lis->regs[LIS302DL_REG_CLICK_THSZ] = ++ reg_read(lis, LIS302DL_REG_CLICK_THSZ); ++ lis->regs[LIS302DL_REG_CLICK_TIME_LIMIT] = ++ reg_read(lis, LIS302DL_REG_CLICK_TIME_LIMIT); ++ lis->regs[LIS302DL_REG_CLICK_LATENCY] = ++ reg_read(lis, LIS302DL_REG_CLICK_LATENCY); ++ lis->regs[LIS302DL_REG_CLICK_WINDOW] = ++ reg_read(lis, LIS302DL_REG_CLICK_WINDOW); ++ ++ /* determine if we want to wake up from the accel. */ ++ if (!(lis->flags & LIS302DL_F_WUP_FF || ++ lis->flags & LIS302DL_F_WUP_CLICK)) { ++ /* power down */ ++ u_int8_t tmp; ++ tmp = reg_read(lis, LIS302DL_REG_CTRL1); ++ tmp &= ~LIS302DL_CTRL1_PD; ++ reg_write(lis, LIS302DL_REG_CTRL1, tmp); ++ } ++ ++ return 0; ++} ++ ++static int lis302dl_resume(struct spi_device *spi) ++{ ++ struct lis302dl_info *lis = dev_get_drvdata(&spi->dev); ++ ++ /* restore registers after resume */ ++ reg_write(lis, LIS302DL_REG_CTRL1, lis->regs[LIS302DL_REG_CTRL1]); ++ reg_write(lis, LIS302DL_REG_CTRL2, lis->regs[LIS302DL_REG_CTRL2]); ++ reg_write(lis, LIS302DL_REG_CTRL3, lis->regs[LIS302DL_REG_CTRL3]); ++ reg_write(lis, LIS302DL_REG_FF_WU_CFG_1, ++ lis->regs[LIS302DL_REG_FF_WU_CFG_1]); ++ reg_write(lis, LIS302DL_REG_FF_WU_THS_1, ++ lis->regs[LIS302DL_REG_FF_WU_THS_1]); ++ reg_write(lis, LIS302DL_REG_FF_WU_DURATION_1, ++ lis->regs[LIS302DL_REG_FF_WU_DURATION_1]); ++ reg_write(lis, LIS302DL_REG_FF_WU_CFG_2, ++ lis->regs[LIS302DL_REG_FF_WU_CFG_2]); ++ reg_write(lis, LIS302DL_REG_FF_WU_THS_2, ++ lis->regs[LIS302DL_REG_FF_WU_THS_2]); ++ reg_write(lis, LIS302DL_REG_FF_WU_DURATION_2, ++ lis->regs[LIS302DL_REG_FF_WU_DURATION_2]); ++ reg_write(lis, LIS302DL_REG_CLICK_CFG, ++ lis->regs[LIS302DL_REG_CLICK_CFG]); ++ reg_write(lis, LIS302DL_REG_CLICK_THSY_X, ++ lis->regs[LIS302DL_REG_CLICK_THSY_X]); ++ reg_write(lis, LIS302DL_REG_CLICK_THSZ, ++ lis->regs[LIS302DL_REG_CLICK_THSZ]); ++ reg_write(lis, LIS302DL_REG_CLICK_TIME_LIMIT, ++ lis->regs[LIS302DL_REG_CLICK_TIME_LIMIT]); ++ reg_write(lis, LIS302DL_REG_CLICK_LATENCY, ++ lis->regs[LIS302DL_REG_CLICK_LATENCY]); ++ reg_write(lis, LIS302DL_REG_CLICK_WINDOW, ++ lis->regs[LIS302DL_REG_CLICK_WINDOW]); ++ ++ return 0; ++} ++#else ++#define lis302dl_suspend NULL ++#define lis302dl_resume NULL ++#endif ++ ++static struct spi_driver lis302dl_driver = { ++ .driver = { ++ .name = "lis302dl", ++ .owner = THIS_MODULE, ++ }, ++ ++ .probe = lis302dl_probe, ++ .remove = __devexit_p(lis302dl_remove), ++ .suspend = lis302dl_suspend, ++ .resume = lis302dl_resume, ++}; ++ ++static int __init lis302dl_init(void) ++{ ++ return spi_register_driver(&lis302dl_driver); ++} ++ ++static void __exit lis302dl_exit(void) ++{ ++ spi_unregister_driver(&lis302dl_driver); ++} ++ ++MODULE_AUTHOR("Harald Welte "); ++MODULE_LICENSE("GPL"); ++ ++module_init(lis302dl_init); ++module_exit(lis302dl_exit); +diff --git a/include/linux/lis302dl.h b/include/linux/lis302dl.h +new file mode 100644 +index 0000000..d0f31be +--- /dev/null ++++ b/include/linux/lis302dl.h +@@ -0,0 +1,11 @@ ++#ifndef _LINUX_LIS302DL_H ++#define _LINUX_LIS302DL_H ++ ++#include ++ ++struct lis302dl_platform_data { ++ char *name; ++}; ++ ++#endif /* _LINUX_LIS302DL_H */ ++ +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1039-gta02-leds.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1039-gta02-leds.patch.patch new file mode 100644 index 0000000000..5e5ad45c21 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1039-gta02-leds.patch.patch @@ -0,0 +1,276 @@ +From b265be540c1169a5d6c32c5b09bb3f7b72a96a9d Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:35:53 +0100 +Subject: [PATCH] gta02-leds.patch + +--- + drivers/leds/Kconfig | 6 + + drivers/leds/Makefile | 1 + + drivers/leds/leds-neo1973-gta02.c | 226 +++++++++++++++++++++++++++++++++++++ + 3 files changed, 233 insertions(+), 0 deletions(-) + create mode 100644 drivers/leds/leds-neo1973-gta02.c + +diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig +index 4579a88..2f95707 100644 +--- a/drivers/leds/Kconfig ++++ b/drivers/leds/Kconfig +@@ -120,6 +120,12 @@ config LEDS_NEO1973_VIBRATOR + help + This option enables support for the vibrator on the FIC Neo1973. + ++config LEDS_NEO1973_GTA02 ++ tristate "LED Support for the FIC Neo1973 (GTA02)" ++ depends on LEDS_CLASS && MACH_NEO1973_GTA02 ++ help ++ This option enables support for the LEDs on the FIC Neo1973. ++ + comment "LED Triggers" + + config LEDS_TRIGGERS +diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile +index f64332d..c4ff826 100644 +--- a/drivers/leds/Makefile ++++ b/drivers/leds/Makefile +@@ -20,6 +20,7 @@ obj-$(CONFIG_LEDS_COBALT_RAQ) += leds-cobalt-raq.o + obj-$(CONFIG_LEDS_GPIO) += leds-gpio.o + obj-$(CONFIG_LEDS_CM_X270) += leds-cm-x270.o + obj-$(CONFIG_LEDS_NEO1973_VIBRATOR) += leds-neo1973-vibrator.o ++obj-$(CONFIG_LEDS_NEO1973_GTA02) += leds-neo1973-gta02.o + + # LED Triggers + obj-$(CONFIG_LEDS_TRIGGER_TIMER) += ledtrig-timer.o +diff --git a/drivers/leds/leds-neo1973-gta02.c b/drivers/leds/leds-neo1973-gta02.c +new file mode 100644 +index 0000000..bf1d540 +--- /dev/null ++++ b/drivers/leds/leds-neo1973-gta02.c +@@ -0,0 +1,226 @@ ++/* ++ * LED driver for the FIC Neo1973 GTA02 GSM phone ++ * ++ * (C) 2006-2007 by OpenMoko, Inc. ++ * Author: Harald Welte ++ * All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define MAX_LEDS 3 ++#define COUNTER 256 ++ ++struct gta02_led_priv ++{ ++ struct mutex mutex; ++ struct led_classdev cdev; ++ struct s3c2410_pwm pwm; ++ unsigned int gpio; ++ unsigned int has_pwm; ++}; ++ ++struct gta02_led_bundle ++{ ++ int num_leds; ++ struct gta02_led_priv led[MAX_LEDS]; ++}; ++ ++static inline struct gta02_led_priv *to_priv(struct led_classdev *led_cdev) ++{ ++ return container_of(led_cdev, struct gta02_led_priv, cdev); ++} ++ ++static inline struct gta02_led_bundle *to_bundle(struct led_classdev *led_cdev) ++{ ++ return dev_get_drvdata(led_cdev->dev); ++} ++ ++static void gta02led_set(struct led_classdev *led_cdev, ++ enum led_brightness value) ++{ ++ struct gta02_led_priv *lp = to_priv(led_cdev); ++ ++ /* ++ * value == 255 -> 99% duty cycle (full power) ++ * value == 128 -> 50% duty cycle (medium power) ++ * value == 0 -> 0% duty cycle (zero power) ++ */ ++ mutex_lock(&lp->mutex); ++ if (lp->has_pwm) { ++ s3c2410_pwm_duty_cycle(value, &lp->pwm); ++ } else { ++ if (value) ++ s3c2410_gpio_setpin(lp->gpio, 1); ++ else ++ s3c2410_gpio_setpin(lp->gpio, 0); ++ } ++ mutex_unlock(&lp->mutex); ++} ++ ++#ifdef CONFIG_PM ++static int gta02led_suspend(struct platform_device *pdev, pm_message_t state) ++{ ++ struct gta02_led_bundle *bundle = platform_get_drvdata(pdev); ++ int i; ++ ++ for (i = 0; i < bundle->num_leds; i++) ++ led_classdev_suspend(&bundle->led[i].cdev); ++ ++ return 0; ++} ++ ++static int gta02led_resume(struct platform_device *pdev) ++{ ++ struct gta02_led_bundle *bundle = platform_get_drvdata(pdev); ++ int i; ++ ++ for (i = 0; i < bundle->num_leds; i++) ++ led_classdev_resume(&bundle->led[i].cdev); ++ ++ return 0; ++} ++#endif ++ ++static int __init gta02led_probe(struct platform_device *pdev) ++{ ++ int i, rc; ++ struct gta02_led_bundle *bundle; ++ ++ if (!machine_is_neo1973_gta02()) ++ return -EIO; ++ ++ bundle = kzalloc(sizeof(struct gta02_led_bundle), GFP_KERNEL); ++ if (!bundle) ++ return -ENOMEM; ++ platform_set_drvdata(pdev, bundle); ++ ++ for (i = 0; i < pdev->num_resources; i++) { ++ struct gta02_led_priv *lp; ++ struct resource *r; ++ ++ if (i >= MAX_LEDS) ++ break; ++ ++ r = platform_get_resource(pdev, 0, i); ++ if (!r || !r->start || !r->name) ++ continue; ++ ++ lp = &bundle->led[i]; ++ ++ lp->gpio = r->start; ++ lp->cdev.name = r->name; ++ lp->cdev.brightness_set = gta02led_set; ++ ++ switch (lp->gpio) { ++ case S3C2410_GPB0: ++ lp->has_pwm = 1; ++ lp->pwm.timerid = PWM0; ++ s3c2410_gpio_cfgpin(lp->gpio, S3C2410_GPB0_TOUT0); ++ break; ++ case S3C2410_GPB1: ++ lp->has_pwm = 1; ++ lp->pwm.timerid = PWM1; ++ s3c2410_gpio_cfgpin(lp->gpio, S3C2410_GPB1_TOUT1); ++ break; ++ case S3C2410_GPB2: ++ lp->has_pwm = 1; ++ lp->pwm.timerid = PWM2; ++ s3c2410_gpio_cfgpin(lp->gpio, S3C2410_GPB2_TOUT2); ++ break; ++ case S3C2410_GPB3: ++ lp->has_pwm = 1; ++ lp->pwm.timerid = PWM3; ++ s3c2410_gpio_cfgpin(lp->gpio, S3C2410_GPB3_TOUT3); ++ break; ++ default: ++ break; ++ } ++ ++ lp->pwm.prescaler = 0; ++ lp->pwm.divider = S3C2410_TCFG1_MUX3_DIV8; ++ lp->pwm.counter = COUNTER; ++ lp->pwm.comparer = COUNTER; ++ s3c2410_pwm_enable(&lp->pwm); ++ s3c2410_pwm_start(&lp->pwm); ++ ++ switch (lp->gpio) { ++ case S3C2410_GPB0: ++ case S3C2410_GPB1: ++ case S3C2410_GPB2: ++ lp->has_pwm = 0; ++ s3c2410_gpio_cfgpin(lp->gpio, S3C2410_GPIO_OUTPUT); ++ s3c2410_gpio_setpin(lp->gpio, 0); ++ break; ++ default: ++ break; ++ } ++ ++ mutex_init(&lp->mutex); ++ rc = led_classdev_register(&pdev->dev, &lp->cdev); ++ } ++ ++ return 0; ++} ++ ++static int gta02led_remove(struct platform_device *pdev) ++{ ++ struct gta02_led_bundle *bundle = platform_get_drvdata(pdev); ++ int i; ++ ++ for (i = 0; i < bundle->num_leds; i++) { ++ struct gta02_led_priv *lp = &bundle->led[i]; ++ if (lp->has_pwm) ++ s3c2410_pwm_disable(&lp->pwm); ++ ++ led_classdev_unregister(&lp->cdev); ++ mutex_destroy(&lp->mutex); ++ } ++ ++ platform_set_drvdata(pdev, NULL); ++ kfree(bundle); ++ ++ return 0; ++} ++ ++static struct platform_driver gta02led_driver = { ++ .probe = gta02led_probe, ++ .remove = gta02led_remove, ++#ifdef CONFIG_PM ++ .suspend = gta02led_suspend, ++ .resume = gta02led_resume, ++#endif ++ .driver = { ++ .name = "gta02-led", ++ }, ++}; ++ ++static int __init gta02led_init(void) ++{ ++ return platform_driver_register(>a02led_driver); ++} ++ ++static void __exit gta02led_exit(void) ++{ ++ platform_driver_unregister(>a02led_driver); ++} ++ ++module_init(gta02led_init); ++module_exit(gta02led_exit); ++ ++MODULE_AUTHOR("Harald Welte "); ++MODULE_DESCRIPTION("FIC Neo1973 GTA02 LED driver"); ++MODULE_LICENSE("GPL"); +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1040-gta02-acc.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1040-gta02-acc.patch.patch new file mode 100644 index 0000000000..fdf024fe4b --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1040-gta02-acc.patch.patch @@ -0,0 +1,1023 @@ +From 54bb0bfc6105dc7842d31ab67bd6afb6de0a6a28 Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:36:01 +0100 +Subject: [PATCH] gta02-acc.patch + +--- + arch/arm/mach-s3c2410/mach-gta01.c | 2 +- + arch/arm/mach-s3c2410/mach-qt2410.c | 2 +- + arch/arm/mach-s3c2440/mach-gta02.c | 181 +++++++++++++++-- + drivers/input/misc/lis302dl.c | 350 ++++++++++++------------------- + drivers/spi/spi_s3c24xx_gpio.c | 13 +- + include/asm-arm/arch-s3c2410/spi-gpio.h | 3 +- + include/linux/lis302dl.h | 102 +++++++++ + 7 files changed, 415 insertions(+), 238 deletions(-) + +diff --git a/arch/arm/mach-s3c2410/mach-gta01.c b/arch/arm/mach-s3c2410/mach-gta01.c +index 87bb189..0543daa 100644 +--- a/arch/arm/mach-s3c2410/mach-gta01.c ++++ b/arch/arm/mach-s3c2410/mach-gta01.c +@@ -510,7 +510,7 @@ static struct spi_board_info gta01_spi_board_info[] = { + }, + }; + +-static void spi_gpio_cs(struct s3c2410_spigpio_info *spi, int cs) ++static void spi_gpio_cs(struct s3c2410_spigpio_info *spi, int csidx, int cs) + { + switch (cs) { + case BITBANG_CS_ACTIVE: +diff --git a/arch/arm/mach-s3c2410/mach-qt2410.c b/arch/arm/mach-s3c2410/mach-qt2410.c +index a1caf4b..6f7b56d 100644 +--- a/arch/arm/mach-s3c2410/mach-qt2410.c ++++ b/arch/arm/mach-s3c2410/mach-qt2410.c +@@ -214,7 +214,7 @@ static struct platform_device qt2410_led = { + + /* SPI */ + +-static void spi_gpio_cs(struct s3c2410_spigpio_info *spi, int cs) ++static void spi_gpio_cs(struct s3c2410_spigpio_info *spi, int csidx, int cs) + { + switch (cs) { + case BITBANG_CS_ACTIVE: +diff --git a/arch/arm/mach-s3c2440/mach-gta02.c b/arch/arm/mach-s3c2440/mach-gta02.c +index d11da10..3fbb131 100644 +--- a/arch/arm/mach-s3c2440/mach-gta02.c ++++ b/arch/arm/mach-s3c2440/mach-gta02.c +@@ -78,6 +78,9 @@ + + #include + ++/* arbitrates which sensor IRQ owns the shared SPI bus */ ++static spinlock_t motion_irq_lock; ++ + static struct map_desc gta02_iodesc[] __initdata = { + { + .virtual = 0xe0000000, +@@ -377,8 +380,6 @@ static struct platform_device *gta02_devices[] __initdata = { + &s3c_device_usbgadget, + &s3c_device_nand, + &s3c_device_ts, +- &s3c_device_spi0, +- &s3c_device_spi1, + >a02_nor_flash, + }; + +@@ -478,10 +479,12 @@ static struct spi_board_info gta02_spi_board_info[] = { + }, + }; + ++#if 0 /* currently this is not used and we use gpio spi */ + static struct glamo_spi_info glamo_spi_cfg = { + .board_size = ARRAY_SIZE(gta02_spi_board_info), + .board_info = gta02_spi_board_info, + }; ++#endif /* 0 */ + + static struct glamo_spigpio_info glamo_spigpio_cfg = { + .pin_clk = GLAMO_GPIO10_OUTPUT, +@@ -507,16 +510,99 @@ static struct platform_device gta01_led_dev = { + + /* SPI: Accelerometers attached to SPI of s3c244x */ + +-static void gta02_spi_acc_set_cs(struct s3c2410_spi_info *spi, int cs, int pol) ++/* ++ * Situation is that Linux SPI can't work in an interrupt context, so we ++ * implement our own bitbang here. Arbitration is needed because not only ++ * can this interrupt happen at any time even if foreground wants to use ++ * the bitbang API from Linux, but multiple motion sensors can be on the ++ * same SPI bus, and multiple interrupts can happen. ++ * ++ * Foreground / interrupt arbitration is okay because the interrupts are ++ * disabled around all the foreground SPI code. ++ * ++ * Interrupt / Interrupt arbitration is evidently needed, otherwise we ++ * lose edge-triggered service after a while due to the two sensors sharing ++ * the SPI bus having irqs at the same time eventually. ++ * ++ * Servicing is typ 75 - 100us at 400MHz. ++ */ ++ ++/* #define DEBUG_SPEW_MS */ ++#define MG_PER_SAMPLE 18 ++ ++void gat02_lis302dl_bitbang_read(struct lis302dl_info *lis) + { +- s3c2410_gpio_setpin(cs, pol); ++ struct lis302dl_platform_data *pdata = lis->pdata; ++ u8 shifter = 0xc0 | LIS302DL_REG_OUT_X; /* read, autoincrement */ ++ int n, n1; ++ unsigned long flags; ++#ifdef DEBUG_SPEW_MS ++ s8 x, y, z; ++#endif ++ ++ spin_lock_irqsave(&motion_irq_lock, flags); ++ s3c2410_gpio_setpin(pdata->pin_chip_select, 0); ++ for (n = 0; n < 8; n++) { /* write the r/w, inc and address */ ++ s3c2410_gpio_setpin(pdata->pin_clk, 0); ++ s3c2410_gpio_setpin(pdata->pin_mosi, (shifter >> 7) & 1); ++ s3c2410_gpio_setpin(pdata->pin_clk, 1); ++ shifter <<= 1; ++ } ++ for (n = 0; n < 5; n++) { /* 5 consequetive registers */ ++ for (n1 = 0; n1 < 8; n1++) { /* 8 bits each */ ++ s3c2410_gpio_setpin(pdata->pin_clk, 0); ++ s3c2410_gpio_setpin(pdata->pin_clk, 1); ++ shifter <<= 1; ++ if (s3c2410_gpio_getpin(pdata->pin_miso)) ++ shifter |= 1; ++ } ++ switch (n) { ++ case 0: ++#ifdef DEBUG_SPEW_MS ++ x = shifter; ++#endif ++ input_report_rel(lis->input_dev, REL_X, MG_PER_SAMPLE * (s8)shifter); ++ break; ++ case 2: ++#ifdef DEBUG_SPEW_MS ++ y = shifter; ++#endif ++ input_report_rel(lis->input_dev, REL_Y, MG_PER_SAMPLE * (s8)shifter); ++ break; ++ case 4: ++#ifdef DEBUG_SPEW_MS ++ z = shifter; ++#endif ++ input_report_rel(lis->input_dev, REL_Z, MG_PER_SAMPLE * (s8)shifter); ++ break; ++ } ++ } ++ s3c2410_gpio_setpin(pdata->pin_chip_select, 1); ++ spin_unlock_irqrestore(&motion_irq_lock, flags); ++ input_sync(lis->input_dev); ++#ifdef DEBUG_SPEW_MS ++ printk("%s: %d %d %d\n", pdata->name, x, y, z); ++#endif + } + +-static const struct lis302dl_platform_data lis302_pdata[] = { ++ ++struct lis302dl_platform_data lis302_pdata[] = { + { +- .name = "lis302-1 (top)" ++ .name = "lis302-1 (top)", ++ .pin_chip_select= S3C2410_GPD12, ++ .pin_clk = S3C2410_GPG7, ++ .pin_mosi = S3C2410_GPG6, ++ .pin_miso = S3C2410_GPG5, ++ .open_drain = 1, /* altered at runtime by PCB rev */ ++ .lis302dl_bitbang_read = gat02_lis302dl_bitbang_read, + }, { +- .name = "lis302-2 (bottom)" ++ .name = "lis302-2 (bottom)", ++ .pin_chip_select= S3C2410_GPD13, ++ .pin_clk = S3C2410_GPG7, ++ .pin_mosi = S3C2410_GPG6, ++ .pin_miso = S3C2410_GPG5, ++ .open_drain = 1, /* altered at runtime by PCB rev */ ++ .lis302dl_bitbang_read = gat02_lis302dl_bitbang_read, + }, + }; + +@@ -525,26 +611,75 @@ static struct spi_board_info gta02_spi_acc_bdinfo[] = { + .modalias = "lis302dl", + .platform_data = &lis302_pdata[0], + .irq = GTA02_IRQ_GSENSOR_1, +- .max_speed_hz = 400 * 1000, ++ .max_speed_hz = 10 * 1000 * 1000, + .bus_num = 1, +- .chip_select = S3C2410_GPD12, ++ .chip_select = 0, + .mode = SPI_MODE_3, + }, + { + .modalias = "lis302dl", + .platform_data = &lis302_pdata[1], + .irq = GTA02_IRQ_GSENSOR_2, +- .max_speed_hz = 400 * 1000, ++ .max_speed_hz = 10 * 1000 * 1000, + .bus_num = 1, +- .chip_select = S3C2410_GPD13, ++ .chip_select = 1, + .mode = SPI_MODE_3, + }, + }; + +-static struct s3c2410_spi_info gta02_spi_acc_cfg = { +- .set_cs = gta02_spi_acc_set_cs, ++static void spi_acc_cs(struct s3c2410_spigpio_info *spigpio_info, ++ int csid, int cs) ++{ ++ struct lis302dl_platform_data * plat_data = ++ (struct lis302dl_platform_data *)spigpio_info-> ++ board_info->platform_data; ++ switch (cs) { ++ case BITBANG_CS_ACTIVE: ++ s3c2410_gpio_setpin(plat_data[csid].pin_chip_select, 0); ++ break; ++ case BITBANG_CS_INACTIVE: ++ s3c2410_gpio_setpin(plat_data[csid].pin_chip_select, 1); ++ break; ++ } ++} ++ ++static struct s3c2410_spigpio_info spi_gpio_cfg = { ++ .pin_clk = S3C2410_GPG7, ++ .pin_mosi = S3C2410_GPG6, ++ .pin_miso = S3C2410_GPG5, + .board_size = ARRAY_SIZE(gta02_spi_acc_bdinfo), + .board_info = gta02_spi_acc_bdinfo, ++ .chip_select = &spi_acc_cs, ++ .num_chipselect = 2, ++}; ++ ++static struct resource s3c_spi_acc_resource[] = { ++ [0] = { ++ .start = S3C2410_GPG3, ++ .end = S3C2410_GPG3, ++ }, ++ [1] = { ++ .start = S3C2410_GPG5, ++ .end = S3C2410_GPG5, ++ }, ++ [2] = { ++ .start = S3C2410_GPG6, ++ .end = S3C2410_GPG6, ++ }, ++ [3] = { ++ .start = S3C2410_GPG7, ++ .end = S3C2410_GPG7, ++ }, ++}; ++ ++static struct platform_device s3c_device_spi_acc = { ++ .name = "spi_s3c24xx_gpio", ++ .id = 1, ++ .num_resources = ARRAY_SIZE(s3c_spi_acc_resource), ++ .resource = s3c_spi_acc_resource, ++ .dev = { ++ .platform_data = &spi_gpio_cfg, ++ }, + }; + + static struct resource gta02_led_resources[] = { +@@ -786,10 +921,21 @@ static void __init gta02_machine_init(void) + { + int rc; + ++ switch (system_rev) { ++ case GTA02v6_SYSTEM_REV: ++ /* we need push-pull interrupt from motion sensors */ ++ lis302_pdata[0].open_drain = 0; ++ lis302_pdata[1].open_drain = 0; ++ break; ++ default: ++ break; ++ } ++ ++ spin_lock_init(&motion_irq_lock); ++ + s3c_device_usb.dev.platform_data = >a02_usb_info; + s3c_device_nand.dev.platform_data = >a02_nand_info; + s3c_device_sdi.dev.platform_data = >a02_mmc_cfg; +- s3c_device_spi1.dev.platform_data = >a02_spi_acc_cfg; + + /* Only GTA02v1 has a SD_DETECT GPIO. Since the slot is not + * hot-pluggable, this is not required anyway */ +@@ -801,6 +947,12 @@ static void __init gta02_machine_init(void) + break; + } + ++ /* acc sensor chip selects */ ++ s3c2410_gpio_setpin(S3C2410_GPD12, 1); ++ s3c2410_gpio_cfgpin(S3C2410_GPD12, S3C2410_GPIO_OUTPUT); ++ s3c2410_gpio_setpin(S3C2410_GPD13, 1); ++ s3c2410_gpio_cfgpin(S3C2410_GPD13, S3C2410_GPIO_OUTPUT); ++ + INIT_WORK(>a02_udc_vbus_drawer.work, __gta02_udc_vbus_draw); + s3c24xx_udc_set_platdata(>a02_udc_cfg); + set_s3c2410ts_info(>a02_ts_cfg); +@@ -829,6 +981,7 @@ static void __init gta02_machine_init(void) + break; + } + ++ platform_device_register(&s3c_device_spi_acc); + platform_device_register(>a01_button_dev); + platform_device_register(>a01_pm_gsm_dev); + +diff --git a/drivers/input/misc/lis302dl.c b/drivers/input/misc/lis302dl.c +index 45c41c8..36bdcf7 100644 +--- a/drivers/input/misc/lis302dl.c ++++ b/drivers/input/misc/lis302dl.c +@@ -33,117 +33,26 @@ + #include + #include + #include +-#include + #include + #include + #include + + #include + +-#include +- +-#define LIS302DL_WHO_AM_I_MAGIC 0x3b +- +-enum lis302dl_reg { +- LIS302DL_REG_WHO_AM_I = 0x0f, +- LIS302DL_REG_CTRL1 = 0x20, +- LIS302DL_REG_CTRL2 = 0x21, +- LIS302DL_REG_CTRL3 = 0x22, +- LIS302DL_REG_HP_FILTER_RESET = 0x23, +- LIS302DL_REG_STATUS = 0x27, +- LIS302DL_REG_OUT_X = 0x29, +- LIS302DL_REG_OUT_Y = 0x2b, +- LIS302DL_REG_OUT_Z = 0x2d, +- LIS302DL_REG_FF_WU_CFG_1 = 0x30, +- LIS302DL_REG_FF_WU_SRC_1 = 0x31, +- LIS302DL_REG_FF_WU_THS_1 = 0x32, +- LIS302DL_REG_FF_WU_DURATION_1 = 0x33, +- LIS302DL_REG_FF_WU_CFG_2 = 0x34, +- LIS302DL_REG_FF_WU_SRC_2 = 0x35, +- LIS302DL_REG_FF_WU_THS_2 = 0x36, +- LIS302DL_REG_FF_WU_DURATION_2 = 0x37, +- LIS302DL_REG_CLICK_CFG = 0x38, +- LIS302DL_REG_CLICK_SRC = 0x39, +- LIS302DL_REG_CLICK_THSY_X = 0x3b, +- LIS302DL_REG_CLICK_THSZ = 0x3c, +- LIS302DL_REG_CLICK_TIME_LIMIT = 0x3d, +- LIS302DL_REG_CLICK_LATENCY = 0x3e, +- LIS302DL_REG_CLICK_WINDOW = 0x3f, +-}; +- +-enum lis302dl_reg_ctrl1 { +- LIS302DL_CTRL1_Xen = 0x01, +- LIS302DL_CTRL1_Yen = 0x02, +- LIS302DL_CTRL1_Zen = 0x04, +- LIS302DL_CTRL1_STM = 0x08, +- LIS302DL_CTRL1_STP = 0x10, +- LIS302DL_CTRL1_FS = 0x20, +- LIS302DL_CTRL1_PD = 0x40, +- LIS302DL_CTRL1_DR = 0x80, +-}; +- +-enum lis302dl_reg_ctrl3 { +- LIS302DL_CTRL3_PP_OD = 0x40, +-}; +- +-enum lis302dl_reg_status { +- LIS302DL_STATUS_XDA = 0x01, +- LIS302DL_STATUS_YDA = 0x02, +- LIS302DL_STATUS_ZDA = 0x04, +- LIS302DL_STATUS_XYZDA = 0x08, +- LIS302DL_STATUS_XOR = 0x10, +- LIS302DL_STATUS_YOR = 0x20, +- LIS302DL_STATUS_ZOR = 0x40, +- LIS302DL_STATUS_XYZOR = 0x80, +-}; +- +-enum lis302dl_reg_ffwusrc1 { +- LIS302DL_FFWUSRC1_XL = 0x01, +- LIS302DL_FFWUSRC1_XH = 0x02, +- LIS302DL_FFWUSRC1_YL = 0x04, +- LIS302DL_FFWUSRC1_YH = 0x08, +- LIS302DL_FFWUSRC1_ZL = 0x10, +- LIS302DL_FFWUSRC1_ZH = 0x20, +- LIS302DL_FFWUSRC1_IA = 0x40, +-}; +- +-enum lis302dl_reg_cloik_src { +- LIS302DL_CLICKSRC_SINGLE_X = 0x01, +- LIS302DL_CLICKSRC_DOUBLE_X = 0x02, +- LIS302DL_CLICKSRC_SINGLE_Y = 0x04, +- LIS302DL_CLICKSRC_DOUBLE_Y = 0x08, +- LIS302DL_CLICKSRC_SINGLE_Z = 0x10, +- LIS302DL_CLICKSRC_DOUBLE_Z = 0x20, +- LIS302DL_CLICKSRC_IA = 0x40, +-}; +- +-struct lis302dl_info { +- struct spi_device *spi_dev; +- struct input_dev *input_dev; +- struct mutex lock; +- struct work_struct work; +- unsigned int flags; +- unsigned int working; +- u_int8_t regs[0x40]; +-}; +- +-#define LIS302DL_F_WUP_FF 0x0001 /* wake up from free fall */ +-#define LIS302DL_F_WUP_CLICK 0x0002 +-#define LIS302DL_F_POWER 0x0010 +-#define LIS302DL_F_FS 0x0020 /* ADC full scale */ +- + /* lowlevel register access functions */ + +-#define READ_BIT 0x01 +-#define MS_BIT 0x02 +-#define ADDR_SHIFT 2 ++#define READ_BIT 0x80 ++#define READ_BIT_INC_ADS 0xc0 ++#define ADDR_MASK 0x3f + +-static inline u_int8_t __reg_read(struct lis302dl_info *lis, u_int8_t reg) ++static u_int8_t __reg_read(struct lis302dl_info *lis, u_int8_t reg) + { + int rc; + u_int8_t cmd; + +- cmd = (reg << ADDR_SHIFT) | READ_BIT; ++ BUG_ON(reg & ~ADDR_MASK); ++ ++ cmd = reg | READ_BIT; + + rc = spi_w8r8(lis->spi_dev, cmd); + +@@ -161,11 +70,13 @@ static u_int8_t reg_read(struct lis302dl_info *lis, u_int8_t reg) + return ret; + } + +-static inline int __reg_write(struct lis302dl_info *lis, u_int8_t reg, u_int8_t val) ++static int __reg_write(struct lis302dl_info *lis, u_int8_t reg, u_int8_t val) + { + u_int8_t buf[2]; + +- buf[0] = (reg << ADDR_SHIFT); ++ BUG_ON(reg & ~ADDR_MASK); ++ ++ buf[0] = reg; + buf[1] = val; + + return spi_write(lis->spi_dev, buf, sizeof(buf)); +@@ -207,10 +118,10 @@ static int reg_set_bit_mask(struct lis302dl_info *lis, + enum lis302dl_intmode { + LIS302DL_INTMODE_GND = 0x00, + LIS302DL_INTMODE_FF_WU_1 = 0x01, +- LIX302DL_INTMODE_FF_WU_2 = 0x02, +- LIX302DL_INTMODE_FF_WU_12 = 0x03, +- LIX302DL_INTMODE_DATA_READY = 0x04, +- LIX302DL_INTMODE_CLICK = 0x07, ++ LIS302DL_INTMODE_FF_WU_2 = 0x02, ++ LIS302DL_INTMODE_FF_WU_12 = 0x03, ++ LIS302DL_INTMODE_DATA_READY = 0x04, ++ LIS302DL_INTMODE_CLICK = 0x07, + }; + + static void lis302dl_int_mode(struct spi_device *spi, int int_pin, +@@ -218,12 +129,18 @@ static void lis302dl_int_mode(struct spi_device *spi, int int_pin, + { + struct lis302dl_info *lis = dev_get_drvdata(&spi->dev); + +- if (int_pin == 1) ++ switch (int_pin) { ++ case 1: + reg_set_bit_mask(lis, LIS302DL_REG_CTRL3, 0x07, mode); +- else if (int_pin == 2) ++ break; ++ case 2: + reg_set_bit_mask(lis, LIS302DL_REG_CTRL3, 0x38, mode << 3); ++ break; ++ default: ++ BUG(); ++ } + } +- ++#if 0 + static void _report_btn_single(struct input_dev *inp, int btn) + { + input_report_key(inp, btn, 1); +@@ -241,95 +158,14 @@ static void _report_btn_double(struct input_dev *inp, int btn) + input_sync(inp); + input_report_key(inp, btn, 0); + } ++#endif + +-static void lis302dl_work(struct work_struct *work) +-{ +- struct lis302dl_info *lis = +- container_of(work, struct lis302dl_info, work); +- +- u_int8_t status, ff_wu_src_1, click_src; +- u_int8_t val; +- +- lis->working = 1; +- +- status = reg_read(lis, LIS302DL_REG_STATUS); +- ff_wu_src_1 = reg_read(lis, LIS302DL_REG_FF_WU_SRC_1); +- click_src = reg_read(lis, LIS302DL_REG_CLICK_SRC); +- +- if (status & LIS302DL_STATUS_XDA) { +- val = reg_read(lis, LIS302DL_REG_OUT_X); +- if (lis->flags & LIS302DL_F_FS) +- val = val << 2; +- input_report_rel(lis->input_dev, REL_X, val); +- } +- +- if (status & LIS302DL_STATUS_YDA) { +- val = reg_read(lis, LIS302DL_REG_OUT_Y); +- if (lis->flags & LIS302DL_F_FS) +- val = val << 2; +- input_report_rel(lis->input_dev, REL_Y, val); +- } +- +- if (status & LIS302DL_STATUS_ZDA) { +- val = reg_read(lis, LIS302DL_REG_OUT_Z); +- if (lis->flags & LIS302DL_F_FS) +- val = val << 2; +- input_report_rel(lis->input_dev, REL_Z, val); +- } +- +- if (status & 0xf0) +- dev_dbg(&lis->spi_dev->dev, "overrun!\n"); +- +- /* FIXME: implement overrun statistics */ +- +- if (ff_wu_src_1 & LIS302DL_FFWUSRC1_IA) { +- /* FIXME: free fall interrupt handling */ +- } +- +- if (click_src & LIS302DL_CLICKSRC_IA) { +- if (click_src & LIS302DL_CLICKSRC_SINGLE_X) +- _report_btn_single(lis->input_dev, BTN_X); +- if (click_src & LIS302DL_CLICKSRC_DOUBLE_X) +- _report_btn_double(lis->input_dev, BTN_X); +- +- if (click_src & LIS302DL_CLICKSRC_SINGLE_Y) +- _report_btn_single(lis->input_dev, BTN_Y); +- if (click_src & LIS302DL_CLICKSRC_DOUBLE_Y) +- _report_btn_double(lis->input_dev, BTN_Y); +- +- if (click_src & LIS302DL_CLICKSRC_SINGLE_Z) +- _report_btn_single(lis->input_dev, BTN_Z); +- if (click_src & LIS302DL_CLICKSRC_DOUBLE_Z) +- _report_btn_double(lis->input_dev, BTN_Z); +- } +- +- lis->working = 0; +- input_sync(lis->input_dev); +- put_device(&lis->spi_dev->dev); +- +- enable_irq(lis->spi_dev->irq); +-} +- +-static void lis302dl_schedule_work(struct lis302dl_info *lis) +-{ +- int status; +- +- get_device(&lis->spi_dev->dev); +- status = schedule_work(&lis->work); +- if (!status && !lis->working) +- dev_dbg(&lis->spi_dev->dev, "work item may be lost\n"); +-} + + static irqreturn_t lis302dl_interrupt(int irq, void *_lis) + { + struct lis302dl_info *lis = _lis; + +- lis302dl_schedule_work(lis); +- +- /* Disable any further interrupts until we have processed +- * the current one */ +- disable_irq(lis->spi_dev->irq); +- ++ (lis->pdata->lis302dl_bitbang_read)(lis); + return IRQ_HANDLED; + } + +@@ -388,6 +224,7 @@ static DEVICE_ATTR(full_scale, S_IRUGO | S_IWUSR, show_scale, set_scale); + static struct attribute *lis302dl_sysfs_entries[] = { + &dev_attr_sample_rate.attr, + &dev_attr_full_scale.attr, ++ NULL + }; + + static struct attribute_group lis302dl_attr_group = { +@@ -402,9 +239,16 @@ static int lis302dl_input_open(struct input_dev *inp) + struct lis302dl_info *lis = inp->private; + u_int8_t ctrl1 = LIS302DL_CTRL1_PD | LIS302DL_CTRL1_Xen | + LIS302DL_CTRL1_Yen | LIS302DL_CTRL1_Zen; ++ unsigned long flags; + ++ local_save_flags(flags); + /* make sure we're powered up and generate data ready */ + reg_set_bit_mask(lis, LIS302DL_REG_CTRL1, ctrl1, ctrl1); ++ local_irq_restore(flags); ++ ++ /* kick it off -- since we are edge triggered, if we missed the edge ++ * permanent low interrupt is death for us */ ++ (lis->pdata->lis302dl_bitbang_read)(lis); + + return 0; + } +@@ -414,9 +258,12 @@ static void lis302dl_input_close(struct input_dev *inp) + struct lis302dl_info *lis = inp->private; + u_int8_t ctrl1 = LIS302DL_CTRL1_Xen | LIS302DL_CTRL1_Yen | + LIS302DL_CTRL1_Zen; ++ unsigned long flags; ++ ++ local_save_flags(flags); + + /* since the input core already serializes access and makes sure we +- * only see close() for the close of the lastre user, we can safely ++ * only see close() for the close of the last user, we can safely + * disable the data ready events */ + reg_set_bit_mask(lis, LIS302DL_REG_CTRL1, ctrl1, 0x00); + +@@ -426,6 +273,7 @@ static void lis302dl_input_close(struct input_dev *inp) + reg_set_bit_mask(lis, LIS302DL_REG_CTRL1, LIS302DL_CTRL1_PD, + 0x00); + } ++ local_irq_restore(flags); + } + + static int __devinit lis302dl_probe(struct spi_device *spi) +@@ -433,84 +281,138 @@ static int __devinit lis302dl_probe(struct spi_device *spi) + int rc; + struct lis302dl_info *lis; + u_int8_t wai; ++ unsigned long flags; ++ struct lis302dl_platform_data *pdata; + + lis = kzalloc(sizeof(*lis), GFP_KERNEL); + if (!lis) + return -ENOMEM; + ++ local_save_flags(flags); ++ + mutex_init(&lis->lock); +- INIT_WORK(&lis->work, lis302dl_work); + lis->spi_dev = spi; + + spi_set_drvdata(spi, lis); + ++ pdata = spi->dev.platform_data; ++ + rc = spi_setup(spi); + if (rc < 0) { +- printk(KERN_ERR "error durign spi_setup of lis302dl driver\n"); ++ dev_err(&spi->dev, "error during spi_setup\n"); + dev_set_drvdata(&spi->dev, NULL); +- kfree(lis); +- return rc; ++ goto bail_free_lis; + } + + wai = reg_read(lis, LIS302DL_REG_WHO_AM_I); + if (wai != LIS302DL_WHO_AM_I_MAGIC) { +- printk(KERN_ERR "unknown who_am_i signature 0x%02x\n", wai); ++ dev_err(&spi->dev, "unknown who_am_i signature 0x%02x\n", wai); + dev_set_drvdata(&spi->dev, NULL); +- kfree(lis); +- return -ENODEV; +- } +- +- /* switch interrupt to open collector */ +- reg_write(lis, LIS302DL_CTRL3_PP_OD, 0x7c); +- +- rc = request_irq(lis->spi_dev->irq, lis302dl_interrupt, IRQF_DISABLED, +- "lis302dl", NULL); +- if (rc < 0) { +- dev_err(&spi->dev, "error requesting IRQ %d\n", +- lis->spi_dev->irq); +- /* FIXME */ +- return rc; ++ rc = -ENODEV; ++ goto bail_free_lis; + } + + rc = sysfs_create_group(&spi->dev.kobj, &lis302dl_attr_group); + if (rc) { + dev_err(&spi->dev, "error creating sysfs group\n"); +- /* FIXME */ +- return rc; ++ goto bail_free_lis; + } + + /* initialize input layer details */ + lis->input_dev = input_allocate_device(); + if (!lis->input_dev) { + dev_err(&spi->dev, "Unable to allocate input device\n"); +- /* FIXME */ ++ goto bail_sysfs; + } + + set_bit(EV_REL, lis->input_dev->evbit); +- set_bit(EV_KEY, lis->input_dev->evbit); ++ set_bit(REL_X, lis->input_dev->relbit); ++ set_bit(REL_Y, lis->input_dev->relbit); ++ set_bit(REL_Z, lis->input_dev->relbit); ++/* set_bit(EV_KEY, lis->input_dev->evbit); + set_bit(BTN_X, lis->input_dev->keybit); + set_bit(BTN_Y, lis->input_dev->keybit); + set_bit(BTN_Z, lis->input_dev->keybit); +- ++*/ + lis->input_dev->private = lis; +- lis->input_dev->name = "lis302dl"; /* FIXME: platform data */ +- lis->input_dev->id.bustype = BUS_I2C; /* FIXME: SPI Bus */ ++ lis->input_dev->name = pdata->name; ++ /* SPI Bus not defined as a valid bus for input subsystem*/ ++ lis->input_dev->id.bustype = BUS_I2C; /* lie about it */ + lis->input_dev->open = lis302dl_input_open; + lis->input_dev->close = lis302dl_input_close; + +- input_register_device(lis->input_dev); ++ rc = input_register_device(lis->input_dev); ++ if (rc) { ++ dev_err(&spi->dev, "error %d registering input device\n", rc); ++ goto bail_inp_dev; ++ } ++ ++ reg_write(lis, LIS302DL_REG_CTRL1, 0x47); ++ reg_write(lis, LIS302DL_REG_CTRL3, 0xc0); ++ reg_write(lis, LIS302DL_REG_FF_WU_THS_1, 0x14); ++ reg_write(lis, LIS302DL_REG_FF_WU_DURATION_1, 0x00); ++ reg_write(lis, LIS302DL_REG_FF_WU_CFG_1, 0x95); ++ ++ reg_write(lis, LIS302DL_REG_CTRL1, LIS302DL_CTRL1_Xen | ++ LIS302DL_CTRL1_Yen | ++ LIS302DL_CTRL1_Zen); ++ ++ if (pdata->open_drain) ++ /* switch interrupt to open collector, active-low */ ++ reg_write(lis, LIS302DL_REG_CTRL3, LIS302DL_CTRL3_PP_OD | ++ LIS302DL_CTRL3_IHL); ++ else ++ /* push-pull, active-low */ ++ reg_write(lis, LIS302DL_REG_CTRL3, LIS302DL_CTRL3_IHL); ++ ++ lis302dl_int_mode(spi, 1, LIS302DL_INTMODE_DATA_READY); ++ lis302dl_int_mode(spi, 2, LIS302DL_INTMODE_DATA_READY); ++ ++ reg_read(lis, LIS302DL_REG_STATUS); ++ reg_read(lis, LIS302DL_REG_FF_WU_SRC_1); ++ reg_read(lis, LIS302DL_REG_FF_WU_SRC_2); ++ reg_read(lis, LIS302DL_REG_CLICK_SRC); + ++ dev_info(&spi->dev, "Found %s\n", pdata->name); ++ ++ lis->pdata = pdata; ++ ++ rc = request_irq(lis->spi_dev->irq, lis302dl_interrupt, ++ IRQF_TRIGGER_FALLING, "lis302dl", lis); ++ if (rc < 0) { ++ dev_err(&spi->dev, "error requesting IRQ %d\n", ++ lis->spi_dev->irq); ++ goto bail_inp_reg; ++ } ++ local_irq_restore(flags); + return 0; ++ ++bail_inp_reg: ++ input_unregister_device(lis->input_dev); ++bail_inp_dev: ++ input_free_device(lis->input_dev); ++bail_sysfs: ++ sysfs_remove_group(&spi->dev.kobj, &lis302dl_attr_group); ++bail_free_lis: ++ kfree(lis); ++ local_irq_restore(flags); ++ return rc; + } + + static int __devexit lis302dl_remove(struct spi_device *spi) + { + struct lis302dl_info *lis = dev_get_drvdata(&spi->dev); ++ unsigned long flags; + + /* power down the device */ ++ local_save_flags(flags); + reg_write(lis, LIS302DL_REG_CTRL1, 0x00); ++ local_irq_restore(flags); ++ + sysfs_remove_group(&spi->dev.kobj, &lis302dl_attr_group); + input_unregister_device(lis->input_dev); ++ if (lis->input_dev) ++ input_free_device(lis->input_dev); + dev_set_drvdata(&spi->dev, NULL); + kfree(lis); + +@@ -521,6 +423,10 @@ static int __devexit lis302dl_remove(struct spi_device *spi) + static int lis302dl_suspend(struct spi_device *spi, pm_message_t state) + { + struct lis302dl_info *lis = dev_get_drvdata(&spi->dev); ++ unsigned long flags; ++ ++ disable_irq(lis->spi_dev->irq); ++ local_save_flags(flags); + + /* save registers */ + lis->regs[LIS302DL_REG_CTRL1] = reg_read(lis, LIS302DL_REG_CTRL1); +@@ -561,12 +467,17 @@ static int lis302dl_suspend(struct spi_device *spi, pm_message_t state) + reg_write(lis, LIS302DL_REG_CTRL1, tmp); + } + ++ local_irq_restore(flags); ++ + return 0; + } + + static int lis302dl_resume(struct spi_device *spi) + { + struct lis302dl_info *lis = dev_get_drvdata(&spi->dev); ++ unsigned long flags; ++ ++ local_save_flags(flags); + + /* restore registers after resume */ + reg_write(lis, LIS302DL_REG_CTRL1, lis->regs[LIS302DL_REG_CTRL1]); +@@ -597,6 +508,9 @@ static int lis302dl_resume(struct spi_device *spi) + reg_write(lis, LIS302DL_REG_CLICK_WINDOW, + lis->regs[LIS302DL_REG_CLICK_WINDOW]); + ++ local_irq_restore(flags); ++ enable_irq(lis->spi_dev->irq); ++ + return 0; + } + #else +diff --git a/drivers/spi/spi_s3c24xx_gpio.c b/drivers/spi/spi_s3c24xx_gpio.c +index 109d82c..03b73dd 100644 +--- a/drivers/spi/spi_s3c24xx_gpio.c ++++ b/drivers/spi/spi_s3c24xx_gpio.c +@@ -91,7 +91,7 @@ static void s3c2410_spigpio_chipselect(struct spi_device *dev, int value) + struct s3c2410_spigpio *sg = spidev_to_sg(dev); + + if (sg->info && sg->info->chip_select) +- (sg->info->chip_select)(sg->info, value); ++ (sg->info->chip_select)(sg->info, dev->chip_select, value); + } + + static int s3c2410_spigpio_probe(struct platform_device *dev) +@@ -113,9 +113,11 @@ static int s3c2410_spigpio_probe(struct platform_device *dev) + + platform_set_drvdata(dev, sp); + +- /* copy in the plkatform data */ ++ /* copy in the platform data */ + info = sp->info = dev->dev.platform_data; + ++ master->num_chipselect = info->num_chipselect; ++ + /* setup spi bitbang adaptor */ + sp->bitbang.master = spi_master_get(master); + sp->bitbang.master->bus_num = info->bus_num; +@@ -146,12 +148,17 @@ static int s3c2410_spigpio_probe(struct platform_device *dev) + /* register the chips to go with the board */ + + for (i = 0; i < sp->info->board_size; i++) { ++ struct spi_device *spidev; ++ + dev_info(&dev->dev, "registering %p: %s\n", + &sp->info->board_info[i], + sp->info->board_info[i].modalias); + + sp->info->board_info[i].controller_data = sp; +- spi_new_device(master, sp->info->board_info + i); ++ spidev = spi_new_device(master, sp->info->board_info + i); ++ if (spidev) ++ spidev->max_speed_hz = ++ sp->info->board_info[i].max_speed_hz; + } + + return 0; +diff --git a/include/asm-arm/arch-s3c2410/spi-gpio.h b/include/asm-arm/arch-s3c2410/spi-gpio.h +index ba1dca8..03dea09 100644 +--- a/include/asm-arm/arch-s3c2410/spi-gpio.h ++++ b/include/asm-arm/arch-s3c2410/spi-gpio.h +@@ -22,11 +22,12 @@ struct s3c2410_spigpio_info { + unsigned long pin_miso; + + int bus_num; ++ int num_chipselect; + + unsigned long board_size; + struct spi_board_info *board_info; + +- void (*chip_select)(struct s3c2410_spigpio_info *spi, int cs); ++ void (*chip_select)(struct s3c2410_spigpio_info *spi, int csid, int cs); + }; + + +diff --git a/include/linux/lis302dl.h b/include/linux/lis302dl.h +index d0f31be..2dea813 100644 +--- a/include/linux/lis302dl.h ++++ b/include/linux/lis302dl.h +@@ -2,10 +2,112 @@ + #define _LINUX_LIS302DL_H + + #include ++#include ++#include ++ ++ ++struct lis302dl_info; + + struct lis302dl_platform_data { + char *name; ++ unsigned long pin_chip_select; ++ unsigned long pin_clk; ++ unsigned long pin_mosi; ++ unsigned long pin_miso; ++ int open_drain; ++ void (*lis302dl_bitbang_read)(struct lis302dl_info *); ++}; ++ ++struct lis302dl_info { ++ struct lis302dl_platform_data *pdata; ++ struct spi_device *spi_dev; ++ struct input_dev *input_dev; ++ struct mutex lock; ++ unsigned int flags; ++ u_int8_t regs[0x40]; ++}; ++ ++enum lis302dl_reg { ++ LIS302DL_REG_WHO_AM_I = 0x0f, ++ LIS302DL_REG_CTRL1 = 0x20, ++ LIS302DL_REG_CTRL2 = 0x21, ++ LIS302DL_REG_CTRL3 = 0x22, ++ LIS302DL_REG_HP_FILTER_RESET = 0x23, ++ LIS302DL_REG_STATUS = 0x27, ++ LIS302DL_REG_OUT_X = 0x29, ++ LIS302DL_REG_OUT_Y = 0x2b, ++ LIS302DL_REG_OUT_Z = 0x2d, ++ LIS302DL_REG_FF_WU_CFG_1 = 0x30, ++ LIS302DL_REG_FF_WU_SRC_1 = 0x31, ++ LIS302DL_REG_FF_WU_THS_1 = 0x32, ++ LIS302DL_REG_FF_WU_DURATION_1 = 0x33, ++ LIS302DL_REG_FF_WU_CFG_2 = 0x34, ++ LIS302DL_REG_FF_WU_SRC_2 = 0x35, ++ LIS302DL_REG_FF_WU_THS_2 = 0x36, ++ LIS302DL_REG_FF_WU_DURATION_2 = 0x37, ++ LIS302DL_REG_CLICK_CFG = 0x38, ++ LIS302DL_REG_CLICK_SRC = 0x39, ++ LIS302DL_REG_CLICK_THSY_X = 0x3b, ++ LIS302DL_REG_CLICK_THSZ = 0x3c, ++ LIS302DL_REG_CLICK_TIME_LIMIT = 0x3d, ++ LIS302DL_REG_CLICK_LATENCY = 0x3e, ++ LIS302DL_REG_CLICK_WINDOW = 0x3f, ++}; ++ ++enum lis302dl_reg_ctrl1 { ++ LIS302DL_CTRL1_Xen = 0x01, ++ LIS302DL_CTRL1_Yen = 0x02, ++ LIS302DL_CTRL1_Zen = 0x04, ++ LIS302DL_CTRL1_STM = 0x08, ++ LIS302DL_CTRL1_STP = 0x10, ++ LIS302DL_CTRL1_FS = 0x20, ++ LIS302DL_CTRL1_PD = 0x40, ++ LIS302DL_CTRL1_DR = 0x80, ++}; ++ ++enum lis302dl_reg_ctrl3 { ++ LIS302DL_CTRL3_PP_OD = 0x40, ++ LIS302DL_CTRL3_IHL = 0x80, + }; + ++enum lis302dl_reg_status { ++ LIS302DL_STATUS_XDA = 0x01, ++ LIS302DL_STATUS_YDA = 0x02, ++ LIS302DL_STATUS_ZDA = 0x04, ++ LIS302DL_STATUS_XYZDA = 0x08, ++ LIS302DL_STATUS_XOR = 0x10, ++ LIS302DL_STATUS_YOR = 0x20, ++ LIS302DL_STATUS_ZOR = 0x40, ++ LIS302DL_STATUS_XYZOR = 0x80, ++}; ++ ++enum lis302dl_reg_ffwusrc1 { ++ LIS302DL_FFWUSRC1_XL = 0x01, ++ LIS302DL_FFWUSRC1_XH = 0x02, ++ LIS302DL_FFWUSRC1_YL = 0x04, ++ LIS302DL_FFWUSRC1_YH = 0x08, ++ LIS302DL_FFWUSRC1_ZL = 0x10, ++ LIS302DL_FFWUSRC1_ZH = 0x20, ++ LIS302DL_FFWUSRC1_IA = 0x40, ++}; ++ ++enum lis302dl_reg_cloik_src { ++ LIS302DL_CLICKSRC_SINGLE_X = 0x01, ++ LIS302DL_CLICKSRC_DOUBLE_X = 0x02, ++ LIS302DL_CLICKSRC_SINGLE_Y = 0x04, ++ LIS302DL_CLICKSRC_DOUBLE_Y = 0x08, ++ LIS302DL_CLICKSRC_SINGLE_Z = 0x10, ++ LIS302DL_CLICKSRC_DOUBLE_Z = 0x20, ++ LIS302DL_CLICKSRC_IA = 0x40, ++}; ++ ++#define LIS302DL_WHO_AM_I_MAGIC 0x3b ++ ++#define LIS302DL_F_WUP_FF 0x0001 /* wake up from free fall */ ++#define LIS302DL_F_WUP_CLICK 0x0002 ++#define LIS302DL_F_POWER 0x0010 ++#define LIS302DL_F_FS 0x0020 /* ADC full scale */ ++ ++ + #endif /* _LINUX_LIS302DL_H */ + +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1041-pcf506xx.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1041-pcf506xx.patch.patch new file mode 100644 index 0000000000..c09f7b9a11 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1041-pcf506xx.patch.patch @@ -0,0 +1,200 @@ +From 825154a75730a9505750384cda1dc47c6edb3a1d Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:36:10 +0100 +Subject: [PATCH] pcf506xx.patch + Moved shared PMU code from pcf50606.h and pcf50633.h (which prevented inclusion + of both at the same time) to pcf506xx.h + +- include/linux/pcf50606.h (struct pmu_voltage_rail, enum pmu_event, pmu_cb): + moved to pcf506xx.h +- include/linux/pcf50633.h (struct pmu_voltage_rail, enum pmu_event, pmu_cb): + moved to pcf506xx.h + +Signed off-by: Werner Almesberger +--- + drivers/i2c/chips/pcf50606.c | 28 +++++++++++++++++++++++++++- + include/linux/pcf50606.h | 23 +++-------------------- + include/linux/pcf50633.h | 27 +++------------------------ + include/linux/pcf506xx.h | 31 +++++++++++++++++++++++++++++++ + 4 files changed, 64 insertions(+), 45 deletions(-) + create mode 100644 include/linux/pcf506xx.h + +diff --git a/drivers/i2c/chips/pcf50606.c b/drivers/i2c/chips/pcf50606.c +index 6626c68..b530583 100644 +--- a/drivers/i2c/chips/pcf50606.c ++++ b/drivers/i2c/chips/pcf50606.c +@@ -102,6 +102,7 @@ struct pcf50606_data { + int allow_close; + int onkey_seconds; + int irq; ++ int coldplug_done; + #ifdef CONFIG_PM + struct { + u_int8_t dcdc1, dcdc2; +@@ -573,6 +574,30 @@ static void pcf50606_work(struct work_struct *work) + if (ret != 3) + DEBUGPC("Oh crap PMU IRQ register read failed %d\n", ret); + ++ if (!pcf->coldplug_done) { ++ DEBUGPC("PMU Coldplug init\n"); ++ ++ /* we used SECOND to kick ourselves started -- turn it off */ ++ pcfirq[0] &= ~PCF50606_INT1_SECOND; ++ reg_set_bit_mask(pcf, PCF50606_REG_INT1M, PCF50606_INT1_SECOND, ++ PCF50606_INT1_SECOND); ++ ++ /* coldplug the USB if present */ ++ if (__reg_read(pcf, PCF50606_REG_OOCS) & PCF50606_OOCS_EXTON) { ++ /* Charger inserted */ ++ DEBUGPC("COLD CHGINS "); ++ input_report_key(pcf->input_dev, KEY_BATTERY, 1); ++ apm_queue_event(APM_POWER_STATUS_CHANGE); ++ pcf->flags |= PCF50606_F_CHG_PRESENT; ++ if (pcf->pdata->cb) ++ pcf->pdata->cb(&pcf->client.dev, ++ PCF50606_FEAT_MBC, PMU_EVT_INSERT); ++ } ++ ++ pcf->coldplug_done = 1; ++ } ++ ++ + dev_dbg(&pcf->client.dev, "INT1=0x%02x INT2=0x%02x INT3=0x%02x:", + pcfirq[0], pcfirq[1], pcfirq[2]); + +@@ -1642,7 +1667,8 @@ static int pcf50606_detect(struct i2c_adapter *adapter, int address, int kind) + pm_power_off = &pcf50606_go_standby; + + /* configure interrupt mask */ +- reg_write(data, PCF50606_REG_INT1M, PCF50606_INT1_SECOND); ++ /* we don't mask SECOND here, because we want one to do coldplug with */ ++ reg_write(data, PCF50606_REG_INT1M, 0x00); + reg_write(data, PCF50606_REG_INT2M, 0x00); + reg_write(data, PCF50606_REG_INT3M, PCF50606_INT3_TSCPRES); + +diff --git a/include/linux/pcf50606.h b/include/linux/pcf50606.h +index bc98e47..167328f 100644 +--- a/include/linux/pcf50606.h ++++ b/include/linux/pcf50606.h +@@ -1,6 +1,9 @@ + #ifndef _LINUX_PCF50606_H + #define _LINUX_PCF50606_H + ++#include ++ ++ + /* public in-kernel pcf50606 api */ + enum pcf50606_regulator_id { + PCF50606_REGULATOR_DCD, +@@ -48,26 +51,6 @@ pcf50606_onoff_set(struct pcf50606_data *pcf, + extern void + pcf50606_charge_fast(struct pcf50606_data *pcf, int on); + +-#define PMU_VRAIL_F_SUSPEND_ON 0x00000001 /* Remains on during suspend */ +-#define PMU_VRAIL_F_UNUSED 0x00000002 /* This rail is not used */ +-struct pmu_voltage_rail { +- char *name; +- unsigned int flags; +- struct { +- unsigned int init; +- unsigned int max; +- } voltage; +-}; +- +-enum pmu_event { +- PMU_EVT_NONE, +- PMU_EVT_INSERT, +- PMU_EVT_REMOVE, +- __NUM_PMU_EVTS +-}; +- +-typedef int pmu_cb(struct device *dev, unsigned int feature, +- enum pmu_event event); + + #define PCF50606_FEAT_EXTON 0x00000001 /* not yet supported */ + #define PCF50606_FEAT_MBC 0x00000002 +diff --git a/include/linux/pcf50633.h b/include/linux/pcf50633.h +index 5f32004..bf50fe4 100644 +--- a/include/linux/pcf50633.h ++++ b/include/linux/pcf50633.h +@@ -1,6 +1,9 @@ + #ifndef _LINUX_PCF50633_H + #define _LINUX_PCF50633_H + ++#include ++ ++ + /* public in-kernel pcf50633 api */ + enum pcf50633_regulator_id { + PCF50633_REGULATOR_AUTO, +@@ -57,30 +60,6 @@ pcf50633_usb_curlim_set(struct pcf50633_data *pcf, int ma); + extern void + pcf50633_charge_enable(struct pcf50633_data *pcf, int on); + +-/* FIXME: sharded with pcf50606 */ +-#define PMU_VRAIL_F_SUSPEND_ON 0x00000001 /* Remains on during suspend */ +-#define PMU_VRAIL_F_UNUSED 0x00000002 /* This rail is not used */ +-struct pmu_voltage_rail { +- char *name; +- unsigned int flags; +- struct { +- unsigned int init; +- unsigned int max; +- } voltage; +-}; +- +-enum pmu_event { +- PMU_EVT_NONE, +- PMU_EVT_INSERT, +- PMU_EVT_REMOVE, +- PMU_EVT_USB_INSERT, +- PMU_EVT_USB_REMOVE, +- __NUM_PMU_EVTS +-}; +- +-typedef int pmu_cb(struct device *dev, unsigned int feature, +- enum pmu_event event); +- + #define PCF50633_FEAT_EXTON 0x00000001 /* not yet supported */ + #define PCF50633_FEAT_MBC 0x00000002 + #define PCF50633_FEAT_BBC 0x00000004 /* not yet supported */ +diff --git a/include/linux/pcf506xx.h b/include/linux/pcf506xx.h +new file mode 100644 +index 0000000..33be73e +--- /dev/null ++++ b/include/linux/pcf506xx.h +@@ -0,0 +1,31 @@ ++#ifndef _LINUX_PCF506XX_H ++#define _LINUX_PCF506XX_H ++ ++ ++#define PMU_VRAIL_F_SUSPEND_ON 0x00000001 /* Remains on during suspend */ ++#define PMU_VRAIL_F_UNUSED 0x00000002 /* This rail is not used */ ++struct pmu_voltage_rail { ++ char *name; ++ unsigned int flags; ++ struct { ++ unsigned int init; ++ unsigned int max; ++ } voltage; ++}; ++ ++enum pmu_event { ++ PMU_EVT_NONE, ++ PMU_EVT_INSERT, ++ PMU_EVT_REMOVE, ++#ifdef CONFIG_SENSORS_PCF50633 ++ PMU_EVT_USB_INSERT, ++ PMU_EVT_USB_REMOVE, ++#endif ++ __NUM_PMU_EVTS ++}; ++ ++typedef int pmu_cb(struct device *dev, unsigned int feature, ++ enum pmu_event event); ++ ++ ++#endif /* !_LINUX_PCF506XX_H */ +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1042-gta02-bt-fixes.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1042-gta02-bt-fixes.patch.patch new file mode 100644 index 0000000000..207b3349fc --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1042-gta02-bt-fixes.patch.patch @@ -0,0 +1,209 @@ +From c3baf8bae35ec67edb89c07cd8367040c95cca74 Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Fri, 4 Apr 2008 11:36:19 +0100 +Subject: [PATCH] gta02-bt-fixes.patch + Modify GTA02 power manager for bluetooth. + +1. Default power value isn't correct. Now we set pcf50633 LDO4 to 3.2 voltage. + +2. Separate GTA01 and GTA02 source code. + +3. Add pcf50633 API for enable register. +--- + arch/arm/mach-s3c2440/mach-gta02.c | 4 +- + arch/arm/plat-s3c24xx/neo1973_pm_bt.c | 71 ++++++++++++++++++++++++++++---- + include/linux/pcf50633.h | 1 + + 3 files changed, 65 insertions(+), 11 deletions(-) + +diff --git a/arch/arm/mach-s3c2440/mach-gta02.c b/arch/arm/mach-s3c2440/mach-gta02.c +index 3fbb131..46acede 100644 +--- a/arch/arm/mach-s3c2440/mach-gta02.c ++++ b/arch/arm/mach-s3c2440/mach-gta02.c +@@ -213,10 +213,10 @@ static struct pcf50633_platform_data gta02_pcf_pdata = { + }, + }, + [PCF50633_REGULATOR_LDO4] = { +- .name = "gl_2v5", ++ .name = "bt_3v2", + .voltage = { + .init = 2500, +- .max = 2500, ++ .max = 3300, + }, + }, + [PCF50633_REGULATOR_LDO5] = { +diff --git a/arch/arm/plat-s3c24xx/neo1973_pm_bt.c b/arch/arm/plat-s3c24xx/neo1973_pm_bt.c +index d685ef7..8f5be88 100644 +--- a/arch/arm/plat-s3c24xx/neo1973_pm_bt.c ++++ b/arch/arm/plat-s3c24xx/neo1973_pm_bt.c +@@ -16,12 +16,19 @@ + #include + #include + +-#include +- + #include + #include ++ ++#ifdef CONFIG_MACH_NEO1973_GTA01 + #include ++#include ++#endif ++ ++#ifdef CONFIG_MACH_NEO1973_GTA02 + #include ++#include ++#endif ++ + + #define DRVMSG "FIC Neo1973 Bluetooth Power Management" + +@@ -30,6 +37,8 @@ static ssize_t bt_read(struct device *dev, struct device_attribute *attr, + { + if (!strcmp(attr->attr.name, "power_on")) { + switch (machine_arch_type) { ++ ++#ifdef CONFIG_MACH_NEO1973_GTA01 + case MACH_TYPE_NEO1973_GTA01: + if (pcf50606_onoff_get(pcf50606_global, + PCF50606_REGULATOR_D1REG) && +@@ -37,21 +46,33 @@ static ssize_t bt_read(struct device *dev, struct device_attribute *attr, + PCF50606_REGULATOR_D1REG) == 3100) + goto out_1; + break; ++#endif /* CONFIG_MACH_NEO1973_GTA01 */ ++ ++#ifdef CONFIG_MACH_NEO1973_GTA02 + case MACH_TYPE_NEO1973_GTA02: + if (s3c2410_gpio_getpin(GTA02_GPIO_BT_EN)) + goto out_1; + break; ++#endif /* CONFIG_MACH_NEO1973_GTA02 */ ++ + } + } else if (!strcmp(attr->attr.name, "reset")) { + switch (machine_arch_type) { ++ ++#ifdef CONFIG_MACH_NEO1973_GTA01 + case MACH_TYPE_NEO1973_GTA01: + if (s3c2410_gpio_getpin(GTA01_GPIO_BT_EN) == 0) + goto out_1; + break; ++#endif /* CONFIG_MACH_NEO1973_GTA01 */ ++ ++#ifdef CONFIG_MACH_NEO1973_GTA02 + case MACH_TYPE_NEO1973_GTA02: + if (s3c2410_gpio_getpin(GTA02_GPIO_BT_EN) == 0) + goto out_1; + break; ++#endif /* CONFIG_MACH_NEO1973_GTA02 */ ++ + } + } + +@@ -64,9 +85,12 @@ static ssize_t bt_write(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) + { + unsigned long on = simple_strtoul(buf, NULL, 10); ++ unsigned int vol; + + if (!strcmp(attr->attr.name, "power_on")) { + switch (machine_arch_type) { ++ ++#ifdef CONFIG_MACH_NEO1973_GTA01 + case MACH_TYPE_NEO1973_GTA01: + /* if we are powering up, assert reset, then power, + * then release reset */ +@@ -80,22 +104,39 @@ static ssize_t bt_write(struct device *dev, struct device_attribute *attr, + PCF50606_REGULATOR_D1REG, on); + s3c2410_gpio_setpin(GTA01_GPIO_BT_EN, on); + break; ++#endif /* CONFIG_MACH_NEO1973_GTA01 */ ++ ++#ifdef CONFIG_MACH_NEO1973_GTA02 + case MACH_TYPE_NEO1973_GTA02: ++ s3c2410_gpio_setpin(GTA02_GPIO_BT_EN, on ? 0 : 1); + if (on) +- s3c2410_gpio_setpin(GTA02_GPIO_BT_EN, 0); +- else +- s3c2410_gpio_setpin(GTA02_GPIO_BT_EN, 1); ++ pcf50633_voltage_set(pcf50633_global, ++ PCF50633_REGULATOR_LDO4, 3200); ++ pcf50633_onoff_set(pcf50633_global, ++ PCF50633_REGULATOR_LDO4, on); ++ vol = pcf50633_voltage_get(pcf50633_global, ++ PCF50633_REGULATOR_LDO4); ++ dev_info(dev, "GTA02 Set PCF50633 LDO4 = %d\n", vol); + break; ++#endif /* CONFIG_MACH_NEO1973_GTA02 */ ++ + } + } else if (!strcmp(attr->attr.name, "reset")) { + /* reset is low-active, so we need to invert */ + switch (machine_arch_type) { ++ ++#ifdef CONFIG_MACH_NEO1973_GTA01 + case MACH_TYPE_NEO1973_GTA01: + s3c2410_gpio_setpin(GTA01_GPIO_BT_EN, on ? 0 : 1); + break; ++#endif /* CONFIG_MACH_NEO1973_GTA01 */ ++ ++#ifdef CONFIG_MACH_NEO1973_GTA02 + case MACH_TYPE_NEO1973_GTA02: + s3c2410_gpio_setpin(GTA02_GPIO_BT_EN, on ? 0 : 1); + break; ++#endif /* CONFIG_MACH_NEO1973_GTA02 */ ++ + } + } + +@@ -143,18 +184,30 @@ static int __init gta01_bt_probe(struct platform_device *pdev) + dev_info(&pdev->dev, DRVMSG ": starting\n"); + + switch (machine_arch_type) { ++ ++#ifdef CONFIG_MACH_NEO1973_GTA01 + case MACH_TYPE_NEO1973_GTA01: + /* we make sure that the voltage is off */ + pcf50606_onoff_set(pcf50606_global, + PCF50606_REGULATOR_D1REG, 0); ++ /* we pull reset to low to make sure that the chip doesn't ++ * drain power through the reset line */ ++ s3c2410_gpio_setpin(GTA01_GPIO_BT_EN, 0); + break; ++#endif /* CONFIG_MACH_NEO1973_GTA01 */ ++ ++#ifdef CONFIG_MACH_NEO1973_GTA02 + case MACH_TYPE_NEO1973_GTA02: +- /* FIXME: implementation */ ++ /* we make sure that the voltage is off */ ++ pcf50633_onoff_set(pcf50633_global, ++ PCF50633_REGULATOR_LDO4, 0); ++ /* we pull reset to low to make sure that the chip doesn't ++ * drain power through the reset line */ ++ s3c2410_gpio_setpin(GTA02_GPIO_BT_EN, 0); + break; ++#endif /* CONFIG_MACH_NEO1973_GTA02 */ ++ + } +- /* we pull reset to low to make sure that the chip doesn't +- * drain power through the reset line */ +- s3c2410_gpio_setpin(GTA01_GPIO_BT_EN, 0); + + return sysfs_create_group(&pdev->dev.kobj, >a01_bt_attr_group); + } +diff --git a/include/linux/pcf50633.h b/include/linux/pcf50633.h +index bf50fe4..b6a67ee 100644 +--- a/include/linux/pcf50633.h ++++ b/include/linux/pcf50633.h +@@ -46,6 +46,7 @@ pcf50633_voltage_set(struct pcf50633_data *pcf, + extern unsigned int + pcf50633_voltage_get(struct pcf50633_data *pcf, + enum pcf50633_regulator_id reg); ++ + extern int + pcf50633_onoff_get(struct pcf50633_data *pcf, + enum pcf50633_regulator_id reg); +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1043-openmoko-logo.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1043-openmoko-logo.patch.patch new file mode 100644 index 0000000000..213ba28cd1 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1043-openmoko-logo.patch.patch @@ -0,0 +1,40076 @@ +From 940bc427718c8ac90466a88829ee2330ff0c6588 Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Sun, 13 Apr 2008 07:23:47 +0100 +Subject: [PATCH] openmoko-logo.patch + +--- + drivers/video/logo/Kconfig | 5 + + drivers/video/logo/Makefile | 1 + + drivers/video/logo/logo.c | 5 + + drivers/video/logo/logo_openmoko_clut224.ppm |40003 ++++++++++++++++++++++++++ + 4 files changed, 40014 insertions(+), 0 deletions(-) + create mode 100644 drivers/video/logo/logo_openmoko_clut224.ppm + +diff --git a/drivers/video/logo/Kconfig b/drivers/video/logo/Kconfig +index 9de1c11..6d97d00 100644 +--- a/drivers/video/logo/Kconfig ++++ b/drivers/video/logo/Kconfig +@@ -67,6 +67,11 @@ config LOGO_SUPERH_CLUT224 + depends on SUPERH + default y + ++config LOGO_OPENMOKO_CLUT224 ++ bool "224-color OpenMoko Linux logo" ++ depends on MACH_NEO1973_GTA01 || MACH_NEO1973_GTA02 ++ default y ++ + config LOGO_M32R_CLUT224 + bool "224-color M32R Linux logo" + depends on M32R +diff --git a/drivers/video/logo/Makefile b/drivers/video/logo/Makefile +index a5fc4ed..9eb3350 100644 +--- a/drivers/video/logo/Makefile ++++ b/drivers/video/logo/Makefile +@@ -13,6 +13,7 @@ obj-$(CONFIG_LOGO_SUPERH_MONO) += logo_superh_mono.o + obj-$(CONFIG_LOGO_SUPERH_VGA16) += logo_superh_vga16.o + obj-$(CONFIG_LOGO_SUPERH_CLUT224) += logo_superh_clut224.o + obj-$(CONFIG_LOGO_M32R_CLUT224) += logo_m32r_clut224.o ++obj-$(CONFIG_LOGO_OPENMOKO_CLUT224) += logo_openmoko_clut224.o + + obj-$(CONFIG_SPU_BASE) += logo_spe_clut224.o + +diff --git a/drivers/video/logo/logo.c b/drivers/video/logo/logo.c +index fc72684..541fd97 100644 +--- a/drivers/video/logo/logo.c ++++ b/drivers/video/logo/logo.c +@@ -33,6 +33,7 @@ extern const struct linux_logo logo_superh_mono; + extern const struct linux_logo logo_superh_vga16; + extern const struct linux_logo logo_superh_clut224; + extern const struct linux_logo logo_m32r_clut224; ++extern const struct linux_logo logo_openmoko_clut224; + + static int nologo; + module_param(nologo, bool, 0); +@@ -105,6 +106,10 @@ const struct linux_logo * __init_refok fb_find_logo(int depth) + /* M32R Linux logo */ + logo = &logo_m32r_clut224; + #endif ++#ifdef CONFIG_LOGO_OPENMOKO_CLUT224 ++ /* OpenMoko Linux logo */ ++ logo = &logo_openmoko_clut224; ++#endif + } + return logo; + } +diff --git a/drivers/video/logo/logo_openmoko_clut224.ppm b/drivers/video/logo/logo_openmoko_clut224.ppm +new file mode 100644 +index 0000000..a2989cb +--- /dev/null ++++ b/drivers/video/logo/logo_openmoko_clut224.ppm +@@ -0,0 +1,40003 @@ ++P3 ++480 500 ++255 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 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21 21 21 ++21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 ++21 21 21 21 21 21 21 21 21 22 22 22 22 22 22 22 22 22 ++22 22 22 22 22 22 22 22 22 21 21 21 21 21 21 21 21 21 ++21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 ++22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 ++22 22 22 22 22 22 22 22 22 21 21 21 21 21 21 21 21 21 ++21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 ++21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 ++21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 ++21 21 21 22 22 22 22 22 22 22 22 22 22 22 22 24 24 24 ++24 24 24 24 24 24 22 22 22 24 24 24 24 24 24 24 24 24 ++22 22 22 24 24 24 22 22 22 24 24 24 24 24 24 24 24 24 ++22 22 22 24 24 24 24 24 24 22 22 22 22 22 22 22 22 22 ++21 21 21 21 21 21 21 21 21 21 21 21 20 20 20 20 20 20 ++20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 ++20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 ++20 20 20 20 20 20 20 20 20 20 20 20 21 21 21 21 21 21 ++21 21 21 21 21 21 21 21 21 21 21 21 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27 27 27 ++27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 ++27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 ++27 27 27 27 27 27 27 27 27 27 27 27 28 28 28 28 28 28 ++28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 ++28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 ++28 28 28 27 27 27 27 27 27 27 27 27 26 26 26 26 26 26 ++26 26 26 25 25 25 25 25 25 24 24 24 24 24 24 22 22 22 ++21 21 21 20 20 20 19 19 19 18 18 18 17 17 17 16 16 16 ++15 14 14 13 13 13 12 12 12 11 11 11 10 10 10 8 8 8 ++7 7 7 6 6 6 5 5 5 4 4 4 3 3 3 2 2 2 ++1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 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30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 ++30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 ++30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 ++30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 ++28 28 28 28 28 28 27 27 27 26 26 26 25 25 25 25 25 25 ++24 24 24 22 22 22 21 21 21 20 20 20 19 19 19 18 18 18 ++16 16 16 15 14 14 14 14 14 13 13 13 11 11 11 10 10 10 ++9 9 9 7 7 7 6 6 6 5 5 5 4 4 4 3 3 3 ++2 2 2 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 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33 33 33 33 33 33 ++33 33 33 33 33 33 32 32 32 32 32 32 32 32 32 32 32 32 ++32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 ++32 32 32 32 32 32 32 32 32 33 33 33 33 33 33 32 32 32 ++32 32 32 32 32 32 32 32 32 32 32 32 30 30 30 30 30 30 ++30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 ++30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 ++30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 ++30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 32 32 32 ++32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 33 33 33 ++33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 ++33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 ++33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 ++33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 ++33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 ++33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 ++33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 ++33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 ++33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 ++33 33 33 35 35 35 35 35 35 35 35 35 35 35 35 33 33 33 ++35 35 35 35 35 35 35 35 35 33 33 33 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 33 33 33 33 33 33 33 33 33 ++32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 30 30 30 ++30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 ++30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 32 32 32 ++32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 ++32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 ++33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 ++33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 ++33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 32 32 32 ++32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 ++32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 33 33 33 ++33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 ++33 33 33 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 ++32 32 32 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 33 33 33 ++33 33 33 33 33 33 33 33 33 32 32 32 32 32 32 30 30 30 ++30 30 30 30 30 30 30 30 30 30 30 30 28 28 28 27 27 27 ++26 26 26 25 25 25 24 24 24 22 22 22 21 21 21 20 20 20 ++18 18 18 17 17 17 16 16 16 14 14 14 13 13 13 11 11 11 ++10 10 10 8 8 8 7 7 7 6 6 6 4 4 4 3 3 3 ++3 3 3 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 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35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 37 37 37 35 35 35 ++37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 ++37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 ++37 37 37 37 37 37 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 ++37 37 37 37 37 37 37 37 37 37 37 37 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 33 33 33 32 32 32 30 30 30 30 30 30 30 30 30 ++28 28 28 27 27 27 26 26 26 25 25 25 24 24 24 21 21 21 ++20 20 20 19 19 19 17 17 17 16 16 16 14 14 14 13 13 13 ++11 11 11 10 10 10 8 8 8 7 7 7 5 5 5 4 4 4 ++3 3 3 2 2 2 1 1 1 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 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37 37 37 ++37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 ++37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 ++37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 ++37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 ++37 37 37 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 ++38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 ++38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 ++38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 ++38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 ++38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 ++38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 ++38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 ++38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 ++38 38 38 38 38 38 38 38 38 39 39 39 39 39 39 39 39 39 ++39 39 39 39 39 39 39 39 39 39 39 39 41 41 41 39 39 39 ++41 41 41 39 39 39 41 41 41 41 41 41 41 41 41 41 41 41 ++39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 38 38 38 ++38 38 38 38 38 38 37 37 37 37 37 37 37 37 37 37 37 37 ++37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 ++37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 ++37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 ++37 37 37 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 ++38 38 38 38 38 38 38 38 38 39 39 39 39 39 39 39 39 39 ++39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 ++39 39 39 39 39 39 39 39 39 39 39 39 38 38 38 38 38 38 ++38 38 38 38 38 38 38 38 38 37 37 37 37 37 37 37 37 37 ++38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 ++38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 ++38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 ++38 38 38 38 38 38 38 38 38 38 38 38 39 39 39 39 39 39 ++39 39 39 39 39 39 39 39 39 41 41 41 41 41 41 41 41 41 ++39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 ++39 39 39 39 39 39 38 38 38 38 38 38 37 37 37 37 37 37 ++35 35 35 35 35 35 35 35 35 35 35 35 33 33 33 32 32 32 ++30 30 30 30 30 30 28 28 28 26 26 26 25 25 25 24 24 24 ++22 22 22 20 20 20 19 19 19 17 17 17 16 16 16 14 14 14 ++13 13 13 11 11 11 9 9 9 8 8 8 6 6 6 5 5 5 ++4 4 4 3 3 3 2 2 2 1 1 1 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 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39 39 39 ++39 39 39 39 39 39 39 39 39 39 39 39 41 41 41 41 41 41 ++41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 ++41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 ++41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 ++41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 ++41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 ++41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 ++41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 ++41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 ++41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 ++41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 ++41 41 41 41 41 41 41 41 41 41 41 41 42 42 42 42 42 42 ++42 42 42 42 42 42 42 42 42 43 43 43 43 43 43 43 43 43 ++43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 42 42 42 ++42 42 42 42 42 42 42 42 42 42 42 42 42 42 42 41 41 41 ++41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 ++41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 ++41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 ++41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 ++41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 ++41 41 41 41 41 41 41 41 41 42 42 42 42 42 42 42 42 42 ++42 42 42 42 42 42 42 42 42 42 42 42 42 42 42 42 42 42 ++42 42 42 42 42 42 42 42 42 41 41 41 41 41 41 41 41 41 ++41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 ++41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 ++41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 ++41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 ++41 41 41 41 41 41 41 41 41 41 41 41 42 42 42 42 42 42 ++42 42 42 42 42 42 42 42 42 42 42 42 42 42 42 42 42 42 ++42 42 42 42 42 42 42 42 42 42 42 42 42 42 42 42 42 42 ++42 42 42 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 ++39 39 39 38 38 38 37 37 37 37 37 37 35 35 35 35 35 35 ++33 33 33 32 32 32 30 30 30 30 30 30 27 27 27 26 26 26 ++24 24 24 22 22 22 21 21 21 19 19 19 17 17 17 16 16 16 ++14 14 14 12 12 12 11 11 11 9 9 9 7 7 7 6 6 6 ++5 5 5 3 3 3 2 2 2 1 1 1 1 1 1 0 0 0 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43 43 43 43 43 ++43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 ++43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 ++43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 ++43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 ++43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 ++43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 ++43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 ++43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 ++43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 ++43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 45 45 45 ++45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 ++45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 ++45 45 45 45 45 45 45 45 45 43 43 43 43 43 43 43 43 43 ++43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 ++43 43 43 43 43 43 42 42 42 42 42 42 42 42 42 42 42 42 ++42 42 42 42 42 42 43 43 43 43 43 43 43 43 43 43 43 43 ++43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 ++43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 ++43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 ++43 43 43 45 45 45 45 45 45 45 45 45 45 45 45 43 43 43 ++43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 ++43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 ++43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 ++43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 ++43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 ++43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 45 45 45 ++45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 ++45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 ++43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 42 42 42 ++42 42 42 41 41 41 41 41 41 39 39 39 38 38 38 37 37 37 ++35 35 35 35 35 35 32 32 32 30 30 30 30 30 30 27 27 27 ++26 26 26 24 24 24 22 22 22 20 20 20 19 19 19 17 17 17 ++16 16 16 13 13 13 12 12 12 10 10 10 8 8 8 7 7 7 ++5 5 5 4 4 4 3 3 3 2 2 2 1 1 1 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 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46 46 46 46 46 46 46 46 ++46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 ++46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 ++46 46 46 47 47 47 47 47 47 47 47 47 47 47 47 47 47 47 ++47 47 47 47 47 47 46 46 46 46 46 46 46 46 46 46 46 46 ++46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 ++46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 ++46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 ++46 46 46 46 46 46 47 47 47 47 47 47 47 47 47 47 47 47 ++47 47 47 48 48 47 48 48 47 48 48 47 48 48 47 48 48 47 ++48 48 47 48 48 47 48 48 47 48 48 47 48 48 47 48 48 47 ++48 48 47 47 47 47 47 47 47 47 47 47 47 47 47 46 46 46 ++46 46 46 46 46 46 46 46 46 45 45 45 45 45 45 45 45 45 ++45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 ++45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 ++45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 46 46 46 ++46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 ++46 46 46 47 47 47 47 47 47 47 47 47 47 47 47 47 47 47 ++47 47 47 47 47 47 47 47 47 47 47 47 47 47 47 47 47 47 ++47 47 47 47 47 47 47 47 47 47 47 47 46 46 46 46 46 46 ++46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 ++46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 ++46 46 46 47 47 47 47 47 47 47 47 47 46 46 46 46 46 46 ++46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 ++46 46 46 46 46 46 46 46 46 47 47 47 47 47 47 47 47 47 ++47 47 47 47 47 47 48 48 47 48 48 47 48 48 47 48 48 47 ++48 48 47 48 48 47 48 48 47 47 47 47 47 47 47 47 47 47 ++47 47 47 47 47 47 46 46 46 46 46 46 46 46 46 45 45 45 ++43 43 43 43 43 43 43 43 43 42 42 42 41 41 41 39 39 39 ++38 38 38 35 35 35 35 35 35 33 33 33 30 30 30 30 30 30 ++28 28 28 26 26 26 24 24 24 22 22 22 20 20 20 18 18 18 ++17 17 17 15 14 14 13 13 13 11 11 11 9 9 9 8 8 8 ++6 6 6 5 5 5 3 3 3 3 3 3 1 1 1 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 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16 16 16 18 18 18 20 20 20 ++22 22 22 24 24 24 26 26 26 27 27 27 30 30 30 30 30 30 ++33 33 33 35 35 35 37 37 37 38 38 38 41 41 41 42 42 42 ++43 43 43 43 43 43 45 45 45 46 46 46 47 47 47 48 48 47 ++48 48 47 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 ++49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 ++49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 ++49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 ++49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 ++49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 ++49 49 49 48 48 47 48 48 47 48 48 47 48 48 47 48 48 47 ++48 48 47 47 47 47 47 47 47 47 47 47 47 47 47 47 47 47 ++47 47 47 47 47 47 47 47 47 47 47 47 47 47 47 47 47 47 ++47 47 47 47 47 47 47 47 47 47 47 47 47 47 47 48 48 47 ++48 48 47 48 48 47 48 48 47 48 48 47 48 48 47 48 48 47 ++48 48 47 48 48 47 49 49 49 49 49 49 49 49 49 49 49 49 ++49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 ++49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 ++49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 ++49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 ++49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 ++49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 ++49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 ++49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 ++49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 50 50 50 ++50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 ++50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 ++50 50 50 50 50 50 50 50 50 50 50 50 49 49 49 49 49 49 ++49 49 49 48 48 47 48 48 47 48 48 47 48 48 47 48 48 47 ++48 48 47 48 48 47 48 48 47 47 47 47 47 47 47 47 47 47 ++47 47 47 48 48 47 48 48 47 48 48 47 48 48 47 48 48 47 ++48 48 47 48 48 47 48 48 47 48 48 47 48 48 47 48 48 47 ++48 48 47 48 48 47 48 48 47 48 48 47 49 49 49 49 49 49 ++49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 ++49 49 49 50 50 50 50 50 50 50 50 50 49 49 49 49 49 49 ++49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 ++48 48 47 48 48 47 48 48 47 48 48 47 48 48 47 48 48 47 ++48 48 47 48 48 47 48 48 47 48 48 47 49 49 49 49 49 49 ++49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 ++49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 ++49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 50 50 50 ++50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 ++50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 ++49 49 49 49 49 49 49 49 49 49 49 49 48 48 47 48 48 47 ++47 47 47 46 46 46 45 45 45 43 43 43 43 43 43 42 42 42 ++41 41 41 38 38 38 37 37 37 35 35 35 33 33 33 30 30 30 ++30 30 30 27 27 27 26 26 26 24 24 24 22 22 22 20 20 20 ++18 18 18 16 16 16 14 14 14 12 12 12 10 10 10 9 9 9 ++7 7 7 5 5 5 4 4 4 3 3 3 2 2 2 1 1 1 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 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37 37 37 39 39 39 41 41 41 42 42 42 43 43 43 ++45 45 45 47 47 47 48 48 47 66 66 66 140 134 120 140 134 120 ++192 187 164 200 196 176 231 230 220 230 228 210 230 228 210 230 228 210 ++230 228 210 192 187 164 192 187 164 140 134 120 138 129 110 65 65 65 ++50 50 50 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 ++52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 ++52 52 52 52 52 52 135 101 60 140 134 120 140 134 120 140 134 120 ++140 134 120 140 134 120 140 134 120 140 134 120 140 134 120 140 134 120 ++140 134 120 140 134 120 140 134 120 140 134 120 140 134 120 66 66 66 ++52 52 52 52 52 52 50 50 50 50 50 50 50 50 50 50 50 50 ++50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 ++50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 ++50 50 50 66 66 66 138 129 110 140 134 120 140 134 120 192 187 164 ++192 187 164 192 187 164 192 187 164 176 168 138 140 134 120 140 134 120 ++66 66 66 65 65 65 50 50 50 52 52 52 52 52 52 52 52 52 ++52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 ++52 52 52 52 52 52 63 58 50 138 129 110 140 134 120 140 134 120 ++140 134 120 140 134 120 140 134 120 140 134 120 140 134 120 140 134 120 ++140 134 120 140 134 120 140 134 120 140 134 120 140 134 120 140 134 120 ++138 129 110 66 66 66 52 52 52 52 52 52 52 52 52 52 52 52 ++52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 ++52 52 52 52 52 52 52 52 52 52 52 52 138 129 110 140 134 120 ++140 134 120 140 134 120 140 134 120 140 134 120 140 134 120 140 134 120 ++140 134 120 140 134 120 140 134 120 140 134 120 140 134 120 140 134 120 ++140 134 120 140 134 120 140 134 120 140 134 120 140 134 120 140 134 120 ++140 134 120 140 134 120 140 134 120 140 134 120 140 134 120 140 134 120 ++140 134 120 140 134 120 140 134 120 140 134 120 138 129 110 52 52 52 ++52 52 52 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 ++50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 ++50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 ++66 66 66 140 134 120 176 168 138 192 187 164 200 196 176 231 230 220 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52 ++52 52 52 52 52 52 52 52 52 65 65 65 66 66 66 185 178 149 ++238 238 238 255 255 255 249 249 249 249 249 249 255 255 255 249 249 249 ++249 249 249 238 238 238 249 249 249 249 249 249 249 249 249 255 255 255 ++255 255 255 238 238 238 200 196 176 138 129 110 52 52 52 52 52 52 ++52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 ++52 52 52 140 134 120 249 249 249 249 249 249 249 249 249 249 249 249 ++255 255 255 249 249 249 255 255 255 249 249 249 255 255 255 249 249 249 ++255 255 255 249 249 249 255 255 255 249 249 249 255 255 255 249 249 249 ++249 249 249 255 255 255 238 238 238 192 187 164 66 66 66 52 52 52 ++52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 ++52 52 52 52 52 52 138 129 110 238 238 238 249 249 249 249 249 249 ++249 249 249 249 249 249 255 255 255 249 249 249 255 255 255 249 249 249 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 249 249 249 ++255 255 255 255 255 255 249 249 249 249 249 249 249 249 249 249 249 249 ++231 230 220 140 134 120 65 65 65 52 52 52 52 52 52 52 52 52 ++52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 ++52 52 52 52 52 52 65 65 65 66 66 66 185 178 149 238 238 238 ++255 255 255 255 255 255 249 249 249 249 249 249 249 249 249 249 249 249 ++249 249 249 249 249 249 238 238 238 249 249 249 249 249 249 249 249 249 ++249 249 249 249 249 249 238 238 238 192 187 164 138 129 110 52 52 52 ++52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 ++52 52 52 52 52 52 238 238 238 255 255 255 249 249 249 255 255 255 ++255 255 255 255 255 255 140 134 120 52 52 52 52 52 52 52 52 52 ++52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 ++52 52 52 52 52 52 230 228 210 255 255 255 255 255 255 255 255 255 ++249 249 249 255 255 255 249 249 249 176 168 138 52 52 52 65 65 65 ++52 52 52 52 52 52 52 52 52 52 52 52 140 134 120 200 196 176 ++249 249 249 249 249 249 249 249 249 249 249 249 249 249 249 249 249 249 ++249 249 249 238 238 238 249 249 249 249 249 249 249 249 249 249 249 249 ++255 255 255 249 249 249 255 255 255 238 238 238 140 134 120 63 58 50 ++45 45 45 43 43 43 41 41 41 39 39 39 37 37 37 35 35 35 ++33 33 33 30 30 30 30 30 30 27 27 27 25 25 25 24 24 24 ++20 20 20 18 18 18 16 16 16 14 14 14 12 12 12 10 10 10 ++9 9 9 7 7 7 5 5 5 4 4 4 3 3 3 1 1 1 ++1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 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49 49 49 ++49 49 49 47 47 47 49 49 49 49 49 49 49 49 49 49 49 49 ++49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 ++49 49 49 49 49 49 49 49 49 49 49 49 52 52 52 52 52 52 ++52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 ++52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 ++52 52 52 50 50 50 52 52 52 52 52 52 50 50 50 50 50 50 ++50 50 50 49 49 49 50 50 50 49 49 49 47 47 47 49 49 49 ++47 47 47 49 49 49 49 49 49 49 49 49 47 47 47 49 49 49 ++49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 47 47 47 ++49 49 49 49 49 49 47 47 47 49 49 49 49 49 49 50 50 50 ++50 50 50 49 49 49 49 49 49 50 50 50 50 50 50 50 50 50 ++52 52 52 50 50 50 52 52 52 52 52 52 50 50 50 47 47 47 ++47 47 47 49 49 49 52 52 52 50 50 50 49 49 49 49 49 49 ++49 49 49 50 50 50 52 52 52 50 50 50 50 50 50 50 50 50 ++49 49 49 47 47 47 49 49 49 49 49 49 49 49 49 50 50 50 ++49 49 49 49 49 49 50 50 50 50 50 50 50 50 50 50 50 50 ++52 52 52 52 52 52 52 52 52 52 52 52 50 50 50 50 50 50 ++49 49 49 49 49 49 49 49 49 50 50 50 49 49 49 47 47 47 ++49 49 49 50 50 50 50 50 50 52 52 52 50 50 50 52 52 52 ++52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 50 50 50 ++49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 50 50 50 ++49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 ++49 49 49 50 50 50 50 50 50 49 49 49 50 50 50 50 50 50 ++52 52 52 52 52 52 52 52 52 49 49 49 49 49 49 49 49 49 ++49 49 49 49 49 49 47 47 47 49 49 49 49 49 49 49 49 49 ++49 49 49 47 47 47 49 49 49 47 47 47 47 47 47 49 49 49 ++50 50 50 50 50 50 49 49 49 50 50 50 50 50 50 52 52 52 ++52 52 52 49 49 49 49 49 49 49 49 49 47 47 47 49 49 49 ++49 49 49 49 49 49 50 50 50 50 50 50 50 50 50 49 49 49 ++50 50 50 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 ++50 50 50 50 50 50 50 50 50 49 49 49 50 50 50 50 50 50 ++49 49 49 49 49 49 49 49 49 47 47 47 49 49 49 47 47 47 ++47 47 47 46 46 46 45 45 45 45 45 45 43 43 43 41 41 41 ++41 41 41 38 38 38 37 37 37 35 35 35 33 33 33 30 30 30 ++30 30 30 27 27 27 25 25 25 24 24 24 21 21 21 20 20 20 ++18 18 18 16 16 16 14 14 14 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45 45 45 45 45 45 45 45 45 45 45 45 45 45 ++45 45 45 46 46 46 45 45 45 46 46 46 46 46 46 46 46 46 ++47 47 47 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 ++50 50 50 50 50 50 49 49 49 49 49 49 49 49 49 49 49 49 ++49 49 49 47 47 47 47 47 47 47 47 47 47 47 47 47 47 47 ++46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 ++46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 ++46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 ++46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 ++46 46 46 46 46 46 46 46 46 46 46 46 47 47 47 47 47 47 ++47 47 47 47 47 47 47 47 47 47 47 47 47 47 47 47 47 47 ++47 47 47 47 47 47 47 47 47 47 47 47 47 47 47 47 47 47 ++47 47 47 47 47 47 47 47 47 46 46 46 46 46 46 46 46 46 ++46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 ++46 46 46 46 46 46 46 46 46 47 47 47 47 47 47 47 47 47 ++47 47 47 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 ++46 46 46 46 46 46 47 47 47 46 46 46 46 46 46 46 46 46 ++46 46 46 46 46 46 46 46 46 47 47 47 47 47 47 47 47 47 ++47 47 47 47 47 47 47 47 47 47 47 47 47 47 47 47 47 47 ++47 47 47 47 47 47 47 47 47 47 47 47 47 47 47 46 46 46 ++46 46 46 46 46 46 46 46 46 47 47 47 47 47 47 47 47 47 ++47 47 47 47 47 47 47 47 47 47 47 47 47 47 47 47 47 47 ++47 47 47 46 46 46 47 47 47 47 47 47 46 46 46 46 46 46 ++46 46 46 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 ++45 45 45 45 45 45 45 45 45 46 46 46 46 46 46 47 47 47 ++46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 ++46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 ++46 46 46 46 46 46 46 46 46 46 46 46 47 47 47 47 47 47 ++47 47 47 47 47 47 49 49 49 47 47 47 49 49 49 49 49 49 ++49 49 49 49 49 49 49 49 49 47 47 47 47 47 47 47 47 47 ++47 47 47 47 47 47 46 46 46 46 46 46 45 45 45 45 45 45 ++43 43 43 43 43 43 43 43 43 41 41 41 41 41 41 39 39 39 ++37 37 37 35 35 35 35 35 35 33 33 33 30 30 30 30 30 30 ++27 27 27 26 26 26 24 24 24 22 22 22 20 20 20 18 18 18 ++16 16 16 15 14 14 13 13 13 11 11 11 9 9 9 8 8 8 ++6 6 6 5 5 5 3 3 3 2 2 2 1 1 1 0 0 0 ++0 0 0 0 0 0 0 0 0 0 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43 43 43 43 43 ++45 45 45 43 43 43 45 45 45 45 45 45 45 45 45 45 45 45 ++45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 ++45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 43 43 43 ++43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 ++43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 ++43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 ++43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 ++43 43 43 43 43 43 43 43 43 43 43 43 45 45 45 45 45 45 ++43 43 43 45 45 45 43 43 43 45 45 45 43 43 43 45 45 45 ++45 45 45 43 43 43 45 45 45 45 45 45 43 43 43 45 45 45 ++43 43 43 45 45 45 43 43 43 45 45 45 43 43 43 43 43 43 ++43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 ++43 43 43 43 43 43 43 43 43 45 45 45 43 43 43 45 45 45 ++43 43 43 45 45 45 43 43 43 43 43 43 43 43 43 43 43 43 ++43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 ++43 43 43 43 43 43 43 43 43 43 43 43 45 45 45 43 43 43 ++45 45 45 43 43 43 45 45 45 43 43 43 45 45 45 43 43 43 ++45 45 45 45 45 45 45 45 45 43 43 43 45 45 45 43 43 43 ++43 43 43 43 43 43 43 43 43 45 45 45 43 43 43 45 45 45 ++43 43 43 45 45 45 43 43 43 45 45 45 43 43 43 45 45 45 ++45 45 45 43 43 43 45 45 45 43 43 43 43 43 43 43 43 43 ++43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 ++43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 ++43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 ++43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 ++43 43 43 43 43 43 43 43 43 43 43 43 45 45 45 43 43 43 ++45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 ++43 43 43 45 45 45 45 45 45 45 45 45 45 45 45 46 46 46 ++43 43 43 45 45 45 43 43 43 43 43 43 43 43 43 42 42 42 ++43 43 43 41 41 41 41 41 41 39 39 39 38 38 38 35 35 35 ++35 35 35 35 35 35 32 32 32 30 30 30 30 30 30 27 27 27 ++26 26 26 24 24 24 22 22 22 20 20 20 19 19 19 17 17 17 ++15 14 14 13 13 13 12 12 12 10 10 10 8 8 8 7 7 7 ++5 5 5 4 4 4 3 3 3 2 2 2 1 1 1 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 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42 42 43 43 43 43 43 43 43 43 43 42 42 42 ++42 42 42 42 42 42 42 42 42 42 42 42 41 41 41 42 42 42 ++42 42 42 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 ++41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 ++41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 ++41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 ++42 42 42 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 ++41 41 41 42 42 42 43 43 43 42 42 42 42 42 42 42 42 42 ++42 42 42 42 42 42 42 42 42 42 42 42 43 43 43 42 42 42 ++42 42 42 42 42 42 41 41 41 41 41 41 41 41 41 41 41 41 ++41 41 41 42 42 42 41 41 41 42 42 42 41 41 41 42 42 42 ++41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 42 42 42 ++43 43 43 41 41 41 42 42 42 41 41 41 41 41 41 41 41 41 ++41 41 41 41 41 41 39 39 39 41 41 41 39 39 39 41 41 41 ++41 41 41 41 41 41 42 42 42 42 42 42 42 42 42 42 42 42 ++42 42 42 43 43 43 42 42 42 43 43 43 42 42 42 42 42 42 ++42 42 42 42 42 42 41 41 41 41 41 41 41 41 41 41 41 41 ++42 42 42 41 41 41 42 42 42 41 41 41 42 42 42 42 42 42 ++43 43 43 42 42 42 42 42 42 42 42 42 43 43 43 42 42 42 ++42 42 42 42 42 42 41 41 41 42 42 42 41 41 41 41 41 41 ++41 41 41 39 39 39 41 41 41 41 41 41 41 41 41 41 41 41 ++41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 39 39 39 ++41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 ++41 41 41 41 41 41 42 42 42 41 41 41 39 39 39 41 41 41 ++41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 43 43 43 ++42 42 42 42 42 42 42 42 42 42 42 42 42 42 42 42 42 42 ++43 43 43 42 42 42 42 42 42 42 42 42 42 42 42 42 42 42 ++43 43 43 41 41 41 41 41 41 41 41 41 41 41 41 39 39 39 ++39 39 39 38 38 38 37 37 37 37 37 37 35 35 35 33 33 33 ++33 33 33 30 30 30 30 30 30 28 28 28 27 27 27 25 25 25 ++24 24 24 22 22 22 20 20 20 19 19 19 17 17 17 16 16 16 ++14 14 14 12 12 12 10 10 10 9 9 9 7 7 7 6 6 6 ++4 4 4 3 3 3 2 2 2 1 1 1 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 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8 9 9 9 11 11 11 13 13 13 14 14 14 ++16 16 16 17 17 17 19 19 19 20 20 20 22 22 22 24 24 24 ++25 25 25 26 26 26 28 28 28 30 30 30 30 30 30 32 32 32 ++33 33 33 35 35 35 35 35 35 35 35 35 37 37 37 37 37 37 ++37 37 37 38 38 38 39 39 39 39 39 39 41 41 41 41 41 41 ++42 42 42 43 43 43 45 45 45 45 45 45 46 46 46 47 47 47 ++47 47 47 47 47 47 49 49 49 52 52 52 52 52 52 52 52 52 ++52 52 52 52 52 52 52 52 52 52 52 52 65 65 65 200 196 176 ++255 255 255 255 255 255 255 255 255 249 249 249 249 249 249 200 196 176 ++65 65 65 52 52 52 52 52 52 52 52 52 52 52 52 50 50 50 ++49 49 49 47 47 47 46 46 46 45 45 45 45 45 45 43 43 43 ++42 42 42 42 42 42 39 39 39 41 41 41 39 39 39 39 39 39 ++38 38 38 38 38 38 37 37 37 37 37 37 37 37 37 37 37 37 ++37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 ++37 37 37 37 37 37 38 38 38 38 38 38 38 38 38 38 38 38 ++39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 ++39 39 39 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 ++39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 38 38 38 ++38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 ++38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 ++38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 ++38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 ++38 38 38 39 39 39 38 38 38 38 38 38 38 38 38 38 38 38 ++39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 ++39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 ++39 39 39 39 39 39 38 38 38 38 38 38 39 39 39 38 38 38 ++38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 39 39 39 ++38 38 38 38 38 38 38 38 38 38 38 38 39 39 39 39 39 39 ++39 39 39 39 39 39 38 38 38 38 38 38 38 38 38 38 38 38 ++38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 ++38 38 38 38 38 38 38 38 38 38 38 38 39 39 39 39 39 39 ++39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 ++39 39 39 39 39 39 39 39 39 38 38 38 38 38 38 38 38 38 ++38 38 38 38 38 38 39 39 39 38 38 38 39 39 39 39 39 39 ++39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 ++39 39 39 39 39 39 39 39 39 38 38 38 38 38 38 38 38 38 ++38 38 38 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 ++37 37 37 37 37 37 37 37 37 37 37 37 38 38 38 38 38 38 ++38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 ++38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 ++38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 39 39 39 ++39 39 39 39 39 39 39 39 39 39 39 39 41 41 41 39 39 39 ++41 41 41 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 ++39 39 39 38 38 38 38 38 38 38 38 38 37 37 37 37 37 37 ++37 37 37 35 35 35 35 35 35 35 35 35 33 33 33 32 32 32 ++30 30 30 30 30 30 28 28 28 26 26 26 25 25 25 24 24 24 ++22 22 22 20 20 20 19 19 19 17 17 17 16 16 16 14 14 14 ++12 12 12 11 11 11 9 9 9 8 8 8 6 6 6 5 5 5 ++4 4 4 3 3 3 2 2 2 1 1 1 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 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++24 24 24 24 24 24 25 25 25 27 27 27 28 28 28 28 28 28 ++30 30 30 30 30 30 32 32 32 33 33 33 33 33 33 35 35 35 ++35 35 35 35 35 35 37 37 37 37 37 37 38 38 38 39 39 39 ++41 41 41 39 39 39 42 42 42 42 42 42 43 43 43 45 45 45 ++45 45 45 46 46 46 47 47 47 47 47 47 49 49 49 50 50 50 ++50 50 50 52 52 52 52 52 52 52 52 52 52 52 52 200 196 176 ++249 249 249 255 255 255 255 255 255 255 255 255 249 249 249 192 187 164 ++49 49 49 52 52 52 52 52 52 52 52 52 49 49 49 47 47 47 ++46 46 46 45 45 45 43 43 43 43 43 43 42 42 42 41 41 41 ++41 41 41 39 39 39 38 38 38 37 37 37 37 37 37 37 37 37 ++35 35 35 35 35 35 35 35 35 33 33 33 35 35 35 33 33 33 ++35 35 35 33 33 33 35 35 35 35 35 35 33 33 33 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++37 37 37 35 35 35 37 37 37 37 37 37 37 37 37 37 37 37 ++37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 ++37 37 37 37 37 37 37 37 37 35 35 35 37 37 37 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 37 37 37 ++35 35 35 37 37 37 37 37 37 35 35 35 37 37 37 35 35 35 ++37 37 37 35 35 35 37 37 37 35 35 35 37 37 37 35 35 35 ++37 37 37 35 35 35 37 37 37 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 37 37 37 35 35 35 ++37 37 37 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 37 37 37 35 35 35 ++37 37 37 35 35 35 37 37 37 35 35 35 37 37 37 35 35 35 ++37 37 37 37 37 37 35 35 35 37 37 37 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 37 37 37 37 37 37 ++35 35 35 37 37 37 35 35 35 37 37 37 35 35 35 37 37 37 ++37 37 37 35 35 35 37 37 37 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 33 33 33 33 33 33 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 ++37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 ++37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 35 35 35 ++37 37 37 35 35 35 35 35 35 35 35 35 35 35 35 33 33 33 ++33 33 33 33 33 33 32 32 32 30 30 30 30 30 30 30 30 30 ++28 28 28 27 27 27 25 25 25 24 24 24 24 24 24 21 21 21 ++20 20 20 18 18 18 17 17 17 16 16 16 14 14 14 13 13 13 ++11 11 11 10 10 10 8 8 8 7 7 7 5 5 5 4 4 4 ++3 3 3 2 2 2 1 1 1 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 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30 30 32 32 32 ++32 32 32 33 33 33 33 33 33 35 35 35 35 35 35 35 35 35 ++37 37 37 38 38 38 39 39 39 41 41 41 41 41 41 42 42 42 ++43 43 43 43 43 43 45 45 45 45 45 45 46 46 46 47 47 47 ++47 47 47 49 49 49 50 50 50 52 52 52 52 52 52 200 196 176 ++255 255 255 255 255 255 255 255 255 249 249 249 249 249 249 200 196 176 ++49 49 49 50 50 50 49 49 49 47 47 47 46 46 46 45 45 45 ++43 43 43 42 42 42 41 41 41 41 41 41 39 39 39 38 38 38 ++37 37 37 35 35 35 35 35 35 35 35 35 33 33 33 33 33 33 ++33 33 33 32 32 32 32 32 32 32 32 32 30 30 30 32 32 32 ++30 30 30 32 32 32 30 30 30 30 30 30 30 30 30 32 32 32 ++32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 33 33 33 ++33 33 33 33 33 33 33 33 33 35 35 35 33 33 33 35 35 35 ++33 33 33 35 35 35 33 33 33 35 35 35 33 33 33 35 35 35 ++35 35 35 35 35 35 35 35 35 33 33 33 33 33 33 33 33 33 ++32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 33 33 33 ++32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 ++32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 ++33 33 33 32 32 32 32 32 32 33 33 33 33 33 33 32 32 32 ++32 32 32 32 32 32 32 32 32 33 33 33 33 33 33 33 33 33 ++33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 ++33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 ++33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 32 32 32 ++33 33 33 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 ++32 32 32 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 ++33 33 33 33 33 33 33 33 33 33 33 33 32 32 32 32 32 32 ++32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 ++32 32 32 32 32 32 33 33 33 33 33 33 33 33 33 33 33 33 ++33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 ++33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 ++32 32 32 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 ++33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 ++33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 32 32 32 ++32 32 32 32 32 32 32 32 32 30 30 30 30 30 30 32 32 32 ++30 30 30 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 ++32 32 32 32 32 32 33 33 33 33 33 33 32 32 32 32 32 32 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37 37 38 38 38 39 39 39 ++41 41 41 41 41 41 42 42 42 43 43 43 43 43 43 45 45 45 ++45 45 45 47 47 47 46 46 46 47 47 47 47 47 47 140 134 120 ++192 187 164 192 187 164 185 178 149 192 187 164 192 187 164 140 134 120 ++41 41 41 46 46 46 45 45 45 43 43 43 43 43 43 42 42 42 ++41 41 41 41 41 41 39 39 39 38 38 38 37 37 37 35 35 35 ++35 35 35 35 35 35 33 33 33 32 32 32 30 30 30 32 32 32 ++30 30 30 30 30 30 28 28 28 30 30 30 28 28 28 28 28 28 ++28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 30 30 30 ++28 28 28 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 ++30 30 30 32 32 32 30 30 30 32 32 32 30 30 30 32 32 32 ++30 30 30 32 32 32 30 30 30 32 32 32 30 30 30 32 32 32 ++30 30 30 30 30 30 32 32 32 32 32 32 30 30 30 30 30 30 ++30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 ++30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 ++30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 ++30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 ++30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 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43 43 43 46 46 46 45 45 45 ++41 41 41 39 39 39 41 41 41 38 38 38 37 37 37 39 39 39 ++43 43 43 43 43 43 43 43 43 43 43 43 41 41 41 39 39 39 ++38 38 38 37 37 37 35 35 35 35 35 35 35 35 35 33 33 33 ++32 32 32 30 30 30 30 30 30 30 30 30 30 30 30 28 28 28 ++27 27 27 27 27 27 26 26 26 26 26 26 26 26 26 26 26 26 ++26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 ++26 26 26 26 26 26 26 26 26 27 27 27 27 27 27 27 27 27 ++27 27 27 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 ++28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 ++28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 27 27 27 ++28 28 28 27 27 27 28 28 28 27 27 27 27 27 27 27 27 27 ++27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 ++27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 ++27 27 27 27 27 27 28 28 28 27 27 27 27 27 27 27 27 27 ++27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 ++27 27 27 27 27 27 28 28 28 28 28 28 28 28 28 28 28 28 ++28 28 28 30 30 30 28 28 28 28 28 28 28 28 28 27 27 27 ++27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 ++27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 ++27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 ++27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 ++27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 ++27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 ++28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 ++28 28 28 28 28 28 27 27 27 28 28 28 28 28 28 28 28 28 ++27 27 27 27 27 27 27 27 27 28 28 28 27 27 27 28 28 28 ++27 27 27 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 ++28 28 28 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 ++26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 ++26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 27 27 27 ++27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 ++27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 ++27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 28 28 28 ++28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 ++28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 ++28 28 28 27 27 27 27 27 27 27 27 27 26 26 26 26 26 26 ++25 25 25 25 25 25 25 25 25 24 24 24 22 22 22 22 22 22 ++21 21 21 20 20 20 19 19 19 18 18 18 17 17 17 16 16 16 ++15 14 14 13 13 13 12 12 12 11 11 11 9 9 9 8 8 8 ++7 7 7 6 6 6 5 5 5 4 4 4 3 3 3 2 2 2 ++1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 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37 37 35 35 35 33 33 33 32 32 32 32 32 32 30 30 30 ++30 30 30 28 28 28 28 28 28 27 27 27 26 26 26 25 25 25 ++25 25 25 24 24 24 24 24 24 22 22 22 24 24 24 22 22 22 ++24 24 24 22 22 22 24 24 24 22 22 22 24 24 24 22 22 22 ++24 24 24 22 22 22 24 24 24 24 24 24 25 25 25 25 25 25 ++25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 26 26 26 ++26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 ++26 26 26 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 ++24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 ++24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 ++24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 ++24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 ++25 25 25 24 24 24 25 25 25 25 25 25 25 25 25 25 25 25 ++25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 ++25 25 25 25 25 25 25 25 25 26 26 26 25 25 25 25 25 25 ++25 25 25 25 25 25 25 25 25 25 25 25 24 24 24 24 24 24 ++24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 ++24 24 24 24 24 24 25 25 25 25 25 25 25 25 25 25 25 25 ++25 25 25 25 25 25 25 25 25 25 25 25 24 24 24 24 24 24 ++24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 ++24 24 24 24 24 24 25 25 25 25 25 25 25 25 25 25 25 25 ++25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 ++25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 ++24 24 24 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 ++25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 ++25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 24 24 24 ++24 24 24 24 24 24 22 22 22 24 24 24 22 22 22 24 24 24 ++22 22 22 24 24 24 22 22 22 24 24 24 24 24 24 24 24 24 ++24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 ++24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 ++24 24 24 24 24 24 24 24 24 25 25 25 25 25 25 25 25 25 ++25 25 25 25 25 25 25 25 25 26 26 26 26 26 26 26 26 26 ++26 26 26 26 26 26 25 25 25 25 25 25 25 25 25 25 25 25 ++25 25 25 25 25 25 25 25 25 24 24 24 24 24 24 24 24 24 ++24 24 24 22 22 22 22 22 22 21 21 21 20 20 20 20 20 20 ++19 19 19 18 18 18 17 17 17 16 16 16 15 14 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b/target/linux/s3c24xx/patches-2.6.24/1044-config-nr-tty-devices.patch.patch @@ -0,0 +1,60 @@ +From 29296aa9ec0140894c77b076806217fd19c0ce9d Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Sun, 13 Apr 2008 07:23:47 +0100 +Subject: [PATCH] config-nr-tty-devices.patch + +--- + drivers/char/Kconfig | 12 ++++++++++++ + include/linux/vt.h | 11 +++++++++++ + 2 files changed, 23 insertions(+), 0 deletions(-) + +diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig +index 2e3a0d4..ed913da 100644 +--- a/drivers/char/Kconfig ++++ b/drivers/char/Kconfig +@@ -58,6 +58,18 @@ config VT_CONSOLE + + If unsure, say Y. + ++config NR_TTY_DEVICES ++ int "Maximum tty device number" ++ depends on VT ++ default 63 ++ ---help--- ++ This is the highest numbered device created in /dev. You will actually have ++ NR_TTY_DEVICES+1 devices in /dev. The default is 63, which will result in ++ 64 /dev entries. The lowest number you can set is 11, anything below that, ++ and it will default to 11. 63 is also the upper limit so we don't overrun ++ the serial consoles. ++ ++ + config HW_CONSOLE + bool + depends on VT && !S390 && !UML +diff --git a/include/linux/vt.h b/include/linux/vt.h +index 02c1c02..2ba4d21 100644 +--- a/include/linux/vt.h ++++ b/include/linux/vt.h +@@ -18,8 +18,19 @@ extern int unregister_vt_notifier(struct notifier_block *nb); + * resizing). + */ + #define MIN_NR_CONSOLES 1 /* must be at least 1 */ ++#if (CONFIG_NR_TTY_DEVICES < 4) ++/* Lower Limit */ ++#define MAX_NR_CONSOLES 4 /* serial lines start at 64 */ ++#define MAX_NR_USER_CONSOLES 4 /* must be root to allocate above this */ ++#elif (CONFIG_NR_TTY_DEVICES > 63) ++/* Upper Limit */ + #define MAX_NR_CONSOLES 63 /* serial lines start at 64 */ + #define MAX_NR_USER_CONSOLES 63 /* must be root to allocate above this */ ++#else ++/* They chose a sensible number */ ++#define MAX_NR_CONSOLES CONFIG_NR_TTY_DEVICES ++#define MAX_NR_USER_CONSOLES CONFIG_NR_TTY_DEVICES ++#endif + /* Note: the ioctl VT_GETSTATE does not work for + consoles 16 and higher (since it returns a short) */ + +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1045-pm-debug_less_verbose.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1045-pm-debug_less_verbose.patch.patch new file mode 100644 index 0000000000..d5bf1f8f11 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1045-pm-debug_less_verbose.patch.patch @@ -0,0 +1,28 @@ +From 2ea3a6a1337ce1ad496db7e650ac6301f7be34dd Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Sun, 13 Apr 2008 07:23:47 +0100 +Subject: [PATCH] pm-debug_less_verbose.patch + +--- + drivers/base/power/main.c | 4 ++-- + 1 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/base/power/main.c b/drivers/base/power/main.c +index 691ffb6..86ba4f1 100644 +--- a/drivers/base/power/main.c ++++ b/drivers/base/power/main.c +@@ -40,9 +40,9 @@ int (*platform_enable_wakeup)(struct device *dev, int is_on); + + void device_pm_add(struct device *dev) + { +- pr_debug("PM: Adding info for %s:%s\n", ++ /* pr_debug("PM: Adding info for %s:%s\n", + dev->bus ? dev->bus->name : "No Bus", +- kobject_name(&dev->kobj)); ++ kobject_name(&dev->kobj)); */ + mutex_lock(&dpm_list_mtx); + list_add_tail(&dev->power.entry, &dpm_active); + mutex_unlock(&dpm_list_mtx); +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1046-s3c2410_serial-nodebug.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1046-s3c2410_serial-nodebug.patch.patch new file mode 100644 index 0000000000..0c56f4c2f9 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1046-s3c2410_serial-nodebug.patch.patch @@ -0,0 +1,40 @@ +From b2b07b5cf12c430ad74b44602b098e7b711a2b72 Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Sun, 13 Apr 2008 07:23:48 +0100 +Subject: [PATCH] s3c2410_serial-nodebug.patch + +--- + drivers/serial/s3c2410.c | 8 -------- + 1 files changed, 0 insertions(+), 8 deletions(-) + +diff --git a/drivers/serial/s3c2410.c b/drivers/serial/s3c2410.c +index e773c8e..6c93a1b 100644 +--- a/drivers/serial/s3c2410.c ++++ b/drivers/serial/s3c2410.c +@@ -708,10 +708,6 @@ static unsigned int s3c24xx_serial_getclk(struct uart_port *port, + int calc_deviation; + + for (sptr = res; sptr < resptr; sptr++) { +- printk(KERN_DEBUG +- "found clk %p (%s) quot %d, calc %d\n", +- sptr->clksrc, sptr->clksrc->name, +- sptr->quot, sptr->calc); + + calc_deviation = baud - sptr->calc; + if (calc_deviation < 0) +@@ -723,12 +719,8 @@ static unsigned int s3c24xx_serial_getclk(struct uart_port *port, + } + } + +- printk(KERN_DEBUG "best %p (deviation %d)\n", best, deviation); + } + +- printk(KERN_DEBUG "selected clock %p (%s) quot %d, calc %d\n", +- best->clksrc, best->clksrc->name, best->quot, best->calc); +- + /* store results to pass back */ + + *clksrc = best->clksrc; +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1047-input-nots-mousedev.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1047-input-nots-mousedev.patch.patch new file mode 100644 index 0000000000..198beb9760 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1047-input-nots-mousedev.patch.patch @@ -0,0 +1,37 @@ +From 5c2f325aefe9280ae6f1220200bf40281d218fda Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Sun, 13 Apr 2008 07:23:48 +0100 +Subject: [PATCH] input-nots-mousedev.patch + This patch disables the reporting of touchscreen-like devices via + /dev/input/mice. In the Neo1973 (much like other handheld devices), + we need this to distinguish between the touchscreen (which uses tslib) + and optional additional usb/bluetooth mice that might be attached. + +Signed-off-by: Harald Welte +--- + drivers/input/mousedev.c | 2 ++ + 1 files changed, 2 insertions(+), 0 deletions(-) + +diff --git a/drivers/input/mousedev.c b/drivers/input/mousedev.c +index be83516..0ae06bb 100644 +--- a/drivers/input/mousedev.c ++++ b/drivers/input/mousedev.c +@@ -1009,6 +1009,7 @@ static const struct input_device_id mousedev_ids[] = { + .evbit = { BIT_MASK(EV_KEY) | BIT_MASK(EV_REL) }, + .relbit = { BIT_MASK(REL_WHEEL) }, + }, /* A separate scrollwheel */ ++#if 0 + { + .flags = INPUT_DEVICE_ID_MATCH_EVBIT | + INPUT_DEVICE_ID_MATCH_KEYBIT | +@@ -1018,6 +1019,7 @@ static const struct input_device_id mousedev_ids[] = { + .absbit = { BIT_MASK(ABS_X) | BIT_MASK(ABS_Y) }, + }, /* A tablet like device, at least touch detection, + two absolute axes */ ++#endif + { + .flags = INPUT_DEVICE_ID_MATCH_EVBIT | + INPUT_DEVICE_ID_MATCH_KEYBIT | +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1048-s3c2440-nand-disable-hwecc.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1048-s3c2440-nand-disable-hwecc.patch.patch new file mode 100644 index 0000000000..f939f8baf2 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1048-s3c2440-nand-disable-hwecc.patch.patch @@ -0,0 +1,28 @@ +From 1d89da736ed33d3f7c398fb9f8dfddecb7c7c7a9 Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Sun, 13 Apr 2008 07:23:48 +0100 +Subject: [PATCH] s3c2440-nand-disable-hwecc.patch + Disable the hardware ECC checking on S3C2440 based platforms (HXD8, SMDK2440, + GTA02) for the time being, since our u-boot doesn't yet support it for 2k page + size NAND + +--- + drivers/mtd/nand/s3c2410.c | 2 +- + 1 files changed, 1 insertions(+), 1 deletions(-) + +diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c +index 5c1c09d..f83bed9 100644 +--- a/drivers/mtd/nand/s3c2410.c ++++ b/drivers/mtd/nand/s3c2410.c +@@ -658,7 +658,7 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info, + nmtd->mtd.owner = THIS_MODULE; + nmtd->set = set; + +- if (hardware_ecc) { ++ if (info->cpu_type == TYPE_S3C2410 && hardware_ecc) { + chip->ecc.calculate = s3c2410_nand_calculate_ecc; + chip->ecc.correct = s3c2410_nand_correct_data; + chip->ecc.mode = NAND_ECC_HW; +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1049-qt2410-cs8900.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1049-qt2410-cs8900.patch.patch new file mode 100644 index 0000000000..a7179ffd2f --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1049-qt2410-cs8900.patch.patch @@ -0,0 +1,74 @@ +From a1ad9949db4fa268e152e9b2efb2fa5932596d63 Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Sun, 13 Apr 2008 07:23:49 +0100 +Subject: [PATCH] qt2410-cs8900.patch + +--- + drivers/net/Kconfig | 4 ++-- + drivers/net/cs89x0.c | 14 +++++++++++++- + 2 files changed, 15 insertions(+), 3 deletions(-) + +diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig +index 9af05a2..272e0ec 100644 +--- a/drivers/net/Kconfig ++++ b/drivers/net/Kconfig +@@ -1209,7 +1209,7 @@ source "drivers/net/ibm_newemac/Kconfig" + + config NET_PCI + bool "EISA, VLB, PCI and on board controllers" +- depends on ISA || EISA || PCI ++ depends on ISA || EISA || PCI || MACH_QT2410 + help + This is another class of network cards which attach directly to the + bus. If you have one of those, say Y and read the Ethernet-HOWTO, +@@ -1385,7 +1385,7 @@ config FORCEDETH_NAPI + + config CS89x0 + tristate "CS89x0 support" +- depends on NET_PCI && (ISA || MACH_IXDP2351 || ARCH_IXDP2X01 || ARCH_PNX010X) ++ depends on NET_PCI && (ISA || MACH_IXDP2351 || ARCH_IXDP2X01 || ARCH_PNX010X || MACH_QT2410) + ---help--- + Support for CS89x0 chipset based Ethernet cards. If you have a + network (Ethernet) card of this type, say Y and read the +diff --git a/drivers/net/cs89x0.c b/drivers/net/cs89x0.c +index 5717509..c6235e1 100644 +--- a/drivers/net/cs89x0.c ++++ b/drivers/net/cs89x0.c +@@ -194,6 +194,10 @@ static unsigned int cs8900_irq_map[] = {IRQ_IXDP2X01_CS8900, 0, 0, 0}; + #define CIRRUS_DEFAULT_IRQ VH_INTC_INT_NUM_CASCADED_INTERRUPT_1 /* Event inputs bank 1 - ID 35/bit 3 */ + static unsigned int netcard_portlist[] __initdata = {CIRRUS_DEFAULT_BASE, 0}; + static unsigned int cs8900_irq_map[] = {CIRRUS_DEFAULT_IRQ, 0, 0, 0}; ++#elif defined(CONFIG_MACH_QT2410) ++#include ++static unsigned int netcard_portlist [] __initdata = { 0xe0000300, 0 }; ++static unsigned int cs8900_irq_map[] = { IRQ_EINT9, 0, 0, 0 }; + #else + static unsigned int netcard_portlist[] __initdata = + { 0x300, 0x320, 0x340, 0x360, 0x200, 0x220, 0x240, 0x260, 0x280, 0x2a0, 0x2c0, 0x2e0, 0}; +@@ -829,6 +833,14 @@ cs89x0_probe1(struct net_device *dev, int ioaddr, int modular) + + printk(" IRQ %d", dev->irq); + ++ dev->dev_addr[0] = 0x00; ++ dev->dev_addr[1] = 0x00; ++ dev->dev_addr[2] = 0xc0; ++ dev->dev_addr[3] = 0xff; ++ dev->dev_addr[4] = 0xee; ++ dev->dev_addr[5] = 0x08; ++ set_mac_address(dev, dev->dev_addr); ++ + #if ALLOW_DMA + if (lp->use_dma) { + get_dma_channel(dev); +@@ -1304,7 +1316,7 @@ net_open(struct net_device *dev) + else + #endif + { +-#if !defined(CONFIG_MACH_IXDP2351) && !defined(CONFIG_ARCH_IXDP2X01) && !defined(CONFIG_ARCH_PNX010X) ++#if !defined(CONFIG_MACH_IXDP2351) && !defined(CONFIG_ARCH_IXDP2X01) && !defined(CONFIG_ARCH_PNX010X) && !defined(CONFIG_MACH_QT2410) + if (((1 << dev->irq) & lp->irq_map) == 0) { + printk(KERN_ERR "%s: IRQ %d is not in our map of allowable IRQs, which is %x\n", + dev->name, dev->irq, lp->irq_map); +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1050-s3c2410-qt2410-buttons.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1050-s3c2410-qt2410-buttons.patch.patch new file mode 100644 index 0000000000..c606c2e291 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1050-s3c2410-qt2410-buttons.patch.patch @@ -0,0 +1,311 @@ +From 9deba66bfaf3a3293436e405830a666df8f36ed6 Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Sun, 13 Apr 2008 07:23:49 +0100 +Subject: [PATCH] s3c2410-qt2410-buttons.patch + +--- + arch/arm/mach-s3c2410/mach-qt2410.c | 18 +++ + drivers/input/keyboard/Kconfig | 5 + + drivers/input/keyboard/Makefile | 1 + + drivers/input/keyboard/qt2410kbd.c | 233 +++++++++++++++++++++++++++++++++++ + 4 files changed, 257 insertions(+), 0 deletions(-) + create mode 100644 drivers/input/keyboard/qt2410kbd.c + +diff --git a/arch/arm/mach-s3c2410/mach-qt2410.c b/arch/arm/mach-s3c2410/mach-qt2410.c +index 6f7b56d..daf94cd 100644 +--- a/arch/arm/mach-s3c2410/mach-qt2410.c ++++ b/arch/arm/mach-s3c2410/mach-qt2410.c +@@ -321,6 +321,24 @@ static int __init qt2410_tft_setup(char *str) + + __setup("tft=", qt2410_tft_setup); + ++static struct resource qt2410_button_resources[] = { ++ [0] = { ++ .start = S3C2410_GPF0, ++ .end = S3C2410_GPF0, ++ }, ++ [1] = { ++ .start = S3C2410_GPF2, ++ .end = S3C2410_GPF2, ++ }, ++}; ++ ++struct platform_device qt2410_button_dev = { ++ .name ="qt2410-button", ++ .num_resources = ARRAY_SIZE(qt2410_button_resources), ++ .resource = qt2410_button_resources, ++}; ++ ++ + static void __init qt2410_map_io(void) + { + s3c24xx_init_io(qt2410_iodesc, ARRAY_SIZE(qt2410_iodesc)); +diff --git a/drivers/input/keyboard/Kconfig b/drivers/input/keyboard/Kconfig +index 3b9990e..a61ca45 100644 +--- a/drivers/input/keyboard/Kconfig ++++ b/drivers/input/keyboard/Kconfig +@@ -304,5 +304,10 @@ config KEYBOARD_NEO1973 + To compile this driver as a module, choose M here: the + module will be called neo1973kbd. + ++config KEYBOARD_QT2410 ++ tristate "QT2410 buttons" ++ depends on MACH_QT2410 ++ default y ++ + + endif +diff --git a/drivers/input/keyboard/Makefile b/drivers/input/keyboard/Makefile +index 68ecfc5..34bfc33 100644 +--- a/drivers/input/keyboard/Makefile ++++ b/drivers/input/keyboard/Makefile +@@ -15,6 +15,7 @@ obj-$(CONFIG_KEYBOARD_NEWTON) += newtonkbd.o + obj-$(CONFIG_KEYBOARD_STOWAWAY) += stowaway.o + obj-$(CONFIG_KEYBOARD_CORGI) += corgikbd.o + obj-$(CONFIG_KEYBOARD_NEO1973) += neo1973kbd.o ++obj-$(CONFIG_KEYBOARD_QT2410) += qt2410kbd.o + obj-$(CONFIG_KEYBOARD_SPITZ) += spitzkbd.o + obj-$(CONFIG_KEYBOARD_HIL) += hil_kbd.o + obj-$(CONFIG_KEYBOARD_HIL_OLD) += hilkbd.o +diff --git a/drivers/input/keyboard/qt2410kbd.c b/drivers/input/keyboard/qt2410kbd.c +new file mode 100644 +index 0000000..4d497a3 +--- /dev/null ++++ b/drivers/input/keyboard/qt2410kbd.c +@@ -0,0 +1,233 @@ ++/* ++ * Keyboard driver for Armzone QT2410 ++ * ++ * (C) 2006 by OpenMoko, Inc. ++ * Author: Harald Welte ++ * All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++struct gta01kbd { ++ struct input_dev *input; ++ unsigned int suspended; ++ unsigned long suspend_jiffies; ++}; ++ ++static irqreturn_t gta01kbd_interrupt(int irq, void *dev_id) ++{ ++ struct gta01kbd *gta01kbd_data = dev_id; ++ ++ /* FIXME: use GPIO from platform_dev resources */ ++ if (s3c2410_gpio_getpin(S3C2410_GPF0)) ++ input_report_key(gta01kbd_data->input, KEY_PHONE, 1); ++ else ++ input_report_key(gta01kbd_data->input, KEY_PHONE, 0); ++ ++ input_sync(gta01kbd_data->input); ++ ++ return IRQ_HANDLED; ++} ++ ++ ++#ifdef CONFIG_PM ++static int gta01kbd_suspend(struct platform_device *dev, pm_message_t state) ++{ ++ struct gta01kbd *gta01kbd = platform_get_drvdata(dev); ++ ++ gta01kbd->suspended = 1; ++ ++ return 0; ++} ++ ++static int gta01kbd_resume(struct platform_device *dev) ++{ ++ struct gta01kbd *gta01kbd = platform_get_drvdata(dev); ++ ++ gta01kbd->suspended = 0; ++ ++ return 0; ++} ++#else ++#define gta01kbd_suspend NULL ++#define gta01kbd_resume NULL ++#endif ++ ++static int gta01kbd_probe(struct platform_device *pdev) ++{ ++ struct gta01kbd *gta01kbd; ++ struct input_dev *input_dev; ++ int irq_911; ++ int rc = 0; ++ ++ gta01kbd = kzalloc(sizeof(struct gta01kbd), GFP_KERNEL); ++ if (!gta01kbd) { ++ rc = -ENOMEM; ++ goto bail; ++ } ++ input_dev = input_allocate_device(); ++ if (!gta01kbd || !input_dev) { ++ rc = -ENOMEM; ++ goto bail_free; ++ } ++ ++ if (pdev->resource[0].flags != 0) {\ ++ rc = -EINVAL; ++ goto bail_free_dev; ++ } ++ ++ irq_911 = s3c2410_gpio_getirq(pdev->resource[0].start); ++ if (irq_911 < 0) { ++ rc = -EINVAL; ++ goto bail_free_dev; ++ } ++ ++ platform_set_drvdata(pdev, gta01kbd); ++ ++ gta01kbd->input = input_dev; ++ ++#if 0 ++ spin_lock_init(>a01kbd->lock); ++ /* Init Keyboard rescan timer */ ++ init_timer(&corgikbd->timer); ++ corgikbd->timer.function = corgikbd_timer_callback; ++ corgikbd->timer.data = (unsigned long) corgikbd; ++ ++ /* Init Hinge Timer */ ++ init_timer(&corgikbd->htimer); ++ corgikbd->htimer.function = corgikbd_hinge_timer; ++ corgikbd->htimer.data = (unsigned long) corgikbd; ++ ++ corgikbd->suspend_jiffies=jiffies; ++ ++ memcpy(corgikbd->keycode, corgikbd_keycode, sizeof(corgikbd->keycode)); ++#endif ++ ++ input_dev->name = "QT2410 Buttons"; ++ input_dev->phys = "qt2410kbd/input0"; ++ input_dev->id.bustype = BUS_HOST; ++ input_dev->id.vendor = 0x0001; ++ input_dev->id.product = 0x0001; ++ input_dev->id.version = 0x0100; ++ input_dev->cdev.dev = &pdev->dev; ++ input_dev->private = gta01kbd; ++ ++ input_dev->evbit[0] = BIT(EV_KEY); ++#if 0 ++ input_dev->keycode = gta01kbd->keycode; ++ input_dev->keycodesize = sizeof(unsigned char); ++ input_dev->keycodemax = ARRAY_SIZE(corgikbd_keycode); ++ ++ for (i = 0; i < ARRAY_SIZE(corgikbd_keycode); i++) ++ set_bit(corgikbd->keycode[i], input_dev->keybit); ++ clear_bit(0, input_dev->keybit); ++ set_bit(SW_LID, input_dev->swbit); ++ set_bit(SW_TABLET_MODE, input_dev->swbit); ++ set_bit(SW_HEADPHONE_INSERT, input_dev->swbit); ++#endif ++ ++ rc = input_register_device(gta01kbd->input); ++ if (rc) ++ goto bail_free_dev; ++ ++ s3c2410_gpio_cfgpin(S3C2410_GPF0, S3C2410_GPF0_EINT0); ++ if (request_irq(irq_911, gta01kbd_interrupt, ++ IRQF_DISABLED | IRQF_TRIGGER_RISING | ++ IRQF_TRIGGER_FALLING, "qt2410kbd_eint0", gta01kbd)) ++ printk(KERN_WARNING "gta01kbd: Can't get IRQ\n"); ++ enable_irq_wake(irq_911); ++ ++ /* FIXME: headphone insert */ ++ ++#if 0 ++ mod_timer(&corgikbd->htimer, jiffies + msecs_to_jiffies(HINGE_SCAN_INTERVAL)); ++ ++ /* Setup sense interrupts - RisingEdge Detect, sense lines as inputs */ ++ for (i = 0; i < CORGI_KEY_SENSE_NUM; i++) { ++ pxa_gpio_mode(CORGI_GPIO_KEY_SENSE(i) | GPIO_IN); ++ if (request_irq(CORGI_IRQ_GPIO_KEY_SENSE(i), corgikbd_interrupt, ++ SA_INTERRUPT | SA_TRIGGER_RISING, ++ "corgikbd", corgikbd)) ++ printk(KERN_WARNING "corgikbd: Can't get IRQ: %d!\n", i); ++ } ++ ++ /* Set Strobe lines as outputs - set high */ ++ for (i = 0; i < CORGI_KEY_STROBE_NUM; i++) ++ pxa_gpio_mode(CORGI_GPIO_KEY_STROBE(i) | GPIO_OUT | GPIO_DFLT_HIGH); ++ ++ /* Setup the headphone jack as an input */ ++ pxa_gpio_mode(CORGI_GPIO_AK_INT | GPIO_IN); ++#endif ++ ++ return 0; ++ ++bail_free_dev: ++ input_free_device(input_dev); ++bail_free: ++ kfree(gta01kbd); ++bail: ++ return rc; ++} ++ ++static int gta01kbd_remove(struct platform_device *pdev) ++{ ++ struct gta01kbd *gta01kbd = platform_get_drvdata(pdev); ++ ++ free_irq(s3c2410_gpio_getirq(pdev->resource[0].start), gta01kbd); ++#if 0 ++ int i; ++ ++ for (i = 0; i < CORGI_KEY_SENSE_NUM; i++) ++ free_irq(CORGI_IRQ_GPIO_KEY_SENSE(i), corgikbd); ++ ++ del_timer_sync(&corgikbd->htimer); ++ del_timer_sync(&corgikbd->timer); ++#endif ++ input_unregister_device(gta01kbd->input); ++ ++ kfree(gta01kbd); ++ ++ return 0; ++} ++ ++static struct platform_driver gta01kbd_driver = { ++ .probe = gta01kbd_probe, ++ .remove = gta01kbd_remove, ++ .suspend = gta01kbd_suspend, ++ .resume = gta01kbd_resume, ++ .driver = { ++ .name = "qt2410-button", ++ }, ++}; ++ ++static int __devinit gta01kbd_init(void) ++{ ++ return platform_driver_register(>a01kbd_driver); ++} ++ ++static void __exit gta01kbd_exit(void) ++{ ++ platform_driver_unregister(>a01kbd_driver); ++} ++ ++module_init(gta01kbd_init); ++module_exit(gta01kbd_exit); ++ ++MODULE_AUTHOR("Harald Welte "); ++MODULE_DESCRIPTION("Armzone QT2410 Buttons Driver"); ++MODULE_LICENSE("GPL"); +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1051-fail-unless-uimage.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1051-fail-unless-uimage.patch.patch new file mode 100644 index 0000000000..f5121d8b2f --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1051-fail-unless-uimage.patch.patch @@ -0,0 +1,27 @@ +From 13a8a1f0848115f23553d15f15aa2b836f459614 Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Sun, 13 Apr 2008 07:23:49 +0100 +Subject: [PATCH] fail-unless-uimage.patch + Fail the build noisily if "mkimage" can't be found, e.g., if we forgot to add + the u-boot directory to PATH. + +--- + scripts/mkuboot.sh | 2 +- + 1 files changed, 1 insertions(+), 1 deletions(-) + +diff --git a/scripts/mkuboot.sh b/scripts/mkuboot.sh +index 2e3d3cd..446739c 100755 +--- a/scripts/mkuboot.sh ++++ b/scripts/mkuboot.sh +@@ -11,7 +11,7 @@ if [ -z "${MKIMAGE}" ]; then + if [ -z "${MKIMAGE}" ]; then + # Doesn't exist + echo '"mkimage" command not found - U-Boot images will not be built' >&2 +- exit 0; ++ exit 1; + fi + fi + +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1052-montour-audio.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1052-montour-audio.patch.patch new file mode 100644 index 0000000000..85a2344dd3 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1052-montour-audio.patch.patch @@ -0,0 +1,26 @@ +From f8c4e2db8608131a88c6c0f17d55cbd540d32ec8 Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Sun, 13 Apr 2008 07:23:50 +0100 +Subject: [PATCH] montour-audio.patch + http://bugzilla.openmoko.org/cgi-bin/bugzilla/show_bug.cgi?id=1190 + +--- + sound/soc/codecs/wm8753.c | 2 +- + 1 files changed, 1 insertions(+), 1 deletions(-) + +diff --git a/sound/soc/codecs/wm8753.c b/sound/soc/codecs/wm8753.c +index 52207d5..3df5b44 100644 +--- a/sound/soc/codecs/wm8753.c ++++ b/sound/soc/codecs/wm8753.c +@@ -279,7 +279,7 @@ SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8753_LOUT2V, WM8753_ROUT2V, 7, 1, 0 + + SOC_SINGLE("Mono Bypass Playback Volume", WM8753_MOUTM1, 4, 7, 1), + SOC_SINGLE("Mono Sidetone Playback Volume", WM8753_MOUTM2, 4, 7, 1), +-SOC_SINGLE("Mono Voice Playback Volume", WM8753_MOUTM2, 4, 7, 1), ++SOC_SINGLE("Mono Voice Playback Volume", WM8753_MOUTM2, 0, 7, 1), + SOC_SINGLE("Mono Playback ZC Switch", WM8753_MOUTV, 7, 1, 0), + + SOC_ENUM("Bass Boost", wm8753_enum[0]), +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1053-introduce-fiq-basis.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1053-introduce-fiq-basis.patch.patch new file mode 100644 index 0000000000..066fe0f065 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1053-introduce-fiq-basis.patch.patch @@ -0,0 +1,601 @@ +From f83b2007a1e3552a5f15faacf42f7383cd73129a Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Sun, 13 Apr 2008 07:23:50 +0100 +Subject: [PATCH] introduce-fiq-basis.patch + Adds a C-based FIQ ISR which is very convenient (and unusual -- + normally you have to do FIQ ISR in assembler only). + Based on my article: + +http://warmcat.com/_wp/2007/09/17/at91rm9200-fiq-faq-and-simple-example-code-patch/ + +Implemented as a platform device and driver. + +Suspend / resume is tested and works. + +Signed-off-by: Andy Green +--- + arch/arm/mach-s3c2440/Kconfig | 7 + + arch/arm/mach-s3c2440/Makefile | 1 + + arch/arm/mach-s3c2440/fiq_c_isr.c | 250 ++++++++++++++++++++++++++ + arch/arm/mach-s3c2440/fiq_c_isr.h | 64 +++++++ + arch/arm/mach-s3c2440/mach-gta02.c | 22 +++ + arch/arm/plat-s3c24xx/irq.c | 32 +++- + include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h | 28 +++ + include/asm-arm/arch-s3c2410/irqs.h | 4 + + include/asm-arm/plat-s3c24xx/irq.h | 20 ++ + 9 files changed, 426 insertions(+), 2 deletions(-) + create mode 100644 arch/arm/mach-s3c2440/fiq_c_isr.c + create mode 100644 arch/arm/mach-s3c2440/fiq_c_isr.h + create mode 100644 include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h + +diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig +index 1fab1c0..f7bea5d 100644 +--- a/arch/arm/mach-s3c2440/Kconfig ++++ b/arch/arm/mach-s3c2440/Kconfig +@@ -22,6 +22,13 @@ config S3C2440_DMA + help + Support for S3C2440 specific DMA code5A + ++config S3C2440_C_FIQ ++ bool "FIQ ISR support in C" ++ depends on ARCH_S3C2410 ++ select FIQ ++ help ++ Support for S3C2440 FIQ support in C -- see ++ ./arch/arm/macs3c2440/fiq_c_isr.c + + menu "S3C2440 Machines" + +diff --git a/arch/arm/mach-s3c2440/Makefile b/arch/arm/mach-s3c2440/Makefile +index 5305fdb..e3ca9e3 100644 +--- a/arch/arm/mach-s3c2440/Makefile ++++ b/arch/arm/mach-s3c2440/Makefile +@@ -13,6 +13,7 @@ obj-$(CONFIG_CPU_S3C2440) += s3c2440.o dsc.o + obj-$(CONFIG_CPU_S3C2440) += irq.o + obj-$(CONFIG_CPU_S3C2440) += clock.o + obj-$(CONFIG_S3C2440_DMA) += dma.o ++obj-$(CONFIG_S3C2440_C_FIQ) += fiq_c_isr.o + + # Machine support + +diff --git a/arch/arm/mach-s3c2440/fiq_c_isr.c b/arch/arm/mach-s3c2440/fiq_c_isr.c +new file mode 100644 +index 0000000..12f4527 +--- /dev/null ++++ b/arch/arm/mach-s3c2440/fiq_c_isr.c +@@ -0,0 +1,250 @@ ++/* ++ * Copyright 2007 Andy Green ++ * S3C modfifications ++ * Copyright 2008 Andy Green ++ */ ++ ++#include ++#include ++#include ++#include ++#include "fiq_c_isr.h" ++#include ++#include ++#include ++ ++#include ++ ++#include ++#include ++ ++/* ++ * Major Caveats for using FIQ ++ * --------------------------- ++ * ++ * 1) it CANNOT touch any vmalloc()'d memory, only memory ++ * that was kmalloc()'d. Static allocations in the monolithic kernel ++ * are kmalloc()'d so they are okay. You can touch memory-mapped IO, but ++ * the pointer for it has to have been stored in kmalloc'd memory. The ++ * reason for this is simple: every now and then Linux turns off interrupts ++ * and reorders the paging tables. If a FIQ happens during this time, the ++ * virtual memory space can be partly or entirely disordered or missing. ++ * ++ * 2) Because vmalloc() is used when a module is inserted, THIS FIQ ++ * ISR HAS TO BE IN THE MONOLITHIC KERNEL, not a module. But the way ++ * it is set up, you can all to enable and disable it from your module ++ * and intercommunicate with it through struct fiq_ipc ++ * fiq_ipc which you can define in ++ * asm/archfiq_ipc_type.h. The reason is the same as above, a ++ * FIQ could happen while even the ISR is not present in virtual memory ++ * space due to pagetables being changed at the time. ++ * ++ * 3) You can't call any Linux API code except simple macros ++ * - understand that FIQ can come in at any time, no matter what ++ * state of undress the kernel may privately be in, thinking it ++ * locked the door by turning off interrupts... FIQ is an ++ * unstoppable monster force (which is its value) ++ * - they are not vmalloc()'d memory safe ++ * - they might do crazy stuff like sleep: FIQ pisses fire and ++ * is not interested in 'sleep' that the weak seem to need ++ * - calling APIs from FIQ can re-enter un-renterable things ++ * - summary: you cannot interoperate with linux APIs directly in the FIQ ISR ++ * ++ * If you follow these rules, it is fantastic, an extremely powerful, solid, ++ * genuine hard realtime feature. ++ * ++ */ ++ ++/* more than enough to cover our jump instruction to the isr */ ++#define SIZEOF_FIQ_JUMP 8 ++/* more than enough to cover s3c2440_fiq_isr() in 4K blocks */ ++#define SIZEOF_FIQ_ISR 0x2000 ++/* increase the size of the stack that is active during FIQ as needed */ ++static u8 u8aFiqStack[4096]; ++ ++/* only one FIQ ISR possible, okay to do these here */ ++u32 _fiq_ack_mask; /* used by isr exit define */ ++unsigned long _fiq_count_fiqs; /* used by isr exit define */ ++static int _fiq_irq; /* private ; irq index we were started with, or 0 */ ++ ++/* this function must live in the monolithic kernel somewhere! A module is ++ * NOT good enough! ++ */ ++extern void __attribute__ ((naked)) s3c2440_fiq_isr(void); ++ ++/* this is copied into the hard FIQ vector during init */ ++ ++static void __attribute__ ((naked)) s3c2440_FIQ_Branch(void) ++{ ++ asm __volatile__ ( ++ "mov pc, r8 ; " ++ ); ++} ++ ++/* sysfs */ ++ ++static ssize_t show_count(struct device *dev, struct device_attribute *attr, ++ char *buf) ++{ ++ return sprintf(buf, "%ld\n", _fiq_count_fiqs); ++} ++ ++static DEVICE_ATTR(count, 0444, show_count, NULL); ++ ++static struct attribute *s3c2440_fiq_sysfs_entries[] = { ++ &dev_attr_count.attr, ++ NULL ++}; ++ ++static struct attribute_group s3c2440_fiq_attr_group = { ++ .name = "fiq", ++ .attrs = s3c2440_fiq_sysfs_entries, ++}; ++ ++/* ++ * call this from your kernel module to set up the FIQ ISR to service FIQs, ++ * You need to have configured your FIQ input pin before anything will happen ++ * ++ * call it with, eg, IRQ_TIMER3 from asm-arm/arch-s3c2410/irqs.h ++ * ++ * you still need to clear the source interrupt in S3C2410_INTMSK to get ++ * anything good happening ++ */ ++static void fiq_init_irq_source(int irq_index_fiq) ++{ ++ if (!irq_index_fiq) /* no interrupt */ ++ return; ++ ++ printk(KERN_INFO"Enabling FIQ using int idx %d\n", ++ irq_index_fiq - S3C2410_CPUIRQ_OFFSET); ++ local_fiq_disable(); ++ ++ _fiq_irq = irq_index_fiq; ++ _fiq_ack_mask = 1 << (irq_index_fiq - S3C2410_CPUIRQ_OFFSET); ++ ++ /* let our selected interrupt be a magic FIQ interrupt */ ++ __raw_writel(_fiq_ack_mask, S3C2410_INTMOD); ++ ++ /* it's ready to go as soon as we unmask the source in S3C2410_INTMSK */ ++ local_fiq_enable(); ++} ++ ++ ++/* call this from your kernel module to disable generation of FIQ actions */ ++static void fiq_disable_irq_source(void) ++{ ++ /* nothing makes FIQ any more */ ++ __raw_writel(0, S3C2410_INTMOD); ++ local_fiq_disable(); ++ _fiq_irq = 0; /* no active source interrupt now either */ ++} ++ ++/* this starts FIQ timer events... they continue until the FIQ ISR sees that ++ * its work is done and it turns off the timer. After setting up the fiq_ipc ++ * struct with new work, you call this to start FIQ timer actions up again. ++ * Only the FIQ ISR decides when it is done and controls turning off the ++ * timer events. ++ */ ++void fiq_kick(void) ++{ ++ unsigned long flags; ++ ++ /* we have to take care about FIQ because this modification is ++ * non-atomic, FIQ could come in after the read and before the ++ * writeback and its changes to the register would be lost ++ * (platform INTMSK mod code is taken care of already) ++ */ ++ local_save_flags(flags); ++ local_fiq_disable(); ++ __raw_writel(__raw_readl(S3C2410_INTMSK) & ++ ~(1 << (_fiq_irq - S3C2410_CPUIRQ_OFFSET)), ++ S3C2410_INTMSK); ++ local_irq_restore(flags); ++} ++EXPORT_SYMBOL_GPL(fiq_kick); ++ ++ ++ ++static int __init sc32440_fiq_probe(struct platform_device *pdev) ++{ ++ struct resource *r = platform_get_resource(pdev, IORESOURCE_IRQ, 0); ++ ++ if (!r) ++ return -EIO; ++ /* configure for the interrupt we are meant to use */ ++ fiq_init_irq_source(r->start); ++ ++ return sysfs_create_group(&pdev->dev.kobj, &s3c2440_fiq_attr_group); ++} ++ ++static int sc32440_fiq_remove(struct platform_device *pdev) ++{ ++ fiq_disable_irq_source(); ++ sysfs_remove_group(&pdev->dev.kobj, &s3c2440_fiq_attr_group); ++ return 0; ++} ++ ++static void fiq_set_vector_and_regs(void) ++{ ++ struct pt_regs regs; ++ ++ /* prep the special FIQ mode regs */ ++ memset(®s, 0, sizeof(regs)); ++ regs.ARM_r8 = (unsigned long)s3c2440_fiq_isr; ++ regs.ARM_sp = (unsigned long)u8aFiqStack + sizeof(u8aFiqStack) - 4; ++ /* set up the special FIQ-mode-only registers from our regs */ ++ set_fiq_regs(®s); ++ /* copy our jump to the real ISR into the hard vector address */ ++ set_fiq_handler(s3c2440_FIQ_Branch, SIZEOF_FIQ_JUMP); ++} ++ ++#ifdef CONFIG_PM ++static int sc32440_fiq_suspend(struct platform_device *pdev, pm_message_t state) ++{ ++ /* nothing makes FIQ any more */ ++ __raw_writel(0, S3C2410_INTMOD); ++ local_fiq_disable(); ++ ++ return 0; ++} ++ ++static int sc32440_fiq_resume(struct platform_device *pdev) ++{ ++ fiq_set_vector_and_regs(); ++ fiq_init_irq_source(_fiq_irq); ++ return 0; ++} ++#else ++#define sc32440_fiq_suspend NULL ++#define sc32440_fiq_resume NULL ++#endif ++ ++static struct platform_driver sc32440_fiq_driver = { ++ .driver = { ++ .name = "sc32440_fiq", ++ .owner = THIS_MODULE, ++ }, ++ ++ .probe = sc32440_fiq_probe, ++ .remove = __devexit_p(sc32440_fiq_remove), ++ .suspend = sc32440_fiq_suspend, ++ .resume = sc32440_fiq_resume, ++}; ++ ++static int __init sc32440_fiq_init(void) ++{ ++ fiq_set_vector_and_regs(); ++ ++ return platform_driver_register(&sc32440_fiq_driver); ++} ++ ++static void __exit sc32440_fiq_exit(void) ++{ ++ fiq_disable_irq_source(); ++} ++ ++MODULE_AUTHOR("Andy Green "); ++MODULE_LICENSE("GPL"); ++ ++module_init(sc32440_fiq_init); ++module_exit(sc32440_fiq_exit); +diff --git a/arch/arm/mach-s3c2440/fiq_c_isr.h b/arch/arm/mach-s3c2440/fiq_c_isr.h +new file mode 100644 +index 0000000..f08740e +--- /dev/null ++++ b/arch/arm/mach-s3c2440/fiq_c_isr.h +@@ -0,0 +1,64 @@ ++#ifndef _LINUX_FIQ_C_ISR_H ++#define _LINUX_FIQ_C_ISR_H ++ ++#include ++ ++extern unsigned long _fiq_count_fiqs; ++extern u32 _fiq_ack_mask; ++ ++/* This CANNOT be implemented in a module -- it has to be used in code ++ * included in the monolithic kernel ++ */ ++ ++#define FIQ_HANDLER_START() \ ++void __attribute__ ((naked)) s3c2440_fiq_isr(void) \ ++{\ ++ /*\ ++ * you can declare local vars here, take care to set the frame size\ ++ * below accordingly if there are more than a few dozen bytes of them\ ++ */\ ++ ++/* stick your locals here :-) ++ * Do NOT initialize them here! define them and initialize them after ++ * FIQ_HANDLER_ENTRY() is done. ++ */ ++ ++#define FIQ_HANDLER_ENTRY(LOCALS, FRAME) \ ++ const int _FIQ_FRAME_SIZE = FRAME; \ ++ /* entry takes care to store registers we will be treading on here */\ ++ asm __volatile__ (\ ++ "mov ip, sp ;"\ ++ /* stash FIQ and r0-r8 normal regs */\ ++ "stmdb sp!, {r0-r12, lr};"\ ++ /* allow SP to get some space */\ ++ "sub sp, sp, %1 ;"\ ++ /* !! THIS SETS THE FRAME, adjust to > sizeof locals */\ ++ "sub fp, sp, %0 ;"\ ++ :\ ++ : "rI" (LOCALS), "rI" (FRAME)\ ++ :"r9"\ ++ ); ++ ++/* stick your ISR code here and then end with... */ ++ ++#define FIQ_HANDLER_END() \ ++ _fiq_count_fiqs++;\ ++ __raw_writel(_fiq_ack_mask, S3C2410_SRCPND);\ ++\ ++ /* exit back to normal mode restoring everything */\ ++ asm __volatile__ (\ ++ /* pop our allocation */\ ++ "add sp, sp, %0 ;"\ ++ /* return FIQ regs back to pristine state\ ++ * and get normal regs back\ ++ */\ ++ "ldmia sp!, {r0-r12, lr};"\ ++\ ++ /* return */\ ++ "subs pc, lr, #4;"\ ++ : \ ++ : "rI" (_FIQ_FRAME_SIZE) \ ++ );\ ++} ++ ++#endif /* _LINUX_FIQ_C_ISR_H */ +diff --git a/arch/arm/mach-s3c2440/mach-gta02.c b/arch/arm/mach-s3c2440/mach-gta02.c +index 46acede..0bdd0e0 100644 +--- a/arch/arm/mach-s3c2440/mach-gta02.c ++++ b/arch/arm/mach-s3c2440/mach-gta02.c +@@ -78,9 +78,31 @@ + + #include + ++#include ++#include "fiq_c_isr.h" ++ + /* arbitrates which sensor IRQ owns the shared SPI bus */ + static spinlock_t motion_irq_lock; + ++/* define FIQ IPC struct */ ++/* ++ * contains stuff FIQ ISR modifies and normal kernel code can see and use ++ * this is defined in , you should customize ++ * the definition in there and include the same definition in your kernel ++ * module that wants to interoperate with your FIQ code. ++ */ ++struct fiq_ipc fiq_ipc; ++EXPORT_SYMBOL(fiq_ipc); ++ ++/* define FIQ ISR */ ++ ++FIQ_HANDLER_START() ++/* define your locals here -- no initializers though */ ++FIQ_HANDLER_ENTRY(256, 512) ++/* Your ISR here :-) */ ++FIQ_HANDLER_END() ++ ++ + static struct map_desc gta02_iodesc[] __initdata = { + { + .virtual = 0xe0000000, +diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c +index 8fbc884..82f0b04 100644 +--- a/arch/arm/plat-s3c24xx/irq.c ++++ b/arch/arm/plat-s3c24xx/irq.c +@@ -133,12 +133,20 @@ static void + s3c_irq_mask(unsigned int irqno) + { + unsigned long mask; +- ++#ifdef CONFIG_S3C2440_C_FIQ ++ unsigned long flags; ++#endif + irqno -= IRQ_EINT0; +- ++#ifdef CONFIG_S3C2440_C_FIQ ++ local_save_flags(flags); ++ local_fiq_disable(); ++#endif + mask = __raw_readl(S3C2410_INTMSK); + mask |= 1UL << irqno; + __raw_writel(mask, S3C2410_INTMSK); ++#ifdef CONFIG_S3C2440_C_FIQ ++ local_irq_restore(flags); ++#endif + } + + static inline void +@@ -155,9 +163,19 @@ s3c_irq_maskack(unsigned int irqno) + { + unsigned long bitval = 1UL << (irqno - IRQ_EINT0); + unsigned long mask; ++#ifdef CONFIG_S3C2440_C_FIQ ++ unsigned long flags; ++#endif + ++#ifdef CONFIG_S3C2440_C_FIQ ++ local_save_flags(flags); ++ local_fiq_disable(); ++#endif + mask = __raw_readl(S3C2410_INTMSK); + __raw_writel(mask|bitval, S3C2410_INTMSK); ++#ifdef CONFIG_S3C2440_C_FIQ ++ local_irq_restore(flags); ++#endif + + __raw_writel(bitval, S3C2410_SRCPND); + __raw_writel(bitval, S3C2410_INTPND); +@@ -168,15 +186,25 @@ static void + s3c_irq_unmask(unsigned int irqno) + { + unsigned long mask; ++#ifdef CONFIG_S3C2440_C_FIQ ++ unsigned long flags; ++#endif + + if (irqno != IRQ_TIMER4 && irqno != IRQ_EINT8t23) + irqdbf2("s3c_irq_unmask %d\n", irqno); + + irqno -= IRQ_EINT0; + ++#ifdef CONFIG_S3C2440_C_FIQ ++ local_save_flags(flags); ++ local_fiq_disable(); ++#endif + mask = __raw_readl(S3C2410_INTMSK); + mask &= ~(1UL << irqno); + __raw_writel(mask, S3C2410_INTMSK); ++#ifdef CONFIG_S3C2440_C_FIQ ++ local_irq_restore(flags); ++#endif + } + + struct irq_chip s3c_irq_level_chip = { +diff --git a/include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h b/include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h +new file mode 100644 +index 0000000..341f2bb +--- /dev/null ++++ b/include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h +@@ -0,0 +1,28 @@ ++#ifndef _LINUX_FIQ_IPC_H ++#define _LINUX_FIQ_IPC_H ++ ++/* ++ * this defines the struct which is used to communicate between the FIQ ++ * world and the normal linux kernel world. One of these structs is ++ * statically defined for you in the monolithic kernel so the FIQ ISR code ++ * can safely touch it any any time. ++ * ++ * You also want to include this file in your kernel module that wants to ++ * communicate with your FIQ code. Add any kinds of vars that are used by ++ * the FIQ ISR and the module in here. ++ * ++ * To get you started there is just an int that is incremented every FIQ ++ * you can remove this when you are ready to customize, but it is useful ++ * for testing ++ */ ++ ++struct fiq_ipc { ++ u8 u8a[0]; /* placeholder */ ++}; ++ ++/* actual definition lives in arch/arm/mach-s3c2440/fiq_c_isr.c */ ++extern struct fiq_ipc fiq_ipc; ++ ++extern void fiq_kick(void); /* provoke a FIQ "immediately" */ ++ ++#endif /* _LINUX_FIQ_IPC_H */ +diff --git a/include/asm-arm/arch-s3c2410/irqs.h b/include/asm-arm/arch-s3c2410/irqs.h +index 9522cd1..ab50ffb 100644 +--- a/include/asm-arm/arch-s3c2410/irqs.h ++++ b/include/asm-arm/arch-s3c2410/irqs.h +@@ -188,4 +188,8 @@ + #define IRQ_GLAMO_MMC IRQ_GLAMO(7) + #define IRQ_GLAMO_RISC IRQ_GLAMO(8) + ++/* offset for FIQ IRQ numbers - used by arm fiq.c */ ++ ++#define FIQ_START 0 ++ + #endif /* __ASM_ARCH_IRQ_H */ +diff --git a/include/asm-arm/plat-s3c24xx/irq.h b/include/asm-arm/plat-s3c24xx/irq.h +index 8af6d95..f70b1fc 100644 +--- a/include/asm-arm/plat-s3c24xx/irq.h ++++ b/include/asm-arm/plat-s3c24xx/irq.h +@@ -23,8 +23,15 @@ s3c_irqsub_mask(unsigned int irqno, unsigned int parentbit, + { + unsigned long mask; + unsigned long submask; ++#ifdef CONFIG_S3C2440_C_FIQ ++ unsigned long flags; ++#endif + + submask = __raw_readl(S3C2410_INTSUBMSK); ++#ifdef CONFIG_S3C2440_C_FIQ ++ local_save_flags(flags); ++ local_fiq_disable(); ++#endif + mask = __raw_readl(S3C2410_INTMSK); + + submask |= (1UL << (irqno - IRQ_S3CUART_RX0)); +@@ -37,6 +44,9 @@ s3c_irqsub_mask(unsigned int irqno, unsigned int parentbit, + + /* write back masks */ + __raw_writel(submask, S3C2410_INTSUBMSK); ++#ifdef CONFIG_S3C2440_C_FIQ ++ local_irq_restore(flags); ++#endif + + } + +@@ -45,8 +55,15 @@ s3c_irqsub_unmask(unsigned int irqno, unsigned int parentbit) + { + unsigned long mask; + unsigned long submask; ++#ifdef CONFIG_S3C2440_C_FIQ ++ unsigned long flags; ++#endif + + submask = __raw_readl(S3C2410_INTSUBMSK); ++#ifdef CONFIG_S3C2440_C_FIQ ++ local_save_flags(flags); ++ local_fiq_disable(); ++#endif + mask = __raw_readl(S3C2410_INTMSK); + + submask &= ~(1UL << (irqno - IRQ_S3CUART_RX0)); +@@ -55,6 +72,9 @@ s3c_irqsub_unmask(unsigned int irqno, unsigned int parentbit) + /* write back masks */ + __raw_writel(submask, S3C2410_INTSUBMSK); + __raw_writel(mask, S3C2410_INTMSK); ++#ifdef CONFIG_S3C2440_C_FIQ ++ local_irq_restore(flags); ++#endif + } + + +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1054-introduce-fiq-use-timer3-as-source.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1054-introduce-fiq-use-timer3-as-source.patch.patch new file mode 100644 index 0000000000..d02655bf5c --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1054-introduce-fiq-use-timer3-as-source.patch.patch @@ -0,0 +1,220 @@ +From 4ef3bf9d0e7ffd1e70f24e47b7ede98258c8b8f4 Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Sun, 13 Apr 2008 07:23:51 +0100 +Subject: [PATCH] introduce-fiq-use-timer3-as-source.patch + +This makes the FIQ stuff specific to one of the timers on the +s3c244x and adds the platform stuff for fiq in the gta02 init + +Currently one sysfs node is exposed, a count of FIQ events + +cat /sys/devices/platform/sc32440_fiq.0/fiq/count + +From: Andy Green +Signed-off-by: Andy Green +--- + arch/arm/mach-s3c2440/fiq_c_isr.c | 56 +++++++++++++++++++++---- + arch/arm/mach-s3c2440/fiq_c_isr.h | 2 + + arch/arm/mach-s3c2440/mach-gta02.c | 17 ++++++++ + include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h | 2 +- + 4 files changed, 67 insertions(+), 10 deletions(-) + +diff --git a/arch/arm/mach-s3c2440/fiq_c_isr.c b/arch/arm/mach-s3c2440/fiq_c_isr.c +index 12f4527..a71a234 100644 +--- a/arch/arm/mach-s3c2440/fiq_c_isr.c ++++ b/arch/arm/mach-s3c2440/fiq_c_isr.c +@@ -18,6 +18,9 @@ + #include + #include + ++#include ++#include ++ + /* + * Major Caveats for using FIQ + * --------------------------- +@@ -66,6 +69,10 @@ static u8 u8aFiqStack[4096]; + u32 _fiq_ack_mask; /* used by isr exit define */ + unsigned long _fiq_count_fiqs; /* used by isr exit define */ + static int _fiq_irq; /* private ; irq index we were started with, or 0 */ ++struct s3c2410_pwm pwm_timer_fiq; ++int _fiq_timer_index; ++u16 _fiq_timer_divisor; ++ + + /* this function must live in the monolithic kernel somewhere! A module is + * NOT good enough! +@@ -110,23 +117,45 @@ static struct attribute_group s3c2440_fiq_attr_group = { + * you still need to clear the source interrupt in S3C2410_INTMSK to get + * anything good happening + */ +-static void fiq_init_irq_source(int irq_index_fiq) ++static int fiq_init_irq_source(int irq_index_fiq) + { ++ int rc = 0; ++ + if (!irq_index_fiq) /* no interrupt */ +- return; ++ goto bail; + +- printk(KERN_INFO"Enabling FIQ using int idx %d\n", +- irq_index_fiq - S3C2410_CPUIRQ_OFFSET); + local_fiq_disable(); + + _fiq_irq = irq_index_fiq; + _fiq_ack_mask = 1 << (irq_index_fiq - S3C2410_CPUIRQ_OFFSET); ++ timer_index = (irq_index_fiq - IRQ_TIMER0); ++ ++ /* set up the timer to operate as a pwm device */ ++ ++ rc = s3c2410_pwm_init(&pwm_timer_fiq); ++ if (rc) ++ goto bail; ++ ++ pwm_timer_fiq.timerid = PWM0 + timer_index; ++ pwm_timer_fiq.prescaler = (6 - 1) / 2; ++ pwm_timer_fiq.divider = S3C2410_TCFG1_MUX3_DIV2; ++ /* default rate == ~32us */ ++ pwm_timer_fiq.counter = pwm_timer_fiq.comparer = ++ timer_divisor = 64; ++ ++ rc = s3c2410_pwm_enable(&pwm_timer_fiq); ++ if (rc) ++ goto bail; ++ ++ s3c2410_pwm_start(&pwm_timer_fiq); + + /* let our selected interrupt be a magic FIQ interrupt */ + __raw_writel(_fiq_ack_mask, S3C2410_INTMOD); + + /* it's ready to go as soon as we unmask the source in S3C2410_INTMSK */ + local_fiq_enable(); ++bail: ++ return rc; + } + + +@@ -139,15 +168,13 @@ static void fiq_disable_irq_source(void) + _fiq_irq = 0; /* no active source interrupt now either */ + } + +-/* this starts FIQ timer events... they continue until the FIQ ISR sees that +- * its work is done and it turns off the timer. After setting up the fiq_ipc +- * struct with new work, you call this to start FIQ timer actions up again. +- * Only the FIQ ISR decides when it is done and controls turning off the +- * timer events. ++/* ++ * fiq_kick() forces a FIQ event to happen shortly after leaving the routine + */ + void fiq_kick(void) + { + unsigned long flags; ++ u32 tcon; + + /* we have to take care about FIQ because this modification is + * non-atomic, FIQ could come in after the read and before the +@@ -156,15 +183,24 @@ void fiq_kick(void) + */ + local_save_flags(flags); + local_fiq_disable(); ++ /* allow FIQs to resume */ + __raw_writel(__raw_readl(S3C2410_INTMSK) & + ~(1 << (_fiq_irq - S3C2410_CPUIRQ_OFFSET)), + S3C2410_INTMSK); ++ tcon = __raw_readl(S3C2410_TCON) & ~S3C2410_TCON_T3START; ++ /* fake the timer to a count of 1 */ ++ __raw_writel(1, S3C2410_TCNTB(timer_index)); ++ __raw_writel(tcon | S3C2410_TCON_T3MANUALUPD, S3C2410_TCON); ++ __raw_writel(tcon | S3C2410_TCON_T3MANUALUPD | S3C2410_TCON_T3START, ++ S3C2410_TCON); ++ __raw_writel(tcon | S3C2410_TCON_T3START, S3C2410_TCON); + local_irq_restore(flags); + } + EXPORT_SYMBOL_GPL(fiq_kick); + + + ++ + static int __init sc32440_fiq_probe(struct platform_device *pdev) + { + struct resource *r = platform_get_resource(pdev, IORESOURCE_IRQ, 0); +@@ -172,6 +208,8 @@ static int __init sc32440_fiq_probe(struct platform_device *pdev) + if (!r) + return -EIO; + /* configure for the interrupt we are meant to use */ ++ printk(KERN_INFO"Enabling FIQ using irq %d\n", r->start); ++ + fiq_init_irq_source(r->start); + + return sysfs_create_group(&pdev->dev.kobj, &s3c2440_fiq_attr_group); +diff --git a/arch/arm/mach-s3c2440/fiq_c_isr.h b/arch/arm/mach-s3c2440/fiq_c_isr.h +index f08740e..0c45eb7 100644 +--- a/arch/arm/mach-s3c2440/fiq_c_isr.h ++++ b/arch/arm/mach-s3c2440/fiq_c_isr.h +@@ -5,6 +5,8 @@ + + extern unsigned long _fiq_count_fiqs; + extern u32 _fiq_ack_mask; ++extern int _fiq_timer_index; ++extern u16 _fiq_timer_divisor; + + /* This CANNOT be implemented in a module -- it has to be used in code + * included in the monolithic kernel +diff --git a/arch/arm/mach-s3c2440/mach-gta02.c b/arch/arm/mach-s3c2440/mach-gta02.c +index 0bdd0e0..cb839b2 100644 +--- a/arch/arm/mach-s3c2440/mach-gta02.c ++++ b/arch/arm/mach-s3c2440/mach-gta02.c +@@ -57,6 +57,7 @@ + #include + #include + ++#include + #include + #include + #include +@@ -336,6 +337,21 @@ struct platform_device gta02_pmu_dev = { + }, + }; + ++/* FIQ */ ++ ++static struct resource sc32440_fiq_resources[] = { ++ [0] = { ++ .flags = IORESOURCE_IRQ, ++ .start = IRQ_TIMER3, ++ .end = IRQ_TIMER3, ++ }, ++}; ++ ++struct platform_device sc32440_fiq_device = { ++ .name = "sc32440_fiq", ++ .num_resources = 1, ++ .resource = sc32440_fiq_resources, ++}; + + /* NOR Flash */ + +@@ -403,6 +419,7 @@ static struct platform_device *gta02_devices[] __initdata = { + &s3c_device_nand, + &s3c_device_ts, + >a02_nor_flash, ++ &sc32440_fiq_device, + }; + + static struct s3c2410_nand_set gta02_nand_sets[] = { +diff --git a/include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h b/include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h +index 341f2bb..6cbd8e4 100644 +--- a/include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h ++++ b/include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h +@@ -22,7 +22,7 @@ struct fiq_ipc { + + /* actual definition lives in arch/arm/mach-s3c2440/fiq_c_isr.c */ + extern struct fiq_ipc fiq_ipc; +- ++extern unsigned long _fiq_count_fiqs; + extern void fiq_kick(void); /* provoke a FIQ "immediately" */ + + #endif /* _LINUX_FIQ_IPC_H */ +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1055-introduce-fiq-migrate-vibrator-gta02-only.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1055-introduce-fiq-migrate-vibrator-gta02-only.patch.patch new file mode 100644 index 0000000000..399da0f33a --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1055-introduce-fiq-migrate-vibrator-gta02-only.patch.patch @@ -0,0 +1,243 @@ +From b1b2748dd58ae925df4b4e98921db373a7777e9b Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Sun, 13 Apr 2008 07:23:52 +0100 +Subject: [PATCH] introduce-fiq-migrate-vibrator-gta02-only.patch + +On GTA02 we use FIQ to manage the vibrator IO now. That +is necessary because we stole timer3 from doing hw pwm +for vibrator. This keeps the same UI in /sys but does +"bitbang pwm" on the same vibrator GPIO + +From: Andy Green +Signed-off-by: Andy Green +--- + arch/arm/mach-s3c2440/fiq_c_isr.c | 13 +++++--- + arch/arm/mach-s3c2440/mach-gta02.c | 38 ++++++++++++++++++++++++++ + drivers/leds/Kconfig | 1 + + drivers/leds/leds-neo1973-vibrator.c | 24 +++++++++++++++- + include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h | 9 +++++- + 5 files changed, 77 insertions(+), 8 deletions(-) + +diff --git a/arch/arm/mach-s3c2440/fiq_c_isr.c b/arch/arm/mach-s3c2440/fiq_c_isr.c +index a71a234..38692fc 100644 +--- a/arch/arm/mach-s3c2440/fiq_c_isr.c ++++ b/arch/arm/mach-s3c2440/fiq_c_isr.c +@@ -79,6 +79,7 @@ u16 _fiq_timer_divisor; + */ + extern void __attribute__ ((naked)) s3c2440_fiq_isr(void); + ++ + /* this is copied into the hard FIQ vector during init */ + + static void __attribute__ ((naked)) s3c2440_FIQ_Branch(void) +@@ -128,7 +129,7 @@ static int fiq_init_irq_source(int irq_index_fiq) + + _fiq_irq = irq_index_fiq; + _fiq_ack_mask = 1 << (irq_index_fiq - S3C2410_CPUIRQ_OFFSET); +- timer_index = (irq_index_fiq - IRQ_TIMER0); ++ _fiq_timer_index = (irq_index_fiq - IRQ_TIMER0); + + /* set up the timer to operate as a pwm device */ + +@@ -136,12 +137,11 @@ static int fiq_init_irq_source(int irq_index_fiq) + if (rc) + goto bail; + +- pwm_timer_fiq.timerid = PWM0 + timer_index; ++ pwm_timer_fiq.timerid = PWM0 + _fiq_timer_index; + pwm_timer_fiq.prescaler = (6 - 1) / 2; + pwm_timer_fiq.divider = S3C2410_TCFG1_MUX3_DIV2; + /* default rate == ~32us */ +- pwm_timer_fiq.counter = pwm_timer_fiq.comparer = +- timer_divisor = 64; ++ pwm_timer_fiq.counter = pwm_timer_fiq.comparer = 3000; + + rc = s3c2410_pwm_enable(&pwm_timer_fiq); + if (rc) +@@ -149,6 +149,8 @@ static int fiq_init_irq_source(int irq_index_fiq) + + s3c2410_pwm_start(&pwm_timer_fiq); + ++ _fiq_timer_divisor = 0xffff; /* so kick will work initially */ ++ + /* let our selected interrupt be a magic FIQ interrupt */ + __raw_writel(_fiq_ack_mask, S3C2410_INTMOD); + +@@ -189,7 +191,7 @@ void fiq_kick(void) + S3C2410_INTMSK); + tcon = __raw_readl(S3C2410_TCON) & ~S3C2410_TCON_T3START; + /* fake the timer to a count of 1 */ +- __raw_writel(1, S3C2410_TCNTB(timer_index)); ++ __raw_writel(1, S3C2410_TCNTB(_fiq_timer_index)); + __raw_writel(tcon | S3C2410_TCON_T3MANUALUPD, S3C2410_TCON); + __raw_writel(tcon | S3C2410_TCON_T3MANUALUPD | S3C2410_TCON_T3START, + S3C2410_TCON); +@@ -207,6 +209,7 @@ static int __init sc32440_fiq_probe(struct platform_device *pdev) + + if (!r) + return -EIO; ++ + /* configure for the interrupt we are meant to use */ + printk(KERN_INFO"Enabling FIQ using irq %d\n", r->start); + +diff --git a/arch/arm/mach-s3c2440/mach-gta02.c b/arch/arm/mach-s3c2440/mach-gta02.c +index cb839b2..8c7bbe7 100644 +--- a/arch/arm/mach-s3c2440/mach-gta02.c ++++ b/arch/arm/mach-s3c2440/mach-gta02.c +@@ -95,12 +95,50 @@ static spinlock_t motion_irq_lock; + struct fiq_ipc fiq_ipc; + EXPORT_SYMBOL(fiq_ipc); + ++#define DIVISOR_FROM_US(x) ((x) << 1) ++ ++#define FIQ_DIVISOR_VIBRATOR DIVISOR_FROM_US(100) ++ + /* define FIQ ISR */ + + FIQ_HANDLER_START() + /* define your locals here -- no initializers though */ ++ u16 divisor; + FIQ_HANDLER_ENTRY(256, 512) + /* Your ISR here :-) */ ++ divisor = 0xffff; ++ ++ /* Vibrator servicing */ ++ ++ if (fiq_ipc.vib_pwm_latched || fiq_ipc.vib_pwm) { /* not idle */ ++ if (((u8)_fiq_count_fiqs) == fiq_ipc.vib_pwm_latched) ++ s3c2410_gpio_setpin(fiq_ipc.vib_gpio_pin, 0); ++ if (((u8)_fiq_count_fiqs) == 0) { ++ fiq_ipc.vib_pwm_latched = fiq_ipc.vib_pwm; ++ if (fiq_ipc.vib_pwm_latched) ++ s3c2410_gpio_setpin(fiq_ipc.vib_gpio_pin, 1); ++ } ++ divisor = FIQ_DIVISOR_VIBRATOR; ++ } ++ ++ /* TODO: HDQ servicing */ ++ ++ ++ ++ /* disable further timer interrupts if nobody has any work ++ * or adjust rate according to who still has work ++ * ++ * CAUTION: it means forground code must disable FIQ around ++ * its own non-atomic S3C2410_INTMSK changes... not common ++ * thankfully and taken care of by the fiq-basis patch ++ */ ++ if (divisor == 0xffff) /* mask the fiq irq source */ ++ __raw_writel(__raw_readl(S3C2410_INTMSK) | _fiq_ack_mask, ++ S3C2410_INTMSK); ++ else /* still working, maybe at a different rate */ ++ __raw_writel(divisor, S3C2410_TCNTB(_fiq_timer_index)); ++ _fiq_timer_divisor = divisor; ++ + FIQ_HANDLER_END() + + +diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig +index 2f95707..77aa3bd 100644 +--- a/drivers/leds/Kconfig ++++ b/drivers/leds/Kconfig +@@ -117,6 +117,7 @@ config LEDS_CM_X270 + config LEDS_NEO1973_VIBRATOR + tristate "Vibrator Support for the FIC Neo1973 GSM phone" + depends on LEDS_CLASS && MACH_NEO1973 ++ select S3C2440_C_FIQ + help + This option enables support for the vibrator on the FIC Neo1973. + +diff --git a/drivers/leds/leds-neo1973-vibrator.c b/drivers/leds/leds-neo1973-vibrator.c +index c943a6a..36ed216 100644 +--- a/drivers/leds/leds-neo1973-vibrator.c ++++ b/drivers/leds/leds-neo1973-vibrator.c +@@ -23,6 +23,8 @@ + #include + #include + ++#include ++ + #define COUNTER 64 + + struct neo1973_vib_priv { +@@ -39,6 +41,11 @@ static void neo1973_vib_vib_set(struct led_classdev *led_cdev, + struct neo1973_vib_priv *vp = + container_of(led_cdev, struct neo1973_vib_priv, cdev); + ++ if (machine_is_neo1973_gta02()) { /* use FIQ to control GPIO */ ++ fiq_ipc.vib_pwm = value; /* set it for FIQ */ ++ fiq_kick(); /* start up FIQs if not already going */ ++ return; ++ } + /* + * value == 255 -> 99% duty cycle (full power) + * value == 128 -> 50% duty cycle (medium power) +@@ -46,7 +53,7 @@ static void neo1973_vib_vib_set(struct led_classdev *led_cdev, + */ + mutex_lock(&vp->mutex); + if (vp->has_pwm) +- s3c2410_pwm_duty_cycle(value/4, &vp->pwm); ++ s3c2410_pwm_duty_cycle(value / 4, &vp->pwm); + else { + if (value) + s3c2410_gpio_setpin(vp->gpio, 1); +@@ -123,6 +130,15 @@ static int __init neo1973_vib_probe(struct platform_device *pdev) + neo1973_vib_led.gpio = r->start; + platform_set_drvdata(pdev, &neo1973_vib_led); + ++ if (machine_is_neo1973_gta02()) { /* use FIQ to control GPIO */ ++ s3c2410_gpio_setpin(neo1973_vib_led.gpio, 0); /* off */ ++ s3c2410_gpio_cfgpin(neo1973_vib_led.gpio, S3C2410_GPIO_OUTPUT); ++ /* safe, kmalloc'd copy needed for FIQ ISR */ ++ fiq_ipc.vib_gpio_pin = neo1973_vib_led.gpio; ++ fiq_ipc.vib_pwm = 0; /* off */ ++ goto configured; ++ } ++ + /* TOUT3 */ + if (neo1973_vib_led.gpio == S3C2410_GPB3) { + rc = neo1973_vib_init_hw(&neo1973_vib_led); +@@ -133,7 +149,7 @@ static int __init neo1973_vib_probe(struct platform_device *pdev) + s3c2410_gpio_cfgpin(neo1973_vib_led.gpio, S3C2410_GPB3_TOUT3); + neo1973_vib_led.has_pwm = 1; + } +- ++configured: + mutex_init(&neo1973_vib_led.mutex); + + return led_classdev_register(&pdev->dev, &neo1973_vib_led.cdev); +@@ -141,6 +157,10 @@ static int __init neo1973_vib_probe(struct platform_device *pdev) + + static int neo1973_vib_remove(struct platform_device *pdev) + { ++ if (machine_is_neo1973_gta02()) /* use FIQ to control GPIO */ ++ fiq_ipc.vib_pwm = 0; /* off */ ++ /* would only need kick if already off so no kick needed */ ++ + if (neo1973_vib_led.has_pwm) + s3c2410_pwm_disable(&neo1973_vib_led.pwm); + +diff --git a/include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h b/include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h +index 6cbd8e4..507d235 100644 +--- a/include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h ++++ b/include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h +@@ -16,8 +16,15 @@ + * for testing + */ + ++#include ++#include ++ ++ + struct fiq_ipc { +- u8 u8a[0]; /* placeholder */ ++ /* vibrator */ ++ unsigned long vib_gpio_pin; /* which pin to meddle with */ ++ u8 vib_pwm; /* 0 = OFF -- will ensure GPIO deasserted and stop FIQ */ ++ u8 vib_pwm_latched; + }; + + /* actual definition lives in arch/arm/mach-s3c2440/fiq_c_isr.c */ +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1056-fiq-hdq.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1056-fiq-hdq.patch.patch new file mode 100644 index 0000000000..6e4fad3245 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1056-fiq-hdq.patch.patch @@ -0,0 +1,606 @@ +From 7ffc881aa6a039b2e353449b97dca8a64ee3969a Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Sun, 13 Apr 2008 07:23:52 +0100 +Subject: [PATCH] fiq-hdq.patch + +--- + arch/arm/mach-s3c2440/mach-gta02.c | 204 +++++++++++++++++++++- + drivers/power/Kconfig | 8 + + drivers/power/Makefile | 2 + + drivers/power/gta02_hdq.c | 250 ++++++++++++++++++++++++++ + include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h | 23 +++ + include/asm-arm/arch-s3c2410/gta02.h | 1 + + include/linux/gta02_hdq.h | 8 + + 7 files changed, 495 insertions(+), 1 deletions(-) + create mode 100644 drivers/power/gta02_hdq.c + create mode 100644 include/linux/gta02_hdq.h + +diff --git a/arch/arm/mach-s3c2440/mach-gta02.c b/arch/arm/mach-s3c2440/mach-gta02.c +index 8c7bbe7..cea76e7 100644 +--- a/arch/arm/mach-s3c2440/mach-gta02.c ++++ b/arch/arm/mach-s3c2440/mach-gta02.c +@@ -99,6 +99,19 @@ EXPORT_SYMBOL(fiq_ipc); + + #define FIQ_DIVISOR_VIBRATOR DIVISOR_FROM_US(100) + ++#ifdef CONFIG_GTA02_HDQ ++/* HDQ specific */ ++#define HDQ_SAMPLE_PERIOD_US 20 ++/* private HDQ FSM state -- all other info interesting for caller in fiq_ipc */ ++static enum hdq_bitbang_states hdq_state; ++static u8 hdq_ctr; ++static u8 hdq_ctr2; ++static u8 hdq_bit; ++static u8 hdq_shifter; ++static u8 hdq_tx_data_done; ++ ++#define FIQ_DIVISOR_HDQ DIVISOR_FROM_US(HDQ_SAMPLE_PERIOD_US) ++#endif + /* define FIQ ISR */ + + FIQ_HANDLER_START() +@@ -121,9 +134,171 @@ FIQ_HANDLER_ENTRY(256, 512) + divisor = FIQ_DIVISOR_VIBRATOR; + } + +- /* TODO: HDQ servicing */ ++#ifdef CONFIG_GTA02_HDQ ++ /* HDQ servicing */ ++ ++ switch (hdq_state) { ++ case HDQB_IDLE: ++ if (fiq_ipc.hdq_request_ctr == fiq_ipc.hdq_transaction_ctr) ++ break; ++ hdq_ctr = 210 / HDQ_SAMPLE_PERIOD_US; ++ s3c2410_gpio_setpin(fiq_ipc.hdq_gpio_pin, 0); ++ s3c2410_gpio_cfgpin(fiq_ipc.hdq_gpio_pin, S3C2410_GPIO_OUTPUT); ++ hdq_tx_data_done = 0; ++ hdq_state = HDQB_TX_BREAK; ++ break; ++ ++ case HDQB_TX_BREAK: /* issue low for > 190us */ ++ if (--hdq_ctr == 0) { ++ hdq_ctr = 60 / HDQ_SAMPLE_PERIOD_US; ++ hdq_state = HDQB_TX_BREAK_RECOVERY; ++ s3c2410_gpio_setpin(fiq_ipc.hdq_gpio_pin, 1); ++ } ++ break; ++ ++ case HDQB_TX_BREAK_RECOVERY: /* issue low for > 40us */ ++ if (--hdq_ctr) ++ break; ++ hdq_shifter = fiq_ipc.hdq_ads; ++ hdq_bit = 8; /* 8 bits of ads / rw */ ++ hdq_tx_data_done = 0; /* doing ads */ ++ /* fallthru on last one */ ++ case HDQB_ADS_CALC: ++ if (hdq_shifter & 1) ++ hdq_ctr = 50 / HDQ_SAMPLE_PERIOD_US; ++ else ++ hdq_ctr = 120 / HDQ_SAMPLE_PERIOD_US; ++ /* carefully precompute the other phase length */ ++ hdq_ctr2 = (210 - (hdq_ctr * HDQ_SAMPLE_PERIOD_US)) / ++ HDQ_SAMPLE_PERIOD_US; ++ hdq_state = HDQB_ADS_LOW; ++ hdq_shifter >>= 1; ++ hdq_bit--; ++ s3c2410_gpio_setpin(fiq_ipc.hdq_gpio_pin, 0); ++ break; ++ ++ case HDQB_ADS_LOW: ++ if (--hdq_ctr) ++ break; ++ s3c2410_gpio_setpin(fiq_ipc.hdq_gpio_pin, 1); ++ hdq_state = HDQB_ADS_HIGH; ++ break; ++ ++ case HDQB_ADS_HIGH: ++ if (--hdq_ctr2 > 1) /* account for HDQB_ADS_CALC */ ++ break; ++ if (hdq_bit) { /* more bits to do */ ++ hdq_state = HDQB_ADS_CALC; ++ break; ++ } ++ /* no more bits, wait it out until hdq_ctr2 exhausted */ ++ if (hdq_ctr2) ++ break; ++ /* ok no more bits and very last state */ ++ hdq_ctr = 60 / HDQ_SAMPLE_PERIOD_US; ++ /* FIXME 0 = read */ ++ if (fiq_ipc.hdq_ads & 0x80) { /* write the byte out */ ++ /* set delay before payload */ ++ hdq_ctr = 300 / HDQ_SAMPLE_PERIOD_US; ++ /* already high, no need to write */ ++ hdq_state = HDQB_WAIT_TX; ++ break; ++ } ++ /* read the next byte */ ++ hdq_bit = 8; /* 8 bits of data */ ++ hdq_ctr = 3000 / HDQ_SAMPLE_PERIOD_US; ++ hdq_state = HDQB_WAIT_RX; ++ s3c2410_gpio_cfgpin(fiq_ipc.hdq_gpio_pin, S3C2410_GPIO_INPUT); ++ break; ++ ++ case HDQB_WAIT_TX: /* issue low for > 40us */ ++ if (--hdq_ctr) ++ break; ++ if (!hdq_tx_data_done) { /* was that the data sent? */ ++ hdq_tx_data_done++; ++ hdq_shifter = fiq_ipc.hdq_tx_data; ++ hdq_bit = 8; /* 8 bits of data */ ++ hdq_state = HDQB_ADS_CALC; /* start sending */ ++ break; ++ } ++ fiq_ipc.hdq_error = 0; ++ fiq_ipc.hdq_transaction_ctr++; ++ hdq_state = HDQB_IDLE; /* all tx is done */ ++ /* idle in input mode, it's pulled up by 10K */ ++ s3c2410_gpio_cfgpin(fiq_ipc.hdq_gpio_pin, S3C2410_GPIO_INPUT); ++ break; ++ ++ case HDQB_WAIT_RX: /* wait for battery to talk to us */ ++ if (s3c2410_gpio_getpin(fiq_ipc.hdq_gpio_pin) == 0) { ++ /* it talks to us! */ ++ hdq_ctr2 = 1; ++ hdq_bit = 8; /* 8 bits of data */ ++ /* timeout */ ++ hdq_ctr = 300 / HDQ_SAMPLE_PERIOD_US; ++ hdq_state = HDQB_DATA_RX_LOW; ++ break; ++ } ++ if (--hdq_ctr == 0) { /* timed out, error */ ++ fiq_ipc.hdq_error = 1; ++ fiq_ipc.hdq_transaction_ctr++; ++ hdq_state = HDQB_IDLE; /* abort */ ++ } ++ break; ++ ++ /* ++ * HDQ basically works by measuring the low time of the bit cell ++ * 32-50us --> '1', 80 - 145us --> '0' ++ */ ++ ++ case HDQB_DATA_RX_LOW: ++ if (s3c2410_gpio_getpin(fiq_ipc.hdq_gpio_pin)) { ++ fiq_ipc.hdq_rx_data >>= 1; ++ if (hdq_ctr2 <= (65 / HDQ_SAMPLE_PERIOD_US)) ++ fiq_ipc.hdq_rx_data |= 0x80; ++ ++ if (--hdq_bit == 0) { ++ fiq_ipc.hdq_error = 0; ++ fiq_ipc.hdq_transaction_ctr++; /* done */ ++ hdq_state = HDQB_IDLE; ++ } else ++ hdq_state = HDQB_DATA_RX_HIGH; ++ /* timeout */ ++ hdq_ctr = 1000 / HDQ_SAMPLE_PERIOD_US; ++ hdq_ctr2 = 1; ++ break; ++ } ++ hdq_ctr2++; ++ if (--hdq_ctr) ++ break; ++ /* timed out, error */ ++ fiq_ipc.hdq_error = 2; ++ fiq_ipc.hdq_transaction_ctr++; ++ hdq_state = HDQB_IDLE; /* abort */ ++ break; + ++ case HDQB_DATA_RX_HIGH: ++ if (!s3c2410_gpio_getpin(fiq_ipc.hdq_gpio_pin)) { ++ /* it talks to us! */ ++ hdq_ctr2 = 1; ++ /* timeout */ ++ hdq_ctr = 400 / HDQ_SAMPLE_PERIOD_US; ++ hdq_state = HDQB_DATA_RX_LOW; ++ break; ++ } ++ if (--hdq_ctr) ++ break; ++ /* timed out, error */ ++ fiq_ipc.hdq_error = 3; ++ fiq_ipc.hdq_transaction_ctr++; ++ /* we're in input mode already */ ++ hdq_state = HDQB_IDLE; /* abort */ ++ break; ++ } + ++ if (hdq_state != HDQB_IDLE) /* ie, not idle */ ++ if (divisor > FIQ_DIVISOR_HDQ) ++ divisor = FIQ_DIVISOR_HDQ; /* keep us going */ ++#endif + + /* disable further timer interrupts if nobody has any work + * or adjust rate according to who still has work +@@ -391,6 +566,23 @@ struct platform_device sc32440_fiq_device = { + .resource = sc32440_fiq_resources, + }; + ++#ifdef CONFIG_GTA02_HDQ ++/* HDQ */ ++ ++static struct resource gta02_hdq_resources[] = { ++ [0] = { ++ .start = GTA02v5_GPIO_HDQ, ++ .end = GTA02v5_GPIO_HDQ, ++ }, ++}; ++ ++struct platform_device gta02_hdq_device = { ++ .name = "gta02-hdq", ++ .num_resources = 1, ++ .resource = gta02_hdq_resources, ++}; ++#endif ++ + /* NOR Flash */ + + #define GTA02_FLASH_BASE 0x18000000 /* GCS3 */ +@@ -1074,6 +1266,16 @@ static void __init gta02_machine_init(void) + + platform_add_devices(gta02_devices, ARRAY_SIZE(gta02_devices)); + ++#ifdef CONFIG_GTA02_HDQ ++ switch (system_rev) { ++ case GTA02v5_SYSTEM_REV: ++ case GTA02v6_SYSTEM_REV: ++ platform_device_register(>a02_hdq_device); ++ break; ++ default: ++ break; ++ } ++#endif + s3c2410_pm_init(); + + /* Set LCD_RESET / XRES to high */ +diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig +index 58c806e..0a4515d 100644 +--- a/drivers/power/Kconfig ++++ b/drivers/power/Kconfig +@@ -50,3 +50,11 @@ config BATTERY_OLPC + Say Y to enable support for the battery on the OLPC laptop. + + endif # POWER_SUPPLY ++ ++config GTA02_HDQ ++ tristate "Neo Freerunner HDQ" ++ depends on MACH_NEO1973_GTA02 && FIQ && S3C2440_C_FIQ ++ help ++ Say Y to enable support for communicating with an HDQ battery ++ on the Neo Freerunner. You probably want to select ++ at least BATTERY_BQ27000_HDQ as well +diff --git a/drivers/power/Makefile b/drivers/power/Makefile +index 6413ded..88f227f 100644 +--- a/drivers/power/Makefile ++++ b/drivers/power/Makefile +@@ -20,3 +20,5 @@ obj-$(CONFIG_APM_POWER) += apm_power.o + obj-$(CONFIG_BATTERY_DS2760) += ds2760_battery.o + obj-$(CONFIG_BATTERY_PMU) += pmu_battery.o + obj-$(CONFIG_BATTERY_OLPC) += olpc_battery.o ++ ++obj-$(CONFIG_GTA02_HDQ) += gta02_hdq.o +diff --git a/drivers/power/gta02_hdq.c b/drivers/power/gta02_hdq.c +new file mode 100644 +index 0000000..12c742e +--- /dev/null ++++ b/drivers/power/gta02_hdq.c +@@ -0,0 +1,250 @@ ++/* ++ * HDQ driver for the FIC Neo1973 GTA02 GSM phone ++ * ++ * (C) 2006-2007 by OpenMoko, Inc. ++ * Author: Andy Green ++ * All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++ ++ ++#define HDQ_READ 0 ++#define HDQ_WRITE 0x80 ++ ++ ++int gta02hdq_initialized(void) ++{ ++ return fiq_ipc.hdq_probed; ++} ++EXPORT_SYMBOL_GPL(gta02hdq_initialized); ++ ++int gta02hdq_read(int address) ++{ ++ int count_sleeps = 5; ++ int ret = -ETIME; ++ ++ mutex_lock(&fiq_ipc.hdq_lock); ++ ++ fiq_ipc.hdq_ads = address | HDQ_READ; ++ fiq_ipc.hdq_request_ctr++; ++ fiq_kick(); ++ /* ++ * FIQ takes care of it while we block our calling process ++ * But we're not spinning -- other processes run normally while ++ * we wait for the result ++ */ ++ while (count_sleeps--) { ++ msleep(10); /* valid transaction always completes in < 10ms */ ++ ++ if (fiq_ipc.hdq_request_ctr != fiq_ipc.hdq_transaction_ctr) ++ continue; ++ ++ if (fiq_ipc.hdq_error) ++ goto done; /* didn't see a response in good time */ ++ ++ ret = fiq_ipc.hdq_rx_data; ++ goto done; ++ } ++ ret = -EINVAL; ++ ++done: ++ mutex_unlock(&fiq_ipc.hdq_lock); ++ return ret; ++} ++EXPORT_SYMBOL_GPL(gta02hdq_read); ++ ++int gta02hdq_write(int address, u8 data) ++{ ++ int count_sleeps = 5; ++ int ret = -ETIME; ++ ++ mutex_lock(&fiq_ipc.hdq_lock); ++ ++ fiq_ipc.hdq_ads = address | HDQ_WRITE; ++ fiq_ipc.hdq_tx_data = data; ++ fiq_ipc.hdq_request_ctr++; ++ fiq_kick(); ++ /* ++ * FIQ takes care of it while we block our calling process ++ * But we're not spinning -- other processes run normally while ++ * we wait for the result ++ */ ++ while (count_sleeps--) { ++ msleep(10); /* valid transaction always completes in < 10ms */ ++ ++ if (fiq_ipc.hdq_request_ctr != fiq_ipc.hdq_transaction_ctr) ++ continue; /* something bad with FIQ */ ++ ++ if (fiq_ipc.hdq_error) ++ goto done; /* didn't see a response in good time */ ++ } ++ ret = -EINVAL; ++ ++done: ++ mutex_unlock(&fiq_ipc.hdq_lock); ++ return ret; ++} ++EXPORT_SYMBOL_GPL(gta02hdq_write); ++ ++/* sysfs */ ++ ++static ssize_t hdq_sysfs_dump(struct device *dev, struct device_attribute *attr, ++ char *buf) ++{ ++ int n; ++ int v; ++ u8 u8a[128]; /* whole address space for HDQ */ ++ char *end = buf; ++ ++ /* the dump does not take care about 16 bit regs, because at this ++ * bus level we don't know about the chip details ++ */ ++ for (n = 0; n < sizeof(u8a); n++) { ++ v = gta02hdq_read(n); ++ if (v < 0) ++ goto bail; ++ u8a[n] = v; ++ } ++ ++ for (n = 0; n < sizeof(u8a); n += 16) { ++ hex_dump_to_buffer(u8a + n, sizeof(u8a), 16, 1, end, 4096, 0); ++ end += strlen(end); ++ *end++ = '\n'; ++ *end = '\0'; ++ } ++ return (end - buf); ++ ++bail: ++ return sprintf(buf, "ERROR %d\n", v); ++} ++ ++/* you write by
, eg, "34 128" */ ++ ++#define atoi(str) simple_strtoul(((str != NULL) ? str : ""), NULL, 0) ++ ++static ssize_t hdq_sysfs_write(struct device *dev, ++ struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++ const char *end = buf + count; ++ int address = atoi(buf); ++ ++ while ((buf != end) && (*buf != ' ')) ++ buf++; ++ if (buf >= end) ++ return 0; ++ while ((buf < end) && (*buf == ' ')) ++ buf++; ++ if (buf >= end) ++ return 0; ++ ++ gta02hdq_write(address, atoi(buf)); ++ ++ return count; ++} ++ ++static DEVICE_ATTR(dump, 0400, hdq_sysfs_dump, NULL); ++static DEVICE_ATTR(write, 0600, NULL, hdq_sysfs_write); ++ ++static struct attribute *gta02hdq_sysfs_entries[] = { ++ &dev_attr_dump.attr, ++ &dev_attr_write.attr, ++ NULL ++}; ++ ++static struct attribute_group gta02hdq_attr_group = { ++ .name = "hdq", ++ .attrs = gta02hdq_sysfs_entries, ++}; ++ ++ ++#ifdef CONFIG_PM ++static int gta02hdq_suspend(struct platform_device *pdev, pm_message_t state) ++{ ++ /* after 18s of this, the battery monitor will also go to sleep */ ++ s3c2410_gpio_setpin(fiq_ipc.hdq_gpio_pin, 0); ++ s3c2410_gpio_cfgpin(fiq_ipc.hdq_gpio_pin, S3C2410_GPIO_OUTPUT); ++ return 0; ++} ++ ++static int gta02hdq_resume(struct platform_device *pdev) ++{ ++ s3c2410_gpio_setpin(fiq_ipc.hdq_gpio_pin, 1); ++ s3c2410_gpio_cfgpin(fiq_ipc.hdq_gpio_pin, S3C2410_GPIO_OUTPUT); ++ return 0; ++} ++#endif ++ ++static int __init gta02hdq_probe(struct platform_device *pdev) ++{ ++ struct resource *r = platform_get_resource(pdev, 0, 0); ++ ++ if (!machine_is_neo1973_gta02()) ++ return -EIO; ++ ++ if (!r) ++ return -EINVAL; ++ ++ platform_set_drvdata(pdev, NULL); ++ ++ mutex_init(&fiq_ipc.hdq_lock); ++ ++ /* set our HDQ comms pin from the platform data */ ++ fiq_ipc.hdq_gpio_pin = r->start; ++ ++ s3c2410_gpio_setpin(fiq_ipc.hdq_gpio_pin, 1); ++ s3c2410_gpio_cfgpin(fiq_ipc.hdq_gpio_pin, S3C2410_GPIO_OUTPUT); ++ ++ fiq_ipc.hdq_probed = 1; /* we are ready to do stuff now */ ++ ++ return sysfs_create_group(&pdev->dev.kobj, >a02hdq_attr_group); ++} ++ ++static int gta02hdq_remove(struct platform_device *pdev) ++{ ++ sysfs_remove_group(&pdev->dev.kobj, >a02hdq_attr_group); ++ return 0; ++} ++ ++static struct platform_driver gta02hdq_driver = { ++ .probe = gta02hdq_probe, ++ .remove = gta02hdq_remove, ++#ifdef CONFIG_PM ++ .suspend = gta02hdq_suspend, ++ .resume = gta02hdq_resume, ++#endif ++ .driver = { ++ .name = "gta02-hdq", ++ }, ++}; ++ ++static int __init gta02hdq_init(void) ++{ ++ return platform_driver_register(>a02hdq_driver); ++} ++ ++static void __exit gta02hdq_exit(void) ++{ ++ platform_driver_unregister(>a02hdq_driver); ++} ++ ++module_init(gta02hdq_init); ++module_exit(gta02hdq_exit); ++ ++MODULE_AUTHOR("Andy Green "); ++MODULE_DESCRIPTION("GTA02 HDQ driver"); ++MODULE_LICENSE("GPL"); +diff --git a/include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h b/include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h +index 507d235..c5eb3df 100644 +--- a/include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h ++++ b/include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h +@@ -19,12 +19,35 @@ + #include + #include + ++enum hdq_bitbang_states { ++ HDQB_IDLE = 0, ++ HDQB_TX_BREAK, ++ HDQB_TX_BREAK_RECOVERY, ++ HDQB_ADS_CALC, ++ HDQB_ADS_LOW, ++ HDQB_ADS_HIGH, ++ HDQB_WAIT_RX, ++ HDQB_DATA_RX_LOW, ++ HDQB_DATA_RX_HIGH, ++ HDQB_WAIT_TX, ++}; + + struct fiq_ipc { + /* vibrator */ + unsigned long vib_gpio_pin; /* which pin to meddle with */ + u8 vib_pwm; /* 0 = OFF -- will ensure GPIO deasserted and stop FIQ */ + u8 vib_pwm_latched; ++ ++ /* hdq */ ++ u8 hdq_probed; /* nonzero after HDQ driver probed */ ++ struct mutex hdq_lock; /* if you want to use hdq, you have to take lock */ ++ unsigned long hdq_gpio_pin; /* GTA02 = GPD14 which pin to meddle with */ ++ u8 hdq_ads; /* b7..b6 = register address, b0 = r/w */ ++ u8 hdq_tx_data; /* data to tx for write action */ ++ u8 hdq_rx_data; /* data received in read action */ ++ u8 hdq_request_ctr; /* incremented by "user" to request a transfer */ ++ u8 hdq_transaction_ctr; /* incremented after each transfer */ ++ u8 hdq_error; /* 0 = no error */ + }; + + /* actual definition lives in arch/arm/mach-s3c2440/fiq_c_isr.c */ +diff --git a/include/asm-arm/arch-s3c2410/gta02.h b/include/asm-arm/arch-s3c2410/gta02.h +index fa49d93..f686a7a 100644 +--- a/include/asm-arm/arch-s3c2410/gta02.h ++++ b/include/asm-arm/arch-s3c2410/gta02.h +@@ -37,6 +37,7 @@ + + #define GTA02v3_GPIO_nG1_CS S3C2410_GPD12 /* v3 + v4 only */ + #define GTA02v3_GPIO_nG2_CS S3C2410_GPD13 /* v3 + v4 only */ ++#define GTA02v5_GPIO_HDQ S3C2410_GPD14 /* v5 + */ + + #define GTA02_GPIO_nG1_INT S3C2410_GPF0 + #define GTA02_GPIO_IO1 S3C2410_GPF1 +diff --git a/include/linux/gta02_hdq.h b/include/linux/gta02_hdq.h +new file mode 100644 +index 0000000..2f43a62 +--- /dev/null ++++ b/include/linux/gta02_hdq.h +@@ -0,0 +1,8 @@ ++#ifndef __GTA02HDQ_H__ ++#define __GTA02HDQ_H__ ++ ++int gta02hdq_read(int address); ++int gta02hdq_write(int address, u8 data); ++int gta02hdq_initialized(void); ++ ++#endif +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1057-bq27000-battery-driver.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1057-bq27000-battery-driver.patch.patch new file mode 100644 index 0000000000..2bd3caf8d0 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1057-bq27000-battery-driver.patch.patch @@ -0,0 +1,510 @@ +From 40d5d4e980e0d4a5d00759f7fa2a18488f95a0ef Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Sun, 13 Apr 2008 07:23:52 +0100 +Subject: [PATCH] bq27000-battery-driver.patch + +--- + arch/arm/mach-s3c2440/Kconfig | 2 + + arch/arm/mach-s3c2440/mach-gta02.c | 21 ++ + drivers/power/Kconfig | 7 +- + drivers/power/Makefile | 1 + + drivers/power/bq27000_battery.c | 375 ++++++++++++++++++++++++++++++++++++ + include/linux/bq27000_battery.h | 12 ++ + 6 files changed, 417 insertions(+), 1 deletions(-) + create mode 100644 drivers/power/bq27000_battery.c + create mode 100644 include/linux/bq27000_battery.h + +diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig +index f7bea5d..71719ac 100644 +--- a/arch/arm/mach-s3c2440/Kconfig ++++ b/arch/arm/mach-s3c2440/Kconfig +@@ -85,6 +85,8 @@ config MACH_NEO1973_GTA02 + bool "FIC Neo1973 GSM Phone (GTA02 Hardware)" + select CPU_S3C2442 + select SENSORS_PCF50633 ++ select POWER_SUPPLY ++ select GTA02_HDQ + help + Say Y here if you are using the FIC Neo1973 GSM Phone + +diff --git a/arch/arm/mach-s3c2440/mach-gta02.c b/arch/arm/mach-s3c2440/mach-gta02.c +index cea76e7..3816ea5 100644 +--- a/arch/arm/mach-s3c2440/mach-gta02.c ++++ b/arch/arm/mach-s3c2440/mach-gta02.c +@@ -81,6 +81,8 @@ + + #include + #include "fiq_c_isr.h" ++#include ++#include + + /* arbitrates which sensor IRQ owns the shared SPI bus */ + static spinlock_t motion_irq_lock; +@@ -583,6 +585,24 @@ struct platform_device gta02_hdq_device = { + }; + #endif + ++/* BQ27000 Battery */ ++ ++struct bq27000_platform_data bq27000_pdata = { ++ .name = "bat", ++ .rsense_mohms = 20, ++ .hdq_read = gta02hdq_read, ++ .hdq_write = gta02hdq_write, ++ .hdq_initialized = gta02hdq_initialized, ++}; ++ ++struct platform_device bq27000_battery_device = { ++ .name = "bq27000-battery", ++ .dev = { ++ .platform_data = &bq27000_pdata, ++ }, ++}; ++ ++ + /* NOR Flash */ + + #define GTA02_FLASH_BASE 0x18000000 /* GCS3 */ +@@ -1271,6 +1291,7 @@ static void __init gta02_machine_init(void) + case GTA02v5_SYSTEM_REV: + case GTA02v6_SYSTEM_REV: + platform_device_register(>a02_hdq_device); ++ platform_device_register(&bq27000_battery_device); + break; + default: + break; +diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig +index 0a4515d..feb8b0a 100644 +--- a/drivers/power/Kconfig ++++ b/drivers/power/Kconfig +@@ -49,7 +49,10 @@ config BATTERY_OLPC + help + Say Y to enable support for the battery on the OLPC laptop. + +-endif # POWER_SUPPLY ++config BATTERY_BQ27000_HDQ ++ tristate "BQ27000 HDQ battery monitor driver" ++ help ++ Say Y to enable support for the battery on the Neo Freerunner + + config GTA02_HDQ + tristate "Neo Freerunner HDQ" +@@ -58,3 +61,5 @@ config GTA02_HDQ + Say Y to enable support for communicating with an HDQ battery + on the Neo Freerunner. You probably want to select + at least BATTERY_BQ27000_HDQ as well ++ ++endif # POWER_SUPPLY +diff --git a/drivers/power/Makefile b/drivers/power/Makefile +index 88f227f..d7e87ad 100644 +--- a/drivers/power/Makefile ++++ b/drivers/power/Makefile +@@ -20,5 +20,6 @@ obj-$(CONFIG_APM_POWER) += apm_power.o + obj-$(CONFIG_BATTERY_DS2760) += ds2760_battery.o + obj-$(CONFIG_BATTERY_PMU) += pmu_battery.o + obj-$(CONFIG_BATTERY_OLPC) += olpc_battery.o ++obj-$(CONFIG_BATTERY_BQ27000_HDQ) += bq27000_battery.o + + obj-$(CONFIG_GTA02_HDQ) += gta02_hdq.o +diff --git a/drivers/power/bq27000_battery.c b/drivers/power/bq27000_battery.c +new file mode 100644 +index 0000000..d19186a +--- /dev/null ++++ b/drivers/power/bq27000_battery.c +@@ -0,0 +1,375 @@ ++/* ++ * Driver for batteries with bq27000 chips inside via HDQ ++ * ++ * Copyright 2008 Openmoko, Inc ++ * Andy Green ++ * ++ * based on ds2760 driver, original copyright notice for that ---> ++ * ++ * Copyright © 2007 Anton Vorontsov ++ * 2004-2007 Matt Reimer ++ * 2004 Szabolcs Gyurko ++ * ++ * Use consistent with the GNU GPL is permitted, ++ * provided that this copyright notice is ++ * preserved in its entirety in all copies and derived works. ++ * ++ * Author: Anton Vorontsov ++ * February 2007 ++ * ++ * Matt Reimer ++ * April 2004, 2005, 2007 ++ * ++ * Szabolcs Gyurko ++ * September 2004 ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++enum bq27000_regs { ++ /* RAM regs */ ++ /* read-write after this */ ++ BQ27000_CTRL = 0, /* Device Control Register */ ++ BQ27000_MODE, /* Device Mode Register */ ++ BQ27000_AR_L, /* At-Rate H L */ ++ BQ27000_AR_H, ++ /* read-only after this */ ++ BQ27000_ARTTE_L, /* At-Rate Time To Empty H L */ ++ BQ27000_ARTTE_H, ++ BQ27000_TEMP_L, /* Reported Temperature H L */ ++ BQ27000_TEMP_H, ++ BQ27000_VOLT_L, /* Reported Voltage H L */ ++ BQ27000_VOLT_H, ++ BQ27000_FLAGS, /* Status Flags */ ++ BQ27000_RSOC, /* Relative State of Charge */ ++ BQ27000_NAC_L, /* Nominal Available Capacity H L */ ++ BQ27000_NAC_H, ++ BQ27000_CACD_L, /* Discharge Compensated H L */ ++ BQ27000_CACD_H, ++ BQ27000_CACT_L, /* Temperature Compensated H L */ ++ BQ27000_CACT_H, ++ BQ27000_LMD_L, /* Last measured discharge H L */ ++ BQ27000_LMD_H, ++ BQ27000_AI_L, /* Average Current H L */ ++ BQ27000_AI_H, ++ BQ27000_TTE_L, /* Time to Empty H L */ ++ BQ27000_TTE_H, ++ BQ27000_TTF_L, /* Time to Full H L */ ++ BQ27000_TTF_H, ++ BQ27000_SI_L, /* Standby Current H L */ ++ BQ27000_SI_H, ++ BQ27000_STTE_L, /* Standby Time To Empty H L */ ++ BQ27000_STTE_H, ++ BQ27000_MLI_L, /* Max Load Current H L */ ++ BQ27000_MLI_H, ++ BQ27000_MLTTE_L, /* Max Load Time To Empty H L */ ++ BQ27000_MLTTE_H, ++ BQ27000_SAE_L, /* Available Energy H L */ ++ BQ27000_SAE_H, ++ BQ27000_AP_L, /* Available Power H L */ ++ BQ27000_AP_H, ++ BQ27000_TTECP_L, /* Time to Empty at Constant Power H L */ ++ BQ27000_TTECP_H, ++ BQ27000_CYCL_L, /* Cycle count since learning cycle H L */ ++ BQ27000_CYCL_H, ++ BQ27000_CYCT_L, /* Cycle Count Total H L */ ++ BQ27000_CYCT_H, ++ BQ27000_CSOC, /* Compensated State Of Charge */ ++ /* EEPROM regs */ ++ /* read-write after this */ ++ BQ27000_EE_EE_EN = 0x6e, /* EEPROM Program Enable */ ++ BQ27000_EE_ILMD = 0x76, /* Initial Last Measured Discharge High Byte */ ++ BQ27000_EE_SEDVF, /* Scaled EDVF Threshold */ ++ BQ27000_EE_SEDV1, /* Scaled EDV1 Threshold */ ++ BQ27000_EE_ISLC, /* Initial Standby Load Current */ ++ BQ27000_EE_DMFSD, /* Digital Magnitude Filter and Self Discharge */ ++ BQ27000_EE_TAPER, /* Aging Estimate Enable, Charge Termination Taper */ ++ BQ27000_EE_PKCFG, /* Pack Configuration Values */ ++ BQ27000_EE_IMLC, /* Initial Max Load Current or ID #3 */ ++ BQ27000_EE_DCOMP, /* Discharge rate compensation constants or ID #2 */ ++ BQ27000_EE_TCOMP, /* Temperature Compensation constants or ID #1 */ ++}; ++ ++enum bq27000_status_flags { ++ BQ27000_STATUS_CHGS = 0x80, /* 1 = being charged */ ++ BQ27000_STATUS_NOACT = 0x40, /* 1 = no activity */ ++ BQ27000_STATUS_IMIN = 0x20, /* 1 = Lion taper current mode */ ++ BQ27000_STATUS_CI = 0x10, /* 1 = capacity likely innacurate */ ++ BQ27000_STATUS_CALIP = 0x08, /* 1 = calibration in progress */ ++ BQ27000_STATUS_VDQ = 0x04, /* 1 = capacity should be accurate */ ++ BQ27000_STATUS_EDV1 = 0x02, /* 1 = end of discharge.. <6% left */ ++ BQ27000_STATUS_EDVF = 0x01, /* 1 = no, it's really empty now */ ++}; ++ ++#define NANOVOLTS_UNIT 3750 ++ ++struct bq27000_device_info { ++ struct device *dev; ++ struct power_supply bat; ++ ++ int rsense_mohms; /* from platform */ ++ ++ int (*hdq_initialized)(void); /* from platform */ ++ int (*hdq_read)(int); /* from platform */ ++ int (*hdq_write)(int, u8); /* from platform */ ++}; ++ ++/* ++ * reading 16 bit values over HDQ has a special hazard where the ++ * hdq device firmware can update the 16-bit register during the time we ++ * read the two halves. TI document SLUS556D recommends the algorithm here ++ * to avoid trouble ++ */ ++ ++static int hdq_read16(struct bq27000_device_info *di, int address) ++{ ++ int acc; ++ int high; ++ int retries = 3; ++ ++ while (retries--) { ++ ++ high = (di->hdq_read)(address + 1); /* high part */ ++ ++ if (high < 0) ++ return high; ++ acc = (di->hdq_read)(address); ++ if (acc < 0) ++ return acc; ++ ++ /* confirm high didn't change between reading it and low */ ++ if (high == (di->hdq_read)(address + 1)) ++ return (high << 8) | acc; ++ } ++ ++ return -ETIME; ++} ++ ++#define to_bq27000_device_info(x) container_of((x), \ ++ struct bq27000_device_info, \ ++ bat); ++ ++static void bq27000_battery_external_power_changed(struct power_supply *psy) ++{ ++ struct bq27000_device_info *di = to_bq27000_device_info(psy); ++ ++ dev_dbg(di->dev, "%s\n", __FUNCTION__); ++} ++ ++static int bq27000_battery_get_property(struct power_supply *psy, ++ enum power_supply_property psp, ++ union power_supply_propval *val) ++{ ++ int v, n; ++ struct bq27000_device_info *di = to_bq27000_device_info(psy); ++ ++ if (!(di->hdq_initialized)()) ++ return -EINVAL; ++ ++ switch (psp) { ++ case POWER_SUPPLY_PROP_STATUS: ++ val->intval = POWER_SUPPLY_STATUS_UNKNOWN; ++ v = hdq_read16(di, BQ27000_AI_L); ++ if (v < 0) ++ return v; ++ if (v < 2) { /* no real activity on the battery */ ++ if (!hdq_read16(di, BQ27000_TTF_L)) ++ val->intval = POWER_SUPPLY_STATUS_FULL; ++ else ++ val->intval = POWER_SUPPLY_STATUS_NOT_CHARGING; ++ break; ++ } ++ /* power is actually going in or out... */ ++ v = (di->hdq_read)(BQ27000_FLAGS); ++ if (v < 0) ++ return v; ++ if (v & BQ27000_STATUS_CHGS) ++ val->intval = POWER_SUPPLY_STATUS_CHARGING; ++ else ++ val->intval = POWER_SUPPLY_STATUS_DISCHARGING; ++ break; ++ case POWER_SUPPLY_PROP_VOLTAGE_NOW: ++ v = hdq_read16(di, BQ27000_VOLT_L); ++ if (v < 0) ++ return v; ++ val->intval = v * 1000; /* mV -> uV */ ++ break; ++ case POWER_SUPPLY_PROP_CURRENT_NOW: ++ v = (di->hdq_read)(BQ27000_FLAGS); ++ if (v < 0) ++ return v; ++ if (v & BQ27000_STATUS_CHGS) ++ n = -NANOVOLTS_UNIT; ++ else ++ n = NANOVOLTS_UNIT; ++ v = hdq_read16(di, BQ27000_AI_L); ++ if (v < 0) ++ return v; ++ val->intval = (v * n) / di->rsense_mohms; ++ break; ++ case POWER_SUPPLY_PROP_CHARGE_FULL: ++ v = hdq_read16(di, BQ27000_LMD_L); ++ if (v < 0) ++ return v; ++ val->intval = (v * 3570) / di->rsense_mohms; ++ break; ++ case POWER_SUPPLY_PROP_TEMP: ++ v = hdq_read16(di, BQ27000_TEMP_L); ++ if (v < 0) ++ return v; ++ /* K (in 0.25K units) is 273.15 up from C (in 0.1C)*/ ++ /* 10926 = 27315 * 4 / 10 */ ++ val->intval = (((long)v * 10l) - 10926) / 4; ++ break; ++ case POWER_SUPPLY_PROP_TECHNOLOGY: ++ val->intval = POWER_SUPPLY_TECHNOLOGY_LION; ++ break; ++ case POWER_SUPPLY_PROP_CAPACITY: ++ val->intval = (di->hdq_read)(BQ27000_RSOC); ++ if (val->intval < 0) ++ return val->intval; ++ break; ++ case POWER_SUPPLY_PROP_PRESENT: ++ v = (di->hdq_read)(BQ27000_RSOC); ++ val->intval = !(v < 0); ++ break; ++ case POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW: ++ v = hdq_read16(di, BQ27000_TTE_L); ++ if (v < 0) ++ return v; ++ val->intval = 60 * v; ++ break; ++ case POWER_SUPPLY_PROP_TIME_TO_FULL_NOW: ++ v = hdq_read16(di, BQ27000_TTF_L); ++ if (v < 0) ++ return v; ++ val->intval = 60 * v; ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static enum power_supply_property bq27000_battery_props[] = { ++ POWER_SUPPLY_PROP_STATUS, ++ POWER_SUPPLY_PROP_VOLTAGE_NOW, ++ POWER_SUPPLY_PROP_CURRENT_NOW, ++ POWER_SUPPLY_PROP_CHARGE_FULL, ++ POWER_SUPPLY_PROP_TEMP, ++ POWER_SUPPLY_PROP_TECHNOLOGY, ++ POWER_SUPPLY_PROP_PRESENT, ++ POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW, ++ POWER_SUPPLY_PROP_TIME_TO_FULL_NOW, ++ POWER_SUPPLY_PROP_MODEL_NAME, ++ POWER_SUPPLY_PROP_CAPACITY ++}; ++ ++static int bq27000_battery_probe(struct platform_device *pdev) ++{ ++ int retval = 0; ++ struct bq27000_device_info *di; ++ struct bq27000_platform_data *pdata; ++ ++ dev_info(&pdev->dev, "BQ27000 Battery Driver (C) 2008 Openmoko, Inc\n"); ++ ++ di = kzalloc(sizeof(*di), GFP_KERNEL); ++ if (!di) { ++ retval = -ENOMEM; ++ goto di_alloc_failed; ++ } ++ ++ platform_set_drvdata(pdev, di); ++ ++ pdata = pdev->dev.platform_data; ++ di->dev = &pdev->dev; ++ /* di->w1_dev = pdev->dev.parent; */ ++ di->bat.name = pdata->name; ++ di->bat.type = POWER_SUPPLY_TYPE_BATTERY; ++ di->bat.properties = bq27000_battery_props; ++ di->bat.num_properties = ARRAY_SIZE(bq27000_battery_props); ++ di->bat.get_property = bq27000_battery_get_property; ++ di->bat.external_power_changed = ++ bq27000_battery_external_power_changed; ++ di->hdq_read = pdata->hdq_read; ++ di->hdq_write = pdata->hdq_write; ++ di->rsense_mohms = pdata->rsense_mohms; ++ di->hdq_initialized = pdata->hdq_initialized; ++ ++ retval = power_supply_register(&pdev->dev, &di->bat); ++ if (retval) { ++ dev_err(di->dev, "failed to register battery\n"); ++ goto batt_failed; ++ } ++ ++ return 0; ++ ++batt_failed: ++ kfree(di); ++di_alloc_failed: ++ return retval; ++} ++ ++static int bq27000_battery_remove(struct platform_device *pdev) ++{ ++ struct bq27000_device_info *di = platform_get_drvdata(pdev); ++ ++ power_supply_unregister(&di->bat); ++ ++ return 0; ++} ++ ++#ifdef CONFIG_PM ++ ++static int bq27000_battery_suspend(struct platform_device *pdev, ++ pm_message_t state) ++{ ++ return 0; ++} ++ ++static int bq27000_battery_resume(struct platform_device *pdev) ++{ ++ return 0; ++} ++ ++#else ++ ++#define bq27000_battery_suspend NULL ++#define bq27000_battery_resume NULL ++ ++#endif /* CONFIG_PM */ ++ ++static struct platform_driver bq27000_battery_driver = { ++ .driver = { ++ .name = "bq27000-battery", ++ }, ++ .probe = bq27000_battery_probe, ++ .remove = bq27000_battery_remove, ++ .suspend = bq27000_battery_suspend, ++ .resume = bq27000_battery_resume, ++}; ++ ++static int __init bq27000_battery_init(void) ++{ ++ return platform_driver_register(&bq27000_battery_driver); ++} ++ ++static void __exit bq27000_battery_exit(void) ++{ ++ platform_driver_unregister(&bq27000_battery_driver); ++} ++ ++module_init(bq27000_battery_init); ++module_exit(bq27000_battery_exit); ++ ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("Andy Green "); ++MODULE_DESCRIPTION("bq27000 battery driver"); +diff --git a/include/linux/bq27000_battery.h b/include/linux/bq27000_battery.h +new file mode 100644 +index 0000000..36b4f20 +--- /dev/null ++++ b/include/linux/bq27000_battery.h +@@ -0,0 +1,12 @@ ++#ifndef __BQ27000_BATTERY_H__ ++#define __BQ27000_BATTERY_H__ ++ ++struct bq27000_platform_data { ++ const char *name; ++ int rsense_mohms; ++ int (*hdq_read)(int); ++ int (*hdq_write)(int, u8); ++ int (*hdq_initialized)(void); ++}; ++ ++#endif +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1058-fix-EVIOCGRAB-semantics.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1058-fix-EVIOCGRAB-semantics.patch.patch new file mode 100644 index 0000000000..4a24b73f5a --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1058-fix-EVIOCGRAB-semantics.patch.patch @@ -0,0 +1,95 @@ +From a6b37451a52ae7d30c2493b9cc14b8604e81587d Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Sun, 13 Apr 2008 07:23:53 +0100 +Subject: [PATCH] fix-EVIOCGRAB-semantics.patch + +--- + drivers/input/evdev.c | 32 +++++++++++++++----------------- + 1 files changed, 15 insertions(+), 17 deletions(-) + +diff --git a/drivers/input/evdev.c b/drivers/input/evdev.c +index e5b4e9b..2f3d825 100644 +--- a/drivers/input/evdev.c ++++ b/drivers/input/evdev.c +@@ -28,7 +28,7 @@ struct evdev { + char name[16]; + struct input_handle handle; + wait_queue_head_t wait; +- struct evdev_client *grab; ++ int *grab; + struct list_head client_list; + spinlock_t client_lock; /* protects client_list */ + struct mutex mutex; +@@ -39,6 +39,7 @@ struct evdev_client { + struct input_event buffer[EVDEV_BUFFER_SIZE]; + int head; + int tail; ++ int grab; + spinlock_t buffer_lock; /* protects access to buffer, head and tail */ + struct fasync_struct *fasync; + struct evdev *evdev; +@@ -79,12 +80,8 @@ static void evdev_event(struct input_handle *handle, + + rcu_read_lock(); + +- client = rcu_dereference(evdev->grab); +- if (client) ++ list_for_each_entry_rcu(client, &evdev->client_list, node) + evdev_pass_event(client, &event); +- else +- list_for_each_entry_rcu(client, &evdev->client_list, node) +- evdev_pass_event(client, &event); + + rcu_read_unlock(); + +@@ -135,14 +132,15 @@ static int evdev_grab(struct evdev *evdev, struct evdev_client *client) + { + int error; + +- if (evdev->grab) ++ if (client->grab) + return -EBUSY; + +- error = input_grab_device(&evdev->handle); +- if (error) +- return error; +- +- rcu_assign_pointer(evdev->grab, client); ++ if (!evdev->grab++) { ++ error = input_grab_device(&evdev->handle); ++ if (error) ++ return error; ++ } ++ client->grab = 1; + synchronize_rcu(); + + return 0; +@@ -150,12 +148,12 @@ static int evdev_grab(struct evdev *evdev, struct evdev_client *client) + + static int evdev_ungrab(struct evdev *evdev, struct evdev_client *client) + { +- if (evdev->grab != client) ++ if (!client->grab) + return -EINVAL; + +- rcu_assign_pointer(evdev->grab, NULL); +- synchronize_rcu(); +- input_release_device(&evdev->handle); ++ if (!--evdev->grab && evdev->exist) ++ input_release_device(&evdev->handle); ++ client->grab = 0; + + return 0; + } +@@ -230,7 +228,7 @@ static int evdev_release(struct inode *inode, struct file *file) + struct evdev *evdev = client->evdev; + + mutex_lock(&evdev->mutex); +- if (evdev->grab == client) ++ if (client->grab) + evdev_ungrab(evdev, client); + mutex_unlock(&evdev->mutex); + +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1059-iis-suspend.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1059-iis-suspend.patch.patch new file mode 100644 index 0000000000..c97396e2b6 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1059-iis-suspend.patch.patch @@ -0,0 +1,75 @@ +From 148a1026b1975e3a50981cf7df3d4aae2b34611e Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Sun, 13 Apr 2008 07:23:53 +0100 +Subject: [PATCH] iis-suspend.patch + +--- + sound/soc/s3c24xx/s3c24xx-i2s.c | 38 ++++++++++++++++++++++++++++++++++++++ + 1 files changed, 38 insertions(+), 0 deletions(-) + +diff --git a/sound/soc/s3c24xx/s3c24xx-i2s.c b/sound/soc/s3c24xx/s3c24xx-i2s.c +index fe30e0d..4d74cc0 100644 +--- a/sound/soc/s3c24xx/s3c24xx-i2s.c ++++ b/sound/soc/s3c24xx/s3c24xx-i2s.c +@@ -76,6 +76,10 @@ static struct s3c24xx_pcm_dma_params s3c24xx_i2s_pcm_stereo_in = { + struct s3c24xx_i2s_info { + void __iomem *regs; + struct clk *iis_clk; ++ u32 iiscon; ++ u32 iismod; ++ u32 iisfcon; ++ u32 iispsr; + }; + static struct s3c24xx_i2s_info s3c24xx_i2s; + +@@ -406,6 +410,38 @@ static int s3c24xx_i2s_probe(struct platform_device *pdev) + return 0; + } + ++#ifdef CONFIG_PM ++int s3c24xx_i2s_suspend(struct platform_device *pdev, ++ struct snd_soc_cpu_dai *cpu_dai) ++{ ++ s3c24xx_i2s.iiscon = readl(s3c24xx_i2s.regs + S3C2410_IISCON); ++ s3c24xx_i2s.iismod = readl(s3c24xx_i2s.regs + S3C2410_IISMOD); ++ s3c24xx_i2s.iisfcon = readl(s3c24xx_i2s.regs + S3C2410_IISFCON); ++ s3c24xx_i2s.iispsr = readl(s3c24xx_i2s.regs + S3C2410_IISPSR); ++ ++ clk_disable(s3c24xx_i2s.iis_clk); ++ ++ return 0; ++} ++ ++int s3c24xx_i2s_resume(struct platform_device *pdev, ++ struct snd_soc_cpu_dai *cpu_dai) ++{ ++ clk_enable(s3c24xx_i2s.iis_clk); ++ ++ writel(s3c24xx_i2s.iiscon, s3c24xx_i2s.regs + S3C2410_IISCON); ++ writel(s3c24xx_i2s.iismod, s3c24xx_i2s.regs + S3C2410_IISMOD); ++ writel(s3c24xx_i2s.iisfcon, s3c24xx_i2s.regs + S3C2410_IISFCON); ++ writel(s3c24xx_i2s.iispsr, s3c24xx_i2s.regs + S3C2410_IISPSR); ++ ++ return 0; ++} ++#else ++#define s3c24xx_i2s_suspend NULL ++#define s3c24xx_i2s_resume NULL ++#endif ++ ++ + #define S3C24XX_I2S_RATES \ + (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_16000 | \ + SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \ +@@ -416,6 +452,8 @@ struct snd_soc_cpu_dai s3c24xx_i2s_dai = { + .id = 0, + .type = SND_SOC_DAI_I2S, + .probe = s3c24xx_i2s_probe, ++ .suspend = s3c24xx_i2s_suspend, ++ .resume = s3c24xx_i2s_resume, + .playback = { + .channels_min = 2, + .channels_max = 2, +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1060-s3c24xx-pcm-suspend.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1060-s3c24xx-pcm-suspend.patch.patch new file mode 100644 index 0000000000..2b496ffdf5 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1060-s3c24xx-pcm-suspend.patch.patch @@ -0,0 +1,85 @@ +From 1179eb1bf9d827aaa2b4b6adc4ba135bf9074bcc Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Sun, 13 Apr 2008 07:23:53 +0100 +Subject: [PATCH] s3c24xx-pcm-suspend.patch + +--- + sound/soc/s3c24xx/s3c24xx-pcm.c | 48 ++++++++++++++++++++------------------ + 1 files changed, 25 insertions(+), 23 deletions(-) + +diff --git a/sound/soc/s3c24xx/s3c24xx-pcm.c b/sound/soc/s3c24xx/s3c24xx-pcm.c +index 4107a87..e9f3b60 100644 +--- a/sound/soc/s3c24xx/s3c24xx-pcm.c ++++ b/sound/soc/s3c24xx/s3c24xx-pcm.c +@@ -49,7 +49,9 @@ static const struct snd_pcm_hardware s3c24xx_pcm_hardware = { + .info = SNDRV_PCM_INFO_INTERLEAVED | + SNDRV_PCM_INFO_BLOCK_TRANSFER | + SNDRV_PCM_INFO_MMAP | +- SNDRV_PCM_INFO_MMAP_VALID, ++ SNDRV_PCM_INFO_MMAP_VALID | ++ SNDRV_PCM_INFO_PAUSE | ++ SNDRV_PCM_INFO_RESUME, + .formats = SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_U16_LE | + SNDRV_PCM_FMTBIT_U8 | +@@ -176,28 +178,6 @@ static int s3c24xx_pcm_hw_params(struct snd_pcm_substream *substream, + } + } + +- /* channel needs configuring for mem=>device, increment memory addr, +- * sync to pclk, half-word transfers to the IIS-FIFO. */ +- if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { +- s3c2410_dma_devconfig(prtd->params->channel, +- S3C2410_DMASRC_MEM, S3C2410_DISRCC_INC | +- S3C2410_DISRCC_APB, prtd->params->dma_addr); +- +- s3c2410_dma_config(prtd->params->channel, +- prtd->params->dma_size, +- S3C2410_DCON_SYNC_PCLK | +- S3C2410_DCON_HANDSHAKE); +- } else { +- s3c2410_dma_config(prtd->params->channel, +- prtd->params->dma_size, +- S3C2410_DCON_HANDSHAKE | +- S3C2410_DCON_SYNC_PCLK); +- +- s3c2410_dma_devconfig(prtd->params->channel, +- S3C2410_DMASRC_HW, 0x3, +- prtd->params->dma_addr); +- } +- + s3c2410_dma_set_buffdone_fn(prtd->params->channel, + s3c24xx_audio_buffdone); + +@@ -246,6 +226,28 @@ static int s3c24xx_pcm_prepare(struct snd_pcm_substream *substream) + if (!prtd->params) + return 0; + ++ /* channel needs configuring for mem=>device, increment memory addr, ++ * sync to pclk, half-word transfers to the IIS-FIFO. */ ++ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { ++ s3c2410_dma_devconfig(prtd->params->channel, ++ S3C2410_DMASRC_MEM, S3C2410_DISRCC_INC | ++ S3C2410_DISRCC_APB, prtd->params->dma_addr); ++ ++ s3c2410_dma_config(prtd->params->channel, ++ prtd->params->dma_size, ++ S3C2410_DCON_SYNC_PCLK | ++ S3C2410_DCON_HANDSHAKE); ++ } else { ++ s3c2410_dma_config(prtd->params->channel, ++ prtd->params->dma_size, ++ S3C2410_DCON_HANDSHAKE | ++ S3C2410_DCON_SYNC_PCLK); ++ ++ s3c2410_dma_devconfig(prtd->params->channel, ++ S3C2410_DMASRC_HW, 0x3, ++ prtd->params->dma_addr); ++ } ++ + /* flush the DMA channel */ + s3c2410_dma_ctrl(prtd->params->channel, S3C2410_DMAOP_FLUSH); + prtd->dma_loaded = 0; +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1061-s3c2410-usb-switch.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1061-s3c2410-usb-switch.patch.patch new file mode 100644 index 0000000000..a26b237f64 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1061-s3c2410-usb-switch.patch.patch @@ -0,0 +1,89 @@ +From e98d739947484f7ca2cf0fe017fda73cab63067a Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Sun, 13 Apr 2008 07:23:54 +0100 +Subject: [PATCH] s3c2410-usb-switch.patch + +--- + drivers/usb/host/ohci-s3c2410.c | 43 +++++++++++++++++++++++++++++++++++++++ + 1 files changed, 43 insertions(+), 0 deletions(-) + +diff --git a/drivers/usb/host/ohci-s3c2410.c b/drivers/usb/host/ohci-s3c2410.c +index 44b79e8..68f5689 100644 +--- a/drivers/usb/host/ohci-s3c2410.c ++++ b/drivers/usb/host/ohci-s3c2410.c +@@ -24,6 +24,7 @@ + + #include + #include ++#include + + #define valid_port(idx) ((idx) == 1 || (idx) == 2) + +@@ -308,6 +309,40 @@ static void s3c2410_hcd_oc(struct s3c2410_hcd_info *info, int port_oc) + local_irq_restore(flags); + } + ++/* switching of USB pads */ ++static ssize_t show_usb_mode(struct device *dev, struct device_attribute *attr, ++ char *buf) ++{ ++ if (__raw_readl(S3C24XX_MISCCR) & S3C2410_MISCCR_USBHOST) ++ return sprintf(buf, "host\n"); ++ ++ return sprintf(buf, "device\n"); ++} ++ ++static ssize_t set_usb_mode(struct device *dev, struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++ if (!strncmp(buf, "host", 4)) { ++ printk("s3c2410: changing usb to host\n"); ++ s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST, ++ S3C2410_MISCCR_USBHOST); ++ /* FIXME: ++ * - call machine-specific disable-pullup function i ++ * - enable +Vbus (if hardware supports it) ++ */ ++ s3c2410_gpio_setpin(S3C2410_GPB9, 0); ++ } else if (!strncmp(buf, "device", 6)) { ++ printk("s3c2410: changing usb to device\n"); ++ s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST, 0); ++ s3c2410_gpio_setpin(S3C2410_GPB9, 1); ++ } else ++ printk("s3c2410: unknown mode\n"); ++ return -EINVAL; ++ return count; ++} ++ ++static DEVICE_ATTR(usb_mode, S_IRUGO | S_IWUSR, show_usb_mode, set_usb_mode); ++ + /* may be called without controller electrically present */ + /* may be called with controller, bus, and devices active */ + +@@ -325,6 +360,7 @@ static void s3c2410_hcd_oc(struct s3c2410_hcd_info *info, int port_oc) + static void + usb_hcd_s3c2410_remove (struct usb_hcd *hcd, struct platform_device *dev) + { ++ device_remove_file(&dev->dev, &dev_attr_usb_mode); + usb_remove_hcd(hcd); + s3c2410_stop_hc(dev); + iounmap(hcd->regs); +@@ -392,8 +428,15 @@ static int usb_hcd_s3c2410_probe (const struct hc_driver *driver, + if (retval != 0) + goto err_ioremap; + ++ retval = device_create_file(&dev->dev, &dev_attr_usb_mode); ++ if (retval != 0) ++ goto err_hcd; ++ + return 0; + ++ err_hcd: ++ usb_remove_hcd(hcd); ++ + err_ioremap: + s3c2410_stop_hc(dev); + iounmap(hcd->regs); +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1062-pnp_fixes.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1062-pnp_fixes.patch.patch new file mode 100644 index 0000000000..5fc57e3a5f --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1062-pnp_fixes.patch.patch @@ -0,0 +1,46 @@ +From 30659e6b5f8c44bc80a0e79ae2b40e7208ac2b51 Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Sun, 13 Apr 2008 07:23:54 +0100 +Subject: [PATCH] pnp_fixes.patch + +--- + drivers/pnp/Kconfig | 2 +- + drivers/pnp/resource.c | 2 ++ + 2 files changed, 3 insertions(+), 1 deletions(-) + +diff --git a/drivers/pnp/Kconfig b/drivers/pnp/Kconfig +index 821933f..f9313cf 100644 +--- a/drivers/pnp/Kconfig ++++ b/drivers/pnp/Kconfig +@@ -5,7 +5,7 @@ + menuconfig PNP + bool "Plug and Play support" + depends on HAS_IOMEM +- depends on ISA || ACPI ++ depends on ISA || ACPI || SDIO + ---help--- + Plug and Play (PnP) is a standard for peripherals which allows those + peripherals to be configured by software, e.g. assign IRQ's or other +diff --git a/drivers/pnp/resource.c b/drivers/pnp/resource.c +index e50ebcf..60d2b1b 100644 +--- a/drivers/pnp/resource.c ++++ b/drivers/pnp/resource.c +@@ -431,6 +431,7 @@ int pnp_check_dma(struct pnp_dev *dev, int idx) + } + } + ++#if 0 + /* check if the resource is already in use, skip if the + * device is active because it itself may be in use */ + if (!dev->active) { +@@ -438,6 +439,7 @@ int pnp_check_dma(struct pnp_dev *dev, int idx) + return 0; + free_dma(*dma); + } ++#endif + + /* check for conflicts with other pnp devices */ + pnp_for_each_dev(tdev) { +-- +1.5.6.5 + diff --git a/target/linux/s3c24xx/patches-2.6.24/1063-atheros_2_0_function.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1063-atheros_2_0_function.patch.patch new file mode 100644 index 0000000000..c0008c735c --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1063-atheros_2_0_function.patch.patch @@ -0,0 +1,33239 @@ +From 5fe4b00cb39ab337cfeab4ceb8ad252b9aac4583 Mon Sep 17 00:00:00 2001 +From: mokopatches +Date: Sun, 13 Apr 2008 07:23:55 +0100 +Subject: [PATCH] atheros_2_0_function.patch + +--- + drivers/sdio/function/Kconfig | 11 + + drivers/sdio/function/Makefile | 1 + + drivers/sdio/function/wlan/Makefile | 4 + + drivers/sdio/function/wlan/ar6000/Makefile | 38 + + .../sdio/function/wlan/ar6000/ar6000/ar6000_drv.c | 3062 ++++++++++++++ + .../sdio/function/wlan/ar6000/ar6000/ar6000_drv.h | 360 ++ + .../function/wlan/ar6000/ar6000/ar6000_raw_if.c | 439 ++ + .../function/wlan/ar6000/ar6000/ar6xapi_linux.h | 128 + + .../function/wlan/ar6000/ar6000/athdrv_linux.h | 993 +++++ + .../function/wlan/ar6000/ar6000/athtypes_linux.h | 47 + + .../function/wlan/ar6000/ar6000/config_linux.h | 44 + + .../sdio/function/wlan/ar6000/ar6000/debug_linux.h | 86 + + drivers/sdio/function/wlan/ar6000/ar6000/ioctl.c | 2540 +++++++++++ + drivers/sdio/function/wlan/ar6000/ar6000/netbuf.c | 225 + + .../sdio/function/wlan/ar6000/ar6000/osapi_linux.h | 319 ++ + .../function/wlan/ar6000/ar6000/wireless_ext.c | 1946 +++++++++ + drivers/sdio/function/wlan/ar6000/bmi/bmi.c | 657 +++ + .../sdio/function/wlan/ar6000/bmi/bmi_internal.h | 45 + + drivers/sdio/function/wlan/ar6000/hif/hif.c | 818 ++++ + .../sdio/function/wlan/ar6000/hif/hif_internal.h | 102 + + drivers/sdio/function/wlan/ar6000/htc/ar6k.c | 991 +++++ + drivers/sdio/function/wlan/ar6000/htc/ar6k.h | 191 + + .../sdio/function/wlan/ar6000/htc/ar6k_events.c | 638 +++ + drivers/sdio/function/wlan/ar6000/htc/htc.c | 507 +++ + drivers/sdio/function/wlan/ar6000/htc/htc_debug.h | 65 + + .../sdio/function/wlan/ar6000/htc/htc_internal.h | 168 + + drivers/sdio/function/wlan/ar6000/htc/htc_recv.c | 703 ++++ + drivers/sdio/function/wlan/ar6000/htc/htc_send.c | 541 +++ + .../sdio/function/wlan/ar6000/htc/htc_services.c | 403 ++ + .../function/wlan/ar6000/include/AR6001_regdump.h | 100 + + .../function/wlan/ar6000/include/AR6K_version.h | 36 + + .../wlan/ar6000/include/AR6K_version.h.NEW | 36 + + .../sdio/function/wlan/ar6000/include/AR6Khwreg.h | 147 + + .../sdio/function/wlan/ar6000/include/a_config.h | 27 + + .../sdio/function/wlan/ar6000/include/a_debug.h | 41 + + drivers/sdio/function/wlan/ar6000/include/a_drv.h | 28 + + .../sdio/function/wlan/ar6000/include/a_drv_api.h | 185 + + .../sdio/function/wlan/ar6000/include/a_osapi.h | 28 + + .../sdio/function/wlan/ar6000/include/a_types.h | 28 + + .../sdio/function/wlan/ar6000/include/ar6000_api.h | 29 + + .../function/wlan/ar6000/include/ar6000_diag.h | 38 + + .../sdio/function/wlan/ar6000/include/athdefs.h | 85 + + drivers/sdio/function/wlan/ar6000/include/athdrv.h | 32 + + .../sdio/function/wlan/ar6000/include/athendpack.h | 41 + + .../function/wlan/ar6000/include/athstartpack.h | 42 + + drivers/sdio/function/wlan/ar6000/include/bmi.h | 100 + + .../sdio/function/wlan/ar6000/include/bmi_msg.h | 199 + + .../sdio/function/wlan/ar6000/include/common_drv.h | 61 + + drivers/sdio/function/wlan/ar6000/include/dbglog.h | 107 + + .../sdio/function/wlan/ar6000/include/dbglog_api.h | 46 + + .../sdio/function/wlan/ar6000/include/dbglog_id.h | 307 ++ + .../sdio/function/wlan/ar6000/include/dl_list.h | 114 + + .../sdio/function/wlan/ar6000/include/dset_api.h | 63 + + .../function/wlan/ar6000/include/dset_internal.h | 39 + + drivers/sdio/function/wlan/ar6000/include/dsetid.h | 110 + + drivers/sdio/function/wlan/ar6000/include/gpio.h | 34 + + .../sdio/function/wlan/ar6000/include/gpio_api.h | 57 + + drivers/sdio/function/wlan/ar6000/include/hif.h | 291 ++ + .../function/wlan/ar6000/include/host_version.h | 49 + + drivers/sdio/function/wlan/ar6000/include/htc.h | 190 + + .../sdio/function/wlan/ar6000/include/htc_api.h | 436 ++ + .../sdio/function/wlan/ar6000/include/htc_packet.h | 138 + + .../function/wlan/ar6000/include/htc_services.h | 37 + + .../sdio/function/wlan/ar6000/include/ieee80211.h | 342 ++ + .../function/wlan/ar6000/include/ieee80211_ioctl.h | 163 + + .../function/wlan/ar6000/include/ieee80211_node.h | 77 + + .../sdio/function/wlan/ar6000/include/ini_dset.h | 40 + + drivers/sdio/function/wlan/ar6000/include/regDb.h | 19 + + .../sdio/function/wlan/ar6000/include/regdump.h | 33 + + .../sdio/function/wlan/ar6000/include/targaddrs.h | 158 + + .../sdio/function/wlan/ar6000/include/testcmd.h | 144 + + .../sdio/function/wlan/ar6000/include/wlan_api.h | 101 + + .../sdio/function/wlan/ar6000/include/wlan_dset.h | 20 + + drivers/sdio/function/wlan/ar6000/include/wmi.h | 1743 ++++++++ + .../sdio/function/wlan/ar6000/include/wmi_api.h | 259 ++ + drivers/sdio/function/wlan/ar6000/include/wmix.h | 233 + + .../sdio/function/wlan/ar6000/miscdrv/common_drv.c | 467 +++ + .../function/wlan/ar6000/miscdrv/credit_dist.c | 346 ++ + drivers/sdio/function/wlan/ar6000/wlan/wlan_node.c | 371 ++ + .../function/wlan/ar6000/wlan/wlan_recv_beacon.c | 192 + + .../sdio/function/wlan/ar6000/wlan/wlan_utils.c | 59 + + drivers/sdio/function/wlan/ar6000/wmi/wmi.c | 3921 +++++++++++++++++ + drivers/sdio/function/wlan/ar6000/wmi/wmi_doc.h | 4421 ++++++++++++++++++++ + drivers/sdio/function/wlan/ar6000/wmi/wmi_host.h | 71 + + 84 files changed, 32553 insertions(+), 0 deletions(-) + create mode 100644 drivers/sdio/function/Kconfig + create mode 100644 drivers/sdio/function/Makefile + create mode 100644 drivers/sdio/function/wlan/Makefile + create mode 100644 drivers/sdio/function/wlan/ar6000/Makefile + create mode 100644 drivers/sdio/function/wlan/ar6000/ar6000/ar6000_drv.c + create mode 100644 drivers/sdio/function/wlan/ar6000/ar6000/ar6000_drv.h + create mode 100644 drivers/sdio/function/wlan/ar6000/ar6000/ar6000_raw_if.c + create mode 100644 drivers/sdio/function/wlan/ar6000/ar6000/ar6xapi_linux.h + create mode 100644 drivers/sdio/function/wlan/ar6000/ar6000/athdrv_linux.h + create mode 100644 drivers/sdio/function/wlan/ar6000/ar6000/athtypes_linux.h + create mode 100644 drivers/sdio/function/wlan/ar6000/ar6000/config_linux.h + create mode 100644 drivers/sdio/function/wlan/ar6000/ar6000/debug_linux.h + create mode 100644 drivers/sdio/function/wlan/ar6000/ar6000/ioctl.c + create mode 100644 drivers/sdio/function/wlan/ar6000/ar6000/netbuf.c + create mode 100644 drivers/sdio/function/wlan/ar6000/ar6000/osapi_linux.h + create mode 100644 drivers/sdio/function/wlan/ar6000/ar6000/wireless_ext.c + create mode 100644 drivers/sdio/function/wlan/ar6000/bmi/bmi.c + create mode 100644 drivers/sdio/function/wlan/ar6000/bmi/bmi_internal.h + create mode 100644 drivers/sdio/function/wlan/ar6000/hif/hif.c + create mode 100644 drivers/sdio/function/wlan/ar6000/hif/hif_internal.h + create mode 100644 drivers/sdio/function/wlan/ar6000/htc/ar6k.c + create mode 100644 drivers/sdio/function/wlan/ar6000/htc/ar6k.h + create mode 100644 drivers/sdio/function/wlan/ar6000/htc/ar6k_events.c + create mode 100644 drivers/sdio/function/wlan/ar6000/htc/htc.c + create mode 100644 drivers/sdio/function/wlan/ar6000/htc/htc_debug.h + create mode 100644 drivers/sdio/function/wlan/ar6000/htc/htc_internal.h + create mode 100644 drivers/sdio/function/wlan/ar6000/htc/htc_recv.c + create mode 100644 drivers/sdio/function/wlan/ar6000/htc/htc_send.c + create mode 100644 drivers/sdio/function/wlan/ar6000/htc/htc_services.c + create mode 100644 drivers/sdio/function/wlan/ar6000/include/AR6001_regdump.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/AR6K_version.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/AR6K_version.h.NEW + create mode 100644 drivers/sdio/function/wlan/ar6000/include/AR6Khwreg.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/a_config.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/a_debug.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/a_drv.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/a_drv_api.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/a_osapi.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/a_types.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/ar6000_api.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/ar6000_diag.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/athdefs.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/athdrv.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/athendpack.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/athstartpack.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/bmi.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/bmi_msg.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/common_drv.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/dbglog.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/dbglog_api.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/dbglog_id.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/dl_list.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/dset_api.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/dset_internal.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/dsetid.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/gpio.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/gpio_api.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/hif.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/host_version.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/htc.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/htc_api.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/htc_packet.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/htc_services.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/ieee80211.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/ieee80211_ioctl.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/ieee80211_node.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/ini_dset.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/regDb.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/regdump.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/targaddrs.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/testcmd.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/wlan_api.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/wlan_dset.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/wmi.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/wmi_api.h + create mode 100644 drivers/sdio/function/wlan/ar6000/include/wmix.h + create mode 100644 drivers/sdio/function/wlan/ar6000/miscdrv/common_drv.c + create mode 100644 drivers/sdio/function/wlan/ar6000/miscdrv/credit_dist.c + create mode 100644 drivers/sdio/function/wlan/ar6000/wlan/wlan_node.c + create mode 100644 drivers/sdio/function/wlan/ar6000/wlan/wlan_recv_beacon.c + create mode 100644 drivers/sdio/function/wlan/ar6000/wlan/wlan_utils.c + create mode 100644 drivers/sdio/function/wlan/ar6000/wmi/wmi.c + create mode 100644 drivers/sdio/function/wlan/ar6000/wmi/wmi_doc.h + create mode 100644 drivers/sdio/function/wlan/ar6000/wmi/wmi_host.h + +diff --git a/drivers/sdio/function/Kconfig b/drivers/sdio/function/Kconfig +new file mode 100644 +index 0000000..9b46af3 +--- /dev/null ++++ b/drivers/sdio/function/Kconfig +@@ -0,0 +1,11 @@ ++#menu "SDIO function drivers" ++ ++config SDIO_AR6000_WLAN ++ tristate "ar6000 wireless networking over sdio" ++ depends on SDIO ++ select WIRELESS_EXT ++ default m ++ help ++ good luck. ++ ++#endmenu +\ No newline at end of file +diff --git a/drivers/sdio/function/Makefile b/drivers/sdio/function/Makefile +new file mode 100644 +index 0000000..4940d37 +--- /dev/null ++++ b/drivers/sdio/function/Makefile +@@ -0,0 +1 @@ ++obj-$(CONFIG_SDIO_AR6000_WLAN) += wlan/ +\ No newline at end of file +diff --git a/drivers/sdio/function/wlan/Makefile b/drivers/sdio/function/wlan/Makefile +new file mode 100644 +index 0000000..b1e61fc +--- /dev/null ++++ b/drivers/sdio/function/wlan/Makefile +@@ -0,0 +1,4 @@ ++# ++# SDIO wlan ar600 card function driver ++# ++obj-$(CONFIG_SDIO_AR6000_WLAN) += ar6000/ +\ No newline at end of file +diff --git a/drivers/sdio/function/wlan/ar6000/Makefile b/drivers/sdio/function/wlan/ar6000/Makefile +new file mode 100644 +index 0000000..810dab6 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/Makefile +@@ -0,0 +1,38 @@ ++REV ?= 2 ++ ++PWD := $(shell pwd) ++ ++EXTRA_CFLAGS += -I$(src)/include ++ ++EXTRA_CFLAGS += -DLINUX -DDEBUG -D__KERNEL__ -DHTC_RAW_INTERFACE\ ++ -DTCMD -DSEND_EVENT_TO_APP -DUSER_KEYS \ ++ -DNO_SYNC_FLUSH #\ ++ -DMULTIPLE_FRAMES_PER_INTERRUPT -DAR6000REV$(REV) \ ++ -DBLOCK_TX_PATH_FLAG \ ++ -DSDIO \ ++ ++EXTRA_CFLAGS += -DKERNEL_2_6 ++ ++obj-$(CONFIG_SDIO_AR6000_WLAN) += ar6000.o ++ ++ar6000-objs += htc/ar6k.o \ ++ htc/ar6k_events.o \ ++ htc/htc_send.o \ ++ htc/htc_recv.o \ ++ htc/htc_services.o \ ++ htc/htc.o \ ++ hif/hif.o \ ++ bmi/bmi.o \ ++ ar6000/ar6000_drv.o \ ++ ar6000/ar6000_raw_if.o \ ++ ar6000/netbuf.o \ ++ ar6000/wireless_ext.o \ ++ ar6000/ioctl.o \ ++ miscdrv/common_drv.o \ ++ miscdrv/credit_dist.o \ ++ wmi/wmi.o \ ++ wlan/wlan_node.o \ ++ wlan/wlan_recv_beacon.o \ ++ wlan/wlan_utils.o ++ ++ +diff --git a/drivers/sdio/function/wlan/ar6000/ar6000/ar6000_drv.c b/drivers/sdio/function/wlan/ar6000/ar6000/ar6000_drv.c +new file mode 100644 +index 0000000..bb9ef55 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/ar6000/ar6000_drv.c +@@ -0,0 +1,3062 @@ ++/* ++ * ++ * Copyright (c) 2004-2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++/* ++ * This driver is a pseudo ethernet driver to access the Atheros AR6000 ++ * WLAN Device ++ */ ++static const char athId[] __attribute__ ((unused)) = "$Id: //depot/sw/releases/olca2.0-GPL/host/os/linux/ar6000_drv.c#2 $"; ++ ++#include "ar6000_drv.h" ++#include "htc.h" ++ ++MODULE_LICENSE("GPL and additional rights"); ++ ++#ifndef REORG_APTC_HEURISTICS ++#undef ADAPTIVE_POWER_THROUGHPUT_CONTROL ++#endif /* REORG_APTC_HEURISTICS */ ++ ++#ifdef ADAPTIVE_POWER_THROUGHPUT_CONTROL ++#define APTC_TRAFFIC_SAMPLING_INTERVAL 100 /* msec */ ++#define APTC_UPPER_THROUGHPUT_THRESHOLD 3000 /* Kbps */ ++#define APTC_LOWER_THROUGHPUT_THRESHOLD 2000 /* Kbps */ ++ ++typedef struct aptc_traffic_record { ++ A_BOOL timerScheduled; ++ struct timeval samplingTS; ++ unsigned long bytesReceived; ++ unsigned long bytesTransmitted; ++} APTC_TRAFFIC_RECORD; ++ ++A_TIMER aptcTimer; ++APTC_TRAFFIC_RECORD aptcTR; ++#endif /* ADAPTIVE_POWER_THROUGHPUT_CONTROL */ ++ ++int bmienable = 0; ++unsigned int bypasswmi = 0; ++unsigned int debuglevel = 0; ++int tspecCompliance = 1; ++unsigned int busspeedlow = 0; ++unsigned int onebitmode = 0; ++unsigned int skipflash = 0; ++unsigned int wmitimeout = 2; ++unsigned int wlanNodeCaching = 1; ++unsigned int enableuartprint = 0; ++unsigned int logWmiRawMsgs = 0; ++unsigned int enabletimerwar = 0; ++unsigned int mbox_yield_limit = 99; ++int reduce_credit_dribble = 1 + HTC_CONNECT_FLAGS_THRESHOLD_LEVEL_ONE_HALF; ++int allow_trace_signal = 0; ++#ifdef CONFIG_HOST_TCMD_SUPPORT ++unsigned int testmode =0; ++#endif ++ ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) ++module_param(bmienable, int, 0644); ++module_param(bypasswmi, int, 0644); ++module_param(debuglevel, int, 0644); ++module_param(tspecCompliance, int, 0644); ++module_param(onebitmode, int, 0644); ++module_param(busspeedlow, int, 0644); ++module_param(skipflash, int, 0644); ++module_param(wmitimeout, int, 0644); ++module_param(wlanNodeCaching, int, 0644); ++module_param(logWmiRawMsgs, int, 0644); ++module_param(enableuartprint, int, 0644); ++module_param(enabletimerwar, int, 0644); ++module_param(mbox_yield_limit, int, 0644); ++module_param(reduce_credit_dribble, int, 0644); ++module_param(allow_trace_signal, int, 0644); ++#ifdef CONFIG_HOST_TCMD_SUPPORT ++module_param(testmode, int, 0644); ++#endif ++#else ++ ++#define __user ++/* for linux 2.4 and lower */ ++MODULE_PARM(bmienable,"i"); ++MODULE_PARM(bypasswmi,"i"); ++MODULE_PARM(debuglevel, "i"); ++MODULE_PARM(onebitmode,"i"); ++MODULE_PARM(busspeedlow, "i"); ++MODULE_PARM(skipflash, "i"); ++MODULE_PARM(wmitimeout, "i"); ++MODULE_PARM(wlanNodeCaching, "i"); ++MODULE_PARM(enableuartprint,"i"); ++MODULE_PARM(logWmiRawMsgs, "i"); ++MODULE_PARM(enabletimerwar,"i"); ++MODULE_PARM(mbox_yield_limit,"i"); ++MODULE_PARM(reduce_credit_dribble,"i"); ++MODULE_PARM(allow_trace_signal,"i"); ++#ifdef CONFIG_HOST_TCMD_SUPPORT ++MODULE_PARM(testmode, "i"); ++#endif ++#endif ++ ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10) ++/* in 2.6.10 and later this is now a pointer to a uint */ ++unsigned int _mboxnum = HTC_MAILBOX_NUM_MAX; ++#define mboxnum &_mboxnum ++#else ++unsigned int mboxnum = HTC_MAILBOX_NUM_MAX; ++#endif ++ ++#ifdef DEBUG ++A_UINT32 g_dbg_flags = DBG_DEFAULTS; ++unsigned int debugflags = 0; ++int debugdriver = 1; ++unsigned int debughtc = 128; ++unsigned int debugbmi = 1; ++unsigned int debughif = 2; ++unsigned int resetok = 1; ++unsigned int txcreditsavailable[HTC_MAILBOX_NUM_MAX] = {0}; ++unsigned int txcreditsconsumed[HTC_MAILBOX_NUM_MAX] = {0}; ++unsigned int txcreditintrenable[HTC_MAILBOX_NUM_MAX] = {0}; ++unsigned int txcreditintrenableaggregate[HTC_MAILBOX_NUM_MAX] = {0}; ++ ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) ++module_param(debugflags, int, 0644); ++module_param(debugdriver, int, 0644); ++module_param(debughtc, int, 0644); ++module_param(debugbmi, int, 0644); ++module_param(debughif, int, 0644); ++module_param(resetok, int, 0644); ++module_param_array(txcreditsavailable, int, mboxnum, 0644); ++module_param_array(txcreditsconsumed, int, mboxnum, 0644); ++module_param_array(txcreditintrenable, int, mboxnum, 0644); ++module_param_array(txcreditintrenableaggregate, int, mboxnum, 0644); ++#else ++/* linux 2.4 and lower */ ++MODULE_PARM(debugflags,"i"); ++MODULE_PARM(debugdriver, "i"); ++MODULE_PARM(debughtc, "i"); ++MODULE_PARM(debugbmi, "i"); ++MODULE_PARM(debughif, "i"); ++MODULE_PARM(resetok, "i"); ++MODULE_PARM(txcreditsavailable, "0-3i"); ++MODULE_PARM(txcreditsconsumed, "0-3i"); ++MODULE_PARM(txcreditintrenable, "0-3i"); ++MODULE_PARM(txcreditintrenableaggregate, "0-3i"); ++#endif ++ ++#endif /* DEBUG */ ++ ++unsigned int tx_attempt[HTC_MAILBOX_NUM_MAX] = {0}; ++unsigned int tx_post[HTC_MAILBOX_NUM_MAX] = {0}; ++unsigned int tx_complete[HTC_MAILBOX_NUM_MAX] = {0}; ++unsigned int hifBusRequestNumMax = 40; ++unsigned int war23838_disabled = 0; ++#ifdef ADAPTIVE_POWER_THROUGHPUT_CONTROL ++unsigned int enableAPTCHeuristics = 1; ++#endif /* ADAPTIVE_POWER_THROUGHPUT_CONTROL */ ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) ++module_param_array(tx_attempt, int, mboxnum, 0644); ++module_param_array(tx_post, int, mboxnum, 0644); ++module_param_array(tx_complete, int, mboxnum, 0644); ++module_param(hifBusRequestNumMax, int, 0644); ++module_param(war23838_disabled, int, 0644); ++#ifdef ADAPTIVE_POWER_THROUGHPUT_CONTROL ++module_param(enableAPTCHeuristics, int, 0644); ++#endif /* ADAPTIVE_POWER_THROUGHPUT_CONTROL */ ++#else ++MODULE_PARM(tx_attempt, "0-3i"); ++MODULE_PARM(tx_post, "0-3i"); ++MODULE_PARM(tx_complete, "0-3i"); ++MODULE_PARM(hifBusRequestNumMax, "i"); ++MODULE_PARM(war23838_disabled, "i"); ++#ifdef ADAPTIVE_POWER_THROUGHPUT_CONTROL ++MODULE_PARM(enableAPTCHeuristics, "i"); ++#endif /* ADAPTIVE_POWER_THROUGHPUT_CONTROL */ ++#endif ++ ++#ifdef BLOCK_TX_PATH_FLAG ++int blocktx = 0; ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) ++module_param(blocktx, int, 0644); ++#else ++MODULE_PARM(blocktx, "i"); ++#endif ++#endif /* BLOCK_TX_PATH_FLAG */ ++ ++// TODO move to arsoft_c ++USER_RSSI_THOLD rssi_map[12]; ++ ++int reconnect_flag = 0; ++ ++DECLARE_WAIT_QUEUE_HEAD(ar6000_scan_queue); ++ ++/* Function declarations */ ++static int ar6000_init_module(void); ++static void ar6000_cleanup_module(void); ++ ++int ar6000_init(struct net_device *dev); ++static int ar6000_open(struct net_device *dev); ++static int ar6000_close(struct net_device *dev); ++static void ar6000_init_control_info(AR_SOFTC_T *ar); ++static int ar6000_data_tx(struct sk_buff *skb, struct net_device *dev); ++ ++static void ar6000_destroy(struct net_device *dev, unsigned int unregister); ++static void ar6000_detect_error(unsigned long ptr); ++static struct net_device_stats *ar6000_get_stats(struct net_device *dev); ++static struct iw_statistics *ar6000_get_iwstats(struct net_device * dev); ++ ++/* ++ * HTC service connection handlers ++ */ ++static void ar6000_avail_ev(HTC_HANDLE HTCHandle); ++ ++static void ar6000_unavail_ev(void *Instance); ++ ++static void ar6000_target_failure(void *Instance, A_STATUS Status); ++ ++static void ar6000_rx(void *Context, HTC_PACKET *pPacket); ++ ++static void ar6000_rx_refill(void *Context,HTC_ENDPOINT_ID Endpoint); ++ ++static void ar6000_tx_complete(void *Context, HTC_PACKET *pPacket); ++ ++static void ar6000_tx_queue_full(void *Context, HTC_ENDPOINT_ID Endpoint); ++ ++/* ++ * Static variables ++ */ ++ ++static struct net_device *ar6000_devices[MAX_AR6000]; ++extern struct iw_handler_def ath_iw_handler_def; ++DECLARE_WAIT_QUEUE_HEAD(arEvent); ++static void ar6000_cookie_init(AR_SOFTC_T *ar); ++static void ar6000_cookie_cleanup(AR_SOFTC_T *ar); ++static void ar6000_free_cookie(AR_SOFTC_T *ar, struct ar_cookie * cookie); ++static struct ar_cookie *ar6000_alloc_cookie(AR_SOFTC_T *ar); ++static void ar6000_TxDataCleanup(AR_SOFTC_T *ar); ++ ++#ifdef USER_KEYS ++static A_STATUS ar6000_reinstall_keys(AR_SOFTC_T *ar,A_UINT8 key_op_ctrl); ++#endif ++ ++ ++static struct ar_cookie s_ar_cookie_mem[MAX_COOKIE_NUM]; ++ ++#define HOST_INTEREST_ITEM_ADDRESS(ar, item) \ ++((ar->arTargetType == TARGET_TYPE_AR6001) ? \ ++ AR6001_HOST_INTEREST_ITEM_ADDRESS(item) : \ ++ AR6002_HOST_INTEREST_ITEM_ADDRESS(item)) ++ ++ ++/* Debug log support */ ++ ++/* ++ * Flag to govern whether the debug logs should be parsed in the kernel ++ * or reported to the application. ++ */ ++#define REPORT_DEBUG_LOGS_TO_APP ++ ++A_STATUS ++ar6000_set_host_app_area(AR_SOFTC_T *ar) ++{ ++ A_UINT32 address, data; ++ struct host_app_area_s host_app_area; ++ ++ /* Fetch the address of the host_app_area_s instance in the host interest area */ ++ address = HOST_INTEREST_ITEM_ADDRESS(ar, hi_app_host_interest); ++ if (ar6000_ReadRegDiag(ar->arHifDevice, &address, &data) != A_OK) { ++ return A_ERROR; ++ } ++ address = data; ++ host_app_area.wmi_protocol_ver = WMI_PROTOCOL_VERSION; ++ if (ar6000_WriteDataDiag(ar->arHifDevice, address, ++ (A_UCHAR *)&host_app_area, ++ sizeof(struct host_app_area_s)) != A_OK) ++ { ++ return A_ERROR; ++ } ++ ++ return A_OK; ++} ++ ++A_UINT32 ++dbglog_get_debug_hdr_ptr(AR_SOFTC_T *ar) ++{ ++ A_UINT32 param; ++ A_UINT32 address; ++ A_STATUS status; ++ ++ address = HOST_INTEREST_ITEM_ADDRESS(ar, hi_dbglog_hdr); ++ if ((status = ar6000_ReadDataDiag(ar->arHifDevice, address, ++ (A_UCHAR *)¶m, 4)) != A_OK) ++ { ++ param = 0; ++ } ++ ++ return param; ++} ++ ++/* ++ * The dbglog module has been initialized. Its ok to access the relevant ++ * data stuctures over the diagnostic window. ++ */ ++void ++ar6000_dbglog_init_done(AR_SOFTC_T *ar) ++{ ++ ar->dbglog_init_done = TRUE; ++} ++ ++A_UINT32 ++dbglog_get_debug_fragment(A_INT8 *datap, A_UINT32 len, A_UINT32 limit) ++{ ++ A_INT32 *buffer; ++ A_UINT32 count; ++ A_UINT32 numargs; ++ A_UINT32 length; ++ A_UINT32 fraglen; ++ ++ count = fraglen = 0; ++ buffer = (A_INT32 *)datap; ++ length = (limit >> 2); ++ ++ if (len <= limit) { ++ fraglen = len; ++ } else { ++ while (count < length) { ++ numargs = DBGLOG_GET_NUMARGS(buffer[count]); ++ fraglen = (count << 2); ++ count += numargs + 1; ++ } ++ } ++ ++ return fraglen; ++} ++ ++void ++dbglog_parse_debug_logs(A_INT8 *datap, A_UINT32 len) ++{ ++ A_INT32 *buffer; ++ A_UINT32 count; ++ A_UINT32 timestamp; ++ A_UINT32 debugid; ++ A_UINT32 moduleid; ++ A_UINT32 numargs; ++ A_UINT32 length; ++ ++ count = 0; ++ buffer = (A_INT32 *)datap; ++ length = (len >> 2); ++ while (count < length) { ++ debugid = DBGLOG_GET_DBGID(buffer[count]); ++ moduleid = DBGLOG_GET_MODULEID(buffer[count]); ++ numargs = DBGLOG_GET_NUMARGS(buffer[count]); ++ timestamp = DBGLOG_GET_TIMESTAMP(buffer[count]); ++ switch (numargs) { ++ case 0: ++ AR_DEBUG_PRINTF("%d %d (%d)\n", moduleid, debugid, timestamp); ++ break; ++ ++ case 1: ++ AR_DEBUG_PRINTF("%d %d (%d): 0x%x\n", moduleid, debugid, ++ timestamp, buffer[count+1]); ++ break; ++ ++ case 2: ++ AR_DEBUG_PRINTF("%d %d (%d): 0x%x, 0x%x\n", moduleid, debugid, ++ timestamp, buffer[count+1], buffer[count+2]); ++ break; ++ ++ default: ++ AR_DEBUG_PRINTF("Invalid args: %d\n", numargs); ++ } ++ count += numargs + 1; ++ } ++} ++ ++int ++ar6000_dbglog_get_debug_logs(AR_SOFTC_T *ar) ++{ ++ struct dbglog_hdr_s debug_hdr; ++ struct dbglog_buf_s debug_buf; ++ A_UINT32 address; ++ A_UINT32 length; ++ A_UINT32 dropped; ++ A_UINT32 firstbuf; ++ A_UINT32 debug_hdr_ptr; ++ ++ if (!ar->dbglog_init_done) return A_ERROR; ++ ++ ++ AR6000_SPIN_LOCK(&ar->arLock, 0); ++ ++ if (ar->dbgLogFetchInProgress) { ++ AR6000_SPIN_UNLOCK(&ar->arLock, 0); ++ return A_EBUSY; ++ } ++ ++ /* block out others */ ++ ar->dbgLogFetchInProgress = TRUE; ++ ++ AR6000_SPIN_UNLOCK(&ar->arLock, 0); ++ ++ debug_hdr_ptr = dbglog_get_debug_hdr_ptr(ar); ++ printk("debug_hdr_ptr: 0x%x\n", debug_hdr_ptr); ++ ++ /* Get the contents of the ring buffer */ ++ if (debug_hdr_ptr) { ++ address = debug_hdr_ptr; ++ length = sizeof(struct dbglog_hdr_s); ++ ar6000_ReadDataDiag(ar->arHifDevice, address, ++ (A_UCHAR *)&debug_hdr, length); ++ address = (A_UINT32)debug_hdr.dbuf; ++ firstbuf = address; ++ dropped = debug_hdr.dropped; ++ length = sizeof(struct dbglog_buf_s); ++ ar6000_ReadDataDiag(ar->arHifDevice, address, ++ (A_UCHAR *)&debug_buf, length); ++ ++ do { ++ address = (A_UINT32)debug_buf.buffer; ++ length = debug_buf.length; ++ if ((length) && (debug_buf.length <= debug_buf.bufsize)) { ++ /* Rewind the index if it is about to overrun the buffer */ ++ if (ar->log_cnt > (DBGLOG_HOST_LOG_BUFFER_SIZE - length)) { ++ ar->log_cnt = 0; ++ } ++ if(A_OK != ar6000_ReadDataDiag(ar->arHifDevice, address, ++ (A_UCHAR *)&ar->log_buffer[ar->log_cnt], length)) ++ { ++ break; ++ } ++ ar6000_dbglog_event(ar, dropped, &ar->log_buffer[ar->log_cnt], length); ++ ar->log_cnt += length; ++ } else { ++ AR_DEBUG_PRINTF("Length: %d (Total size: %d)\n", ++ debug_buf.length, debug_buf.bufsize); ++ } ++ ++ address = (A_UINT32)debug_buf.next; ++ length = sizeof(struct dbglog_buf_s); ++ if(A_OK != ar6000_ReadDataDiag(ar->arHifDevice, address, ++ (A_UCHAR *)&debug_buf, length)) ++ { ++ break; ++ } ++ ++ } while (address != firstbuf); ++ } ++ ++ ar->dbgLogFetchInProgress = FALSE; ++ ++ return A_OK; ++} ++ ++void ++ar6000_dbglog_event(AR_SOFTC_T *ar, A_UINT32 dropped, ++ A_INT8 *buffer, A_UINT32 length) ++{ ++#ifdef REPORT_DEBUG_LOGS_TO_APP ++ #define MAX_WIRELESS_EVENT_SIZE 252 ++ /* ++ * Break it up into chunks of MAX_WIRELESS_EVENT_SIZE bytes of messages. ++ * There seems to be a limitation on the length of message that could be ++ * transmitted to the user app via this mechanism. ++ */ ++ A_UINT32 send, sent; ++ ++ sent = 0; ++ send = dbglog_get_debug_fragment(&buffer[sent], length - sent, ++ MAX_WIRELESS_EVENT_SIZE); ++ while (send) { ++ ar6000_send_event_to_app(ar, WMIX_DBGLOG_EVENTID, &buffer[sent], send); ++ sent += send; ++ send = dbglog_get_debug_fragment(&buffer[sent], length - sent, ++ MAX_WIRELESS_EVENT_SIZE); ++ } ++#else ++ AR_DEBUG_PRINTF("Dropped logs: 0x%x\nDebug info length: %d\n", ++ dropped, length); ++ ++ /* Interpret the debug logs */ ++ dbglog_parse_debug_logs(buffer, length); ++#endif /* REPORT_DEBUG_LOGS_TO_APP */ ++} ++ ++ ++ ++static int __init ++ar6000_init_module(void) ++{ ++ static int probed = 0; ++ A_STATUS status; ++ HTC_INIT_INFO initInfo; ++ ++ A_MEMZERO(&initInfo,sizeof(initInfo)); ++ initInfo.AddInstance = ar6000_avail_ev; ++ initInfo.DeleteInstance = ar6000_unavail_ev; ++ initInfo.TargetFailure = ar6000_target_failure; ++ ++ ++#ifdef DEBUG ++ /* Set the debug flags if specified at load time */ ++ if(debugflags != 0) ++ { ++ g_dbg_flags = debugflags; ++ } ++#endif ++ ++ if (probed) { ++ return -ENODEV; ++ } ++ probed++; ++ ++#ifdef ADAPTIVE_POWER_THROUGHPUT_CONTROL ++ memset(&aptcTR, 0, sizeof(APTC_TRAFFIC_RECORD)); ++#endif /* ADAPTIVE_POWER_THROUGHPUT_CONTROL */ ++ ++#ifdef CONFIG_HOST_GPIO_SUPPORT ++ ar6000_gpio_init(); ++#endif /* CONFIG_HOST_GPIO_SUPPORT */ ++ ++ status = HTCInit(&initInfo); ++ if(status != A_OK) ++ return -ENODEV; ++ ++ return 0; ++} ++ ++static void __exit ++ar6000_cleanup_module(void) ++{ ++ int i = 0; ++ struct net_device *ar6000_netdev; ++ ++#ifdef ADAPTIVE_POWER_THROUGHPUT_CONTROL ++ /* Delete the Adaptive Power Control timer */ ++ if (timer_pending(&aptcTimer)) { ++ del_timer_sync(&aptcTimer); ++ } ++#endif /* ADAPTIVE_POWER_THROUGHPUT_CONTROL */ ++ ++ for (i=0; i < MAX_AR6000; i++) { ++ if (ar6000_devices[i] != NULL) { ++ ar6000_netdev = ar6000_devices[i]; ++ ar6000_devices[i] = NULL; ++ ar6000_destroy(ar6000_netdev, 1); ++ } ++ } ++ ++ /* shutting down HTC will cause the HIF layer to detach from the ++ * underlying bus driver which will cause the subsequent deletion of ++ * all HIF and HTC instances */ ++ HTCShutDown(); ++ ++ AR_DEBUG_PRINTF("ar6000_cleanup: success\n"); ++} ++ ++#ifdef ADAPTIVE_POWER_THROUGHPUT_CONTROL ++void ++aptcTimerHandler(unsigned long arg) ++{ ++ A_UINT32 numbytes; ++ A_UINT32 throughput; ++ AR_SOFTC_T *ar; ++ A_STATUS status; ++ ++ ar = (AR_SOFTC_T *)arg; ++ A_ASSERT(ar != NULL); ++ A_ASSERT(!timer_pending(&aptcTimer)); ++ ++ AR6000_SPIN_LOCK(&ar->arLock, 0); ++ ++ /* Get the number of bytes transferred */ ++ numbytes = aptcTR.bytesTransmitted + aptcTR.bytesReceived; ++ aptcTR.bytesTransmitted = aptcTR.bytesReceived = 0; ++ ++ /* Calculate and decide based on throughput thresholds */ ++ throughput = ((numbytes * 8)/APTC_TRAFFIC_SAMPLING_INTERVAL); /* Kbps */ ++ if (throughput < APTC_LOWER_THROUGHPUT_THRESHOLD) { ++ /* Enable Sleep and delete the timer */ ++ A_ASSERT(ar->arWmiReady == TRUE); ++ AR6000_SPIN_UNLOCK(&ar->arLock, 0); ++ status = wmi_powermode_cmd(ar->arWmi, REC_POWER); ++ AR6000_SPIN_LOCK(&ar->arLock, 0); ++ A_ASSERT(status == A_OK); ++ aptcTR.timerScheduled = FALSE; ++ } else { ++ A_TIMEOUT_MS(&aptcTimer, APTC_TRAFFIC_SAMPLING_INTERVAL, 0); ++ } ++ ++ AR6000_SPIN_UNLOCK(&ar->arLock, 0); ++} ++#endif /* ADAPTIVE_POWER_THROUGHPUT_CONTROL */ ++ ++ ++ ++/* set HTC block size, assume BMI is already initialized */ ++A_STATUS ar6000_SetHTCBlockSize(AR_SOFTC_T *ar) ++{ ++ A_STATUS status; ++ A_UINT32 blocksizes[HTC_MAILBOX_NUM_MAX]; ++ ++ do { ++ /* get the block sizes */ ++ status = HIFConfigureDevice(ar->arHifDevice, HIF_DEVICE_GET_MBOX_BLOCK_SIZE, ++ blocksizes, sizeof(blocksizes)); ++ ++ if (A_FAILED(status)) { ++ AR_DEBUG_PRINTF("Failed to get block size info from HIF layer...\n"); ++ break; ++ } ++ /* note: we actually get the block size for mailbox 1, for SDIO the block ++ * size on mailbox 0 is artificially set to 1 */ ++ /* must be a power of 2 */ ++ A_ASSERT((blocksizes[1] & (blocksizes[1] - 1)) == 0); ++ ++ /* set the host interest area for the block size */ ++ status = BMIWriteMemory(ar->arHifDevice, ++ HOST_INTEREST_ITEM_ADDRESS(ar, hi_mbox_io_block_sz), ++ (A_UCHAR *)&blocksizes[1], ++ 4); ++ ++ if (A_FAILED(status)) { ++ AR_DEBUG_PRINTF("BMIWriteMemory for IO block size failed \n"); ++ break; ++ } ++ ++ AR_DEBUG_PRINTF("Block Size Set: %d (target address:0x%X)\n", ++ blocksizes[1], HOST_INTEREST_ITEM_ADDRESS(ar, hi_mbox_io_block_sz)); ++ ++ /* set the host interest area for the mbox ISR yield limit */ ++ status = BMIWriteMemory(ar->arHifDevice, ++ HOST_INTEREST_ITEM_ADDRESS(ar, hi_mbox_isr_yield_limit), ++ (A_UCHAR *)&mbox_yield_limit, ++ 4); ++ ++ if (A_FAILED(status)) { ++ AR_DEBUG_PRINTF("BMIWriteMemory for yield limit failed \n"); ++ break; ++ } ++ ++ } while (FALSE); ++ ++ return status; ++} ++ ++/* ++ * HTC Event handlers ++ */ ++static void ++ar6000_avail_ev(HTC_HANDLE HTCHandle) ++{ ++ int i; ++ struct net_device *dev; ++ AR_SOFTC_T *ar; ++ int device_index = 0; ++ ++ AR_DEBUG_PRINTF("ar6000_available\n"); ++ ++ for (i=0; i < MAX_AR6000; i++) { ++ if (ar6000_devices[i] == NULL) { ++ break; ++ } ++ } ++ ++ if (i == MAX_AR6000) { ++ AR_DEBUG_PRINTF("ar6000_available: max devices reached\n"); ++ return; ++ } ++ ++ /* Save this. It gives a bit better readability especially since */ ++ /* we use another local "i" variable below. */ ++ device_index = i; ++ ++ A_ASSERT(HTCHandle != NULL); ++ ++ dev = alloc_etherdev(sizeof(AR_SOFTC_T)); ++ if (dev == NULL) { ++ AR_DEBUG_PRINTF("ar6000_available: can't alloc etherdev\n"); ++ return; ++ } ++ ++ ether_setup(dev); ++ ++ if (dev->priv == NULL) { ++ printk(KERN_CRIT "ar6000_available: Could not allocate memory\n"); ++ return; ++ } ++ ++ A_MEMZERO(dev->priv, sizeof(AR_SOFTC_T)); ++ ++ ar = (AR_SOFTC_T *)dev->priv; ++ ar->arNetDev = dev; ++ ar->arHtcTarget = HTCHandle; ++ ar->arHifDevice = HTCGetHifDevice(HTCHandle); ++ ar->arWlanState = WLAN_ENABLED; ++ ar->arDeviceIndex = device_index; ++ ++ A_INIT_TIMER(&ar->arHBChallengeResp.timer, ar6000_detect_error, dev); ++ ar->arHBChallengeResp.seqNum = 0; ++ ar->arHBChallengeResp.outstanding = FALSE; ++ ar->arHBChallengeResp.missCnt = 0; ++ ar->arHBChallengeResp.frequency = AR6000_HB_CHALLENGE_RESP_FREQ_DEFAULT; ++ ar->arHBChallengeResp.missThres = AR6000_HB_CHALLENGE_RESP_MISS_THRES_DEFAULT; ++ ++ ar6000_init_control_info(ar); ++ init_waitqueue_head(&arEvent); ++ sema_init(&ar->arSem, 1); ++ ++#ifdef ADAPTIVE_POWER_THROUGHPUT_CONTROL ++ A_INIT_TIMER(&aptcTimer, aptcTimerHandler, ar); ++#endif /* ADAPTIVE_POWER_THROUGHPUT_CONTROL */ ++ ++ /* ++ * If requested, perform some magic which requires no cooperation from ++ * the Target. It causes the Target to ignore flash and execute to the ++ * OS from ROM. ++ * ++ * This is intended to support recovery from a corrupted flash on Targets ++ * that support flash. ++ */ ++ if (skipflash) ++ { ++ ar6000_reset_device_skipflash(ar->arHifDevice); ++ } ++ ++ BMIInit(); ++ { ++ struct bmi_target_info targ_info; ++ ++ if (BMIGetTargetInfo(ar->arHifDevice, &targ_info) != A_OK) { ++ return; ++ } ++ ++ ar->arVersion.target_ver = targ_info.target_ver; ++ ar->arTargetType = targ_info.target_type; ++ } ++ ++ if (enableuartprint) { ++ A_UINT32 param; ++ param = 1; ++ if (BMIWriteMemory(ar->arHifDevice, ++ HOST_INTEREST_ITEM_ADDRESS(ar, hi_serial_enable), ++ (A_UCHAR *)¶m, ++ 4)!= A_OK) ++ { ++ AR_DEBUG_PRINTF("BMIWriteMemory for enableuartprint failed \n"); ++ return ; ++ } ++ AR_DEBUG_PRINTF("Serial console prints enabled\n"); ++ } ++#ifdef CONFIG_HOST_TCMD_SUPPORT ++ if(testmode) { ++ ar->arTargetMode = AR6000_TCMD_MODE; ++ }else { ++ ar->arTargetMode = AR6000_WLAN_MODE; ++ } ++#endif ++ if (enabletimerwar) { ++ A_UINT32 param; ++ ++ if (BMIReadMemory(ar->arHifDevice, ++ HOST_INTEREST_ITEM_ADDRESS(ar, hi_option_flag), ++ (A_UCHAR *)¶m, ++ 4)!= A_OK) ++ { ++ AR_DEBUG_PRINTF("BMIReadMemory for enabletimerwar failed \n"); ++ return; ++ } ++ ++ param |= HI_OPTION_TIMER_WAR; ++ ++ if (BMIWriteMemory(ar->arHifDevice, ++ HOST_INTEREST_ITEM_ADDRESS(ar, hi_option_flag), ++ (A_UCHAR *)¶m, ++ 4) != A_OK) ++ { ++ AR_DEBUG_PRINTF("BMIWriteMemory for enabletimerwar failed \n"); ++ return; ++ } ++ AR_DEBUG_PRINTF("Timer WAR enabled\n"); ++ } ++ ++ ++ /* since BMIInit is called in the driver layer, we have to set the block ++ * size here for the target */ ++ ++ if (A_FAILED(ar6000_SetHTCBlockSize(ar))) { ++ return; ++ } ++ ++ spin_lock_init(&ar->arLock); ++ ++ /* Don't install the init function if BMI is requested */ ++ if(!bmienable) ++ { ++ dev->init = ar6000_init; ++ } else { ++ AR_DEBUG_PRINTF(" BMI enabled \n"); ++ } ++ ++ dev->open = &ar6000_open; ++ dev->stop = &ar6000_close; ++ dev->hard_start_xmit = &ar6000_data_tx; ++ dev->get_stats = &ar6000_get_stats; ++ ++ /* dev->tx_timeout = ar6000_tx_timeout; */ ++ dev->do_ioctl = &ar6000_ioctl; ++ dev->watchdog_timeo = AR6000_TX_TIMEOUT; ++ ar6000_ioctl_iwsetup(&ath_iw_handler_def); ++ dev->wireless_handlers = &ath_iw_handler_def; ++ ath_iw_handler_def.get_wireless_stats = ar6000_get_iwstats; /*Displayed via proc fs */ ++ ++ /* ++ * We need the OS to provide us with more headroom in order to ++ * perform dix to 802.3, WMI header encap, and the HTC header ++ */ ++ dev->hard_header_len = ETH_HLEN + sizeof(ATH_LLC_SNAP_HDR) + ++ sizeof(WMI_DATA_HDR) + HTC_HEADER_LEN; ++ ++ /* This runs the init function */ ++ if (register_netdev(dev)) { ++ AR_DEBUG_PRINTF("ar6000_avail: register_netdev failed\n"); ++ ar6000_destroy(dev, 0); ++ return; ++ } ++ ++ HTCSetInstance(ar->arHtcTarget, ar); ++ ++ /* We only register the device in the global list if we succeed. */ ++ /* If the device is in the global list, it will be destroyed */ ++ /* when the module is unloaded. */ ++ ar6000_devices[device_index] = dev; ++ ++ AR_DEBUG_PRINTF("ar6000_avail: name=%s htcTarget=0x%x, dev=0x%x (%d), ar=0x%x\n", ++ dev->name, (A_UINT32)HTCHandle, (A_UINT32)dev, device_index, ++ (A_UINT32)ar); ++} ++ ++static void ar6000_target_failure(void *Instance, A_STATUS Status) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)Instance; ++ WMI_TARGET_ERROR_REPORT_EVENT errEvent; ++ static A_BOOL sip = FALSE; ++ ++ if (Status != A_OK) { ++ if (timer_pending(&ar->arHBChallengeResp.timer)) { ++ A_UNTIMEOUT(&ar->arHBChallengeResp.timer); ++ } ++ ++ /* try dumping target assertion information (if any) */ ++ ar6000_dump_target_assert_info(ar->arHifDevice,ar->arTargetType); ++ ++ /* ++ * Fetch the logs from the target via the diagnostic ++ * window. ++ */ ++ ar6000_dbglog_get_debug_logs(ar); ++ ++ /* Report the error only once */ ++ if (!sip) { ++ sip = TRUE; ++ errEvent.errorVal = WMI_TARGET_COM_ERR | ++ WMI_TARGET_FATAL_ERR; ++ ar6000_send_event_to_app(ar, WMI_ERROR_REPORT_EVENTID, ++ (A_UINT8 *)&errEvent, ++ sizeof(WMI_TARGET_ERROR_REPORT_EVENT)); ++ } ++ } ++} ++ ++static void ++ar6000_unavail_ev(void *Instance) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)Instance; ++ /* NULL out it's entry in the global list */ ++ ar6000_devices[ar->arDeviceIndex] = NULL; ++ ar6000_destroy(ar->arNetDev, 1); ++} ++ ++/* ++ * We need to differentiate between the surprise and planned removal of the ++ * device because of the following consideration: ++ * - In case of surprise removal, the hcd already frees up the pending ++ * for the device and hence there is no need to unregister the function ++ * driver inorder to get these requests. For planned removal, the function ++ * driver has to explictly unregister itself to have the hcd return all the ++ * pending requests before the data structures for the devices are freed up. ++ * Note that as per the current implementation, the function driver will ++ * end up releasing all the devices since there is no API to selectively ++ * release a particular device. ++ * - Certain commands issued to the target can be skipped for surprise ++ * removal since they will anyway not go through. ++ */ ++static void ++ar6000_destroy(struct net_device *dev, unsigned int unregister) ++{ ++ AR_SOFTC_T *ar; ++ ++ AR_DEBUG_PRINTF("+ar6000_destroy \n"); ++ ++ if((dev == NULL) || ((ar = netdev_priv(dev)) == NULL)) ++ { ++ AR_DEBUG_PRINTF("%s(): Failed to get device structure.\n", __func__); ++ return; ++ } ++ ++ /* Stop the transmit queues */ ++ netif_stop_queue(dev); ++ ++ /* Disable the target and the interrupts associated with it */ ++ if (ar->arWmiReady == TRUE) ++ { ++ if (!bypasswmi) ++ { ++ if (ar->arConnected == TRUE || ar->arConnectPending == TRUE) ++ { ++ AR_DEBUG_PRINTF("%s(): Disconnect\n", __func__); ++ AR6000_SPIN_LOCK(&ar->arLock, 0); ++ ar6000_init_profile_info(ar); ++ AR6000_SPIN_UNLOCK(&ar->arLock, 0); ++ wmi_disconnect_cmd(ar->arWmi); ++ } ++ ++ ar6000_dbglog_get_debug_logs(ar); ++ ar->arWmiReady = FALSE; ++ ar->arConnected = FALSE; ++ ar->arConnectPending = FALSE; ++ wmi_shutdown(ar->arWmi); ++ ar->arWmiEnabled = FALSE; ++ ar->arWmi = NULL; ++ ar->arWlanState = WLAN_ENABLED; ++#ifdef USER_KEYS ++ ar->user_savedkeys_stat = USER_SAVEDKEYS_STAT_INIT; ++ ar->user_key_ctrl = 0; ++#endif ++ } ++ ++ AR_DEBUG_PRINTF("%s(): WMI stopped\n", __func__); ++ } ++ else ++ { ++ AR_DEBUG_PRINTF("%s(): WMI not ready 0x%08x 0x%08x\n", ++ __func__, (unsigned int) ar, (unsigned int) ar->arWmi); ++ ++ /* Shut down WMI if we have started it */ ++ if(ar->arWmiEnabled == TRUE) ++ { ++ AR_DEBUG_PRINTF("%s(): Shut down WMI\n", __func__); ++ wmi_shutdown(ar->arWmi); ++ ar->arWmiEnabled = FALSE; ++ ar->arWmi = NULL; ++ } ++ } ++ ++ /* stop HTC */ ++ HTCStop(ar->arHtcTarget); ++ ++ /* set the instance to NULL so we do not get called back on remove incase we ++ * we're explicity destroyed by module unload */ ++ HTCSetInstance(ar->arHtcTarget, NULL); ++ ++ if (resetok) { ++ /* try to reset the device if we can ++ * The driver may have been configure NOT to reset the target during ++ * a debug session */ ++ AR_DEBUG_PRINTF(" Attempting to reset target on instance destroy.... \n"); ++ ar6000_reset_device(ar->arHifDevice, ar->arTargetType); ++ } else { ++ AR_DEBUG_PRINTF(" Host does not want target reset. \n"); ++ } ++ ++ /* Done with cookies */ ++ ar6000_cookie_cleanup(ar); ++ ++ /* Cleanup BMI */ ++ BMIInit(); ++ ++ /* Clear the tx counters */ ++ memset(tx_attempt, 0, sizeof(tx_attempt)); ++ memset(tx_post, 0, sizeof(tx_post)); ++ memset(tx_complete, 0, sizeof(tx_complete)); ++ ++ ++ /* Free up the device data structure */ ++ if (unregister) ++ unregister_netdev(dev); ++#ifndef free_netdev ++ kfree(dev); ++#else ++ free_netdev(dev); ++#endif ++ ++ AR_DEBUG_PRINTF("-ar6000_destroy \n"); ++} ++ ++static void ar6000_detect_error(unsigned long ptr) ++{ ++ struct net_device *dev = (struct net_device *)ptr; ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ WMI_TARGET_ERROR_REPORT_EVENT errEvent; ++ ++ AR6000_SPIN_LOCK(&ar->arLock, 0); ++ ++ if (ar->arHBChallengeResp.outstanding) { ++ ar->arHBChallengeResp.missCnt++; ++ } else { ++ ar->arHBChallengeResp.missCnt = 0; ++ } ++ ++ if (ar->arHBChallengeResp.missCnt > ar->arHBChallengeResp.missThres) { ++ /* Send Error Detect event to the application layer and do not reschedule the error detection module timer */ ++ ar->arHBChallengeResp.missCnt = 0; ++ ar->arHBChallengeResp.seqNum = 0; ++ errEvent.errorVal = WMI_TARGET_COM_ERR | WMI_TARGET_FATAL_ERR; ++ AR6000_SPIN_UNLOCK(&ar->arLock, 0); ++ ar6000_send_event_to_app(ar, WMI_ERROR_REPORT_EVENTID, ++ (A_UINT8 *)&errEvent, ++ sizeof(WMI_TARGET_ERROR_REPORT_EVENT)); ++ return; ++ } ++ ++ /* Generate the sequence number for the next challenge */ ++ ar->arHBChallengeResp.seqNum++; ++ ar->arHBChallengeResp.outstanding = TRUE; ++ ++ AR6000_SPIN_UNLOCK(&ar->arLock, 0); ++ ++ /* Send the challenge on the control channel */ ++ if (wmi_get_challenge_resp_cmd(ar->arWmi, ar->arHBChallengeResp.seqNum, DRV_HB_CHALLENGE) != A_OK) { ++ AR_DEBUG_PRINTF("Unable to send heart beat challenge\n"); ++ } ++ ++ ++ /* Reschedule the timer for the next challenge */ ++ A_TIMEOUT_MS(&ar->arHBChallengeResp.timer, ar->arHBChallengeResp.frequency * 1000, 0); ++} ++ ++void ar6000_init_profile_info(AR_SOFTC_T *ar) ++{ ++ ar->arSsidLen = 0; ++ A_MEMZERO(ar->arSsid, sizeof(ar->arSsid)); ++ ar->arNetworkType = INFRA_NETWORK; ++ ar->arDot11AuthMode = OPEN_AUTH; ++ ar->arAuthMode = NONE_AUTH; ++ ar->arPairwiseCrypto = NONE_CRYPT; ++ ar->arPairwiseCryptoLen = 0; ++ ar->arGroupCrypto = NONE_CRYPT; ++ ar->arGroupCryptoLen = 0; ++ A_MEMZERO(ar->arWepKeyList, sizeof(ar->arWepKeyList)); ++ A_MEMZERO(ar->arReqBssid, sizeof(ar->arReqBssid)); ++ A_MEMZERO(ar->arBssid, sizeof(ar->arBssid)); ++ ar->arBssChannel = 0; ++} ++ ++static void ++ar6000_init_control_info(AR_SOFTC_T *ar) ++{ ++ ar->arWmiEnabled = FALSE; ++ ar6000_init_profile_info(ar); ++ ar->arDefTxKeyIndex = 0; ++ A_MEMZERO(ar->arWepKeyList, sizeof(ar->arWepKeyList)); ++ ar->arChannelHint = 0; ++ ar->arListenInterval = MAX_LISTEN_INTERVAL; ++ ar->arVersion.host_ver = AR6K_SW_VERSION; ++ ar->arRssi = 0; ++ ar->arTxPwr = 0; ++ ar->arTxPwrSet = FALSE; ++ ar->arSkipScan = 0; ++ ar->arBeaconInterval = 0; ++ ar->arBitRate = 0; ++ ar->arMaxRetries = 0; ++ ar->arWmmEnabled = TRUE; ++} ++ ++static int ++ar6000_open(struct net_device *dev) ++{ ++ /* Wake up the queues */ ++ netif_wake_queue(dev); ++ ++ return 0; ++} ++ ++static int ++ar6000_close(struct net_device *dev) ++{ ++ netif_stop_queue(dev); ++ ++ return 0; ++} ++ ++/* connect to a service */ ++static A_STATUS ar6000_connectservice(AR_SOFTC_T *ar, ++ HTC_SERVICE_CONNECT_REQ *pConnect, ++ WMI_PRI_STREAM_ID WmiStreamID, ++ char *pDesc) ++{ ++ A_STATUS status; ++ HTC_SERVICE_CONNECT_RESP response; ++ ++ do { ++ ++ A_MEMZERO(&response,sizeof(response)); ++ ++ status = HTCConnectService(ar->arHtcTarget, ++ pConnect, ++ &response); ++ ++ if (A_FAILED(status)) { ++ AR_DEBUG_PRINTF(" Failed to connect to %s service status:%d \n", pDesc, status); ++ break; ++ } ++ ++ if (WmiStreamID == WMI_NOT_MAPPED) { ++ /* done */ ++ break; ++ } ++ ++ /* set endpoint mapping for the WMI stream in the driver layer */ ++ arSetWMIStream2EndpointIDMap(ar,WmiStreamID,response.Endpoint); ++ ++ } while (FALSE); ++ ++ return status; ++} ++ ++static void ar6000_TxDataCleanup(AR_SOFTC_T *ar) ++{ ++ /* flush all the data (non-control) streams ++ * we only flush packets that are tagged as data, we leave any control packets that ++ * were in the TX queues alone */ ++ HTCFlushEndpoint(ar->arHtcTarget, ++ arWMIStream2EndpointID(ar,WMI_BEST_EFFORT_PRI), ++ AR6K_DATA_PKT_TAG); ++ HTCFlushEndpoint(ar->arHtcTarget, ++ arWMIStream2EndpointID(ar,WMI_LOW_PRI), ++ AR6K_DATA_PKT_TAG); ++ HTCFlushEndpoint(ar->arHtcTarget, ++ arWMIStream2EndpointID(ar,WMI_HIGH_PRI), ++ AR6K_DATA_PKT_TAG); ++ HTCFlushEndpoint(ar->arHtcTarget, ++ arWMIStream2EndpointID(ar,WMI_HIGHEST_PRI), ++ AR6K_DATA_PKT_TAG); ++} ++ ++/* This function does one time initialization for the lifetime of the device */ ++int ar6000_init(struct net_device *dev) ++{ ++ AR_SOFTC_T *ar; ++ A_STATUS status; ++ A_INT32 timeleft; ++ ++ if((ar = netdev_priv(dev)) == NULL) ++ { ++ return(-EIO); ++ } ++ ++ /* Do we need to finish the BMI phase */ ++ if(BMIDone(ar->arHifDevice) != A_OK) ++ { ++ return -EIO; ++ } ++ ++ if (!bypasswmi) ++ { ++#if 0 /* TBDXXX */ ++ if (ar->arVersion.host_ver != ar->arVersion.target_ver) { ++ A_PRINTF("WARNING: Host version 0x%x does not match Target " ++ " version 0x%x!\n", ++ ar->arVersion.host_ver, ar->arVersion.target_ver); ++ } ++#endif ++ ++ /* Indicate that WMI is enabled (although not ready yet) */ ++ ar->arWmiEnabled = TRUE; ++ if ((ar->arWmi = wmi_init((void *) ar)) == NULL) ++ { ++ AR_DEBUG_PRINTF("%s() Failed to initialize WMI.\n", __func__); ++ return(-EIO); ++ } ++ ++ AR_DEBUG_PRINTF("%s() Got WMI @ 0x%08x.\n", __func__, ++ (unsigned int) ar->arWmi); ++ } ++ ++ do { ++ HTC_SERVICE_CONNECT_REQ connect; ++ ++ /* the reason we have to wait for the target here is that the driver layer ++ * has to init BMI in order to set the host block size, ++ */ ++ status = HTCWaitTarget(ar->arHtcTarget); ++ ++ if (A_FAILED(status)) { ++ break; ++ } ++ ++ A_MEMZERO(&connect,sizeof(connect)); ++ /* meta data is unused for now */ ++ connect.pMetaData = NULL; ++ connect.MetaDataLength = 0; ++ /* these fields are the same for all service endpoints */ ++ connect.EpCallbacks.pContext = ar; ++ connect.EpCallbacks.EpTxComplete = ar6000_tx_complete; ++ connect.EpCallbacks.EpRecv = ar6000_rx; ++ connect.EpCallbacks.EpRecvRefill = ar6000_rx_refill; ++ connect.EpCallbacks.EpSendFull = ar6000_tx_queue_full; ++ /* set the max queue depth so that our ar6000_tx_queue_full handler gets called. ++ * Linux has the peculiarity of not providing flow control between the ++ * NIC and the network stack. There is no API to indicate that a TX packet ++ * was sent which could provide some back pressure to the network stack. ++ * Under linux you would have to wait till the network stack consumed all sk_buffs ++ * before any back-flow kicked in. Which isn't very friendly. ++ * So we have to manage this ourselves */ ++ connect.MaxSendQueueDepth = 32; ++ ++ /* connect to control service */ ++ connect.ServiceID = WMI_CONTROL_SVC; ++ status = ar6000_connectservice(ar, ++ &connect, ++ WMI_CONTROL_PRI, ++ "WMI CONTROL"); ++ if (A_FAILED(status)) { ++ break; ++ } ++ ++ /* for the remaining data services set the connection flag to reduce dribbling, ++ * if configured to do so */ ++ if (reduce_credit_dribble) { ++ connect.ConnectionFlags |= HTC_CONNECT_FLAGS_REDUCE_CREDIT_DRIBBLE; ++ /* the credit dribble trigger threshold is (reduce_credit_dribble - 1) for a value ++ * of 0-3 */ ++ connect.ConnectionFlags &= ~HTC_CONNECT_FLAGS_THRESHOLD_LEVEL_MASK; ++ connect.ConnectionFlags |= ++ ((A_UINT16)reduce_credit_dribble - 1) & HTC_CONNECT_FLAGS_THRESHOLD_LEVEL_MASK; ++ } ++ /* connect to best-effort service */ ++ connect.ServiceID = WMI_DATA_BE_SVC; ++ ++ status = ar6000_connectservice(ar, ++ &connect, ++ WMI_BEST_EFFORT_PRI, ++ "WMI DATA BE"); ++ if (A_FAILED(status)) { ++ break; ++ } ++ ++ /* connect to back-ground ++ * map this to WMI LOW_PRI */ ++ connect.ServiceID = WMI_DATA_BK_SVC; ++ status = ar6000_connectservice(ar, ++ &connect, ++ WMI_LOW_PRI, ++ "WMI DATA BK"); ++ if (A_FAILED(status)) { ++ break; ++ } ++ ++ /* connect to Video service, map this to ++ * to HI PRI */ ++ connect.ServiceID = WMI_DATA_VI_SVC; ++ status = ar6000_connectservice(ar, ++ &connect, ++ WMI_HIGH_PRI, ++ "WMI DATA VI"); ++ if (A_FAILED(status)) { ++ break; ++ } ++ ++ /* connect to VO service, this is currently not ++ * mapped to a WMI priority stream due to historical reasons. ++ * WMI originally defined 3 priorities over 3 mailboxes ++ * We can change this when WMI is reworked so that priorities are not ++ * dependent on mailboxes */ ++ connect.ServiceID = WMI_DATA_VO_SVC; ++ status = ar6000_connectservice(ar, ++ &connect, ++ WMI_HIGHEST_PRI, ++ "WMI DATA VO"); ++ if (A_FAILED(status)) { ++ break; ++ } ++ ++ A_ASSERT(arWMIStream2EndpointID(ar,WMI_CONTROL_PRI) != 0); ++ A_ASSERT(arWMIStream2EndpointID(ar,WMI_BEST_EFFORT_PRI) != 0); ++ A_ASSERT(arWMIStream2EndpointID(ar,WMI_LOW_PRI) != 0); ++ A_ASSERT(arWMIStream2EndpointID(ar,WMI_HIGH_PRI) != 0); ++ A_ASSERT(arWMIStream2EndpointID(ar,WMI_HIGHEST_PRI) != 0); ++ } while (FALSE); ++ ++ if (A_FAILED(status)) { ++ return (-EIO); ++ } ++ ++ /* ++ * give our connected endpoints some buffers ++ */ ++ ar6000_rx_refill(ar, arWMIStream2EndpointID(ar,WMI_CONTROL_PRI)); ++ ++ ar6000_rx_refill(ar, arWMIStream2EndpointID(ar,WMI_BEST_EFFORT_PRI)); ++ ++ /* ++ * We will post the receive buffers only for SPE testing and so we are ++ * making it conditional on the 'bypasswmi' flag. ++ */ ++ if (bypasswmi) { ++ ar6000_rx_refill(ar,arWMIStream2EndpointID(ar,WMI_LOW_PRI)); ++ ar6000_rx_refill(ar,arWMIStream2EndpointID(ar,WMI_HIGH_PRI)); ++ } ++ ++ /* setup credit distribution */ ++ ar6000_setup_credit_dist(ar->arHtcTarget, &ar->arCreditStateInfo); ++ ++ /* Since cookies are used for HTC transports, they should be */ ++ /* initialized prior to enabling HTC. */ ++ ar6000_cookie_init(ar); ++ ++ /* start HTC */ ++ status = HTCStart(ar->arHtcTarget); ++ ++ if (status != A_OK) { ++ if (ar->arWmiEnabled == TRUE) { ++ wmi_shutdown(ar->arWmi); ++ ar->arWmiEnabled = FALSE; ++ ar->arWmi = NULL; ++ } ++ ar6000_cookie_cleanup(ar); ++ return -EIO; ++ } ++ ++ if (!bypasswmi) { ++ /* Wait for Wmi event to be ready */ ++ timeleft = wait_event_interruptible_timeout(arEvent, ++ (ar->arWmiReady == TRUE), wmitimeout * HZ); ++ ++ if(!timeleft || signal_pending(current)) ++ { ++ AR_DEBUG_PRINTF("WMI is not ready or wait was interrupted\n"); ++#if defined(DWSIM) /* TBDXXX */ ++ AR_DEBUG_PRINTF(".....but proceed anyway.\n"); ++#else ++ return -EIO; ++#endif ++ } ++ ++ AR_DEBUG_PRINTF("%s() WMI is ready\n", __func__); ++ ++ /* Communicate the wmi protocol verision to the target */ ++ if ((ar6000_set_host_app_area(ar)) != A_OK) { ++ AR_DEBUG_PRINTF("Unable to set the host app area\n"); ++ } ++ } ++ ++ ar->arNumDataEndPts = 1; ++ ++ return(0); ++} ++ ++ ++void ++ar6000_bitrate_rx(void *devt, A_INT32 rateKbps) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)devt; ++ ++ ar->arBitRate = rateKbps; ++ wake_up(&arEvent); ++} ++ ++void ++ar6000_ratemask_rx(void *devt, A_UINT16 ratemask) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)devt; ++ ++ ar->arRateMask = ratemask; ++ wake_up(&arEvent); ++} ++ ++void ++ar6000_txPwr_rx(void *devt, A_UINT8 txPwr) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)devt; ++ ++ ar->arTxPwr = txPwr; ++ wake_up(&arEvent); ++} ++ ++ ++void ++ar6000_channelList_rx(void *devt, A_INT8 numChan, A_UINT16 *chanList) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)devt; ++ ++ A_MEMCPY(ar->arChannelList, chanList, numChan * sizeof (A_UINT16)); ++ ar->arNumChannels = numChan; ++ ++ wake_up(&arEvent); ++} ++ ++A_UINT8 ++ar6000_ibss_map_epid(struct sk_buff *skb, struct net_device *dev, A_UINT32 * mapNo) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ A_UINT8 *datap; ++ ATH_MAC_HDR *macHdr; ++ A_UINT32 i, eptMap; ++ ++ (*mapNo) = 0; ++ datap = A_NETBUF_DATA(skb); ++ macHdr = (ATH_MAC_HDR *)(datap + sizeof(WMI_DATA_HDR)); ++ if (IEEE80211_IS_MULTICAST(macHdr->dstMac)) { ++ return ENDPOINT_2; ++ } ++ ++ eptMap = -1; ++ for (i = 0; i < ar->arNodeNum; i ++) { ++ if (IEEE80211_ADDR_EQ(macHdr->dstMac, ar->arNodeMap[i].macAddress)) { ++ (*mapNo) = i + 1; ++ ar->arNodeMap[i].txPending ++; ++ return ar->arNodeMap[i].epId; ++ } ++ ++ if ((eptMap == -1) && !ar->arNodeMap[i].txPending) { ++ eptMap = i; ++ } ++ } ++ ++ if (eptMap == -1) { ++ eptMap = ar->arNodeNum; ++ ar->arNodeNum ++; ++ A_ASSERT(ar->arNodeNum <= MAX_NODE_NUM); ++ } ++ ++ A_MEMCPY(ar->arNodeMap[eptMap].macAddress, macHdr->dstMac, IEEE80211_ADDR_LEN); ++ ++ for (i = ENDPOINT_2; i <= ENDPOINT_5; i ++) { ++ if (!ar->arTxPending[i]) { ++ ar->arNodeMap[eptMap].epId = i; ++ break; ++ } ++ // No free endpoint is available, start redistribution on the inuse endpoints. ++ if (i == ENDPOINT_5) { ++ ar->arNodeMap[eptMap].epId = ar->arNexEpId; ++ ar->arNexEpId ++; ++ if (ar->arNexEpId > ENDPOINT_5) { ++ ar->arNexEpId = ENDPOINT_2; ++ } ++ } ++ } ++ ++ (*mapNo) = eptMap + 1; ++ ar->arNodeMap[eptMap].txPending ++; ++ ++ return ar->arNodeMap[eptMap].epId; ++} ++ ++#ifdef DEBUG ++static void ar6000_dump_skb(struct sk_buff *skb) ++{ ++ u_char *ch; ++ for (ch = A_NETBUF_DATA(skb); ++ (A_UINT32)ch < ((A_UINT32)A_NETBUF_DATA(skb) + ++ A_NETBUF_LEN(skb)); ch++) ++ { ++ AR_DEBUG_PRINTF("%2.2x ", *ch); ++ } ++ AR_DEBUG_PRINTF("\n"); ++} ++#endif ++ ++static int ++ar6000_data_tx(struct sk_buff *skb, struct net_device *dev) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ WMI_PRI_STREAM_ID streamID = WMI_NOT_MAPPED; ++ A_UINT32 mapNo = 0; ++ int len; ++ struct ar_cookie *cookie; ++ A_BOOL checkAdHocPsMapping = FALSE; ++ ++#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,13) ++ skb->list = NULL; ++#endif ++ ++ AR_DEBUG2_PRINTF("ar6000_data_tx start - skb=0x%x, data=0x%x, len=0x%x\n", ++ (A_UINT32)skb, (A_UINT32)A_NETBUF_DATA(skb), ++ A_NETBUF_LEN(skb)); ++#ifdef CONFIG_HOST_TCMD_SUPPORT ++ /* TCMD doesnt support any data, free the buf and return */ ++ if(ar->arTargetMode == AR6000_TCMD_MODE) { ++ A_NETBUF_FREE(skb); ++ return 0; ++ } ++#endif ++ do { ++ ++ if (ar->arWmiReady == FALSE && bypasswmi == 0) { ++ break; ++ } ++ ++#ifdef BLOCK_TX_PATH_FLAG ++ if (blocktx) { ++ break; ++ } ++#endif /* BLOCK_TX_PATH_FLAG */ ++ ++ if (ar->arWmiEnabled) { ++ if (A_NETBUF_HEADROOM(skb) < dev->hard_header_len) { ++ struct sk_buff *newbuf; ++ /* ++ * We really should have gotten enough headroom but sometimes ++ * we still get packets with not enough headroom. Copy the packet. ++ */ ++ len = A_NETBUF_LEN(skb); ++ newbuf = A_NETBUF_ALLOC(len); ++ if (newbuf == NULL) { ++ break; ++ } ++ A_NETBUF_PUT(newbuf, len); ++ A_MEMCPY(A_NETBUF_DATA(newbuf), A_NETBUF_DATA(skb), len); ++ A_NETBUF_FREE(skb); ++ skb = newbuf; ++ /* fall through and assemble header */ ++ } ++ ++ if (wmi_dix_2_dot3(ar->arWmi, skb) != A_OK) { ++ AR_DEBUG_PRINTF("ar6000_data_tx - wmi_dix_2_dot3 failed\n"); ++ break; ++ } ++ ++ if (wmi_data_hdr_add(ar->arWmi, skb, DATA_MSGTYPE) != A_OK) { ++ AR_DEBUG_PRINTF("ar6000_data_tx - wmi_data_hdr_add failed\n"); ++ break; ++ } ++ ++ if ((ar->arNetworkType == ADHOC_NETWORK) && ++ ar->arIbssPsEnable && ar->arConnected) { ++ /* flag to check adhoc mapping once we take the lock below: */ ++ checkAdHocPsMapping = TRUE; ++ ++ } else { ++ /* get the stream mapping */ ++ if (ar->arWmmEnabled) { ++ streamID = wmi_get_stream_id(ar->arWmi, ++ wmi_implicit_create_pstream(ar->arWmi, skb, UPLINK_TRAFFIC, UNDEFINED_PRI)); ++ } else { ++ streamID = WMI_BEST_EFFORT_PRI; ++ } ++ } ++ ++ } else { ++ struct iphdr *ipHdr; ++ /* ++ * the endpoint is directly based on the TOS field in the IP ++ * header **** only for testing ****** ++ */ ++ ipHdr = A_NETBUF_DATA(skb) + sizeof(ATH_MAC_HDR); ++ /* here we map the TOS field to an endpoint number, this is for ++ * the endpointping test application */ ++ streamID = IP_TOS_TO_WMI_PRI(ipHdr->tos); ++ } ++ ++ } while (FALSE); ++ ++ /* did we succeed ? */ ++ if ((streamID == WMI_NOT_MAPPED) && !checkAdHocPsMapping) { ++ /* cleanup and exit */ ++ A_NETBUF_FREE(skb); ++ AR6000_STAT_INC(ar, tx_dropped); ++ AR6000_STAT_INC(ar, tx_aborted_errors); ++ return 0; ++ } ++ ++ cookie = NULL; ++ ++ /* take the lock to protect driver data */ ++ AR6000_SPIN_LOCK(&ar->arLock, 0); ++ ++ do { ++ ++ if (checkAdHocPsMapping) { ++ streamID = ar6000_ibss_map_epid(skb, dev, &mapNo); ++ } ++ ++ A_ASSERT(streamID != WMI_NOT_MAPPED); ++ ++ /* validate that the endpoint is connected */ ++ if (arWMIStream2EndpointID(ar,streamID) == 0) { ++ AR_DEBUG_PRINTF("Stream %d is NOT mapped!\n",streamID); ++ break; ++ } ++ /* allocate resource for this packet */ ++ cookie = ar6000_alloc_cookie(ar); ++ ++ if (cookie != NULL) { ++ /* update counts while the lock is held */ ++ ar->arTxPending[streamID]++; ++ ar->arTotalTxDataPending++; ++ } ++ ++ } while (FALSE); ++ ++ AR6000_SPIN_UNLOCK(&ar->arLock, 0); ++ ++ if (cookie != NULL) { ++ cookie->arc_bp[0] = (A_UINT32)skb; ++ cookie->arc_bp[1] = mapNo; ++ SET_HTC_PACKET_INFO_TX(&cookie->HtcPkt, ++ cookie, ++ A_NETBUF_DATA(skb), ++ A_NETBUF_LEN(skb), ++ arWMIStream2EndpointID(ar,streamID), ++ AR6K_DATA_PKT_TAG); ++ ++#ifdef DEBUG ++ if (debugdriver >= 3) { ++ ar6000_dump_skb(skb); ++ } ++#endif ++ /* HTC interface is asynchronous, if this fails, cleanup will happen in ++ * the ar6000_tx_complete callback */ ++ HTCSendPkt(ar->arHtcTarget, &cookie->HtcPkt); ++ } else { ++ /* no packet to send, cleanup */ ++ A_NETBUF_FREE(skb); ++ AR6000_STAT_INC(ar, tx_dropped); ++ AR6000_STAT_INC(ar, tx_aborted_errors); ++ } ++ ++ return 0; ++} ++ ++#ifdef ADAPTIVE_POWER_THROUGHPUT_CONTROL ++static void ++tvsub(register struct timeval *out, register struct timeval *in) ++{ ++ if((out->tv_usec -= in->tv_usec) < 0) { ++ out->tv_sec--; ++ out->tv_usec += 1000000; ++ } ++ out->tv_sec -= in->tv_sec; ++} ++ ++void ++applyAPTCHeuristics(AR_SOFTC_T *ar) ++{ ++ A_UINT32 duration; ++ A_UINT32 numbytes; ++ A_UINT32 throughput; ++ struct timeval ts; ++ A_STATUS status; ++ ++ AR6000_SPIN_LOCK(&ar->arLock, 0); ++ ++ if ((enableAPTCHeuristics) && (!aptcTR.timerScheduled)) { ++ do_gettimeofday(&ts); ++ tvsub(&ts, &aptcTR.samplingTS); ++ duration = ts.tv_sec * 1000 + ts.tv_usec / 1000; /* ms */ ++ numbytes = aptcTR.bytesTransmitted + aptcTR.bytesReceived; ++ ++ if (duration > APTC_TRAFFIC_SAMPLING_INTERVAL) { ++ /* Initialize the time stamp and byte count */ ++ aptcTR.bytesTransmitted = aptcTR.bytesReceived = 0; ++ do_gettimeofday(&aptcTR.samplingTS); ++ ++ /* Calculate and decide based on throughput thresholds */ ++ throughput = ((numbytes * 8) / duration); ++ if (throughput > APTC_UPPER_THROUGHPUT_THRESHOLD) { ++ /* Disable Sleep and schedule a timer */ ++ A_ASSERT(ar->arWmiReady == TRUE); ++ AR6000_SPIN_UNLOCK(&ar->arLock, 0); ++ status = wmi_powermode_cmd(ar->arWmi, MAX_PERF_POWER); ++ AR6000_SPIN_LOCK(&ar->arLock, 0); ++ A_TIMEOUT_MS(&aptcTimer, APTC_TRAFFIC_SAMPLING_INTERVAL, 0); ++ aptcTR.timerScheduled = TRUE; ++ } ++ } ++ } ++ ++ AR6000_SPIN_UNLOCK(&ar->arLock, 0); ++} ++#endif /* ADAPTIVE_POWER_THROUGHPUT_CONTROL */ ++ ++static void ar6000_tx_queue_full(void *Context, HTC_ENDPOINT_ID Endpoint) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)Context; ++ ++ ++ if (Endpoint == arWMIStream2EndpointID(ar,WMI_CONTROL_PRI)) { ++ if (!bypasswmi) { ++ /* under normal WMI if this is getting full, then something is running rampant ++ * the host should not be exhausting the WMI queue with too many commands ++ * the only exception to this is during testing using endpointping */ ++ ++ AR6000_SPIN_LOCK(&ar->arLock, 0); ++ /* set flag to handle subsequent messages */ ++ ar->arWMIControlEpFull = TRUE; ++ AR6000_SPIN_UNLOCK(&ar->arLock, 0); ++ AR_DEBUG_PRINTF("WMI Control Endpoint is FULL!!! \n"); ++ } ++ } else { ++ ++ AR6000_SPIN_LOCK(&ar->arLock, 0); ++ ar->arNetQueueStopped = TRUE; ++ AR6000_SPIN_UNLOCK(&ar->arLock, 0); ++ /* one of the data endpoints queues is getting full..need to stop network stack ++ * the queue will resume in ar6000_tx_complete() */ ++ netif_stop_queue(ar->arNetDev); ++ } ++ ++ ++} ++ ++ ++static void ++ar6000_tx_complete(void *Context, HTC_PACKET *pPacket) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)Context; ++ void *cookie = (void *)pPacket->pPktContext; ++ struct sk_buff *skb = NULL; ++ A_UINT32 mapNo = 0; ++ A_STATUS status; ++ struct ar_cookie * ar_cookie; ++ WMI_PRI_STREAM_ID streamID; ++ A_BOOL wakeEvent = FALSE; ++ ++ status = pPacket->Status; ++ ar_cookie = (struct ar_cookie *)cookie; ++ skb = (struct sk_buff *)ar_cookie->arc_bp[0]; ++ streamID = arEndpoint2WMIStreamID(ar,pPacket->Endpoint); ++ mapNo = ar_cookie->arc_bp[1]; ++ ++ A_ASSERT(skb); ++ A_ASSERT(pPacket->pBuffer == A_NETBUF_DATA(skb)); ++ ++ if (A_SUCCESS(status)) { ++ A_ASSERT(pPacket->ActualLength == A_NETBUF_LEN(skb)); ++ } ++ ++ AR_DEBUG2_PRINTF("ar6000_tx_complete skb=0x%x data=0x%x len=0x%x sid=%d ", ++ (A_UINT32)skb, (A_UINT32)pPacket->pBuffer, ++ pPacket->ActualLength, ++ streamID); ++ ++ /* lock the driver as we update internal state */ ++ AR6000_SPIN_LOCK(&ar->arLock, 0); ++ ++ ar->arTxPending[streamID]--; ++ ++ if ((streamID != WMI_CONTROL_PRI) || bypasswmi) { ++ ar->arTotalTxDataPending--; ++ } ++ ++ if (streamID == WMI_CONTROL_PRI) ++ { ++ if (ar->arWMIControlEpFull) { ++ /* since this packet completed, the WMI EP is no longer full */ ++ ar->arWMIControlEpFull = FALSE; ++ } ++ ++ if (ar->arTxPending[streamID] == 0) { ++ wakeEvent = TRUE; ++ } ++ } ++ ++ if (A_FAILED(status)) { ++ AR_DEBUG_PRINTF("%s() -TX ERROR, status: 0x%x\n", __func__, ++ status); ++ AR6000_STAT_INC(ar, tx_errors); ++ } else { ++ AR_DEBUG2_PRINTF("OK\n"); ++ AR6000_STAT_INC(ar, tx_packets); ++ ar->arNetStats.tx_bytes += A_NETBUF_LEN(skb); ++#ifdef ADAPTIVE_POWER_THROUGHPUT_CONTROL ++ aptcTR.bytesTransmitted += a_netbuf_to_len(skb); ++ applyAPTCHeuristics(ar); ++#endif /* ADAPTIVE_POWER_THROUGHPUT_CONTROL */ ++ } ++ ++ // TODO this needs to be looked at ++ if ((ar->arNetworkType == ADHOC_NETWORK) && ar->arIbssPsEnable ++ && (streamID != WMI_CONTROL_PRI) && mapNo) ++ { ++ mapNo --; ++ ar->arNodeMap[mapNo].txPending --; ++ ++ if (!ar->arNodeMap[mapNo].txPending && (mapNo == (ar->arNodeNum - 1))) { ++ A_UINT32 i; ++ for (i = ar->arNodeNum; i > 0; i --) { ++ if (!ar->arNodeMap[i - 1].txPending) { ++ A_MEMZERO(&ar->arNodeMap[i - 1], sizeof(struct ar_node_mapping)); ++ ar->arNodeNum --; ++ } else { ++ break; ++ } ++ } ++ } ++ } ++ ++ /* Freeing a cookie should not be contingent on either of */ ++ /* these flags, just if we have a cookie or not. */ ++ /* Can we even get here without a cookie? Fix later. */ ++ if (ar->arWmiReady == TRUE || (bypasswmi)) ++ { ++ ar6000_free_cookie(ar, cookie); ++ } ++ ++ if (ar->arNetQueueStopped) { ++ ar->arNetQueueStopped = FALSE; ++ } ++ ++ AR6000_SPIN_UNLOCK(&ar->arLock, 0); ++ ++ /* lock is released, we can freely call other kernel APIs */ ++ ++ /* this indirectly frees the HTC_PACKET */ ++ A_NETBUF_FREE(skb); ++ ++ if ((ar->arConnected == TRUE) || (bypasswmi)) { ++ if (status != A_ECANCELED) { ++ /* don't wake the queue if we are flushing, other wise it will just ++ * keep queueing packets, which will keep failing */ ++ netif_wake_queue(ar->arNetDev); ++ } ++ } ++ ++ if (wakeEvent) { ++ wake_up(&arEvent); ++ } ++ ++} ++ ++/* ++ * Receive event handler. This is called by HTC when a packet is received ++ */ ++int pktcount; ++static void ++ar6000_rx(void *Context, HTC_PACKET *pPacket) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)Context; ++ struct sk_buff *skb = (struct sk_buff *)pPacket->pPktContext; ++ int minHdrLen; ++ A_STATUS status = pPacket->Status; ++ WMI_PRI_STREAM_ID streamID = arEndpoint2WMIStreamID(ar,pPacket->Endpoint); ++ HTC_ENDPOINT_ID ept = pPacket->Endpoint; ++ ++ A_ASSERT((status != A_OK) || (pPacket->pBuffer == (A_NETBUF_DATA(skb) + HTC_HEADER_LEN))); ++ ++ AR_DEBUG2_PRINTF("ar6000_rx ar=0x%x sid=%d, skb=0x%x, data=0x%x, len=0x%x ", ++ (A_UINT32)ar, streamID, (A_UINT32)skb, (A_UINT32)pPacket->pBuffer, ++ pPacket->ActualLength); ++ if (status != A_OK) { ++ AR_DEBUG2_PRINTF("ERR\n"); ++ } else { ++ AR_DEBUG2_PRINTF("OK\n"); ++ } ++ ++ /* take lock to protect buffer counts ++ * and adaptive power throughput state */ ++ AR6000_SPIN_LOCK(&ar->arLock, 0); ++ ++ ar->arRxBuffers[streamID]--; ++ ++ if (A_SUCCESS(status)) { ++ AR6000_STAT_INC(ar, rx_packets); ++ ar->arNetStats.rx_bytes += pPacket->ActualLength; ++#ifdef ADAPTIVE_POWER_THROUGHPUT_CONTROL ++ aptcTR.bytesReceived += a_netbuf_to_len(skb); ++ applyAPTCHeuristics(ar); ++#endif /* ADAPTIVE_POWER_THROUGHPUT_CONTROL */ ++ ++ A_NETBUF_PUT(skb, pPacket->ActualLength + HTC_HEADER_LEN); ++ A_NETBUF_PULL(skb, HTC_HEADER_LEN); ++ ++#ifdef DEBUG ++ if (debugdriver >= 2) { ++ ar6000_dump_skb(skb); ++ } ++#endif /* DEBUG */ ++ } ++ ++ AR6000_SPIN_UNLOCK(&ar->arLock, 0); ++ ++ if (status != A_OK) { ++ AR6000_STAT_INC(ar, rx_errors); ++ A_NETBUF_FREE(skb); ++ } else if (ar->arWmiEnabled == TRUE) { ++ if (streamID == WMI_CONTROL_PRI) { ++ /* ++ * this is a wmi control msg ++ */ ++ wmi_control_rx(ar->arWmi, skb); ++ } else { ++ WMI_DATA_HDR *dhdr = (WMI_DATA_HDR *)A_NETBUF_DATA(skb); ++ if (WMI_DATA_HDR_IS_MSG_TYPE(dhdr, CNTL_MSGTYPE)) { ++ /* ++ * this is a wmi control msg ++ */ ++ /* strip off WMI hdr */ ++ wmi_data_hdr_remove(ar->arWmi, skb); ++ wmi_control_rx(ar->arWmi, skb); ++ } else { ++ /* ++ * this is a wmi data packet ++ */ ++ minHdrLen = sizeof (WMI_DATA_HDR) + sizeof(ATH_MAC_HDR) + ++ sizeof(ATH_LLC_SNAP_HDR); ++ ++ if ((pPacket->ActualLength < minHdrLen) || ++ (pPacket->ActualLength > AR6000_BUFFER_SIZE)) ++ { ++ /* ++ * packet is too short or too long ++ */ ++ AR_DEBUG_PRINTF("TOO SHORT or TOO LONG\n"); ++ AR6000_STAT_INC(ar, rx_errors); ++ AR6000_STAT_INC(ar, rx_length_errors); ++ A_NETBUF_FREE(skb); ++ } else { ++ if (ar->arWmmEnabled) { ++ wmi_implicit_create_pstream(ar->arWmi, skb, ++ DNLINK_TRAFFIC, UNDEFINED_PRI); ++ } ++#if 0 ++ /* Access RSSI values here */ ++ AR_DEBUG_PRINTF("RSSI %d\n", ++ ((WMI_DATA_HDR *) A_NETBUF_DATA(skb))->rssi); ++#endif ++ wmi_data_hdr_remove(ar->arWmi, skb); ++ wmi_dot3_2_dix(ar->arWmi, skb); ++ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) ++ /* ++ * extra push and memcpy, for eth_type_trans() of 2.4 kernel ++ * will pull out hard_header_len bytes of the skb. ++ */ ++ A_NETBUF_PUSH(skb, sizeof(WMI_DATA_HDR) + sizeof(ATH_LLC_SNAP_HDR) + HTC_HEADER_LEN); ++ A_MEMCPY(A_NETBUF_DATA(skb), A_NETBUF_DATA(skb) + sizeof(WMI_DATA_HDR) + ++ sizeof(ATH_LLC_SNAP_HDR) + HTC_HEADER_LEN, sizeof(ATH_MAC_HDR)); ++#endif ++ if ((ar->arNetDev->flags & IFF_UP) == IFF_UP) ++ { ++ skb->dev = ar->arNetDev; ++ skb->protocol = eth_type_trans(skb, ar->arNetDev); ++ netif_rx(skb); ++ } ++ else ++ { ++ A_NETBUF_FREE(skb); ++ } ++ } ++ } ++ } ++ } else { ++ if ((ar->arNetDev->flags & IFF_UP) == IFF_UP) ++ { ++ skb->dev = ar->arNetDev; ++ skb->protocol = eth_type_trans(skb, ar->arNetDev); ++ netif_rx(skb); ++ } ++ else ++ { ++ A_NETBUF_FREE(skb); ++ } ++ } ++ ++ if (status != A_ECANCELED) { ++ /* ++ * HTC provides A_ECANCELED status when it doesn't want to be refilled ++ * (probably due to a shutdown) ++ */ ++ ar6000_rx_refill(Context, ept); ++ } ++ ++ ++} ++ ++static void ++ar6000_rx_refill(void *Context, HTC_ENDPOINT_ID Endpoint) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)Context; ++ void *osBuf; ++ int RxBuffers; ++ int buffersToRefill; ++ HTC_PACKET *pPacket; ++ WMI_PRI_STREAM_ID streamId = arEndpoint2WMIStreamID(ar,Endpoint); ++ ++ buffersToRefill = (int)AR6000_MAX_RX_BUFFERS - ++ (int)ar->arRxBuffers[streamId]; ++ ++ if (buffersToRefill <= 0) { ++ /* fast return, nothing to fill */ ++ return; ++ } ++ ++ AR_DEBUG2_PRINTF("ar6000_rx_refill: providing htc with %d buffers at eid=%d\n", ++ buffersToRefill, Endpoint); ++ ++ for (RxBuffers = 0; RxBuffers < buffersToRefill; RxBuffers++) { ++ osBuf = A_NETBUF_ALLOC(AR6000_BUFFER_SIZE); ++ if (NULL == osBuf) { ++ break; ++ } ++ /* the HTC packet wrapper is at the head of the reserved area ++ * in the skb */ ++ pPacket = (HTC_PACKET *)(A_NETBUF_HEAD(osBuf)); ++ /* set re-fill info */ ++ SET_HTC_PACKET_INFO_RX_REFILL(pPacket,osBuf,A_NETBUF_DATA(osBuf),AR6000_BUFFER_SIZE,Endpoint); ++ /* add this packet */ ++ HTCAddReceivePkt(ar->arHtcTarget, pPacket); ++ } ++ ++ /* update count */ ++ AR6000_SPIN_LOCK(&ar->arLock, 0); ++ ar->arRxBuffers[streamId] += RxBuffers; ++ AR6000_SPIN_UNLOCK(&ar->arLock, 0); ++} ++ ++static struct net_device_stats * ++ar6000_get_stats(struct net_device *dev) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ return &ar->arNetStats; ++} ++ ++static struct iw_statistics * ++ar6000_get_iwstats(struct net_device * dev) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ TARGET_STATS *pStats = &ar->arTargetStats; ++ struct iw_statistics * pIwStats = &ar->arIwStats; ++ ++ if ((ar->arWmiReady == FALSE) ++ /* ++ * The in_atomic function is used to determine if the scheduling is ++ * allowed in the current context or not. This was introduced in 2.6 ++ * From what I have read on the differences between 2.4 and 2.6, the ++ * 2.4 kernel did not support preemption and so this check might not ++ * be required for 2.4 kernels. ++ */ ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) ++ || (in_atomic()) ++#endif ++ ) ++ { ++ pIwStats->status = 0; ++ pIwStats->qual.qual = 0; ++ pIwStats->qual.level =0; ++ pIwStats->qual.noise = 0; ++ pIwStats->discard.code =0; ++ pIwStats->discard.retries=0; ++ pIwStats->miss.beacon =0; ++ return pIwStats; ++ } ++ if (down_interruptible(&ar->arSem)) { ++ pIwStats->status = 0; ++ return pIwStats; ++ } ++ ++ ++ ar->statsUpdatePending = TRUE; ++ ++ if(wmi_get_stats_cmd(ar->arWmi) != A_OK) { ++ up(&ar->arSem); ++ pIwStats->status = 0; ++ return pIwStats; ++ } ++ ++ wait_event_interruptible_timeout(arEvent, ar->statsUpdatePending == FALSE, wmitimeout * HZ); ++ ++ if (signal_pending(current)) { ++ AR_DEBUG_PRINTF("ar6000 : WMI get stats timeout \n"); ++ up(&ar->arSem); ++ pIwStats->status = 0; ++ return pIwStats; ++ } ++ pIwStats->status = 1 ; ++ pIwStats->qual.qual = pStats->cs_aveBeacon_rssi; ++ pIwStats->qual.level =pStats->cs_aveBeacon_rssi + 161; /* noise is -95 dBm */ ++ pIwStats->qual.noise = pStats->noise_floor_calibation; ++ pIwStats->discard.code = pStats->rx_decrypt_err; ++ pIwStats->discard.retries = pStats->tx_retry_cnt; ++ pIwStats->miss.beacon = pStats->cs_bmiss_cnt; ++ up(&ar->arSem); ++ return pIwStats; ++} ++ ++void ++ar6000_ready_event(void *devt, A_UINT8 *datap, A_UINT8 phyCap) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)devt; ++ struct net_device *dev = ar->arNetDev; ++ ++ ar->arWmiReady = TRUE; ++ wake_up(&arEvent); ++ A_MEMCPY(dev->dev_addr, datap, AR6000_ETH_ADDR_LEN); ++ AR_DEBUG_PRINTF("mac address = %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x\n", ++ dev->dev_addr[0], dev->dev_addr[1], ++ dev->dev_addr[2], dev->dev_addr[3], ++ dev->dev_addr[4], dev->dev_addr[5]); ++ ++ ar->arPhyCapability = phyCap; ++} ++ ++A_UINT8 ++ar6000_iptos_to_userPriority(A_UINT8 *pkt) ++{ ++ struct iphdr *ipHdr = (struct iphdr *)pkt; ++ A_UINT8 userPriority; ++ ++ /* ++ * IP Tos format : ++ * (Refer Pg 57 WMM-test-plan-v1.2) ++ * IP-TOS - 8bits ++ * : DSCP(6-bits) ECN(2-bits) ++ * : DSCP - P2 P1 P0 X X X ++ * where (P2 P1 P0) form 802.1D ++ */ ++ userPriority = ipHdr->tos >> 5; ++ return (userPriority & 0x7); ++} ++ ++void ++ar6000_connect_event(AR_SOFTC_T *ar, A_UINT16 channel, A_UINT8 *bssid, ++ A_UINT16 listenInterval, A_UINT16 beaconInterval, ++ NETWORK_TYPE networkType, A_UINT8 beaconIeLen, ++ A_UINT8 assocReqLen, A_UINT8 assocRespLen, ++ A_UINT8 *assocInfo) ++{ ++ union iwreq_data wrqu; ++ int i, beacon_ie_pos, assoc_resp_ie_pos, assoc_req_ie_pos; ++ static const char *tag1 = "ASSOCINFO(ReqIEs="; ++ static const char *tag2 = "ASSOCRESPIE="; ++ static const char *beaconIetag = "BEACONIE="; ++ char buf[WMI_CONTROL_MSG_MAX_LEN * 2 + sizeof(tag1)]; ++ char *pos; ++ A_UINT8 key_op_ctrl; ++ ++ A_MEMCPY(ar->arBssid, bssid, sizeof(ar->arBssid)); ++ ar->arBssChannel = channel; ++ ++ A_PRINTF("AR6000 connected event on freq %d ", channel); ++ A_PRINTF("with bssid %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x " ++ " listenInterval=%d, beaconInterval = %d, beaconIeLen = %d assocReqLen=%d" ++ " assocRespLen =%d\n", ++ bssid[0], bssid[1], bssid[2], ++ bssid[3], bssid[4], bssid[5], ++ listenInterval, beaconInterval, ++ beaconIeLen, assocReqLen, assocRespLen); ++ if (networkType & ADHOC_NETWORK) { ++ if (networkType & ADHOC_CREATOR) { ++ A_PRINTF("Network: Adhoc (Creator)\n"); ++ } else { ++ A_PRINTF("Network: Adhoc (Joiner)\n"); ++ } ++ } else { ++ A_PRINTF("Network: Infrastructure\n"); ++ } ++ ++ if (beaconIeLen && (sizeof(buf) > (9 + beaconIeLen * 2))) { ++ AR_DEBUG_PRINTF("\nBeaconIEs= "); ++ ++ beacon_ie_pos = 0; ++ A_MEMZERO(buf, sizeof(buf)); ++ sprintf(buf, "%s", beaconIetag); ++ pos = buf + 9; ++ for (i = beacon_ie_pos; i < beacon_ie_pos + beaconIeLen; i++) { ++ AR_DEBUG_PRINTF("%2.2x ", assocInfo[i]); ++ sprintf(pos, "%2.2x", assocInfo[i]); ++ pos += 2; ++ } ++ AR_DEBUG_PRINTF("\n"); ++ ++ A_MEMZERO(&wrqu, sizeof(wrqu)); ++ wrqu.data.length = strlen(buf); ++ wireless_send_event(ar->arNetDev, IWEVCUSTOM, &wrqu, buf); ++ } ++ ++ if (assocRespLen && (sizeof(buf) > (12 + (assocRespLen * 2)))) ++ { ++ assoc_resp_ie_pos = beaconIeLen + assocReqLen + ++ sizeof(A_UINT16) + /* capinfo*/ ++ sizeof(A_UINT16) + /* status Code */ ++ sizeof(A_UINT16) ; /* associd */ ++ A_MEMZERO(buf, sizeof(buf)); ++ sprintf(buf, "%s", tag2); ++ pos = buf + 12; ++ AR_DEBUG_PRINTF("\nAssocRespIEs= "); ++ /* ++ * The Association Response Frame w.o. the WLAN header is delivered to ++ * the host, so skip over to the IEs ++ */ ++ for (i = assoc_resp_ie_pos; i < assoc_resp_ie_pos + assocRespLen - 6; i++) ++ { ++ AR_DEBUG_PRINTF("%2.2x ", assocInfo[i]); ++ sprintf(pos, "%2.2x", assocInfo[i]); ++ pos += 2; ++ } ++ AR_DEBUG_PRINTF("\n"); ++ ++ A_MEMZERO(&wrqu, sizeof(wrqu)); ++ wrqu.data.length = strlen(buf); ++ wireless_send_event(ar->arNetDev, IWEVCUSTOM, &wrqu, buf); ++ } ++ ++ if (assocReqLen && (sizeof(buf) > (17 + (assocReqLen * 2)))) { ++ /* ++ * assoc Request includes capability and listen interval. Skip these. ++ */ ++ assoc_req_ie_pos = beaconIeLen + ++ sizeof(A_UINT16) + /* capinfo*/ ++ sizeof(A_UINT16); /* listen interval */ ++ ++ A_MEMZERO(buf, sizeof(buf)); ++ sprintf(buf, "%s", tag1); ++ pos = buf + 17; ++ AR_DEBUG_PRINTF("AssocReqIEs= "); ++ for (i = assoc_req_ie_pos; i < assoc_req_ie_pos + assocReqLen - 4; i++) { ++ AR_DEBUG_PRINTF("%2.2x ", assocInfo[i]); ++ sprintf(pos, "%2.2x", assocInfo[i]); ++ pos += 2;; ++ } ++ AR_DEBUG_PRINTF("\n"); ++ ++ A_MEMZERO(&wrqu, sizeof(wrqu)); ++ wrqu.data.length = strlen(buf); ++ wireless_send_event(ar->arNetDev, IWEVCUSTOM, &wrqu, buf); ++ } ++ ++#ifdef USER_KEYS ++ if (ar->user_savedkeys_stat == USER_SAVEDKEYS_STAT_RUN && ++ ar->user_saved_keys.keyOk == TRUE) ++ { ++ ++ key_op_ctrl = KEY_OP_VALID_MASK & ~KEY_OP_INIT_TSC; ++ if (ar->user_key_ctrl & AR6000_USER_SETKEYS_RSC_UNCHANGED) { ++ key_op_ctrl &= ~KEY_OP_INIT_RSC; ++ } else { ++ key_op_ctrl |= KEY_OP_INIT_RSC; ++ } ++ ar6000_reinstall_keys(ar, key_op_ctrl); ++ } ++#endif /* USER_KEYS */ ++ ++ /* flush data queues */ ++ ar6000_TxDataCleanup(ar); ++ ++ netif_wake_queue(ar->arNetDev); ++ ++ if ((OPEN_AUTH == ar->arDot11AuthMode) && ++ (NONE_AUTH == ar->arAuthMode) && ++ (WEP_CRYPT == ar->arPairwiseCrypto)) ++ { ++ if (!ar->arConnected) { ++ ar6000_install_static_wep_keys(ar); ++ } ++ } ++ ++ ar->arConnected = TRUE; ++ ar->arConnectPending = FALSE; ++ ++ reconnect_flag = 0; ++ ++ A_MEMZERO(&wrqu, sizeof(wrqu)); ++ A_MEMCPY(wrqu.addr.sa_data, bssid, IEEE80211_ADDR_LEN); ++ wrqu.addr.sa_family = ARPHRD_ETHER; ++ wireless_send_event(ar->arNetDev, SIOCGIWAP, &wrqu, NULL); ++ if ((ar->arNetworkType == ADHOC_NETWORK) && ar->arIbssPsEnable) { ++ A_MEMZERO(ar->arNodeMap, sizeof(ar->arNodeMap)); ++ ar->arNodeNum = 0; ++ ar->arNexEpId = ENDPOINT_2; ++ } ++ ++} ++ ++void ar6000_set_numdataendpts(AR_SOFTC_T *ar, A_UINT32 num) ++{ ++ A_ASSERT(num <= (HTC_MAILBOX_NUM_MAX - 1)); ++ ar->arNumDataEndPts = num; ++} ++ ++void ++ar6000_disconnect_event(AR_SOFTC_T *ar, A_UINT8 reason, A_UINT8 *bssid, ++ A_UINT8 assocRespLen, A_UINT8 *assocInfo, A_UINT16 protocolReasonStatus) ++{ ++ A_UINT8 i; ++ ++ A_PRINTF("AR6000 disconnected"); ++ if (bssid[0] || bssid[1] || bssid[2] || bssid[3] || bssid[4] || bssid[5]) { ++ A_PRINTF(" from %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x ", ++ bssid[0], bssid[1], bssid[2], bssid[3], bssid[4], bssid[5]); ++ } ++ ++ AR_DEBUG_PRINTF("\nDisconnect Reason is %d", reason); ++ AR_DEBUG_PRINTF("\nProtocol Reason/Status Code is %d", protocolReasonStatus); ++ AR_DEBUG_PRINTF("\nAssocResp Frame = %s", ++ assocRespLen ? " " : "NULL"); ++ for (i = 0; i < assocRespLen; i++) { ++ if (!(i % 0x10)) { ++ AR_DEBUG_PRINTF("\n"); ++ } ++ AR_DEBUG_PRINTF("%2.2x ", assocInfo[i]); ++ } ++ AR_DEBUG_PRINTF("\n"); ++ /* ++ * If the event is due to disconnect cmd from the host, only they the target ++ * would stop trying to connect. Under any other condition, target would ++ * keep trying to connect. ++ * ++ */ ++ if( reason == DISCONNECT_CMD) ++ { ++ ar->arConnectPending = FALSE; ++ } else { ++ ar->arConnectPending = TRUE; ++ if (((reason == ASSOC_FAILED) && (protocolReasonStatus == 0x11)) || ++ ((reason == ASSOC_FAILED) && (protocolReasonStatus == 0x0) && (reconnect_flag == 1))) { ++ ar->arConnected = TRUE; ++ return; ++ } ++ } ++ ar->arConnected = FALSE; ++ ++ if( (reason != CSERV_DISCONNECT) || (reconnect_flag != 1) ) { ++ reconnect_flag = 0; ++ } ++ ++#ifdef USER_KEYS ++ if (reason != CSERV_DISCONNECT) ++ { ++ ar->user_savedkeys_stat = USER_SAVEDKEYS_STAT_INIT; ++ ar->user_key_ctrl = 0; ++ } ++#endif /* USER_KEYS */ ++ ++ netif_stop_queue(ar->arNetDev); ++ A_MEMZERO(ar->arBssid, sizeof(ar->arBssid)); ++ ar->arBssChannel = 0; ++ ar->arBeaconInterval = 0; ++ ++ ar6000_TxDataCleanup(ar); ++} ++ ++void ++ar6000_regDomain_event(AR_SOFTC_T *ar, A_UINT32 regCode) ++{ ++ A_PRINTF("AR6000 Reg Code = 0x%x\n", regCode); ++ ar->arRegCode = regCode; ++} ++ ++void ++ar6000_neighborReport_event(AR_SOFTC_T *ar, int numAps, WMI_NEIGHBOR_INFO *info) ++{ ++ static const char *tag = "PRE-AUTH"; ++ char buf[128]; ++ union iwreq_data wrqu; ++ int i; ++ ++ AR_DEBUG_PRINTF("AR6000 Neighbor Report Event\n"); ++ for (i=0; i < numAps; info++, i++) { ++ AR_DEBUG_PRINTF("bssid %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x ", ++ info->bssid[0], info->bssid[1], info->bssid[2], ++ info->bssid[3], info->bssid[4], info->bssid[5]); ++ if (info->bssFlags & WMI_PREAUTH_CAPABLE_BSS) { ++ AR_DEBUG_PRINTF("preauth-cap"); ++ } ++ if (info->bssFlags & WMI_PMKID_VALID_BSS) { ++ AR_DEBUG_PRINTF(" pmkid-valid\n"); ++ continue; /* we skip bss if the pmkid is already valid */ ++ } ++ AR_DEBUG_PRINTF("\n"); ++ snprintf(buf, sizeof(buf), "%s%2.2x%2.2x%2.2x%2.2x%2.2x%2.2x%2.2x%2.2x", ++ tag, ++ info->bssid[0], info->bssid[1], info->bssid[2], ++ info->bssid[3], info->bssid[4], info->bssid[5], ++ i, info->bssFlags); ++ A_MEMZERO(&wrqu, sizeof(wrqu)); ++ wrqu.data.length = strlen(buf); ++ wireless_send_event(ar->arNetDev, IWEVCUSTOM, &wrqu, buf); ++ } ++} ++ ++void ++ar6000_tkip_micerr_event(AR_SOFTC_T *ar, A_UINT8 keyid, A_BOOL ismcast) ++{ ++ static const char *tag = "MLME-MICHAELMICFAILURE.indication"; ++ char buf[128]; ++ union iwreq_data wrqu; ++ ++ A_PRINTF("AR6000 TKIP MIC error received for keyid %d %scast\n", ++ keyid, ismcast ? "multi": "uni"); ++ snprintf(buf, sizeof(buf), "%s(keyid=%d %scat)", tag, keyid, ++ ismcast ? "multi" : "uni"); ++ memset(&wrqu, 0, sizeof(wrqu)); ++ wrqu.data.length = strlen(buf); ++ wireless_send_event(ar->arNetDev, IWEVCUSTOM, &wrqu, buf); ++} ++ ++void ++ar6000_scanComplete_event(AR_SOFTC_T *ar, A_STATUS status) ++{ ++ AR_DEBUG_PRINTF("AR6000 scan complete: %d\n", status); ++ ++ ar->scan_complete = 1; ++ wake_up_interruptible(&ar6000_scan_queue); ++} ++ ++void ++ar6000_targetStats_event(AR_SOFTC_T *ar, WMI_TARGET_STATS *pTarget) ++{ ++ TARGET_STATS *pStats = &ar->arTargetStats; ++ A_UINT8 ac; ++ ++ A_PRINTF("AR6000 updating target stats\n"); ++ pStats->tx_packets += pTarget->txrxStats.tx_stats.tx_packets; ++ pStats->tx_bytes += pTarget->txrxStats.tx_stats.tx_bytes; ++ pStats->tx_unicast_pkts += pTarget->txrxStats.tx_stats.tx_unicast_pkts; ++ pStats->tx_unicast_bytes += pTarget->txrxStats.tx_stats.tx_unicast_bytes; ++ pStats->tx_multicast_pkts += pTarget->txrxStats.tx_stats.tx_multicast_pkts; ++ pStats->tx_multicast_bytes += pTarget->txrxStats.tx_stats.tx_multicast_bytes; ++ pStats->tx_broadcast_pkts += pTarget->txrxStats.tx_stats.tx_broadcast_pkts; ++ pStats->tx_broadcast_bytes += pTarget->txrxStats.tx_stats.tx_broadcast_bytes; ++ pStats->tx_rts_success_cnt += pTarget->txrxStats.tx_stats.tx_rts_success_cnt; ++ for(ac = 0; ac < WMM_NUM_AC; ac++) ++ pStats->tx_packet_per_ac[ac] += pTarget->txrxStats.tx_stats.tx_packet_per_ac[ac]; ++ pStats->tx_errors += pTarget->txrxStats.tx_stats.tx_errors; ++ pStats->tx_failed_cnt += pTarget->txrxStats.tx_stats.tx_failed_cnt; ++ pStats->tx_retry_cnt += pTarget->txrxStats.tx_stats.tx_retry_cnt; ++ pStats->tx_rts_fail_cnt += pTarget->txrxStats.tx_stats.tx_rts_fail_cnt; ++ pStats->tx_unicast_rate = wmi_get_rate(pTarget->txrxStats.tx_stats.tx_unicast_rate); ++ ++ pStats->rx_packets += pTarget->txrxStats.rx_stats.rx_packets; ++ pStats->rx_bytes += pTarget->txrxStats.rx_stats.rx_bytes; ++ pStats->rx_unicast_pkts += pTarget->txrxStats.rx_stats.rx_unicast_pkts; ++ pStats->rx_unicast_bytes += pTarget->txrxStats.rx_stats.rx_unicast_bytes; ++ pStats->rx_multicast_pkts += pTarget->txrxStats.rx_stats.rx_multicast_pkts; ++ pStats->rx_multicast_bytes += pTarget->txrxStats.rx_stats.rx_multicast_bytes; ++ pStats->rx_broadcast_pkts += pTarget->txrxStats.rx_stats.rx_broadcast_pkts; ++ pStats->rx_broadcast_bytes += pTarget->txrxStats.rx_stats.rx_broadcast_bytes; ++ pStats->rx_fragment_pkt += pTarget->txrxStats.rx_stats.rx_fragment_pkt; ++ pStats->rx_errors += pTarget->txrxStats.rx_stats.rx_errors; ++ pStats->rx_crcerr += pTarget->txrxStats.rx_stats.rx_crcerr; ++ pStats->rx_key_cache_miss += pTarget->txrxStats.rx_stats.rx_key_cache_miss; ++ pStats->rx_decrypt_err += pTarget->txrxStats.rx_stats.rx_decrypt_err; ++ pStats->rx_duplicate_frames += pTarget->txrxStats.rx_stats.rx_duplicate_frames; ++ pStats->rx_unicast_rate = wmi_get_rate(pTarget->txrxStats.rx_stats.rx_unicast_rate); ++ ++ ++ pStats->tkip_local_mic_failure ++ += pTarget->txrxStats.tkipCcmpStats.tkip_local_mic_failure; ++ pStats->tkip_counter_measures_invoked ++ += pTarget->txrxStats.tkipCcmpStats.tkip_counter_measures_invoked; ++ pStats->tkip_replays += pTarget->txrxStats.tkipCcmpStats.tkip_replays; ++ pStats->tkip_format_errors += pTarget->txrxStats.tkipCcmpStats.tkip_format_errors; ++ pStats->ccmp_format_errors += pTarget->txrxStats.tkipCcmpStats.ccmp_format_errors; ++ pStats->ccmp_replays += pTarget->txrxStats.tkipCcmpStats.ccmp_replays; ++ ++ ++ pStats->power_save_failure_cnt += pTarget->pmStats.power_save_failure_cnt; ++ pStats->noise_floor_calibation = pTarget->noise_floor_calibation; ++ ++ pStats->cs_bmiss_cnt += pTarget->cservStats.cs_bmiss_cnt; ++ pStats->cs_lowRssi_cnt += pTarget->cservStats.cs_lowRssi_cnt; ++ pStats->cs_connect_cnt += pTarget->cservStats.cs_connect_cnt; ++ pStats->cs_disconnect_cnt += pTarget->cservStats.cs_disconnect_cnt; ++ pStats->cs_aveBeacon_snr = pTarget->cservStats.cs_aveBeacon_snr; ++ pStats->cs_aveBeacon_rssi = pTarget->cservStats.cs_aveBeacon_rssi; ++ pStats->cs_lastRoam_msec = pTarget->cservStats.cs_lastRoam_msec; ++ pStats->cs_snr = pTarget->cservStats.cs_snr; ++ pStats->cs_rssi = pTarget->cservStats.cs_rssi; ++ ++ pStats->lq_val = pTarget->lqVal; ++ ++ pStats->wow_num_pkts_dropped += pTarget->wowStats.wow_num_pkts_dropped; ++ pStats->wow_num_host_pkt_wakeups += pTarget->wowStats.wow_num_host_pkt_wakeups; ++ pStats->wow_num_host_event_wakeups += pTarget->wowStats.wow_num_host_event_wakeups; ++ pStats->wow_num_events_discarded += pTarget->wowStats.wow_num_events_discarded; ++ ++ ar->statsUpdatePending = FALSE; ++ wake_up(&arEvent); ++} ++ ++void ++ar6000_rssiThreshold_event(AR_SOFTC_T *ar, WMI_RSSI_THRESHOLD_VAL newThreshold, A_INT16 rssi) ++{ ++ USER_RSSI_THOLD userRssiThold; ++ ++ userRssiThold.tag = rssi_map[newThreshold].tag; ++ userRssiThold.rssi = rssi; ++ AR_DEBUG2_PRINTF("rssi Threshold range = %d tag = %d rssi = %d\n", newThreshold, userRssiThold.tag, rssi); ++ ar6000_send_event_to_app(ar, WMI_RSSI_THRESHOLD_EVENTID,(A_UINT8 *)&userRssiThold, sizeof(USER_RSSI_THOLD)); ++} ++ ++ ++void ++ar6000_hbChallengeResp_event(AR_SOFTC_T *ar, A_UINT32 cookie, A_UINT32 source) ++{ ++ if (source == APP_HB_CHALLENGE) { ++ /* Report it to the app in case it wants a positive acknowledgement */ ++ ar6000_send_event_to_app(ar, WMIX_HB_CHALLENGE_RESP_EVENTID, ++ (A_UINT8 *)&cookie, sizeof(cookie)); ++ } else { ++ /* This would ignore the replys that come in after their due time */ ++ if (cookie == ar->arHBChallengeResp.seqNum) { ++ ar->arHBChallengeResp.outstanding = FALSE; ++ } ++ } ++} ++ ++ ++void ++ar6000_reportError_event(AR_SOFTC_T *ar, WMI_TARGET_ERROR_VAL errorVal) ++{ ++ char *errString[] = { ++ [WMI_TARGET_PM_ERR_FAIL] "WMI_TARGET_PM_ERR_FAIL", ++ [WMI_TARGET_KEY_NOT_FOUND] "WMI_TARGET_KEY_NOT_FOUND", ++ [WMI_TARGET_DECRYPTION_ERR] "WMI_TARGET_DECRYPTION_ERR", ++ [WMI_TARGET_BMISS] "WMI_TARGET_BMISS", ++ [WMI_PSDISABLE_NODE_JOIN] "WMI_PSDISABLE_NODE_JOIN" ++ }; ++ ++ A_PRINTF("AR6000 Error on Target. Error = 0x%x\n", errorVal); ++ ++ /* One error is reported at a time, and errorval is a bitmask */ ++ if(errorVal & (errorVal - 1)) ++ return; ++ ++ A_PRINTF("AR6000 Error type = "); ++ switch(errorVal) ++ { ++ case WMI_TARGET_PM_ERR_FAIL: ++ case WMI_TARGET_KEY_NOT_FOUND: ++ case WMI_TARGET_DECRYPTION_ERR: ++ case WMI_TARGET_BMISS: ++ case WMI_PSDISABLE_NODE_JOIN: ++ A_PRINTF("%s\n", errString[errorVal]); ++ break; ++ default: ++ A_PRINTF("INVALID\n"); ++ break; ++ } ++ ++} ++ ++ ++void ++ar6000_cac_event(AR_SOFTC_T *ar, A_UINT8 ac, A_UINT8 cacIndication, ++ A_UINT8 statusCode, A_UINT8 *tspecSuggestion) ++{ ++ WMM_TSPEC_IE *tspecIe; ++ ++ /* ++ * This is the TSPEC IE suggestion from AP. ++ * Suggestion provided by AP under some error ++ * cases, could be helpful for the host app. ++ * Check documentation. ++ */ ++ tspecIe = (WMM_TSPEC_IE *)tspecSuggestion; ++ ++ /* ++ * What do we do, if we get TSPEC rejection? One thought ++ * that comes to mind is implictly delete the pstream... ++ */ ++ A_PRINTF("AR6000 CAC notification. " ++ "AC = %d, cacIndication = 0x%x, statusCode = 0x%x\n", ++ ac, cacIndication, statusCode); ++} ++ ++#define AR6000_PRINT_BSSID(_pBss) do { \ ++ A_PRINTF("%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x ",\ ++ (_pBss)[0],(_pBss)[1],(_pBss)[2],(_pBss)[3],\ ++ (_pBss)[4],(_pBss)[5]); \ ++} while(0) ++ ++void ++ar6000_roam_tbl_event(AR_SOFTC_T *ar, WMI_TARGET_ROAM_TBL *pTbl) ++{ ++ A_UINT8 i; ++ ++ A_PRINTF("ROAM TABLE NO OF ENTRIES is %d ROAM MODE is %d\n", ++ pTbl->numEntries, pTbl->roamMode); ++ for (i= 0; i < pTbl->numEntries; i++) { ++ A_PRINTF("[%d]bssid %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x ", i, ++ pTbl->bssRoamInfo[i].bssid[0], pTbl->bssRoamInfo[i].bssid[1], ++ pTbl->bssRoamInfo[i].bssid[2], ++ pTbl->bssRoamInfo[i].bssid[3], ++ pTbl->bssRoamInfo[i].bssid[4], ++ pTbl->bssRoamInfo[i].bssid[5]); ++ A_PRINTF("RSSI %d RSSIDT %d LAST RSSI %d UTIL %d ROAM_UTIL %d" ++ " BIAS %d\n", ++ pTbl->bssRoamInfo[i].rssi, ++ pTbl->bssRoamInfo[i].rssidt, ++ pTbl->bssRoamInfo[i].last_rssi, ++ pTbl->bssRoamInfo[i].util, ++ pTbl->bssRoamInfo[i].roam_util, ++ pTbl->bssRoamInfo[i].bias); ++ } ++} ++ ++void ++ar6000_wow_list_event(struct ar6_softc *ar, A_UINT8 num_filters, WMI_GET_WOW_LIST_REPLY *wow_reply) ++{ ++ A_UINT8 i,j; ++ ++ /*Each event now contains exactly one filter, see bug 26613*/ ++ A_PRINTF("WOW pattern %d of %d patterns\n", wow_reply->this_filter_num, wow_reply->num_filters); ++ A_PRINTF("wow mode = %s host mode = %s\n", ++ (wow_reply->wow_mode == 0? "disabled":"enabled"), ++ (wow_reply->host_mode == 1 ? "awake":"asleep")); ++ ++ ++ /*If there are no patterns, the reply will only contain generic ++ WoW information. Pattern information will exist only if there are ++ patterns present. Bug 26716*/ ++ ++ /* If this event contains pattern information, display it*/ ++ if (wow_reply->this_filter_num) { ++ i=0; ++ A_PRINTF("id=%d size=%d offset=%d\n", ++ wow_reply->wow_filters[i].wow_filter_id, ++ wow_reply->wow_filters[i].wow_filter_size, ++ wow_reply->wow_filters[i].wow_filter_offset); ++ A_PRINTF("wow pattern = "); ++ for (j=0; j< wow_reply->wow_filters[i].wow_filter_size; j++) { ++ A_PRINTF("%2.2x",wow_reply->wow_filters[i].wow_filter_pattern[j]); ++ } ++ ++ A_PRINTF("\nwow mask = "); ++ for (j=0; j< wow_reply->wow_filters[i].wow_filter_size; j++) { ++ A_PRINTF("%2.2x",wow_reply->wow_filters[i].wow_filter_mask[j]); ++ } ++ A_PRINTF("\n"); ++ } ++} ++ ++/* ++ * Report the Roaming related data collected on the target ++ */ ++void ++ar6000_display_roam_time(WMI_TARGET_ROAM_TIME *p) ++{ ++ A_PRINTF("Disconnect Data : BSSID: "); ++ AR6000_PRINT_BSSID(p->disassoc_bssid); ++ A_PRINTF(" RSSI %d DISASSOC Time %d NO_TXRX_TIME %d\n", ++ p->disassoc_bss_rssi,p->disassoc_time, ++ p->no_txrx_time); ++ A_PRINTF("Connect Data: BSSID: "); ++ AR6000_PRINT_BSSID(p->assoc_bssid); ++ A_PRINTF(" RSSI %d ASSOC Time %d TXRX_TIME %d\n", ++ p->assoc_bss_rssi,p->assoc_time, ++ p->allow_txrx_time); ++ A_PRINTF("Last Data Tx Time (b4 Disassoc) %d "\ ++ "First Data Tx Time (after Assoc) %d\n", ++ p->last_data_txrx_time, p->first_data_txrx_time); ++} ++ ++void ++ar6000_roam_data_event(AR_SOFTC_T *ar, WMI_TARGET_ROAM_DATA *p) ++{ ++ switch (p->roamDataType) { ++ case ROAM_DATA_TIME: ++ ar6000_display_roam_time(&p->u.roamTime); ++ break; ++ default: ++ break; ++ } ++} ++ ++void ++ar6000_bssInfo_event_rx(AR_SOFTC_T *ar, A_UINT8 *datap, int len) ++{ ++ struct sk_buff *skb; ++ WMI_BSS_INFO_HDR *bih = (WMI_BSS_INFO_HDR *)datap; ++ ++ ++ if (!ar->arMgmtFilter) { ++ return; ++ } ++ if (((ar->arMgmtFilter & IEEE80211_FILTER_TYPE_BEACON) && ++ (bih->frameType != BEACON_FTYPE)) || ++ ((ar->arMgmtFilter & IEEE80211_FILTER_TYPE_PROBE_RESP) && ++ (bih->frameType != PROBERESP_FTYPE))) ++ { ++ return; ++ } ++ ++ if ((skb = A_NETBUF_ALLOC_RAW(len)) != NULL) { ++ ++ A_NETBUF_PUT(skb, len); ++ A_MEMCPY(A_NETBUF_DATA(skb), datap, len); ++ skb->dev = ar->arNetDev; ++ printk("MAC RAW...\n"); ++// skb->mac.raw = A_NETBUF_DATA(skb); ++ skb->ip_summed = CHECKSUM_NONE; ++ skb->pkt_type = PACKET_OTHERHOST; ++ skb->protocol = __constant_htons(0x0019); ++ netif_rx(skb); ++ } ++} ++ ++A_UINT32 wmiSendCmdNum; ++ ++A_STATUS ++ar6000_control_tx(void *devt, void *osbuf, WMI_PRI_STREAM_ID streamID) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)devt; ++ A_STATUS status = A_OK; ++ struct ar_cookie *cookie = NULL; ++ int i; ++ ++ /* take lock to protect ar6000_alloc_cookie() */ ++ AR6000_SPIN_LOCK(&ar->arLock, 0); ++ ++ do { ++ ++ AR_DEBUG2_PRINTF("ar_contrstatus = ol_tx: skb=0x%x, len=0x%x, sid=%d\n", ++ (A_UINT32)osbuf, A_NETBUF_LEN(osbuf), streamID); ++ ++ if ((streamID == WMI_CONTROL_PRI) && (ar->arWMIControlEpFull)) { ++ /* control endpoint is full, don't allocate resources, we ++ * are just going to drop this packet */ ++ cookie = NULL; ++ AR_DEBUG_PRINTF(" WMI Control EP full, dropping packet : 0x%X, len:%d \n", ++ (A_UINT32)osbuf, A_NETBUF_LEN(osbuf)); ++ } else { ++ cookie = ar6000_alloc_cookie(ar); ++ } ++ ++ if (cookie == NULL) { ++ status = A_NO_MEMORY; ++ break; ++ } ++ ++ if(logWmiRawMsgs) { ++ A_PRINTF("WMI cmd send, msgNo %d :", wmiSendCmdNum); ++ for(i = 0; i < a_netbuf_to_len(osbuf); i++) ++ A_PRINTF("%x ", ((A_UINT8 *)a_netbuf_to_data(osbuf))[i]); ++ A_PRINTF("\n"); ++ } ++ ++ wmiSendCmdNum++; ++ ++ } while (FALSE); ++ ++ if (cookie != NULL) { ++ /* got a structure to send it out on */ ++ ar->arTxPending[streamID]++; ++ ++ if (streamID != WMI_CONTROL_PRI) { ++ ar->arTotalTxDataPending++; ++ } ++ } ++ ++ AR6000_SPIN_UNLOCK(&ar->arLock, 0); ++ ++ if (cookie != NULL) { ++ cookie->arc_bp[0] = (A_UINT32)osbuf; ++ cookie->arc_bp[1] = 0; ++ SET_HTC_PACKET_INFO_TX(&cookie->HtcPkt, ++ cookie, ++ A_NETBUF_DATA(osbuf), ++ A_NETBUF_LEN(osbuf), ++ arWMIStream2EndpointID(ar,streamID), ++ AR6K_CONTROL_PKT_TAG); ++ /* this interface is asynchronous, if there is an error, cleanup will happen in the ++ * TX completion callback */ ++ HTCSendPkt(ar->arHtcTarget, &cookie->HtcPkt); ++ status = A_OK; ++ } ++ ++ return status; ++} ++ ++/* indicate tx activity or inactivity on a WMI stream */ ++void ar6000_indicate_tx_activity(void *devt, A_UINT8 TrafficClass, A_BOOL Active) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)devt; ++ WMI_PRI_STREAM_ID streamid; ++ ++ if (ar->arWmiEnabled) { ++ streamid = wmi_get_stream_id(ar->arWmi, TrafficClass); ++ } else { ++ /* for mbox ping testing, the traffic class is mapped directly as a stream ID, ++ * see handling of AR6000_XIOCTL_TRAFFIC_ACTIVITY_CHANGE in ioctl.c */ ++ streamid = (WMI_PRI_STREAM_ID)TrafficClass; ++ } ++ ++ /* notify HTC, this may cause credit distribution changes */ ++ ++ HTCIndicateActivityChange(ar->arHtcTarget, ++ arWMIStream2EndpointID(ar,streamid), ++ Active); ++ ++} ++ ++module_init(ar6000_init_module); ++module_exit(ar6000_cleanup_module); ++ ++/* Init cookie queue */ ++static void ++ar6000_cookie_init(AR_SOFTC_T *ar) ++{ ++ A_UINT32 i; ++ ++ ar->arCookieList = NULL; ++ A_MEMZERO(s_ar_cookie_mem, sizeof(s_ar_cookie_mem)); ++ ++ for (i = 0; i < MAX_COOKIE_NUM; i++) { ++ ar6000_free_cookie(ar, &s_ar_cookie_mem[i]); ++ } ++} ++ ++/* cleanup cookie queue */ ++static void ++ar6000_cookie_cleanup(AR_SOFTC_T *ar) ++{ ++ /* It is gone .... */ ++ ar->arCookieList = NULL; ++} ++ ++/* Init cookie queue */ ++static void ++ar6000_free_cookie(AR_SOFTC_T *ar, struct ar_cookie * cookie) ++{ ++ /* Insert first */ ++ A_ASSERT(ar != NULL); ++ A_ASSERT(cookie != NULL); ++ cookie->arc_list_next = ar->arCookieList; ++ ar->arCookieList = cookie; ++} ++ ++/* cleanup cookie queue */ ++static struct ar_cookie * ++ar6000_alloc_cookie(AR_SOFTC_T *ar) ++{ ++ struct ar_cookie *cookie; ++ ++ cookie = ar->arCookieList; ++ if(cookie != NULL) ++ { ++ ar->arCookieList = cookie->arc_list_next; ++ } ++ ++ return cookie; ++} ++ ++#ifdef SEND_EVENT_TO_APP ++/* ++ * This function is used to send event which come from taget to ++ * the application. The buf which send to application is include ++ * the event ID and event content. ++ */ ++#define EVENT_ID_LEN 2 ++void ar6000_send_event_to_app(AR_SOFTC_T *ar, A_UINT16 eventId, ++ A_UINT8 *datap, int len) ++{ ++ ++#if (WIRELESS_EXT >= 15) ++ ++/* note: IWEVCUSTOM only exists in wireless extensions after version 15 */ ++ ++ char *buf; ++ A_UINT16 size; ++ union iwreq_data wrqu; ++ ++ size = len + EVENT_ID_LEN; ++ ++ if (size > IW_CUSTOM_MAX) { ++ AR_DEBUG_PRINTF("WMI event ID : 0x%4.4X, len = %d too big for IWEVCUSTOM (max=%d) \n", ++ eventId, size, IW_CUSTOM_MAX); ++ return; ++ } ++ ++ buf = A_MALLOC_NOWAIT(size); ++ A_MEMZERO(buf, size); ++ A_MEMCPY(buf, &eventId, EVENT_ID_LEN); ++ A_MEMCPY(buf+EVENT_ID_LEN, datap, len); ++ ++ //AR_DEBUG_PRINTF("event ID = %d,len = %d\n",*(A_UINT16*)buf, size); ++ A_MEMZERO(&wrqu, sizeof(wrqu)); ++ wrqu.data.length = size; ++ wireless_send_event(ar->arNetDev, IWEVCUSTOM, &wrqu, buf); ++ ++ A_FREE(buf); ++#endif ++ ++ ++} ++#endif ++ ++ ++void ++ar6000_tx_retry_err_event(void *devt) ++{ ++ AR_DEBUG2_PRINTF("Tx retries reach maximum!\n"); ++} ++ ++void ++ar6000_snrThresholdEvent_rx(void *devt, WMI_SNR_THRESHOLD_VAL newThreshold, A_UINT8 snr) ++{ ++ AR_DEBUG2_PRINTF("snr threshold range %d, snr %d\n", newThreshold, snr); ++} ++ ++void ++ar6000_lqThresholdEvent_rx(void *devt, WMI_LQ_THRESHOLD_VAL newThreshold, A_UINT8 lq) ++{ ++ AR_DEBUG2_PRINTF("lq threshold range %d, lq %d\n", newThreshold, lq); ++} ++ ++ ++ ++A_UINT32 ++a_copy_to_user(void *to, const void *from, A_UINT32 n) ++{ ++ return(copy_to_user(to, from, n)); ++} ++ ++A_UINT32 ++a_copy_from_user(void *to, const void *from, A_UINT32 n) ++{ ++ return(copy_from_user(to, from, n)); ++} ++ ++ ++A_STATUS ++ar6000_get_driver_cfg(struct net_device *dev, ++ A_UINT16 cfgParam, ++ void *result) ++{ ++ ++ A_STATUS ret = 0; ++ ++ switch(cfgParam) ++ { ++ case AR6000_DRIVER_CFG_GET_WLANNODECACHING: ++ *((A_UINT32 *)result) = wlanNodeCaching; ++ break; ++ case AR6000_DRIVER_CFG_LOG_RAW_WMI_MSGS: ++ *((A_UINT32 *)result) = logWmiRawMsgs; ++ break; ++ default: ++ ret = EINVAL; ++ break; ++ } ++ ++ return ret; ++} ++ ++void ++ar6000_keepalive_rx(void *devt, A_UINT8 configured) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)devt; ++ ++ ar->arKeepaliveConfigured = configured; ++ wake_up(&arEvent); ++} ++ ++void ++ar6000_pmkid_list_event(void *devt, A_UINT8 numPMKID, WMI_PMKID *pmkidList) ++{ ++ A_UINT8 i, j; ++ ++ A_PRINTF("Number of Cached PMKIDs is %d\n", numPMKID); ++ ++ for (i = 0; i < numPMKID; i++) { ++ A_PRINTF("\nPMKID %d ", i); ++ for (j = 0; j < WMI_PMKID_LEN; j++) { ++ A_PRINTF("%2.2x", pmkidList->pmkid[j]); ++ } ++ pmkidList++; ++ } ++} ++ ++#ifdef USER_KEYS ++static A_STATUS ++ ++ar6000_reinstall_keys(AR_SOFTC_T *ar, A_UINT8 key_op_ctrl) ++{ ++ A_STATUS status = A_OK; ++ struct ieee80211req_key *uik = &ar->user_saved_keys.ucast_ik; ++ struct ieee80211req_key *bik = &ar->user_saved_keys.bcast_ik; ++ CRYPTO_TYPE keyType = ar->user_saved_keys.keyType; ++ ++ if (IEEE80211_CIPHER_CCKM_KRK != uik->ik_type) { ++ if (NONE_CRYPT == keyType) { ++ goto _reinstall_keys_out; ++ } ++ ++ if (uik->ik_keylen) { ++ status = wmi_addKey_cmd(ar->arWmi, uik->ik_keyix, ++ ar->user_saved_keys.keyType, PAIRWISE_USAGE, ++ uik->ik_keylen, (A_UINT8 *)&uik->ik_keyrsc, ++ uik->ik_keydata, key_op_ctrl, SYNC_BEFORE_WMIFLAG); ++ } ++ ++ } else { ++ status = wmi_add_krk_cmd(ar->arWmi, uik->ik_keydata); ++ } ++ ++ if (IEEE80211_CIPHER_CCKM_KRK != bik->ik_type) { ++ if (NONE_CRYPT == keyType) { ++ goto _reinstall_keys_out; ++ } ++ ++ if (bik->ik_keylen) { ++ status = wmi_addKey_cmd(ar->arWmi, bik->ik_keyix, ++ ar->user_saved_keys.keyType, GROUP_USAGE, ++ bik->ik_keylen, (A_UINT8 *)&bik->ik_keyrsc, ++ bik->ik_keydata, key_op_ctrl, NO_SYNC_WMIFLAG); ++ } ++ } else { ++ status = wmi_add_krk_cmd(ar->arWmi, bik->ik_keydata); ++ } ++ ++_reinstall_keys_out: ++ ar->user_savedkeys_stat = USER_SAVEDKEYS_STAT_INIT; ++ ar->user_key_ctrl = 0; ++ ++ return status; ++} ++#endif /* USER_KEYS */ ++ ++ ++void ++ar6000_dset_open_req( ++ void *context, ++ A_UINT32 id, ++ A_UINT32 targHandle, ++ A_UINT32 targReplyFn, ++ A_UINT32 targReplyArg) ++{ ++} ++ ++void ++ar6000_dset_close( ++ void *context, ++ A_UINT32 access_cookie) ++{ ++ return; ++} ++ ++void ++ar6000_dset_data_req( ++ void *context, ++ A_UINT32 accessCookie, ++ A_UINT32 offset, ++ A_UINT32 length, ++ A_UINT32 targBuf, ++ A_UINT32 targReplyFn, ++ A_UINT32 targReplyArg) ++{ ++} +diff --git a/drivers/sdio/function/wlan/ar6000/ar6000/ar6000_drv.h b/drivers/sdio/function/wlan/ar6000/ar6000/ar6000_drv.h +new file mode 100644 +index 0000000..c7b6ec4 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/ar6000/ar6000_drv.h +@@ -0,0 +1,360 @@ ++/* ++ * ++ * Copyright (c) 2004-2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++#ifndef _AR6000_H_ ++#define _AR6000_H_ ++ ++#include ++ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include "a_types.h" ++#include "a_osapi.h" ++#include "htc_api.h" ++#include "wmi.h" ++#include "a_drv.h" ++#include "bmi.h" ++#include ++#include ++#include ++#include ++#include "gpio_api.h" ++#include "gpio.h" ++#include ++#include ++#include ++#include ++#include "AR6Khwreg.h" ++#include "ar6000_api.h" ++#ifdef CONFIG_HOST_TCMD_SUPPORT ++#include ++#endif ++ ++#include "targaddrs.h" ++#include "dbglog_api.h" ++#include "ar6000_diag.h" ++#include "common_drv.h" ++ ++#ifndef __dev_put ++#define __dev_put(dev) dev_put(dev) ++#endif ++ ++#ifdef USER_KEYS ++ ++#define USER_SAVEDKEYS_STAT_INIT 0 ++#define USER_SAVEDKEYS_STAT_RUN 1 ++ ++// TODO this needs to move into the AR_SOFTC struct ++struct USER_SAVEDKEYS { ++ struct ieee80211req_key ucast_ik; ++ struct ieee80211req_key bcast_ik; ++ CRYPTO_TYPE keyType; ++ A_BOOL keyOk; ++}; ++#endif ++ ++#define DBG_INFO 0x00000001 ++#define DBG_ERROR 0x00000002 ++#define DBG_WARNING 0x00000004 ++#define DBG_SDIO 0x00000008 ++#define DBG_HIF 0x00000010 ++#define DBG_HTC 0x00000020 ++#define DBG_WMI 0x00000040 ++#define DBG_WMI2 0x00000080 ++#define DBG_DRIVER 0x00000100 ++ ++#define DBG_DEFAULTS (DBG_ERROR|DBG_WARNING) ++ ++ ++#ifdef DEBUG ++#define AR_DEBUG_PRINTF(args...) if (debugdriver) A_PRINTF(args); ++#define AR_DEBUG2_PRINTF(args...) if (debugdriver >= 2) A_PRINTF(args); ++extern int debugdriver; ++#else ++#define AR_DEBUG_PRINTF(args...) ++#define AR_DEBUG2_PRINTF(args...) ++#endif ++ ++A_STATUS ar6000_ReadRegDiag(HIF_DEVICE *hifDevice, A_UINT32 *address, A_UINT32 *data); ++A_STATUS ar6000_WriteRegDiag(HIF_DEVICE *hifDevice, A_UINT32 *address, A_UINT32 *data); ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++#define MAX_AR6000 1 ++#define AR6000_MAX_RX_BUFFERS 16 ++#define AR6000_BUFFER_SIZE 1664 ++#define AR6000_TX_TIMEOUT 10 ++#define AR6000_ETH_ADDR_LEN 6 ++#define AR6000_MAX_ENDPOINTS 4 ++#define MAX_NODE_NUM 15 ++#define MAX_COOKIE_NUM 150 ++#define AR6000_HB_CHALLENGE_RESP_FREQ_DEFAULT 1 ++#define AR6000_HB_CHALLENGE_RESP_MISS_THRES_DEFAULT 1 ++ ++enum { ++ DRV_HB_CHALLENGE = 0, ++ APP_HB_CHALLENGE ++}; ++ ++/* HTC RAW streams */ ++typedef enum _HTC_RAW_STREAM_ID { ++ HTC_RAW_STREAM_NOT_MAPPED = -1, ++ HTC_RAW_STREAM_0 = 0, ++ HTC_RAW_STREAM_1 = 1, ++ HTC_RAW_STREAM_2 = 2, ++ HTC_RAW_STREAM_3 = 3, ++ HTC_RAW_STREAM_NUM_MAX ++} HTC_RAW_STREAM_ID; ++ ++#define RAW_HTC_READ_BUFFERS_NUM 4 ++#define RAW_HTC_WRITE_BUFFERS_NUM 4 ++ ++typedef struct { ++ int currPtr; ++ int length; ++ unsigned char data[AR6000_BUFFER_SIZE]; ++ HTC_PACKET HTCPacket; ++} raw_htc_buffer; ++ ++#ifdef CONFIG_HOST_TCMD_SUPPORT ++/* ++ * add TCMD_MODE besides wmi and bypasswmi ++ * in TCMD_MODE, only few TCMD releated wmi commands ++ * counld be hanlder ++ */ ++enum { ++ AR6000_WMI_MODE = 0, ++ AR6000_BYPASS_MODE, ++ AR6000_TCMD_MODE, ++ AR6000_WLAN_MODE ++}; ++#endif /* CONFIG_HOST_TCMD_SUPPORT */ ++ ++struct ar_wep_key { ++ A_UINT8 arKeyIndex; ++ A_UINT8 arKeyLen; ++ A_UINT8 arKey[64]; ++} ; ++ ++struct ar_node_mapping { ++ A_UINT8 macAddress[6]; ++ A_UINT8 epId; ++ A_UINT8 txPending; ++}; ++ ++struct ar_cookie { ++ A_UINT32 arc_bp[2]; /* Must be first field */ ++ HTC_PACKET HtcPkt; /* HTC packet wrapper */ ++ struct ar_cookie *arc_list_next; ++}; ++ ++struct ar_hb_chlng_resp { ++ A_TIMER timer; ++ A_UINT32 frequency; ++ A_UINT32 seqNum; ++ A_BOOL outstanding; ++ A_UINT8 missCnt; ++ A_UINT8 missThres; ++}; ++ ++typedef struct ar6_softc { ++ struct net_device *arNetDev; /* net_device pointer */ ++ void *arWmi; ++ int arTxPending[WMI_PRI_MAX_COUNT]; ++ int arTotalTxDataPending; ++ A_UINT8 arNumDataEndPts; ++ A_BOOL arWmiEnabled; ++ A_BOOL arWmiReady; ++ A_BOOL arConnected; ++ HTC_HANDLE arHtcTarget; ++ void *arHifDevice; ++ spinlock_t arLock; ++ struct semaphore arSem; ++ int arRxBuffers[WMI_PRI_MAX_COUNT]; ++ int arSsidLen; ++ u_char arSsid[32]; ++ A_UINT8 arNetworkType; ++ A_UINT8 arDot11AuthMode; ++ A_UINT8 arAuthMode; ++ A_UINT8 arPairwiseCrypto; ++ A_UINT8 arPairwiseCryptoLen; ++ A_UINT8 arGroupCrypto; ++ A_UINT8 arGroupCryptoLen; ++ A_UINT8 arDefTxKeyIndex; ++ struct ar_wep_key arWepKeyList[WMI_MAX_KEY_INDEX + 1]; ++ A_UINT8 arBssid[6]; ++ A_UINT8 arReqBssid[6]; ++ A_UINT16 arChannelHint; ++ A_UINT16 arBssChannel; ++ A_UINT16 arListenInterval; ++ struct ar6000_version arVersion; ++ A_UINT32 arTargetType; ++ A_INT8 arRssi; ++ A_UINT8 arTxPwr; ++ A_BOOL arTxPwrSet; ++ A_INT32 arBitRate; ++ struct net_device_stats arNetStats; ++ struct iw_statistics arIwStats; ++ A_INT8 arNumChannels; ++ A_UINT16 arChannelList[32]; ++ A_UINT32 arRegCode; ++ A_BOOL statsUpdatePending; ++ TARGET_STATS arTargetStats; ++ A_INT8 arMaxRetries; ++ A_UINT8 arPhyCapability; ++#ifdef CONFIG_HOST_TCMD_SUPPORT ++ A_UINT8 tcmdRxReport; ++ A_UINT32 tcmdRxTotalPkt; ++ A_INT32 tcmdRxRssi; ++ A_UINT32 tcmdPm; ++ A_UINT32 arTargetMode; ++#endif ++ AR6000_WLAN_STATE arWlanState; ++ struct ar_node_mapping arNodeMap[MAX_NODE_NUM]; ++ A_UINT8 arIbssPsEnable; ++ A_UINT8 arNodeNum; ++ A_UINT8 arNexEpId; ++ struct ar_cookie *arCookieList; ++ A_UINT16 arRateMask; ++ A_UINT8 arSkipScan; ++ A_UINT16 arBeaconInterval; ++ A_BOOL arConnectPending; ++ A_BOOL arWmmEnabled; ++ struct ar_hb_chlng_resp arHBChallengeResp; ++ A_UINT8 arKeepaliveConfigured; ++ A_UINT32 arMgmtFilter; ++ HTC_ENDPOINT_ID arWmi2EpMapping[WMI_PRI_MAX_COUNT]; ++ WMI_PRI_STREAM_ID arEp2WmiMapping[ENDPOINT_MAX]; ++#ifdef HTC_RAW_INTERFACE ++ HTC_ENDPOINT_ID arRaw2EpMapping[HTC_RAW_STREAM_NUM_MAX]; ++ HTC_RAW_STREAM_ID arEp2RawMapping[ENDPOINT_MAX]; ++ struct semaphore raw_htc_read_sem[HTC_RAW_STREAM_NUM_MAX]; ++ struct semaphore raw_htc_write_sem[HTC_RAW_STREAM_NUM_MAX]; ++ wait_queue_head_t raw_htc_read_queue[HTC_RAW_STREAM_NUM_MAX]; ++ wait_queue_head_t raw_htc_write_queue[HTC_RAW_STREAM_NUM_MAX]; ++ raw_htc_buffer raw_htc_read_buffer[HTC_RAW_STREAM_NUM_MAX][RAW_HTC_READ_BUFFERS_NUM]; ++ raw_htc_buffer raw_htc_write_buffer[HTC_RAW_STREAM_NUM_MAX][RAW_HTC_WRITE_BUFFERS_NUM]; ++ A_BOOL write_buffer_available[HTC_RAW_STREAM_NUM_MAX]; ++ A_BOOL read_buffer_available[HTC_RAW_STREAM_NUM_MAX]; ++#endif ++ A_BOOL arNetQueueStopped; ++ A_BOOL arRawIfInit; ++ int arDeviceIndex; ++ COMMON_CREDIT_STATE_INFO arCreditStateInfo; ++ A_BOOL arWMIControlEpFull; ++ A_BOOL dbgLogFetchInProgress; ++ A_UCHAR log_buffer[DBGLOG_HOST_LOG_BUFFER_SIZE]; ++ A_UINT32 log_cnt; ++ A_UINT32 dbglog_init_done; ++ A_UINT32 arConnectCtrlFlags; ++ A_UINT32 scan_complete; ++#ifdef USER_KEYS ++ A_INT32 user_savedkeys_stat; ++ A_UINT32 user_key_ctrl; ++ struct USER_SAVEDKEYS user_saved_keys; ++#endif ++} AR_SOFTC_T; ++ ++ ++#define arWMIStream2EndpointID(ar,wmi) (ar)->arWmi2EpMapping[(wmi)] ++#define arSetWMIStream2EndpointIDMap(ar,wmi,ep) \ ++{ (ar)->arWmi2EpMapping[(wmi)] = (ep); \ ++ (ar)->arEp2WmiMapping[(ep)] = (wmi); } ++#define arEndpoint2WMIStreamID(ar,ep) (ar)->arEp2WmiMapping[(ep)] ++ ++#define arRawIfEnabled(ar) (ar)->arRawIfInit ++#define arRawStream2EndpointID(ar,raw) (ar)->arRaw2EpMapping[(raw)] ++#define arSetRawStream2EndpointIDMap(ar,raw,ep) \ ++{ (ar)->arRaw2EpMapping[(raw)] = (ep); \ ++ (ar)->arEp2RawMapping[(ep)] = (raw); } ++#define arEndpoint2RawStreamID(ar,ep) (ar)->arEp2RawMapping[(ep)] ++ ++struct ar_giwscan_param { ++ char *current_ev; ++ char *end_buf; ++ A_BOOL firstPass; ++}; ++ ++#define AR6000_STAT_INC(ar, stat) (ar->arNetStats.stat++) ++ ++#define AR6000_SPIN_LOCK(lock, param) do { \ ++ if (irqs_disabled()) { \ ++ AR_DEBUG_PRINTF("IRQs disabled:AR6000_LOCK\n"); \ ++ } \ ++ spin_lock_bh(lock); \ ++} while (0) ++ ++#define AR6000_SPIN_UNLOCK(lock, param) do { \ ++ if (irqs_disabled()) { \ ++ AR_DEBUG_PRINTF("IRQs disabled: AR6000_UNLOCK\n"); \ ++ } \ ++ spin_unlock_bh(lock); \ ++} while (0) ++ ++int ar6000_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); ++int ar6000_ioctl_dispatcher(struct net_device *dev, struct ifreq *rq, int cmd); ++void ar6000_ioctl_iwsetup(struct iw_handler_def *def); ++void ar6000_gpio_init(void); ++void ar6000_init_profile_info(AR_SOFTC_T *ar); ++void ar6000_install_static_wep_keys(AR_SOFTC_T *ar); ++int ar6000_init(struct net_device *dev); ++int ar6000_dbglog_get_debug_logs(AR_SOFTC_T *ar); ++A_STATUS ar6000_SetHTCBlockSize(AR_SOFTC_T *ar); ++ ++#ifdef HTC_RAW_INTERFACE ++ ++#ifndef __user ++#define __user ++#endif ++ ++int ar6000_htc_raw_open(AR_SOFTC_T *ar); ++int ar6000_htc_raw_close(AR_SOFTC_T *ar); ++ssize_t ar6000_htc_raw_read(AR_SOFTC_T *ar, ++ HTC_RAW_STREAM_ID StreamID, ++ char __user *buffer, size_t count); ++ssize_t ar6000_htc_raw_write(AR_SOFTC_T *ar, ++ HTC_RAW_STREAM_ID StreamID, ++ char __user *buffer, size_t count); ++ ++#endif /* HTC_RAW_INTERFACE */ ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* _AR6000_H_ */ +diff --git a/drivers/sdio/function/wlan/ar6000/ar6000/ar6000_raw_if.c b/drivers/sdio/function/wlan/ar6000/ar6000/ar6000_raw_if.c +new file mode 100644 +index 0000000..746cb2b +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/ar6000/ar6000_raw_if.c +@@ -0,0 +1,439 @@ ++/* ++ * ++ * Copyright (c) 2004-2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++#include "ar6000_drv.h" ++ ++#ifdef HTC_RAW_INTERFACE ++ ++static void ++ar6000_htc_raw_read_cb(void *Context, HTC_PACKET *pPacket) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)Context; ++ raw_htc_buffer *busy; ++ HTC_RAW_STREAM_ID streamID; ++ ++ busy = (raw_htc_buffer *)pPacket->pPktContext; ++ A_ASSERT(busy != NULL); ++ ++ if (pPacket->Status == A_ECANCELED) { ++ /* ++ * HTC provides A_ECANCELED status when it doesn't want to be refilled ++ * (probably due to a shutdown) ++ */ ++ return; ++ } ++ ++ streamID = arEndpoint2RawStreamID(ar,pPacket->Endpoint); ++ A_ASSERT(streamID != HTC_RAW_STREAM_NOT_MAPPED); ++ ++#ifdef CF ++ if (down_trylock(&ar->raw_htc_read_sem[streamID])) { ++#else ++ if (down_interruptible(&ar->raw_htc_read_sem[streamID])) { ++#endif /* CF */ ++ AR_DEBUG2_PRINTF("Unable to down the semaphore\n"); ++ } ++ ++ A_ASSERT((pPacket->Status != A_OK) || ++ (pPacket->pBuffer == (busy->data + HTC_HEADER_LEN))); ++ ++ busy->length = pPacket->ActualLength + HTC_HEADER_LEN; ++ busy->currPtr = HTC_HEADER_LEN; ++ ar->read_buffer_available[streamID] = TRUE; ++ //AR_DEBUG_PRINTF("raw read cb: 0x%X 0x%X \n", busy->currPtr,busy->length); ++ up(&ar->raw_htc_read_sem[streamID]); ++ ++ /* Signal the waiting process */ ++ AR_DEBUG2_PRINTF("Waking up the StreamID(%d) read process\n", streamID); ++ wake_up_interruptible(&ar->raw_htc_read_queue[streamID]); ++} ++ ++static void ++ar6000_htc_raw_write_cb(void *Context, HTC_PACKET *pPacket) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)Context; ++ raw_htc_buffer *free; ++ HTC_RAW_STREAM_ID streamID; ++ ++ free = (raw_htc_buffer *)pPacket->pPktContext; ++ A_ASSERT(free != NULL); ++ ++ if (pPacket->Status == A_ECANCELED) { ++ /* ++ * HTC provides A_ECANCELED status when it doesn't want to be refilled ++ * (probably due to a shutdown) ++ */ ++ return; ++ } ++ ++ streamID = arEndpoint2RawStreamID(ar,pPacket->Endpoint); ++ A_ASSERT(streamID != HTC_RAW_STREAM_NOT_MAPPED); ++ ++#ifdef CF ++ if (down_trylock(&ar->raw_htc_write_sem[streamID])) { ++#else ++ if (down_interruptible(&ar->raw_htc_write_sem[streamID])) { ++#endif ++ AR_DEBUG2_PRINTF("Unable to down the semaphore\n"); ++ } ++ ++ A_ASSERT(pPacket->pBuffer == (free->data + HTC_HEADER_LEN)); ++ ++ free->length = 0; ++ ar->write_buffer_available[streamID] = TRUE; ++ up(&ar->raw_htc_write_sem[streamID]); ++ ++ /* Signal the waiting process */ ++ AR_DEBUG2_PRINTF("Waking up the StreamID(%d) write process\n", streamID); ++ wake_up_interruptible(&ar->raw_htc_write_queue[streamID]); ++} ++ ++/* connect to a service */ ++static A_STATUS ar6000_connect_raw_service(AR_SOFTC_T *ar, ++ HTC_RAW_STREAM_ID StreamID) ++{ ++ A_STATUS status; ++ HTC_SERVICE_CONNECT_RESP response; ++ A_UINT8 streamNo; ++ HTC_SERVICE_CONNECT_REQ connect; ++ ++ do { ++ ++ A_MEMZERO(&connect,sizeof(connect)); ++ /* pass the stream ID as meta data to the RAW streams service */ ++ streamNo = (A_UINT8)StreamID; ++ connect.pMetaData = &streamNo; ++ connect.MetaDataLength = sizeof(A_UINT8); ++ /* these fields are the same for all endpoints */ ++ connect.EpCallbacks.pContext = ar; ++ connect.EpCallbacks.EpTxComplete = ar6000_htc_raw_write_cb; ++ connect.EpCallbacks.EpRecv = ar6000_htc_raw_read_cb; ++ /* simple interface, we don't need these optional callbacks */ ++ connect.EpCallbacks.EpRecvRefill = NULL; ++ connect.EpCallbacks.EpSendFull = NULL; ++ connect.MaxSendQueueDepth = RAW_HTC_WRITE_BUFFERS_NUM; ++ ++ /* connect to the raw streams service, we may be able to get 1 or more ++ * connections, depending on WHAT is running on the target */ ++ connect.ServiceID = HTC_RAW_STREAMS_SVC; ++ ++ A_MEMZERO(&response,sizeof(response)); ++ ++ /* try to connect to the raw stream, it is okay if this fails with ++ * status HTC_SERVICE_NO_MORE_EP */ ++ status = HTCConnectService(ar->arHtcTarget, ++ &connect, ++ &response); ++ ++ if (A_FAILED(status)) { ++ if (response.ConnectRespCode == HTC_SERVICE_NO_MORE_EP) { ++ AR_DEBUG_PRINTF("HTC RAW , No more streams allowed \n"); ++ status = A_OK; ++ } ++ break; ++ } ++ ++ /* set endpoint mapping for the RAW HTC streams */ ++ arSetRawStream2EndpointIDMap(ar,StreamID,response.Endpoint); ++ ++ AR_DEBUG_PRINTF("HTC RAW : stream ID: %d, endpoint: %d\n", ++ StreamID, arRawStream2EndpointID(ar,StreamID)); ++ ++ } while (FALSE); ++ ++ return status; ++} ++ ++int ar6000_htc_raw_open(AR_SOFTC_T *ar) ++{ ++ A_STATUS status; ++ int streamID, endPt, count2; ++ raw_htc_buffer *buffer; ++ HTC_SERVICE_ID servicepriority; ++ ++ A_ASSERT(ar->arHtcTarget != NULL); ++ ++ /* wait for target */ ++ status = HTCWaitTarget(ar->arHtcTarget); ++ ++ if (A_FAILED(status)) { ++ AR_DEBUG_PRINTF("HTCWaitTarget failed (%d)\n", status); ++ return -ENODEV; ++ } ++ ++ for (endPt = 0; endPt < ENDPOINT_MAX; endPt++) { ++ ar->arEp2RawMapping[endPt] = HTC_RAW_STREAM_NOT_MAPPED; ++ } ++ ++ for (streamID = HTC_RAW_STREAM_0; streamID < HTC_RAW_STREAM_NUM_MAX; streamID++) { ++ /* Initialize the data structures */ ++ init_MUTEX(&ar->raw_htc_read_sem[streamID]); ++ init_MUTEX(&ar->raw_htc_write_sem[streamID]); ++ init_waitqueue_head(&ar->raw_htc_read_queue[streamID]); ++ init_waitqueue_head(&ar->raw_htc_write_queue[streamID]); ++ ++ /* try to connect to the raw service */ ++ status = ar6000_connect_raw_service(ar,streamID); ++ ++ if (A_FAILED(status)) { ++ break; ++ } ++ ++ if (arRawStream2EndpointID(ar,streamID) == 0) { ++ break; ++ } ++ ++ for (count2 = 0; count2 < RAW_HTC_READ_BUFFERS_NUM; count2 ++) { ++ /* Initialize the receive buffers */ ++ buffer = &ar->raw_htc_write_buffer[streamID][count2]; ++ memset(buffer, 0, sizeof(raw_htc_buffer)); ++ buffer = &ar->raw_htc_read_buffer[streamID][count2]; ++ memset(buffer, 0, sizeof(raw_htc_buffer)); ++ ++ SET_HTC_PACKET_INFO_RX_REFILL(&buffer->HTCPacket, ++ buffer, ++ buffer->data, ++ AR6000_BUFFER_SIZE, ++ arRawStream2EndpointID(ar,streamID)); ++ ++ /* Queue buffers to HTC for receive */ ++ if ((status = HTCAddReceivePkt(ar->arHtcTarget, &buffer->HTCPacket)) != A_OK) ++ { ++ BMIInit(); ++ return -EIO; ++ } ++ } ++ ++ for (count2 = 0; count2 < RAW_HTC_WRITE_BUFFERS_NUM; count2 ++) { ++ /* Initialize the receive buffers */ ++ buffer = &ar->raw_htc_write_buffer[streamID][count2]; ++ memset(buffer, 0, sizeof(raw_htc_buffer)); ++ } ++ ++ ar->read_buffer_available[streamID] = FALSE; ++ ar->write_buffer_available[streamID] = TRUE; ++ } ++ ++ if (A_FAILED(status)) { ++ return -EIO; ++ } ++ ++ AR_DEBUG_PRINTF("HTC RAW, number of streams the target supports: %d \n", streamID); ++ ++ servicepriority = HTC_RAW_STREAMS_SVC; /* only 1 */ ++ ++ /* set callbacks and priority list */ ++ HTCSetCreditDistribution(ar->arHtcTarget, ++ ar, ++ NULL, /* use default */ ++ NULL, /* use default */ ++ &servicepriority, ++ 1); ++ ++ /* Start the HTC component */ ++ if ((status = HTCStart(ar->arHtcTarget)) != A_OK) { ++ BMIInit(); ++ return -EIO; ++ } ++ ++ (ar)->arRawIfInit = TRUE; ++ ++ return 0; ++} ++ ++int ar6000_htc_raw_close(AR_SOFTC_T *ar) ++{ ++ A_PRINTF("ar6000_htc_raw_close called \n"); ++ HTCStop(ar->arHtcTarget); ++ ++ /* reset the device */ ++ ar6000_reset_device(ar->arHifDevice, ar->arTargetType); ++ /* Initialize the BMI component */ ++ BMIInit(); ++ ++ return 0; ++} ++ ++raw_htc_buffer * ++get_filled_buffer(AR_SOFTC_T *ar, HTC_RAW_STREAM_ID StreamID) ++{ ++ int count; ++ raw_htc_buffer *busy; ++ ++ /* Check for data */ ++ for (count = 0; count < RAW_HTC_READ_BUFFERS_NUM; count ++) { ++ busy = &ar->raw_htc_read_buffer[StreamID][count]; ++ if (busy->length) { ++ break; ++ } ++ } ++ if (busy->length) { ++ ar->read_buffer_available[StreamID] = TRUE; ++ } else { ++ ar->read_buffer_available[StreamID] = FALSE; ++ } ++ ++ return busy; ++} ++ ++ssize_t ar6000_htc_raw_read(AR_SOFTC_T *ar, HTC_RAW_STREAM_ID StreamID, ++ char __user *buffer, size_t length) ++{ ++ int readPtr; ++ raw_htc_buffer *busy; ++ ++ if (arRawStream2EndpointID(ar,StreamID) == 0) { ++ AR_DEBUG_PRINTF("StreamID(%d) not connected! \n", StreamID); ++ return -EFAULT; ++ } ++ ++ if (down_interruptible(&ar->raw_htc_read_sem[StreamID])) { ++ return -ERESTARTSYS; ++ } ++ ++ busy = get_filled_buffer(ar,StreamID); ++ while (!ar->read_buffer_available[StreamID]) { ++ up(&ar->raw_htc_read_sem[StreamID]); ++ ++ /* Wait for the data */ ++ AR_DEBUG2_PRINTF("Sleeping StreamID(%d) read process\n", StreamID); ++ if (wait_event_interruptible(ar->raw_htc_read_queue[StreamID], ++ ar->read_buffer_available[StreamID])) ++ { ++ return -EINTR; ++ } ++ if (down_interruptible(&ar->raw_htc_read_sem[StreamID])) { ++ return -ERESTARTSYS; ++ } ++ busy = get_filled_buffer(ar,StreamID); ++ } ++ ++ /* Read the data */ ++ readPtr = busy->currPtr; ++ if (length > busy->length - HTC_HEADER_LEN) { ++ length = busy->length - HTC_HEADER_LEN; ++ } ++ if (copy_to_user(buffer, &busy->data[readPtr], length)) { ++ up(&ar->raw_htc_read_sem[StreamID]); ++ return -EFAULT; ++ } ++ ++ busy->currPtr += length; ++ ++ //AR_DEBUG_PRINTF("raw read ioctl: currPTR : 0x%X 0x%X \n", busy->currPtr,busy->length); ++ ++ if (busy->currPtr == busy->length) ++ { ++ busy->currPtr = 0; ++ busy->length = 0; ++ HTC_PACKET_RESET_RX(&busy->HTCPacket); ++ //AR_DEBUG_PRINTF("raw read ioctl: ep for packet:%d \n", busy->HTCPacket.Endpoint); ++ HTCAddReceivePkt(ar->arHtcTarget, &busy->HTCPacket); ++ } ++ ar->read_buffer_available[StreamID] = FALSE; ++ up(&ar->raw_htc_read_sem[StreamID]); ++ ++ return length; ++} ++ ++static raw_htc_buffer * ++get_free_buffer(AR_SOFTC_T *ar, HTC_ENDPOINT_ID StreamID) ++{ ++ int count; ++ raw_htc_buffer *free; ++ ++ free = NULL; ++ for (count = 0; count < RAW_HTC_WRITE_BUFFERS_NUM; count ++) { ++ free = &ar->raw_htc_write_buffer[StreamID][count]; ++ if (free->length == 0) { ++ break; ++ } ++ } ++ if (!free->length) { ++ ar->write_buffer_available[StreamID] = TRUE; ++ } else { ++ ar->write_buffer_available[StreamID] = FALSE; ++ } ++ ++ return free; ++} ++ ++ssize_t ar6000_htc_raw_write(AR_SOFTC_T *ar, HTC_RAW_STREAM_ID StreamID, ++ char __user *buffer, size_t length) ++{ ++ int writePtr; ++ raw_htc_buffer *free; ++ ++ if (arRawStream2EndpointID(ar,StreamID) == 0) { ++ AR_DEBUG_PRINTF("StreamID(%d) not connected! \n", StreamID); ++ return -EFAULT; ++ } ++ ++ if (down_interruptible(&ar->raw_htc_write_sem[StreamID])) { ++ return -ERESTARTSYS; ++ } ++ ++ /* Search for a free buffer */ ++ free = get_free_buffer(ar,StreamID); ++ ++ /* Check if there is space to write else wait */ ++ while (!ar->write_buffer_available[StreamID]) { ++ up(&ar->raw_htc_write_sem[StreamID]); ++ ++ /* Wait for buffer to become free */ ++ AR_DEBUG2_PRINTF("Sleeping StreamID(%d) write process\n", StreamID); ++ if (wait_event_interruptible(ar->raw_htc_write_queue[StreamID], ++ ar->write_buffer_available[StreamID])) ++ { ++ return -EINTR; ++ } ++ if (down_interruptible(&ar->raw_htc_write_sem[StreamID])) { ++ return -ERESTARTSYS; ++ } ++ free = get_free_buffer(ar,StreamID); ++ } ++ ++ /* Send the data */ ++ writePtr = HTC_HEADER_LEN; ++ if (length > (AR6000_BUFFER_SIZE - HTC_HEADER_LEN)) { ++ length = AR6000_BUFFER_SIZE - HTC_HEADER_LEN; ++ } ++ ++ if (copy_from_user(&free->data[writePtr], buffer, length)) { ++ up(&ar->raw_htc_read_sem[StreamID]); ++ return -EFAULT; ++ } ++ ++ free->length = length; ++ ++ SET_HTC_PACKET_INFO_TX(&free->HTCPacket, ++ free, ++ &free->data[writePtr], ++ length, ++ arRawStream2EndpointID(ar,StreamID), ++ AR6K_DATA_PKT_TAG); ++ ++ HTCSendPkt(ar->arHtcTarget,&free->HTCPacket); ++ ++ ar->write_buffer_available[StreamID] = FALSE; ++ up(&ar->raw_htc_write_sem[StreamID]); ++ ++ return length; ++} ++#endif /* HTC_RAW_INTERFACE */ +diff --git a/drivers/sdio/function/wlan/ar6000/ar6000/ar6xapi_linux.h b/drivers/sdio/function/wlan/ar6000/ar6000/ar6xapi_linux.h +new file mode 100644 +index 0000000..b8e6e09 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/ar6000/ar6xapi_linux.h +@@ -0,0 +1,128 @@ ++#ifndef _AR6XAPI_LINUX_H ++#define _AR6XAPI_LINUX_H ++/* ++ * ++ * Copyright (c) 2004-2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++struct ar6_softc; ++ ++void ar6000_ready_event(void *devt, A_UINT8 *datap, A_UINT8 phyCap); ++A_UINT8 ar6000_iptos_to_userPriority(A_UINT8 *pkt); ++A_STATUS ar6000_control_tx(void *devt, void *osbuf, WMI_PRI_STREAM_ID streamID); ++void ar6000_connect_event(struct ar6_softc *ar, A_UINT16 channel, ++ A_UINT8 *bssid, A_UINT16 listenInterval, ++ A_UINT16 beaconInterval, NETWORK_TYPE networkType, ++ A_UINT8 beaconIeLen, A_UINT8 assocReqLen, ++ A_UINT8 assocRespLen,A_UINT8 *assocInfo); ++void ar6000_disconnect_event(struct ar6_softc *ar, A_UINT8 reason, ++ A_UINT8 *bssid, A_UINT8 assocRespLen, ++ A_UINT8 *assocInfo, A_UINT16 protocolReasonStatus); ++void ar6000_tkip_micerr_event(struct ar6_softc *ar, A_UINT8 keyid, ++ A_BOOL ismcast); ++void ar6000_bitrate_rx(void *devt, A_INT32 rateKbps); ++void ar6000_channelList_rx(void *devt, A_INT8 numChan, A_UINT16 *chanList); ++void ar6000_regDomain_event(struct ar6_softc *ar, A_UINT32 regCode); ++void ar6000_txPwr_rx(void *devt, A_UINT8 txPwr); ++void ar6000_keepalive_rx(void *devt, A_UINT8 configured); ++void ar6000_neighborReport_event(struct ar6_softc *ar, int numAps, ++ WMI_NEIGHBOR_INFO *info); ++void ar6000_set_numdataendpts(struct ar6_softc *ar, A_UINT32 num); ++void ar6000_scanComplete_event(struct ar6_softc *ar, A_STATUS status); ++void ar6000_targetStats_event(struct ar6_softc *ar, WMI_TARGET_STATS *pStats); ++void ar6000_rssiThreshold_event(struct ar6_softc *ar, ++ WMI_RSSI_THRESHOLD_VAL newThreshold, ++ A_INT16 rssi); ++void ar6000_reportError_event(struct ar6_softc *, WMI_TARGET_ERROR_VAL errorVal); ++void ar6000_cac_event(struct ar6_softc *ar, A_UINT8 ac, A_UINT8 cac_indication, ++ A_UINT8 statusCode, A_UINT8 *tspecSuggestion); ++void ar6000_hbChallengeResp_event(struct ar6_softc *, A_UINT32 cookie, A_UINT32 source); ++void ++ar6000_roam_tbl_event(struct ar6_softc *ar, WMI_TARGET_ROAM_TBL *pTbl); ++ ++void ++ar6000_roam_data_event(struct ar6_softc *ar, WMI_TARGET_ROAM_DATA *p); ++ ++void ++ar6000_wow_list_event(struct ar6_softc *ar, A_UINT8 num_filters, ++ WMI_GET_WOW_LIST_REPLY *wow_reply); ++ ++void ar6000_pmkid_list_event(void *devt, A_UINT8 numPMKID, ++ WMI_PMKID *pmkidList); ++ ++void ar6000_gpio_intr_rx(A_UINT32 intr_mask, A_UINT32 input_values); ++void ar6000_gpio_data_rx(A_UINT32 reg_id, A_UINT32 value); ++void ar6000_gpio_ack_rx(void); ++ ++void ar6000_dbglog_init_done(struct ar6_softc *ar); ++ ++#ifdef SEND_EVENT_TO_APP ++void ar6000_send_event_to_app(struct ar6_softc *ar, A_UINT16 eventId, A_UINT8 *datap, int len); ++#endif ++ ++#ifdef CONFIG_HOST_TCMD_SUPPORT ++void ar6000_tcmd_rx_report_event(void *devt, A_UINT8 * results, int len); ++#endif ++ ++void ar6000_tx_retry_err_event(void *devt); ++ ++void ar6000_snrThresholdEvent_rx(void *devt, ++ WMI_SNR_THRESHOLD_VAL newThreshold, ++ A_UINT8 snr); ++ ++void ar6000_lqThresholdEvent_rx(void *devt, WMI_LQ_THRESHOLD_VAL range, A_UINT8 lqVal); ++ ++ ++void ar6000_ratemask_rx(void *devt, A_UINT16 ratemask); ++ ++A_STATUS ar6000_get_driver_cfg(struct net_device *dev, ++ A_UINT16 cfgParam, ++ void *result); ++void ar6000_bssInfo_event_rx(struct ar6_softc *ar, A_UINT8 *data, int len); ++ ++void ar6000_dbglog_event(struct ar6_softc *ar, A_UINT32 dropped, ++ A_INT8 *buffer, A_UINT32 length); ++ ++int ar6000_dbglog_get_debug_logs(struct ar6_softc *ar); ++ ++void ar6000_indicate_tx_activity(void *devt, A_UINT8 trafficClass, A_BOOL Active); ++ ++void ar6000_dset_open_req(void *devt, ++ A_UINT32 id, ++ A_UINT32 targ_handle, ++ A_UINT32 targ_reply_fn, ++ A_UINT32 targ_reply_arg); ++void ar6000_dset_close(void *devt, A_UINT32 access_cookie); ++void ar6000_dset_data_req(void *devt, ++ A_UINT32 access_cookie, ++ A_UINT32 offset, ++ A_UINT32 length, ++ A_UINT32 targ_buf, ++ A_UINT32 targ_reply_fn, ++ A_UINT32 targ_reply_arg); ++ ++ ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif +diff --git a/drivers/sdio/function/wlan/ar6000/ar6000/athdrv_linux.h b/drivers/sdio/function/wlan/ar6000/ar6000/athdrv_linux.h +new file mode 100644 +index 0000000..9c3e449 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/ar6000/athdrv_linux.h +@@ -0,0 +1,993 @@ ++/* ++ * Copyright (c) 2004-2006 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++#ifndef _ATHDRV_LINUX_H ++#define _ATHDRV_LINUX_H ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++ ++/* ++ * There are two types of ioctl's here: Standard ioctls and ++ * eXtended ioctls. All extended ioctls (XIOCTL) are multiplexed ++ * off of the single ioctl command, AR6000_IOCTL_EXTENDED. The ++ * arguments for every XIOCTL starts with a 32-bit command word ++ * that is used to select which extended ioctl is in use. After ++ * the command word are command-specific arguments. ++ */ ++ ++/* Linux standard Wireless Extensions, private ioctl interfaces */ ++#define IEEE80211_IOCTL_SETPARAM (SIOCIWFIRSTPRIV+0) ++#define IEEE80211_IOCTL_GETPARAM (SIOCIWFIRSTPRIV+1) ++#define IEEE80211_IOCTL_SETKEY (SIOCIWFIRSTPRIV+2) ++#define IEEE80211_IOCTL_SETWMMPARAMS (SIOCIWFIRSTPRIV+3) ++#define IEEE80211_IOCTL_DELKEY (SIOCIWFIRSTPRIV+4) ++#define IEEE80211_IOCTL_GETWMMPARAMS (SIOCIWFIRSTPRIV+5) ++#define IEEE80211_IOCTL_SETOPTIE (SIOCIWFIRSTPRIV+6) ++#define IEEE80211_IOCTL_SETMLME (SIOCIWFIRSTPRIV+7) ++//#define IEEE80211_IOCTL_GETOPTIE (SIOCIWFIRSTPRIV+7) ++#define IEEE80211_IOCTL_ADDPMKID (SIOCIWFIRSTPRIV+8) ++//#define IEEE80211_IOCTL_SETAUTHALG (SIOCIWFIRSTPRIV+10) ++#define IEEE80211_IOCTL_LASTONE (SIOCIWFIRSTPRIV+9) ++ ++ ++ ++/* ====WMI Ioctls==== */ ++/* ++ * ++ * Many ioctls simply provide WMI services to application code: ++ * an application makes such an ioctl call with a set of arguments ++ * that are packaged into the corresponding WMI message, and sent ++ * to the Target. ++ */ ++ ++#define AR6000_IOCTL_WMI_GETREV (SIOCIWFIRSTPRIV+10) ++/* ++ * arguments: ++ * ar6000_version *revision ++ */ ++ ++#define AR6000_IOCTL_WMI_SETPWR (SIOCIWFIRSTPRIV+11) ++/* ++ * arguments: ++ * WMI_POWER_MODE_CMD pwrModeCmd (see include/wmi.h) ++ * uses: WMI_SET_POWER_MODE_CMDID ++ */ ++ ++#define AR6000_IOCTL_WMI_SETSCAN (SIOCIWFIRSTPRIV+12) ++/* ++ * arguments: ++ * WMI_SCAN_PARAMS_CMD scanParams (see include/wmi.h) ++ * uses: WMI_SET_SCAN_PARAMS_CMDID ++ */ ++ ++#define AR6000_IOCTL_WMI_SETLISTENINT (SIOCIWFIRSTPRIV+13) ++/* ++ * arguments: ++ * UINT32 listenInterval ++ * uses: WMI_SET_LISTEN_INT_CMDID ++ */ ++ ++#define AR6000_IOCTL_WMI_SETBSSFILTER (SIOCIWFIRSTPRIV+14) ++/* ++ * arguments: ++ * WMI_BSS_FILTER filter (see include/wmi.h) ++ * uses: WMI_SET_BSS_FILTER_CMDID ++ */ ++ ++#define AR6000_IOCTL_WMI_SET_CHANNELPARAMS (SIOCIWFIRSTPRIV+16) ++/* ++ * arguments: ++ * WMI_CHANNEL_PARAMS_CMD chParams ++ * uses: WMI_SET_CHANNEL_PARAMS_CMDID ++ */ ++ ++#define AR6000_IOCTL_WMI_SET_PROBEDSSID (SIOCIWFIRSTPRIV+17) ++/* ++ * arguments: ++ * WMI_PROBED_SSID_CMD probedSsids (see include/wmi.h) ++ * uses: WMI_SETPROBED_SSID_CMDID ++ */ ++ ++#define AR6000_IOCTL_WMI_SET_PMPARAMS (SIOCIWFIRSTPRIV+18) ++/* ++ * arguments: ++ * WMI_POWER_PARAMS_CMD powerParams (see include/wmi.h) ++ * uses: WMI_SET_POWER_PARAMS_CMDID ++ */ ++ ++#define AR6000_IOCTL_WMI_SET_BADAP (SIOCIWFIRSTPRIV+19) ++/* ++ * arguments: ++ * WMI_ADD_BAD_AP_CMD badAPs (see include/wmi.h) ++ * uses: WMI_ADD_BAD_AP_CMDID ++ */ ++ ++#define AR6000_IOCTL_WMI_GET_QOS_QUEUE (SIOCIWFIRSTPRIV+20) ++/* ++ * arguments: ++ * ar6000_queuereq queueRequest (see below) ++ */ ++ ++#define AR6000_IOCTL_WMI_CREATE_QOS (SIOCIWFIRSTPRIV+21) ++/* ++ * arguments: ++ * WMI_CREATE_PSTREAM createPstreamCmd (see include/wmi.h) ++ * uses: WMI_CREATE_PSTREAM_CMDID ++ */ ++ ++#define AR6000_IOCTL_WMI_DELETE_QOS (SIOCIWFIRSTPRIV+22) ++/* ++ * arguments: ++ * WMI_DELETE_PSTREAM_CMD deletePstreamCmd (see include/wmi.h) ++ * uses: WMI_DELETE_PSTREAM_CMDID ++ */ ++ ++#define AR6000_IOCTL_WMI_SET_SNRTHRESHOLD (SIOCIWFIRSTPRIV+23) ++/* ++ * arguments: ++ * WMI_SNR_THRESHOLD_PARAMS_CMD thresholdParams (see include/wmi.h) ++ * uses: WMI_SNR_THRESHOLD_PARAMS_CMDID ++ */ ++ ++#define AR6000_IOCTL_WMI_SET_ERROR_REPORT_BITMASK (SIOCIWFIRSTPRIV+24) ++/* ++ * arguments: ++ * WMI_TARGET_ERROR_REPORT_BITMASK errorReportBitMask (see include/wmi.h) ++ * uses: WMI_TARGET_ERROR_REPORT_BITMASK_CMDID ++ */ ++ ++#define AR6000_IOCTL_WMI_GET_TARGET_STATS (SIOCIWFIRSTPRIV+25) ++/* ++ * arguments: ++ * TARGET_STATS *targetStats (see below) ++ * uses: WMI_GET_STATISTICS_CMDID ++ */ ++ ++#define AR6000_IOCTL_WMI_SET_ASSOC_INFO (SIOCIWFIRSTPRIV+26) ++/* ++ * arguments: ++ * WMI_SET_ASSOC_INFO_CMD setAssocInfoCmd ++ * uses: WMI_SET_ASSOC_INFO_CMDID ++ */ ++ ++#define AR6000_IOCTL_WMI_SET_ACCESS_PARAMS (SIOCIWFIRSTPRIV+27) ++/* ++ * arguments: ++ * WMI_SET_ACCESS_PARAMS_CMD setAccessParams (see include/wmi.h) ++ * uses: WMI_SET_ACCESS_PARAMS_CMDID ++ */ ++ ++#define AR6000_IOCTL_WMI_SET_BMISS_TIME (SIOCIWFIRSTPRIV+28) ++/* ++ * arguments: ++ * UINT32 beaconMissTime ++ * uses: WMI_SET_BMISS_TIME_CMDID ++ */ ++ ++#define AR6000_IOCTL_WMI_SET_DISC_TIMEOUT (SIOCIWFIRSTPRIV+29) ++/* ++ * arguments: ++ * WMI_DISC_TIMEOUT_CMD disconnectTimeoutCmd (see include/wmi.h) ++ * uses: WMI_SET_DISC_TIMEOUT_CMDID ++ */ ++ ++#define AR6000_IOCTL_WMI_SET_IBSS_PM_CAPS (SIOCIWFIRSTPRIV+30) ++/* ++ * arguments: ++ * WMI_IBSS_PM_CAPS_CMD ibssPowerMgmtCapsCmd ++ * uses: WMI_SET_IBSS_PM_CAPS_CMDID ++ */ ++ ++/* ++ * There is a very small space available for driver-private ++ * wireless ioctls. In order to circumvent this limitation, ++ * we multiplex a bunch of ioctls (XIOCTLs) on top of a ++ * single AR6000_IOCTL_EXTENDED ioctl. ++ */ ++#define AR6000_IOCTL_EXTENDED (SIOCIWFIRSTPRIV+31) ++ ++ ++/* ====BMI Extended Ioctls==== */ ++ ++#define AR6000_XIOCTL_BMI_DONE 1 ++/* ++ * arguments: ++ * UINT32 cmd (AR6000_XIOCTL_BMI_DONE) ++ * uses: BMI_DONE ++ */ ++ ++#define AR6000_XIOCTL_BMI_READ_MEMORY 2 ++/* ++ * arguments: ++ * union { ++ * struct { ++ * UINT32 cmd (AR6000_XIOCTL_BMI_READ_MEMORY) ++ * UINT32 address ++ * UINT32 length ++ * } ++ * char results[length] ++ * } ++ * uses: BMI_READ_MEMORY ++ */ ++ ++#define AR6000_XIOCTL_BMI_WRITE_MEMORY 3 ++/* ++ * arguments: ++ * UINT32 cmd (AR6000_XIOCTL_BMI_WRITE_MEMORY) ++ * UINT32 address ++ * UINT32 length ++ * char data[length] ++ * uses: BMI_WRITE_MEMORY ++ */ ++ ++#define AR6000_XIOCTL_BMI_EXECUTE 4 ++/* ++ * arguments: ++ * UINT32 cmd (AR6000_XIOCTL_BMI_EXECUTE) ++ * UINT32 TargetAddress ++ * UINT32 parameter ++ * uses: BMI_EXECUTE ++ */ ++ ++#define AR6000_XIOCTL_BMI_SET_APP_START 5 ++/* ++ * arguments: ++ * UINT32 cmd (AR6000_XIOCTL_BMI_SET_APP_START) ++ * UINT32 TargetAddress ++ * uses: BMI_SET_APP_START ++ */ ++ ++#define AR6000_XIOCTL_BMI_READ_SOC_REGISTER 6 ++/* ++ * arguments: ++ * union { ++ * struct { ++ * UINT32 cmd (AR6000_XIOCTL_BMI_READ_SOC_REGISTER) ++ * UINT32 TargetAddress, 32-bit aligned ++ * } ++ * UINT32 result ++ * } ++ * uses: BMI_READ_SOC_REGISTER ++ */ ++ ++#define AR6000_XIOCTL_BMI_WRITE_SOC_REGISTER 7 ++/* ++ * arguments: ++ * struct { ++ * UINT32 cmd (AR6000_XIOCTL_BMI_WRITE_SOC_REGISTER) ++ * UINT32 TargetAddress, 32-bit aligned ++ * UINT32 newValue ++ * } ++ * uses: BMI_WRITE_SOC_REGISTER ++ */ ++ ++#define AR6000_XIOCTL_BMI_TEST 8 ++/* ++ * arguments: ++ * UINT32 cmd (AR6000_XIOCTL_BMI_TEST) ++ * UINT32 address ++ * UINT32 length ++ * UINT32 count ++ */ ++ ++ ++ ++/* Historical Host-side DataSet support */ ++#define AR6000_XIOCTL_UNUSED9 9 ++#define AR6000_XIOCTL_UNUSED10 10 ++#define AR6000_XIOCTL_UNUSED11 11 ++ ++/* ====Misc Extended Ioctls==== */ ++ ++#define AR6000_XIOCTL_FORCE_TARGET_RESET 12 ++/* ++ * arguments: ++ * UINT32 cmd (AR6000_XIOCTL_FORCE_TARGET_RESET) ++ */ ++ ++ ++#ifdef HTC_RAW_INTERFACE ++/* HTC Raw Interface Ioctls */ ++#define AR6000_XIOCTL_HTC_RAW_OPEN 13 ++/* ++ * arguments: ++ * UINT32 cmd (AR6000_XIOCTL_HTC_RAW_OPEN) ++ */ ++ ++#define AR6000_XIOCTL_HTC_RAW_CLOSE 14 ++/* ++ * arguments: ++ * UINT32 cmd (AR6000_XIOCTL_HTC_RAW_CLOSE) ++ */ ++ ++#define AR6000_XIOCTL_HTC_RAW_READ 15 ++/* ++ * arguments: ++ * union { ++ * struct { ++ * UINT32 cmd (AR6000_XIOCTL_HTC_RAW_READ) ++ * UINT32 mailboxID ++ * UINT32 length ++ * } ++ * results[length] ++ * } ++ */ ++ ++#define AR6000_XIOCTL_HTC_RAW_WRITE 16 ++/* ++ * arguments: ++ * UINT32 cmd (AR6000_XIOCTL_HTC_RAW_WRITE) ++ * UINT32 mailboxID ++ * UINT32 length ++ * char buffer[length] ++ */ ++#endif /* HTC_RAW_INTERFACE */ ++ ++#define AR6000_XIOCTL_CHECK_TARGET_READY 17 ++/* ++ * arguments: ++ * UINT32 cmd (AR6000_XIOCTL_CHECK_TARGET_READY) ++ */ ++ ++ ++ ++/* ====GPIO (General Purpose I/O) Extended Ioctls==== */ ++ ++#define AR6000_XIOCTL_GPIO_OUTPUT_SET 18 ++/* ++ * arguments: ++ * UINT32 cmd (AR6000_XIOCTL_GPIO_OUTPUT_SET) ++ * ar6000_gpio_output_set_cmd_s (see below) ++ * uses: WMIX_GPIO_OUTPUT_SET_CMDID ++ */ ++ ++#define AR6000_XIOCTL_GPIO_INPUT_GET 19 ++/* ++ * arguments: ++ * UINT32 cmd (AR6000_XIOCTL_GPIO_INPUT_GET) ++ * uses: WMIX_GPIO_INPUT_GET_CMDID ++ */ ++ ++#define AR6000_XIOCTL_GPIO_REGISTER_SET 20 ++/* ++ * arguments: ++ * UINT32 cmd (AR6000_XIOCTL_GPIO_REGISTER_SET) ++ * ar6000_gpio_register_cmd_s (see below) ++ * uses: WMIX_GPIO_REGISTER_SET_CMDID ++ */ ++ ++#define AR6000_XIOCTL_GPIO_REGISTER_GET 21 ++/* ++ * arguments: ++ * UINT32 cmd (AR6000_XIOCTL_GPIO_REGISTER_GET) ++ * ar6000_gpio_register_cmd_s (see below) ++ * uses: WMIX_GPIO_REGISTER_GET_CMDID ++ */ ++ ++#define AR6000_XIOCTL_GPIO_INTR_ACK 22 ++/* ++ * arguments: ++ * UINT32 cmd (AR6000_XIOCTL_GPIO_INTR_ACK) ++ * ar6000_cpio_intr_ack_cmd_s (see below) ++ * uses: WMIX_GPIO_INTR_ACK_CMDID ++ */ ++ ++#define AR6000_XIOCTL_GPIO_INTR_WAIT 23 ++/* ++ * arguments: ++ * UINT32 cmd (AR6000_XIOCTL_GPIO_INTR_WAIT) ++ */ ++ ++ ++ ++/* ====more wireless commands==== */ ++ ++#define AR6000_XIOCTL_SET_ADHOC_BSSID 24 ++/* ++ * arguments: ++ * UINT32 cmd (AR6000_XIOCTL_SET_ADHOC_BSSID) ++ * WMI_SET_ADHOC_BSSID_CMD setAdHocBssidCmd (see include/wmi.h) ++ */ ++ ++#define AR6000_XIOCTL_SET_OPT_MODE 25 ++/* ++ * arguments: ++ * UINT32 cmd (AR6000_XIOCTL_SET_OPT_MODE) ++ * WMI_SET_OPT_MODE_CMD setOptModeCmd (see include/wmi.h) ++ * uses: WMI_SET_OPT_MODE_CMDID ++ */ ++ ++#define AR6000_XIOCTL_OPT_SEND_FRAME 26 ++/* ++ * arguments: ++ * UINT32 cmd (AR6000_XIOCTL_OPT_SEND_FRAME) ++ * WMI_OPT_TX_FRAME_CMD optTxFrameCmd (see include/wmi.h) ++ * uses: WMI_OPT_TX_FRAME_CMDID ++ */ ++ ++#define AR6000_XIOCTL_SET_ADHOC_BEACON_INTVAL 27 ++/* ++ * arguments: ++ * UINT32 cmd (AR6000_XIOCTL_SET_ADHOC_BEACON_INTVAL) ++ * WMI_BEACON_INT_CMD beaconIntCmd (see include/wmi.h) ++ * uses: WMI_SET_BEACON_INT_CMDID ++ */ ++ ++ ++#define IEEE80211_IOCTL_SETAUTHALG 28 ++ ++ ++#define AR6000_XIOCTL_SET_VOICE_PKT_SIZE 29 ++/* ++ * arguments: ++ * UINT32 cmd (AR6000_XIOCTL_SET_VOICE_PKT_SIZE) ++ * WMI_SET_VOICE_PKT_SIZE_CMD setVoicePktSizeCmd (see include/wmi.h) ++ * uses: WMI_SET_VOICE_PKT_SIZE_CMDID ++ */ ++ ++ ++#define AR6000_XIOCTL_SET_MAX_SP 30 ++/* ++ * arguments: ++ * UINT32 cmd (AR6000_XIOCTL_SET_MAX_SP) ++ * WMI_SET_MAX_SP_LEN_CMD maxSPLen(see include/wmi.h) ++ * uses: WMI_SET_MAX_SP_LEN_CMDID ++ */ ++ ++#define AR6000_XIOCTL_WMI_GET_ROAM_TBL 31 ++ ++#define AR6000_XIOCTL_WMI_SET_ROAM_CTRL 32 ++ ++#define AR6000_XIOCTRL_WMI_SET_POWERSAVE_TIMERS 33 ++ ++ ++/* ++ * arguments: ++ * UINT32 cmd (AR6000_XIOCTRL_WMI_SET_POWERSAVE_TIMERS) ++ * WMI_SET_POWERSAVE_TIMERS_CMD powerSaveTimers(see include/wmi.h) ++ * WMI_SET_POWERSAVE_TIMERS_CMDID ++ */ ++ ++#define AR6000_XIOCTRL_WMI_GET_POWER_MODE 34 ++/* ++ * arguments: ++ * UINT32 cmd (AR6000_XIOCTRL_WMI_GET_POWER_MODE) ++ */ ++ ++#define AR6000_XIOCTRL_WMI_SET_WLAN_STATE 35 ++typedef enum { ++ WLAN_DISABLED, ++ WLAN_ENABLED ++} AR6000_WLAN_STATE; ++/* ++ * arguments: ++ * enable/disable ++ */ ++ ++#define AR6000_XIOCTL_WMI_GET_ROAM_DATA 36 ++ ++#define AR6000_XIOCTL_WMI_SETRETRYLIMITS 37 ++/* ++ * arguments: ++ * WMI_SET_RETRY_LIMITS_CMD ibssSetRetryLimitsCmd ++ * uses: WMI_SET_RETRY_LIMITS_CMDID ++ */ ++ ++#ifdef CONFIG_HOST_TCMD_SUPPORT ++/* ====extended commands for radio test ==== */ ++ ++#define AR6000_XIOCTL_TCMD_CONT_TX 38 ++/* ++ * arguments: ++ * UINT32 cmd (AR6000_XIOCTL_TCMD_CONT_TX) ++ * WMI_TCMD_CONT_TX_CMD contTxCmd (see include/wmi.h) ++ * uses: WMI_TCMD_CONT_TX_CMDID ++ */ ++ ++#define AR6000_XIOCTL_TCMD_CONT_RX 39 ++/* ++ * arguments: ++ * UINT32 cmd (AR6000_XIOCTL_TCMD_CONT_RX) ++ * WMI_TCMD_CONT_RX_CMD rxCmd (see include/wmi.h) ++ * uses: WMI_TCMD_CONT_RX_CMDID ++ */ ++ ++#define AR6000_XIOCTL_TCMD_PM 40 ++/* ++ * arguments: ++ * UINT32 cmd (AR6000_XIOCTL_TCMD_PM) ++ * WMI_TCMD_PM_CMD pmCmd (see include/wmi.h) ++ * uses: WMI_TCMD_PM_CMDID ++ */ ++ ++#endif /* CONFIG_HOST_TCMD_SUPPORT */ ++ ++#define AR6000_XIOCTL_WMI_STARTSCAN 41 ++/* ++ * arguments: ++ * UINT32 cmd (AR6000_XIOCTL_WMI_STARTSCAN) ++ * UINT8 scanType ++ * UINT8 scanConnected ++ * A_BOOL forceFgScan ++ * uses: WMI_START_SCAN_CMDID ++ */ ++ ++#define AR6000_XIOCTL_WMI_SETFIXRATES 42 ++ ++#define AR6000_XIOCTL_WMI_GETFIXRATES 43 ++ ++ ++#define AR6000_XIOCTL_WMI_SET_RSSITHRESHOLD 44 ++/* ++ * arguments: ++ * WMI_RSSI_THRESHOLD_PARAMS_CMD thresholdParams (see include/wmi.h) ++ * uses: WMI_RSSI_THRESHOLD_PARAMS_CMDID ++ */ ++ ++#define AR6000_XIOCTL_WMI_CLR_RSSISNR 45 ++/* ++ * arguments: ++ * WMI_CLR_RSSISNR_CMD thresholdParams (see include/wmi.h) ++ * uses: WMI_CLR_RSSISNR_CMDID ++ */ ++ ++#define AR6000_XIOCTL_WMI_SET_LQTHRESHOLD 46 ++/* ++ * arguments: ++ * WMI_LQ_THRESHOLD_PARAMS_CMD thresholdParams (see include/wmi.h) ++ * uses: WMI_LQ_THRESHOLD_PARAMS_CMDID ++ */ ++ ++#define AR6000_XIOCTL_WMI_SET_RTS 47 ++/* ++ * arguments: ++ * WMI_SET_RTS_MODE_CMD (see include/wmi.h) ++ * uses: WMI_SET_RTS_MODE_CMDID ++ */ ++ ++#define AR6000_XIOCTL_WMI_SET_LPREAMBLE 48 ++ ++#define AR6000_XIOCTL_WMI_SET_AUTHMODE 49 ++/* ++ * arguments: ++ * UINT32 cmd (AR6000_XIOCTL_WMI_SET_AUTHMODE) ++ * UINT8 mode ++ * uses: WMI_SET_RECONNECT_AUTH_MODE_CMDID ++ */ ++ ++#define AR6000_XIOCTL_WMI_SET_REASSOCMODE 50 ++ ++/* ++ * arguments: ++ * UINT32 cmd (AR6000_XIOCTL_WMI_SET_WMM) ++ * UINT8 mode ++ * uses: WMI_SET_WMM_CMDID ++ */ ++#define AR6000_XIOCTL_WMI_SET_WMM 51 ++ ++/* ++ * arguments: ++ * UINT32 cmd (AR6000_XIOCTL_WMI_SET_HB_CHALLENGE_RESP_PARAMS) ++ * UINT32 frequency ++ * UINT8 threshold ++ */ ++#define AR6000_XIOCTL_WMI_SET_HB_CHALLENGE_RESP_PARAMS 52 ++ ++/* ++ * arguments: ++ * UINT32 cmd (AR6000_XIOCTL_WMI_GET_HB_CHALLENGE_RESP) ++ * UINT32 cookie ++ */ ++#define AR6000_XIOCTL_WMI_GET_HB_CHALLENGE_RESP 53 ++ ++/* ++ * arguments: ++ * UINT32 cmd (AR6000_XIOCTL_WMI_GET_RD) ++ * UINT32 regDomain ++ */ ++#define AR6000_XIOCTL_WMI_GET_RD 54 ++ ++#define AR6000_XIOCTL_DIAG_READ 55 ++ ++#define AR6000_XIOCTL_DIAG_WRITE 56 ++ ++/* ++ * arguments cmd (AR6000_XIOCTL_SET_TXOP) ++ * WMI_TXOP_CFG txopEnable ++ */ ++#define AR6000_XIOCTL_WMI_SET_TXOP 57 ++ ++#ifdef USER_KEYS ++/* ++ * arguments: ++ * UINT32 cmd (AR6000_XIOCTL_USER_SETKEYS) ++ * UINT32 keyOpCtrl ++ * uses AR6000_USER_SETKEYS_INFO ++ */ ++#define AR6000_XIOCTL_USER_SETKEYS 58 ++#endif /* USER_KEYS */ ++ ++#define AR6000_XIOCTL_WMI_SET_KEEPALIVE 59 ++/* ++ * arguments: ++ * UINT8 cmd (AR6000_XIOCTL_WMI_SET_KEEPALIVE) ++ * UINT8 keepaliveInterval ++ * uses: WMI_SET_KEEPALIVE_CMDID ++ */ ++ ++#define AR6000_XIOCTL_WMI_GET_KEEPALIVE 60 ++/* ++ * arguments: ++ * UINT8 cmd (AR6000_XIOCTL_WMI_GET_KEEPALIVE) ++ * UINT8 keepaliveInterval ++ * A_BOOL configured ++ * uses: WMI_GET_KEEPALIVE_CMDID ++ */ ++ ++/* ====ROM Patching Extended Ioctls==== */ ++ ++#define AR6000_XIOCTL_BMI_ROMPATCH_INSTALL 61 ++/* ++ * arguments: ++ * union { ++ * struct { ++ * UINT32 cmd (AR6000_XIOCTL_BMI_ROMPATCH_INSTALL) ++ * UINT32 ROM Address ++ * UINT32 RAM Address ++ * UINT32 number of bytes ++ * UINT32 activate? (0 or 1) ++ * } ++ * A_UINT32 resulting rompatch ID ++ * } ++ * uses: BMI_ROMPATCH_INSTALL ++ */ ++ ++#define AR6000_XIOCTL_BMI_ROMPATCH_UNINSTALL 62 ++/* ++ * arguments: ++ * struct { ++ * UINT32 cmd (AR6000_XIOCTL_BMI_ROMPATCH_UNINSTALL) ++ * UINT32 rompatch ID ++ * } ++ * uses: BMI_ROMPATCH_UNINSTALL ++ */ ++ ++#define AR6000_XIOCTL_BMI_ROMPATCH_ACTIVATE 63 ++/* ++ * arguments: ++ * struct { ++ * UINT32 cmd (AR6000_XIOCTL_BMI_ROMPATCH_ACTIVATE) ++ * UINT32 rompatch count ++ * UINT32 rompatch IDs[rompatch count] ++ * } ++ * uses: BMI_ROMPATCH_ACTIVATE ++ */ ++ ++#define AR6000_XIOCTL_BMI_ROMPATCH_DEACTIVATE 64 ++/* ++ * arguments: ++ * struct { ++ * UINT32 cmd (AR6000_XIOCTL_BMI_ROMPATCH_DEACTIVATE) ++ * UINT32 rompatch count ++ * UINT32 rompatch IDs[rompatch count] ++ * } ++ * uses: BMI_ROMPATCH_DEACTIVATE ++ */ ++ ++#define AR6000_XIOCTL_WMI_SET_APPIE 65 ++/* ++ * arguments: ++ * struct { ++ * UINT32 cmd (AR6000_XIOCTL_WMI_SET_APPIE) ++ * UINT32 app_frmtype; ++ * UINT32 app_buflen; ++ * UINT8 app_buf[]; ++ * } ++ */ ++#define AR6000_XIOCTL_WMI_SET_MGMT_FRM_RX_FILTER 66 ++/* ++ * arguments: ++ * A_UINT32 filter_type; ++ */ ++ ++#define AR6000_XIOCTL_DBGLOG_CFG_MODULE 67 ++ ++#define AR6000_XIOCTL_DBGLOG_GET_DEBUG_LOGS 68 ++ ++#define AR6000_XIOCTL_WMI_SET_WSC_STATUS 70 ++/* ++ * arguments: ++ * A_UINT32 wsc_status; ++ * (WSC_REG_INACTIVE or WSC_REG_ACTIVE) ++ */ ++ ++/* ++ * arguments: ++ * struct { ++ * A_UINT8 streamType; ++ * A_UINT8 status; ++ * } ++ * uses: WMI_SET_BT_STATUS_CMDID ++ */ ++#define AR6000_XIOCTL_WMI_SET_BT_STATUS 71 ++ ++/* ++ * arguments: ++ * struct { ++ * A_UINT8 paramType; ++ * union { ++ * A_UINT8 noSCOPkts; ++ * BT_PARAMS_A2DP a2dpParams; ++ * BT_COEX_REGS regs; ++ * }; ++ * } ++ * uses: WMI_SET_BT_PARAM_CMDID ++ */ ++#define AR6000_XIOCTL_WMI_SET_BT_PARAMS 72 ++ ++#define AR6000_XIOCTL_WMI_SET_HOST_SLEEP_MODE 73 ++#define AR6000_XIOCTL_WMI_SET_WOW_MODE 74 ++#define AR6000_XIOCTL_WMI_GET_WOW_LIST 75 ++#define AR6000_XIOCTL_WMI_ADD_WOW_PATTERN 76 ++#define AR6000_XIOCTL_WMI_DEL_WOW_PATTERN 77 ++ ++ ++ ++#define AR6000_XIOCTL_TARGET_INFO 78 ++/* ++ * arguments: ++ * UINT32 cmd (AR6000_XIOCTL_TARGET_INFO) ++ * A_UINT32 TargetVersion (returned) ++ * A_UINT32 TargetType (returned) ++ * (See also bmi_msg.h target_ver and target_type) ++ */ ++ ++#define AR6000_XIOCTL_DUMP_HTC_CREDIT_STATE 79 ++/* ++ * arguments: ++ * none ++ */ ++ ++#define AR6000_XIOCTL_TRAFFIC_ACTIVITY_CHANGE 80 ++/* ++ * This ioctl is used to emulate traffic activity ++ * timeouts. Activity/inactivity will trigger the driver ++ * to re-balance credits. ++ * ++ * arguments: ++ * ar6000_traffic_activity_change ++ */ ++ ++#define AR6000_XIOCTL_WMI_SET_CONNECT_CTRL_FLAGS 81 ++/* ++ * This ioctl is used to set the connect control flags ++ * ++ * arguments: ++ * A_UINT32 connectCtrlFlags ++ */ ++ ++#define AR6000_XIOCTL_WMI_SET_AKMP_PARAMS 82 ++/* ++ * This IOCTL sets any Authentication,Key Management and Protection ++ * related parameters. This is used along with the information set in ++ * Connect Command. ++ * Currently this enables Multiple PMKIDs to an AP. ++ * ++ * arguments: ++ * struct { ++ * A_UINT32 akmpInfo; ++ * } ++ * uses: WMI_SET_AKMP_PARAMS_CMD ++ */ ++ ++#define AR6000_XIOCTL_WMI_GET_PMKID_LIST 83 ++ ++#define AR6000_XIOCTL_WMI_SET_PMKID_LIST 84 ++/* ++ * This IOCTL is used to set a list of PMKIDs. This list of ++ * PMKIDs is used in the [Re]AssocReq Frame. This list is used ++ * only if the MultiPMKID option is enabled via the ++ * AR6000_XIOCTL_WMI_SET_AKMP_PARAMS IOCTL. ++ * ++ * arguments: ++ * struct { ++ * A_UINT32 numPMKID; ++ * WMI_PMKID pmkidList[WMI_MAX_PMKID_CACHE]; ++ * } ++ * uses: WMI_SET_PMKIDLIST_CMD ++ */ ++ ++/* Historical DSETPATCH support for INI patches */ ++#define AR6000_XIOCTL_UNUSED90 90 ++ ++ ++ ++/* used by AR6000_IOCTL_WMI_GETREV */ ++struct ar6000_version { ++ A_UINT32 host_ver; ++ A_UINT32 target_ver; ++}; ++ ++/* used by AR6000_IOCTL_WMI_GET_QOS_QUEUE */ ++struct ar6000_queuereq { ++ A_UINT8 trafficClass; ++ A_UINT16 activeTsids; ++}; ++ ++/* used by AR6000_IOCTL_WMI_GET_TARGET_STATS */ ++typedef struct targetStats_t { ++ A_UINT64 tx_packets; ++ A_UINT64 tx_bytes; ++ A_UINT64 tx_unicast_pkts; ++ A_UINT64 tx_unicast_bytes; ++ A_UINT64 tx_multicast_pkts; ++ A_UINT64 tx_multicast_bytes; ++ A_UINT64 tx_broadcast_pkts; ++ A_UINT64 tx_broadcast_bytes; ++ A_UINT64 tx_rts_success_cnt; ++ A_UINT64 tx_packet_per_ac[4]; ++ ++ A_UINT64 tx_errors; ++ A_UINT64 tx_failed_cnt; ++ A_UINT64 tx_retry_cnt; ++ A_UINT64 tx_rts_fail_cnt; ++ A_INT32 tx_unicast_rate; ++ A_UINT64 rx_packets; ++ A_UINT64 rx_bytes; ++ A_UINT64 rx_unicast_pkts; ++ A_UINT64 rx_unicast_bytes; ++ A_UINT64 rx_multicast_pkts; ++ A_UINT64 rx_multicast_bytes; ++ A_UINT64 rx_broadcast_pkts; ++ A_UINT64 rx_broadcast_bytes; ++ A_UINT64 rx_fragment_pkt; ++ ++ A_UINT64 rx_errors; ++ A_UINT64 rx_crcerr; ++ A_UINT64 rx_key_cache_miss; ++ A_UINT64 rx_decrypt_err; ++ A_UINT64 rx_duplicate_frames; ++ A_INT32 rx_unicast_rate; ++ ++ A_UINT64 tkip_local_mic_failure; ++ A_UINT64 tkip_counter_measures_invoked; ++ A_UINT64 tkip_replays; ++ A_UINT64 tkip_format_errors; ++ A_UINT64 ccmp_format_errors; ++ A_UINT64 ccmp_replays; ++ ++ A_UINT64 power_save_failure_cnt; ++ A_INT16 noise_floor_calibation; ++ ++ A_UINT64 cs_bmiss_cnt; ++ A_UINT64 cs_lowRssi_cnt; ++ A_UINT64 cs_connect_cnt; ++ A_UINT64 cs_disconnect_cnt; ++ A_UINT8 cs_aveBeacon_snr; ++ A_INT16 cs_aveBeacon_rssi; ++ A_UINT8 cs_lastRoam_msec; ++ A_UINT8 cs_snr; ++ A_INT16 cs_rssi; ++ ++ A_UINT32 lq_val; ++ ++ A_UINT32 wow_num_pkts_dropped; ++ A_UINT8 wow_num_host_pkt_wakeups; ++ A_UINT8 wow_num_host_event_wakeups; ++ A_UINT16 wow_num_events_discarded; ++ ++}TARGET_STATS; ++ ++typedef struct targetStats_cmd_t { ++ TARGET_STATS targetStats; ++ int clearStats; ++} TARGET_STATS_CMD; ++ ++/* used by AR6000_XIOCTL_USER_SETKEYS */ ++ ++/* ++ * Setting this bit to 1 doesnot initialize the RSC on the firmware ++ */ ++#define AR6000_XIOCTL_USER_SETKEYS_RSC_CTRL 1 ++#define AR6000_USER_SETKEYS_RSC_UNCHANGED 0x00000002 ++ ++typedef struct { ++ A_UINT32 keyOpCtrl; /* Bit Map of Key Mgmt Ctrl Flags */ ++} AR6000_USER_SETKEYS_INFO; ++ ++ ++/* used by AR6000_XIOCTL_GPIO_OUTPUT_SET */ ++struct ar6000_gpio_output_set_cmd_s { ++ A_UINT32 set_mask; ++ A_UINT32 clear_mask; ++ A_UINT32 enable_mask; ++ A_UINT32 disable_mask; ++}; ++ ++/* ++ * used by AR6000_XIOCTL_GPIO_REGISTER_GET and AR6000_XIOCTL_GPIO_REGISTER_SET ++ */ ++struct ar6000_gpio_register_cmd_s { ++ A_UINT32 gpioreg_id; ++ A_UINT32 value; ++}; ++ ++/* used by AR6000_XIOCTL_GPIO_INTR_ACK */ ++struct ar6000_gpio_intr_ack_cmd_s { ++ A_UINT32 ack_mask; ++}; ++ ++/* used by AR6000_XIOCTL_GPIO_INTR_WAIT */ ++struct ar6000_gpio_intr_wait_cmd_s { ++ A_UINT32 intr_mask; ++ A_UINT32 input_values; ++}; ++ ++/* used by the AR6000_XIOCTL_DBGLOG_CFG_MODULE */ ++typedef struct ar6000_dbglog_module_config_s { ++ A_UINT32 valid; ++ A_UINT16 mmask; ++ A_UINT16 tsr; ++ A_BOOL rep; ++ A_UINT16 size; ++} DBGLOG_MODULE_CONFIG; ++ ++typedef struct user_rssi_thold_t { ++ A_INT16 tag; ++ A_INT16 rssi; ++} USER_RSSI_THOLD; ++ ++typedef struct user_rssi_params_t { ++ A_UINT8 weight; ++ A_UINT32 pollTime; ++ USER_RSSI_THOLD tholds[12]; ++} USER_RSSI_PARAMS; ++ ++/* ++ * Host driver may have some config parameters. Typically, these ++ * config params are one time config parameters. These could ++ * correspond to any of the underlying modules. Host driver exposes ++ * an api for the underlying modules to get this config. ++ */ ++#define AR6000_DRIVER_CFG_BASE 0x8000 ++ ++/* Should driver perform wlan node caching? */ ++#define AR6000_DRIVER_CFG_GET_WLANNODECACHING 0x8001 ++/*Should we log raw WMI msgs */ ++#define AR6000_DRIVER_CFG_LOG_RAW_WMI_MSGS 0x8002 ++ ++/* used by AR6000_XIOCTL_DIAG_READ & AR6000_XIOCTL_DIAG_WRITE */ ++struct ar6000_diag_window_cmd_s { ++ unsigned int addr; ++ unsigned int value; ++}; ++ ++ ++struct ar6000_traffic_activity_change { ++ A_UINT32 StreamID; /* stream ID to indicate activity change */ ++ A_UINT32 Active; /* active (1) or inactive (0) */ ++}; ++ ++#ifdef __cplusplus ++} ++#endif ++#endif +diff --git a/drivers/sdio/function/wlan/ar6000/ar6000/athtypes_linux.h b/drivers/sdio/function/wlan/ar6000/ar6000/athtypes_linux.h +new file mode 100644 +index 0000000..3e91de3 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/ar6000/athtypes_linux.h +@@ -0,0 +1,47 @@ ++/* ++ * $Id: //depot/sw/releases/olca2.0-GPL/host/os/linux/include/athtypes_linux.h#1 $ ++ * ++ * This file contains the definitions of the basic atheros data types. ++ * It is used to map the data types in atheros files to a platform specific ++ * type. ++ * ++ * Copyright 2003-2005 Atheros Communications, Inc., All Rights Reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++#ifndef _ATHTYPES_LINUX_H_ ++#define _ATHTYPES_LINUX_H_ ++ ++#ifdef __KERNEL__ ++#include ++#endif ++ ++typedef int8_t A_INT8; ++typedef int16_t A_INT16; ++typedef int32_t A_INT32; ++typedef int64_t A_INT64; ++ ++typedef u_int8_t A_UINT8; ++typedef u_int16_t A_UINT16; ++typedef u_int32_t A_UINT32; ++typedef u_int64_t A_UINT64; ++ ++typedef int A_BOOL; ++typedef char A_CHAR; ++typedef unsigned char A_UCHAR; ++typedef unsigned long A_ATH_TIMER; ++ ++ ++#endif /* _ATHTYPES_LINUX_H_ */ +diff --git a/drivers/sdio/function/wlan/ar6000/ar6000/config_linux.h b/drivers/sdio/function/wlan/ar6000/ar6000/config_linux.h +new file mode 100644 +index 0000000..11a691d +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/ar6000/config_linux.h +@@ -0,0 +1,44 @@ ++/* ++ * Copyright (c) 2004-2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++#ifndef _CONFIG_LINUX_H_ ++#define _CONFIG_LINUX_H_ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++/* ++ * Host-side GPIO support is optional. ++ * If run-time access to GPIO pins is not required, then ++ * this should be changed to #undef. ++ */ ++#define CONFIG_HOST_GPIO_SUPPORT ++ ++/* ++ * Host side Test Command support ++ */ ++#define CONFIG_HOST_TCMD_SUPPORT ++ ++#define USE_4BYTE_REGISTER_ACCESS ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif +diff --git a/drivers/sdio/function/wlan/ar6000/ar6000/debug_linux.h b/drivers/sdio/function/wlan/ar6000/ar6000/debug_linux.h +new file mode 100644 +index 0000000..e62e960 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/ar6000/debug_linux.h +@@ -0,0 +1,86 @@ ++/* ++ * Copyright (c) 2004-2006 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++#ifndef _DEBUG_LINUX_H_ ++#define _DEBUG_LINUX_H_ ++ ++#define DBG_DEFAULTS (DBG_ERROR|DBG_WARNING) ++ ++extern A_UINT32 g_dbg_flags; ++ ++#define DBGFMT "%s() : " ++#define DBGARG __func__ ++#define DBGFN A_PRINTF ++ ++/* ------- Debug related stuff ------- */ ++enum { ++ ATH_DEBUG_SEND = 0x0001, ++ ATH_DEBUG_RECV = 0x0002, ++ ATH_DEBUG_SYNC = 0x0004, ++ ATH_DEBUG_DUMP = 0x0008, ++ ATH_DEBUG_IRQ = 0x0010, ++ ATH_DEBUG_TRC = 0x0020, ++ ATH_DEBUG_WARN = 0x0040, ++ ATH_DEBUG_ERR = 0x0080, ++ ATH_LOG_INF = 0x0100, ++ ATH_DEBUG_BMI = 0x0110, ++ ATH_DEBUG_WMI = 0x0120, ++ ATH_DEBUG_HIF = 0x0140, ++ ATH_DEBUG_HTC = 0x0180, ++ ATH_DEBUG_WLAN = 0x1000, ++ ATH_LOG_ERR = 0x1010, ++ ATH_DEBUG_ANY = 0xFFFF, ++}; ++ ++#ifdef DEBUG ++ ++#define A_DPRINTF(f, a) \ ++ if(g_dbg_flags & (f)) \ ++ { \ ++ DBGFN a ; \ ++ } ++ ++ ++// TODO FIX usage of A_PRINTF! ++#define AR_DEBUG_LVL_CHECK(lvl) (debughtc & (lvl)) ++#define AR_DEBUG_PRINTBUF(buffer, length, desc) do { \ ++ if (debughtc & ATH_DEBUG_DUMP) { \ ++ DebugDumpBytes(buffer, length,desc); \ ++ } \ ++} while(0) ++#define PRINTX_ARG(arg...) arg ++#define AR_DEBUG_PRINTF(flags, args) do { \ ++ if (debughtc & (flags)) { \ ++ A_PRINTF(KERN_ALERT PRINTX_ARG args); \ ++ } \ ++} while (0) ++#define AR_DEBUG_ASSERT(test) do { \ ++ if (!(test)) { \ ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Debug Assert Caught, File %s, Line: %d, Test:%s \n",__FILE__, __LINE__,#test)); \ ++ } \ ++} while(0) ++extern int debughtc; ++#else ++#define AR_DEBUG_PRINTF(flags, args) ++#define AR_DEBUG_PRINTBUF(buffer, length) ++#define AR_DEBUG_ASSERT(test) ++#define AR_DEBUG_LVL_CHECK(lvl) 0 ++#define A_DPRINTF(f, a) ++#endif ++ ++#endif /* _DEBUG_LINUX_H_ */ +diff --git a/drivers/sdio/function/wlan/ar6000/ar6000/ioctl.c b/drivers/sdio/function/wlan/ar6000/ar6000/ioctl.c +new file mode 100644 +index 0000000..eb712b4 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/ar6000/ioctl.c +@@ -0,0 +1,2540 @@ ++/* ++ * ++ * Copyright (c) 2004-2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++#include "ar6000_drv.h" ++ ++static A_UINT8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; ++static A_UINT8 null_mac[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0}; ++extern USER_RSSI_THOLD rssi_map[12]; ++extern unsigned int wmitimeout; ++extern A_WAITQUEUE_HEAD arEvent; ++extern int tspecCompliance; ++extern int bmienable; ++extern int bypasswmi; ++ ++static int ++ar6000_ioctl_get_roam_tbl(struct net_device *dev, struct ifreq *rq) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ ++ if(wmi_get_roam_tbl_cmd(ar->arWmi) != A_OK) { ++ return -EIO; ++ } ++ ++ return 0; ++} ++ ++static int ++ar6000_ioctl_get_roam_data(struct net_device *dev, struct ifreq *rq) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ ++ ++ /* currently assume only roam times are required */ ++ if(wmi_get_roam_data_cmd(ar->arWmi, ROAM_DATA_TIME) != A_OK) { ++ return -EIO; ++ } ++ ++ ++ return 0; ++} ++ ++static int ++ar6000_ioctl_set_roam_ctrl(struct net_device *dev, char *userdata) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ WMI_SET_ROAM_CTRL_CMD cmd; ++ A_UINT8 size = sizeof(cmd); ++ ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ ++ ++ if (copy_from_user(&cmd, userdata, size)) { ++ return -EFAULT; ++ } ++ ++ if (cmd.roamCtrlType == WMI_SET_HOST_BIAS) { ++ if (cmd.info.bssBiasInfo.numBss > 1) { ++ size += (cmd.info.bssBiasInfo.numBss - 1) * sizeof(WMI_BSS_BIAS); ++ } ++ } ++ ++ if (copy_from_user(&cmd, userdata, size)) { ++ return -EFAULT; ++ } ++ ++ if(wmi_set_roam_ctrl_cmd(ar->arWmi, &cmd, size) != A_OK) { ++ return -EIO; ++ } ++ ++ return 0; ++} ++ ++static int ++ar6000_ioctl_set_powersave_timers(struct net_device *dev, char *userdata) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ WMI_POWERSAVE_TIMERS_POLICY_CMD cmd; ++ A_UINT8 size = sizeof(cmd); ++ ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ ++ if (copy_from_user(&cmd, userdata, size)) { ++ return -EFAULT; ++ } ++ ++ if (copy_from_user(&cmd, userdata, size)) { ++ return -EFAULT; ++ } ++ ++ if(wmi_set_powersave_timers_cmd(ar->arWmi, &cmd, size) != A_OK) { ++ return -EIO; ++ } ++ ++ return 0; ++} ++ ++static int ++ar6000_ioctl_set_wmm(struct net_device *dev, struct ifreq *rq) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ WMI_SET_WMM_CMD cmd; ++ A_STATUS ret; ++ ++ if ((dev->flags & IFF_UP) != IFF_UP) { ++ return -EIO; ++ } ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ ++ if (copy_from_user(&cmd, (char *)((unsigned int*)rq->ifr_data + 1), ++ sizeof(cmd))) ++ { ++ return -EFAULT; ++ } ++ ++ if (cmd.status == WMI_WMM_ENABLED) { ++ ar->arWmmEnabled = TRUE; ++ } else { ++ ar->arWmmEnabled = FALSE; ++ } ++ ++ ret = wmi_set_wmm_cmd(ar->arWmi, cmd.status); ++ ++ switch (ret) { ++ case A_OK: ++ return 0; ++ case A_EBUSY : ++ return -EBUSY; ++ case A_NO_MEMORY: ++ return -ENOMEM; ++ case A_EINVAL: ++ default: ++ return -EFAULT; ++ } ++} ++ ++static int ++ar6000_ioctl_set_txop(struct net_device *dev, struct ifreq *rq) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ WMI_SET_WMM_TXOP_CMD cmd; ++ A_STATUS ret; ++ ++ if ((dev->flags & IFF_UP) != IFF_UP) { ++ return -EIO; ++ } ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ ++ if (copy_from_user(&cmd, (char *)((unsigned int*)rq->ifr_data + 1), ++ sizeof(cmd))) ++ { ++ return -EFAULT; ++ } ++ ++ ret = wmi_set_wmm_txop(ar->arWmi, cmd.txopEnable); ++ ++ switch (ret) { ++ case A_OK: ++ return 0; ++ case A_EBUSY : ++ return -EBUSY; ++ case A_NO_MEMORY: ++ return -ENOMEM; ++ case A_EINVAL: ++ default: ++ return -EFAULT; ++ } ++} ++ ++static int ++ar6000_ioctl_get_rd(struct net_device *dev, struct ifreq *rq) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ A_STATUS ret = 0; ++ ++ if ((dev->flags & IFF_UP) != IFF_UP || ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ ++ if(copy_to_user((char *)((unsigned int*)rq->ifr_data + 1), ++ &ar->arRegCode, sizeof(ar->arRegCode))) ++ ret = -EFAULT; ++ ++ return ret; ++} ++ ++ ++/* Get power mode command */ ++static int ++ar6000_ioctl_get_power_mode(struct net_device *dev, struct ifreq *rq) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ WMI_POWER_MODE_CMD power_mode; ++ int ret = 0; ++ ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ ++ power_mode.powerMode = wmi_get_power_mode_cmd(ar->arWmi); ++ if (copy_to_user(rq->ifr_data, &power_mode, sizeof(WMI_POWER_MODE_CMD))) { ++ ret = -EFAULT; ++ } ++ ++ return ret; ++} ++ ++ ++static int ++ar6000_ioctl_set_channelParams(struct net_device *dev, struct ifreq *rq) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ WMI_CHANNEL_PARAMS_CMD cmd, *cmdp; ++ int ret = 0; ++ ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ ++ ++ if (copy_from_user(&cmd, rq->ifr_data, sizeof(cmd))) { ++ return -EFAULT; ++ } ++ ++ if (cmd.numChannels > 1) { ++ cmdp = A_MALLOC(130); ++ if (copy_from_user(cmdp, rq->ifr_data, ++ sizeof (*cmdp) + ++ ((cmd.numChannels - 1) * sizeof(A_UINT16)))) ++ { ++ kfree(cmdp); ++ return -EFAULT; ++ } ++ } else { ++ cmdp = &cmd; ++ } ++ ++ if ((ar->arPhyCapability == WMI_11G_CAPABILITY) && ++ ((cmdp->phyMode == WMI_11A_MODE) || (cmdp->phyMode == WMI_11AG_MODE))) ++ { ++ ret = -EINVAL; ++ } ++ ++ if (!ret && ++ (wmi_set_channelParams_cmd(ar->arWmi, cmdp->scanParam, cmdp->phyMode, ++ cmdp->numChannels, cmdp->channelList) ++ != A_OK)) ++ { ++ ret = -EIO; ++ } ++ ++ if (cmd.numChannels > 1) { ++ kfree(cmdp); ++ } ++ ++ return ret; ++} ++ ++static int ++ar6000_ioctl_set_snr_threshold(struct net_device *dev, struct ifreq *rq) ++{ ++ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ WMI_SNR_THRESHOLD_PARAMS_CMD cmd; ++ int ret = 0; ++ ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ ++ if (copy_from_user(&cmd, rq->ifr_data, sizeof(cmd))) { ++ return -EFAULT; ++ } ++ ++ if( wmi_set_snr_threshold_params(ar->arWmi, &cmd) != A_OK ) { ++ ret = -EIO; ++ } ++ ++ return ret; ++} ++ ++static int ++ar6000_ioctl_set_rssi_threshold(struct net_device *dev, struct ifreq *rq) ++{ ++#define SWAP_THOLD(thold1, thold2) do { \ ++ USER_RSSI_THOLD tmpThold; \ ++ tmpThold.tag = thold1.tag; \ ++ tmpThold.rssi = thold1.rssi; \ ++ thold1.tag = thold2.tag; \ ++ thold1.rssi = thold2.rssi; \ ++ thold2.tag = tmpThold.tag; \ ++ thold2.rssi = tmpThold.rssi; \ ++} while (0) ++ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ WMI_RSSI_THRESHOLD_PARAMS_CMD cmd; ++ USER_RSSI_PARAMS rssiParams; ++ A_INT32 i, j; ++ ++ int ret = 0; ++ ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ ++ if (copy_from_user((char *)&rssiParams, (char *)((unsigned int *)rq->ifr_data + 1), sizeof(USER_RSSI_PARAMS))) { ++ return -EFAULT; ++ } ++ cmd.weight = rssiParams.weight; ++ cmd.pollTime = rssiParams.pollTime; ++ ++ A_MEMCPY(rssi_map, &rssiParams.tholds, sizeof(rssi_map)); ++ /* ++ * only 6 elements, so use bubble sorting, in ascending order ++ */ ++ for (i = 5; i > 0; i--) { ++ for (j = 0; j < i; j++) { /* above tholds */ ++ if (rssi_map[j+1].rssi < rssi_map[j].rssi) { ++ SWAP_THOLD(rssi_map[j+1], rssi_map[j]); ++ } else if (rssi_map[j+1].rssi == rssi_map[j].rssi) { ++ return EFAULT; ++ } ++ } ++ } ++ for (i = 11; i > 6; i--) { ++ for (j = 6; j < i; j++) { /* below tholds */ ++ if (rssi_map[j+1].rssi < rssi_map[j].rssi) { ++ SWAP_THOLD(rssi_map[j+1], rssi_map[j]); ++ } else if (rssi_map[j+1].rssi == rssi_map[j].rssi) { ++ return EFAULT; ++ } ++ } ++ } ++ ++#ifdef DEBUG ++ for (i = 0; i < 12; i++) { ++ AR_DEBUG2_PRINTF("thold[%d].tag: %d, thold[%d].rssi: %d \n", ++ i, rssi_map[i].tag, i, rssi_map[i].rssi); ++ } ++#endif ++ cmd.thresholdAbove1_Val = rssi_map[0].rssi; ++ cmd.thresholdAbove2_Val = rssi_map[1].rssi; ++ cmd.thresholdAbove3_Val = rssi_map[2].rssi; ++ cmd.thresholdAbove4_Val = rssi_map[3].rssi; ++ cmd.thresholdAbove5_Val = rssi_map[4].rssi; ++ cmd.thresholdAbove6_Val = rssi_map[5].rssi; ++ cmd.thresholdBelow1_Val = rssi_map[6].rssi; ++ cmd.thresholdBelow2_Val = rssi_map[7].rssi; ++ cmd.thresholdBelow3_Val = rssi_map[8].rssi; ++ cmd.thresholdBelow4_Val = rssi_map[9].rssi; ++ cmd.thresholdBelow5_Val = rssi_map[10].rssi; ++ cmd.thresholdBelow6_Val = rssi_map[11].rssi; ++ ++ if( wmi_set_rssi_threshold_params(ar->arWmi, &cmd) != A_OK ) { ++ ret = -EIO; ++ } ++ ++ return ret; ++} ++ ++static int ++ar6000_ioctl_set_lq_threshold(struct net_device *dev, struct ifreq *rq) ++{ ++ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ WMI_LQ_THRESHOLD_PARAMS_CMD cmd; ++ int ret = 0; ++ ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ ++ if (copy_from_user(&cmd, (char *)((unsigned int *)rq->ifr_data + 1), sizeof(cmd))) { ++ return -EFAULT; ++ } ++ ++ if( wmi_set_lq_threshold_params(ar->arWmi, &cmd) != A_OK ) { ++ ret = -EIO; ++ } ++ ++ return ret; ++} ++ ++ ++static int ++ar6000_ioctl_set_probedSsid(struct net_device *dev, struct ifreq *rq) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ WMI_PROBED_SSID_CMD cmd; ++ int ret = 0; ++ ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ ++ if (copy_from_user(&cmd, rq->ifr_data, sizeof(cmd))) { ++ return -EFAULT; ++ } ++ ++ if (wmi_probedSsid_cmd(ar->arWmi, cmd.entryIndex, cmd.flag, cmd.ssidLength, ++ cmd.ssid) != A_OK) ++ { ++ ret = -EIO; ++ } ++ ++ return ret; ++} ++ ++static int ++ar6000_ioctl_set_badAp(struct net_device *dev, struct ifreq *rq) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ WMI_ADD_BAD_AP_CMD cmd; ++ int ret = 0; ++ ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ ++ ++ if (copy_from_user(&cmd, rq->ifr_data, sizeof(cmd))) { ++ return -EFAULT; ++ } ++ ++ if (cmd.badApIndex > WMI_MAX_BAD_AP_INDEX) { ++ return -EIO; ++ } ++ ++ if (A_MEMCMP(cmd.bssid, null_mac, AR6000_ETH_ADDR_LEN) == 0) { ++ /* ++ * This is a delete badAP. ++ */ ++ if (wmi_deleteBadAp_cmd(ar->arWmi, cmd.badApIndex) != A_OK) { ++ ret = -EIO; ++ } ++ } else { ++ if (wmi_addBadAp_cmd(ar->arWmi, cmd.badApIndex, cmd.bssid) != A_OK) { ++ ret = -EIO; ++ } ++ } ++ ++ return ret; ++} ++ ++static int ++ar6000_ioctl_create_qos(struct net_device *dev, struct ifreq *rq) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ WMI_CREATE_PSTREAM_CMD cmd; ++ A_STATUS ret; ++ ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ ++ ++ if (copy_from_user(&cmd, rq->ifr_data, sizeof(cmd))) { ++ return -EFAULT; ++ } ++ ++ ret = wmi_verify_tspec_params(&cmd, tspecCompliance); ++ if (ret == A_OK) ++ ret = wmi_create_pstream_cmd(ar->arWmi, &cmd); ++ ++ switch (ret) { ++ case A_OK: ++ return 0; ++ case A_EBUSY : ++ return -EBUSY; ++ case A_NO_MEMORY: ++ return -ENOMEM; ++ case A_EINVAL: ++ default: ++ return -EFAULT; ++ } ++} ++ ++static int ++ar6000_ioctl_delete_qos(struct net_device *dev, struct ifreq *rq) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ WMI_DELETE_PSTREAM_CMD cmd; ++ int ret = 0; ++ ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ ++ if (copy_from_user(&cmd, rq->ifr_data, sizeof(cmd))) { ++ return -EFAULT; ++ } ++ ++ ret = wmi_delete_pstream_cmd(ar->arWmi, cmd.trafficClass, cmd.tsid); ++ ++ switch (ret) { ++ case A_OK: ++ return 0; ++ case A_EBUSY : ++ return -EBUSY; ++ case A_NO_MEMORY: ++ return -ENOMEM; ++ case A_EINVAL: ++ default: ++ return -EFAULT; ++ } ++} ++ ++static int ++ar6000_ioctl_get_qos_queue(struct net_device *dev, struct ifreq *rq) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ struct ar6000_queuereq qreq; ++ int ret = 0; ++ ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ ++ if( copy_from_user(&qreq, rq->ifr_data, ++ sizeof(struct ar6000_queuereq))) ++ return -EFAULT; ++ ++ qreq.activeTsids = wmi_get_mapped_qos_queue(ar->arWmi, qreq.trafficClass); ++ ++ if (copy_to_user(rq->ifr_data, &qreq, ++ sizeof(struct ar6000_queuereq))) ++ { ++ ret = -EFAULT; ++ } ++ ++ return ret; ++} ++ ++#ifdef CONFIG_HOST_TCMD_SUPPORT ++static A_STATUS ++ar6000_ioctl_tcmd_get_rx_report(struct net_device *dev, ++ struct ifreq *rq, A_UINT8 *data, A_UINT32 len) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ A_UINT32 buf[2]; ++ int ret = 0; ++ ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ ++ if (down_interruptible(&ar->arSem)) { ++ return -ERESTARTSYS; ++ } ++ ar->tcmdRxReport = 0; ++ if (wmi_test_cmd(ar->arWmi, data, len) != A_OK) { ++ up(&ar->arSem); ++ return -EIO; ++ } ++ ++ wait_event_interruptible_timeout(arEvent, ar->tcmdRxReport != 0, wmitimeout * HZ); ++ ++ if (signal_pending(current)) { ++ ret = -EINTR; ++ } ++ ++ buf[0] = ar->tcmdRxTotalPkt; ++ buf[1] = ar->tcmdRxRssi; ++ if (!ret && copy_to_user(rq->ifr_data, buf, sizeof(buf))) { ++ ret = -EFAULT; ++ } ++ ++ up(&ar->arSem); ++ ++ return ret; ++} ++ ++void ++ar6000_tcmd_rx_report_event(void *devt, A_UINT8 * results, int len) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)devt; ++ TCMD_CONT_RX * rx_rep = (TCMD_CONT_RX *)results; ++ ++ ar->tcmdRxTotalPkt = rx_rep->u.report.totalPkt; ++ ar->tcmdRxRssi = rx_rep->u.report.rssiInDBm; ++ ar->tcmdRxReport = 1; ++ ++ wake_up(&arEvent); ++} ++#endif /* CONFIG_HOST_TCMD_SUPPORT*/ ++ ++static int ++ar6000_ioctl_set_error_report_bitmask(struct net_device *dev, struct ifreq *rq) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ WMI_TARGET_ERROR_REPORT_BITMASK cmd; ++ int ret = 0; ++ ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ ++ if (copy_from_user(&cmd, rq->ifr_data, sizeof(cmd))) { ++ return -EFAULT; ++ } ++ ++ ret = wmi_set_error_report_bitmask(ar->arWmi, cmd.bitmask); ++ ++ return (ret==0 ? ret : -EINVAL); ++} ++ ++static int ++ar6000_clear_target_stats(struct net_device *dev) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ TARGET_STATS *pStats = &ar->arTargetStats; ++ int ret = 0; ++ ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ AR6000_SPIN_LOCK(&ar->arLock, 0); ++ A_MEMZERO(pStats, sizeof(TARGET_STATS)); ++ AR6000_SPIN_UNLOCK(&ar->arLock, 0); ++ return ret; ++} ++ ++static int ++ar6000_ioctl_get_target_stats(struct net_device *dev, struct ifreq *rq) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ TARGET_STATS_CMD cmd; ++ TARGET_STATS *pStats = &ar->arTargetStats; ++ int ret = 0; ++ ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ if (copy_from_user(&cmd, rq->ifr_data, sizeof(cmd))) { ++ return -EFAULT; ++ } ++ if (down_interruptible(&ar->arSem)) { ++ return -ERESTARTSYS; ++ } ++ ++ ar->statsUpdatePending = TRUE; ++ ++ if(wmi_get_stats_cmd(ar->arWmi) != A_OK) { ++ up(&ar->arSem); ++ return -EIO; ++ } ++ ++ wait_event_interruptible_timeout(arEvent, ar->statsUpdatePending == FALSE, wmitimeout * HZ); ++ ++ if (signal_pending(current)) { ++ ret = -EINTR; ++ } ++ ++ if (!ret && copy_to_user(rq->ifr_data, pStats, sizeof(*pStats))) { ++ ret = -EFAULT; ++ } ++ ++ if (cmd.clearStats == 1) { ++ ret = ar6000_clear_target_stats(dev); ++ } ++ ++ up(&ar->arSem); ++ ++ return ret; ++} ++ ++static int ++ar6000_ioctl_set_access_params(struct net_device *dev, struct ifreq *rq) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ WMI_SET_ACCESS_PARAMS_CMD cmd; ++ int ret = 0; ++ ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ ++ if (copy_from_user(&cmd, rq->ifr_data, sizeof(cmd))) { ++ return -EFAULT; ++ } ++ ++ if (wmi_set_access_params_cmd(ar->arWmi, cmd.txop, cmd.eCWmin, cmd.eCWmax, ++ cmd.aifsn) == A_OK) ++ { ++ ret = 0; ++ } else { ++ ret = -EINVAL; ++ } ++ ++ return (ret); ++} ++ ++static int ++ar6000_ioctl_set_disconnect_timeout(struct net_device *dev, struct ifreq *rq) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ WMI_DISC_TIMEOUT_CMD cmd; ++ int ret = 0; ++ ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ ++ if (copy_from_user(&cmd, rq->ifr_data, sizeof(cmd))) { ++ return -EFAULT; ++ } ++ ++ if (wmi_disctimeout_cmd(ar->arWmi, cmd.disconnectTimeout) == A_OK) ++ { ++ ret = 0; ++ } else { ++ ret = -EINVAL; ++ } ++ ++ return (ret); ++} ++ ++static int ++ar6000_xioctl_set_voice_pkt_size(struct net_device *dev, char * userdata) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ WMI_SET_VOICE_PKT_SIZE_CMD cmd; ++ int ret = 0; ++ ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ ++ if (copy_from_user(&cmd, userdata, sizeof(cmd))) { ++ return -EFAULT; ++ } ++ ++ if (wmi_set_voice_pkt_size_cmd(ar->arWmi, cmd.voicePktSize) == A_OK) ++ { ++ ret = 0; ++ } else { ++ ret = -EINVAL; ++ } ++ ++ ++ return (ret); ++} ++ ++static int ++ar6000_xioctl_set_max_sp_len(struct net_device *dev, char * userdata) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ WMI_SET_MAX_SP_LEN_CMD cmd; ++ int ret = 0; ++ ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ ++ if (copy_from_user(&cmd, userdata, sizeof(cmd))) { ++ return -EFAULT; ++ } ++ ++ if (wmi_set_max_sp_len_cmd(ar->arWmi, cmd.maxSPLen) == A_OK) ++ { ++ ret = 0; ++ } else { ++ ret = -EINVAL; ++ } ++ ++ return (ret); ++} ++ ++ ++static int ++ar6000_xioctl_set_bt_status_cmd(struct net_device *dev, char * userdata) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ WMI_SET_BT_STATUS_CMD cmd; ++ int ret = 0; ++ ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ ++ if (copy_from_user(&cmd, userdata, sizeof(cmd))) { ++ return -EFAULT; ++ } ++ ++ if (wmi_set_bt_status_cmd(ar->arWmi, cmd.streamType, cmd.status) == A_OK) ++ { ++ ret = 0; ++ } else { ++ ret = -EINVAL; ++ } ++ ++ return (ret); ++} ++ ++static int ++ar6000_xioctl_set_bt_params_cmd(struct net_device *dev, char * userdata) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ WMI_SET_BT_PARAMS_CMD cmd; ++ int ret = 0; ++ ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ ++ if (copy_from_user(&cmd, userdata, sizeof(cmd))) { ++ return -EFAULT; ++ } ++ ++ if (wmi_set_bt_params_cmd(ar->arWmi, &cmd) == A_OK) ++ { ++ ret = 0; ++ } else { ++ ret = -EINVAL; ++ } ++ ++ return (ret); ++} ++ ++#ifdef CONFIG_HOST_GPIO_SUPPORT ++struct ar6000_gpio_intr_wait_cmd_s gpio_intr_results; ++/* gpio_reg_results and gpio_data_available are protected by arSem */ ++static struct ar6000_gpio_register_cmd_s gpio_reg_results; ++static A_BOOL gpio_data_available; /* Requested GPIO data available */ ++static A_BOOL gpio_intr_available; /* GPIO interrupt info available */ ++static A_BOOL gpio_ack_received; /* GPIO ack was received */ ++ ++/* Host-side initialization for General Purpose I/O support */ ++void ar6000_gpio_init(void) ++{ ++ gpio_intr_available = FALSE; ++ gpio_data_available = FALSE; ++ gpio_ack_received = FALSE; ++} ++ ++/* ++ * Called when a GPIO interrupt is received from the Target. ++ * intr_values shows which GPIO pins have interrupted. ++ * input_values shows a recent value of GPIO pins. ++ */ ++void ++ar6000_gpio_intr_rx(A_UINT32 intr_mask, A_UINT32 input_values) ++{ ++ gpio_intr_results.intr_mask = intr_mask; ++ gpio_intr_results.input_values = input_values; ++ *((volatile A_BOOL *)&gpio_intr_available) = TRUE; ++ wake_up(&arEvent); ++} ++ ++/* ++ * This is called when a response is received from the Target ++ * for a previous or ar6000_gpio_input_get or ar6000_gpio_register_get ++ * call. ++ */ ++void ++ar6000_gpio_data_rx(A_UINT32 reg_id, A_UINT32 value) ++{ ++ gpio_reg_results.gpioreg_id = reg_id; ++ gpio_reg_results.value = value; ++ *((volatile A_BOOL *)&gpio_data_available) = TRUE; ++ wake_up(&arEvent); ++} ++ ++/* ++ * This is called when an acknowledgement is received from the Target ++ * for a previous or ar6000_gpio_output_set or ar6000_gpio_register_set ++ * call. ++ */ ++void ++ar6000_gpio_ack_rx(void) ++{ ++ gpio_ack_received = TRUE; ++ wake_up(&arEvent); ++} ++ ++A_STATUS ++ar6000_gpio_output_set(struct net_device *dev, ++ A_UINT32 set_mask, ++ A_UINT32 clear_mask, ++ A_UINT32 enable_mask, ++ A_UINT32 disable_mask) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ ++ gpio_ack_received = FALSE; ++ return wmi_gpio_output_set(ar->arWmi, ++ set_mask, clear_mask, enable_mask, disable_mask); ++} ++ ++static A_STATUS ++ar6000_gpio_input_get(struct net_device *dev) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ ++ *((volatile A_BOOL *)&gpio_data_available) = FALSE; ++ return wmi_gpio_input_get(ar->arWmi); ++} ++ ++static A_STATUS ++ar6000_gpio_register_set(struct net_device *dev, ++ A_UINT32 gpioreg_id, ++ A_UINT32 value) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ ++ gpio_ack_received = FALSE; ++ return wmi_gpio_register_set(ar->arWmi, gpioreg_id, value); ++} ++ ++static A_STATUS ++ar6000_gpio_register_get(struct net_device *dev, ++ A_UINT32 gpioreg_id) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ ++ *((volatile A_BOOL *)&gpio_data_available) = FALSE; ++ return wmi_gpio_register_get(ar->arWmi, gpioreg_id); ++} ++ ++static A_STATUS ++ar6000_gpio_intr_ack(struct net_device *dev, ++ A_UINT32 ack_mask) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ ++ gpio_intr_available = FALSE; ++ return wmi_gpio_intr_ack(ar->arWmi, ack_mask); ++} ++#endif /* CONFIG_HOST_GPIO_SUPPORT */ ++ ++int ar6000_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ HIF_DEVICE *hifDevice = ar->arHifDevice; ++ int ret, param, param2; ++ unsigned int address = 0; ++ unsigned int length = 0; ++ unsigned char *buffer; ++ char *userdata; ++ A_UINT32 connectCtrlFlags; ++ ++ ++ static WMI_SCAN_PARAMS_CMD scParams = {0, 0, 0, 0, 0, ++ WMI_SHORTSCANRATIO_DEFAULT, ++ DEFAULT_SCAN_CTRL_FLAGS, ++ 0}; ++ WMI_SET_AKMP_PARAMS_CMD akmpParams; ++ WMI_SET_PMKID_LIST_CMD pmkidInfo; ++ ++ if (cmd == AR6000_IOCTL_EXTENDED) ++ { ++ /* ++ * This allows for many more wireless ioctls than would otherwise ++ * be available. Applications embed the actual ioctl command in ++ * the first word of the parameter block, and use the command ++ * AR6000_IOCTL_EXTENDED_CMD on the ioctl call. ++ */ ++ get_user(cmd, (int *)rq->ifr_data); ++ userdata = (char *)(((unsigned int *)rq->ifr_data)+1); ++ } ++ else ++ { ++ userdata = (char *)rq->ifr_data; ++ } ++ ++ if ((ar->arWlanState == WLAN_DISABLED) && ++ ((cmd != AR6000_XIOCTRL_WMI_SET_WLAN_STATE) && ++ (cmd != AR6000_XIOCTL_DIAG_READ) && ++ (cmd != AR6000_XIOCTL_DIAG_WRITE))) ++ { ++ return -EIO; ++ } ++ ++ ret = 0; ++ switch(cmd) ++ { ++#ifdef CONFIG_HOST_TCMD_SUPPORT ++ case AR6000_XIOCTL_TCMD_CONT_TX: ++ { ++ TCMD_CONT_TX txCmd; ++ ++ if (ar->tcmdPm == TCMD_PM_SLEEP) { ++ A_PRINTF("Can NOT send tx tcmd when target is asleep! \n"); ++ return -EFAULT; ++ } ++ ++ if(copy_from_user(&txCmd, userdata, sizeof(TCMD_CONT_TX))) ++ return -EFAULT; ++ wmi_test_cmd(ar->arWmi,(A_UINT8 *)&txCmd, sizeof(TCMD_CONT_TX)); ++ } ++ break; ++ case AR6000_XIOCTL_TCMD_CONT_RX: ++ { ++ TCMD_CONT_RX rxCmd; ++ ++ if (ar->tcmdPm == TCMD_PM_SLEEP) { ++ A_PRINTF("Can NOT send rx tcmd when target is asleep! \n"); ++ return -EFAULT; ++ } ++ if(copy_from_user(&rxCmd, userdata, sizeof(TCMD_CONT_RX))) ++ return -EFAULT; ++ switch(rxCmd.act) ++ { ++ case TCMD_CONT_RX_PROMIS: ++ case TCMD_CONT_RX_FILTER: ++ case TCMD_CONT_RX_SETMAC: ++ wmi_test_cmd(ar->arWmi,(A_UINT8 *)&rxCmd, ++ sizeof(TCMD_CONT_RX)); ++ break; ++ case TCMD_CONT_RX_REPORT: ++ ar6000_ioctl_tcmd_get_rx_report(dev, rq, ++ (A_UINT8 *)&rxCmd, sizeof(TCMD_CONT_RX)); ++ break; ++ default: ++ A_PRINTF("Unknown Cont Rx mode: %d\n",rxCmd.act); ++ return -EINVAL; ++ } ++ } ++ break; ++ case AR6000_XIOCTL_TCMD_PM: ++ { ++ TCMD_PM pmCmd; ++ ++ if(copy_from_user(&pmCmd, userdata, sizeof(TCMD_PM))) ++ return -EFAULT; ++ ar->tcmdPm = pmCmd.mode; ++ wmi_test_cmd(ar->arWmi, (A_UINT8*)&pmCmd, sizeof(TCMD_PM)); ++ } ++ break; ++#endif /* CONFIG_HOST_TCMD_SUPPORT */ ++ ++ case AR6000_XIOCTL_BMI_DONE: ++ if(bmienable) ++ { ++ ret = ar6000_init(dev); ++ } ++ else ++ { ++ ret = BMIDone(hifDevice); ++ } ++ break; ++ ++ case AR6000_XIOCTL_BMI_READ_MEMORY: ++ get_user(address, (unsigned int *)userdata); ++ get_user(length, (unsigned int *)userdata + 1); ++ AR_DEBUG_PRINTF("Read Memory (address: 0x%x, length: %d)\n", ++ address, length); ++ if ((buffer = (unsigned char *)A_MALLOC(length)) != NULL) { ++ A_MEMZERO(buffer, length); ++ ret = BMIReadMemory(hifDevice, address, buffer, length); ++ if (copy_to_user(rq->ifr_data, buffer, length)) { ++ ret = -EFAULT; ++ } ++ A_FREE(buffer); ++ } else { ++ ret = -ENOMEM; ++ } ++ break; ++ ++ case AR6000_XIOCTL_BMI_WRITE_MEMORY: ++ get_user(address, (unsigned int *)userdata); ++ get_user(length, (unsigned int *)userdata + 1); ++ AR_DEBUG_PRINTF("Write Memory (address: 0x%x, length: %d)\n", ++ address, length); ++ if ((buffer = (unsigned char *)A_MALLOC(length)) != NULL) { ++ A_MEMZERO(buffer, length); ++ if (copy_from_user(buffer, &userdata[sizeof(address) + ++ sizeof(length)], length)) ++ { ++ ret = -EFAULT; ++ } else { ++ ret = BMIWriteMemory(hifDevice, address, buffer, length); ++ } ++ A_FREE(buffer); ++ } else { ++ ret = -ENOMEM; ++ } ++ break; ++ ++ case AR6000_XIOCTL_BMI_TEST: ++ AR_DEBUG_PRINTF("No longer supported\n"); ++ ret = -EOPNOTSUPP; ++ break; ++ ++ case AR6000_XIOCTL_BMI_EXECUTE: ++ get_user(address, (unsigned int *)userdata); ++ get_user(param, (unsigned int *)userdata + 1); ++ AR_DEBUG_PRINTF("Execute (address: 0x%x, param: %d)\n", ++ address, param); ++ ret = BMIExecute(hifDevice, address, ¶m); ++ put_user(param, (unsigned int *)rq->ifr_data); /* return value */ ++ break; ++ ++ case AR6000_XIOCTL_BMI_SET_APP_START: ++ get_user(address, (unsigned int *)userdata); ++ AR_DEBUG_PRINTF("Set App Start (address: 0x%x)\n", address); ++ ret = BMISetAppStart(hifDevice, address); ++ break; ++ ++ case AR6000_XIOCTL_BMI_READ_SOC_REGISTER: ++ get_user(address, (unsigned int *)userdata); ++ ret = BMIReadSOCRegister(hifDevice, address, ¶m); ++ put_user(param, (unsigned int *)rq->ifr_data); /* return value */ ++ break; ++ ++ case AR6000_XIOCTL_BMI_WRITE_SOC_REGISTER: ++ get_user(address, (unsigned int *)userdata); ++ get_user(param, (unsigned int *)userdata + 1); ++ ret = BMIWriteSOCRegister(hifDevice, address, param); ++ break; ++ ++#ifdef HTC_RAW_INTERFACE ++ case AR6000_XIOCTL_HTC_RAW_OPEN: ++ ret = A_OK; ++ if (!arRawIfEnabled(ar)) { ++ /* make sure block size is set in case the target was reset since last ++ * BMI phase (i.e. flashup downloads) */ ++ ret = ar6000_SetHTCBlockSize(ar); ++ if (A_FAILED(ret)) { ++ break; ++ } ++ /* Terminate the BMI phase */ ++ ret = BMIDone(hifDevice); ++ if (ret == A_OK) { ++ ret = ar6000_htc_raw_open(ar); ++ } ++ } ++ break; ++ ++ case AR6000_XIOCTL_HTC_RAW_CLOSE: ++ if (arRawIfEnabled(ar)) { ++ ret = ar6000_htc_raw_close(ar); ++ arRawIfEnabled(ar) = FALSE; ++ } else { ++ ret = A_ERROR; ++ } ++ break; ++ ++ case AR6000_XIOCTL_HTC_RAW_READ: ++ if (arRawIfEnabled(ar)) { ++ unsigned int streamID; ++ get_user(streamID, (unsigned int *)userdata); ++ get_user(length, (unsigned int *)userdata + 1); ++ buffer = rq->ifr_data + sizeof(length); ++ ret = ar6000_htc_raw_read(ar, (HTC_RAW_STREAM_ID)streamID, ++ buffer, length); ++ put_user(ret, (unsigned int *)rq->ifr_data); ++ } else { ++ ret = A_ERROR; ++ } ++ break; ++ ++ case AR6000_XIOCTL_HTC_RAW_WRITE: ++ if (arRawIfEnabled(ar)) { ++ unsigned int streamID; ++ get_user(streamID, (unsigned int *)userdata); ++ get_user(length, (unsigned int *)userdata + 1); ++ buffer = userdata + sizeof(streamID) + sizeof(length); ++ ret = ar6000_htc_raw_write(ar, (HTC_RAW_STREAM_ID)streamID, ++ buffer, length); ++ put_user(ret, (unsigned int *)rq->ifr_data); ++ } else { ++ ret = A_ERROR; ++ } ++ break; ++#endif /* HTC_RAW_INTERFACE */ ++ ++ case AR6000_IOCTL_WMI_GETREV: ++ { ++ if (copy_to_user(rq->ifr_data, &ar->arVersion, ++ sizeof(ar->arVersion))) ++ { ++ ret = -EFAULT; ++ } ++ break; ++ } ++ case AR6000_IOCTL_WMI_SETPWR: ++ { ++ WMI_POWER_MODE_CMD pwrModeCmd; ++ ++ if (ar->arWmiReady == FALSE) { ++ ret = -EIO; ++ } else if (copy_from_user(&pwrModeCmd, userdata, ++ sizeof(pwrModeCmd))) ++ { ++ ret = -EFAULT; ++ } else { ++ if (wmi_powermode_cmd(ar->arWmi, pwrModeCmd.powerMode) ++ != A_OK) ++ { ++ ret = -EIO; ++ } ++ } ++ break; ++ } ++ case AR6000_IOCTL_WMI_SET_IBSS_PM_CAPS: ++ { ++ WMI_IBSS_PM_CAPS_CMD ibssPmCaps; ++ ++ if (ar->arWmiReady == FALSE) { ++ ret = -EIO; ++ } else if (copy_from_user(&ibssPmCaps, userdata, ++ sizeof(ibssPmCaps))) ++ { ++ ret = -EFAULT; ++ } else { ++ if (wmi_ibsspmcaps_cmd(ar->arWmi, ibssPmCaps.power_saving, ibssPmCaps.ttl, ++ ibssPmCaps.atim_windows, ibssPmCaps.timeout_value) != A_OK) ++ { ++ ret = -EIO; ++ } ++ AR6000_SPIN_LOCK(&ar->arLock, 0); ++ ar->arIbssPsEnable = ibssPmCaps.power_saving; ++ AR6000_SPIN_UNLOCK(&ar->arLock, 0); ++ } ++ break; ++ } ++ case AR6000_IOCTL_WMI_SET_PMPARAMS: ++ { ++ WMI_POWER_PARAMS_CMD pmParams; ++ ++ if (ar->arWmiReady == FALSE) { ++ ret = -EIO; ++ } else if (copy_from_user(&pmParams, userdata, ++ sizeof(pmParams))) ++ { ++ ret = -EFAULT; ++ } else { ++ if (wmi_pmparams_cmd(ar->arWmi, pmParams.idle_period, ++ pmParams.pspoll_number, ++ pmParams.dtim_policy) != A_OK) ++ { ++ ret = -EIO; ++ } ++ } ++ break; ++ } ++ case AR6000_IOCTL_WMI_SETSCAN: ++ { ++ if (ar->arWmiReady == FALSE) { ++ ret = -EIO; ++ } else if (copy_from_user(&scParams, userdata, ++ sizeof(scParams))) ++ { ++ ret = -EFAULT; ++ } else { ++ if (CAN_SCAN_IN_CONNECT(scParams.scanCtrlFlags)) { ++ ar->arSkipScan = FALSE; ++ } else { ++ ar->arSkipScan = TRUE; ++ } ++ ++ if (wmi_scanparams_cmd(ar->arWmi, scParams.fg_start_period, ++ scParams.fg_end_period, ++ scParams.bg_period, ++ scParams.minact_chdwell_time, ++ scParams.maxact_chdwell_time, ++ scParams.pas_chdwell_time, ++ scParams.shortScanRatio, ++ scParams.scanCtrlFlags, ++ scParams.max_dfsch_act_time) != A_OK) ++ { ++ ret = -EIO; ++ } ++ } ++ break; ++ } ++ case AR6000_IOCTL_WMI_SETLISTENINT: ++ { ++ WMI_LISTEN_INT_CMD listenCmd; ++ ++ if (ar->arWmiReady == FALSE) { ++ ret = -EIO; ++ } else if (copy_from_user(&listenCmd, userdata, ++ sizeof(listenCmd))) ++ { ++ ret = -EFAULT; ++ } else { ++ if (wmi_listeninterval_cmd(ar->arWmi, listenCmd.listenInterval, listenCmd.numBeacons) != A_OK) { ++ ret = -EIO; ++ } else { ++ AR6000_SPIN_LOCK(&ar->arLock, 0); ++ ar->arListenInterval = param; ++ AR6000_SPIN_UNLOCK(&ar->arLock, 0); ++ } ++ ++ } ++ break; ++ } ++ case AR6000_IOCTL_WMI_SET_BMISS_TIME: ++ { ++ WMI_BMISS_TIME_CMD bmissCmd; ++ ++ if (ar->arWmiReady == FALSE) { ++ ret = -EIO; ++ } else if (copy_from_user(&bmissCmd, userdata, ++ sizeof(bmissCmd))) ++ { ++ ret = -EFAULT; ++ } else { ++ if (wmi_bmisstime_cmd(ar->arWmi, bmissCmd.bmissTime, bmissCmd.numBeacons) != A_OK) { ++ ret = -EIO; ++ } ++ } ++ break; ++ } ++ case AR6000_IOCTL_WMI_SETBSSFILTER: ++ { ++ if (ar->arWmiReady == FALSE) { ++ ret = -EIO; ++ } else { ++ ++ get_user(param, (unsigned char *)userdata); ++ get_user(param2, (unsigned int *)(userdata + 1)); ++ printk("SETBSSFILTER: filter 0x%x, mask: 0x%x\n", param, param2); ++ if (wmi_bssfilter_cmd(ar->arWmi, param, param2) != A_OK) { ++ ret = -EIO; ++ } ++ } ++ break; ++ } ++ case AR6000_IOCTL_WMI_SET_SNRTHRESHOLD: ++ { ++ ret = ar6000_ioctl_set_snr_threshold(dev, rq); ++ break; ++ } ++ case AR6000_XIOCTL_WMI_SET_RSSITHRESHOLD: ++ { ++ ret = ar6000_ioctl_set_rssi_threshold(dev, rq); ++ break; ++ } ++ case AR6000_XIOCTL_WMI_CLR_RSSISNR: ++ { ++ if (ar->arWmiReady == FALSE) { ++ ret = -EIO; ++ } ++ ret = wmi_clr_rssi_snr(ar->arWmi); ++ break; ++ } ++ case AR6000_XIOCTL_WMI_SET_LQTHRESHOLD: ++ { ++ ret = ar6000_ioctl_set_lq_threshold(dev, rq); ++ break; ++ } ++ case AR6000_XIOCTL_WMI_SET_LPREAMBLE: ++ { ++ WMI_SET_LPREAMBLE_CMD setLpreambleCmd; ++ ++ if (ar->arWmiReady == FALSE) { ++ ret = -EIO; ++ } else if (copy_from_user(&setLpreambleCmd, userdata, ++ sizeof(setLpreambleCmd))) ++ { ++ ret = -EFAULT; ++ } else { ++ if (wmi_set_lpreamble_cmd(ar->arWmi, setLpreambleCmd.status) ++ != A_OK) ++ { ++ ret = -EIO; ++ } ++ } ++ ++ break; ++ } ++ case AR6000_XIOCTL_WMI_SET_RTS: ++ { ++ WMI_SET_RTS_CMD rtsCmd; ++ ++ if (ar->arWmiReady == FALSE) { ++ ret = -EIO; ++ } else if (copy_from_user(&rtsCmd, userdata, ++ sizeof(rtsCmd))) ++ { ++ ret = -EFAULT; ++ } else { ++ if (wmi_set_rts_cmd(ar->arWmi, rtsCmd.threshold) ++ != A_OK) ++ { ++ ret = -EIO; ++ } ++ } ++ ++ break; ++ } ++ case AR6000_XIOCTL_WMI_SET_WMM: ++ { ++ ret = ar6000_ioctl_set_wmm(dev, rq); ++ break; ++ } ++ case AR6000_XIOCTL_WMI_SET_TXOP: ++ { ++ ret = ar6000_ioctl_set_txop(dev, rq); ++ break; ++ } ++ case AR6000_XIOCTL_WMI_GET_RD: ++ { ++ ret = ar6000_ioctl_get_rd(dev, rq); ++ break; ++ } ++ case AR6000_IOCTL_WMI_SET_CHANNELPARAMS: ++ { ++ ret = ar6000_ioctl_set_channelParams(dev, rq); ++ break; ++ } ++ case AR6000_IOCTL_WMI_SET_PROBEDSSID: ++ { ++ ret = ar6000_ioctl_set_probedSsid(dev, rq); ++ break; ++ } ++ case AR6000_IOCTL_WMI_SET_BADAP: ++ { ++ ret = ar6000_ioctl_set_badAp(dev, rq); ++ break; ++ } ++ case AR6000_IOCTL_WMI_CREATE_QOS: ++ { ++ ret = ar6000_ioctl_create_qos(dev, rq); ++ break; ++ } ++ case AR6000_IOCTL_WMI_DELETE_QOS: ++ { ++ ret = ar6000_ioctl_delete_qos(dev, rq); ++ break; ++ } ++ case AR6000_IOCTL_WMI_GET_QOS_QUEUE: ++ { ++ ret = ar6000_ioctl_get_qos_queue(dev, rq); ++ break; ++ } ++ case AR6000_IOCTL_WMI_GET_TARGET_STATS: ++ { ++ ret = ar6000_ioctl_get_target_stats(dev, rq); ++ break; ++ } ++ case AR6000_IOCTL_WMI_SET_ERROR_REPORT_BITMASK: ++ { ++ ret = ar6000_ioctl_set_error_report_bitmask(dev, rq); ++ break; ++ } ++ case AR6000_IOCTL_WMI_SET_ASSOC_INFO: ++ { ++ WMI_SET_ASSOC_INFO_CMD cmd; ++ A_UINT8 assocInfo[WMI_MAX_ASSOC_INFO_LEN]; ++ ++ if (ar->arWmiReady == FALSE) { ++ ret = -EIO; ++ } else { ++ get_user(cmd.ieType, userdata); ++ if (cmd.ieType >= WMI_MAX_ASSOC_INFO_TYPE) { ++ ret = -EIO; ++ } else { ++ get_user(cmd.bufferSize, userdata + 1); ++ if (cmd.bufferSize > WMI_MAX_ASSOC_INFO_LEN) { ++ ret = -EFAULT; ++ break; ++ } ++ if (copy_from_user(assocInfo, userdata + 2, ++ cmd.bufferSize)) ++ { ++ ret = -EFAULT; ++ } else { ++ if (wmi_associnfo_cmd(ar->arWmi, cmd.ieType, ++ cmd.bufferSize, ++ assocInfo) != A_OK) ++ { ++ ret = -EIO; ++ } ++ } ++ } ++ } ++ break; ++ } ++ case AR6000_IOCTL_WMI_SET_ACCESS_PARAMS: ++ { ++ ret = ar6000_ioctl_set_access_params(dev, rq); ++ break; ++ } ++ case AR6000_IOCTL_WMI_SET_DISC_TIMEOUT: ++ { ++ ret = ar6000_ioctl_set_disconnect_timeout(dev, rq); ++ break; ++ } ++ case AR6000_XIOCTL_FORCE_TARGET_RESET: ++ { ++ if (ar->arHtcTarget) ++ { ++// HTCForceReset(htcTarget); ++ } ++ else ++ { ++ AR_DEBUG_PRINTF("ar6000_ioctl cannot attempt reset.\n"); ++ } ++ break; ++ } ++ case AR6000_XIOCTL_TARGET_INFO: ++ case AR6000_XIOCTL_CHECK_TARGET_READY: /* backwards compatibility */ ++ { ++ /* If we made it to here, then the Target exists and is ready. */ ++ ++ if (cmd == AR6000_XIOCTL_TARGET_INFO) { ++ if (copy_to_user((A_UINT32 *)rq->ifr_data, &ar->arVersion.target_ver, ++ sizeof(ar->arVersion.target_ver))) ++ { ++ ret = -EFAULT; ++ } ++ if (copy_to_user(((A_UINT32 *)rq->ifr_data)+1, &ar->arTargetType, ++ sizeof(ar->arTargetType))) ++ { ++ ret = -EFAULT; ++ } ++ } ++ break; ++ } ++ case AR6000_XIOCTL_WMI_SET_HB_CHALLENGE_RESP_PARAMS: ++ { ++ WMI_SET_HB_CHALLENGE_RESP_PARAMS_CMD hbparam; ++ ++ if (copy_from_user(&hbparam, userdata, sizeof(hbparam))) ++ { ++ ret = -EFAULT; ++ } else { ++ AR6000_SPIN_LOCK(&ar->arLock, 0); ++ /* Start a cyclic timer with the parameters provided. */ ++ if (hbparam.frequency) { ++ ar->arHBChallengeResp.frequency = hbparam.frequency; ++ } ++ if (hbparam.threshold) { ++ ar->arHBChallengeResp.missThres = hbparam.threshold; ++ } ++ ++ /* Delete the pending timer and start a new one */ ++ if (timer_pending(&ar->arHBChallengeResp.timer)) { ++ A_UNTIMEOUT(&ar->arHBChallengeResp.timer); ++ } ++ A_TIMEOUT_MS(&ar->arHBChallengeResp.timer, ar->arHBChallengeResp.frequency * 1000, 0); ++ AR6000_SPIN_UNLOCK(&ar->arLock, 0); ++ } ++ break; ++ } ++ case AR6000_XIOCTL_WMI_GET_HB_CHALLENGE_RESP: ++ { ++ A_UINT32 cookie; ++ ++ if (copy_from_user(&cookie, userdata, sizeof(cookie))) { ++ return -EFAULT; ++ } ++ ++ /* Send the challenge on the control channel */ ++ if (wmi_get_challenge_resp_cmd(ar->arWmi, cookie, APP_HB_CHALLENGE) != A_OK) { ++ return -EIO; ++ } ++ break; ++ } ++#ifdef USER_KEYS ++ case AR6000_XIOCTL_USER_SETKEYS: ++ { ++ ++ ar->user_savedkeys_stat = USER_SAVEDKEYS_STAT_RUN; ++ ++ if (copy_from_user(&ar->user_key_ctrl, userdata, ++ sizeof(ar->user_key_ctrl))) ++ { ++ return -EFAULT; ++ } ++ ++ A_PRINTF("ar6000 USER set key %x\n", ar->user_key_ctrl); ++ break; ++ } ++#endif /* USER_KEYS */ ++ ++#ifdef CONFIG_HOST_GPIO_SUPPORT ++ case AR6000_XIOCTL_GPIO_OUTPUT_SET: ++ { ++ struct ar6000_gpio_output_set_cmd_s gpio_output_set_cmd; ++ ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ if (down_interruptible(&ar->arSem)) { ++ return -ERESTARTSYS; ++ } ++ ++ if (copy_from_user(&gpio_output_set_cmd, userdata, ++ sizeof(gpio_output_set_cmd))) ++ { ++ ret = -EFAULT; ++ } else { ++ ret = ar6000_gpio_output_set(dev, ++ gpio_output_set_cmd.set_mask, ++ gpio_output_set_cmd.clear_mask, ++ gpio_output_set_cmd.enable_mask, ++ gpio_output_set_cmd.disable_mask); ++ if (ret != A_OK) { ++ ret = EIO; ++ } ++ } ++ up(&ar->arSem); ++ break; ++ } ++ case AR6000_XIOCTL_GPIO_INPUT_GET: ++ { ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ if (down_interruptible(&ar->arSem)) { ++ return -ERESTARTSYS; ++ } ++ ++ ret = ar6000_gpio_input_get(dev); ++ if (ret != A_OK) { ++ up(&ar->arSem); ++ return -EIO; ++ } ++ ++ /* Wait for Target to respond. */ ++ wait_event_interruptible(arEvent, gpio_data_available); ++ if (signal_pending(current)) { ++ ret = -EINTR; ++ } else { ++ A_ASSERT(gpio_reg_results.gpioreg_id == GPIO_ID_NONE); ++ ++ if (copy_to_user(userdata, &gpio_reg_results.value, ++ sizeof(gpio_reg_results.value))) ++ { ++ ret = -EFAULT; ++ } ++ } ++ up(&ar->arSem); ++ break; ++ } ++ case AR6000_XIOCTL_GPIO_REGISTER_SET: ++ { ++ struct ar6000_gpio_register_cmd_s gpio_register_cmd; ++ ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ if (down_interruptible(&ar->arSem)) { ++ return -ERESTARTSYS; ++ } ++ ++ if (copy_from_user(&gpio_register_cmd, userdata, ++ sizeof(gpio_register_cmd))) ++ { ++ ret = -EFAULT; ++ } else { ++ ret = ar6000_gpio_register_set(dev, ++ gpio_register_cmd.gpioreg_id, ++ gpio_register_cmd.value); ++ if (ret != A_OK) { ++ ret = EIO; ++ } ++ ++ /* Wait for acknowledgement from Target */ ++ wait_event_interruptible(arEvent, gpio_ack_received); ++ if (signal_pending(current)) { ++ ret = -EINTR; ++ } ++ } ++ up(&ar->arSem); ++ break; ++ } ++ case AR6000_XIOCTL_GPIO_REGISTER_GET: ++ { ++ struct ar6000_gpio_register_cmd_s gpio_register_cmd; ++ ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ if (down_interruptible(&ar->arSem)) { ++ return -ERESTARTSYS; ++ } ++ ++ if (copy_from_user(&gpio_register_cmd, userdata, ++ sizeof(gpio_register_cmd))) ++ { ++ ret = -EFAULT; ++ } else { ++ ret = ar6000_gpio_register_get(dev, gpio_register_cmd.gpioreg_id); ++ if (ret != A_OK) { ++ up(&ar->arSem); ++ return -EIO; ++ } ++ ++ /* Wait for Target to respond. */ ++ wait_event_interruptible(arEvent, gpio_data_available); ++ if (signal_pending(current)) { ++ ret = -EINTR; ++ } else { ++ A_ASSERT(gpio_register_cmd.gpioreg_id == gpio_reg_results.gpioreg_id); ++ if (copy_to_user(userdata, &gpio_reg_results, ++ sizeof(gpio_reg_results))) ++ { ++ ret = -EFAULT; ++ } ++ } ++ } ++ up(&ar->arSem); ++ break; ++ } ++ case AR6000_XIOCTL_GPIO_INTR_ACK: ++ { ++ struct ar6000_gpio_intr_ack_cmd_s gpio_intr_ack_cmd; ++ ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ if (down_interruptible(&ar->arSem)) { ++ return -ERESTARTSYS; ++ } ++ ++ if (copy_from_user(&gpio_intr_ack_cmd, userdata, ++ sizeof(gpio_intr_ack_cmd))) ++ { ++ ret = -EFAULT; ++ } else { ++ ret = ar6000_gpio_intr_ack(dev, gpio_intr_ack_cmd.ack_mask); ++ if (ret != A_OK) { ++ ret = EIO; ++ } ++ } ++ up(&ar->arSem); ++ break; ++ } ++ case AR6000_XIOCTL_GPIO_INTR_WAIT: ++ { ++ /* Wait for Target to report an interrupt. */ ++ dev_hold(dev); ++ rtnl_unlock(); ++ wait_event_interruptible(arEvent, gpio_intr_available); ++ rtnl_lock(); ++ __dev_put(dev); ++ ++ if (signal_pending(current)) { ++ ret = -EINTR; ++ } else { ++ if (copy_to_user(userdata, &gpio_intr_results, ++ sizeof(gpio_intr_results))) ++ { ++ ret = -EFAULT; ++ } ++ } ++ break; ++ } ++#endif /* CONFIG_HOST_GPIO_SUPPORT */ ++ ++ case AR6000_XIOCTL_DBGLOG_CFG_MODULE: ++ { ++ struct ar6000_dbglog_module_config_s config; ++ ++ if (copy_from_user(&config, userdata, sizeof(config))) { ++ return -EFAULT; ++ } ++ ++ /* Send the challenge on the control channel */ ++ if (wmi_config_debug_module_cmd(ar->arWmi, config.mmask, ++ config.tsr, config.rep, ++ config.size, config.valid) != A_OK) ++ { ++ return -EIO; ++ } ++ break; ++ } ++ ++ case AR6000_XIOCTL_DBGLOG_GET_DEBUG_LOGS: ++ { ++ /* Send the challenge on the control channel */ ++ if (ar6000_dbglog_get_debug_logs(ar) != A_OK) ++ { ++ return -EIO; ++ } ++ break; ++ } ++ ++ case AR6000_XIOCTL_SET_ADHOC_BSSID: ++ { ++ WMI_SET_ADHOC_BSSID_CMD adhocBssid; ++ ++ if (ar->arWmiReady == FALSE) { ++ ret = -EIO; ++ } else if (copy_from_user(&adhocBssid, userdata, ++ sizeof(adhocBssid))) ++ { ++ ret = -EFAULT; ++ } else if (A_MEMCMP(adhocBssid.bssid, bcast_mac, ++ AR6000_ETH_ADDR_LEN) == 0) ++ { ++ ret = -EFAULT; ++ } else { ++ ++ A_MEMCPY(ar->arReqBssid, adhocBssid.bssid, sizeof(ar->arReqBssid)); ++ } ++ break; ++ } ++ ++ case AR6000_XIOCTL_SET_OPT_MODE: ++ { ++ WMI_SET_OPT_MODE_CMD optModeCmd; ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ ++ if (ar->arWmiReady == FALSE) { ++ ret = -EIO; ++ } else if (copy_from_user(&optModeCmd, userdata, ++ sizeof(optModeCmd))) ++ { ++ ret = -EFAULT; ++ } else if (ar->arConnected && optModeCmd.optMode == SPECIAL_ON) { ++ ret = -EFAULT; ++ ++ } else if (wmi_set_opt_mode_cmd(ar->arWmi, optModeCmd.optMode) ++ != A_OK) ++ { ++ ret = -EIO; ++ } ++ break; ++ } ++ ++ case AR6000_XIOCTL_OPT_SEND_FRAME: ++ { ++ WMI_OPT_TX_FRAME_CMD optTxFrmCmd; ++ A_UINT8 data[MAX_OPT_DATA_LEN]; ++ ++ if (ar->arWmiReady == FALSE) { ++ ret = -EIO; ++ } else if (copy_from_user(&optTxFrmCmd, userdata, ++ sizeof(optTxFrmCmd))) ++ { ++ ret = -EFAULT; ++ } else if (copy_from_user(data, ++ userdata+sizeof(WMI_OPT_TX_FRAME_CMD)-1, ++ optTxFrmCmd.optIEDataLen)) ++ { ++ ret = -EFAULT; ++ } else { ++ ret = wmi_opt_tx_frame_cmd(ar->arWmi, ++ optTxFrmCmd.frmType, ++ optTxFrmCmd.dstAddr, ++ optTxFrmCmd.bssid, ++ optTxFrmCmd.optIEDataLen, ++ data); ++ } ++ ++ break; ++ } ++ case AR6000_XIOCTL_WMI_SETRETRYLIMITS: ++ { ++ WMI_SET_RETRY_LIMITS_CMD setRetryParams; ++ ++ if (ar->arWmiReady == FALSE) { ++ ret = -EIO; ++ } else if (copy_from_user(&setRetryParams, userdata, ++ sizeof(setRetryParams))) ++ { ++ ret = -EFAULT; ++ } else { ++ if (wmi_set_retry_limits_cmd(ar->arWmi, setRetryParams.frameType, ++ setRetryParams.trafficClass, ++ setRetryParams.maxRetries, ++ setRetryParams.enableNotify) != A_OK) ++ { ++ ret = -EIO; ++ } ++ AR6000_SPIN_LOCK(&ar->arLock, 0); ++ ar->arMaxRetries = setRetryParams.maxRetries; ++ AR6000_SPIN_UNLOCK(&ar->arLock, 0); ++ } ++ break; ++ } ++ ++ case AR6000_XIOCTL_SET_ADHOC_BEACON_INTVAL: ++ { ++ WMI_BEACON_INT_CMD bIntvlCmd; ++ ++ if (ar->arWmiReady == FALSE) { ++ ret = -EIO; ++ } else if (copy_from_user(&bIntvlCmd, userdata, ++ sizeof(bIntvlCmd))) ++ { ++ ret = -EFAULT; ++ } else if (wmi_set_adhoc_bconIntvl_cmd(ar->arWmi, bIntvlCmd.beaconInterval) ++ != A_OK) ++ { ++ ret = -EIO; ++ } ++ break; ++ } ++ case IEEE80211_IOCTL_SETAUTHALG: ++ { ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ struct ieee80211req_authalg req; ++ ++ if (ar->arWmiReady == FALSE) { ++ ret = -EIO; ++ } else if (copy_from_user(&req, userdata, ++ sizeof(struct ieee80211req_authalg))) ++ { ++ ret = -EFAULT; ++ } else if (req.auth_alg == AUTH_ALG_OPEN_SYSTEM) { ++ ar->arDot11AuthMode = OPEN_AUTH; ++ ar->arPairwiseCrypto = NONE_CRYPT; ++ ar->arGroupCrypto = NONE_CRYPT; ++ } else if (req.auth_alg == AUTH_ALG_LEAP) { ++ ar->arDot11AuthMode = LEAP_AUTH; ++ } else { ++ ret = -EIO; ++ } ++ break; ++ } ++ ++ case AR6000_XIOCTL_SET_VOICE_PKT_SIZE: ++ ret = ar6000_xioctl_set_voice_pkt_size(dev, userdata); ++ break; ++ ++ case AR6000_XIOCTL_SET_MAX_SP: ++ ret = ar6000_xioctl_set_max_sp_len(dev, userdata); ++ break; ++ ++ case AR6000_XIOCTL_WMI_GET_ROAM_TBL: ++ ret = ar6000_ioctl_get_roam_tbl(dev, rq); ++ break; ++ case AR6000_XIOCTL_WMI_SET_ROAM_CTRL: ++ ret = ar6000_ioctl_set_roam_ctrl(dev, userdata); ++ break; ++ case AR6000_XIOCTRL_WMI_SET_POWERSAVE_TIMERS: ++ ret = ar6000_ioctl_set_powersave_timers(dev, userdata); ++ break; ++ case AR6000_XIOCTRL_WMI_GET_POWER_MODE: ++ ret = ar6000_ioctl_get_power_mode(dev, rq); ++ break; ++ case AR6000_XIOCTRL_WMI_SET_WLAN_STATE: ++ get_user(ar->arWlanState, (unsigned int *)userdata); ++ if (ar->arWmiReady == FALSE) { ++ ret = -EIO; ++ break; ++ } ++ ++ if (ar->arWlanState == WLAN_ENABLED) { ++ /* Enable foreground scanning */ ++ if (wmi_scanparams_cmd(ar->arWmi, scParams.fg_start_period, ++ scParams.fg_end_period, ++ scParams.bg_period, ++ scParams.minact_chdwell_time, ++ scParams.maxact_chdwell_time, ++ scParams.pas_chdwell_time, ++ scParams.shortScanRatio, ++ scParams.scanCtrlFlags, ++ scParams.max_dfsch_act_time) != A_OK) ++ { ++ ret = -EIO; ++ } ++ if (ar->arSsidLen) { ++ ar->arConnectPending = TRUE; ++ if (wmi_connect_cmd(ar->arWmi, ar->arNetworkType, ++ ar->arDot11AuthMode, ar->arAuthMode, ++ ar->arPairwiseCrypto, ++ ar->arPairwiseCryptoLen, ++ ar->arGroupCrypto, ar->arGroupCryptoLen, ++ ar->arSsidLen, ar->arSsid, ++ ar->arReqBssid, ar->arChannelHint, ++ ar->arConnectCtrlFlags) != A_OK) ++ { ++ ret = -EIO; ++ ar->arConnectPending = FALSE; ++ } ++ } ++ } else { ++ /* Disconnect from the AP and disable foreground scanning */ ++ AR6000_SPIN_LOCK(&ar->arLock, 0); ++ if (ar->arConnected == TRUE || ar->arConnectPending == TRUE) { ++ AR6000_SPIN_UNLOCK(&ar->arLock, 0); ++ wmi_disconnect_cmd(ar->arWmi); ++ } else { ++ AR6000_SPIN_UNLOCK(&ar->arLock, 0); ++ } ++ ++ if (wmi_scanparams_cmd(ar->arWmi, 0xFFFF, 0, 0, 0, 0, 0, 0, 0xFF, 0) != A_OK) ++ { ++ ret = -EIO; ++ } ++ } ++ break; ++ case AR6000_XIOCTL_WMI_GET_ROAM_DATA: ++ ret = ar6000_ioctl_get_roam_data(dev, rq); ++ break; ++ case AR6000_XIOCTL_WMI_SET_BT_STATUS: ++ ret = ar6000_xioctl_set_bt_status_cmd(dev, userdata); ++ break; ++ case AR6000_XIOCTL_WMI_SET_BT_PARAMS: ++ ret = ar6000_xioctl_set_bt_params_cmd(dev, userdata); ++ break; ++ case AR6000_XIOCTL_WMI_STARTSCAN: ++ { ++ WMI_START_SCAN_CMD setStartScanCmd; ++ ++ if (ar->arWmiReady == FALSE) { ++ ret = -EIO; ++ } else if (copy_from_user(&setStartScanCmd, userdata, ++ sizeof(setStartScanCmd))) ++ { ++ ret = -EFAULT; ++ } else { ++ if (wmi_startscan_cmd(ar->arWmi, setStartScanCmd.scanType, ++ setStartScanCmd.forceFgScan, ++ setStartScanCmd.isLegacy, ++ setStartScanCmd.homeDwellTime, ++ setStartScanCmd.forceScanInterval) != A_OK) ++ { ++ ret = -EIO; ++ } ++ } ++ break; ++ } ++ case AR6000_XIOCTL_WMI_SETFIXRATES: ++ { ++ WMI_FIX_RATES_CMD setFixRatesCmd; ++ A_STATUS returnStatus; ++ ++ if (ar->arWmiReady == FALSE) { ++ ret = -EIO; ++ } else if (copy_from_user(&setFixRatesCmd, userdata, ++ sizeof(setFixRatesCmd))) ++ { ++ ret = -EFAULT; ++ } else { ++ returnStatus = wmi_set_fixrates_cmd(ar->arWmi, setFixRatesCmd.fixRateMask); ++ if (returnStatus == A_EINVAL) ++ { ++ ret = -EINVAL; ++ } ++ else if(returnStatus != A_OK) { ++ ret = -EIO; ++ } ++ } ++ break; ++ } ++ ++ case AR6000_XIOCTL_WMI_GETFIXRATES: ++ { ++ WMI_FIX_RATES_CMD getFixRatesCmd; ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ int ret = 0; ++ ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ ++ if (down_interruptible(&ar->arSem)) { ++ return -ERESTARTSYS; ++ } ++ /* Used copy_from_user/copy_to_user to access user space data */ ++ if (copy_from_user(&getFixRatesCmd, userdata, sizeof(getFixRatesCmd))) { ++ ret = -EFAULT; ++ } else { ++ ar->arRateMask = 0xFFFF; ++ ++ if (wmi_get_ratemask_cmd(ar->arWmi) != A_OK) { ++ up(&ar->arSem); ++ return -EIO; ++ } ++ ++ wait_event_interruptible_timeout(arEvent, ar->arRateMask != 0xFFFF, wmitimeout * HZ); ++ ++ if (signal_pending(current)) { ++ ret = -EINTR; ++ } ++ ++ if (!ret) { ++ getFixRatesCmd.fixRateMask = ar->arRateMask; ++ } ++ ++ if(copy_to_user(userdata, &getFixRatesCmd, sizeof(getFixRatesCmd))) { ++ ret = -EFAULT; ++ } ++ ++ up(&ar->arSem); ++ } ++ break; ++ } ++ case AR6000_XIOCTL_WMI_SET_AUTHMODE: ++ { ++ WMI_SET_AUTH_MODE_CMD setAuthMode; ++ ++ if (ar->arWmiReady == FALSE) { ++ ret = -EIO; ++ } else if (copy_from_user(&setAuthMode, userdata, ++ sizeof(setAuthMode))) ++ { ++ ret = -EFAULT; ++ } else { ++ if (wmi_set_authmode_cmd(ar->arWmi, setAuthMode.mode) != A_OK) ++ { ++ ret = -EIO; ++ } ++ } ++ break; ++ } ++ case AR6000_XIOCTL_WMI_SET_REASSOCMODE: ++ { ++ WMI_SET_REASSOC_MODE_CMD setReassocMode; ++ ++ if (ar->arWmiReady == FALSE) { ++ ret = -EIO; ++ } else if (copy_from_user(&setReassocMode, userdata, ++ sizeof(setReassocMode))) ++ { ++ ret = -EFAULT; ++ } else { ++ if (wmi_set_reassocmode_cmd(ar->arWmi, setReassocMode.mode) != A_OK) ++ { ++ ret = -EIO; ++ } ++ } ++ break; ++ } ++ case AR6000_XIOCTL_DIAG_READ: ++ { ++ A_UINT32 addr, data; ++ get_user(addr, (unsigned int *)userdata); ++ if (ar6000_ReadRegDiag(ar->arHifDevice, &addr, &data) != A_OK) { ++ ret = -EIO; ++ } ++ put_user(data, (unsigned int *)userdata + 1); ++ break; ++ } ++ case AR6000_XIOCTL_DIAG_WRITE: ++ { ++ A_UINT32 addr, data; ++ get_user(addr, (unsigned int *)userdata); ++ get_user(data, (unsigned int *)userdata + 1); ++ if (ar6000_WriteRegDiag(ar->arHifDevice, &addr, &data) != A_OK) { ++ ret = -EIO; ++ } ++ break; ++ } ++ case AR6000_XIOCTL_WMI_SET_KEEPALIVE: ++ { ++ WMI_SET_KEEPALIVE_CMD setKeepAlive; ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } else if (copy_from_user(&setKeepAlive, userdata, ++ sizeof(setKeepAlive))){ ++ ret = -EFAULT; ++ } else { ++ if (wmi_set_keepalive_cmd(ar->arWmi, setKeepAlive.keepaliveInterval) != A_OK) { ++ ret = -EIO; ++ } ++ } ++ break; ++ } ++ case AR6000_XIOCTL_WMI_GET_KEEPALIVE: ++ { ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ WMI_GET_KEEPALIVE_CMD getKeepAlive; ++ int ret = 0; ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ if (down_interruptible(&ar->arSem)) { ++ return -ERESTARTSYS; ++ } ++ if (copy_from_user(&getKeepAlive, userdata,sizeof(getKeepAlive))) { ++ ret = -EFAULT; ++ } else { ++ getKeepAlive.keepaliveInterval = wmi_get_keepalive_cmd(ar->arWmi); ++ ar->arKeepaliveConfigured = 0xFF; ++ if (wmi_get_keepalive_configured(ar->arWmi) != A_OK){ ++ up(&ar->arSem); ++ return -EIO; ++ } ++ wait_event_interruptible_timeout(arEvent, ar->arKeepaliveConfigured != 0xFF, wmitimeout * HZ); ++ if (signal_pending(current)) { ++ ret = -EINTR; ++ } ++ ++ if (!ret) { ++ getKeepAlive.configured = ar->arKeepaliveConfigured; ++ } ++ if (copy_to_user(userdata, &getKeepAlive, sizeof(getKeepAlive))) { ++ ret = -EFAULT; ++ } ++ up(&ar->arSem); ++ } ++ break; ++ } ++ case AR6000_XIOCTL_WMI_SET_APPIE: ++ { ++ WMI_SET_APPIE_CMD appIEcmd; ++ A_UINT8 appIeInfo[IEEE80211_APPIE_FRAME_MAX_LEN]; ++ A_UINT32 fType,ieLen; ++ ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ get_user(fType, (A_UINT32 *)userdata); ++ appIEcmd.mgmtFrmType = fType; ++ if (appIEcmd.mgmtFrmType >= IEEE80211_APPIE_NUM_OF_FRAME) { ++ ret = -EIO; ++ } else { ++ get_user(ieLen, (A_UINT32 *)(userdata + 4)); ++ appIEcmd.ieLen = ieLen; ++ if (appIEcmd.ieLen > IEEE80211_APPIE_FRAME_MAX_LEN) { ++ ret = -EIO; ++ break; ++ } ++ if (copy_from_user(appIeInfo, userdata + 8, appIEcmd.ieLen)) { ++ ret = -EFAULT; ++ } else { ++ if (wmi_set_appie_cmd(ar->arWmi, appIEcmd.mgmtFrmType, ++ appIEcmd.ieLen, appIeInfo) != A_OK) ++ { ++ ret = -EIO; ++ } ++ } ++ } ++ break; ++ } ++ case AR6000_XIOCTL_WMI_SET_MGMT_FRM_RX_FILTER: ++ { ++ WMI_BSS_FILTER_CMD cmd; ++ A_UINT32 filterType; ++ ++ if (copy_from_user(&filterType, userdata, sizeof(A_UINT32))) ++ { ++ return -EFAULT; ++ } ++ if (filterType & (IEEE80211_FILTER_TYPE_BEACON | ++ IEEE80211_FILTER_TYPE_PROBE_RESP)) ++ { ++ cmd.bssFilter = ALL_BSS_FILTER; ++ } else { ++ cmd.bssFilter = NONE_BSS_FILTER; ++ } ++ if (wmi_bssfilter_cmd(ar->arWmi, cmd.bssFilter, 0) != A_OK) { ++ ret = -EIO; ++ } ++ ++ AR6000_SPIN_LOCK(&ar->arLock, 0); ++ ar->arMgmtFilter = filterType; ++ AR6000_SPIN_UNLOCK(&ar->arLock, 0); ++ break; ++ } ++ case AR6000_XIOCTL_WMI_SET_WSC_STATUS: ++ { ++ A_UINT32 wsc_status; ++ ++ if (copy_from_user(&wsc_status, userdata, sizeof(A_UINT32))) ++ { ++ return -EFAULT; ++ } ++ if (wmi_set_wsc_status_cmd(ar->arWmi, wsc_status) != A_OK) { ++ ret = -EIO; ++ } ++ break; ++ } ++ case AR6000_XIOCTL_BMI_ROMPATCH_INSTALL: ++ { ++ A_UINT32 ROM_addr; ++ A_UINT32 RAM_addr; ++ A_UINT32 nbytes; ++ A_UINT32 do_activate; ++ A_UINT32 rompatch_id; ++ ++ get_user(ROM_addr, (A_UINT32 *)userdata); ++ get_user(RAM_addr, (A_UINT32 *)userdata + 1); ++ get_user(nbytes, (A_UINT32 *)userdata + 2); ++ get_user(do_activate, (A_UINT32 *)userdata + 3); ++ AR_DEBUG_PRINTF("Install rompatch from ROM: 0x%x to RAM: 0x%x length: %d\n", ++ ROM_addr, RAM_addr, nbytes); ++ ret = BMIrompatchInstall(hifDevice, ROM_addr, RAM_addr, ++ nbytes, do_activate, &rompatch_id); ++ if (ret == A_OK) { ++ put_user(rompatch_id, (unsigned int *)rq->ifr_data); /* return value */ ++ } ++ break; ++ } ++ ++ case AR6000_XIOCTL_BMI_ROMPATCH_UNINSTALL: ++ { ++ A_UINT32 rompatch_id; ++ ++ get_user(rompatch_id, (A_UINT32 *)userdata); ++ AR_DEBUG_PRINTF("UNinstall rompatch_id %d\n", rompatch_id); ++ ret = BMIrompatchUninstall(hifDevice, rompatch_id); ++ break; ++ } ++ ++ case AR6000_XIOCTL_BMI_ROMPATCH_ACTIVATE: ++ case AR6000_XIOCTL_BMI_ROMPATCH_DEACTIVATE: ++ { ++ A_UINT32 rompatch_count; ++ ++ get_user(rompatch_count, (A_UINT32 *)userdata); ++ AR_DEBUG_PRINTF("Change rompatch activation count=%d\n", rompatch_count); ++ length = sizeof(A_UINT32) * rompatch_count; ++ if ((buffer = (unsigned char *)A_MALLOC(length)) != NULL) { ++ A_MEMZERO(buffer, length); ++ if (copy_from_user(buffer, &userdata[sizeof(rompatch_count)], length)) ++ { ++ ret = -EFAULT; ++ } else { ++ if (cmd == AR6000_XIOCTL_BMI_ROMPATCH_ACTIVATE) { ++ ret = BMIrompatchActivate(hifDevice, rompatch_count, (A_UINT32 *)buffer); ++ } else { ++ ret = BMIrompatchDeactivate(hifDevice, rompatch_count, (A_UINT32 *)buffer); ++ } ++ } ++ A_FREE(buffer); ++ } else { ++ ret = -ENOMEM; ++ } ++ ++ break; ++ } ++ ++ case AR6000_XIOCTL_WMI_SET_HOST_SLEEP_MODE: ++ { ++ WMI_SET_HOST_SLEEP_MODE_CMD setHostSleepMode; ++ ++ if (ar->arWmiReady == FALSE) { ++ ret = -EIO; ++ } else if (copy_from_user(&setHostSleepMode, userdata, ++ sizeof(setHostSleepMode))) ++ { ++ ret = -EFAULT; ++ } else { ++ if (wmi_set_host_sleep_mode_cmd(ar->arWmi, ++ &setHostSleepMode) != A_OK) ++ { ++ ret = -EIO; ++ } ++ } ++ break; ++ } ++ case AR6000_XIOCTL_WMI_SET_WOW_MODE: ++ { ++ WMI_SET_WOW_MODE_CMD setWowMode; ++ ++ if (ar->arWmiReady == FALSE) { ++ ret = -EIO; ++ } else if (copy_from_user(&setWowMode, userdata, ++ sizeof(setWowMode))) ++ { ++ ret = -EFAULT; ++ } else { ++ if (wmi_set_wow_mode_cmd(ar->arWmi, ++ &setWowMode) != A_OK) ++ { ++ ret = -EIO; ++ } ++ } ++ break; ++ } ++ case AR6000_XIOCTL_WMI_GET_WOW_LIST: ++ { ++ WMI_GET_WOW_LIST_CMD getWowList; ++ ++ if (ar->arWmiReady == FALSE) { ++ ret = -EIO; ++ } else if (copy_from_user(&getWowList, userdata, ++ sizeof(getWowList))) ++ { ++ ret = -EFAULT; ++ } else { ++ if (wmi_get_wow_list_cmd(ar->arWmi, ++ &getWowList) != A_OK) ++ { ++ ret = -EIO; ++ } ++ } ++ break; ++ } ++ case AR6000_XIOCTL_WMI_ADD_WOW_PATTERN: ++ { ++#define WOW_PATTERN_SIZE 64 ++#define WOW_MASK_SIZE 64 ++ ++ WMI_ADD_WOW_PATTERN_CMD cmd; ++ A_UINT8 mask_data[WOW_PATTERN_SIZE]={0}; ++ A_UINT8 pattern_data[WOW_PATTERN_SIZE]={0}; ++ ++ if (ar->arWmiReady == FALSE) { ++ ret = -EIO; ++ } else { ++ ++ if(copy_from_user(&cmd, userdata, ++ sizeof(WMI_ADD_WOW_PATTERN_CMD))) ++ return -EFAULT; ++ if (copy_from_user(pattern_data, ++ userdata + 3, ++ cmd.filter_size)){ ++ ret = -EFAULT; ++ break; ++ } ++ if (copy_from_user(mask_data, ++ (userdata + 3 + cmd.filter_size), ++ cmd.filter_size)){ ++ ret = -EFAULT; ++ break; ++ } else { ++ if (wmi_add_wow_pattern_cmd(ar->arWmi, ++ &cmd, pattern_data, mask_data, cmd.filter_size) != A_OK){ ++ ret = -EIO; ++ } ++ } ++ } ++#undef WOW_PATTERN_SIZE ++#undef WOW_MASK_SIZE ++ break; ++ } ++ case AR6000_XIOCTL_WMI_DEL_WOW_PATTERN: ++ { ++ WMI_DEL_WOW_PATTERN_CMD delWowPattern; ++ ++ if (ar->arWmiReady == FALSE) { ++ ret = -EIO; ++ } else if (copy_from_user(&delWowPattern, userdata, ++ sizeof(delWowPattern))) ++ { ++ ret = -EFAULT; ++ } else { ++ if (wmi_del_wow_pattern_cmd(ar->arWmi, ++ &delWowPattern) != A_OK) ++ { ++ ret = -EIO; ++ } ++ } ++ break; ++ } ++ case AR6000_XIOCTL_DUMP_HTC_CREDIT_STATE: ++ if (ar->arHtcTarget != NULL) { ++ HTCDumpCreditStates(ar->arHtcTarget); ++ } ++ break; ++ case AR6000_XIOCTL_TRAFFIC_ACTIVITY_CHANGE: ++ if (ar->arHtcTarget != NULL) { ++ struct ar6000_traffic_activity_change data; ++ ++ if (copy_from_user(&data, userdata, sizeof(data))) ++ { ++ return -EFAULT; ++ } ++ /* note, this is used for testing (mbox ping testing), indicate activity ++ * change using the stream ID as the traffic class */ ++ ar6000_indicate_tx_activity(ar, ++ (A_UINT8)data.StreamID, ++ data.Active ? TRUE : FALSE); ++ } ++ break; ++ case AR6000_XIOCTL_WMI_SET_CONNECT_CTRL_FLAGS: ++ if (ar->arWmiReady == FALSE) { ++ ret = -EIO; ++ } else if (copy_from_user(&connectCtrlFlags, userdata, ++ sizeof(connectCtrlFlags))) ++ { ++ ret = -EFAULT; ++ } else { ++ ar->arConnectCtrlFlags = connectCtrlFlags; ++ } ++ break; ++ case AR6000_XIOCTL_WMI_SET_AKMP_PARAMS: ++ if (ar->arWmiReady == FALSE) { ++ ret = -EIO; ++ } else if (copy_from_user(&akmpParams, userdata, ++ sizeof(WMI_SET_AKMP_PARAMS_CMD))) ++ { ++ ret = -EFAULT; ++ } else { ++ if (wmi_set_akmp_params_cmd(ar->arWmi, &akmpParams) != A_OK) { ++ ret = -EIO; ++ } ++ } ++ break; ++ case AR6000_XIOCTL_WMI_SET_PMKID_LIST: ++ if (ar->arWmiReady == FALSE) { ++ ret = -EIO; ++ } else { ++ if (copy_from_user(&pmkidInfo.numPMKID, userdata, ++ sizeof(pmkidInfo.numPMKID))) ++ { ++ ret = -EFAULT; ++ break; ++ } ++ if (copy_from_user(&pmkidInfo.pmkidList, ++ userdata + sizeof(pmkidInfo.numPMKID), ++ pmkidInfo.numPMKID * sizeof(WMI_PMKID))) ++ { ++ ret = -EFAULT; ++ break; ++ } ++ if (wmi_set_pmkid_list_cmd(ar->arWmi, &pmkidInfo) != A_OK) { ++ ret = -EIO; ++ } ++ } ++ break; ++ case AR6000_XIOCTL_WMI_GET_PMKID_LIST: ++ if (ar->arWmiReady == FALSE) { ++ ret = -EIO; ++ } else { ++ if (wmi_get_pmkid_list_cmd(ar->arWmi) != A_OK) { ++ ret = -EIO; ++ } ++ } ++ break; ++ default: ++ ret = -EOPNOTSUPP; ++ } ++ return ret; ++} ++ +diff --git a/drivers/sdio/function/wlan/ar6000/ar6000/netbuf.c b/drivers/sdio/function/wlan/ar6000/ar6000/netbuf.c +new file mode 100644 +index 0000000..97b273b +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/ar6000/netbuf.c +@@ -0,0 +1,225 @@ ++ ++/* ++ * ++ * Copyright (c) 2004-2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++#include ++#include ++#include ++#include "athdefs.h" ++#include "a_types.h" ++#include "a_osapi.h" ++#include "htc_packet.h" ++ ++#define AR6000_DATA_OFFSET 64 ++ ++void a_netbuf_enqueue(A_NETBUF_QUEUE_T *q, void *pkt) ++{ ++ skb_queue_tail((struct sk_buff_head *) q, (struct sk_buff *) pkt); ++} ++ ++void a_netbuf_prequeue(A_NETBUF_QUEUE_T *q, void *pkt) ++{ ++ skb_queue_head((struct sk_buff_head *) q, (struct sk_buff *) pkt); ++} ++ ++void *a_netbuf_dequeue(A_NETBUF_QUEUE_T *q) ++{ ++ return((void *) skb_dequeue((struct sk_buff_head *) q)); ++} ++ ++int a_netbuf_queue_size(A_NETBUF_QUEUE_T *q) ++{ ++ return(skb_queue_len((struct sk_buff_head *) q)); ++} ++ ++int a_netbuf_queue_empty(A_NETBUF_QUEUE_T *q) ++{ ++ return(skb_queue_empty((struct sk_buff_head *) q)); ++} ++ ++void a_netbuf_queue_init(A_NETBUF_QUEUE_T *q) ++{ ++ skb_queue_head_init((struct sk_buff_head *) q); ++} ++ ++void * ++a_netbuf_alloc(int size) ++{ ++ struct sk_buff *skb; ++ skb = dev_alloc_skb(AR6000_DATA_OFFSET + sizeof(HTC_PACKET) + size); ++ skb_reserve(skb, AR6000_DATA_OFFSET + sizeof(HTC_PACKET)); ++ return ((void *)skb); ++} ++ ++/* ++ * Allocate an SKB w.o. any encapsulation requirement. ++ */ ++void * ++a_netbuf_alloc_raw(int size) ++{ ++ struct sk_buff *skb; ++ ++ skb = dev_alloc_skb(size); ++ ++ return ((void *)skb); ++} ++ ++void ++a_netbuf_free(void *bufPtr) ++{ ++ struct sk_buff *skb = (struct sk_buff *)bufPtr; ++ ++ dev_kfree_skb(skb); ++} ++ ++A_UINT32 ++a_netbuf_to_len(void *bufPtr) ++{ ++ return (((struct sk_buff *)bufPtr)->len); ++} ++ ++void * ++a_netbuf_to_data(void *bufPtr) ++{ ++ return (((struct sk_buff *)bufPtr)->data); ++} ++ ++/* ++ * Add len # of bytes to the beginning of the network buffer ++ * pointed to by bufPtr ++ */ ++A_STATUS ++a_netbuf_push(void *bufPtr, A_INT32 len) ++{ ++ skb_push((struct sk_buff *)bufPtr, len); ++ ++ return A_OK; ++} ++ ++/* ++ * Add len # of bytes to the beginning of the network buffer ++ * pointed to by bufPtr and also fill with data ++ */ ++A_STATUS ++a_netbuf_push_data(void *bufPtr, char *srcPtr, A_INT32 len) ++{ ++ skb_push((struct sk_buff *) bufPtr, len); ++ A_MEMCPY(((struct sk_buff *)bufPtr)->data, srcPtr, len); ++ ++ return A_OK; ++} ++ ++/* ++ * Add len # of bytes to the end of the network buffer ++ * pointed to by bufPtr ++ */ ++A_STATUS ++a_netbuf_put(void *bufPtr, A_INT32 len) ++{ ++ skb_put((struct sk_buff *)bufPtr, len); ++ ++ return A_OK; ++} ++ ++/* ++ * Add len # of bytes to the end of the network buffer ++ * pointed to by bufPtr and also fill with data ++ */ ++A_STATUS ++a_netbuf_put_data(void *bufPtr, char *srcPtr, A_INT32 len) ++{ ++ char *start = ((struct sk_buff *)bufPtr)->data + ++ ((struct sk_buff *)bufPtr)->len; ++ skb_put((struct sk_buff *)bufPtr, len); ++ A_MEMCPY(start, srcPtr, len); ++ ++ return A_OK; ++} ++ ++ ++/* ++ * Trim the network buffer pointed to by bufPtr to len # of bytes ++ */ ++A_STATUS ++a_netbuf_setlen(void *bufPtr, A_INT32 len) ++{ ++ skb_trim((struct sk_buff *)bufPtr, len); ++ ++ return A_OK; ++} ++ ++/* ++ * Chop of len # of bytes from the end of the buffer. ++ */ ++A_STATUS ++a_netbuf_trim(void *bufPtr, A_INT32 len) ++{ ++ skb_trim((struct sk_buff *)bufPtr, ((struct sk_buff *)bufPtr)->len - len); ++ ++ return A_OK; ++} ++ ++/* ++ * Chop of len # of bytes from the end of the buffer and return the data. ++ */ ++A_STATUS ++a_netbuf_trim_data(void *bufPtr, char *dstPtr, A_INT32 len) ++{ ++ char *start = ((struct sk_buff *)bufPtr)->data + ++ (((struct sk_buff *)bufPtr)->len - len); ++ ++ A_MEMCPY(dstPtr, start, len); ++ skb_trim((struct sk_buff *)bufPtr, ((struct sk_buff *)bufPtr)->len - len); ++ ++ return A_OK; ++} ++ ++ ++/* ++ * Returns the number of bytes available to a a_netbuf_push() ++ */ ++A_INT32 ++a_netbuf_headroom(void *bufPtr) ++{ ++ return (skb_headroom((struct sk_buff *)bufPtr)); ++} ++ ++/* ++ * Removes specified number of bytes from the beginning of the buffer ++ */ ++A_STATUS ++a_netbuf_pull(void *bufPtr, A_INT32 len) ++{ ++ skb_pull((struct sk_buff *)bufPtr, len); ++ ++ return A_OK; ++} ++ ++/* ++ * Removes specified number of bytes from the beginning of the buffer ++ * and return the data ++ */ ++A_STATUS ++a_netbuf_pull_data(void *bufPtr, char *dstPtr, A_INT32 len) ++{ ++ A_MEMCPY(dstPtr, ((struct sk_buff *)bufPtr)->data, len); ++ skb_pull((struct sk_buff *)bufPtr, len); ++ ++ return A_OK; ++} ++ +diff --git a/drivers/sdio/function/wlan/ar6000/ar6000/osapi_linux.h b/drivers/sdio/function/wlan/ar6000/ar6000/osapi_linux.h +new file mode 100644 +index 0000000..5b64212 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/ar6000/osapi_linux.h +@@ -0,0 +1,319 @@ ++/* ++ * $Id: //depot/sw/releases/olca2.0-GPL/host/os/linux/include/osapi_linux.h#1 $ ++ * ++ * This file contains the definitions of the basic atheros data types. ++ * It is used to map the data types in atheros files to a platform specific ++ * type. ++ * ++ * Copyright 2003-2005 Atheros Communications, Inc., All Rights Reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++#ifndef _OSAPI_LINUX_H_ ++#define _OSAPI_LINUX_H_ ++ ++#ifdef __KERNEL__ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) ++#include ++#endif ++#include ++#include ++#include ++#ifdef KERNEL_2_4 ++#include ++#include ++#endif ++ ++#ifdef __GNUC__ ++#define __ATTRIB_PACK __attribute__ ((packed)) ++#define __ATTRIB_PRINTF __attribute__ ((format (printf, 1, 2))) ++#define __ATTRIB_NORETURN __attribute__ ((noreturn)) ++#ifndef INLINE ++#define INLINE __inline__ ++#endif ++#else /* Not GCC */ ++#define __ATTRIB_PACK ++#define __ATTRIB_PRINTF ++#define __ATTRIB_NORETURN ++#ifndef INLINE ++#define INLINE __inline ++#endif ++#endif /* End __GNUC__ */ ++ ++#define PREPACK ++#define POSTPACK __ATTRIB_PACK ++ ++/* ++ * Endianes macros ++ */ ++#define A_BE2CPU8(x) ntohb(x) ++#define A_BE2CPU16(x) ntohs(x) ++#define A_BE2CPU32(x) ntohl(x) ++ ++#define A_LE2CPU8(x) (x) ++#define A_LE2CPU16(x) (x) ++#define A_LE2CPU32(x) (x) ++ ++#define A_CPU2BE8(x) htonb(x) ++#define A_CPU2BE16(x) htons(x) ++#define A_CPU2BE32(x) htonl(x) ++ ++#define A_MEMCPY(dst, src, len) memcpy((A_UINT8 *)(dst), (src), (len)) ++#define A_MEMZERO(addr, len) memset(addr, 0, len) ++#define A_MEMCMP(addr1, addr2, len) memcmp((addr1), (addr2), (len)) ++#define A_MALLOC(size) kmalloc((size), GFP_KERNEL) ++#define A_MALLOC_NOWAIT(size) kmalloc((size), GFP_ATOMIC) ++#define A_FREE(addr) kfree(addr) ++#define A_PRINTF(args...) printk(args) ++ ++/* Mutual Exclusion */ ++typedef spinlock_t A_MUTEX_T; ++#define A_MUTEX_INIT(mutex) spin_lock_init(mutex) ++#define A_MUTEX_LOCK(mutex) spin_lock_bh(mutex) ++#define A_MUTEX_UNLOCK(mutex) spin_unlock_bh(mutex) ++#define A_IS_MUTEX_VALID(mutex) TRUE /* okay to return true, since A_MUTEX_DELETE does nothing */ ++#define A_MUTEX_DELETE(mutex) /* spin locks are not kernel resources so nothing to free.. */ ++ ++/* Get current time in ms adding a constant offset (in ms) */ ++#define A_GET_MS(offset) \ ++ (jiffies + ((offset) / 1000) * HZ) ++ ++/* ++ * Timer Functions ++ */ ++#define A_MDELAY(msecs) mdelay(msecs) ++typedef struct timer_list A_TIMER; ++ ++#define A_INIT_TIMER(pTimer, pFunction, pArg) do { \ ++ init_timer(pTimer); \ ++ (pTimer)->function = (pFunction); \ ++ (pTimer)->data = (unsigned long)(pArg); \ ++} while (0) ++ ++/* ++ * Start a Timer that elapses after 'periodMSec' milli-seconds ++ * Support is provided for a one-shot timer. The 'repeatFlag' is ++ * ignored. ++ */ ++#define A_TIMEOUT_MS(pTimer, periodMSec, repeatFlag) do { \ ++ if (repeatFlag) { \ ++ printk("\n" __FILE__ ":%d: Timer Repeat requested\n",__LINE__); \ ++ panic("Timer Repeat"); \ ++ } \ ++ mod_timer((pTimer), jiffies + HZ * (periodMSec) / 1000); \ ++} while (0) ++ ++/* ++ * Cancel the Timer. ++ */ ++#define A_UNTIMEOUT(pTimer) do { \ ++ del_timer((pTimer)); \ ++} while (0) ++ ++#define A_DELETE_TIMER(pTimer) do { \ ++} while (0) ++ ++/* ++ * Wait Queue related functions ++ */ ++typedef wait_queue_head_t A_WAITQUEUE_HEAD; ++#define A_INIT_WAITQUEUE_HEAD(head) init_waitqueue_head(head) ++#ifndef wait_event_interruptible_timeout ++#define __wait_event_interruptible_timeout(wq, condition, ret) \ ++do { \ ++ wait_queue_t __wait; \ ++ init_waitqueue_entry(&__wait, current); \ ++ \ ++ add_wait_queue(&wq, &__wait); \ ++ for (;;) { \ ++ set_current_state(TASK_INTERRUPTIBLE); \ ++ if (condition) \ ++ break; \ ++ if (!signal_pending(current)) { \ ++ ret = schedule_timeout(ret); \ ++ if (!ret) \ ++ break; \ ++ continue; \ ++ } \ ++ ret = -ERESTARTSYS; \ ++ break; \ ++ } \ ++ current->state = TASK_RUNNING; \ ++ remove_wait_queue(&wq, &__wait); \ ++} while (0) ++ ++#define wait_event_interruptible_timeout(wq, condition, timeout) \ ++({ \ ++ long __ret = timeout; \ ++ if (!(condition)) \ ++ __wait_event_interruptible_timeout(wq, condition, __ret); \ ++ __ret; \ ++}) ++#endif /* wait_event_interruptible_timeout */ ++ ++#define A_WAIT_EVENT_INTERRUPTIBLE_TIMEOUT(head, condition, timeout) do { \ ++ wait_event_interruptible_timeout(head, condition, timeout); \ ++} while (0) ++ ++#define A_WAKE_UP(head) wake_up(head) ++ ++#ifdef DEBUG ++#define A_ASSERT(expr) \ ++ if (!(expr)) { \ ++ printk(KERN_ALERT "\n" __FILE__ ":%d: Assertion " #expr " failed!\n",__LINE__); \ ++ panic(#expr); \ ++ } ++ ++#else ++#define A_ASSERT(expr) ++#endif /* DEBUG */ ++ ++/* ++ * Initialization of the network buffer subsystem ++ */ ++#define A_NETBUF_INIT() ++ ++/* ++ * Network buffer queue support ++ */ ++typedef struct sk_buff_head A_NETBUF_QUEUE_T; ++ ++#define A_NETBUF_QUEUE_INIT(q) \ ++ a_netbuf_queue_init(q) ++ ++#define A_NETBUF_ENQUEUE(q, pkt) \ ++ a_netbuf_enqueue((q), (pkt)) ++#define A_NETBUF_PREQUEUE(q, pkt) \ ++ a_netbuf_prequeue((q), (pkt)) ++#define A_NETBUF_DEQUEUE(q) \ ++ (a_netbuf_dequeue(q)) ++#define A_NETBUF_QUEUE_SIZE(q) \ ++ a_netbuf_queue_size(q) ++#define A_NETBUF_QUEUE_EMPTY(q) \ ++ a_netbuf_queue_empty(q) ++ ++/* ++ * Network buffer support ++ */ ++#define A_NETBUF_ALLOC(size) \ ++ a_netbuf_alloc(size) ++#define A_NETBUF_ALLOC_RAW(size) \ ++ a_netbuf_alloc_raw(size) ++#define A_NETBUF_FREE(bufPtr) \ ++ a_netbuf_free(bufPtr) ++#define A_NETBUF_DATA(bufPtr) \ ++ a_netbuf_to_data(bufPtr) ++#define A_NETBUF_LEN(bufPtr) \ ++ a_netbuf_to_len(bufPtr) ++#define A_NETBUF_PUSH(bufPtr, len) \ ++ a_netbuf_push(bufPtr, len) ++#define A_NETBUF_PUT(bufPtr, len) \ ++ a_netbuf_put(bufPtr, len) ++#define A_NETBUF_TRIM(bufPtr,len) \ ++ a_netbuf_trim(bufPtr, len) ++#define A_NETBUF_PULL(bufPtr, len) \ ++ a_netbuf_pull(bufPtr, len) ++#define A_NETBUF_HEADROOM(bufPtr)\ ++ a_netbuf_headroom(bufPtr) ++#define A_NETBUF_SETLEN(bufPtr,len) \ ++ a_netbuf_setlen(bufPtr, len) ++ ++/* Add data to end of a buffer */ ++#define A_NETBUF_PUT_DATA(bufPtr, srcPtr, len) \ ++ a_netbuf_put_data(bufPtr, srcPtr, len) ++ ++/* Add data to start of the buffer */ ++#define A_NETBUF_PUSH_DATA(bufPtr, srcPtr, len) \ ++ a_netbuf_push_data(bufPtr, srcPtr, len) ++ ++/* Remove data at start of the buffer */ ++#define A_NETBUF_PULL_DATA(bufPtr, dstPtr, len) \ ++ a_netbuf_pull_data(bufPtr, dstPtr, len) ++ ++/* Remove data from the end of the buffer */ ++#define A_NETBUF_TRIM_DATA(bufPtr, dstPtr, len) \ ++ a_netbuf_trim_data(bufPtr, dstPtr, len) ++ ++/* View data as "size" contiguous bytes of type "t" */ ++#define A_NETBUF_VIEW_DATA(bufPtr, t, size) \ ++ (t )( ((struct skbuf *)(bufPtr))->data) ++ ++/* return the beginning of the headroom for the buffer */ ++#define A_NETBUF_HEAD(bufPtr) \ ++ ((((struct sk_buff *)(bufPtr))->head)) ++ ++/* ++ * OS specific network buffer access routines ++ */ ++void *a_netbuf_alloc(int size); ++void *a_netbuf_alloc_raw(int size); ++void a_netbuf_free(void *bufPtr); ++void *a_netbuf_to_data(void *bufPtr); ++A_UINT32 a_netbuf_to_len(void *bufPtr); ++A_STATUS a_netbuf_push(void *bufPtr, A_INT32 len); ++A_STATUS a_netbuf_push_data(void *bufPtr, char *srcPtr, A_INT32 len); ++A_STATUS a_netbuf_put(void *bufPtr, A_INT32 len); ++A_STATUS a_netbuf_put_data(void *bufPtr, char *srcPtr, A_INT32 len); ++A_STATUS a_netbuf_pull(void *bufPtr, A_INT32 len); ++A_STATUS a_netbuf_pull_data(void *bufPtr, char *dstPtr, A_INT32 len); ++A_STATUS a_netbuf_trim(void *bufPtr, A_INT32 len); ++A_STATUS a_netbuf_trim_data(void *bufPtr, char *dstPtr, A_INT32 len); ++A_STATUS a_netbuf_setlen(void *bufPtr, A_INT32 len); ++A_INT32 a_netbuf_headroom(void *bufPtr); ++void a_netbuf_enqueue(A_NETBUF_QUEUE_T *q, void *pkt); ++void a_netbuf_prequeue(A_NETBUF_QUEUE_T *q, void *pkt); ++void *a_netbuf_dequeue(A_NETBUF_QUEUE_T *q); ++int a_netbuf_queue_size(A_NETBUF_QUEUE_T *q); ++int a_netbuf_queue_empty(A_NETBUF_QUEUE_T *q); ++int a_netbuf_queue_empty(A_NETBUF_QUEUE_T *q); ++void a_netbuf_queue_init(A_NETBUF_QUEUE_T *q); ++ ++/* ++ * Kernel v.s User space functions ++ */ ++A_UINT32 a_copy_to_user(void *to, const void *from, A_UINT32 n); ++A_UINT32 a_copy_from_user(void *to, const void *from, A_UINT32 n); ++ ++#else /* __KERNEL__ */ ++ ++#ifdef __GNUC__ ++#define __ATTRIB_PACK __attribute__ ((packed)) ++#define __ATTRIB_PRINTF __attribute__ ((format (printf, 1, 2))) ++#define __ATTRIB_NORETURN __attribute__ ((noreturn)) ++#ifndef INLINE ++#define INLINE __inline__ ++#endif ++#else /* Not GCC */ ++#define __ATTRIB_PACK ++#define __ATTRIB_PRINTF ++#define __ATTRIB_NORETURN ++#ifndef INLINE ++#define INLINE __inline ++#endif ++#endif /* End __GNUC__ */ ++ ++#define PREPACK ++#define POSTPACK __ATTRIB_PACK ++ ++#endif /* __KERNEL__ */ ++ ++#endif /* _OSAPI_LINUX_H_ */ +diff --git a/drivers/sdio/function/wlan/ar6000/ar6000/wireless_ext.c b/drivers/sdio/function/wlan/ar6000/ar6000/wireless_ext.c +new file mode 100644 +index 0000000..d775e4d +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/ar6000/wireless_ext.c +@@ -0,0 +1,1946 @@ ++/* ++ * ++ * Copyright (c) 2004-2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++#include "ar6000_drv.h" ++ ++static A_UINT8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; ++static void ar6000_set_quality(struct iw_quality *iq, A_INT8 rssi); ++extern unsigned int wmitimeout; ++extern A_WAITQUEUE_HEAD arEvent; ++extern wait_queue_head_t ar6000_scan_queue; ++ ++/* ++ * Encode a WPA or RSN information element as a custom ++ * element using the hostap format. ++ */ ++static u_int ++encode_ie(void *buf, size_t bufsize, ++ const u_int8_t *ie, size_t ielen, ++ const char *leader, size_t leader_len) ++{ ++ u_int8_t *p; ++ int i; ++ ++ if (bufsize < leader_len) ++ return 0; ++ p = buf; ++ memcpy(p, leader, leader_len); ++ bufsize -= leader_len; ++ p += leader_len; ++ for (i = 0; i < ielen && bufsize > 2; i++) ++ p += sprintf(p, "%02x", ie[i]); ++ return (i == ielen ? p - (u_int8_t *)buf : 0); ++} ++ ++void ++ar6000_scan_node(void *arg, bss_t *ni) ++{ ++ struct iw_event iwe; ++#if WIRELESS_EXT > 14 ++ char buf[64*2 + 30]; ++#endif ++ struct ar_giwscan_param *param; ++ A_CHAR *current_ev; ++ A_CHAR *end_buf; ++ struct ieee80211_common_ie *cie; ++ ++ param = (struct ar_giwscan_param *)arg; ++ ++ if (param->current_ev >= param->end_buf) { ++ return; ++ } ++ if ((param->firstPass == TRUE) && ++ ((ni->ni_cie.ie_wpa == NULL) && (ni->ni_cie.ie_rsn == NULL))) { ++ /* ++ * Only forward wpa bss's in first pass ++ */ ++ return; ++ } ++ ++ if ((param->firstPass == FALSE) && ++ ((ni->ni_cie.ie_wpa != NULL) || (ni->ni_cie.ie_rsn != NULL))) { ++ /* ++ * Only forward non-wpa bss's in 2nd pass ++ */ ++ return; ++ } ++ ++ current_ev = param->current_ev; ++ end_buf = param->end_buf; ++ ++ cie = &ni->ni_cie; ++ ++ A_MEMZERO(&iwe, sizeof(iwe)); ++ iwe.cmd = SIOCGIWAP; ++ iwe.u.ap_addr.sa_family = ARPHRD_ETHER; ++ A_MEMCPY(iwe.u.ap_addr.sa_data, ni->ni_macaddr, 6); ++ current_ev = iwe_stream_add_event(current_ev, end_buf, &iwe, ++ IW_EV_ADDR_LEN); ++ ++ A_MEMZERO(&iwe, sizeof(iwe)); ++ iwe.cmd = SIOCGIWESSID; ++ iwe.u.data.flags = 1; ++ iwe.u.data.length = cie->ie_ssid[1]; ++ current_ev = iwe_stream_add_point(current_ev, end_buf, &iwe, ++ &cie->ie_ssid[2]); ++ ++ if (cie->ie_capInfo & (IEEE80211_CAPINFO_ESS|IEEE80211_CAPINFO_IBSS)) { ++ A_MEMZERO(&iwe, sizeof(iwe)); ++ iwe.cmd = SIOCGIWMODE; ++ iwe.u.mode = cie->ie_capInfo & IEEE80211_CAPINFO_ESS ? ++ IW_MODE_MASTER : IW_MODE_ADHOC; ++ current_ev = iwe_stream_add_event(current_ev, end_buf, &iwe, ++ IW_EV_UINT_LEN); ++ } ++ ++ A_MEMZERO(&iwe, sizeof(iwe)); ++ iwe.cmd = SIOCGIWFREQ; ++ iwe.u.freq.m = cie->ie_chan * 100000; ++ iwe.u.freq.e = 1; ++ current_ev = iwe_stream_add_event(current_ev, end_buf, &iwe, ++ IW_EV_FREQ_LEN); ++ ++ A_MEMZERO(&iwe, sizeof(iwe)); ++ iwe.cmd = IWEVQUAL; ++ ar6000_set_quality(&iwe.u.qual, ni->ni_snr); ++ current_ev = iwe_stream_add_event(current_ev, end_buf, &iwe, ++ IW_EV_QUAL_LEN); ++ ++ A_MEMZERO(&iwe, sizeof(iwe)); ++ iwe.cmd = SIOCGIWENCODE; ++ if (cie->ie_capInfo & IEEE80211_CAPINFO_PRIVACY) { ++ iwe.u.data.flags = IW_ENCODE_ENABLED | IW_ENCODE_NOKEY; ++ } else { ++ iwe.u.data.flags = IW_ENCODE_DISABLED; ++ } ++ iwe.u.data.length = 0; ++ current_ev = iwe_stream_add_point(current_ev, end_buf, &iwe, ""); ++ ++ A_MEMZERO(&iwe, sizeof(iwe)); ++ iwe.cmd = IWEVCUSTOM; ++ snprintf(buf, sizeof(buf), "bcn_int=%d", cie->ie_beaconInt); ++ iwe.u.data.length = strlen(buf); ++ current_ev = iwe_stream_add_point(current_ev, end_buf, &iwe, buf); ++ ++ if (cie->ie_wpa != NULL) { ++ static const char wpa_leader[] = "wpa_ie="; ++ ++ A_MEMZERO(&iwe, sizeof(iwe)); ++ iwe.cmd = IWEVCUSTOM; ++ iwe.u.data.length = encode_ie(buf, sizeof(buf), cie->ie_wpa, ++ cie->ie_wpa[1]+2, ++ wpa_leader, sizeof(wpa_leader)-1); ++ ++ if (iwe.u.data.length != 0) { ++ current_ev = iwe_stream_add_point(current_ev, end_buf, &iwe, buf); ++ } ++ } ++ ++ if (cie->ie_rsn != NULL && cie->ie_rsn[0] == IEEE80211_ELEMID_RSN) { ++ static const char rsn_leader[] = "rsn_ie="; ++ ++ A_MEMZERO(&iwe, sizeof(iwe)); ++ iwe.cmd = IWEVCUSTOM; ++ iwe.u.data.length = encode_ie(buf, sizeof(buf), cie->ie_rsn, ++ cie->ie_rsn[1]+2, ++ rsn_leader, sizeof(rsn_leader)-1); ++ ++ if (iwe.u.data.length != 0) { ++ current_ev = iwe_stream_add_point(current_ev, end_buf, &iwe, buf); ++ } ++ } ++ ++ if (cie->ie_wmm != NULL) { ++ static const char wmm_leader[] = "wmm_ie="; ++ ++ A_MEMZERO(&iwe, sizeof(iwe)); ++ iwe.cmd = IWEVCUSTOM; ++ iwe.u.data.length = encode_ie(buf, sizeof(buf), cie->ie_wmm, ++ cie->ie_wmm[1]+2, ++ wmm_leader, sizeof(wmm_leader)-1); ++ if (iwe.u.data.length != 0) { ++ current_ev = iwe_stream_add_point(current_ev, end_buf, &iwe, buf); ++ } ++ } ++ ++ if (cie->ie_ath != NULL) { ++ static const char ath_leader[] = "ath_ie="; ++ ++ A_MEMZERO(&iwe, sizeof(iwe)); ++ iwe.cmd = IWEVCUSTOM; ++ iwe.u.data.length = encode_ie(buf, sizeof(buf), cie->ie_ath, ++ cie->ie_ath[1]+2, ++ ath_leader, sizeof(ath_leader)-1); ++ if (iwe.u.data.length != 0) { ++ current_ev = iwe_stream_add_point(current_ev, end_buf, &iwe, buf); ++ } ++ } ++ ++ param->current_ev = current_ev; ++} ++ ++int ++ar6000_ioctl_giwscan(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *data, char *extra) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ struct ar_giwscan_param param; ++ int i; ++ ++ if (ar->arWlanState == WLAN_DISABLED) { ++ return -EIO; ++ } ++ ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ ++ param.current_ev = extra; ++ param.end_buf = extra + IW_SCAN_MAX_DATA; ++ param.firstPass = TRUE; ++ ++ /* ++ * Do two passes to insure WPA scan candidates ++ * are sorted to the front. This is a hack to deal with ++ * the wireless extensions capping scan results at ++ * IW_SCAN_MAX_DATA bytes. In densely populated environments ++ * it's easy to overflow this buffer (especially with WPA/RSN ++ * information elements). Note this sorting hack does not ++ * guarantee we won't overflow anyway. ++ */ ++ for (i = 0; i < 2; i++) { ++ /* ++ * Translate data to WE format. ++ */ ++ wmi_iterate_nodes(ar->arWmi, ar6000_scan_node, ¶m); ++ param.firstPass = FALSE; ++ if (param.current_ev >= param.end_buf) { ++ data->length = param.current_ev - extra; ++ return -E2BIG; ++ } ++ } ++ ++ if(!(data->length = param.current_ev - extra)) { ++ printk("%s(): data length %d\n", __FUNCTION__, data->length); ++ return -EAGAIN; ++ } ++ return 0; ++} ++ ++extern int reconnect_flag; ++/* SIOCSIWESSID */ ++static int ++ar6000_ioctl_siwessid(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *data, char *ssid) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ A_STATUS status; ++ A_UINT8 arNetworkType; ++ ++ if (ar->arWlanState == WLAN_DISABLED) { ++ return -EIO; ++ } ++ ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ ++ /* ++ * iwconfig passes a null terminated string with length including this ++ * so we need to account for this ++ */ ++ if (data->flags && (!data->length || (data->length == 1) || ++ ((data->length - 1) > sizeof(ar->arSsid)))) ++ { ++ /* ++ * ssid is invalid ++ */ ++ return -EINVAL; ++ } ++ /* Added for bug 25178, return an IOCTL error instead of target returning ++ Illegal parameter error when either the BSSID or channel is missing ++ and we cannot scan during connect. ++ */ ++ if (data->flags) { ++ if (ar->arSkipScan == TRUE && ++ (ar->arChannelHint == 0 || ++ (!ar->arReqBssid[0] && !ar->arReqBssid[1] && !ar->arReqBssid[2] && ++ !ar->arReqBssid[3] && !ar->arReqBssid[4] && !ar->arReqBssid[5]))) ++ { ++ return -EINVAL; ++ } ++ } ++ ++ if (down_interruptible(&ar->arSem)) { ++ return -ERESTARTSYS; ++ } ++ ++ if (ar->arTxPending[WMI_CONTROL_PRI]) { ++ /* ++ * sleep until the command queue drains ++ */ ++ wait_event_interruptible_timeout(arEvent, ++ ar->arTxPending[WMI_CONTROL_PRI] == 0, wmitimeout * HZ); ++ if (signal_pending(current)) { ++ return -EINTR; ++ } ++ } ++ ++ if (!data->flags) { ++ arNetworkType = ar->arNetworkType; ++ ar6000_init_profile_info(ar); ++ ar->arNetworkType = arNetworkType; ++ } ++ ++ if ((ar->arSsidLen) || (!data->flags)) ++ { ++ if ((!data->flags) || ++ (A_MEMCMP(ar->arSsid, ssid, ar->arSsidLen) != 0) || ++ (ar->arSsidLen != (data->length))) ++ { ++ /* ++ * SSID set previously or essid off has been issued. ++ * ++ * Disconnect Command is issued in two cases after wmi is ready ++ * (1) ssid is different from the previous setting ++ * (2) essid off has been issued ++ * ++ */ ++ if (ar->arWmiReady == TRUE) { ++ reconnect_flag = 0; ++ status = wmi_disconnect_cmd(ar->arWmi); ++ A_MEMZERO(ar->arSsid, sizeof(ar->arSsid)); ++ ar->arSsidLen = 0; ++ if (ar->arSkipScan == FALSE) { ++ A_MEMZERO(ar->arReqBssid, sizeof(ar->arReqBssid)); ++ } ++ if (!data->flags) { ++ up(&ar->arSem); ++ return 0; ++ } ++ } else { ++ up(&ar->arSem); ++ } ++ } ++ else ++ { ++ /* ++ * SSID is same, so we assume profile hasn't changed. ++ * If the interface is up and wmi is ready, we issue ++ * a reconnect cmd. Issue a reconnect only we are already ++ * connected. ++ */ ++ if((ar->arConnected == TRUE) && (ar->arWmiReady == TRUE)) ++ { ++ reconnect_flag = TRUE; ++ status = wmi_reconnect_cmd(ar->arWmi,ar->arReqBssid, ++ ar->arChannelHint); ++ up(&ar->arSem); ++ if (status != A_OK) { ++ return -EIO; ++ } ++ return 0; ++ } ++ else{ ++ /* ++ * Dont return if connect is pending. ++ */ ++ if(!(ar->arConnectPending)) { ++ up(&ar->arSem); ++ return 0; ++ } ++ } ++ } ++ } ++ ++ ar->arSsidLen = data->length; ++ A_MEMCPY(ar->arSsid, ssid, ar->arSsidLen); ++ ++ /* The ssid length check prevents second "essid off" from the user, ++ to be treated as a connect cmd. The second "essid off" is ignored. ++ */ ++ if((ar->arWmiReady == TRUE) && (ar->arSsidLen > 0) ) ++ { ++ AR6000_SPIN_LOCK(&ar->arLock, 0); ++ if (SHARED_AUTH == ar->arDot11AuthMode) { ++ ar6000_install_static_wep_keys(ar); ++ } ++ AR_DEBUG_PRINTF("Connect called with authmode %d dot11 auth %d"\ ++ " PW crypto %d PW crypto Len %d GRP crypto %d"\ ++ " GRP crypto Len %d\n", ++ ar->arAuthMode, ar->arDot11AuthMode, ++ ar->arPairwiseCrypto, ar->arPairwiseCryptoLen, ++ ar->arGroupCrypto, ar->arGroupCryptoLen); ++ reconnect_flag = 0; ++ AR6000_SPIN_UNLOCK(&ar->arLock, 0); ++ status = wmi_connect_cmd(ar->arWmi, ar->arNetworkType, ++ ar->arDot11AuthMode, ar->arAuthMode, ++ ar->arPairwiseCrypto, ar->arPairwiseCryptoLen, ++ ar->arGroupCrypto,ar->arGroupCryptoLen, ++ ar->arSsidLen, ar->arSsid, ++ ar->arReqBssid, ar->arChannelHint, ++ ar->arConnectCtrlFlags); ++ ++ ++ up(&ar->arSem); ++ ++ if (status != A_OK) { ++ return -EIO; ++ } ++ ar->arConnectPending = TRUE; ++ }else{ ++ up(&ar->arSem); ++ } ++ return 0; ++} ++ ++/* SIOCGIWESSID */ ++static int ++ar6000_ioctl_giwessid(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *data, char *essid) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ ++ if (ar->arWlanState == WLAN_DISABLED) { ++ return -EIO; ++ } ++ ++ if (!ar->arSsidLen) { ++ return -EINVAL; ++ } ++ ++ data->flags = 1; ++ data->length = ar->arSsidLen; ++ A_MEMCPY(essid, ar->arSsid, ar->arSsidLen); ++ ++ return 0; ++} ++ ++ ++void ar6000_install_static_wep_keys(AR_SOFTC_T *ar) ++{ ++ A_UINT8 index; ++ A_UINT8 keyUsage; ++ ++ for (index = WMI_MIN_KEY_INDEX; index <= WMI_MAX_KEY_INDEX; index++) { ++ if (ar->arWepKeyList[index].arKeyLen) { ++ keyUsage = GROUP_USAGE; ++ if (index == ar->arDefTxKeyIndex) { ++ keyUsage |= TX_USAGE; ++ } ++ wmi_addKey_cmd(ar->arWmi, ++ index, ++ WEP_CRYPT, ++ keyUsage, ++ ar->arWepKeyList[index].arKeyLen, ++ NULL, ++ ar->arWepKeyList[index].arKey, KEY_OP_INIT_VAL, ++ NO_SYNC_WMIFLAG); ++ } ++ } ++} ++ ++int ++ar6000_ioctl_delkey(struct net_device *dev, struct iw_request_info *info, ++ void *w, char *extra) ++{ ++ return 0; ++} ++ ++int ++ar6000_ioctl_setmlme(struct net_device *dev, struct iw_request_info *info, ++ void *w, char *extra) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ struct ieee80211req_mlme *mlme = (struct ieee80211req_mlme *)extra; ++ ++ if ((ar->arWmiReady == FALSE) || (ar->arConnected != TRUE)) ++ return -EIO; ++ ++ switch (mlme->im_op) { ++ case IEEE80211_MLME_DISASSOC: ++ case IEEE80211_MLME_DEAUTH: ++ /* Not Supported */ ++ break; ++ default: ++ break; ++ } ++ return 0; ++} ++ ++ ++int ++ar6000_ioctl_setwmmparams(struct net_device *dev, struct iw_request_info *info, ++ void *w, char *extra) ++{ ++ return -EIO; /* for now */ ++} ++ ++int ++ar6000_ioctl_getwmmparams(struct net_device *dev, struct iw_request_info *info, ++ void *w, char *extra) ++{ ++ return -EIO; /* for now */ ++} ++ ++int ar6000_ioctl_setoptie(struct net_device *dev, struct iw_request_info *info, ++ struct iw_point *data, char *extra) ++{ ++ /* The target generates the WPA/RSN IE */ ++ return 0; ++} ++ ++int ++ar6000_ioctl_setauthalg(struct net_device *dev, struct iw_request_info *info, ++ void *w, char *extra) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ struct ieee80211req_authalg *req = (struct ieee80211req_authalg *)extra; ++ int ret = 0; ++ ++ ++ AR6000_SPIN_LOCK(&ar->arLock, 0); ++ ++ if (req->auth_alg == AUTH_ALG_OPEN_SYSTEM) { ++ ar->arDot11AuthMode = OPEN_AUTH; ++ } else if (req->auth_alg == AUTH_ALG_LEAP) { ++ ar->arDot11AuthMode = LEAP_AUTH; ++ ar->arPairwiseCrypto = WEP_CRYPT; ++ ar->arGroupCrypto = WEP_CRYPT; ++ } else { ++ ret = -EIO; ++ } ++ ++ AR6000_SPIN_UNLOCK(&ar->arLock, 0); ++ ++ return ret; ++} ++static int ++ar6000_ioctl_addpmkid(struct net_device *dev, struct iw_request_info *info, ++ void *w, char *extra) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ struct ieee80211req_addpmkid *req = (struct ieee80211req_addpmkid *)extra; ++ A_STATUS status; ++ ++ if (ar->arWlanState == WLAN_DISABLED) { ++ return -EIO; ++ } ++ ++ AR_DEBUG_PRINTF("Add pmkid for %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x en=%d\n", ++ req->pi_bssid[0], req->pi_bssid[1], req->pi_bssid[2], ++ req->pi_bssid[3], req->pi_bssid[4], req->pi_bssid[5], ++ req->pi_enable); ++ ++ status = wmi_setPmkid_cmd(ar->arWmi, req->pi_bssid, req->pi_pmkid, ++ req->pi_enable); ++ ++ if (status != A_OK) { ++ return -EIO; ++ } ++ ++ return 0; ++} ++ ++/* ++ * SIOCSIWRATE ++ */ ++int ++ar6000_ioctl_siwrate(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_param *rrq, char *extra) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ A_UINT32 kbps; ++ ++ if (rrq->fixed) { ++ kbps = rrq->value / 1000; /* rrq->value is in bps */ ++ } else { ++ kbps = -1; /* -1 indicates auto rate */ ++ } ++ if(kbps != -1 && wmi_validate_bitrate(ar->arWmi, kbps) == A_EINVAL) ++ { ++ AR_DEBUG_PRINTF("BitRate is not Valid %d\n", kbps); ++ return -EINVAL; ++ } ++ ar->arBitRate = kbps; ++ if(ar->arWmiReady == TRUE) ++ { ++ if (wmi_set_bitrate_cmd(ar->arWmi, kbps) != A_OK) { ++ return -EINVAL; ++ } ++ } ++ return 0; ++} ++ ++/* ++ * SIOCGIWRATE ++ */ ++int ++ar6000_ioctl_giwrate(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_param *rrq, char *extra) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ int ret = 0; ++ ++ if (down_interruptible(&ar->arSem)) { ++ return -ERESTARTSYS; ++ } ++ if(ar->arWmiReady == TRUE) ++ { ++ ar->arBitRate = 0xFFFF; ++ if (wmi_get_bitrate_cmd(ar->arWmi) != A_OK) { ++ up(&ar->arSem); ++ return -EIO; ++ } ++ wait_event_interruptible_timeout(arEvent, ar->arBitRate != 0xFFFF, wmitimeout * HZ); ++ if (signal_pending(current)) { ++ ret = -EINTR; ++ } ++ } ++ /* If the interface is down or wmi is not ready or the target is not ++ connected - return the value stored in the device structure */ ++ if (!ret) { ++ if (ar->arBitRate == -1) { ++ rrq->fixed = TRUE; ++ rrq->value = 0; ++ } else { ++ rrq->value = ar->arBitRate * 1000; ++ } ++ } ++ ++ up(&ar->arSem); ++ ++ return ret; ++} ++ ++/* ++ * SIOCSIWTXPOW ++ */ ++static int ++ar6000_ioctl_siwtxpow(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_param *rrq, char *extra) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ A_UINT8 dbM; ++ ++ if (ar->arWlanState == WLAN_DISABLED) { ++ return -EIO; ++ } ++ ++ if (rrq->disabled) { ++ return -EOPNOTSUPP; ++ } ++ ++ if (rrq->fixed) { ++ if (rrq->flags != IW_TXPOW_DBM) { ++ return -EOPNOTSUPP; ++ } ++ ar->arTxPwr= dbM = rrq->value; ++ ar->arTxPwrSet = TRUE; ++ } else { ++ ar->arTxPwr = dbM = 0; ++ ar->arTxPwrSet = FALSE; ++ } ++ if(ar->arWmiReady == TRUE) ++ { ++ AR_DEBUG_PRINTF("Set tx pwr cmd %d dbM\n", dbM); ++ wmi_set_txPwr_cmd(ar->arWmi, dbM); ++ } ++ return 0; ++} ++ ++/* ++ * SIOCGIWTXPOW ++ */ ++int ++ar6000_ioctl_giwtxpow(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_param *rrq, char *extra) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ int ret = 0; ++ ++ if (ar->arWlanState == WLAN_DISABLED) { ++ return -EIO; ++ } ++ ++ if (down_interruptible(&ar->arSem)) { ++ return -ERESTARTSYS; ++ } ++ if((ar->arWmiReady == TRUE) && (ar->arConnected == TRUE)) ++ { ++ ar->arTxPwr = 0; ++ ++ if (wmi_get_txPwr_cmd(ar->arWmi) != A_OK) { ++ up(&ar->arSem); ++ return -EIO; ++ } ++ ++ wait_event_interruptible_timeout(arEvent, ar->arTxPwr != 0, wmitimeout * HZ); ++ ++ if (signal_pending(current)) { ++ ret = -EINTR; ++ } ++ } ++ /* If the interace is down or wmi is not ready or target is not connected ++ then return value stored in the device structure */ ++ ++ if (!ret) { ++ if (ar->arTxPwrSet == TRUE) { ++ rrq->fixed = TRUE; ++ } ++ rrq->value = ar->arTxPwr; ++ rrq->flags = IW_TXPOW_DBM; ++ } ++ ++ up(&ar->arSem); ++ ++ return ret; ++} ++ ++/* ++ * SIOCSIWRETRY ++ * since iwconfig only provides us with one max retry value, we use it ++ * to apply to data frames of the BE traffic class. ++ */ ++static int ++ar6000_ioctl_siwretry(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_param *rrq, char *extra) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ ++ if (ar->arWlanState == WLAN_DISABLED) { ++ return -EIO; ++ } ++ ++ if (rrq->disabled) { ++ return -EOPNOTSUPP; ++ } ++ ++ if ((rrq->flags & IW_RETRY_TYPE) != IW_RETRY_LIMIT) { ++ return -EOPNOTSUPP; ++ } ++ ++ if ( !(rrq->value >= WMI_MIN_RETRIES) || !(rrq->value <= WMI_MAX_RETRIES)) { ++ return - EINVAL; ++ } ++ if(ar->arWmiReady == TRUE) ++ { ++ if (wmi_set_retry_limits_cmd(ar->arWmi, DATA_FRAMETYPE, WMM_AC_BE, ++ rrq->value, 0) != A_OK){ ++ return -EINVAL; ++ } ++ } ++ ar->arMaxRetries = rrq->value; ++ return 0; ++} ++ ++/* ++ * SIOCGIWRETRY ++ */ ++static int ++ar6000_ioctl_giwretry(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_param *rrq, char *extra) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ ++ if (ar->arWlanState == WLAN_DISABLED) { ++ return -EIO; ++ } ++ ++ rrq->disabled = 0; ++ switch (rrq->flags & IW_RETRY_TYPE) { ++ case IW_RETRY_LIFETIME: ++ return -EOPNOTSUPP; ++ break; ++ case IW_RETRY_LIMIT: ++ rrq->flags = IW_RETRY_LIMIT; ++ switch (rrq->flags & IW_RETRY_MODIFIER) { ++ case IW_RETRY_MIN: ++ rrq->flags |= IW_RETRY_MIN; ++ rrq->value = WMI_MIN_RETRIES; ++ break; ++ case IW_RETRY_MAX: ++ rrq->flags |= IW_RETRY_MAX; ++ rrq->value = ar->arMaxRetries; ++ break; ++ } ++ break; ++ } ++ return 0; ++} ++ ++/* ++ * SIOCSIWENCODE ++ */ ++static int ++ar6000_ioctl_siwencode(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *erq, char *keybuf) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ int index; ++ A_INT32 auth = ar->arDot11AuthMode; ++ /* ++ * Static WEP Keys should be configured before setting the SSID ++ */ ++ if (ar->arSsidLen) { ++ return -EIO; ++ } ++ ++ if (ar->arWlanState == WLAN_DISABLED) { ++ return -EIO; ++ } ++ ++ index = erq->flags & IW_ENCODE_INDEX; ++ ++ if (index && (((index - 1) < WMI_MIN_KEY_INDEX) || ++ ((index - 1) > WMI_MAX_KEY_INDEX))) ++ { ++ return -EIO; ++ } ++ ++ if (erq->flags & IW_ENCODE_DISABLED) { ++ /* ++ * Encryption disabled ++ */ ++ if (index) { ++ /* ++ * If key index was specified then clear the specified key ++ */ ++ index--; ++ A_MEMZERO(ar->arWepKeyList[index].arKey, ++ sizeof(ar->arWepKeyList[index].arKey)); ++ ar->arWepKeyList[index].arKeyLen = 0; ++ } ++ ar->arDot11AuthMode = OPEN_AUTH; ++ ar->arPairwiseCrypto = NONE_CRYPT; ++ ar->arGroupCrypto = NONE_CRYPT; ++ ar->arAuthMode = NONE_AUTH; ++ } else { ++ /* ++ * Enabling WEP encryption ++ */ ++ if (index) { ++ index--; /* keyindex is off base 1 in iwconfig */ ++ } ++ ++ if (erq->flags & IW_ENCODE_OPEN) { ++ auth = OPEN_AUTH; ++ } else if (erq->flags & IW_ENCODE_RESTRICTED) { ++ auth = SHARED_AUTH; ++ } ++ ++ if (erq->length) { ++ if (!IEEE80211_IS_VALID_WEP_CIPHER_LEN(erq->length)) { ++ return -EIO; ++ } ++ ++ A_MEMZERO(ar->arWepKeyList[index].arKey, ++ sizeof(ar->arWepKeyList[index].arKey)); ++ A_MEMCPY(ar->arWepKeyList[index].arKey, keybuf, erq->length); ++ ar->arWepKeyList[index].arKeyLen = erq->length; ++ } else { ++ if (ar->arWepKeyList[index].arKeyLen == 0) { ++ return -EIO; ++ } ++ ar->arDefTxKeyIndex = index; ++ } ++ ++ ar->arPairwiseCrypto = WEP_CRYPT; ++ ar->arGroupCrypto = WEP_CRYPT; ++ ar->arDot11AuthMode = auth; ++ ar->arAuthMode = NONE_AUTH; ++ } ++ ++ /* ++ * profile has changed. Erase ssid to signal change ++ */ ++ A_MEMZERO(ar->arSsid, sizeof(ar->arSsid)); ++ ++ return 0; ++} ++ ++static int ++ar6000_ioctl_giwencode(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *erq, char *key) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)netdev_priv(dev); ++ A_UINT8 keyIndex; ++ struct ar_wep_key *wk; ++ ++ if (ar->arWlanState == WLAN_DISABLED) { ++ return -EIO; ++ } ++ ++ if (ar->arPairwiseCrypto == NONE_CRYPT) { ++ erq->length = 0; ++ erq->flags = IW_ENCODE_DISABLED; ++ } else { ++ /* get the keyIndex */ ++ keyIndex = erq->flags & IW_ENCODE_INDEX; ++ if (0 == keyIndex) { ++ keyIndex = ar->arDefTxKeyIndex; ++ } else if ((keyIndex - 1 < WMI_MIN_KEY_INDEX) || ++ (keyIndex - 1 > WMI_MAX_KEY_INDEX)) ++ { ++ keyIndex = WMI_MIN_KEY_INDEX; ++ } else { ++ keyIndex--; ++ } ++ erq->flags = keyIndex + 1; ++ erq->flags |= IW_ENCODE_ENABLED; ++ wk = &ar->arWepKeyList[keyIndex]; ++ if (erq->length > wk->arKeyLen) { ++ erq->length = wk->arKeyLen; ++ } ++ if (wk->arKeyLen) { ++ A_MEMCPY(key, wk->arKey, erq->length); ++ } ++ if (ar->arDot11AuthMode == OPEN_AUTH) { ++ erq->flags |= IW_ENCODE_OPEN; ++ } else if (ar->arDot11AuthMode == SHARED_AUTH) { ++ erq->flags |= IW_ENCODE_RESTRICTED; ++ } ++ } ++ ++ return 0; ++} ++ ++static int ar6000_ioctl_siwpower(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)netdev_priv(dev); ++ WMI_POWER_MODE power_mode; ++ ++ if (wrqu->power.disabled) ++ power_mode = MAX_PERF_POWER; ++ else ++ power_mode = REC_POWER; ++ ++ if (wmi_powermode_cmd(ar->arWmi, power_mode) < 0) ++ return -EIO; ++ ++ return 0; ++} ++ ++static int ar6000_ioctl_giwpower(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)netdev_priv(dev); ++ ++ return wmi_get_power_mode_cmd(ar->arWmi); ++} ++ ++static int ar6000_ioctl_siwgenie(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *dwrq, ++ char *extra) ++{ ++ /* The target does that for us */ ++ return 0; ++} ++ ++static int ar6000_ioctl_giwgenie(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *dwrq, ++ char *extra) ++{ ++ return 0; ++} ++ ++static int ar6000_ioctl_siwauth(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_param *param, ++ char *extra) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)netdev_priv(dev); ++ int reset = 0; ++ ++ switch (param->flags & IW_AUTH_INDEX) { ++ case IW_AUTH_WPA_VERSION: ++ if (param->value & IW_AUTH_WPA_VERSION_DISABLED) { ++ ar->arAuthMode = NONE_AUTH; ++ } ++ if (param->value & IW_AUTH_WPA_VERSION_WPA) { ++ ar->arAuthMode = WPA_AUTH; ++ } ++ if (param->value & IW_AUTH_WPA_VERSION_WPA2) { ++ ar->arAuthMode = WPA2_AUTH; ++ } ++ ++ reset = 1; ++ break; ++ case IW_AUTH_CIPHER_PAIRWISE: ++ if (param->value & IW_AUTH_CIPHER_NONE) { ++ ar->arPairwiseCrypto = NONE_CRYPT; ++ } ++ if (param->value & IW_AUTH_CIPHER_WEP40) { ++ ar->arPairwiseCrypto = WEP_CRYPT; ++ } ++ if (param->value & IW_AUTH_CIPHER_TKIP) { ++ ar->arPairwiseCrypto = TKIP_CRYPT; ++ } ++ if (param->value & IW_AUTH_CIPHER_CCMP) { ++ ar->arPairwiseCrypto = AES_CRYPT; ++ } ++ ++ reset = 1; ++ break; ++ case IW_AUTH_CIPHER_GROUP: ++ if (param->value & IW_AUTH_CIPHER_NONE) { ++ ar->arGroupCrypto = NONE_CRYPT; ++ } ++ if (param->value & IW_AUTH_CIPHER_WEP40) { ++ ar->arGroupCrypto = WEP_CRYPT; ++ } ++ if (param->value & IW_AUTH_CIPHER_TKIP) { ++ ar->arGroupCrypto = TKIP_CRYPT; ++ } ++ if (param->value & IW_AUTH_CIPHER_CCMP) { ++ ar->arGroupCrypto = AES_CRYPT; ++ } ++ ++ reset = 1; ++ break; ++ case IW_AUTH_KEY_MGMT: ++ if (param->value & IW_AUTH_KEY_MGMT_PSK) { ++ if (ar->arAuthMode == WPA_AUTH) { ++ ar->arAuthMode = WPA_PSK_AUTH; ++ } else if (ar->arAuthMode == WPA2_AUTH) { ++ ar->arAuthMode = WPA2_PSK_AUTH; ++ } ++ ++ reset = 1; ++ } ++ break; ++ ++ case IW_AUTH_TKIP_COUNTERMEASURES: ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ wmi_set_tkip_countermeasures_cmd(ar->arWmi, param->value); ++ break; ++ ++ case IW_AUTH_DROP_UNENCRYPTED: ++ break; ++ ++ case IW_AUTH_80211_AUTH_ALG: ++ if (param->value & IW_AUTH_ALG_OPEN_SYSTEM) { ++ ar->arDot11AuthMode = OPEN_AUTH; ++ } ++ if (param->value & IW_AUTH_ALG_SHARED_KEY) { ++ ar->arDot11AuthMode = SHARED_AUTH; ++ } ++ if (param->value & IW_AUTH_ALG_LEAP) { ++ ar->arDot11AuthMode = LEAP_AUTH; ++ ar->arPairwiseCrypto = WEP_CRYPT; ++ ar->arGroupCrypto = WEP_CRYPT; ++ } ++ ++ reset = 1; ++ break; ++ ++ case IW_AUTH_WPA_ENABLED: ++ reset = 1; ++ break; ++ ++ case IW_AUTH_RX_UNENCRYPTED_EAPOL: ++ break; ++ ++ case IW_AUTH_PRIVACY_INVOKED: ++ break; ++ ++ default: ++ printk("%s(): Unknown flag 0x%x\n", __FUNCTION__, param->flags); ++ return -EOPNOTSUPP; ++ } ++ ++ if (reset) ++ memset(ar->arSsid, 0, sizeof(ar->arSsid)); ++ ++ return 0; ++} ++ ++static int ar6000_ioctl_giwauth(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_param *dwrq, ++ char *extra) ++{ ++ return 0; ++} ++ ++static int ar6000_ioctl_siwencodeext(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, ++ char *extra) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)netdev_priv(dev); ++ struct iw_point *encoding = &wrqu->encoding; ++ struct iw_encode_ext *ext = (struct iw_encode_ext *)extra; ++ int alg = ext->alg, idx; ++ ++ if (ar->arWlanState == WLAN_DISABLED) { ++ return -EIO; ++ } ++ ++ /* Determine and validate the key index */ ++ idx = (encoding->flags & IW_ENCODE_INDEX) - 1; ++ if (idx) { ++ if (idx < 0 || idx > 3) ++ return -EINVAL; ++ } ++ ++ if ((alg == IW_ENCODE_ALG_TKIP) || (alg == IW_ENCODE_ALG_CCMP)) { ++ struct ieee80211req_key ik; ++ KEY_USAGE key_usage; ++ CRYPTO_TYPE key_type = NONE_CRYPT; ++ int status; ++ ++ ar->user_saved_keys.keyOk = FALSE; ++ ++ if (alg == IW_ENCODE_ALG_TKIP) { ++ key_type = TKIP_CRYPT; ++ ik.ik_type = IEEE80211_CIPHER_TKIP; ++ } else { ++ key_type = AES_CRYPT; ++ ik.ik_type = IEEE80211_CIPHER_AES_CCM; ++ } ++ ++ ik.ik_keyix = idx; ++ ik.ik_keylen = ext->key_len; ++ ik.ik_flags = IEEE80211_KEY_RECV; ++ if (ext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY) { ++ ik.ik_flags |= IEEE80211_KEY_XMIT ++ | IEEE80211_KEY_DEFAULT; ++ } ++ ++ if (ext->ext_flags & IW_ENCODE_EXT_RX_SEQ_VALID) { ++ memcpy(&ik.ik_keyrsc, ext->rx_seq, 8); ++ } ++ ++ memcpy(ik.ik_keydata, ext->key, ext->key_len); ++ ++ ar->user_saved_keys.keyType = key_type; ++ if (ext->ext_flags & IW_ENCODE_EXT_GROUP_KEY) { ++ key_usage = GROUP_USAGE; ++ memset(ik.ik_macaddr, 0, ETH_ALEN); ++ memcpy(&ar->user_saved_keys.bcast_ik, &ik, ++ sizeof(struct ieee80211req_key)); ++ } else { ++ key_usage = PAIRWISE_USAGE; ++ memcpy(ik.ik_macaddr, ext->addr.sa_data, ETH_ALEN); ++ memcpy(&ar->user_saved_keys.ucast_ik, &ik, ++ sizeof(struct ieee80211req_key)); ++ } ++ ++ status = wmi_addKey_cmd(ar->arWmi, ik.ik_keyix, key_type, ++ key_usage, ik.ik_keylen, ++ (A_UINT8 *)&ik.ik_keyrsc, ++ ik.ik_keydata, ++ KEY_OP_INIT_VAL, SYNC_BEFORE_WMIFLAG); ++ ++ if (status < 0) ++ return -EIO; ++ ++ ar->user_saved_keys.keyOk = TRUE; ++ ++ return 0; ++ ++ } else { ++ /* WEP falls back to SIWENCODE */ ++ return -EOPNOTSUPP; ++ } ++ ++ return 0; ++} ++ ++ ++static int ar6000_ioctl_giwencodeext(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *dwrq, ++ char *extra) ++{ ++ return 0; ++} ++ ++ ++static int ++ar6000_ioctl_setparam(struct net_device *dev, ++ struct iw_request_info *info, ++ void *erq, char *extra) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ int *i = (int *)extra; ++ int param = i[0]; ++ int value = i[1]; ++ int ret = 0; ++ A_BOOL profChanged = FALSE; ++ ++ if (ar->arWlanState == WLAN_DISABLED) { ++ return -EIO; ++ } ++ ++ switch (param) { ++ case IEEE80211_PARAM_WPA: ++ switch (value) { ++ case WPA_MODE_WPA1: ++ ar->arAuthMode = WPA_AUTH; ++ profChanged = TRUE; ++ break; ++ case WPA_MODE_WPA2: ++ ar->arAuthMode = WPA2_AUTH; ++ profChanged = TRUE; ++ break; ++ case WPA_MODE_NONE: ++ ar->arAuthMode = NONE_AUTH; ++ profChanged = TRUE; ++ break; ++ default: ++ printk("IEEE80211_PARAM_WPA: Unknown value %d\n", value); ++ } ++ break; ++ case IEEE80211_PARAM_AUTHMODE: ++ switch(value) { ++ case IEEE80211_AUTH_WPA_PSK: ++ if (WPA_AUTH == ar->arAuthMode) { ++ ar->arAuthMode = WPA_PSK_AUTH; ++ profChanged = TRUE; ++ } else if (WPA2_AUTH == ar->arAuthMode) { ++ ar->arAuthMode = WPA2_PSK_AUTH; ++ profChanged = TRUE; ++ } else { ++ AR_DEBUG_PRINTF("Error - Setting PSK mode when WPA "\ ++ "param was set to %d\n", ++ ar->arAuthMode); ++ ret = -1; ++ } ++ break; ++ case IEEE80211_AUTH_WPA_CCKM: ++ if (WPA2_AUTH == ar->arAuthMode) { ++ ar->arAuthMode = WPA2_AUTH_CCKM; ++ } else { ++ ar->arAuthMode = WPA_AUTH_CCKM; ++ } ++ break; ++ default: ++ break; ++ } ++ break; ++ case IEEE80211_PARAM_UCASTCIPHER: ++ switch (value) { ++ case IEEE80211_CIPHER_AES_CCM: ++ ar->arPairwiseCrypto = AES_CRYPT; ++ profChanged = TRUE; ++ break; ++ case IEEE80211_CIPHER_TKIP: ++ ar->arPairwiseCrypto = TKIP_CRYPT; ++ profChanged = TRUE; ++ break; ++ case IEEE80211_CIPHER_WEP: ++ ar->arPairwiseCrypto = WEP_CRYPT; ++ profChanged = TRUE; ++ break; ++ case IEEE80211_CIPHER_NONE: ++ ar->arPairwiseCrypto = NONE_CRYPT; ++ profChanged = TRUE; ++ break; ++ } ++ break; ++ case IEEE80211_PARAM_UCASTKEYLEN: ++ if (!IEEE80211_IS_VALID_WEP_CIPHER_LEN(value)) { ++ ret = -EIO; ++ } else { ++ ar->arPairwiseCryptoLen = value; ++ } ++ break; ++ case IEEE80211_PARAM_MCASTCIPHER: ++ switch (value) { ++ case IEEE80211_CIPHER_AES_CCM: ++ ar->arGroupCrypto = AES_CRYPT; ++ profChanged = TRUE; ++ break; ++ case IEEE80211_CIPHER_TKIP: ++ ar->arGroupCrypto = TKIP_CRYPT; ++ profChanged = TRUE; ++ break; ++ case IEEE80211_CIPHER_WEP: ++ ar->arGroupCrypto = WEP_CRYPT; ++ profChanged = TRUE; ++ break; ++ case IEEE80211_CIPHER_NONE: ++ ar->arGroupCrypto = NONE_CRYPT; ++ profChanged = TRUE; ++ break; ++ } ++ break; ++ case IEEE80211_PARAM_MCASTKEYLEN: ++ if (!IEEE80211_IS_VALID_WEP_CIPHER_LEN(value)) { ++ ret = -EIO; ++ } else { ++ ar->arGroupCryptoLen = value; ++ } ++ break; ++ case IEEE80211_PARAM_COUNTERMEASURES: ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ wmi_set_tkip_countermeasures_cmd(ar->arWmi, value); ++ break; ++ default: ++ break; ++ } ++ ++ if (profChanged == TRUE) { ++ /* ++ * profile has changed. Erase ssid to signal change ++ */ ++ A_MEMZERO(ar->arSsid, sizeof(ar->arSsid)); ++ } ++ ++ return ret; ++} ++ ++int ++ar6000_ioctl_getparam(struct net_device *dev, struct iw_request_info *info, ++ void *w, char *extra) ++{ ++ return -EIO; /* for now */ ++} ++ ++int ++ar6000_ioctl_setkey(struct net_device *dev, struct iw_request_info *info, ++ void *w, char *extra) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ struct ieee80211req_key *ik = (struct ieee80211req_key *)extra; ++ KEY_USAGE keyUsage; ++ A_STATUS status; ++ CRYPTO_TYPE keyType = NONE_CRYPT; ++ ++ if (ar->arWlanState == WLAN_DISABLED) { ++ return -EIO; ++ } ++ ++ ar->user_saved_keys.keyOk = FALSE; ++ ++ if ( 0 == memcmp(ik->ik_macaddr, "\x00\x00\x00\x00\x00\x00", ++ IEEE80211_ADDR_LEN)) { ++ keyUsage = GROUP_USAGE; ++ A_MEMCPY(&ar->user_saved_keys.bcast_ik, ik, ++ sizeof(struct ieee80211req_key)); ++ } else { ++ keyUsage = PAIRWISE_USAGE; ++ A_MEMCPY(&ar->user_saved_keys.ucast_ik, ik, ++ sizeof(struct ieee80211req_key)); ++ } ++ ++ switch (ik->ik_type) { ++ case IEEE80211_CIPHER_WEP: ++ keyType = WEP_CRYPT; ++ break; ++ case IEEE80211_CIPHER_TKIP: ++ keyType = TKIP_CRYPT; ++ break; ++ case IEEE80211_CIPHER_AES_CCM: ++ keyType = AES_CRYPT; ++ break; ++ default: ++ break; ++ } ++ ar->user_saved_keys.keyType = keyType; ++ ++ if (IEEE80211_CIPHER_CCKM_KRK != ik->ik_type) { ++ if (NONE_CRYPT == keyType) { ++ return -EIO; ++ } ++ ++ status = wmi_addKey_cmd(ar->arWmi, ik->ik_keyix, keyType, keyUsage, ++ ik->ik_keylen, (A_UINT8 *)&ik->ik_keyrsc, ++ ik->ik_keydata, KEY_OP_INIT_VAL, ++ SYNC_BEFORE_WMIFLAG); ++ ++ if (status != A_OK) { ++ return -EIO; ++ } ++ } else { ++ status = wmi_add_krk_cmd(ar->arWmi, ik->ik_keydata); ++ } ++ ++ ar->user_saved_keys.keyOk = TRUE; ++ ++ return 0; ++} ++ ++ ++/* ++ * SIOCGIWNAME ++ */ ++int ++ar6000_ioctl_giwname(struct net_device *dev, ++ struct iw_request_info *info, ++ char *name, char *extra) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ ++ if (ar->arWlanState == WLAN_DISABLED) { ++ return -EIO; ++ } ++ ++ switch (ar->arPhyCapability) { ++ case (WMI_11A_CAPABILITY): ++ strncpy(name, "AR6000 802.11a", IFNAMSIZ); ++ break; ++ case (WMI_11G_CAPABILITY): ++ strncpy(name, "AR6000 802.11g", IFNAMSIZ); ++ break; ++ case (WMI_11AG_CAPABILITY): ++ strncpy(name, "AR6000 802.11ag", IFNAMSIZ); ++ break; ++ default: ++ strncpy(name, "AR6000 802.11", IFNAMSIZ); ++ break; ++ } ++ ++ return 0; ++} ++ ++/* ++ * SIOCSIWFREQ ++ */ ++int ++ar6000_ioctl_siwfreq(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_freq *freq, char *extra) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ ++ if (ar->arWlanState == WLAN_DISABLED) { ++ return -EIO; ++ } ++ ++ /* ++ * We support limiting the channels via wmiconfig. ++ * ++ * We use this command to configure the channel hint for the connect cmd ++ * so it is possible the target will end up connecting to a different ++ * channel. ++ */ ++ if (freq->e > 1) { ++ return -EINVAL; ++ } else if (freq->e == 1) { ++ ar->arChannelHint = freq->m / 100000; ++ } else { ++ ar->arChannelHint = wlan_ieee2freq(freq->m); ++ } ++ ++ A_PRINTF("channel hint set to %d\n", ar->arChannelHint); ++ return 0; ++} ++ ++/* ++ * SIOCGIWFREQ ++ */ ++int ++ar6000_ioctl_giwfreq(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_freq *freq, char *extra) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ ++ if (ar->arWlanState == WLAN_DISABLED) { ++ return -EIO; ++ } ++ ++ if (ar->arConnected != TRUE) { ++ return -EINVAL; ++ } ++ ++ freq->m = ar->arBssChannel * 100000; ++ freq->e = 1; ++ ++ return 0; ++} ++ ++/* ++ * SIOCSIWMODE ++ */ ++int ++ar6000_ioctl_siwmode(struct net_device *dev, ++ struct iw_request_info *info, ++ __u32 *mode, char *extra) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ ++ if (ar->arWlanState == WLAN_DISABLED) { ++ return -EIO; ++ } ++ ++ switch (*mode) { ++ case IW_MODE_INFRA: ++ ar->arNetworkType = INFRA_NETWORK; ++ break; ++ case IW_MODE_ADHOC: ++ ar->arNetworkType = ADHOC_NETWORK; ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++/* ++ * SIOCGIWMODE ++ */ ++int ++ar6000_ioctl_giwmode(struct net_device *dev, ++ struct iw_request_info *info, ++ __u32 *mode, char *extra) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ ++ if (ar->arWlanState == WLAN_DISABLED) { ++ return -EIO; ++ } ++ ++ switch (ar->arNetworkType) { ++ case INFRA_NETWORK: ++ *mode = IW_MODE_INFRA; ++ break; ++ case ADHOC_NETWORK: ++ *mode = IW_MODE_ADHOC; ++ break; ++ default: ++ return -EIO; ++ } ++ return 0; ++} ++ ++/* ++ * SIOCSIWSENS ++ */ ++int ++ar6000_ioctl_siwsens(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_param *sens, char *extra) ++{ ++ return 0; ++} ++ ++/* ++ * SIOCGIWSENS ++ */ ++int ++ar6000_ioctl_giwsens(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_param *sens, char *extra) ++{ ++ sens->value = 0; ++ sens->fixed = 1; ++ ++ return 0; ++} ++ ++/* ++ * SIOCGIWRANGE ++ */ ++int ++ar6000_ioctl_giwrange(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *data, char *extra) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ struct iw_range *range = (struct iw_range *) extra; ++ int i, ret = 0; ++ ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ ++ if (ar->arWlanState == WLAN_DISABLED) { ++ return -EIO; ++ } ++ ++ if (down_interruptible(&ar->arSem)) { ++ return -ERESTARTSYS; ++ } ++ ar->arNumChannels = -1; ++ A_MEMZERO(ar->arChannelList, sizeof (ar->arChannelList)); ++ ++ if (wmi_get_channelList_cmd(ar->arWmi) != A_OK) { ++ up(&ar->arSem); ++ return -EIO; ++ } ++ ++ wait_event_interruptible_timeout(arEvent, ar->arNumChannels != -1, wmitimeout * HZ); ++ ++ if (signal_pending(current)) { ++ up(&ar->arSem); ++ return -EINTR; ++ } ++ ++ data->length = sizeof(struct iw_range); ++ A_MEMZERO(range, sizeof(struct iw_range)); ++ ++ range->txpower_capa = 0; ++ ++ range->min_pmp = 1 * 1024; ++ range->max_pmp = 65535 * 1024; ++ range->min_pmt = 1 * 1024; ++ range->max_pmt = 1000 * 1024; ++ range->pmp_flags = IW_POWER_PERIOD; ++ range->pmt_flags = IW_POWER_TIMEOUT; ++ range->pm_capa = 0; ++ ++ range->we_version_compiled = WIRELESS_EXT; ++ range->we_version_source = 13; ++ ++ range->retry_capa = IW_RETRY_LIMIT; ++ range->retry_flags = IW_RETRY_LIMIT; ++ range->min_retry = 0; ++ range->max_retry = 255; ++ ++ range->num_frequency = range->num_channels = ar->arNumChannels; ++ for (i = 0; i < ar->arNumChannels; i++) { ++ range->freq[i].i = wlan_freq2ieee(ar->arChannelList[i]); ++ range->freq[i].m = ar->arChannelList[i] * 100000; ++ range->freq[i].e = 1; ++ /* ++ * Linux supports max of 32 channels, bail out once you ++ * reach the max. ++ */ ++ if (i == IW_MAX_FREQUENCIES) { ++ break; ++ } ++ } ++ ++ /* Max quality is max field value minus noise floor */ ++ range->max_qual.qual = 0xff - 161; ++ ++ /* ++ * In order to use dBm measurements, 'level' must be lower ++ * than any possible measurement (see iw_print_stats() in ++ * wireless tools). It's unclear how this is meant to be ++ * done, but setting zero in these values forces dBm and ++ * the actual numbers are not used. ++ */ ++ range->max_qual.level = 0; ++ range->max_qual.noise = 0; ++ ++ range->sensitivity = 3; ++ ++ range->max_encoding_tokens = 4; ++ /* XXX query driver to find out supported key sizes */ ++ range->num_encoding_sizes = 3; ++ range->encoding_size[0] = 5; /* 40-bit */ ++ range->encoding_size[1] = 13; /* 104-bit */ ++ range->encoding_size[2] = 16; /* 128-bit */ ++ ++ range->num_bitrates = 0; ++ ++ /* estimated maximum TCP throughput values (bps) */ ++ range->throughput = 22000000; ++ ++ range->min_rts = 0; ++ range->max_rts = 2347; ++ range->min_frag = 256; ++ range->max_frag = 2346; ++ ++ up(&ar->arSem); ++ ++ return ret; ++} ++ ++ ++/* ++ * SIOCSIWAP ++ * This ioctl is used to set the desired bssid for the connect command. ++ */ ++int ++ar6000_ioctl_siwap(struct net_device *dev, ++ struct iw_request_info *info, ++ struct sockaddr *ap_addr, char *extra) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ ++ if (ar->arWlanState == WLAN_DISABLED) { ++ return -EIO; ++ } ++ ++ if (ap_addr->sa_family != ARPHRD_ETHER) { ++ return -EIO; ++ } ++ ++ if (A_MEMCMP(&ap_addr->sa_data, bcast_mac, AR6000_ETH_ADDR_LEN) == 0) { ++ A_MEMZERO(ar->arReqBssid, sizeof(ar->arReqBssid)); ++ } else { ++ A_MEMCPY(ar->arReqBssid, &ap_addr->sa_data, sizeof(ar->arReqBssid)); ++ } ++ ++ return 0; ++} ++ ++/* ++ * SIOCGIWAP ++ */ ++int ++ar6000_ioctl_giwap(struct net_device *dev, ++ struct iw_request_info *info, ++ struct sockaddr *ap_addr, char *extra) ++{ ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ ++ if (ar->arWlanState == WLAN_DISABLED) { ++ return -EIO; ++ } ++ ++ if (ar->arConnected != TRUE) { ++ return -EINVAL; ++ } ++ ++ A_MEMCPY(&ap_addr->sa_data, ar->arBssid, sizeof(ar->arBssid)); ++ ap_addr->sa_family = ARPHRD_ETHER; ++ ++ return 0; ++} ++ ++/* ++ * SIOCGIWAPLIST ++ */ ++int ++ar6000_ioctl_iwaplist(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *data, char *extra) ++{ ++ return -EIO; /* for now */ ++} ++ ++/* ++ * SIOCSIWSCAN ++ */ ++int ++ar6000_ioctl_siwscan(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *data, char *extra) ++{ ++#define ACT_DWELLTIME_DEFAULT 105 ++#define HOME_TXDRAIN_TIME 100 ++#define SCAN_INT HOME_TXDRAIN_TIME + ACT_DWELLTIME_DEFAULT ++ AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv; ++ int ret = 0; ++ ++ if (ar->arWmiReady == FALSE) { ++ return -EIO; ++ } ++ ++ if (ar->arWlanState == WLAN_DISABLED) { ++ return -EIO; ++ } ++ ++ /* We ask for everything from the target */ ++ if (wmi_bssfilter_cmd(ar->arWmi, ALL_BSS_FILTER, 0) != A_OK) { ++ printk("Couldn't set filtering\n"); ++ ret = -EIO; ++ } ++ ++ if (wmi_startscan_cmd(ar->arWmi, WMI_LONG_SCAN, FALSE, FALSE, \ ++ HOME_TXDRAIN_TIME, SCAN_INT) != A_OK) { ++ ret = -EIO; ++ } ++ ++ ar->scan_complete = 0; ++ wait_event_interruptible_timeout(ar6000_scan_queue, ar->scan_complete, ++ 5 * HZ); ++ ++ if (wmi_bssfilter_cmd(ar->arWmi, NONE_BSS_FILTER, 0) != A_OK) { ++ printk("Couldn't set filtering\n"); ++ ret = -EIO; ++ } ++ ++ return ret; ++#undef ACT_DWELLTIME_DEFAULT ++#undef HOME_TXDRAIN_TIME ++#undef SCAN_INT ++} ++ ++ ++/* ++ * Units are in db above the noise floor. That means the ++ * rssi values reported in the tx/rx descriptors in the ++ * driver are the SNR expressed in db. ++ * ++ * If you assume that the noise floor is -95, which is an ++ * excellent assumption 99.5 % of the time, then you can ++ * derive the absolute signal level (i.e. -95 + rssi). ++ * There are some other slight factors to take into account ++ * depending on whether the rssi measurement is from 11b, ++ * 11g, or 11a. These differences are at most 2db and ++ * can be documented. ++ * ++ * NB: various calculations are based on the orinoco/wavelan ++ * drivers for compatibility ++ */ ++static void ++ar6000_set_quality(struct iw_quality *iq, A_INT8 rssi) ++{ ++ if (rssi < 0) { ++ iq->qual = 0; ++ } else { ++ iq->qual = rssi; ++ } ++ ++ /* NB: max is 94 because noise is hardcoded to 161 */ ++ if (iq->qual > 94) ++ iq->qual = 94; ++ ++ iq->noise = 161; /* -95dBm */ ++ iq->level = iq->noise + iq->qual; ++ iq->updated = 7; ++} ++ ++ ++/* Structures to export the Wireless Handlers */ ++static const iw_handler ath_handlers[] = { ++ (iw_handler) NULL, /* SIOCSIWCOMMIT */ ++ (iw_handler) ar6000_ioctl_giwname, /* SIOCGIWNAME */ ++ (iw_handler) NULL, /* SIOCSIWNWID */ ++ (iw_handler) NULL, /* SIOCGIWNWID */ ++ (iw_handler) ar6000_ioctl_siwfreq, /* SIOCSIWFREQ */ ++ (iw_handler) ar6000_ioctl_giwfreq, /* SIOCGIWFREQ */ ++ (iw_handler) ar6000_ioctl_siwmode, /* SIOCSIWMODE */ ++ (iw_handler) ar6000_ioctl_giwmode, /* SIOCGIWMODE */ ++ (iw_handler) ar6000_ioctl_siwsens, /* SIOCSIWSENS */ ++ (iw_handler) ar6000_ioctl_giwsens, /* SIOCGIWSENS */ ++ (iw_handler) NULL /* not _used */, /* SIOCSIWRANGE */ ++ (iw_handler) ar6000_ioctl_giwrange, /* SIOCGIWRANGE */ ++ (iw_handler) NULL /* not used */, /* SIOCSIWPRIV */ ++ (iw_handler) NULL /* kernel code */, /* SIOCGIWPRIV */ ++ (iw_handler) NULL /* not used */, /* SIOCSIWSTATS */ ++ (iw_handler) NULL /* kernel code */, /* SIOCGIWSTATS */ ++ (iw_handler) NULL, /* SIOCSIWSPY */ ++ (iw_handler) NULL, /* SIOCGIWSPY */ ++ (iw_handler) NULL, /* SIOCSIWTHRSPY */ ++ (iw_handler) NULL, /* SIOCGIWTHRSPY */ ++ (iw_handler) ar6000_ioctl_siwap, /* SIOCSIWAP */ ++ (iw_handler) ar6000_ioctl_giwap, /* SIOCGIWAP */ ++ (iw_handler) NULL, /* -- hole -- */ ++ (iw_handler) ar6000_ioctl_iwaplist, /* SIOCGIWAPLIST */ ++ (iw_handler) ar6000_ioctl_siwscan, /* SIOCSIWSCAN */ ++ (iw_handler) ar6000_ioctl_giwscan, /* SIOCGIWSCAN */ ++ (iw_handler) ar6000_ioctl_siwessid, /* SIOCSIWESSID */ ++ (iw_handler) ar6000_ioctl_giwessid, /* SIOCGIWESSID */ ++ (iw_handler) NULL, /* SIOCSIWNICKN */ ++ (iw_handler) NULL, /* SIOCGIWNICKN */ ++ (iw_handler) NULL, /* -- hole -- */ ++ (iw_handler) NULL, /* -- hole -- */ ++ (iw_handler) ar6000_ioctl_siwrate, /* SIOCSIWRATE */ ++ (iw_handler) ar6000_ioctl_giwrate, /* SIOCGIWRATE */ ++ (iw_handler) NULL, /* SIOCSIWRTS */ ++ (iw_handler) NULL, /* SIOCGIWRTS */ ++ (iw_handler) NULL, /* SIOCSIWFRAG */ ++ (iw_handler) NULL, /* SIOCGIWFRAG */ ++ (iw_handler) ar6000_ioctl_siwtxpow, /* SIOCSIWTXPOW */ ++ (iw_handler) ar6000_ioctl_giwtxpow, /* SIOCGIWTXPOW */ ++ (iw_handler) ar6000_ioctl_siwretry, /* SIOCSIWRETRY */ ++ (iw_handler) ar6000_ioctl_giwretry, /* SIOCGIWRETRY */ ++ (iw_handler) ar6000_ioctl_siwencode, /* SIOCSIWENCODE */ ++ (iw_handler) ar6000_ioctl_giwencode, /* SIOCGIWENCODE */ ++ (iw_handler) ar6000_ioctl_siwpower, /* SIOCSIWPOWER */ ++ (iw_handler) ar6000_ioctl_giwpower, /* SIOCGIWPOWER */ ++ (iw_handler) NULL, /* -- hole -- */ ++ (iw_handler) NULL, /* -- hole -- */ ++ (iw_handler) ar6000_ioctl_siwgenie, /* SIOCSIWGENIE */ ++ (iw_handler) ar6000_ioctl_giwgenie, /* SIOCGIWGENIE */ ++ (iw_handler) ar6000_ioctl_siwauth, /* SIOCSIWAUTH */ ++ (iw_handler) ar6000_ioctl_giwauth, /* SIOCGIWAUTH */ ++ (iw_handler) ar6000_ioctl_siwencodeext,/* SIOCSIWENCODEEXT */ ++ (iw_handler) ar6000_ioctl_giwencodeext,/* SIOCGIWENCODEEXT */ ++ (iw_handler) NULL, /* SIOCSIWPMKSA */ ++}; ++ ++static const iw_handler ath_priv_handlers[] = { ++ (iw_handler) ar6000_ioctl_setparam, /* SIOCWFIRSTPRIV+0 */ ++ (iw_handler) ar6000_ioctl_getparam, /* SIOCWFIRSTPRIV+1 */ ++ (iw_handler) ar6000_ioctl_setkey, /* SIOCWFIRSTPRIV+2 */ ++ (iw_handler) ar6000_ioctl_setwmmparams, /* SIOCWFIRSTPRIV+3 */ ++ (iw_handler) ar6000_ioctl_delkey, /* SIOCWFIRSTPRIV+4 */ ++ (iw_handler) ar6000_ioctl_getwmmparams, /* SIOCWFIRSTPRIV+5 */ ++ (iw_handler) ar6000_ioctl_setoptie, /* SIOCWFIRSTPRIV+6 */ ++ (iw_handler) ar6000_ioctl_setmlme, /* SIOCWFIRSTPRIV+7 */ ++ (iw_handler) ar6000_ioctl_addpmkid, /* SIOCWFIRSTPRIV+8 */ ++}; ++ ++#define IW_PRIV_TYPE_KEY \ ++ (IW_PRIV_TYPE_BYTE | sizeof(struct ieee80211req_key)) ++#define IW_PRIV_TYPE_DELKEY \ ++ (IW_PRIV_TYPE_BYTE | sizeof(struct ieee80211req_del_key)) ++#define IW_PRIV_TYPE_MLME \ ++ (IW_PRIV_TYPE_BYTE | sizeof(struct ieee80211req_mlme)) ++#define IW_PRIV_TYPE_ADDPMKID \ ++ (IW_PRIV_TYPE_BYTE | sizeof(struct ieee80211req_addpmkid)) ++ ++static const struct iw_priv_args ar6000_priv_args[] = { ++ { IEEE80211_IOCTL_SETKEY, ++ IW_PRIV_TYPE_KEY | IW_PRIV_SIZE_FIXED, 0, "setkey"}, ++ { IEEE80211_IOCTL_DELKEY, ++ IW_PRIV_TYPE_DELKEY | IW_PRIV_SIZE_FIXED, 0, "delkey"}, ++ { IEEE80211_IOCTL_SETPARAM, ++ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 2, 0, "setparam"}, ++ { IEEE80211_IOCTL_GETPARAM, ++ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, ++ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getparam"}, ++ { IEEE80211_IOCTL_SETWMMPARAMS, ++ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 4, 0, "setwmmparams"}, ++ { IEEE80211_IOCTL_GETWMMPARAMS, ++ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 3, ++ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getwmmparams"}, ++ { IEEE80211_IOCTL_SETOPTIE, ++ IW_PRIV_TYPE_BYTE, 0, "setie"}, ++ { IEEE80211_IOCTL_SETMLME, ++ IW_PRIV_TYPE_MLME, 0, "setmlme"}, ++ { IEEE80211_IOCTL_ADDPMKID, ++ IW_PRIV_TYPE_ADDPMKID | IW_PRIV_SIZE_FIXED, 0, "addpmkid"}, ++}; ++ ++void ar6000_ioctl_iwsetup(struct iw_handler_def *def) ++{ ++ def->private_args = (struct iw_priv_args *)ar6000_priv_args; ++ def->num_private_args = ARRAY_SIZE(ar6000_priv_args); ++} ++ ++struct iw_handler_def ath_iw_handler_def = { ++ .standard = (iw_handler *)ath_handlers, ++ .num_standard = ARRAY_SIZE(ath_handlers), ++ .private = (iw_handler *)ath_priv_handlers, ++ .num_private = ARRAY_SIZE(ath_priv_handlers), ++}; ++ ++ +diff --git a/drivers/sdio/function/wlan/ar6000/bmi/bmi.c b/drivers/sdio/function/wlan/ar6000/bmi/bmi.c +new file mode 100644 +index 0000000..d7b610c +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/bmi/bmi.c +@@ -0,0 +1,657 @@ ++/* ++ * Copyright (c) 2004-2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++#include "hif.h" ++#include "bmi.h" ++#include "htc_api.h" ++#include "bmi_internal.h" ++ ++/* ++Although we had envisioned BMI to run on top of HTC, this is not what the ++final implementation boiled down to on dragon. Its a part of BSP and does ++not use the HTC protocol either. On the host side, however, we were still ++living with the original idea. I think the time has come to accept the truth ++and separate it from HTC which has been carrying BMI's burden all this while. ++It shall make HTC state machine relatively simpler ++*/ ++ ++/* APIs visible to the driver */ ++void ++BMIInit(void) ++{ ++ bmiDone = FALSE; ++} ++ ++A_STATUS ++BMIDone(HIF_DEVICE *device) ++{ ++ A_STATUS status; ++ A_UINT32 cid; ++ ++ if (bmiDone) { ++ AR_DEBUG_PRINTF (ATH_DEBUG_BMI, ("BMIDone skipped\n")); ++ return A_OK; ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Done: Enter (device: 0x%p)\n", device)); ++ bmiDone = TRUE; ++ cid = BMI_DONE; ++ ++ status = bmiBufferSend(device, (A_UCHAR *)&cid, sizeof(cid)); ++ if (status != A_OK) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n")); ++ return A_ERROR; ++ } ++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Done: Exit\n")); ++ ++ return A_OK; ++} ++ ++A_STATUS ++BMIGetTargetInfo(HIF_DEVICE *device, struct bmi_target_info *targ_info) ++{ ++ A_STATUS status; ++ A_UINT32 cid; ++ ++ if (bmiDone) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n")); ++ return A_ERROR; ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Get Target Info: Enter (device: 0x%p)\n", device)); ++ cid = BMI_GET_TARGET_INFO; ++ ++ status = bmiBufferSend(device, (A_UCHAR *)&cid, sizeof(cid)); ++ if (status != A_OK) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n")); ++ return A_ERROR; ++ } ++ ++ status = bmiBufferReceive(device, (A_UCHAR *)&targ_info->target_ver, ++ sizeof(targ_info->target_ver)); ++ if (status != A_OK) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read Target Version from the device\n")); ++ return A_ERROR; ++ } ++ ++ if (targ_info->target_ver == TARGET_VERSION_SENTINAL) { ++ /* Determine how many bytes are in the Target's targ_info */ ++ status = bmiBufferReceive(device, (A_UCHAR *)&targ_info->target_info_byte_count, ++ sizeof(targ_info->target_info_byte_count)); ++ if (status != A_OK) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read Target Info Byte Count from the device\n")); ++ return A_ERROR; ++ } ++ ++ /* ++ * The Target's targ_info doesn't match the Host's targ_info. ++ * We need to do some backwards compatibility work to make this OK. ++ */ ++ A_ASSERT(targ_info->target_info_byte_count == sizeof(*targ_info)); ++ ++ /* Read the remainder of the targ_info */ ++ status = bmiBufferReceive(device, ++ ((A_UCHAR *)targ_info)+sizeof(targ_info->target_info_byte_count), ++ sizeof(*targ_info)-sizeof(targ_info->target_info_byte_count)); ++ if (status != A_OK) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read Target Info (%d bytes) from the device\n", ++ targ_info->target_info_byte_count)); ++ return A_ERROR; ++ } ++ } else { ++ /* ++ * Target must be an AR6001 whose firmware does not ++ * support BMI_GET_TARGET_INFO. Construct the data ++ * that it would have sent. ++ */ ++ targ_info->target_info_byte_count = sizeof(targ_info); ++ targ_info->target_type = TARGET_TYPE_AR6001; ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Get Target Info: Exit (ver: 0x%x type: 0x%x)\n", ++ targ_info->target_ver, targ_info->target_type)); ++ printk("BMI Get Target Info: Exit (ver: 0x%x type: 0x%x)\n", ++ targ_info->target_ver, targ_info->target_type); ++ ++ return A_OK; ++} ++ ++A_STATUS ++BMIReadMemory(HIF_DEVICE *device, ++ A_UINT32 address, ++ A_UCHAR *buffer, ++ A_UINT32 length) ++{ ++ A_UINT32 cid; ++ A_STATUS status; ++ A_UINT32 offset; ++ A_UINT32 remaining, rxlen; ++ static A_UCHAR data[BMI_DATASZ_MAX + sizeof(cid) + sizeof(address) + sizeof(length)]; ++ memset (&data, 0, BMI_DATASZ_MAX + sizeof(cid) + sizeof(address) + sizeof(length)); ++ ++ if (bmiDone) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n")); ++ return A_ERROR; ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ++ ("BMI Read Memory: Enter (device: 0x%p, address: 0x%x, length: %d)\n", ++ device, address, length)); ++ ++ cid = BMI_READ_MEMORY; ++ ++ remaining = length; ++ ++ while (remaining) ++ { ++ rxlen = (remaining < BMI_DATASZ_MAX) ? remaining : BMI_DATASZ_MAX; ++ offset = 0; ++ A_MEMCPY(&data[offset], &cid, sizeof(cid)); ++ offset += sizeof(cid); ++ A_MEMCPY(&data[offset], &address, sizeof(address)); ++ offset += sizeof(address); ++ A_MEMCPY(&data[offset], &rxlen, sizeof(rxlen)); ++ offset += sizeof(length); ++ ++ status = bmiBufferSend(device, data, offset); ++ if (status != A_OK) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n")); ++ return A_ERROR; ++ } ++ status = bmiBufferReceive(device, data, rxlen); ++ if (status != A_OK) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read from the device\n")); ++ return A_ERROR; ++ } ++ A_MEMCPY(&buffer[length - remaining], data, rxlen); ++ remaining -= rxlen; address += rxlen; ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Read Memory: Exit\n")); ++ return A_OK; ++} ++ ++A_STATUS ++BMIWriteMemory(HIF_DEVICE *device, ++ A_UINT32 address, ++ A_UCHAR *buffer, ++ A_UINT32 length) ++{ ++ A_UINT32 cid; ++ A_STATUS status; ++ A_UINT32 offset; ++ A_UINT32 remaining, txlen; ++ const A_UINT32 header = sizeof(cid) + sizeof(address) + sizeof(length); ++ static A_UCHAR data[BMI_DATASZ_MAX + sizeof(cid) + sizeof(address) + sizeof(length)]; ++ memset (&data, 0, header); ++ ++ if (bmiDone) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n")); ++ return A_ERROR; ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ++ ("BMI Write Memory: Enter (device: 0x%p, address: 0x%x, length: %d)\n", ++ device, address, length)); ++ ++ cid = BMI_WRITE_MEMORY; ++ ++ remaining = length; ++ while (remaining) ++ { ++ txlen = (remaining < (BMI_DATASZ_MAX - header)) ? ++ remaining : (BMI_DATASZ_MAX - header); ++ offset = 0; ++ A_MEMCPY(&data[offset], &cid, sizeof(cid)); ++ offset += sizeof(cid); ++ A_MEMCPY(&data[offset], &address, sizeof(address)); ++ offset += sizeof(address); ++ A_MEMCPY(&data[offset], &txlen, sizeof(txlen)); ++ offset += sizeof(txlen); ++ A_MEMCPY(&data[offset], &buffer[length - remaining], txlen); ++ offset += txlen; ++ status = bmiBufferSend(device, data, offset); ++ if (status != A_OK) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n")); ++ return A_ERROR; ++ } ++ remaining -= txlen; address += txlen; ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Write Memory: Exit\n")); ++ ++ return A_OK; ++} ++ ++A_STATUS ++BMIExecute(HIF_DEVICE *device, ++ A_UINT32 address, ++ A_UINT32 *param) ++{ ++ A_UINT32 cid; ++ A_STATUS status; ++ A_UINT32 offset; ++ static A_UCHAR data[sizeof(cid) + sizeof(address) + sizeof(*param)]; ++ memset (&data, 0, sizeof(cid) + sizeof(address) + sizeof(*param)); ++ ++ if (bmiDone) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n")); ++ return A_ERROR; ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ++ ("BMI Execute: Enter (device: 0x%p, address: 0x%x, param: %d)\n", ++ device, address, *param)); ++ ++ cid = BMI_EXECUTE; ++ ++ offset = 0; ++ A_MEMCPY(&data[offset], &cid, sizeof(cid)); ++ offset += sizeof(cid); ++ A_MEMCPY(&data[offset], &address, sizeof(address)); ++ offset += sizeof(address); ++ A_MEMCPY(&data[offset], param, sizeof(*param)); ++ offset += sizeof(*param); ++ status = bmiBufferSend(device, data, offset); ++ if (status != A_OK) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n")); ++ return A_ERROR; ++ } ++ ++ status = bmiBufferReceive(device, data, sizeof(*param)); ++ if (status != A_OK) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read from the device\n")); ++ return A_ERROR; ++ } ++ ++ A_MEMCPY(param, data, sizeof(*param)); ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Execute: Exit (param: %d)\n", *param)); ++ return A_OK; ++} ++ ++A_STATUS ++BMISetAppStart(HIF_DEVICE *device, ++ A_UINT32 address) ++{ ++ A_UINT32 cid; ++ A_STATUS status; ++ A_UINT32 offset; ++ static A_UCHAR data[sizeof(cid) + sizeof(address)]; ++ memset (&data, 0, sizeof(cid) + sizeof(address)); ++ ++ if (bmiDone) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n")); ++ return A_ERROR; ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ++ ("BMI Set App Start: Enter (device: 0x%p, address: 0x%x)\n", ++ device, address)); ++ ++ cid = BMI_SET_APP_START; ++ ++ offset = 0; ++ A_MEMCPY(&data[offset], &cid, sizeof(cid)); ++ offset += sizeof(cid); ++ A_MEMCPY(&data[offset], &address, sizeof(address)); ++ offset += sizeof(address); ++ status = bmiBufferSend(device, data, offset); ++ if (status != A_OK) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n")); ++ return A_ERROR; ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Set App Start: Exit\n")); ++ return A_OK; ++} ++ ++A_STATUS ++BMIReadSOCRegister(HIF_DEVICE *device, ++ A_UINT32 address, ++ A_UINT32 *param) ++{ ++ A_UINT32 cid; ++ A_STATUS status; ++ A_UINT32 offset; ++ static A_UCHAR data[sizeof(cid) + sizeof(address)]; ++ memset (&data, 0, sizeof(cid) + sizeof(address)); ++ ++ if (bmiDone) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n")); ++ return A_ERROR; ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ++ ("BMI Read SOC Register: Enter (device: 0x%p, address: 0x%x)\n", ++ device, address)); ++ ++ cid = BMI_READ_SOC_REGISTER; ++ ++ offset = 0; ++ A_MEMCPY(&data[offset], &cid, sizeof(cid)); ++ offset += sizeof(cid); ++ A_MEMCPY(&data[offset], &address, sizeof(address)); ++ offset += sizeof(address); ++ ++ status = bmiBufferSend(device, data, offset); ++ if (status != A_OK) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n")); ++ return A_ERROR; ++ } ++ ++ status = bmiBufferReceive(device, data, sizeof(*param)); ++ if (status != A_OK) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read from the device\n")); ++ return A_ERROR; ++ } ++ A_MEMCPY(param, data, sizeof(*param)); ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Read SOC Register: Exit (value: %d)\n", *param)); ++ return A_OK; ++} ++ ++A_STATUS ++BMIWriteSOCRegister(HIF_DEVICE *device, ++ A_UINT32 address, ++ A_UINT32 param) ++{ ++ A_UINT32 cid; ++ A_STATUS status; ++ A_UINT32 offset; ++ static A_UCHAR data[sizeof(cid) + sizeof(address) + sizeof(param)]; ++ ++ memset (&data, 0, sizeof(cid) + sizeof(address) + sizeof(param)); ++ ++ if (bmiDone) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n")); ++ return A_ERROR; ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ++ ("BMI Write SOC Register: Enter (device: 0x%p, address: 0x%x, param: %d)\n", ++ device, address, param)); ++ ++ cid = BMI_WRITE_SOC_REGISTER; ++ ++ offset = 0; ++ A_MEMCPY(&data[offset], &cid, sizeof(cid)); ++ offset += sizeof(cid); ++ A_MEMCPY(&data[offset], &address, sizeof(address)); ++ offset += sizeof(address); ++ A_MEMCPY(&data[offset], ¶m, sizeof(param)); ++ offset += sizeof(param); ++ status = bmiBufferSend(device, data, offset); ++ if (status != A_OK) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n")); ++ return A_ERROR; ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Read SOC Register: Exit\n")); ++ return A_OK; ++} ++ ++A_STATUS ++BMIrompatchInstall(HIF_DEVICE *device, ++ A_UINT32 ROM_addr, ++ A_UINT32 RAM_addr, ++ A_UINT32 nbytes, ++ A_UINT32 do_activate, ++ A_UINT32 *rompatch_id) ++{ ++ A_UINT32 cid; ++ A_STATUS status; ++ A_UINT32 offset; ++ static A_UCHAR data[sizeof(cid) + sizeof(ROM_addr) + sizeof(RAM_addr) + ++ sizeof(nbytes) + sizeof(do_activate)]; ++ ++ memset (&data, 0, sizeof(cid) + sizeof(ROM_addr) + sizeof(RAM_addr) + ++ sizeof(nbytes) + sizeof(do_activate)); ++ ++ if (bmiDone) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n")); ++ return A_ERROR; ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ++ ("BMI rompatch Install: Enter (device: 0x%p, ROMaddr: 0x%x, RAMaddr: 0x%x length: %d activate: %d)\n", ++ device, ROM_addr, RAM_addr, nbytes, do_activate)); ++ ++ cid = BMI_ROMPATCH_INSTALL; ++ ++ offset = 0; ++ A_MEMCPY(&data[offset], &cid, sizeof(cid)); ++ offset += sizeof(cid); ++ A_MEMCPY(&data[offset], &ROM_addr, sizeof(ROM_addr)); ++ offset += sizeof(ROM_addr); ++ A_MEMCPY(&data[offset], &RAM_addr, sizeof(RAM_addr)); ++ offset += sizeof(RAM_addr); ++ A_MEMCPY(&data[offset], &nbytes, sizeof(nbytes)); ++ offset += sizeof(nbytes); ++ A_MEMCPY(&data[offset], &do_activate, sizeof(do_activate)); ++ offset += sizeof(do_activate); ++ status = bmiBufferSend(device, data, offset); ++ if (status != A_OK) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n")); ++ return A_ERROR; ++ } ++ ++ status = bmiBufferReceive(device, (A_UCHAR *)rompatch_id, sizeof(*rompatch_id)); ++ if (status != A_OK) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read from the device\n")); ++ return A_ERROR; ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI rompatch Install: (rompatch_id=%d)\n", *rompatch_id)); ++ return A_OK; ++} ++ ++A_STATUS ++BMIrompatchUninstall(HIF_DEVICE *device, ++ A_UINT32 rompatch_id) ++{ ++ A_UINT32 cid; ++ A_STATUS status; ++ A_UINT32 offset; ++ static A_UCHAR data[sizeof(cid) + sizeof(rompatch_id)]; ++ memset (&data, 0, sizeof(cid) + sizeof(rompatch_id)); ++ ++ if (bmiDone) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n")); ++ return A_ERROR; ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ++ ("BMI rompatch Uninstall: Enter (device: 0x%p, rompatch_id: %d)\n", ++ device, rompatch_id)); ++ ++ cid = BMI_ROMPATCH_UNINSTALL; ++ ++ offset = 0; ++ A_MEMCPY(&data[offset], &cid, sizeof(cid)); ++ offset += sizeof(cid); ++ A_MEMCPY(&data[offset], &rompatch_id, sizeof(rompatch_id)); ++ offset += sizeof(rompatch_id); ++ status = bmiBufferSend(device, data, offset); ++ if (status != A_OK) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n")); ++ return A_ERROR; ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI rompatch UNinstall: (rompatch_id=0x%x)\n", rompatch_id)); ++ return A_OK; ++} ++ ++static A_STATUS ++_BMIrompatchChangeActivation(HIF_DEVICE *device, ++ A_UINT32 rompatch_count, ++ A_UINT32 *rompatch_list, ++ A_UINT32 do_activate) ++{ ++ A_UINT32 cid; ++ A_STATUS status; ++ A_UINT32 offset; ++ static A_UCHAR data[BMI_DATASZ_MAX + sizeof(cid) + sizeof(rompatch_count)]; ++ A_UINT32 length; ++ ++ memset (&data, 0, BMI_DATASZ_MAX + sizeof(cid) + sizeof(rompatch_count)); ++ ++ if (bmiDone) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n")); ++ return A_ERROR; ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ++ ("BMI Change rompatch Activation: Enter (device: 0x%p, count: %d)\n", ++ device, rompatch_count)); ++ ++ cid = do_activate ? BMI_ROMPATCH_ACTIVATE : BMI_ROMPATCH_DEACTIVATE; ++ ++ offset = 0; ++ A_MEMCPY(&data[offset], &cid, sizeof(cid)); ++ offset += sizeof(cid); ++ A_MEMCPY(&data[offset], &rompatch_count, sizeof(rompatch_count)); ++ offset += sizeof(rompatch_count); ++ length = rompatch_count * sizeof(*rompatch_list); ++ A_MEMCPY(&data[offset], rompatch_list, length); ++ offset += length; ++ status = bmiBufferSend(device, data, offset); ++ if (status != A_OK) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n")); ++ return A_ERROR; ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Change rompatch Activation: Exit\n")); ++ ++ return A_OK; ++} ++ ++A_STATUS ++BMIrompatchActivate(HIF_DEVICE *device, ++ A_UINT32 rompatch_count, ++ A_UINT32 *rompatch_list) ++{ ++ return _BMIrompatchChangeActivation(device, rompatch_count, rompatch_list, 1); ++} ++ ++A_STATUS ++BMIrompatchDeactivate(HIF_DEVICE *device, ++ A_UINT32 rompatch_count, ++ A_UINT32 *rompatch_list) ++{ ++ return _BMIrompatchChangeActivation(device, rompatch_count, rompatch_list, 0); ++} ++ ++/* BMI Access routines */ ++A_STATUS ++bmiBufferSend(HIF_DEVICE *device, ++ A_UCHAR *buffer, ++ A_UINT32 length) ++{ ++ A_STATUS status; ++ A_UINT32 timeout; ++ A_UINT32 address; ++ static A_UINT32 cmdCredits; ++ A_UINT32 mboxAddress[HTC_MAILBOX_NUM_MAX]; ++ ++ HIFConfigureDevice(device, HIF_DEVICE_GET_MBOX_ADDR, ++ &mboxAddress, sizeof(mboxAddress)); ++ ++ cmdCredits = 0; ++ timeout = BMI_COMMUNICATION_TIMEOUT; ++ ++ while(timeout-- && !cmdCredits) { ++ /* Read the counter register to get the command credits */ ++ address = COUNT_DEC_ADDRESS + (HTC_MAILBOX_NUM_MAX + ENDPOINT1) * 4; ++ /* hit the credit counter with a 4-byte access, the first byte read will hit the counter and cause ++ * a decrement, while the remaining 3 bytes has no effect. The rationale behind this is to ++ * make all HIF accesses 4-byte aligned */ ++ status = HIFReadWrite(device, address, (A_UINT8 *)&cmdCredits, 4, ++ HIF_RD_SYNC_BYTE_INC, NULL); ++ if (status != A_OK) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to decrement the command credit count register\n")); ++ return A_ERROR; ++ } ++ /* the counter is only 8=bits, ignore anything in the upper 3 bytes */ ++ cmdCredits &= 0xFF; ++ } ++ ++ if (cmdCredits) { ++ address = mboxAddress[ENDPOINT1]; ++ status = HIFReadWrite(device, address, buffer, length, ++ HIF_WR_SYNC_BYTE_INC, NULL); ++ if (status != A_OK) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to send the BMI data to the device\n")); ++ return A_ERROR; ++ } ++ } else { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("BMI Communication timeout\n")); ++ return A_ERROR; ++ } ++ ++ return status; ++} ++ ++A_STATUS ++bmiBufferReceive(HIF_DEVICE *device, ++ A_UCHAR *buffer, ++ A_UINT32 length) ++{ ++ A_STATUS status; ++ A_UINT32 address; ++ A_UINT32 timeout; ++ static A_UINT32 cmdCredits; ++ A_UINT32 mboxAddress[HTC_MAILBOX_NUM_MAX]; ++ ++ HIFConfigureDevice(device, HIF_DEVICE_GET_MBOX_ADDR, ++ &mboxAddress, sizeof(mboxAddress)); ++ ++ cmdCredits = 0; ++ timeout = BMI_COMMUNICATION_TIMEOUT; ++ while(timeout-- && !cmdCredits) { ++ /* Read the counter register to get the command credits */ ++ address = COUNT_ADDRESS + (HTC_MAILBOX_NUM_MAX + ENDPOINT1) * 1; ++ /* read the counter using a 4-byte read. Since the counter is NOT auto-decrementing, ++ * we can read this counter multiple times using a non-incrementing address mode. ++ * The rationale here is to make all HIF accesses a multiple of 4 bytes */ ++ status = HIFReadWrite(device, address, (A_UINT8 *)&cmdCredits, sizeof(cmdCredits), ++ HIF_RD_SYNC_BYTE_FIX, NULL); ++ if (status != A_OK) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read the command credit count register\n")); ++ return A_ERROR; ++ } ++ /* we did a 4-byte read to the same count register so mask off upper bytes */ ++ cmdCredits &= 0xFF; ++ status = A_ERROR; ++ } ++ ++ if (cmdCredits) { ++ address = mboxAddress[ENDPOINT1]; ++ status = HIFReadWrite(device, address, buffer, length, ++ HIF_RD_SYNC_BYTE_INC, NULL); ++ if (status != A_OK) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read the BMI data from the device\n")); ++ return A_ERROR; ++ } ++ } else { ++ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Communication timeout\n")); ++ return A_ERROR; ++ } ++ ++ return status; ++} +diff --git a/drivers/sdio/function/wlan/ar6000/bmi/bmi_internal.h b/drivers/sdio/function/wlan/ar6000/bmi/bmi_internal.h +new file mode 100644 +index 0000000..1e21354 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/bmi/bmi_internal.h +@@ -0,0 +1,45 @@ ++#ifndef BMI_INTERNAL_H ++#define BMI_INTERNAL_H ++/* ++ * ++ * Copyright (c) 2004-2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++#include "a_config.h" ++#include "athdefs.h" ++#include "a_types.h" ++#include "a_osapi.h" ++#include "a_debug.h" ++#include "AR6Khwreg.h" ++#include "bmi_msg.h" ++ ++#define BMI_COMMUNICATION_TIMEOUT 100000 ++ ++/* ------ Global Variable Declarations ------- */ ++A_BOOL bmiDone; ++ ++A_STATUS ++bmiBufferSend(HIF_DEVICE *device, ++ A_UCHAR *buffer, ++ A_UINT32 length); ++ ++A_STATUS ++bmiBufferReceive(HIF_DEVICE *device, ++ A_UCHAR *buffer, ++ A_UINT32 length); ++ ++#endif +diff --git a/drivers/sdio/function/wlan/ar6000/hif/hif.c b/drivers/sdio/function/wlan/ar6000/hif/hif.c +new file mode 100644 +index 0000000..f5a0986 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/hif/hif.c +@@ -0,0 +1,818 @@ ++/* ++ * @file: hif.c ++ * ++ * @abstract: HIF layer reference implementation for Atheros SDIO stack ++ * ++ * @notice: Copyright (c) 2004-2006 Atheros Communications Inc. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++#include "hif_internal.h" ++ ++/* ------ Static Variables ------ */ ++ ++/* ------ Global Variable Declarations ------- */ ++SD_PNP_INFO Ids[] = { ++ { ++ .SDIO_ManufacturerID = MANUFACTURER_ID_AR6001_BASE | 0xB, ++ .SDIO_ManufacturerCode = MANUFACTURER_CODE, ++ .SDIO_FunctionClass = FUNCTION_CLASS, ++ .SDIO_FunctionNo = 1 ++ }, ++ { ++ .SDIO_ManufacturerID = MANUFACTURER_ID_AR6001_BASE | 0xA, ++ .SDIO_ManufacturerCode = MANUFACTURER_CODE, ++ .SDIO_FunctionClass = FUNCTION_CLASS, ++ .SDIO_FunctionNo = 1 ++ }, ++ { ++ .SDIO_ManufacturerID = MANUFACTURER_ID_AR6001_BASE | 0x9, ++ .SDIO_ManufacturerCode = MANUFACTURER_CODE, ++ .SDIO_FunctionClass = FUNCTION_CLASS, ++ .SDIO_FunctionNo = 1 ++ }, ++ { ++ .SDIO_ManufacturerID = MANUFACTURER_ID_AR6001_BASE | 0x8, ++ .SDIO_ManufacturerCode = MANUFACTURER_CODE, ++ .SDIO_FunctionClass = FUNCTION_CLASS, ++ .SDIO_FunctionNo = 1 ++ }, ++ { ++ .SDIO_ManufacturerID = MANUFACTURER_ID_AR6002_BASE | 0x0, ++ .SDIO_ManufacturerCode = MANUFACTURER_CODE, ++ .SDIO_FunctionClass = FUNCTION_CLASS, ++ .SDIO_FunctionNo = 1 ++ }, ++ { ++ .SDIO_ManufacturerID = MANUFACTURER_ID_AR6002_BASE | 0x1, ++ .SDIO_ManufacturerCode = MANUFACTURER_CODE, ++ .SDIO_FunctionClass = FUNCTION_CLASS, ++ .SDIO_FunctionNo = 1 ++ }, ++ { ++ } //list is null termintaed ++}; ++ ++TARGET_FUNCTION_CONTEXT FunctionContext = { ++ .function.Version = CT_SDIO_STACK_VERSION_CODE, ++ .function.pName = "sdio_wlan", ++ .function.MaxDevices = 1, ++ .function.NumDevices = 0, ++ .function.pIds = Ids, ++ .function.pProbe = hifDeviceInserted, ++ .function.pRemove = hifDeviceRemoved, ++ .function.pSuspend = NULL, ++ .function.pResume = NULL, ++ .function.pWake = NULL, ++ .function.pContext = &FunctionContext, ++}; ++ ++HIF_DEVICE hifDevice[HIF_MAX_DEVICES]; ++HTC_CALLBACKS htcCallbacks; ++BUS_REQUEST busRequest[BUS_REQUEST_MAX_NUM]; ++static BUS_REQUEST *s_busRequestFreeQueue = NULL; ++OS_CRITICALSECTION lock; ++extern A_UINT32 onebitmode; ++extern A_UINT32 busspeedlow; ++extern A_UINT32 debughif; ++ ++#ifdef DEBUG ++#define ATH_DEBUG_ERROR 1 ++#define ATH_DEBUG_WARN 2 ++#define ATH_DEBUG_TRACE 3 ++#define _AR_DEBUG_PRINTX_ARG(arg...) arg ++#define AR_DEBUG_PRINTF(lvl, args)\ ++ {if (lvl <= debughif)\ ++ A_PRINTF(KERN_ALERT _AR_DEBUG_PRINTX_ARG args);\ ++ } ++#else ++#define AR_DEBUG_PRINTF(lvl, args) ++#endif ++ ++static BUS_REQUEST *hifAllocateBusRequest(void); ++static void hifFreeBusRequest(BUS_REQUEST *busrequest); ++static THREAD_RETURN insert_helper_func(POSKERNEL_HELPER pHelper); ++static void ResetAllCards(void); ++ ++/* ------ Functions ------ */ ++int HIFInit(HTC_CALLBACKS *callbacks) ++{ ++ SDIO_STATUS status; ++ DBG_ASSERT(callbacks != NULL); ++ ++ /* Store the callback and event handlers */ ++ htcCallbacks.deviceInsertedHandler = callbacks->deviceInsertedHandler; ++ htcCallbacks.deviceRemovedHandler = callbacks->deviceRemovedHandler; ++ htcCallbacks.deviceSuspendHandler = callbacks->deviceSuspendHandler; ++ htcCallbacks.deviceResumeHandler = callbacks->deviceResumeHandler; ++ htcCallbacks.deviceWakeupHandler = callbacks->deviceWakeupHandler; ++ htcCallbacks.rwCompletionHandler = callbacks->rwCompletionHandler; ++ htcCallbacks.dsrHandler = callbacks->dsrHandler; ++ ++ CriticalSectionInit(&lock); ++ ++ /* Register with bus driver core */ ++ status = SDIO_RegisterFunction(&FunctionContext.function); ++ DBG_ASSERT(SDIO_SUCCESS(status)); ++ ++ return(0); ++} ++ ++A_STATUS ++HIFReadWrite(HIF_DEVICE *device, ++ A_UINT32 address, ++ A_UCHAR *buffer, ++ A_UINT32 length, ++ A_UINT32 request, ++ void *context) ++{ ++ A_UINT8 rw; ++ A_UINT8 mode; ++ A_UINT8 funcNo; ++ A_UINT8 opcode; ++ A_UINT16 count; ++ SDREQUEST *sdrequest; ++ SDIO_STATUS sdiostatus; ++ BUS_REQUEST *busrequest; ++ A_STATUS status = A_OK; ++ ++ DBG_ASSERT(device != NULL); ++ DBG_ASSERT(device->handle != NULL); ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Device: %p\n", device)); ++ ++ do { ++ busrequest = hifAllocateBusRequest(); ++ if (busrequest == NULL) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR, ("HIF Unable to allocate bus request\n")); ++ status = A_NO_RESOURCE; ++ break; ++ } ++ ++ sdrequest = busrequest->request; ++ busrequest->context = context; ++ ++ sdrequest->pDataBuffer = buffer; ++ if (request & HIF_SYNCHRONOUS) { ++ sdrequest->Flags = SDREQ_FLAGS_RESP_SDIO_R5 | SDREQ_FLAGS_DATA_TRANS; ++ sdrequest->pCompleteContext = NULL; ++ sdrequest->pCompletion = NULL; ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Execution mode: Synchronous\n")); ++ } else if (request & HIF_ASYNCHRONOUS) { ++ sdrequest->Flags = SDREQ_FLAGS_RESP_SDIO_R5 | SDREQ_FLAGS_DATA_TRANS | ++ SDREQ_FLAGS_TRANS_ASYNC; ++ sdrequest->pCompleteContext = busrequest; ++ sdrequest->pCompletion = hifRWCompletionHandler; ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Execution mode: Asynchronous\n")); ++ } else { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR, ++ ("Invalid execution mode: 0x%08x\n", request)); ++ status = A_EINVAL; ++ break; ++ } ++ ++ if (request & HIF_EXTENDED_IO) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Command type: CMD53\n")); ++ sdrequest->Command = CMD53; ++ } else { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR, ++ ("Invalid command type: 0x%08x\n", request)); ++ status = A_EINVAL; ++ break; ++ } ++ ++ if (request & HIF_BLOCK_BASIS) { ++ mode = CMD53_BLOCK_BASIS; ++ sdrequest->BlockLen = HIF_MBOX_BLOCK_SIZE; ++ sdrequest->BlockCount = length / HIF_MBOX_BLOCK_SIZE; ++ count = sdrequest->BlockCount; ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ++ ("Block mode (BlockLen: %d, BlockCount: %d)\n", ++ sdrequest->BlockLen, sdrequest->BlockCount)); ++ } else if (request & HIF_BYTE_BASIS) { ++ mode = CMD53_BYTE_BASIS; ++ sdrequest->BlockLen = length; ++ sdrequest->BlockCount = 1; ++ count = sdrequest->BlockLen; ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ++ ("Byte mode (BlockLen: %d, BlockCount: %d)\n", ++ sdrequest->BlockLen, sdrequest->BlockCount)); ++ } else { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR, ++ ("Invalid data mode: 0x%08x\n", request)); ++ status = A_EINVAL; ++ break; ++ } ++ ++#if 0 ++ /* useful for checking register accesses */ ++ if (length & 0x3) { ++ A_PRINTF(KERN_ALERT"HIF (%s) is not a multiple of 4 bytes, addr:0x%X, len:%d\n", ++ request & HIF_WRITE ? "write":"read", address, length); ++ } ++#endif ++ ++ if ((address >= HIF_MBOX_START_ADDR(0)) && ++ (address <= HIF_MBOX_END_ADDR(3))) ++ { ++ ++ DBG_ASSERT(length <= HIF_MBOX_WIDTH); ++ ++ /* ++ * Mailbox write. Adjust the address so that the last byte ++ * falls on the EOM address. ++ */ ++ address += (HIF_MBOX_WIDTH - length); ++ } ++ ++ ++ ++ if (request & HIF_WRITE) { ++ rw = CMD53_WRITE; ++ sdrequest->Flags |= SDREQ_FLAGS_DATA_WRITE; ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Direction: Write\n")); ++ } else if (request & HIF_READ) { ++ rw = CMD53_READ; ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Direction: Read\n")); ++ } else { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR, ++ ("Invalid direction: 0x%08x\n", request)); ++ status = A_EINVAL; ++ break; ++ } ++ ++ if (request & HIF_FIXED_ADDRESS) { ++ opcode = CMD53_FIXED_ADDRESS; ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Address mode: Fixed\n")); ++ } else if (request & HIF_INCREMENTAL_ADDRESS) { ++ opcode = CMD53_INCR_ADDRESS; ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Address mode: Incremental\n")); ++ } else { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR, ++ ("Invalid address mode: 0x%08x\n", request)); ++ status = A_EINVAL; ++ break; ++ } ++ ++ funcNo = SDDEVICE_GET_SDIO_FUNCNO(device->handle); ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Function number: %d\n", funcNo)); ++ SDIO_SET_CMD53_ARG(sdrequest->Argument, rw, funcNo, ++ mode, opcode, address, count); ++ ++ /* Send the command out */ ++ sdiostatus = SDDEVICE_CALL_REQUEST_FUNC(device->handle, sdrequest); ++ ++ if (!SDIO_SUCCESS(sdiostatus)) { ++ status = A_ERROR; ++ } ++ ++ } while (FALSE); ++ ++ if (A_FAILED(status) || (request & HIF_SYNCHRONOUS)) { ++ if (busrequest != NULL) { ++ hifFreeBusRequest(busrequest); ++ } ++ } ++ ++ if (A_FAILED(status) && (request & HIF_ASYNCHRONOUS)) { ++ /* call back async handler on failure */ ++ htcCallbacks.rwCompletionHandler(context, status); ++ } ++ ++ return status; ++} ++ ++A_STATUS ++HIFConfigureDevice(HIF_DEVICE *device, HIF_DEVICE_CONFIG_OPCODE opcode, ++ void *config, A_UINT32 configLen) ++{ ++ A_UINT32 count; ++ ++ switch(opcode) { ++ case HIF_DEVICE_GET_MBOX_BLOCK_SIZE: ++ ((A_UINT32 *)config)[0] = HIF_MBOX0_BLOCK_SIZE; ++ ((A_UINT32 *)config)[1] = HIF_MBOX1_BLOCK_SIZE; ++ ((A_UINT32 *)config)[2] = HIF_MBOX2_BLOCK_SIZE; ++ ((A_UINT32 *)config)[3] = HIF_MBOX3_BLOCK_SIZE; ++ break; ++ ++ case HIF_DEVICE_GET_MBOX_ADDR: ++ for (count = 0; count < 4; count ++) { ++ ((A_UINT32 *)config)[count] = HIF_MBOX_START_ADDR(count); ++ } ++ break; ++ case HIF_DEVICE_GET_IRQ_PROC_MODE: ++ /* the SDIO stack allows the interrupts to be processed either way, ASYNC or SYNC */ ++ *((HIF_DEVICE_IRQ_PROCESSING_MODE *)config) = HIF_DEVICE_IRQ_ASYNC_SYNC; ++ break; ++ default: ++ AR_DEBUG_PRINTF(ATH_DEBUG_WARN, ++ ("Unsupported configuration opcode: %d\n", opcode)); ++ return A_ERROR; ++ } ++ ++ return A_OK; ++} ++ ++void ++HIFShutDownDevice(HIF_DEVICE *device) ++{ ++ A_UINT8 data; ++ A_UINT32 count; ++ SDIO_STATUS status; ++ SDCONFIG_BUS_MODE_DATA busSettings; ++ SDCONFIG_FUNC_ENABLE_DISABLE_DATA fData; ++ ++ if (device != NULL) { ++ DBG_ASSERT(device->handle != NULL); ++ ++ /* Remove the allocated current if any */ ++ status = SDLIB_IssueConfig(device->handle, ++ SDCONFIG_FUNC_FREE_SLOT_CURRENT, NULL, 0); ++ DBG_ASSERT(SDIO_SUCCESS(status)); ++ ++ /* Disable the card */ ++ fData.EnableFlags = SDCONFIG_DISABLE_FUNC; ++ fData.TimeOut = 1; ++ status = SDLIB_IssueConfig(device->handle, SDCONFIG_FUNC_ENABLE_DISABLE, ++ &fData, sizeof(fData)); ++ DBG_ASSERT(SDIO_SUCCESS(status)); ++ ++ /* Perform a soft I/O reset */ ++ data = SDIO_IO_RESET; ++ status = SDLIB_IssueCMD52(device->handle, 0, SDIO_IO_ABORT_REG, ++ &data, 1, 1); ++ DBG_ASSERT(SDIO_SUCCESS(status)); ++ ++ /* ++ * WAR - Codetelligence driver does not seem to shutdown correctly in 1 ++ * bit mode. By default it configures the HC in the 4 bit. Its later in ++ * our driver that we switch to 1 bit mode. If we try to shutdown, the ++ * driver hangs so we revert to 4 bit mode, to be transparent to the ++ * underlying bus driver. ++ */ ++ if (onebitmode) { ++ ZERO_OBJECT(busSettings); ++ busSettings.BusModeFlags = SDDEVICE_GET_BUSMODE_FLAGS(device->handle); ++ SDCONFIG_SET_BUS_WIDTH(busSettings.BusModeFlags, ++ SDCONFIG_BUS_WIDTH_4_BIT); ++ ++ /* Issue config request to change the bus width to 4 bit */ ++ status = SDLIB_IssueConfig(device->handle, SDCONFIG_BUS_MODE_CTRL, ++ &busSettings, ++ sizeof(SDCONFIG_BUS_MODE_DATA)); ++ DBG_ASSERT(SDIO_SUCCESS(status)); ++ } ++ ++ /* Free the bus requests */ ++ for (count = 0; count < BUS_REQUEST_MAX_NUM; count ++) { ++ SDDeviceFreeRequest(device->handle, busRequest[count].request); ++ } ++ /* Clean up the queue */ ++ s_busRequestFreeQueue = NULL; ++ } else { ++ /* since we are unloading the driver anyways, reset all cards in case the SDIO card ++ * is externally powered and we are unloading the SDIO stack. This avoids the problem when ++ * the SDIO stack is reloaded and attempts are made to re-enumerate a card that is already ++ * enumerated */ ++ ResetAllCards(); ++ /* Unregister with bus driver core */ ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ++ ("Unregistering with the bus driver\n")); ++ status = SDIO_UnregisterFunction(&FunctionContext.function); ++ DBG_ASSERT(SDIO_SUCCESS(status)); ++ } ++} ++ ++void ++hifRWCompletionHandler(SDREQUEST *request) ++{ ++ A_STATUS status; ++ void *context; ++ BUS_REQUEST *busrequest; ++ ++ if (SDIO_SUCCESS(request->Status)) { ++ status = A_OK; ++ } else { ++ status = A_ERROR; ++ } ++ ++ DBG_ASSERT(status == A_OK); ++ busrequest = (BUS_REQUEST *) request->pCompleteContext; ++ context = (void *) busrequest->context; ++ /* free the request before calling the callback, in case the ++ * callback submits another request, this guarantees that ++ * there is at least 1 free request available everytime the callback ++ * is invoked */ ++ hifFreeBusRequest(busrequest); ++ htcCallbacks.rwCompletionHandler(context, status); ++} ++ ++void ++hifIRQHandler(void *context) ++{ ++ A_STATUS status; ++ HIF_DEVICE *device; ++ ++ device = (HIF_DEVICE *)context; ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Device: %p\n", device)); ++ status = htcCallbacks.dsrHandler(device->htc_handle); ++ DBG_ASSERT(status == A_OK); ++} ++ ++BOOL ++hifDeviceInserted(SDFUNCTION *function, SDDEVICE *handle) ++{ ++ BOOL enabled; ++ A_UINT8 data; ++ A_UINT32 count; ++ HIF_DEVICE *device; ++ SDIO_STATUS status; ++ A_UINT16 maxBlocks; ++ A_UINT16 maxBlockSize; ++ SDCONFIG_BUS_MODE_DATA busSettings; ++ SDCONFIG_FUNC_ENABLE_DISABLE_DATA fData; ++ TARGET_FUNCTION_CONTEXT *functionContext; ++ SDCONFIG_FUNC_SLOT_CURRENT_DATA slotCurrent; ++ SD_BUSCLOCK_RATE currentBusClock; ++ ++ DBG_ASSERT(function != NULL); ++ DBG_ASSERT(handle != NULL); ++ ++ device = addHifDevice(handle); ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Device: %p\n", device)); ++ functionContext = (TARGET_FUNCTION_CONTEXT *)function->pContext; ++ ++ /* ++ * Issue commands to get the manufacturer ID and stuff and compare it ++ * against the rev Id derived from the ID registered during the ++ * initialization process. Report the device only in the case there ++ * is a match. In the case od SDIO, the bus driver has already queried ++ * these details so we just need to use their data structures to get the ++ * relevant values. Infact, the driver has already matched it against ++ * the Ids that we registered with it so we dont need to the step here. ++ */ ++ ++ /* Configure the SDIO Bus Width */ ++ if (onebitmode) { ++ data = SDIO_BUS_WIDTH_1_BIT; ++ status = SDLIB_IssueCMD52(handle, 0, SDIO_BUS_IF_REG, &data, 1, 1); ++ if (!SDIO_SUCCESS(status)) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR, ++ ("Unable to set the bus width to 1 bit\n")); ++ return FALSE; ++ } ++ } ++ ++ /* Get current bus flags */ ++ ZERO_OBJECT(busSettings); ++ ++ busSettings.BusModeFlags = SDDEVICE_GET_BUSMODE_FLAGS(handle); ++ if (onebitmode) { ++ SDCONFIG_SET_BUS_WIDTH(busSettings.BusModeFlags, ++ SDCONFIG_BUS_WIDTH_1_BIT); ++ } ++ ++ /* get the current operating clock, the bus driver sets us up based ++ * on what our CIS reports and what the host controller can handle ++ * we can use this to determine whether we want to drop our clock rate ++ * down */ ++ currentBusClock = SDDEVICE_GET_OPER_CLOCK(handle); ++ busSettings.ClockRate = currentBusClock; ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ++ ("HIF currently running at: %d \n",currentBusClock)); ++ ++ /* see if HIF wants to run at a lower clock speed, we may already be ++ * at that lower clock speed */ ++ if (currentBusClock > (SDIO_CLOCK_FREQUENCY_DEFAULT >> busspeedlow)) { ++ busSettings.ClockRate = SDIO_CLOCK_FREQUENCY_DEFAULT >> busspeedlow; ++ AR_DEBUG_PRINTF(ATH_DEBUG_WARN, ++ ("HIF overriding clock to %d \n",busSettings.ClockRate)); ++ } ++ ++ /* Issue config request to override clock rate */ ++ status = SDLIB_IssueConfig(handle, SDCONFIG_FUNC_CHANGE_BUS_MODE, &busSettings, ++ sizeof(SDCONFIG_BUS_MODE_DATA)); ++ if (!SDIO_SUCCESS(status)) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR, ++ ("Unable to configure the host clock\n")); ++ return FALSE; ++ } else { ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ++ ("Configured clock: %d, Maximum clock: %d\n", ++ busSettings.ActualClockRate, ++ SDDEVICE_GET_MAX_CLOCK(handle))); ++ } ++ ++ /* ++ * Check if the target supports block mode. This result of this check ++ * can be used to implement the HIFReadWrite API. ++ */ ++ if (SDDEVICE_GET_SDIO_FUNC_MAXBLKSIZE(handle)) { ++ /* Limit block size to operational block limit or card function ++ capability */ ++ maxBlockSize = min(SDDEVICE_GET_OPER_BLOCK_LEN(handle), ++ SDDEVICE_GET_SDIO_FUNC_MAXBLKSIZE(handle)); ++ ++ /* check if the card support multi-block transfers */ ++ if (!(SDDEVICE_GET_SDIOCARD_CAPS(handle) & SDIO_CAPS_MULTI_BLOCK)) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Byte basis only\n")); ++ ++ /* Limit block size to max byte basis */ ++ maxBlockSize = min(maxBlockSize, ++ (A_UINT16)SDIO_MAX_LENGTH_BYTE_BASIS); ++ maxBlocks = 1; ++ } else { ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Multi-block capable\n")); ++ maxBlocks = SDDEVICE_GET_OPER_BLOCKS(handle); ++ status = SDLIB_SetFunctionBlockSize(handle, HIF_MBOX_BLOCK_SIZE); ++ if (!SDIO_SUCCESS(status)) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR, ++ ("Failed to set block size. Err:%d\n", status)); ++ return FALSE; ++ } ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ++ ("Bytes Per Block: %d bytes, Block Count:%d \n", ++ maxBlockSize, maxBlocks)); ++ } else { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR, ++ ("Function does not support Block Mode!\n")); ++ return FALSE; ++ } ++ ++ /* Allocate the slot current */ ++ status = SDLIB_GetDefaultOpCurrent(handle, &slotCurrent.SlotCurrent); ++ if (SDIO_SUCCESS(status)) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Allocating Slot current: %d mA\n", ++ slotCurrent.SlotCurrent)); ++ status = SDLIB_IssueConfig(handle, SDCONFIG_FUNC_ALLOC_SLOT_CURRENT, ++ &slotCurrent, sizeof(slotCurrent)); ++ if (!SDIO_SUCCESS(status)) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR, ++ ("Failed to allocate slot current %d\n", status)); ++ return FALSE; ++ } ++ } ++ ++ /* Enable the dragon function */ ++ count = 0; ++ enabled = FALSE; ++ fData.TimeOut = 1; ++ fData.EnableFlags = SDCONFIG_ENABLE_FUNC; ++ while ((count++ < SDWLAN_ENABLE_DISABLE_TIMEOUT) && !enabled) ++ { ++ /* Enable dragon */ ++ status = SDLIB_IssueConfig(handle, SDCONFIG_FUNC_ENABLE_DISABLE, ++ &fData, sizeof(fData)); ++ if (!SDIO_SUCCESS(status)) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ++ ("Attempting to enable the card again\n")); ++ continue; ++ } ++ ++ /* Mark the status as enabled */ ++ enabled = TRUE; ++ } ++ ++ /* Check if we were succesful in enabling the target */ ++ if (!enabled) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR, ++ ("Failed to communicate with the target\n")); ++ return FALSE; ++ } ++ ++ /* Allocate the bus requests to be used later */ ++ A_MEMZERO(busRequest, sizeof(busRequest)); ++ for (count = 0; count < BUS_REQUEST_MAX_NUM; count ++) { ++ if ((busRequest[count].request = SDDeviceAllocRequest(handle)) == NULL){ ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR, ("Unable to allocate memory\n")); ++ /* TODO: Free the memory that has already been allocated */ ++ return FALSE; ++ } ++ hifFreeBusRequest(&busRequest[count]); ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ++ ("0x%08x = busRequest[%d].request = 0x%08x\n", ++ (unsigned int) &busRequest[count], count, ++ (unsigned int) busRequest[count].request)); ++ } ++ ++ /* Schedule a worker to handle device inserted, this is a temporary workaround ++ * to fix a deadlock if the device fails to intialize in the insertion handler ++ * The failure causes the instance to shutdown the HIF layer and unregister the ++ * function driver within the busdriver probe context which can deadlock ++ * ++ * NOTE: we cannot use the default work queue because that would block ++ * SD bus request processing for all synchronous I/O. We must use a kernel ++ * thread that is creating using the helper library. ++ * */ ++ ++ if (SDIO_SUCCESS(SDLIB_OSCreateHelper(&device->insert_helper, ++ insert_helper_func, ++ device))) { ++ device->helper_started = TRUE; ++ } ++ ++ return TRUE; ++} ++ ++static THREAD_RETURN insert_helper_func(POSKERNEL_HELPER pHelper) ++{ ++ ++ /* ++ * Adding a wait of around a second before we issue the very first ++ * command to dragon. During the process of loading/unloading the ++ * driver repeatedly it was observed that we get a data timeout ++ * while accessing function 1 registers in the chip. The theory at ++ * this point is that some initialization delay in dragon is ++ * causing the SDIO state in dragon core to be not ready even after ++ * the ready bit indicates that function 1 is ready. Accomodating ++ * for this behavior by adding some delay in the driver before it ++ * issues the first command after switching on dragon. Need to ++ * investigate this a bit more - TODO ++ */ ++ ++ A_MDELAY(1000); ++ /* Inform HTC */ ++ if ((htcCallbacks.deviceInsertedHandler(SD_GET_OS_HELPER_CONTEXT(pHelper))) != A_OK) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Device rejected\n")); ++ } ++ ++ return 0; ++} ++ ++void ++HIFAckInterrupt(HIF_DEVICE *device) ++{ ++ SDIO_STATUS status; ++ DBG_ASSERT(device != NULL); ++ DBG_ASSERT(device->handle != NULL); ++ ++ /* Acknowledge our function IRQ */ ++ status = SDLIB_IssueConfig(device->handle, SDCONFIG_FUNC_ACK_IRQ, ++ NULL, 0); ++ DBG_ASSERT(SDIO_SUCCESS(status)); ++} ++ ++void ++HIFUnMaskInterrupt(HIF_DEVICE *device) ++{ ++ SDIO_STATUS status; ++ ++ DBG_ASSERT(device != NULL); ++ DBG_ASSERT(device->handle != NULL); ++ ++ /* Register the IRQ Handler */ ++ SDDEVICE_SET_IRQ_HANDLER(device->handle, hifIRQHandler, device); ++ ++ /* Unmask our function IRQ */ ++ status = SDLIB_IssueConfig(device->handle, SDCONFIG_FUNC_UNMASK_IRQ, ++ NULL, 0); ++ DBG_ASSERT(SDIO_SUCCESS(status)); ++} ++ ++void HIFMaskInterrupt(HIF_DEVICE *device) ++{ ++ SDIO_STATUS status; ++ DBG_ASSERT(device != NULL); ++ DBG_ASSERT(device->handle != NULL); ++ ++ /* Mask our function IRQ */ ++ status = SDLIB_IssueConfig(device->handle, SDCONFIG_FUNC_MASK_IRQ, ++ NULL, 0); ++ DBG_ASSERT(SDIO_SUCCESS(status)); ++ ++ /* Unregister the IRQ Handler */ ++ SDDEVICE_SET_IRQ_HANDLER(device->handle, NULL, NULL); ++} ++ ++static BUS_REQUEST *hifAllocateBusRequest(void) ++{ ++ BUS_REQUEST *busrequest; ++ ++ /* Acquire lock */ ++ CriticalSectionAcquire(&lock); ++ ++ /* Remove first in list */ ++ if((busrequest = s_busRequestFreeQueue) != NULL) ++ { ++ s_busRequestFreeQueue = busrequest->next; ++ } ++ ++ /* Release lock */ ++ CriticalSectionRelease(&lock); ++ ++ return busrequest; ++} ++ ++static void ++hifFreeBusRequest(BUS_REQUEST *busrequest) ++{ ++ DBG_ASSERT(busrequest != NULL); ++ ++ /* Acquire lock */ ++ CriticalSectionAcquire(&lock); ++ ++ /* Insert first in list */ ++ busrequest->next = s_busRequestFreeQueue; ++ s_busRequestFreeQueue = busrequest; ++ ++ /* Release lock */ ++ CriticalSectionRelease(&lock); ++} ++ ++void ++hifDeviceRemoved(SDFUNCTION *function, SDDEVICE *handle) ++{ ++ A_STATUS status; ++ HIF_DEVICE *device; ++ DBG_ASSERT(function != NULL); ++ DBG_ASSERT(handle != NULL); ++ ++ device = getHifDevice(handle); ++ status = htcCallbacks.deviceRemovedHandler(device->htc_handle, A_OK); ++ ++ /* cleanup the helper thread */ ++ if (device->helper_started) { ++ SDLIB_OSDeleteHelper(&device->insert_helper); ++ device->helper_started = FALSE; ++ } ++ ++ delHifDevice(handle); ++ DBG_ASSERT(status == A_OK); ++} ++ ++HIF_DEVICE * ++addHifDevice(SDDEVICE *handle) ++{ ++ DBG_ASSERT(handle != NULL); ++ hifDevice[0].handle = handle; ++ return &hifDevice[0]; ++} ++ ++HIF_DEVICE * ++getHifDevice(SDDEVICE *handle) ++{ ++ DBG_ASSERT(handle != NULL); ++ return &hifDevice[0]; ++} ++ ++void ++delHifDevice(SDDEVICE *handle) ++{ ++ DBG_ASSERT(handle != NULL); ++ hifDevice[0].handle = NULL; ++} ++ ++static void ResetAllCards(void) ++{ ++ UINT8 data; ++ SDIO_STATUS status; ++ int i; ++ ++ data = SDIO_IO_RESET; ++ ++ /* set the I/O CARD reset bit: ++ * NOTE: we are exploiting a "feature" of the SDIO core that resets the core when you ++ * set the RES bit in the SDIO_IO_ABORT register. This bit however "normally" resets the ++ * I/O functions leaving the SDIO core in the same state (as per SDIO spec). ++ * In this design, this reset can be used to reset the SDIO core itself */ ++ for (i = 0; i < HIF_MAX_DEVICES; i++) { ++ if (hifDevice[i].handle != NULL) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ++ ("Issuing I/O Card reset for instance: %d \n",i)); ++ /* set the I/O Card reset bit */ ++ status = SDLIB_IssueCMD52(hifDevice[i].handle, ++ 0, /* function 0 space */ ++ SDIO_IO_ABORT_REG, ++ &data, ++ 1, /* 1 byte */ ++ TRUE); /* write */ ++ } ++ } ++ ++} ++ ++void HIFSetHandle(void *hif_handle, void *handle) ++{ ++ HIF_DEVICE *device = (HIF_DEVICE *) hif_handle; ++ ++ device->htc_handle = handle; ++ ++ return; ++} +diff --git a/drivers/sdio/function/wlan/ar6000/hif/hif_internal.h b/drivers/sdio/function/wlan/ar6000/hif/hif_internal.h +new file mode 100644 +index 0000000..d8fc101 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/hif/hif_internal.h +@@ -0,0 +1,102 @@ ++/* ++ * @file: hif_internal.h ++ * ++ * @abstract: internal header file for hif layer ++ * ++ * @notice: Copyright (c) 2004-2006 Atheros Communications Inc. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include "a_config.h" ++#include "athdefs.h" ++#include "a_types.h" ++#include "a_osapi.h" ++#include "hif.h" ++ ++#define MANUFACTURER_ID_AR6001_BASE 0x100 ++#define MANUFACTURER_ID_AR6002_BASE 0x200 ++#define FUNCTION_CLASS 0x0 ++#define MANUFACTURER_CODE 0x271 ++ ++#define BUS_REQUEST_MAX_NUM 64 ++ ++#define SDIO_CLOCK_FREQUENCY_DEFAULT 25000000 ++#define SDWLAN_ENABLE_DISABLE_TIMEOUT 20 ++#define FLAGS_CARD_ENAB 0x02 ++#define FLAGS_CARD_IRQ_UNMSK 0x04 ++ ++#define HIF_MBOX_BLOCK_SIZE 128 ++#define HIF_MBOX_BASE_ADDR 0x800 ++#define HIF_MBOX_WIDTH 0x800 ++#define HIF_MBOX0_BLOCK_SIZE 1 ++#define HIF_MBOX1_BLOCK_SIZE HIF_MBOX_BLOCK_SIZE ++#define HIF_MBOX2_BLOCK_SIZE HIF_MBOX_BLOCK_SIZE ++#define HIF_MBOX3_BLOCK_SIZE HIF_MBOX_BLOCK_SIZE ++ ++#define HIF_MBOX_START_ADDR(mbox) \ ++ HIF_MBOX_BASE_ADDR + mbox * HIF_MBOX_WIDTH ++ ++#define HIF_MBOX_END_ADDR(mbox) \ ++ HIF_MBOX_START_ADDR(mbox) + HIF_MBOX_WIDTH - 1 ++ ++struct hif_device { ++ SDDEVICE *handle; ++ void *htc_handle; ++ OSKERNEL_HELPER insert_helper; ++ BOOL helper_started; ++}; ++ ++typedef struct target_function_context { ++ SDFUNCTION function; /* function description of the bus driver */ ++ OS_SEMAPHORE instanceSem; /* instance lock. Unused */ ++ SDLIST instanceList; /* list of instances. Unused */ ++} TARGET_FUNCTION_CONTEXT; ++ ++typedef struct bus_request { ++ struct bus_request *next; ++ SDREQUEST *request; ++ void *context; ++} BUS_REQUEST; ++ ++BOOL ++hifDeviceInserted(SDFUNCTION *function, SDDEVICE *device); ++ ++void ++hifDeviceRemoved(SDFUNCTION *function, SDDEVICE *device); ++ ++SDREQUEST * ++hifAllocateDeviceRequest(SDDEVICE *device); ++ ++void ++hifFreeDeviceRequest(SDREQUEST *request); ++ ++void ++hifRWCompletionHandler(SDREQUEST *request); ++ ++void ++hifIRQHandler(void *context); ++ ++HIF_DEVICE * ++addHifDevice(SDDEVICE *handle); ++ ++HIF_DEVICE * ++getHifDevice(SDDEVICE *handle); ++ ++void ++delHifDevice(SDDEVICE *handle); +diff --git a/drivers/sdio/function/wlan/ar6000/htc/ar6k.c b/drivers/sdio/function/wlan/ar6000/htc/ar6k.c +new file mode 100644 +index 0000000..0fd671a +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/htc/ar6k.c +@@ -0,0 +1,991 @@ ++/* ++ * AR6K device layer that handles register level I/O ++ * ++ * Copyright (c) 2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++#include "a_config.h" ++#include "athdefs.h" ++#include "a_types.h" ++#include "AR6Khwreg.h" ++#include "a_osapi.h" ++#include "a_debug.h" ++#include "hif.h" ++#include "htc_packet.h" ++#include "ar6k.h" ++ ++#define MAILBOX_FOR_BLOCK_SIZE 1 ++ ++extern A_UINT32 resetok; ++ ++static A_STATUS DevEnableInterrupts(AR6K_DEVICE *pDev); ++static A_STATUS DevDisableInterrupts(AR6K_DEVICE *pDev); ++ ++#define LOCK_AR6K(p) A_MUTEX_LOCK(&(p)->Lock); ++#define UNLOCK_AR6K(p) A_MUTEX_UNLOCK(&(p)->Lock); ++ ++void AR6KFreeIOPacket(AR6K_DEVICE *pDev, HTC_PACKET *pPacket) ++{ ++ LOCK_AR6K(pDev); ++ HTC_PACKET_ENQUEUE(&pDev->RegisterIOList,pPacket); ++ UNLOCK_AR6K(pDev); ++} ++ ++HTC_PACKET *AR6KAllocIOPacket(AR6K_DEVICE *pDev) ++{ ++ HTC_PACKET *pPacket; ++ ++ LOCK_AR6K(pDev); ++ pPacket = HTC_PACKET_DEQUEUE(&pDev->RegisterIOList); ++ UNLOCK_AR6K(pDev); ++ ++ return pPacket; ++} ++ ++A_STATUS DevSetup(AR6K_DEVICE *pDev) ++{ ++ A_UINT32 mailboxaddrs[AR6K_MAILBOXES]; ++ A_UINT32 blocksizes[AR6K_MAILBOXES]; ++ A_STATUS status = A_OK; ++ int i; ++ ++ AR_DEBUG_ASSERT(AR6K_IRQ_PROC_REGS_SIZE == 16); ++ AR_DEBUG_ASSERT(AR6K_IRQ_ENABLE_REGS_SIZE == 4); ++ ++ do { ++ /* give a handle to HIF for this target */ ++ HIFSetHandle(pDev->HIFDevice, (void *)pDev); ++ /* initialize our free list of IO packets */ ++ INIT_HTC_PACKET_QUEUE(&pDev->RegisterIOList); ++ A_MUTEX_INIT(&pDev->Lock); ++ ++ /* get the addresses for all 4 mailboxes */ ++ status = HIFConfigureDevice(pDev->HIFDevice, HIF_DEVICE_GET_MBOX_ADDR, ++ mailboxaddrs, sizeof(mailboxaddrs)); ++ ++ if (status != A_OK) { ++ AR_DEBUG_ASSERT(FALSE); ++ break; ++ } ++ ++ /* carve up register I/O packets (these are for ASYNC register I/O ) */ ++ for (i = 0; i < AR6K_MAX_REG_IO_BUFFERS; i++) { ++ HTC_PACKET *pIOPacket; ++ pIOPacket = &pDev->RegIOBuffers[i].HtcPacket; ++ SET_HTC_PACKET_INFO_RX_REFILL(pIOPacket, ++ pDev, ++ pDev->RegIOBuffers[i].Buffer, ++ AR6K_REG_IO_BUFFER_SIZE, ++ 0); /* don't care */ ++ AR6KFreeIOPacket(pDev,pIOPacket); ++ } ++ ++ /* get the address of the mailbox we are using */ ++ pDev->MailboxAddress = mailboxaddrs[HTC_MAILBOX]; ++ ++ /* get the block sizes */ ++ status = HIFConfigureDevice(pDev->HIFDevice, HIF_DEVICE_GET_MBOX_BLOCK_SIZE, ++ blocksizes, sizeof(blocksizes)); ++ ++ if (status != A_OK) { ++ AR_DEBUG_ASSERT(FALSE); ++ break; ++ } ++ ++ /* note: we actually get the block size of a mailbox other than 0, for SDIO the block ++ * size on mailbox 0 is artificially set to 1. So we use the block size that is set ++ * for the other 3 mailboxes */ ++ pDev->BlockSize = blocksizes[MAILBOX_FOR_BLOCK_SIZE]; ++ /* must be a power of 2 */ ++ AR_DEBUG_ASSERT((pDev->BlockSize & (pDev->BlockSize - 1)) == 0); ++ ++ /* assemble mask, used for padding to a block */ ++ pDev->BlockMask = pDev->BlockSize - 1; ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC,("BlockSize: %d, MailboxAddress:0x%X \n", ++ pDev->BlockSize, pDev->MailboxAddress)); ++ ++ pDev->GetPendingEventsFunc = NULL; ++ /* see if the HIF layer implements the get pending events function */ ++ HIFConfigureDevice(pDev->HIFDevice, ++ HIF_DEVICE_GET_PENDING_EVENTS_FUNC, ++ &pDev->GetPendingEventsFunc, ++ sizeof(pDev->GetPendingEventsFunc)); ++ ++ /* assume we can process HIF interrupt events asynchronously */ ++ pDev->HifIRQProcessingMode = HIF_DEVICE_IRQ_ASYNC_SYNC; ++ ++ /* see if the HIF layer overrides this assumption */ ++ HIFConfigureDevice(pDev->HIFDevice, ++ HIF_DEVICE_GET_IRQ_PROC_MODE, ++ &pDev->HifIRQProcessingMode, ++ sizeof(pDev->HifIRQProcessingMode)); ++ ++ switch (pDev->HifIRQProcessingMode) { ++ case HIF_DEVICE_IRQ_SYNC_ONLY: ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC,("HIF Interrupt processing is SYNC ONLY\n")); ++ break; ++ case HIF_DEVICE_IRQ_ASYNC_SYNC: ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC,("HIF Interrupt processing is ASYNC and SYNC\n")); ++ break; ++ default: ++ AR_DEBUG_ASSERT(FALSE); ++ } ++ ++ pDev->HifMaskUmaskRecvEvent = NULL; ++ ++ /* see if the HIF layer implements the mask/unmask recv events function */ ++ HIFConfigureDevice(pDev->HIFDevice, ++ HIF_DEVICE_GET_RECV_EVENT_MASK_UNMASK_FUNC, ++ &pDev->HifMaskUmaskRecvEvent, ++ sizeof(pDev->HifMaskUmaskRecvEvent)); ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC,("HIF special overrides : 0x%X , 0x%X\n", ++ (A_UINT32)pDev->GetPendingEventsFunc, (A_UINT32)pDev->HifMaskUmaskRecvEvent)); ++ ++ status = DevDisableInterrupts(pDev); ++ ++ } while (FALSE); ++ ++ if (A_FAILED(status)) { ++ /* make sure handle is cleared */ ++ HIFSetHandle(pDev->HIFDevice, NULL); ++ } ++ ++ return status; ++ ++} ++ ++static A_STATUS DevEnableInterrupts(AR6K_DEVICE *pDev) ++{ ++ A_STATUS status; ++ AR6K_IRQ_ENABLE_REGISTERS regs; ++ ++ LOCK_AR6K(pDev); ++ ++ /* Enable all the interrupts except for the dragon interrupt */ ++ pDev->IrqEnableRegisters.int_status_enable = INT_STATUS_ENABLE_ERROR_SET(0x01) | ++ INT_STATUS_ENABLE_CPU_SET(0x01) | ++ INT_STATUS_ENABLE_COUNTER_SET(0x01); ++ ++ if (NULL == pDev->GetPendingEventsFunc) { ++ pDev->IrqEnableRegisters.int_status_enable |= INT_STATUS_ENABLE_MBOX_DATA_SET(0x01); ++ } else { ++ /* The HIF layer provided us with a pending events function which means that ++ * the detection of pending mbox messages is handled in the HIF layer. ++ * This is the case for the SPI2 interface. ++ * In the normal case we enable MBOX interrupts, for the case ++ * with HIFs that offer this mechanism, we keep these interrupts ++ * masked */ ++ pDev->IrqEnableRegisters.int_status_enable &= ~INT_STATUS_ENABLE_MBOX_DATA_SET(0x01); ++ } ++ ++ ++ /* Set up the CPU Interrupt Status Register */ ++ pDev->IrqEnableRegisters.cpu_int_status_enable = CPU_INT_STATUS_ENABLE_BIT_SET(0x00); ++ ++ /* Set up the Error Interrupt Status Register */ ++ pDev->IrqEnableRegisters.error_status_enable = ++ ERROR_STATUS_ENABLE_RX_UNDERFLOW_SET(0x01) | ++ ERROR_STATUS_ENABLE_TX_OVERFLOW_SET(0x01); ++ ++ /* Set up the Counter Interrupt Status Register (only for debug interrupt to catch fatal errors) */ ++ pDev->IrqEnableRegisters.counter_int_status_enable = ++ COUNTER_INT_STATUS_ENABLE_BIT_SET(AR6K_TARGET_DEBUG_INTR_MASK); ++ ++ /* copy into our temp area */ ++ A_MEMCPY(®s,&pDev->IrqEnableRegisters,AR6K_IRQ_ENABLE_REGS_SIZE); ++ ++ UNLOCK_AR6K(pDev); ++ ++ /* always synchronous */ ++ status = HIFReadWrite(pDev->HIFDevice, ++ INT_STATUS_ENABLE_ADDRESS, ++ ®s.int_status_enable, ++ AR6K_IRQ_ENABLE_REGS_SIZE, ++ HIF_WR_SYNC_BYTE_INC, ++ NULL); ++ ++ if (status != A_OK) { ++ /* Can't write it for some reason */ ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ++ ("Failed to update interrupt control registers err: %d\n", status)); ++ ++ } ++ ++ return status; ++} ++ ++static A_STATUS DevDisableInterrupts(AR6K_DEVICE *pDev) ++{ ++ AR6K_IRQ_ENABLE_REGISTERS regs; ++ ++ LOCK_AR6K(pDev); ++ /* Disable all interrupts */ ++ pDev->IrqEnableRegisters.int_status_enable = 0; ++ pDev->IrqEnableRegisters.cpu_int_status_enable = 0; ++ pDev->IrqEnableRegisters.error_status_enable = 0; ++ pDev->IrqEnableRegisters.counter_int_status_enable = 0; ++ /* copy into our temp area */ ++ A_MEMCPY(®s,&pDev->IrqEnableRegisters,AR6K_IRQ_ENABLE_REGS_SIZE); ++ ++ UNLOCK_AR6K(pDev); ++ ++ /* always synchronous */ ++ return HIFReadWrite(pDev->HIFDevice, ++ INT_STATUS_ENABLE_ADDRESS, ++ ®s.int_status_enable, ++ AR6K_IRQ_ENABLE_REGS_SIZE, ++ HIF_WR_SYNC_BYTE_INC, ++ NULL); ++} ++ ++/* enable device interrupts */ ++A_STATUS DevUnmaskInterrupts(AR6K_DEVICE *pDev) ++{ ++ /* Unmask the host controller interrupts */ ++ HIFUnMaskInterrupt(pDev->HIFDevice); ++ ++ return DevEnableInterrupts(pDev); ++} ++ ++/* disable all device interrupts */ ++A_STATUS DevMaskInterrupts(AR6K_DEVICE *pDev) ++{ ++ A_STATUS status; ++ ++ status = DevDisableInterrupts(pDev); ++ ++ if (A_SUCCESS(status)) { ++ /* Disable the interrupt at the HIF layer */ ++ HIFMaskInterrupt(pDev->HIFDevice); ++ } ++ ++ return status; ++} ++ ++/* callback when our fetch to enable/disable completes */ ++static void DevDoEnableDisableRecvAsyncHandler(void *Context, HTC_PACKET *pPacket) ++{ ++ AR6K_DEVICE *pDev = (AR6K_DEVICE *)Context; ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("+DevDoEnableDisableRecvAsyncHandler: (dev: 0x%X)\n", (A_UINT32)pDev)); ++ ++ if (A_FAILED(pPacket->Status)) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ++ (" Failed to disable receiver, status:%d \n", pPacket->Status)); ++ } ++ /* free this IO packet */ ++ AR6KFreeIOPacket(pDev,pPacket); ++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("-DevDoEnableDisableRecvAsyncHandler \n")); ++} ++ ++/* disable packet reception (used in case the host runs out of buffers) ++ * this is the "override" method when the HIF reports another methods to ++ * disable recv events */ ++static A_STATUS DevDoEnableDisableRecvOverride(AR6K_DEVICE *pDev, A_BOOL EnableRecv, A_BOOL AsyncMode) ++{ ++ A_STATUS status = A_OK; ++ HTC_PACKET *pIOPacket = NULL; ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC,("DevDoEnableDisableRecvOverride: Enable:%d Mode:%d\n", ++ EnableRecv,AsyncMode)); ++ ++ do { ++ ++ if (AsyncMode) { ++ ++ pIOPacket = AR6KAllocIOPacket(pDev); ++ ++ if (NULL == pIOPacket) { ++ status = A_NO_MEMORY; ++ AR_DEBUG_ASSERT(FALSE); ++ break; ++ } ++ ++ /* stick in our completion routine when the I/O operation completes */ ++ pIOPacket->Completion = DevDoEnableDisableRecvAsyncHandler; ++ pIOPacket->pContext = pDev; ++ ++ /* call the HIF layer override and do this asynchronously */ ++ status = pDev->HifMaskUmaskRecvEvent(pDev->HIFDevice, ++ EnableRecv ? HIF_UNMASK_RECV : HIF_MASK_RECV, ++ pIOPacket); ++ break; ++ } ++ ++ /* if we get here we are doing it synchronously */ ++ status = pDev->HifMaskUmaskRecvEvent(pDev->HIFDevice, ++ EnableRecv ? HIF_UNMASK_RECV : HIF_MASK_RECV, ++ NULL); ++ ++ } while (FALSE); ++ ++ if (A_FAILED(status) && (pIOPacket != NULL)) { ++ AR6KFreeIOPacket(pDev,pIOPacket); ++ } ++ ++ return status; ++} ++ ++/* disable packet reception (used in case the host runs out of buffers) ++ * this is the "normal" method using the interrupt enable registers through ++ * the host I/F */ ++static A_STATUS DevDoEnableDisableRecvNormal(AR6K_DEVICE *pDev, A_BOOL EnableRecv, A_BOOL AsyncMode) ++{ ++ A_STATUS status = A_OK; ++ HTC_PACKET *pIOPacket = NULL; ++ AR6K_IRQ_ENABLE_REGISTERS regs; ++ ++ /* take the lock to protect interrupt enable shadows */ ++ LOCK_AR6K(pDev); ++ ++ if (EnableRecv) { ++ pDev->IrqEnableRegisters.int_status_enable |= INT_STATUS_ENABLE_MBOX_DATA_SET(0x01); ++ } else { ++ pDev->IrqEnableRegisters.int_status_enable &= ~INT_STATUS_ENABLE_MBOX_DATA_SET(0x01); ++ } ++ ++ /* copy into our temp area */ ++ A_MEMCPY(®s,&pDev->IrqEnableRegisters,AR6K_IRQ_ENABLE_REGS_SIZE); ++ UNLOCK_AR6K(pDev); ++ ++ do { ++ ++ if (AsyncMode) { ++ ++ pIOPacket = AR6KAllocIOPacket(pDev); ++ ++ if (NULL == pIOPacket) { ++ status = A_NO_MEMORY; ++ AR_DEBUG_ASSERT(FALSE); ++ break; ++ } ++ ++ /* copy values to write to our async I/O buffer */ ++ A_MEMCPY(pIOPacket->pBuffer,®s,AR6K_IRQ_ENABLE_REGS_SIZE); ++ ++ /* stick in our completion routine when the I/O operation completes */ ++ pIOPacket->Completion = DevDoEnableDisableRecvAsyncHandler; ++ pIOPacket->pContext = pDev; ++ ++ /* write it out asynchronously */ ++ HIFReadWrite(pDev->HIFDevice, ++ INT_STATUS_ENABLE_ADDRESS, ++ pIOPacket->pBuffer, ++ AR6K_IRQ_ENABLE_REGS_SIZE, ++ HIF_WR_ASYNC_BYTE_INC, ++ pIOPacket); ++ break; ++ } ++ ++ /* if we get here we are doing it synchronously */ ++ ++ status = HIFReadWrite(pDev->HIFDevice, ++ INT_STATUS_ENABLE_ADDRESS, ++ ®s.int_status_enable, ++ AR6K_IRQ_ENABLE_REGS_SIZE, ++ HIF_WR_SYNC_BYTE_INC, ++ NULL); ++ ++ } while (FALSE); ++ ++ if (A_FAILED(status) && (pIOPacket != NULL)) { ++ AR6KFreeIOPacket(pDev,pIOPacket); ++ } ++ ++ return status; ++} ++ ++ ++A_STATUS DevStopRecv(AR6K_DEVICE *pDev, A_BOOL AsyncMode) ++{ ++ if (NULL == pDev->HifMaskUmaskRecvEvent) { ++ return DevDoEnableDisableRecvNormal(pDev,FALSE,AsyncMode); ++ } else { ++ return DevDoEnableDisableRecvOverride(pDev,FALSE,AsyncMode); ++ } ++} ++ ++A_STATUS DevEnableRecv(AR6K_DEVICE *pDev, A_BOOL AsyncMode) ++{ ++ if (NULL == pDev->HifMaskUmaskRecvEvent) { ++ return DevDoEnableDisableRecvNormal(pDev,TRUE,AsyncMode); ++ } else { ++ return DevDoEnableDisableRecvOverride(pDev,TRUE,AsyncMode); ++ } ++} ++ ++void DevDumpRegisters(AR6K_IRQ_PROC_REGISTERS *pIrqProcRegs, ++ AR6K_IRQ_ENABLE_REGISTERS *pIrqEnableRegs) ++{ ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_DUMP, ("\n<------- Register Table -------->\n")); ++ ++ if (pIrqProcRegs != NULL) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_DUMP, ++ ("Int Status: 0x%x\n",pIrqProcRegs->host_int_status)); ++ AR_DEBUG_PRINTF(ATH_DEBUG_DUMP, ++ ("CPU Int Status: 0x%x\n",pIrqProcRegs->cpu_int_status)); ++ AR_DEBUG_PRINTF(ATH_DEBUG_DUMP, ++ ("Error Int Status: 0x%x\n",pIrqProcRegs->error_int_status)); ++ AR_DEBUG_PRINTF(ATH_DEBUG_DUMP, ++ ("Counter Int Status: 0x%x\n",pIrqProcRegs->counter_int_status)); ++ AR_DEBUG_PRINTF(ATH_DEBUG_DUMP, ++ ("Mbox Frame: 0x%x\n",pIrqProcRegs->mbox_frame)); ++ AR_DEBUG_PRINTF(ATH_DEBUG_DUMP, ++ ("Rx Lookahead Valid: 0x%x\n",pIrqProcRegs->rx_lookahead_valid)); ++ AR_DEBUG_PRINTF(ATH_DEBUG_DUMP, ++ ("Rx Lookahead 0: 0x%x\n",pIrqProcRegs->rx_lookahead[0])); ++ AR_DEBUG_PRINTF(ATH_DEBUG_DUMP, ++ ("Rx Lookahead 1: 0x%x\n",pIrqProcRegs->rx_lookahead[1])); ++ } ++ ++ if (pIrqEnableRegs != NULL) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_DUMP, ++ ("Int Status Enable: 0x%x\n",pIrqEnableRegs->int_status_enable)); ++ AR_DEBUG_PRINTF(ATH_DEBUG_DUMP, ++ ("Counter Int Status Enable: 0x%x\n",pIrqEnableRegs->counter_int_status_enable)); ++ AR_DEBUG_PRINTF(ATH_DEBUG_DUMP, ("<------------------------------->\n")); ++ } ++} ++ ++ ++#ifdef MBOXHW_UNIT_TEST ++ ++ ++/* This is a mailbox hardware unit test that must be called in a schedulable context ++ * This test is very simple, it will send a list of buffers with a counting pattern ++ * and the target will invert the data and send the message back ++ * ++ * the unit test has the following constraints: ++ * ++ * The target has at least 8 buffers of 256 bytes each. The host will send ++ * the following pattern of buffers in rapid succession : ++ * ++ * 1 buffer - 128 bytes ++ * 1 buffer - 256 bytes ++ * 1 buffer - 512 bytes ++ * 1 buffer - 1024 bytes ++ * ++ * The host will send the buffers to one mailbox and wait for buffers to be reflected ++ * back from the same mailbox. The target sends the buffers FIFO order. ++ * Once the final buffer has been received for a mailbox, the next mailbox is tested. ++ * ++ * ++ * Note: To simplifythe test , we assume that the chosen buffer sizes ++ * will fall on a nice block pad ++ * ++ * It is expected that higher-order tests will be written to stress the mailboxes using ++ * a message-based protocol (with some performance timming) that can create more ++ * randomness in the packets sent over mailboxes. ++ * ++ * */ ++ ++#define A_ROUND_UP_PWR2(x, align) (((int) (x) + ((align)-1)) & ~((align)-1)) ++ ++#define BUFFER_BLOCK_PAD 128 ++ ++#if 0 ++#define BUFFER1 128 ++#define BUFFER2 256 ++#define BUFFER3 512 ++#define BUFFER4 1024 ++#endif ++ ++#if 1 ++#define BUFFER1 80 ++#define BUFFER2 200 ++#define BUFFER3 444 ++#define BUFFER4 800 ++#endif ++ ++#define TOTAL_BYTES (A_ROUND_UP_PWR2(BUFFER1,BUFFER_BLOCK_PAD) + \ ++ A_ROUND_UP_PWR2(BUFFER2,BUFFER_BLOCK_PAD) + \ ++ A_ROUND_UP_PWR2(BUFFER3,BUFFER_BLOCK_PAD) + \ ++ A_ROUND_UP_PWR2(BUFFER4,BUFFER_BLOCK_PAD) ) ++ ++#define TEST_BYTES (BUFFER1 + BUFFER2 + BUFFER3 + BUFFER4) ++ ++#define TEST_CREDITS_RECV_TIMEOUT 100 ++ ++static A_UINT8 g_Buffer[TOTAL_BYTES]; ++static A_UINT32 g_MailboxAddrs[AR6K_MAILBOXES]; ++static A_UINT32 g_BlockSizes[AR6K_MAILBOXES]; ++ ++#define BUFFER_PROC_LIST_DEPTH 4 ++ ++typedef struct _BUFFER_PROC_LIST{ ++ A_UINT8 *pBuffer; ++ A_UINT32 length; ++}BUFFER_PROC_LIST; ++ ++ ++#define PUSH_BUFF_PROC_ENTRY(pList,len,pCurrpos) \ ++{ \ ++ (pList)->pBuffer = (pCurrpos); \ ++ (pList)->length = (len); \ ++ (pCurrpos) += (len); \ ++ (pList)++; \ ++} ++ ++/* a simple and crude way to send different "message" sizes */ ++static void AssembleBufferList(BUFFER_PROC_LIST *pList) ++{ ++ A_UINT8 *pBuffer = g_Buffer; ++ ++#if BUFFER_PROC_LIST_DEPTH < 4 ++#error "Buffer processing list depth is not deep enough!!" ++#endif ++ ++ PUSH_BUFF_PROC_ENTRY(pList,BUFFER1,pBuffer); ++ PUSH_BUFF_PROC_ENTRY(pList,BUFFER2,pBuffer); ++ PUSH_BUFF_PROC_ENTRY(pList,BUFFER3,pBuffer); ++ PUSH_BUFF_PROC_ENTRY(pList,BUFFER4,pBuffer); ++ ++} ++ ++#define FILL_ZERO TRUE ++#define FILL_COUNTING FALSE ++static void InitBuffers(A_BOOL Zero) ++{ ++ A_UINT16 *pBuffer16 = (A_UINT16 *)g_Buffer; ++ int i; ++ ++ /* fill buffer with 16 bit counting pattern or zeros */ ++ for (i = 0; i < (TOTAL_BYTES / 2) ; i++) { ++ if (!Zero) { ++ pBuffer16[i] = (A_UINT16)i; ++ } else { ++ pBuffer16[i] = 0; ++ } ++ } ++} ++ ++ ++static A_BOOL CheckOneBuffer(A_UINT16 *pBuffer16, int Length) ++{ ++ int i; ++ A_UINT16 startCount; ++ A_BOOL success = TRUE; ++ ++ /* get the starting count */ ++ startCount = pBuffer16[0]; ++ /* invert it, this is the expected value */ ++ startCount = ~startCount; ++ /* scan the buffer and verify */ ++ for (i = 0; i < (Length / 2) ; i++,startCount++) { ++ /* target will invert all the data */ ++ if ((A_UINT16)pBuffer16[i] != (A_UINT16)~startCount) { ++ success = FALSE; ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Invalid Data Got:0x%X, Expecting:0x%X (offset:%d, total:%d) \n", ++ pBuffer16[i], ((A_UINT16)~startCount), i, Length)); ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("0x%X 0x%X 0x%X 0x%X \n", ++ pBuffer16[i], pBuffer16[i + 1], pBuffer16[i + 2],pBuffer16[i+3])); ++ break; ++ } ++ } ++ ++ return success; ++} ++ ++static A_BOOL CheckBuffers(void) ++{ ++ int i; ++ A_BOOL success = TRUE; ++ BUFFER_PROC_LIST checkList[BUFFER_PROC_LIST_DEPTH]; ++ ++ /* assemble the list */ ++ AssembleBufferList(checkList); ++ ++ /* scan the buffers and verify */ ++ for (i = 0; i < BUFFER_PROC_LIST_DEPTH ; i++) { ++ success = CheckOneBuffer((A_UINT16 *)checkList[i].pBuffer, checkList[i].length); ++ if (!success) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Buffer : 0x%X, Length:%d failed verify \n", ++ (A_UINT32)checkList[i].pBuffer, checkList[i].length)); ++ break; ++ } ++ } ++ ++ return success; ++} ++ ++ /* find the end marker for the last buffer we will be sending */ ++static A_UINT16 GetEndMarker(void) ++{ ++ A_UINT8 *pBuffer; ++ BUFFER_PROC_LIST checkList[BUFFER_PROC_LIST_DEPTH]; ++ ++ /* fill up buffers with the normal counting pattern */ ++ InitBuffers(FILL_COUNTING); ++ ++ /* assemble the list we will be sending down */ ++ AssembleBufferList(checkList); ++ /* point to the last 2 bytes of the last buffer */ ++ pBuffer = &(checkList[BUFFER_PROC_LIST_DEPTH - 1].pBuffer[(checkList[BUFFER_PROC_LIST_DEPTH - 1].length) - 2]); ++ ++ /* the last count in the last buffer is the marker */ ++ return (A_UINT16)pBuffer[0] | ((A_UINT16)pBuffer[1] << 8); ++} ++ ++#define ATH_PRINT_OUT_ZONE ATH_DEBUG_ERR ++ ++/* send the ordered buffers to the target */ ++static A_STATUS SendBuffers(AR6K_DEVICE *pDev, int mbox) ++{ ++ A_STATUS status = A_OK; ++ A_UINT32 request = HIF_WR_SYNC_BLOCK_INC; ++ BUFFER_PROC_LIST sendList[BUFFER_PROC_LIST_DEPTH]; ++ int i; ++ int totalBytes = 0; ++ int paddedLength; ++ int totalwPadding = 0; ++ ++ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("Sending buffers on mailbox : %d \n",mbox)); ++ ++ /* fill buffer with counting pattern */ ++ InitBuffers(FILL_COUNTING); ++ ++ /* assemble the order in which we send */ ++ AssembleBufferList(sendList); ++ ++ for (i = 0; i < BUFFER_PROC_LIST_DEPTH; i++) { ++ ++ /* we are doing block transfers, so we need to pad everything to a block size */ ++ paddedLength = (sendList[i].length + (g_BlockSizes[mbox] - 1)) & ++ (~(g_BlockSizes[mbox] - 1)); ++ ++ /* send each buffer synchronously */ ++ status = HIFReadWrite(pDev->HIFDevice, ++ g_MailboxAddrs[mbox], ++ sendList[i].pBuffer, ++ paddedLength, ++ request, ++ NULL); ++ if (status != A_OK) { ++ break; ++ } ++ totalBytes += sendList[i].length; ++ totalwPadding += paddedLength; ++ } ++ ++ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("Sent %d bytes (%d padded bytes) to mailbox : %d \n",totalBytes,totalwPadding,mbox)); ++ ++ return status; ++} ++ ++/* poll the mailbox credit counter until we get a credit or timeout */ ++static A_STATUS GetCredits(AR6K_DEVICE *pDev, int mbox, int *pCredits) ++{ ++ A_STATUS status = A_OK; ++ int timeout = TEST_CREDITS_RECV_TIMEOUT; ++ A_UINT8 credits = 0; ++ A_UINT32 address; ++ ++ while (TRUE) { ++ ++ /* Read the counter register to get credits, this auto-decrements */ ++ address = COUNT_DEC_ADDRESS + (AR6K_MAILBOXES + mbox) * 4; ++ status = HIFReadWrite(pDev->HIFDevice, address, &credits, sizeof(credits), ++ HIF_RD_SYNC_BYTE_FIX, NULL); ++ if (status != A_OK) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ++ ("Unable to decrement the command credit count register (mbox=%d)\n",mbox)); ++ status = A_ERROR; ++ break; ++ } ++ ++ if (credits) { ++ break; ++ } ++ ++ timeout--; ++ ++ if (timeout <= 0) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ++ (" Timeout reading credit registers (mbox=%d, address:0x%X) \n",mbox,address)); ++ status = A_ERROR; ++ break; ++ } ++ ++ /* delay a little, target may not be ready */ ++ A_MDELAY(1000); ++ ++ } ++ ++ if (status == A_OK) { ++ *pCredits = credits; ++ } ++ ++ return status; ++} ++ ++ ++/* wait for the buffers to come back */ ++static A_STATUS RecvBuffers(AR6K_DEVICE *pDev, int mbox) ++{ ++ A_STATUS status = A_OK; ++ A_UINT32 request = HIF_RD_SYNC_BLOCK_INC; ++ BUFFER_PROC_LIST recvList[BUFFER_PROC_LIST_DEPTH]; ++ int curBuffer; ++ int credits; ++ int i; ++ int totalBytes = 0; ++ int paddedLength; ++ int totalwPadding = 0; ++ ++ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("Waiting for buffers on mailbox : %d \n",mbox)); ++ ++ /* zero the buffers */ ++ InitBuffers(FILL_ZERO); ++ ++ /* assemble the order in which we should receive */ ++ AssembleBufferList(recvList); ++ ++ curBuffer = 0; ++ ++ while (curBuffer < BUFFER_PROC_LIST_DEPTH) { ++ ++ /* get number of buffers that have been completed, this blocks ++ * until we get at least 1 credit or it times out */ ++ status = GetCredits(pDev, mbox, &credits); ++ ++ if (status != A_OK) { ++ break; ++ } ++ ++ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("Got %d messages on mailbox : %d \n",credits, mbox)); ++ ++ /* get all the buffers that are sitting on the queue */ ++ for (i = 0; i < credits; i++) { ++ AR_DEBUG_ASSERT(curBuffer < BUFFER_PROC_LIST_DEPTH); ++ /* recv the current buffer synchronously, the buffers should come back in ++ * order... with padding applied by the target */ ++ paddedLength = (recvList[curBuffer].length + (g_BlockSizes[mbox] - 1)) & ++ (~(g_BlockSizes[mbox] - 1)); ++ ++ status = HIFReadWrite(pDev->HIFDevice, ++ g_MailboxAddrs[mbox], ++ recvList[curBuffer].pBuffer, ++ paddedLength, ++ request, ++ NULL); ++ if (status != A_OK) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Failed to read %d bytes on mailbox:%d : address:0x%X \n", ++ recvList[curBuffer].length, mbox, g_MailboxAddrs[mbox])); ++ break; ++ } ++ ++ totalwPadding += paddedLength; ++ totalBytes += recvList[curBuffer].length; ++ curBuffer++; ++ } ++ ++ if (status != A_OK) { ++ break; ++ } ++ /* go back and get some more */ ++ credits = 0; ++ } ++ ++ if (totalBytes != TEST_BYTES) { ++ AR_DEBUG_ASSERT(FALSE); ++ } else { ++ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("Got all buffers on mbox:%d total recv :%d (w/Padding : %d) \n", ++ mbox, totalBytes, totalwPadding)); ++ } ++ ++ return status; ++ ++ ++} ++ ++static A_STATUS DoOneMboxHWTest(AR6K_DEVICE *pDev, int mbox) ++{ ++ A_STATUS status; ++ ++ do { ++ /* send out buffers */ ++ status = SendBuffers(pDev,mbox); ++ ++ if (status != A_OK) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Sending buffers Failed : %d mbox:%d\n",status,mbox)); ++ break; ++ } ++ ++ /* go get them, this will block */ ++ status = RecvBuffers(pDev, mbox); ++ ++ if (status != A_OK) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Recv buffers Failed : %d mbox:%d\n",status,mbox)); ++ break; ++ } ++ ++ /* check the returned data patterns */ ++ if (!CheckBuffers()) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Buffer Verify Failed : mbox:%d\n",mbox)); ++ status = A_ERROR; ++ break; ++ } ++ ++ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, (" Send/Recv success! mailbox : %d \n",mbox)); ++ ++ } while (FALSE); ++ ++ return status; ++} ++ ++/* here is where the test starts */ ++A_STATUS DoMboxHWTest(AR6K_DEVICE *pDev) ++{ ++ int i; ++ A_STATUS status; ++ int credits = 0; ++ A_UINT8 params[4]; ++ int numBufs; ++ int bufferSize; ++ A_UINT16 temp; ++ ++ ++ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, (" DoMboxHWTest START - \n")); ++ ++ do { ++ /* get the addresses for all 4 mailboxes */ ++ status = HIFConfigureDevice(pDev->HIFDevice, HIF_DEVICE_GET_MBOX_ADDR, ++ g_MailboxAddrs, sizeof(g_MailboxAddrs)); ++ ++ if (status != A_OK) { ++ AR_DEBUG_ASSERT(FALSE); ++ break; ++ } ++ ++ /* get the block sizes */ ++ status = HIFConfigureDevice(pDev->HIFDevice, HIF_DEVICE_GET_MBOX_BLOCK_SIZE, ++ g_BlockSizes, sizeof(g_BlockSizes)); ++ ++ if (status != A_OK) { ++ AR_DEBUG_ASSERT(FALSE); ++ break; ++ } ++ ++ /* note, the HIF layer usually reports mbox 0 to have a block size of ++ * 1, but our test wants to run in block-mode for all mailboxes, so we treat all mailboxes ++ * the same. */ ++ g_BlockSizes[0] = g_BlockSizes[1]; ++ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("Block Size to use: %d \n",g_BlockSizes[0])); ++ ++ if (g_BlockSizes[1] > BUFFER_BLOCK_PAD) { ++ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("%d Block size is too large for buffer pad %d\n", ++ g_BlockSizes[1], BUFFER_BLOCK_PAD)); ++ break; ++ } ++ ++ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("Waiting for target.... \n")); ++ ++ /* the target lets us know it is ready by giving us 1 credit on ++ * mailbox 0 */ ++ status = GetCredits(pDev, 0, &credits); ++ ++ if (status != A_OK) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Failed to wait for target ready \n")); ++ break; ++ } ++ ++ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("Target is ready ...\n")); ++ ++ /* read the first 4 scratch registers */ ++ status = HIFReadWrite(pDev->HIFDevice, ++ SCRATCH_ADDRESS, ++ params, ++ 4, ++ HIF_RD_SYNC_BYTE_INC, ++ NULL); ++ ++ if (status != A_OK) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Failed to wait get parameters \n")); ++ break; ++ } ++ ++ numBufs = params[0]; ++ bufferSize = (int)(((A_UINT16)params[2] << 8) | (A_UINT16)params[1]); ++ ++ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ++ ("Target parameters: bufs per mailbox:%d, buffer size:%d bytes (total space: %d, minimum required space (w/padding): %d) \n", ++ numBufs, bufferSize, (numBufs * bufferSize), TOTAL_BYTES)); ++ ++ if ((numBufs * bufferSize) < TOTAL_BYTES) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Not Enough buffer space to run test! need:%d, got:%d \n", ++ TOTAL_BYTES, (numBufs*bufferSize))); ++ status = A_ERROR; ++ break; ++ } ++ ++ temp = GetEndMarker(); ++ ++ status = HIFReadWrite(pDev->HIFDevice, ++ SCRATCH_ADDRESS + 4, ++ (A_UINT8 *)&temp, ++ 2, ++ HIF_WR_SYNC_BYTE_INC, ++ NULL); ++ ++ if (status != A_OK) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Failed to write end marker \n")); ++ break; ++ } ++ ++ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("End Marker: 0x%X \n",temp)); ++ ++ temp = (A_UINT16)g_BlockSizes[1]; ++ /* convert to a mask */ ++ temp = temp - 1; ++ status = HIFReadWrite(pDev->HIFDevice, ++ SCRATCH_ADDRESS + 6, ++ (A_UINT8 *)&temp, ++ 2, ++ HIF_WR_SYNC_BYTE_INC, ++ NULL); ++ ++ if (status != A_OK) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Failed to write block mask \n")); ++ break; ++ } ++ ++ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("Set Block Mask: 0x%X \n",temp)); ++ ++ /* execute the test on each mailbox */ ++ for (i = 0; i < AR6K_MAILBOXES; i++) { ++ status = DoOneMboxHWTest(pDev, i); ++ if (status != A_OK) { ++ break; ++ } ++ } ++ ++ } while (FALSE); ++ ++ if (status == A_OK) { ++ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, (" DoMboxHWTest DONE - SUCCESS! - \n")); ++ } else { ++ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, (" DoMboxHWTest DONE - FAILED! - \n")); ++ } ++ /* don't let HTC_Start continue, the target is actually not running any HTC code */ ++ return A_ERROR; ++} ++#endif ++ ++ ++ +diff --git a/drivers/sdio/function/wlan/ar6000/htc/ar6k.h b/drivers/sdio/function/wlan/ar6000/htc/ar6k.h +new file mode 100644 +index 0000000..301ab34 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/htc/ar6k.h +@@ -0,0 +1,191 @@ ++/* ++ * ++ * Copyright (c) 2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++#ifndef AR6K_H_ ++#define AR6K_H_ ++ ++#define AR6K_MAILBOXES 4 ++ ++/* HTC runs over mailbox 0 */ ++#define HTC_MAILBOX 0 ++ ++#define AR6K_TARGET_DEBUG_INTR_MASK 0x01 ++ ++#define OTHER_INTS_ENABLED (INT_STATUS_ENABLE_ERROR_MASK | \ ++ INT_STATUS_ENABLE_CPU_MASK | \ ++ INT_STATUS_ENABLE_COUNTER_MASK) ++ ++//#define MBOXHW_UNIT_TEST 1 ++ ++#include "athstartpack.h" ++typedef PREPACK struct _AR6K_IRQ_PROC_REGISTERS { ++ A_UINT8 host_int_status; ++ A_UINT8 cpu_int_status; ++ A_UINT8 error_int_status; ++ A_UINT8 counter_int_status; ++ A_UINT8 mbox_frame; ++ A_UINT8 rx_lookahead_valid; ++ A_UINT8 hole[2]; ++ A_UINT32 rx_lookahead[2]; ++} POSTPACK AR6K_IRQ_PROC_REGISTERS; ++ ++#define AR6K_IRQ_PROC_REGS_SIZE sizeof(AR6K_IRQ_PROC_REGISTERS) ++ ++ ++ ++typedef PREPACK struct _AR6K_IRQ_ENABLE_REGISTERS { ++ A_UINT8 int_status_enable; ++ A_UINT8 cpu_int_status_enable; ++ A_UINT8 error_status_enable; ++ A_UINT8 counter_int_status_enable; ++} POSTPACK AR6K_IRQ_ENABLE_REGISTERS; ++ ++#include "athendpack.h" ++ ++#define AR6K_IRQ_ENABLE_REGS_SIZE sizeof(AR6K_IRQ_ENABLE_REGISTERS) ++ ++#define AR6K_REG_IO_BUFFER_SIZE 32 ++#define AR6K_MAX_REG_IO_BUFFERS 8 ++ ++/* buffers for ASYNC I/O */ ++typedef struct AR6K_ASYNC_REG_IO_BUFFER { ++ HTC_PACKET HtcPacket; /* we use an HTC packet as a wrapper for our async register-based I/O */ ++ A_UINT8 Buffer[AR6K_REG_IO_BUFFER_SIZE]; ++} AR6K_ASYNC_REG_IO_BUFFER; ++ ++typedef struct _AR6K_DEVICE { ++ A_MUTEX_T Lock; ++ AR6K_IRQ_PROC_REGISTERS IrqProcRegisters; ++ AR6K_IRQ_ENABLE_REGISTERS IrqEnableRegisters; ++ void *HIFDevice; ++ A_UINT32 BlockSize; ++ A_UINT32 BlockMask; ++ A_UINT32 MailboxAddress; ++ HIF_PENDING_EVENTS_FUNC GetPendingEventsFunc; ++ void *HTCContext; ++ HTC_PACKET_QUEUE RegisterIOList; ++ AR6K_ASYNC_REG_IO_BUFFER RegIOBuffers[AR6K_MAX_REG_IO_BUFFERS]; ++ void (*TargetFailureCallback)(void *Context); ++ A_STATUS (*MessagePendingCallback)(void *Context, A_UINT32 LookAhead, A_BOOL *pAsyncProc); ++ HIF_DEVICE_IRQ_PROCESSING_MODE HifIRQProcessingMode; ++ HIF_MASK_UNMASK_RECV_EVENT HifMaskUmaskRecvEvent; ++} AR6K_DEVICE; ++ ++#define IS_DEV_IRQ_PROCESSING_ASYNC_ALLOWED(pDev) ((pDev)->HifIRQProcessingMode != HIF_DEVICE_IRQ_SYNC_ONLY) ++ ++A_STATUS DevSetup(AR6K_DEVICE *pDev); ++A_STATUS DevUnmaskInterrupts(AR6K_DEVICE *pDev); ++A_STATUS DevMaskInterrupts(AR6K_DEVICE *pDev); ++A_STATUS DevPollMboxMsgRecv(AR6K_DEVICE *pDev, ++ A_UINT32 *pLookAhead, ++ int TimeoutMS); ++A_STATUS DevRWCompletionHandler(void *context, A_STATUS status); ++A_STATUS DevDsrHandler(void *context); ++A_STATUS DevCheckPendingRecvMsgsAsync(void *context); ++void DevDumpRegisters(AR6K_IRQ_PROC_REGISTERS *pIrqProcRegs, ++ AR6K_IRQ_ENABLE_REGISTERS *pIrqEnableRegs); ++ ++#define DEV_STOP_RECV_ASYNC TRUE ++#define DEV_STOP_RECV_SYNC FALSE ++#define DEV_ENABLE_RECV_ASYNC TRUE ++#define DEV_ENABLE_RECV_SYNC FALSE ++A_STATUS DevStopRecv(AR6K_DEVICE *pDev, A_BOOL ASyncMode); ++A_STATUS DevEnableRecv(AR6K_DEVICE *pDev, A_BOOL ASyncMode); ++ ++static INLINE A_STATUS DevSendPacket(AR6K_DEVICE *pDev, HTC_PACKET *pPacket, A_UINT32 SendLength) { ++ A_UINT32 paddedLength; ++ A_BOOL sync = (pPacket->Completion == NULL) ? TRUE : FALSE; ++ A_STATUS status; ++ ++ /* adjust the length to be a multiple of block size if appropriate */ ++ paddedLength = (SendLength + (pDev->BlockMask)) & ++ (~(pDev->BlockMask)); ++#if 0 // BufferLength may not be set in , fix this... ++ if (paddedLength > pPacket->BufferLength) { ++ AR_DEBUG_ASSERT(FALSE); ++ if (pPacket->Completion != NULL) { ++ COMPLETE_HTC_PACKET(pPacket,A_EINVAL); ++ } ++ return A_EINVAL; ++ } ++#endif ++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND, ++ ("DevSendPacket, Padded Length: %d Mbox:0x%X (mode:%s)\n", ++ paddedLength, ++ pDev->MailboxAddress, ++ sync ? "SYNC" : "ASYNC")); ++ ++ status = HIFReadWrite(pDev->HIFDevice, ++ pDev->MailboxAddress, ++ pPacket->pBuffer, ++ paddedLength, /* the padded length */ ++ sync ? HIF_WR_SYNC_BLOCK_INC : HIF_WR_ASYNC_BLOCK_INC, ++ sync ? NULL : pPacket); /* pass the packet as the context to the HIF request */ ++ ++ if (sync) { ++ pPacket->Status = status; ++ } ++ ++ return status; ++} ++ ++static INLINE A_STATUS DevRecvPacket(AR6K_DEVICE *pDev, HTC_PACKET *pPacket, A_UINT32 RecvLength) { ++ A_UINT32 paddedLength; ++ A_STATUS status; ++ A_BOOL sync = (pPacket->Completion == NULL) ? TRUE : FALSE; ++ ++ /* adjust the length to be a multiple of block size if appropriate */ ++ paddedLength = (RecvLength + (pDev->BlockMask)) & ++ (~(pDev->BlockMask)); ++ if (paddedLength > pPacket->BufferLength) { ++ AR_DEBUG_ASSERT(FALSE); ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ++ ("DevRecvPacket, Not enough space for padlen:%d recvlen:%d bufferlen:%d \n", ++ paddedLength,RecvLength,pPacket->BufferLength)); ++ if (pPacket->Completion != NULL) { ++ COMPLETE_HTC_PACKET(pPacket,A_EINVAL); ++ } ++ return A_EINVAL; ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV, ++ ("DevRecvPacket, Padded Length: %d Mbox:0x%X (mode:%s)\n", ++ paddedLength, ++ pDev->MailboxAddress, ++ sync ? "SYNC" : "ASYNC")); ++ ++ status = HIFReadWrite(pDev->HIFDevice, ++ pDev->MailboxAddress, ++ pPacket->pBuffer, ++ paddedLength, ++ sync ? HIF_RD_SYNC_BLOCK_INC : HIF_RD_ASYNC_BLOCK_INC, ++ sync ? NULL : pPacket); /* pass the packet as the context to the HIF request */ ++ ++ if (sync) { ++ pPacket->Status = status; ++ } ++ ++ return status; ++} ++ ++#ifdef MBOXHW_UNIT_TEST ++A_STATUS DoMboxHWTest(AR6K_DEVICE *pDev); ++#endif ++ ++#endif /*AR6K_H_*/ +diff --git a/drivers/sdio/function/wlan/ar6000/htc/ar6k_events.c b/drivers/sdio/function/wlan/ar6000/htc/ar6k_events.c +new file mode 100644 +index 0000000..fbbcd51 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/htc/ar6k_events.c +@@ -0,0 +1,638 @@ ++/* ++ * AR6K Driver layer event handling (i.e. interrupts, message polling) ++ * ++ * Copyright (c) 2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++#include "a_config.h" ++#include "athdefs.h" ++#include "a_types.h" ++#include "AR6Khwreg.h" ++#include "a_osapi.h" ++#include "a_debug.h" ++#include "hif.h" ++#include "htc_packet.h" ++#include "ar6k.h" ++ ++extern void AR6KFreeIOPacket(AR6K_DEVICE *pDev, HTC_PACKET *pPacket); ++extern HTC_PACKET *AR6KAllocIOPacket(AR6K_DEVICE *pDev); ++ ++static A_STATUS DevServiceDebugInterrupt(AR6K_DEVICE *pDev); ++ ++#define DELAY_PER_INTERVAL_MS 10 /* 10 MS delay per polling interval */ ++ ++/* completion routine for ALL HIF layer async I/O */ ++A_STATUS DevRWCompletionHandler(void *context, A_STATUS status) ++{ ++ HTC_PACKET *pPacket = (HTC_PACKET *)context; ++ ++ COMPLETE_HTC_PACKET(pPacket,status); ++ ++ return A_OK; ++} ++ ++/* mailbox recv message polling */ ++A_STATUS DevPollMboxMsgRecv(AR6K_DEVICE *pDev, ++ A_UINT32 *pLookAhead, ++ int TimeoutMS) ++{ ++ A_STATUS status = A_OK; ++ int timeout = TimeoutMS/DELAY_PER_INTERVAL_MS; ++ ++ AR_DEBUG_ASSERT(timeout > 0); ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV,("+DevPollMboxMsgRecv \n")); ++ ++ while (TRUE) { ++ ++ if (pDev->GetPendingEventsFunc != NULL) ++ { ++ ++ HIF_PENDING_EVENTS_INFO events; ++ ++ /* the HIF layer uses a special mechanism to get events, do this ++ * synchronously */ ++ status = pDev->GetPendingEventsFunc(pDev->HIFDevice, ++ &events, ++ NULL); ++ if (A_FAILED(status)) ++ { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("Failed to get pending events \n")); ++ break; ++ } ++ ++ if (events.Events & HIF_RECV_MSG_AVAIL) ++ { ++ /* there is a message available, the lookahead should be valid now */ ++ *pLookAhead = events.LookAhead; ++ ++ break; ++ } ++ } ++ else ++ { ++ ++ /* this is the standard HIF way.... */ ++ /* load the register table */ ++ status = HIFReadWrite(pDev->HIFDevice, ++ HOST_INT_STATUS_ADDRESS, ++ (A_UINT8 *)&pDev->IrqProcRegisters, ++ AR6K_IRQ_PROC_REGS_SIZE, ++ HIF_RD_SYNC_BYTE_INC, ++ NULL); ++ ++ if (A_FAILED(status)) ++ { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("Failed to read register table \n")); ++ break; ++ } ++ ++ /* check for MBOX data and valid lookahead */ ++ if (pDev->IrqProcRegisters.host_int_status & (1 << HTC_MAILBOX)) ++ { ++ if (pDev->IrqProcRegisters.rx_lookahead_valid & (1 << HTC_MAILBOX)) ++ { ++ /* mailbox has a message and the look ahead is valid */ ++ *pLookAhead = pDev->IrqProcRegisters.rx_lookahead[HTC_MAILBOX]; ++ break; ++ } ++ } ++ ++ } ++ ++ timeout--; ++ ++ if (timeout <= 0) ++ { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, (" Timeout waiting for recv message \n")); ++ status = A_ERROR; ++ ++ /* check if the target asserted */ ++ if ( pDev->IrqProcRegisters.counter_int_status & AR6K_TARGET_DEBUG_INTR_MASK) { ++ /* target signaled an assert, process this pending interrupt ++ * this will call the target failure handler */ ++ DevServiceDebugInterrupt(pDev); ++ } ++ ++ break; ++ } ++ ++ /* delay a little */ ++ A_MDELAY(DELAY_PER_INTERVAL_MS); ++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV,(" Retry Mbox Poll : %d \n",timeout)); ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV,("-DevPollMboxMsgRecv \n")); ++ ++ return status; ++} ++ ++static A_STATUS DevServiceCPUInterrupt(AR6K_DEVICE *pDev) ++{ ++ A_STATUS status; ++ A_UINT8 cpu_int_status; ++ A_UINT8 regBuffer[4]; ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ, ("CPU Interrupt\n")); ++ cpu_int_status = pDev->IrqProcRegisters.cpu_int_status & ++ pDev->IrqEnableRegisters.cpu_int_status_enable; ++ AR_DEBUG_ASSERT(cpu_int_status); ++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ, ++ ("Valid interrupt source(s) in CPU_INT_STATUS: 0x%x\n", ++ cpu_int_status)); ++ ++ /* Clear the interrupt */ ++ pDev->IrqProcRegisters.cpu_int_status &= ~cpu_int_status; /* W1C */ ++ ++ /* set up the register transfer buffer to hit the register 4 times , this is done ++ * to make the access 4-byte aligned to mitigate issues with host bus interconnects that ++ * restrict bus transfer lengths to be a multiple of 4-bytes */ ++ ++ /* set W1C value to clear the interrupt, this hits the register first */ ++ regBuffer[0] = cpu_int_status; ++ /* the remaining 4 values are set to zero which have no-effect */ ++ regBuffer[1] = 0; ++ regBuffer[2] = 0; ++ regBuffer[3] = 0; ++ ++ status = HIFReadWrite(pDev->HIFDevice, ++ CPU_INT_STATUS_ADDRESS, ++ regBuffer, ++ 4, ++ HIF_WR_SYNC_BYTE_FIX, ++ NULL); ++ ++ AR_DEBUG_ASSERT(status == A_OK); ++ return status; ++} ++ ++ ++static A_STATUS DevServiceErrorInterrupt(AR6K_DEVICE *pDev) ++{ ++ A_STATUS status; ++ A_UINT8 error_int_status; ++ A_UINT8 regBuffer[4]; ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ, ("Error Interrupt\n")); ++ error_int_status = pDev->IrqProcRegisters.error_int_status & 0x0F; ++ AR_DEBUG_ASSERT(error_int_status); ++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ, ++ ("Valid interrupt source(s) in ERROR_INT_STATUS: 0x%x\n", ++ error_int_status)); ++ ++ if (ERROR_INT_STATUS_WAKEUP_GET(error_int_status)) { ++ /* Wakeup */ ++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ, ("Error : Wakeup\n")); ++ } ++ ++ if (ERROR_INT_STATUS_RX_UNDERFLOW_GET(error_int_status)) { ++ /* Rx Underflow */ ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Error : Rx Underflow\n")); ++ } ++ ++ if (ERROR_INT_STATUS_TX_OVERFLOW_GET(error_int_status)) { ++ /* Tx Overflow */ ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Error : Tx Overflow\n")); ++ } ++ ++ /* Clear the interrupt */ ++ pDev->IrqProcRegisters.error_int_status &= ~error_int_status; /* W1C */ ++ ++ /* set up the register transfer buffer to hit the register 4 times , this is done ++ * to make the access 4-byte aligned to mitigate issues with host bus interconnects that ++ * restrict bus transfer lengths to be a multiple of 4-bytes */ ++ ++ /* set W1C value to clear the interrupt, this hits the register first */ ++ regBuffer[0] = error_int_status; ++ /* the remaining 4 values are set to zero which have no-effect */ ++ regBuffer[1] = 0; ++ regBuffer[2] = 0; ++ regBuffer[3] = 0; ++ ++ status = HIFReadWrite(pDev->HIFDevice, ++ ERROR_INT_STATUS_ADDRESS, ++ regBuffer, ++ 4, ++ HIF_WR_SYNC_BYTE_FIX, ++ NULL); ++ ++ AR_DEBUG_ASSERT(status == A_OK); ++ return status; ++} ++ ++static A_STATUS DevServiceDebugInterrupt(AR6K_DEVICE *pDev) ++{ ++ A_UINT32 dummy; ++ A_STATUS status; ++ ++ /* Send a target failure event to the application */ ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Target debug interrupt\n")); ++ ++ if (pDev->TargetFailureCallback != NULL) { ++ pDev->TargetFailureCallback(pDev->HTCContext); ++ } ++ ++ /* clear the interrupt , the debug error interrupt is ++ * counter 0 */ ++ /* read counter to clear interrupt */ ++ status = HIFReadWrite(pDev->HIFDevice, ++ COUNT_DEC_ADDRESS, ++ (A_UINT8 *)&dummy, ++ 4, ++ HIF_RD_SYNC_BYTE_INC, ++ NULL); ++ ++ AR_DEBUG_ASSERT(status == A_OK); ++ return status; ++} ++ ++static A_STATUS DevServiceCounterInterrupt(AR6K_DEVICE *pDev) ++{ ++ A_UINT8 counter_int_status; ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ, ("Counter Interrupt\n")); ++ ++ counter_int_status = pDev->IrqProcRegisters.counter_int_status & ++ pDev->IrqEnableRegisters.counter_int_status_enable; ++ ++ AR_DEBUG_ASSERT(counter_int_status); ++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ, ++ ("Valid interrupt source(s) in COUNTER_INT_STATUS: 0x%x\n", ++ counter_int_status)); ++ ++ /* Check if the debug interrupt is pending */ ++ if (counter_int_status & AR6K_TARGET_DEBUG_INTR_MASK) { ++ return DevServiceDebugInterrupt(pDev); ++ } ++ ++ return A_OK; ++} ++ ++/* callback when our fetch to get interrupt status registers completes */ ++static void DevGetEventAsyncHandler(void *Context, HTC_PACKET *pPacket) ++{ ++ AR6K_DEVICE *pDev = (AR6K_DEVICE *)Context; ++ A_UINT32 lookAhead = 0; ++ A_BOOL otherInts = FALSE; ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("+DevGetEventAsyncHandler: (dev: 0x%X)\n", (A_UINT32)pDev)); ++ ++ do { ++ ++ if (A_FAILED(pPacket->Status)) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ++ (" GetEvents I/O request failed, status:%d \n", pPacket->Status)); ++ /* bail out, don't unmask HIF interrupt */ ++ break; ++ } ++ ++ if (pDev->GetPendingEventsFunc != NULL) { ++ /* the HIF layer collected the information for us */ ++ HIF_PENDING_EVENTS_INFO *pEvents = (HIF_PENDING_EVENTS_INFO *)pPacket->pBuffer; ++ if (pEvents->Events & HIF_RECV_MSG_AVAIL) { ++ lookAhead = pEvents->LookAhead; ++ if (0 == lookAhead) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,(" DevGetEventAsyncHandler1, lookAhead is zero! \n")); ++ } ++ } ++ if (pEvents->Events & HIF_OTHER_EVENTS) { ++ otherInts = TRUE; ++ } ++ } else { ++ /* standard interrupt table handling.... */ ++ AR6K_IRQ_PROC_REGISTERS *pReg = (AR6K_IRQ_PROC_REGISTERS *)pPacket->pBuffer; ++ A_UINT8 host_int_status; ++ ++ host_int_status = pReg->host_int_status & pDev->IrqEnableRegisters.int_status_enable; ++ ++ if (host_int_status & (1 << HTC_MAILBOX)) { ++ host_int_status &= ~(1 << HTC_MAILBOX); ++ if (pReg->rx_lookahead_valid & (1 << HTC_MAILBOX)) { ++ /* mailbox has a message and the look ahead is valid */ ++ lookAhead = pReg->rx_lookahead[HTC_MAILBOX]; ++ if (0 == lookAhead) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,(" DevGetEventAsyncHandler2, lookAhead is zero! \n")); ++ } ++ } ++ } ++ ++ if (host_int_status) { ++ /* there are other interrupts to handle */ ++ otherInts = TRUE; ++ } ++ } ++ ++ if (otherInts || (lookAhead == 0)) { ++ /* if there are other interrupts to process, we cannot do this in the async handler so ++ * ack the interrupt which will cause our sync handler to run again ++ * if however there are no more messages, we can now ack the interrupt */ ++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ, ++ (" Acking interrupt from DevGetEventAsyncHandler (otherints:%d, lookahead:0x%X)\n", ++ otherInts, lookAhead)); ++ HIFAckInterrupt(pDev->HIFDevice); ++ } else { ++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ, ++ (" DevGetEventAsyncHandler : detected another message, lookahead :0x%X \n", ++ lookAhead)); ++ /* lookahead is non-zero and there are no other interrupts to service, ++ * go get the next message */ ++ pDev->MessagePendingCallback(pDev->HTCContext, lookAhead, NULL); ++ } ++ ++ } while (FALSE); ++ ++ /* free this IO packet */ ++ AR6KFreeIOPacket(pDev,pPacket); ++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("-DevGetEventAsyncHandler \n")); ++} ++ ++/* called by the HTC layer when it wants us to check if the device has any more pending ++ * recv messages, this starts off a series of async requests to read interrupt registers */ ++A_STATUS DevCheckPendingRecvMsgsAsync(void *context) ++{ ++ AR6K_DEVICE *pDev = (AR6K_DEVICE *)context; ++ A_STATUS status = A_OK; ++ HTC_PACKET *pIOPacket; ++ ++ /* this is called in an ASYNC only context, we may NOT block, sleep or call any apis that can ++ * cause us to switch contexts */ ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("+DevCheckPendingRecvMsgsAsync: (dev: 0x%X)\n", (A_UINT32)pDev)); ++ ++ do { ++ ++ if (HIF_DEVICE_IRQ_SYNC_ONLY == pDev->HifIRQProcessingMode) { ++ /* break the async processing chain right here, no need to continue. ++ * The DevDsrHandler() will handle things in a loop when things are driven ++ * synchronously */ ++ break; ++ } ++ /* first allocate one of our HTC packets we created for async I/O ++ * we reuse HTC packet definitions so that we can use the completion mechanism ++ * in DevRWCompletionHandler() */ ++ pIOPacket = AR6KAllocIOPacket(pDev); ++ ++ if (NULL == pIOPacket) { ++ /* there should be only 1 asynchronous request out at a time to read these registers ++ * so this should actually never happen */ ++ status = A_NO_MEMORY; ++ AR_DEBUG_ASSERT(FALSE); ++ break; ++ } ++ ++ /* stick in our completion routine when the I/O operation completes */ ++ pIOPacket->Completion = DevGetEventAsyncHandler; ++ pIOPacket->pContext = pDev; ++ ++ if (pDev->GetPendingEventsFunc) { ++ /* HIF layer has it's own mechanism, pass the IO to it.. */ ++ status = pDev->GetPendingEventsFunc(pDev->HIFDevice, ++ (HIF_PENDING_EVENTS_INFO *)pIOPacket->pBuffer, ++ pIOPacket); ++ ++ } else { ++ /* standard way, read the interrupt register table asynchronously again */ ++ status = HIFReadWrite(pDev->HIFDevice, ++ HOST_INT_STATUS_ADDRESS, ++ pIOPacket->pBuffer, ++ AR6K_IRQ_PROC_REGS_SIZE, ++ HIF_RD_ASYNC_BYTE_INC, ++ pIOPacket); ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,(" Async IO issued to get interrupt status...\n")); ++ } while (FALSE); ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("-DevCheckPendingRecvMsgsAsync \n")); ++ ++ return status; ++} ++ ++/* process pending interrupts synchronously */ ++static A_STATUS ProcessPendingIRQs(AR6K_DEVICE *pDev, A_BOOL *pDone, A_BOOL *pASyncProcessing) ++{ ++ A_STATUS status = A_OK; ++ A_UINT8 host_int_status = 0; ++ A_UINT32 lookAhead = 0; ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("+ProcessPendingIRQs: (dev: 0x%X)\n", (A_UINT32)pDev)); ++ ++ /*** NOTE: the HIF implementation guarantees that the context of this call allows ++ * us to perform SYNCHRONOUS I/O, that is we can block, sleep or call any API that ++ * can block or switch thread/task ontexts. ++ * This is a fully schedulable context. ++ * */ ++ do { ++ ++ if (pDev->GetPendingEventsFunc != NULL) { ++ HIF_PENDING_EVENTS_INFO events; ++ ++ /* the HIF layer uses a special mechanism to get events ++ * get this synchronously */ ++ status = pDev->GetPendingEventsFunc(pDev->HIFDevice, ++ &events, ++ NULL); ++ ++ if (A_FAILED(status)) { ++ break; ++ } ++ ++ if (events.Events & HIF_RECV_MSG_AVAIL) { ++ lookAhead = events.LookAhead; ++ if (0 == lookAhead) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,(" ProcessPendingIRQs1 lookAhead is zero! \n")); ++ } ++ } ++ ++ if (!(events.Events & HIF_OTHER_EVENTS) || ++ !(pDev->IrqEnableRegisters.int_status_enable & OTHER_INTS_ENABLED)) { ++ /* no need to read the register table, no other interesting interrupts. ++ * Some interfaces (like SPI) can shadow interrupt sources without ++ * requiring the host to do a full table read */ ++ break; ++ } ++ ++ /* otherwise fall through and read the register table */ ++ } ++ ++ /* ++ * Read the first 28 bytes of the HTC register table. This will yield us ++ * the value of different int status registers and the lookahead ++ * registers. ++ * length = sizeof(int_status) + sizeof(cpu_int_status) + ++ * sizeof(error_int_status) + sizeof(counter_int_status) + ++ * sizeof(mbox_frame) + sizeof(rx_lookahead_valid) + ++ * sizeof(hole) + sizeof(rx_lookahead) + ++ * sizeof(int_status_enable) + sizeof(cpu_int_status_enable) + ++ * sizeof(error_status_enable) + ++ * sizeof(counter_int_status_enable); ++ * ++ */ ++ status = HIFReadWrite(pDev->HIFDevice, ++ HOST_INT_STATUS_ADDRESS, ++ (A_UINT8 *)&pDev->IrqProcRegisters, ++ AR6K_IRQ_PROC_REGS_SIZE, ++ HIF_RD_SYNC_BYTE_INC, ++ NULL); ++ ++ if (A_FAILED(status)) { ++ break; ++ } ++ ++ if (AR_DEBUG_LVL_CHECK(ATH_DEBUG_IRQ)) { ++ DevDumpRegisters(&pDev->IrqProcRegisters, ++ &pDev->IrqEnableRegisters); ++ } ++ ++ /* Update only those registers that are enabled */ ++ host_int_status = pDev->IrqProcRegisters.host_int_status & ++ pDev->IrqEnableRegisters.int_status_enable; ++ ++ if (NULL == pDev->GetPendingEventsFunc) { ++ /* only look at mailbox status if the HIF layer did not provide this function, ++ * on some HIF interfaces reading the RX lookahead is not valid to do */ ++ if (host_int_status & (1 << HTC_MAILBOX)) { ++ /* mask out pending mailbox value, we use "lookAhead" as the real flag for ++ * mailbox processing below */ ++ host_int_status &= ~(1 << HTC_MAILBOX); ++ if (pDev->IrqProcRegisters.rx_lookahead_valid & (1 << HTC_MAILBOX)) { ++ /* mailbox has a message and the look ahead is valid */ ++ lookAhead = pDev->IrqProcRegisters.rx_lookahead[HTC_MAILBOX]; ++ if (0 == lookAhead) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,(" ProcessPendingIRQs2, lookAhead is zero! \n")); ++ } ++ } ++ } ++ } else { ++ /* not valid to check if the HIF has another mechanism for reading mailbox pending status*/ ++ host_int_status &= ~(1 << HTC_MAILBOX); ++ } ++ ++ } while (FALSE); ++ ++ ++ do { ++ ++ /* did the interrupt status fetches succeed? */ ++ if (A_FAILED(status)) { ++ break; ++ } ++ ++ if ((0 == host_int_status) && (0 == lookAhead)) { ++ /* nothing to process, the caller can use this to break out of a loop */ ++ *pDone = TRUE; ++ break; ++ } ++ ++ if (lookAhead != 0) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("Pending mailbox message, LookAhead: 0x%X\n",lookAhead)); ++ /* Mailbox Interrupt, the HTC layer may issue async requests to empty the ++ * mailbox... ++ * When emptying the recv mailbox we use the async handler above called from the ++ * completion routine of the callers read request. This can improve performance ++ * by reducing context switching when we rapidly pull packets */ ++ status = pDev->MessagePendingCallback(pDev->HTCContext, lookAhead, pASyncProcessing); ++ if (A_FAILED(status)) { ++ break; ++ } ++ } ++ ++ /* now handle the rest of them */ ++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ, ++ (" Valid interrupt source(s) for OTHER interrupts: 0x%x\n", ++ host_int_status)); ++ ++ if (HOST_INT_STATUS_CPU_GET(host_int_status)) { ++ /* CPU Interrupt */ ++ status = DevServiceCPUInterrupt(pDev); ++ if (A_FAILED(status)){ ++ break; ++ } ++ } ++ ++ if (HOST_INT_STATUS_ERROR_GET(host_int_status)) { ++ /* Error Interrupt */ ++ status = DevServiceErrorInterrupt(pDev); ++ if (A_FAILED(status)){ ++ break; ++ } ++ } ++ ++ if (HOST_INT_STATUS_COUNTER_GET(host_int_status)) { ++ /* Counter Interrupt */ ++ status = DevServiceCounterInterrupt(pDev); ++ if (A_FAILED(status)){ ++ break; ++ } ++ } ++ ++ } while (FALSE); ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("-ProcessPendingIRQs: (done:%d, async:%d) status=%d \n", ++ *pDone, *pASyncProcessing, status)); ++ ++ return status; ++} ++ ++ ++/* Synchronousinterrupt handler, this handler kicks off all interrupt processing.*/ ++A_STATUS DevDsrHandler(void *context) ++{ ++ AR6K_DEVICE *pDev = (AR6K_DEVICE *)context; ++ A_STATUS status = A_OK; ++ A_BOOL done = FALSE; ++ A_BOOL asyncProc = FALSE; ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("+DevDsrHandler: (dev: 0x%X)\n", (A_UINT32)pDev)); ++ ++ ++ while (!done) { ++ status = ProcessPendingIRQs(pDev, &done, &asyncProc); ++ if (A_FAILED(status)) { ++ break; ++ } ++ ++ if (HIF_DEVICE_IRQ_SYNC_ONLY == pDev->HifIRQProcessingMode) { ++ /* the HIF layer does not allow async IRQ processing, override the asyncProc flag */ ++ asyncProc = FALSE; ++ /* this will cause us to re-enter ProcessPendingIRQ() and re-read interrupt status registers. ++ * this has a nice side effect of blocking us until all async read requests are completed. ++ * This behavior is required on some HIF implementations that do not allow ASYNC ++ * processing in interrupt handlers (like Windows CE) */ ++ } ++ ++ if (asyncProc) { ++ /* the function performed some async I/O for performance, we ++ need to exit the ISR immediately, the check below will prevent the interrupt from being ++ Ack'd while we handle it asynchronously */ ++ break; ++ } ++ ++ } ++ ++ if (A_SUCCESS(status) && !asyncProc) { ++ /* Ack the interrupt only if : ++ * 1. we did not get any errors in processing interrupts ++ * 2. there are no outstanding async processing requests */ ++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,(" Acking interrupt from DevDsrHandler \n")); ++ HIFAckInterrupt(pDev->HIFDevice); ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("-DevDsrHandler \n")); ++ return A_OK; ++} ++ ++ +diff --git a/drivers/sdio/function/wlan/ar6000/htc/htc.c b/drivers/sdio/function/wlan/ar6000/htc/htc.c +new file mode 100644 +index 0000000..b5e691b +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/htc/htc.c +@@ -0,0 +1,507 @@ ++/* ++ * ++ * Copyright (c) 2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++#include "htc_internal.h" ++ ++ ++static HTC_INIT_INFO HTCInitInfo = {NULL,NULL,NULL}; ++static A_BOOL HTCInitialized = FALSE; ++ ++static A_STATUS HTCTargetInsertedHandler(void *hif_handle); ++static A_STATUS HTCTargetRemovedHandler(void *handle, A_STATUS status); ++static void HTCReportFailure(void *Context); ++ ++/* Initializes the HTC layer */ ++A_STATUS HTCInit(HTC_INIT_INFO *pInitInfo) ++{ ++ HTC_CALLBACKS htcCallbacks; ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("HTCInit: Enter\n")); ++ if (HTCInitialized) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("HTCInit: Exit\n")); ++ return A_OK; ++ } ++ ++ A_MEMCPY(&HTCInitInfo,pInitInfo,sizeof(HTC_INIT_INFO)); ++ ++ A_MEMZERO(&htcCallbacks, sizeof(HTC_CALLBACKS)); ++ ++ /* setup HIF layer callbacks */ ++ htcCallbacks.deviceInsertedHandler = HTCTargetInsertedHandler; ++ htcCallbacks.deviceRemovedHandler = HTCTargetRemovedHandler; ++ /* the device layer handles these */ ++ htcCallbacks.rwCompletionHandler = DevRWCompletionHandler; ++ htcCallbacks.dsrHandler = DevDsrHandler; ++ HIFInit(&htcCallbacks); ++ HTCInitialized = TRUE; ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("HTCInit: Exit\n")); ++ return A_OK; ++} ++ ++void HTCFreeControlBuffer(HTC_TARGET *target, HTC_PACKET *pPacket, HTC_PACKET_QUEUE *pList) ++{ ++ LOCK_HTC(target); ++ HTC_PACKET_ENQUEUE(pList,pPacket); ++ UNLOCK_HTC(target); ++} ++ ++HTC_PACKET *HTCAllocControlBuffer(HTC_TARGET *target, HTC_PACKET_QUEUE *pList) ++{ ++ HTC_PACKET *pPacket; ++ ++ LOCK_HTC(target); ++ pPacket = HTC_PACKET_DEQUEUE(pList); ++ UNLOCK_HTC(target); ++ ++ return pPacket; ++} ++ ++/* cleanup the HTC instance */ ++static void HTCCleanup(HTC_TARGET *target) ++{ ++ if (A_IS_MUTEX_VALID(&target->HTCLock)) { ++ A_MUTEX_DELETE(&target->HTCLock); ++ } ++ ++ if (A_IS_MUTEX_VALID(&target->HTCRxLock)) { ++ A_MUTEX_DELETE(&target->HTCRxLock); ++ } ++ ++ if (A_IS_MUTEX_VALID(&target->HTCTxLock)) { ++ A_MUTEX_DELETE(&target->HTCTxLock); ++ } ++ /* free our instance */ ++ A_FREE(target); ++} ++ ++/* registered target arrival callback from the HIF layer */ ++static A_STATUS HTCTargetInsertedHandler(void *hif_handle) ++{ ++ HTC_TARGET *target = NULL; ++ A_STATUS status; ++ int i; ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("htcTargetInserted - Enter\n")); ++ ++ do { ++ ++ /* allocate target memory */ ++ if ((target = (HTC_TARGET *)A_MALLOC(sizeof(HTC_TARGET))) == NULL) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to allocate memory\n")); ++ status = A_ERROR; ++ break; ++ } ++ ++ A_MEMZERO(target, sizeof(HTC_TARGET)); ++ A_MUTEX_INIT(&target->HTCLock); ++ A_MUTEX_INIT(&target->HTCRxLock); ++ A_MUTEX_INIT(&target->HTCTxLock); ++ INIT_HTC_PACKET_QUEUE(&target->ControlBufferTXFreeList); ++ INIT_HTC_PACKET_QUEUE(&target->ControlBufferRXFreeList); ++ ++ /* give device layer the hif device handle */ ++ target->Device.HIFDevice = hif_handle; ++ /* give the device layer our context (for event processing) ++ * the device layer will register it's own context with HIF ++ * so we need to set this so we can fetch it in the target remove handler */ ++ target->Device.HTCContext = target; ++ /* set device layer target failure callback */ ++ target->Device.TargetFailureCallback = HTCReportFailure; ++ /* set device layer recv message pending callback */ ++ target->Device.MessagePendingCallback = HTCRecvMessagePendingHandler; ++ target->EpWaitingForBuffers = ENDPOINT_MAX; ++ ++ /* setup device layer */ ++ status = DevSetup(&target->Device); ++ ++ if (A_FAILED(status)) { ++ break; ++ } ++ ++ /* carve up buffers/packets for control messages */ ++ for (i = 0; i < NUM_CONTROL_RX_BUFFERS; i++) { ++ HTC_PACKET *pControlPacket; ++ pControlPacket = &target->HTCControlBuffers[i].HtcPacket; ++ SET_HTC_PACKET_INFO_RX_REFILL(pControlPacket, ++ target, ++ target->HTCControlBuffers[i].Buffer, ++ HTC_CONTROL_BUFFER_SIZE, ++ ENDPOINT_0); ++ HTC_FREE_CONTROL_RX(target,pControlPacket); ++ } ++ ++ for (;i < NUM_CONTROL_BUFFERS;i++) { ++ HTC_PACKET *pControlPacket; ++ pControlPacket = &target->HTCControlBuffers[i].HtcPacket; ++ INIT_HTC_PACKET_INFO(pControlPacket, ++ target->HTCControlBuffers[i].Buffer, ++ HTC_CONTROL_BUFFER_SIZE); ++ HTC_FREE_CONTROL_TX(target,pControlPacket); ++ } ++ ++ } while (FALSE); ++ ++ if (A_SUCCESS(status)) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, (" calling AddInstance callback \n")); ++ /* announce ourselves */ ++ HTCInitInfo.AddInstance((HTC_HANDLE)target); ++ } else { ++ if (target != NULL) { ++ HTCCleanup(target); ++ } ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("htcTargetInserted - Exit\n")); ++ ++ return status; ++} ++ ++/* registered removal callback from the HIF layer */ ++static A_STATUS HTCTargetRemovedHandler(void *handle, A_STATUS status) ++{ ++ HTC_TARGET *target; ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("+HTCTargetRemovedHandler handle:0x%X \n",(A_UINT32)handle)); ++ ++ if (NULL == handle) { ++ /* this could be NULL in the event that target initialization failed */ ++ return A_OK; ++ } ++ ++ target = ((AR6K_DEVICE *)handle)->HTCContext; ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, (" removing target:0x%X instance:0x%X ... \n", ++ (A_UINT32)target, (A_UINT32)target->pInstanceContext)); ++ ++ if (target->pInstanceContext != NULL) { ++ /* let upper layer know, it needs to call HTCStop() */ ++ HTCInitInfo.DeleteInstance(target->pInstanceContext); ++ } ++ ++ HIFShutDownDevice(target->Device.HIFDevice); ++ ++ HTCCleanup(target); ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("-HTCTargetRemovedHandler \n")); ++ return A_OK; ++} ++ ++/* get the low level HIF device for the caller , the caller may wish to do low level ++ * HIF requests */ ++void *HTCGetHifDevice(HTC_HANDLE HTCHandle) ++{ ++ HTC_TARGET *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle); ++ return target->Device.HIFDevice; ++} ++ ++/* set the instance block for this HTC handle, so that on removal, the blob can be ++ * returned to the caller */ ++void HTCSetInstance(HTC_HANDLE HTCHandle, void *Instance) ++{ ++ HTC_TARGET *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle); ++ ++ target->pInstanceContext = Instance; ++} ++ ++/* wait for the target to arrive (sends HTC Ready message) ++ * this operation is fully synchronous and the message is polled for */ ++A_STATUS HTCWaitTarget(HTC_HANDLE HTCHandle) ++{ ++ HTC_TARGET *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle); ++ A_STATUS status; ++ HTC_PACKET *pPacket = NULL; ++ HTC_READY_MSG *pRdyMsg; ++ HTC_SERVICE_CONNECT_REQ connect; ++ HTC_SERVICE_CONNECT_RESP resp; ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("HTCWaitTarget - Enter (target:0x%X) \n", (A_UINT32)target)); ++ ++ do { ++ ++#ifdef MBOXHW_UNIT_TEST ++ ++ status = DoMboxHWTest(&target->Device); ++ ++ if (status != A_OK) { ++ break; ++ } ++ ++#endif ++ ++ /* we should be getting 1 control message that the target is ready */ ++ status = HTCWaitforControlMessage(target, &pPacket); ++ ++ if (A_FAILED(status)) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, (" Target Not Available!!\n")); ++ break; ++ } ++ ++ /* we controlled the buffer creation so it has to be properly aligned */ ++ pRdyMsg = (HTC_READY_MSG *)pPacket->pBuffer; ++ ++ if ((pRdyMsg->MessageID != HTC_MSG_READY_ID) || ++ (pPacket->ActualLength < sizeof(HTC_READY_MSG))) { ++ /* this message is not valid */ ++ AR_DEBUG_ASSERT(FALSE); ++ status = A_EPROTO; ++ break; ++ } ++ ++ if (pRdyMsg->CreditCount == 0 || pRdyMsg->CreditSize == 0) { ++ /* this message is not valid */ ++ AR_DEBUG_ASSERT(FALSE); ++ status = A_EPROTO; ++ break; ++ } ++ ++ target->TargetCredits = pRdyMsg->CreditCount; ++ target->TargetCreditSize = pRdyMsg->CreditSize; ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, (" Target Ready: credits: %d credit size: %d\n", ++ target->TargetCredits, target->TargetCreditSize)); ++ ++ /* setup our pseudo HTC control endpoint connection */ ++ A_MEMZERO(&connect,sizeof(connect)); ++ A_MEMZERO(&resp,sizeof(resp)); ++ connect.EpCallbacks.pContext = target; ++ connect.EpCallbacks.EpTxComplete = HTCControlTxComplete; ++ connect.EpCallbacks.EpRecv = HTCControlRecv; ++ connect.EpCallbacks.EpRecvRefill = NULL; /* not needed */ ++ connect.EpCallbacks.EpSendFull = NULL; /* not nedded */ ++ connect.MaxSendQueueDepth = NUM_CONTROL_BUFFERS; ++ connect.ServiceID = HTC_CTRL_RSVD_SVC; ++ ++ /* connect fake service */ ++ status = HTCConnectService((HTC_HANDLE)target, ++ &connect, ++ &resp); ++ ++ if (!A_FAILED(status)) { ++ break; ++ } ++ ++ } while (FALSE); ++ ++ if (pPacket != NULL) { ++ HTC_FREE_CONTROL_RX(target,pPacket); ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("HTCWaitTarget - Exit\n")); ++ ++ return status; ++} ++ ++ ++ ++/* Start HTC, enable interrupts and let the target know host has finished setup */ ++A_STATUS HTCStart(HTC_HANDLE HTCHandle) ++{ ++ HTC_TARGET *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle); ++ HTC_PACKET *pPacket; ++ A_STATUS status; ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("HTCStart Enter\n")); ++ ++ /* now that we are starting, push control receive buffers into the ++ * HTC control endpoint */ ++ ++ while (1) { ++ pPacket = HTC_ALLOC_CONTROL_RX(target); ++ if (NULL == pPacket) { ++ break; ++ } ++ HTCAddReceivePkt((HTC_HANDLE)target,pPacket); ++ } ++ ++ do { ++ ++ AR_DEBUG_ASSERT(target->InitCredits != NULL); ++ AR_DEBUG_ASSERT(target->EpCreditDistributionListHead != NULL); ++ AR_DEBUG_ASSERT(target->EpCreditDistributionListHead->pNext != NULL); ++ ++ /* call init credits callback to do the distribution , ++ * NOTE: the first entry in the distribution list is ENDPOINT_0, so ++ * we pass the start of the list after this one. */ ++ target->InitCredits(target->pCredDistContext, ++ target->EpCreditDistributionListHead->pNext, ++ target->TargetCredits); ++ ++ if (AR_DEBUG_LVL_CHECK(ATH_DEBUG_TRC)) { ++ DumpCreditDistStates(target); ++ } ++ ++ /* the caller is done connecting to services, so we can indicate to the ++ * target that the setup phase is complete */ ++ status = HTCSendSetupComplete(target); ++ ++ if (A_FAILED(status)) { ++ break; ++ } ++ ++ /* unmask interrupts */ ++ status = DevUnmaskInterrupts(&target->Device); ++ ++ if (A_FAILED(status)) { ++ HTCStop(target); ++ } ++ ++ } while (FALSE); ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("HTCStart Exit\n")); ++ return status; ++} ++ ++ ++/* stop HTC communications, i.e. stop interrupt reception, and flush all queued buffers */ ++void HTCStop(HTC_HANDLE HTCHandle) ++{ ++ HTC_TARGET *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle); ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("+HTCStop \n")); ++ ++ /* mark that we are shutting down .. */ ++ target->HTCStateFlags |= HTC_STATE_STOPPING; ++ ++ /* Masking interrupts is a synchronous operation, when this function returns ++ * all pending HIF I/O has completed, we can safely flush the queues */ ++ DevMaskInterrupts(&target->Device); ++ ++ /* flush all send packets */ ++ HTCFlushSendPkts(target); ++ /* flush all recv buffers */ ++ HTCFlushRecvBuffers(target); ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("-HTCStop \n")); ++} ++ ++/* undo what was done in HTCInit() */ ++void HTCShutDown(void) ++{ ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("+HTCShutDown: \n")); ++ HTCInitialized = FALSE; ++ /* undo HTCInit */ ++ HIFShutDownDevice(NULL); ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("-HTCShutDown: \n")); ++} ++ ++void HTCDumpCreditStates(HTC_HANDLE HTCHandle) ++{ ++ HTC_TARGET *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle); ++ ++ LOCK_HTC_TX(target); ++ ++ DumpCreditDistStates(target); ++ ++ UNLOCK_HTC_TX(target); ++} ++ ++/* report a target failure from the device, this is a callback from the device layer ++ * which uses a mechanism to report errors from the target (i.e. special interrupts) */ ++static void HTCReportFailure(void *Context) ++{ ++ HTC_TARGET *target = (HTC_TARGET *)Context; ++ ++ target->TargetFailure = TRUE; ++ ++ if ((target->pInstanceContext != NULL) && (HTCInitInfo.TargetFailure != NULL)) { ++ /* let upper layer know, it needs to call HTCStop() */ ++ HTCInitInfo.TargetFailure(target->pInstanceContext, A_ERROR); ++ } ++} ++ ++void DebugDumpBytes(A_UCHAR *buffer, A_UINT16 length, char *pDescription) ++{ ++ A_CHAR stream[60]; ++ A_UINT32 i; ++ A_UINT16 offset, count; ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_ANY, ("<---------Dumping %d Bytes : %s ------>\n", length, pDescription)); ++ ++ count = 0; ++ offset = 0; ++ for(i = 0; i < length; i++) { ++ sprintf(stream + offset, "%2.2X ", buffer[i]); ++ count ++; ++ offset += 3; ++ ++ if(count == 16) { ++ count = 0; ++ offset = 0; ++ AR_DEBUG_PRINTF(ATH_DEBUG_ANY, ("[H]: %s\n", stream)); ++ A_MEMZERO(stream, 60); ++ } ++ } ++ ++ if(offset != 0) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ANY, ("[H]: %s\n", stream)); ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_ANY, ("<------------------------------------------------->\n")); ++} ++ ++A_BOOL HTCGetEndpointStatistics(HTC_HANDLE HTCHandle, ++ HTC_ENDPOINT_ID Endpoint, ++ HTC_ENDPOINT_STAT_ACTION Action, ++ HTC_ENDPOINT_STATS *pStats) ++{ ++ ++#ifdef HTC_EP_STAT_PROFILING ++ HTC_TARGET *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle); ++ A_BOOL clearStats = FALSE; ++ A_BOOL sample = FALSE; ++ ++ switch (Action) { ++ case HTC_EP_STAT_SAMPLE : ++ sample = TRUE; ++ break; ++ case HTC_EP_STAT_SAMPLE_AND_CLEAR : ++ sample = TRUE; ++ clearStats = TRUE; ++ break; ++ case HTC_EP_STAT_CLEAR : ++ clearStats = TRUE; ++ break; ++ default: ++ break; ++ } ++ ++ A_ASSERT(Endpoint < ENDPOINT_MAX); ++ ++ /* lock out TX and RX while we sample and/or clear */ ++ LOCK_HTC_TX(target); ++ LOCK_HTC_RX(target); ++ ++ if (sample) { ++ A_ASSERT(pStats != NULL); ++ /* return the stats to the caller */ ++ A_MEMCPY(pStats, &target->EndPoint[Endpoint].EndPointStats, sizeof(HTC_ENDPOINT_STATS)); ++ } ++ ++ if (clearStats) { ++ /* reset stats */ ++ A_MEMZERO(&target->EndPoint[Endpoint].EndPointStats, sizeof(HTC_ENDPOINT_STATS)); ++ } ++ ++ UNLOCK_HTC_RX(target); ++ UNLOCK_HTC_TX(target); ++ ++ return TRUE; ++#else ++ return FALSE; ++#endif ++} +diff --git a/drivers/sdio/function/wlan/ar6000/htc/htc_debug.h b/drivers/sdio/function/wlan/ar6000/htc/htc_debug.h +new file mode 100644 +index 0000000..08080be +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/htc/htc_debug.h +@@ -0,0 +1,65 @@ ++#ifndef HTC_DEBUG_H_ ++#define HTC_DEBUG_H_ ++/* ++ * ++ * Copyright (c) 2004-2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++/* ------- Debug related stuff ------- */ ++enum { ++ ATH_DEBUG_SEND = 0x0001, ++ ATH_DEBUG_RECV = 0x0002, ++ ATH_DEBUG_SYNC = 0x0004, ++ ATH_DEBUG_DUMP = 0x0008, ++ ATH_DEBUG_IRQ = 0x0010, ++ ATH_DEBUG_TRC = 0x0020, ++ ATH_DEBUG_WARN = 0x0040, ++ ATH_DEBUG_ERR = 0x0080, ++ ATH_DEBUG_ANY = 0xFFFF, ++}; ++ ++#ifdef DEBUG ++ ++// TODO FIX usage of A_PRINTF! ++#define AR_DEBUG_LVL_CHECK(lvl) (debughtc & (lvl)) ++#define AR_DEBUG_PRINTBUF(buffer, length, desc) do { \ ++ if (debughtc & ATH_DEBUG_DUMP) { \ ++ DebugDumpBytes(buffer, length,desc); \ ++ } \ ++} while(0) ++#define PRINTX_ARG(arg...) arg ++#define AR_DEBUG_PRINTF(flags, args) do { \ ++ if (debughtc & (flags)) { \ ++ A_PRINTF(KERN_ALERT PRINTX_ARG args); \ ++ } \ ++} while (0) ++#define AR_DEBUG_ASSERT(test) do { \ ++ if (!(test)) { \ ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Debug Assert Caught, File %s, Line: %d, Test:%s \n",__FILE__, __LINE__,#test)); \ ++ } \ ++} while(0) ++extern int debughtc; ++#else ++#define AR_DEBUG_PRINTF(flags, args) ++#define AR_DEBUG_PRINTBUF(buffer, length, desc) ++#define AR_DEBUG_ASSERT(test) ++#define AR_DEBUG_LVL_CHECK(lvl) 0 ++#endif ++ ++void DebugDumpBytes(A_UCHAR *buffer, A_UINT16 length, char *pDescription); ++ ++#endif /*HTC_DEBUG_H_*/ +diff --git a/drivers/sdio/function/wlan/ar6000/htc/htc_internal.h b/drivers/sdio/function/wlan/ar6000/htc/htc_internal.h +new file mode 100644 +index 0000000..ebb8ac1 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/htc/htc_internal.h +@@ -0,0 +1,168 @@ ++/* ++ * ++ * Copyright (c) 2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++#ifndef _HTC_INTERNAL_H_ ++#define _HTC_INTERNAL_H_ ++ ++/* for debugging, uncomment this to capture the last frame header, on frame header ++ * processing errors, the last frame header is dump for comparison */ ++//#define HTC_CAPTURE_LAST_FRAME ++ ++//#define HTC_EP_STAT_PROFILING ++ ++#ifdef __cplusplus ++extern "C" { ++#endif /* __cplusplus */ ++ ++/* Header files */ ++#include "a_config.h" ++#include "athdefs.h" ++#include "a_types.h" ++#include "a_osapi.h" ++#include "a_debug.h" ++#include "htc.h" ++#include "htc_api.h" ++#include "bmi_msg.h" ++#include "hif.h" ++#include "ar6k.h" ++ ++/* HTC operational parameters */ ++#define HTC_TARGET_RESPONSE_TIMEOUT 2000 /* in ms */ ++#define HTC_TARGET_DEBUG_INTR_MASK 0x01 ++#define HTC_TARGET_CREDIT_INTR_MASK 0xF0 ++ ++typedef struct _HTC_ENDPOINT { ++ HTC_SERVICE_ID ServiceID; /* service ID this endpoint is bound to ++ non-zero value means this endpoint is in use */ ++ HTC_PACKET_QUEUE TxQueue; /* HTC frame buffer TX queue */ ++ HTC_PACKET_QUEUE RxBuffers; /* HTC frame buffer RX list */ ++ HTC_ENDPOINT_CREDIT_DIST CreditDist; /* credit distribution structure (exposed to driver layer) */ ++ HTC_EP_CALLBACKS EpCallBacks; /* callbacks associated with this endpoint */ ++ int MaxTxQueueDepth; /* max depth of the TX queue before we need to ++ call driver's full handler */ ++ int CurrentTxQueueDepth; /* current TX queue depth */ ++ int MaxMsgLength; /* max length of endpoint message */ ++#ifdef HTC_EP_STAT_PROFILING ++ HTC_ENDPOINT_STATS EndPointStats; /* endpoint statistics */ ++#endif ++} HTC_ENDPOINT; ++ ++#ifdef HTC_EP_STAT_PROFILING ++#define INC_HTC_EP_STAT(p,stat,count) (p)->EndPointStats.stat += (count); ++#else ++#define INC_HTC_EP_STAT(p,stat,count) ++#endif ++ ++#define HTC_SERVICE_TX_PACKET_TAG HTC_TX_PACKET_TAG_INTERNAL ++ ++#define NUM_CONTROL_BUFFERS 8 ++#define NUM_CONTROL_TX_BUFFERS 2 ++#define NUM_CONTROL_RX_BUFFERS (NUM_CONTROL_BUFFERS - NUM_CONTROL_TX_BUFFERS) ++ ++#define HTC_CONTROL_BUFFER_SIZE (HTC_MAX_CONTROL_MESSAGE_LENGTH + HTC_HDR_LENGTH) ++ ++typedef struct HTC_CONTROL_BUFFER { ++ HTC_PACKET HtcPacket; ++ A_UINT8 Buffer[HTC_CONTROL_BUFFER_SIZE]; ++} HTC_CONTROL_BUFFER; ++ ++/* our HTC target state */ ++typedef struct _HTC_TARGET { ++ HTC_ENDPOINT EndPoint[ENDPOINT_MAX]; ++ HTC_CONTROL_BUFFER HTCControlBuffers[NUM_CONTROL_BUFFERS]; ++ HTC_ENDPOINT_CREDIT_DIST *EpCreditDistributionListHead; ++ HTC_PACKET_QUEUE ControlBufferTXFreeList; ++ HTC_PACKET_QUEUE ControlBufferRXFreeList; ++ HTC_CREDIT_DIST_CALLBACK DistributeCredits; ++ HTC_CREDIT_INIT_CALLBACK InitCredits; ++ void *pCredDistContext; ++ int TargetCredits; ++ int TargetCreditSize; ++ A_MUTEX_T HTCLock; ++ A_MUTEX_T HTCRxLock; ++ A_MUTEX_T HTCTxLock; ++ AR6K_DEVICE Device; /* AR6K - specific state */ ++ A_UINT32 HTCStateFlags; ++ HTC_ENDPOINT_ID EpWaitingForBuffers; ++ A_BOOL TargetFailure; ++ void *pInstanceContext; ++#define HTC_STATE_WAIT_BUFFERS (1 << 0) ++#define HTC_STATE_STOPPING (1 << 1) ++#ifdef HTC_CAPTURE_LAST_FRAME ++ HTC_FRAME_HDR LastFrameHdr; /* useful for debugging */ ++ A_UINT8 LastTrailer[256]; ++ A_UINT8 LastTrailerLength; ++#endif ++} HTC_TARGET; ++ ++#define HTC_STOPPING(t) ((t)->HTCStateFlags & HTC_STATE_STOPPING) ++#define LOCK_HTC(t) A_MUTEX_LOCK(&(t)->HTCLock); ++#define UNLOCK_HTC(t) A_MUTEX_UNLOCK(&(t)->HTCLock); ++#define LOCK_HTC_RX(t) A_MUTEX_LOCK(&(t)->HTCRxLock); ++#define UNLOCK_HTC_RX(t) A_MUTEX_UNLOCK(&(t)->HTCRxLock); ++#define LOCK_HTC_TX(t) A_MUTEX_LOCK(&(t)->HTCTxLock); ++#define UNLOCK_HTC_TX(t) A_MUTEX_UNLOCK(&(t)->HTCTxLock); ++ ++#define GET_HTC_TARGET_FROM_HANDLE(hnd) ((HTC_TARGET *)(hnd)) ++#define HTC_RECYCLE_RX_PKT(target,p) \ ++{ \ ++ HTC_PACKET_RESET_RX(pPacket); \ ++ HTCAddReceivePkt((HTC_HANDLE)(target),(p)); \ ++} ++ ++/* internal HTC functions */ ++void HTCControlTxComplete(void *Context, HTC_PACKET *pPacket); ++void HTCControlRecv(void *Context, HTC_PACKET *pPacket); ++A_STATUS HTCWaitforControlMessage(HTC_TARGET *target, HTC_PACKET **ppControlPacket); ++HTC_PACKET *HTCAllocControlBuffer(HTC_TARGET *target, HTC_PACKET_QUEUE *pList); ++void HTCFreeControlBuffer(HTC_TARGET *target, HTC_PACKET *pPacket, HTC_PACKET_QUEUE *pList); ++A_STATUS HTCIssueSend(HTC_TARGET *target, HTC_PACKET *pPacket, A_UINT8 Flags); ++A_STATUS HTCIssueRecv(HTC_TARGET *target, HTC_PACKET *pPacket); ++void HTCRecvCompleteHandler(void *Context, HTC_PACKET *pPacket); ++A_STATUS HTCRecvMessagePendingHandler(void *Context, A_UINT32 LookAhead, A_BOOL *pAsyncProc); ++void HTCProcessCreditRpt(HTC_TARGET *target, HTC_CREDIT_REPORT *pRpt, int NumEntries, HTC_ENDPOINT_ID FromEndpoint); ++A_STATUS HTCSendSetupComplete(HTC_TARGET *target); ++void HTCFlushRecvBuffers(HTC_TARGET *target); ++void HTCFlushSendPkts(HTC_TARGET *target); ++void DumpCreditDist(HTC_ENDPOINT_CREDIT_DIST *pEPDist); ++void DumpCreditDistStates(HTC_TARGET *target); ++void DebugDumpBytes(A_UCHAR *buffer, A_UINT16 length, char *pDescription); ++ ++static INLINE HTC_PACKET *HTC_ALLOC_CONTROL_TX(HTC_TARGET *target) { ++ HTC_PACKET *pPacket = HTCAllocControlBuffer(target,&target->ControlBufferTXFreeList); ++ if (pPacket != NULL) { ++ /* set payload pointer area with some headroom */ ++ pPacket->pBuffer = pPacket->pBufferStart + HTC_HDR_LENGTH; ++ } ++ return pPacket; ++} ++ ++#define HTC_FREE_CONTROL_TX(t,p) HTCFreeControlBuffer((t),(p),&(t)->ControlBufferTXFreeList) ++#define HTC_ALLOC_CONTROL_RX(t) HTCAllocControlBuffer((t),&(t)->ControlBufferRXFreeList) ++#define HTC_FREE_CONTROL_RX(t,p) \ ++{ \ ++ HTC_PACKET_RESET_RX(p); \ ++ HTCFreeControlBuffer((t),(p),&(t)->ControlBufferRXFreeList); \ ++} ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* _HTC_INTERNAL_H_ */ +diff --git a/drivers/sdio/function/wlan/ar6000/htc/htc_recv.c b/drivers/sdio/function/wlan/ar6000/htc/htc_recv.c +new file mode 100644 +index 0000000..4be2b08 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/htc/htc_recv.c +@@ -0,0 +1,703 @@ ++/* ++ * ++ * Copyright (c) 2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++#include "htc_internal.h" ++ ++#define HTCIssueRecv(t, p) \ ++ DevRecvPacket(&(t)->Device, \ ++ (p), \ ++ (p)->ActualLength) ++ ++#define DO_RCV_COMPLETION(t,p,e) \ ++{ \ ++ if ((p)->ActualLength > 0) { \ ++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV, (" completing packet 0x%X (%d bytes) on ep : %d \n", \ ++ (A_UINT32)(p), (p)->ActualLength, (p)->Endpoint)); \ ++ (e)->EpCallBacks.EpRecv((e)->EpCallBacks.pContext, \ ++ (p)); \ ++ } else { \ ++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV, (" recycling empty packet \n")); \ ++ HTC_RECYCLE_RX_PKT((t), (p)); \ ++ } \ ++} ++ ++#ifdef HTC_EP_STAT_PROFILING ++#define HTC_RX_STAT_PROFILE(t,ep,lookAhead) \ ++{ \ ++ LOCK_HTC_RX((t)); \ ++ INC_HTC_EP_STAT((ep), RxReceived, 1); \ ++ if ((lookAhead) != 0) { \ ++ INC_HTC_EP_STAT((ep), RxLookAheads, 1); \ ++ } \ ++ UNLOCK_HTC_RX((t)); \ ++} ++#else ++#define HTC_RX_STAT_PROFILE(t,ep,lookAhead) ++#endif ++ ++static INLINE A_STATUS HTCProcessTrailer(HTC_TARGET *target, ++ A_UINT8 *pBuffer, ++ int Length, ++ A_UINT32 *pNextLookAhead, ++ HTC_ENDPOINT_ID FromEndpoint) ++{ ++ HTC_RECORD_HDR *pRecord; ++ A_UINT8 *pRecordBuf; ++ HTC_LOOKAHEAD_REPORT *pLookAhead; ++ A_UINT8 *pOrigBuffer; ++ int origLength; ++ A_STATUS status; ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV, ("+HTCProcessTrailer (length:%d) \n", Length)); ++ ++ if (AR_DEBUG_LVL_CHECK(ATH_DEBUG_RECV)) { ++ AR_DEBUG_PRINTBUF(pBuffer,Length,"Recv Trailer"); ++ } ++ ++ pOrigBuffer = pBuffer; ++ origLength = Length; ++ status = A_OK; ++ ++ while (Length > 0) { ++ ++ if (Length < sizeof(HTC_RECORD_HDR)) { ++ status = A_EPROTO; ++ break; ++ } ++ /* these are byte aligned structs */ ++ pRecord = (HTC_RECORD_HDR *)pBuffer; ++ Length -= sizeof(HTC_RECORD_HDR); ++ pBuffer += sizeof(HTC_RECORD_HDR); ++ ++ if (pRecord->Length > Length) { ++ /* no room left in buffer for record */ ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ++ (" invalid record length: %d (id:%d) buffer has: %d bytes left \n", ++ pRecord->Length, pRecord->RecordID, Length)); ++ status = A_EPROTO; ++ break; ++ } ++ /* start of record follows the header */ ++ pRecordBuf = pBuffer; ++ ++ switch (pRecord->RecordID) { ++ case HTC_RECORD_CREDITS: ++ AR_DEBUG_ASSERT(pRecord->Length >= sizeof(HTC_CREDIT_REPORT)); ++ HTCProcessCreditRpt(target, ++ (HTC_CREDIT_REPORT *)pRecordBuf, ++ pRecord->Length / (sizeof(HTC_CREDIT_REPORT)), ++ FromEndpoint); ++ break; ++ case HTC_RECORD_LOOKAHEAD: ++ AR_DEBUG_ASSERT(pRecord->Length >= sizeof(HTC_LOOKAHEAD_REPORT)); ++ pLookAhead = (HTC_LOOKAHEAD_REPORT *)pRecordBuf; ++ if ((pLookAhead->PreValid == ((~pLookAhead->PostValid) & 0xFF)) && ++ (pNextLookAhead != NULL)) { ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV, ++ (" LookAhead Report Found (pre valid:0x%X, post valid:0x%X) \n", ++ pLookAhead->PreValid, ++ pLookAhead->PostValid)); ++ ++ /* look ahead bytes are valid, copy them over */ ++ ((A_UINT8 *)pNextLookAhead)[0] = pLookAhead->LookAhead[0]; ++ ((A_UINT8 *)pNextLookAhead)[1] = pLookAhead->LookAhead[1]; ++ ((A_UINT8 *)pNextLookAhead)[2] = pLookAhead->LookAhead[2]; ++ ((A_UINT8 *)pNextLookAhead)[3] = pLookAhead->LookAhead[3]; ++ ++ if (AR_DEBUG_LVL_CHECK(ATH_DEBUG_RECV)) { ++ DebugDumpBytes((A_UINT8 *)pNextLookAhead,4,"Next Look Ahead"); ++ } ++ } ++ break; ++ default: ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, (" unhandled record: id:%d length:%d \n", ++ pRecord->RecordID, pRecord->Length)); ++ break; ++ } ++ ++ if (A_FAILED(status)) { ++ break; ++ } ++ ++ /* advance buffer past this record for next time around */ ++ pBuffer += pRecord->Length; ++ Length -= pRecord->Length; ++ } ++ ++ if (A_FAILED(status)) { ++ DebugDumpBytes(pOrigBuffer,origLength,"BAD Recv Trailer"); ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV, ("-HTCProcessTrailer \n")); ++ return status; ++ ++} ++ ++/* process a received message (i.e. strip off header, process any trailer data) ++ * note : locks must be released when this function is called */ ++static A_STATUS HTCProcessRecvHeader(HTC_TARGET *target, HTC_PACKET *pPacket, A_UINT32 *pNextLookAhead) ++{ ++ A_UINT8 temp; ++ A_UINT8 *pBuf; ++ A_STATUS status = A_OK; ++ A_UINT16 payloadLen; ++ A_UINT32 lookAhead; ++ ++ pBuf = pPacket->pBuffer; ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV, ("+HTCProcessRecvHeader \n")); ++ ++ if (AR_DEBUG_LVL_CHECK(ATH_DEBUG_RECV)) { ++ AR_DEBUG_PRINTBUF(pBuf,pPacket->ActualLength,"HTC Recv PKT"); ++ } ++ ++ do { ++ /* note, we cannot assume the alignment of pBuffer, so we use the safe macros to ++ * retrieve 16 bit fields */ ++ payloadLen = A_GET_UINT16_FIELD(pBuf, HTC_FRAME_HDR, PayloadLen); ++ ++ ((A_UINT8 *)&lookAhead)[0] = pBuf[0]; ++ ((A_UINT8 *)&lookAhead)[1] = pBuf[1]; ++ ((A_UINT8 *)&lookAhead)[2] = pBuf[2]; ++ ((A_UINT8 *)&lookAhead)[3] = pBuf[3]; ++ ++ if (lookAhead != pPacket->HTCReserved) { ++ /* somehow the lookahead that gave us the full read length did not ++ * reflect the actual header in the pending message */ ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ++ ("HTCProcessRecvHeader, lookahead mismatch! \n")); ++ DebugDumpBytes((A_UINT8 *)&pPacket->HTCReserved,4,"Expected Message LookAhead"); ++ DebugDumpBytes(pBuf,sizeof(HTC_FRAME_HDR),"Current Frame Header"); ++#ifdef HTC_CAPTURE_LAST_FRAME ++ DebugDumpBytes((A_UINT8 *)&target->LastFrameHdr,sizeof(HTC_FRAME_HDR),"Last Frame Header"); ++ if (target->LastTrailerLength != 0) { ++ DebugDumpBytes(target->LastTrailer, ++ target->LastTrailerLength, ++ "Last trailer"); ++ } ++#endif ++ status = A_EPROTO; ++ break; ++ } ++ ++ /* get flags */ ++ temp = A_GET_UINT8_FIELD(pBuf, HTC_FRAME_HDR, Flags); ++ ++ if (temp & HTC_FLAGS_RECV_TRAILER) { ++ /* this packet has a trailer */ ++ ++ /* extract the trailer length in control byte 0 */ ++ temp = A_GET_UINT8_FIELD(pBuf, HTC_FRAME_HDR, ControlBytes[0]); ++ ++ if ((temp < sizeof(HTC_RECORD_HDR)) || (temp > payloadLen)) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ++ ("HTCProcessRecvHeader, invalid header (payloadlength should be :%d, CB[0] is:%d) \n", ++ payloadLen, temp)); ++ status = A_EPROTO; ++ break; ++ } ++ ++ /* process trailer data that follows HDR + application payload */ ++ status = HTCProcessTrailer(target, ++ (pBuf + HTC_HDR_LENGTH + payloadLen - temp), ++ temp, ++ pNextLookAhead, ++ pPacket->Endpoint); ++ ++ if (A_FAILED(status)) { ++ break; ++ } ++ ++#ifdef HTC_CAPTURE_LAST_FRAME ++ A_MEMCPY(target->LastTrailer, (pBuf + HTC_HDR_LENGTH + payloadLen - temp), temp); ++ target->LastTrailerLength = temp; ++#endif ++ /* trim length by trailer bytes */ ++ pPacket->ActualLength -= temp; ++ } ++#ifdef HTC_CAPTURE_LAST_FRAME ++ else { ++ target->LastTrailerLength = 0; ++ } ++#endif ++ ++ /* if we get to this point, the packet is good */ ++ /* remove header and adjust length */ ++ pPacket->pBuffer += HTC_HDR_LENGTH; ++ pPacket->ActualLength -= HTC_HDR_LENGTH; ++ ++ } while (FALSE); ++ ++ if (A_FAILED(status)) { ++ /* dump the whole packet */ ++ DebugDumpBytes(pBuf,pPacket->ActualLength,"BAD HTC Recv PKT"); ++ } else { ++#ifdef HTC_CAPTURE_LAST_FRAME ++ A_MEMCPY(&target->LastFrameHdr,pBuf,sizeof(HTC_FRAME_HDR)); ++#endif ++ if (AR_DEBUG_LVL_CHECK(ATH_DEBUG_RECV)) { ++ if (pPacket->ActualLength > 0) { ++ AR_DEBUG_PRINTBUF(pPacket->pBuffer,pPacket->ActualLength,"HTC - Application Msg"); ++ } ++ } ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV, ("-HTCProcessRecvHeader \n")); ++ return status; ++} ++ ++/* asynchronous completion handler for recv packet fetching, when the device layer ++ * completes a read request, it will call this completion handler */ ++void HTCRecvCompleteHandler(void *Context, HTC_PACKET *pPacket) ++{ ++ HTC_TARGET *target = (HTC_TARGET *)Context; ++ HTC_ENDPOINT *pEndpoint; ++ A_UINT32 nextLookAhead = 0; ++ A_STATUS status; ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV, ("+HTCRecvCompleteHandler (status:%d, ep:%d) \n", ++ pPacket->Status, pPacket->Endpoint)); ++ ++ AR_DEBUG_ASSERT(pPacket->Endpoint < ENDPOINT_MAX); ++ pEndpoint = &target->EndPoint[pPacket->Endpoint]; ++ pPacket->Completion = NULL; ++ ++ /* get completion status */ ++ status = pPacket->Status; ++ ++ do { ++ if (A_FAILED(status)) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("HTCRecvCompleteHandler: request failed (status:%d, ep:%d) \n", ++ pPacket->Status, pPacket->Endpoint)); ++ break; ++ } ++ /* process the header for any trailer data */ ++ status = HTCProcessRecvHeader(target,pPacket,&nextLookAhead); ++ ++ if (A_FAILED(status)) { ++ break; ++ } ++ /* was there a lookahead for the next packet? */ ++ if (nextLookAhead != 0) { ++ A_STATUS nextStatus; ++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV, ++ ("HTCRecvCompleteHandler - next look ahead was non-zero : 0x%X \n", ++ nextLookAhead)); ++ /* we have another packet, get the next packet fetch started (pipelined) before ++ * we call into the endpoint's callback, this will start another async request */ ++ nextStatus = HTCRecvMessagePendingHandler(target,nextLookAhead,NULL); ++ if (A_EPROTO == nextStatus) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ++ ("Next look ahead from recv header was INVALID\n")); ++ DebugDumpBytes((A_UINT8 *)&nextLookAhead, ++ 4, ++ "BAD lookahead from lookahead report"); ++ } ++ } else { ++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV, ++ ("HTCRecvCompleteHandler - rechecking for more messages...\n")); ++ /* if we did not get anything on the look-ahead, ++ * call device layer to asynchronously re-check for messages. If we can keep the async ++ * processing going we get better performance. If there is a pending message we will keep processing ++ * messages asynchronously which should pipeline things nicely */ ++ DevCheckPendingRecvMsgsAsync(&target->Device); ++ } ++ ++ HTC_RX_STAT_PROFILE(target,pEndpoint,nextLookAhead); ++ DO_RCV_COMPLETION(target,pPacket,pEndpoint); ++ ++ } while (FALSE); ++ ++ if (A_FAILED(status)) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ++ ("HTCRecvCompleteHandler , message fetch failed (status = %d) \n", ++ status)); ++ /* recyle this packet */ ++ HTC_RECYCLE_RX_PKT(target, pPacket); ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV, ("-HTCRecvCompleteHandler\n")); ++} ++ ++/* synchronously wait for a control message from the target, ++ * This function is used at initialization time ONLY. At init messages ++ * on ENDPOINT 0 are expected. */ ++A_STATUS HTCWaitforControlMessage(HTC_TARGET *target, HTC_PACKET **ppControlPacket) ++{ ++ A_STATUS status; ++ A_UINT32 lookAhead; ++ HTC_PACKET *pPacket = NULL; ++ HTC_FRAME_HDR *pHdr; ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV,("+HTCWaitforControlMessage \n")); ++ ++ do { ++ ++ *ppControlPacket = NULL; ++ ++ /* call the polling function to see if we have a message */ ++ status = DevPollMboxMsgRecv(&target->Device, ++ &lookAhead, ++ HTC_TARGET_RESPONSE_TIMEOUT); ++ ++ if (A_FAILED(status)) { ++ break; ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV, ++ ("HTCWaitforControlMessage : lookAhead : 0x%X \n", lookAhead)); ++ ++ /* check the lookahead */ ++ pHdr = (HTC_FRAME_HDR *)&lookAhead; ++ ++ if (pHdr->EndpointID != ENDPOINT_0) { ++ /* unexpected endpoint number, should be zero */ ++ AR_DEBUG_ASSERT(FALSE); ++ status = A_EPROTO; ++ break; ++ } ++ ++ if (A_FAILED(status)) { ++ /* bad message */ ++ AR_DEBUG_ASSERT(FALSE); ++ status = A_EPROTO; ++ break; ++ } ++ ++ pPacket = HTC_ALLOC_CONTROL_RX(target); ++ ++ if (pPacket == NULL) { ++ AR_DEBUG_ASSERT(FALSE); ++ status = A_NO_MEMORY; ++ break; ++ } ++ ++ pPacket->HTCReserved = lookAhead; ++ pPacket->ActualLength = pHdr->PayloadLen + HTC_HDR_LENGTH; ++ ++ if (pPacket->ActualLength > pPacket->BufferLength) { ++ AR_DEBUG_ASSERT(FALSE); ++ status = A_EPROTO; ++ break; ++ } ++ ++ /* we want synchronous operation */ ++ pPacket->Completion = NULL; ++ ++ /* get the message from the device, this will block */ ++ status = HTCIssueRecv(target, pPacket); ++ ++ if (A_FAILED(status)) { ++ break; ++ } ++ ++ /* process receive header */ ++ status = HTCProcessRecvHeader(target,pPacket,NULL); ++ ++ pPacket->Status = status; ++ ++ if (A_FAILED(status)) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ++ ("HTCWaitforControlMessage, HTCProcessRecvHeader failed (status = %d) \n", ++ status)); ++ break; ++ } ++ ++ /* give the caller this control message packet, they are responsible to free */ ++ *ppControlPacket = pPacket; ++ ++ } while (FALSE); ++ ++ if (A_FAILED(status)) { ++ if (pPacket != NULL) { ++ /* cleanup buffer on error */ ++ HTC_FREE_CONTROL_RX(target,pPacket); ++ } ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV,("-HTCWaitforControlMessage \n")); ++ ++ return status; ++} ++ ++/* callback when device layer or lookahead report parsing detects a pending message */ ++A_STATUS HTCRecvMessagePendingHandler(void *Context, A_UINT32 LookAhead, A_BOOL *pAsyncProc) ++{ ++ HTC_TARGET *target = (HTC_TARGET *)Context; ++ A_STATUS status = A_OK; ++ HTC_PACKET *pPacket = NULL; ++ HTC_FRAME_HDR *pHdr; ++ HTC_ENDPOINT *pEndpoint; ++ A_BOOL asyncProc = FALSE; ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV,("+HTCRecvMessagePendingHandler LookAhead:0x%X \n",LookAhead)); ++ ++ if (IS_DEV_IRQ_PROCESSING_ASYNC_ALLOWED(&target->Device)) { ++ /* We use async mode to get the packets if the device layer supports it. ++ * The device layer interfaces with HIF in which HIF may have restrictions on ++ * how interrupts are processed */ ++ asyncProc = TRUE; ++ } ++ ++ if (pAsyncProc != NULL) { ++ /* indicate to caller how we decided to process this */ ++ *pAsyncProc = asyncProc; ++ } ++ ++ while (TRUE) { ++ ++ pHdr = (HTC_FRAME_HDR *)&LookAhead; ++ ++ if (pHdr->EndpointID >= ENDPOINT_MAX) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("Invalid Endpoint in look-ahead: %d \n",pHdr->EndpointID)); ++ /* invalid endpoint */ ++ status = A_EPROTO; ++ break; ++ } ++ ++ if (pHdr->PayloadLen > HTC_MAX_PAYLOAD_LENGTH) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("Payload length %d exceeds max HTC : %d !\n", ++ pHdr->PayloadLen, HTC_MAX_PAYLOAD_LENGTH)); ++ status = A_EPROTO; ++ break; ++ } ++ ++ pEndpoint = &target->EndPoint[pHdr->EndpointID]; ++ ++ if (0 == pEndpoint->ServiceID) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("Endpoint %d is not connected !\n",pHdr->EndpointID)); ++ /* endpoint isn't even connected */ ++ status = A_EPROTO; ++ break; ++ } ++ ++ /* lock RX to get a buffer */ ++ LOCK_HTC_RX(target); ++ ++ /* get a packet from the endpoint recv queue */ ++ pPacket = HTC_PACKET_DEQUEUE(&pEndpoint->RxBuffers); ++ ++ if (NULL == pPacket) { ++ /* check for refill handler */ ++ if (pEndpoint->EpCallBacks.EpRecvRefill != NULL) { ++ UNLOCK_HTC_RX(target); ++ /* call the re-fill handler */ ++ pEndpoint->EpCallBacks.EpRecvRefill(pEndpoint->EpCallBacks.pContext, ++ pHdr->EndpointID); ++ LOCK_HTC_RX(target); ++ /* check if we have more buffers */ ++ pPacket = HTC_PACKET_DEQUEUE(&pEndpoint->RxBuffers); ++ /* fall through */ ++ } ++ } ++ ++ if (NULL == pPacket) { ++ /* this is not an error, we simply need to mark that we are waiting for buffers.*/ ++ target->HTCStateFlags |= HTC_STATE_WAIT_BUFFERS; ++ target->EpWaitingForBuffers = pHdr->EndpointID; ++ status = A_NO_MEMORY; ++ } ++ ++ UNLOCK_HTC_RX(target); ++ ++ if (A_FAILED(status)) { ++ /* no buffers */ ++ break; ++ } ++ ++ AR_DEBUG_ASSERT(pPacket->Endpoint == pHdr->EndpointID); ++ ++ /* make sure this message can fit in the endpoint buffer */ ++ if ((pHdr->PayloadLen + HTC_HDR_LENGTH) > pPacket->BufferLength) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ++ ("Payload Length Error : header reports payload of: %d, endpoint buffer size: %d \n", ++ pHdr->PayloadLen, pPacket->BufferLength)); ++ status = A_EPROTO; ++ break; ++ } ++ ++ pPacket->HTCReserved = LookAhead; /* set expected look ahead */ ++ /* set the amount of data to fetch */ ++ pPacket->ActualLength = pHdr->PayloadLen + HTC_HDR_LENGTH; ++ ++ if (asyncProc) { ++ /* we use async mode to get the packet if the device layer supports it ++ * set our callback and context */ ++ pPacket->Completion = HTCRecvCompleteHandler; ++ pPacket->pContext = target; ++ } else { ++ /* fully synchronous */ ++ pPacket->Completion = NULL; ++ } ++ ++ /* go fetch the packet */ ++ status = HTCIssueRecv(target, pPacket); ++ ++ if (A_FAILED(status)) { ++ break; ++ } ++ ++ if (asyncProc) { ++ /* we did this asynchronously so we can get out of the loop, the asynch processing ++ * creates a chain of requests to continue processing pending messages in the ++ * context of callbacks */ ++ break; ++ } ++ ++ /* in the sync case, we process the packet, check lookaheads and then repeat */ ++ ++ LookAhead = 0; ++ status = HTCProcessRecvHeader(target,pPacket,&LookAhead); ++ ++ if (A_FAILED(status)) { ++ break; ++ } ++ ++ HTC_RX_STAT_PROFILE(target,pEndpoint,LookAhead); ++ DO_RCV_COMPLETION(target,pPacket,pEndpoint); ++ ++ pPacket = NULL; ++ ++ if (0 == LookAhead) { ++ break; ++ } ++ ++ } ++ ++ if (A_NO_MEMORY == status) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ++ (" Endpoint :%d has no buffers, blocking receiver to prevent overrun.. \n", ++ pHdr->EndpointID)); ++ /* try to stop receive at the device layer */ ++ DevStopRecv(&target->Device, asyncProc ? DEV_STOP_RECV_ASYNC : DEV_STOP_RECV_SYNC); ++ status = A_OK; ++ } else if (A_FAILED(status)) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ++ ("Failed to get pending message : LookAhead Value: 0x%X (status = %d) \n", ++ LookAhead, status)); ++ if (pPacket != NULL) { ++ /* clean up packet on error */ ++ HTC_RECYCLE_RX_PKT(target, pPacket); ++ } ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV,("-HTCRecvMessagePendingHandler \n")); ++ ++ return status; ++} ++ ++/* Makes a buffer available to the HTC module */ ++A_STATUS HTCAddReceivePkt(HTC_HANDLE HTCHandle, HTC_PACKET *pPacket) ++{ ++ HTC_TARGET *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle); ++ HTC_ENDPOINT *pEndpoint; ++ A_BOOL unblockRecv = FALSE; ++ A_STATUS status = A_OK; ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND, ++ ("+- HTCAddReceivePkt: endPointId: %d, buffer: 0x%X, length: %d\n", ++ pPacket->Endpoint, (A_UINT32)pPacket->pBuffer, pPacket->BufferLength)); ++ ++ do { ++ ++ if (HTC_STOPPING(target)) { ++ status = A_ECANCELED; ++ break; ++ } ++ ++ AR_DEBUG_ASSERT(pPacket->Endpoint < ENDPOINT_MAX); ++ ++ pEndpoint = &target->EndPoint[pPacket->Endpoint]; ++ ++ LOCK_HTC_RX(target); ++ ++ /* store receive packet */ ++ HTC_PACKET_ENQUEUE(&pEndpoint->RxBuffers, pPacket); ++ ++ /* check if we are blocked waiting for a new buffer */ ++ if (target->HTCStateFlags & HTC_STATE_WAIT_BUFFERS) { ++ if (target->EpWaitingForBuffers == pPacket->Endpoint) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV,(" receiver was blocked on ep:%d, unblocking.. \n", ++ target->EpWaitingForBuffers)); ++ target->HTCStateFlags &= ~HTC_STATE_WAIT_BUFFERS; ++ target->EpWaitingForBuffers = ENDPOINT_MAX; ++ unblockRecv = TRUE; ++ } ++ } ++ ++ UNLOCK_HTC_RX(target); ++ ++ if (unblockRecv && !HTC_STOPPING(target)) { ++ /* TODO : implement a buffer threshold count? */ ++ DevEnableRecv(&target->Device,DEV_ENABLE_RECV_SYNC); ++ } ++ ++ } while (FALSE); ++ ++ return status; ++} ++ ++static void HTCFlushEndpointRX(HTC_TARGET *target, HTC_ENDPOINT *pEndpoint) ++{ ++ HTC_PACKET *pPacket; ++ ++ LOCK_HTC_RX(target); ++ ++ while (1) { ++ pPacket = HTC_PACKET_DEQUEUE(&pEndpoint->RxBuffers); ++ if (NULL == pPacket) { ++ break; ++ } ++ UNLOCK_HTC_RX(target); ++ pPacket->Status = A_ECANCELED; ++ pPacket->ActualLength = 0; ++ AR_DEBUG_PRINTF(ATH_DEBUG_RECV, (" Flushing RX packet:0x%X, length:%d, ep:%d \n", ++ (A_UINT32)pPacket, pPacket->BufferLength, pPacket->Endpoint)); ++ /* give the packet back */ ++ pEndpoint->EpCallBacks.EpRecv(pEndpoint->EpCallBacks.pContext, ++ pPacket); ++ LOCK_HTC_RX(target); ++ } ++ ++ UNLOCK_HTC_RX(target); ++ ++ ++} ++ ++void HTCFlushRecvBuffers(HTC_TARGET *target) ++{ ++ HTC_ENDPOINT *pEndpoint; ++ int i; ++ ++ /* NOTE: no need to flush endpoint 0, these buffers were ++ * allocated as part of the HTC struct */ ++ for (i = ENDPOINT_1; i < ENDPOINT_MAX; i++) { ++ pEndpoint = &target->EndPoint[i]; ++ if (pEndpoint->ServiceID == 0) { ++ /* not in use.. */ ++ continue; ++ } ++ HTCFlushEndpointRX(target,pEndpoint); ++ } ++ ++ ++} ++ ++ +diff --git a/drivers/sdio/function/wlan/ar6000/htc/htc_send.c b/drivers/sdio/function/wlan/ar6000/htc/htc_send.c +new file mode 100644 +index 0000000..7792dd6 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/htc/htc_send.c +@@ -0,0 +1,541 @@ ++/* ++ * ++ * Copyright (c) 2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++#include "htc_internal.h" ++ ++#define DO_EP_TX_COMPLETION(ep,p) \ ++{ \ ++ (p)->Completion = NULL; \ ++ (ep)->EpCallBacks.EpTxComplete((ep)->EpCallBacks.pContext,(p)); \ ++} ++ ++ ++/* call the distribute credits callback with the distribution */ ++#define DO_DISTRIBUTION(t,reason,description,pList) \ ++{ \ ++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND, \ ++ (" calling distribute function (%s) (dfn:0x%X, ctxt:0x%X, dist:0x%X) \n", \ ++ (description), \ ++ (A_UINT32)(t)->DistributeCredits, \ ++ (A_UINT32)(t)->pCredDistContext, \ ++ (A_UINT32)pList)); \ ++ (t)->DistributeCredits((t)->pCredDistContext, \ ++ (pList), \ ++ (reason)); \ ++} ++ ++/* our internal send packet completion handler when packets are submited to the AR6K device ++ * layer */ ++static void HTCSendPktCompletionHandler(void *Context, HTC_PACKET *pPacket) ++{ ++ HTC_TARGET *target = (HTC_TARGET *)Context; ++ HTC_ENDPOINT *pEndpoint = &target->EndPoint[pPacket->Endpoint]; ++ ++ ++ if (A_FAILED(pPacket->Status)) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ++ ("HTCSendPktCompletionHandler: request failed (status:%d, ep:%d) \n", ++ pPacket->Status, pPacket->Endpoint)); ++ } ++ /* first, fixup the head room we allocated */ ++ pPacket->pBuffer += HTC_HDR_LENGTH; ++ /* do completion */ ++ DO_EP_TX_COMPLETION(pEndpoint,pPacket); ++} ++ ++A_STATUS HTCIssueSend(HTC_TARGET *target, HTC_PACKET *pPacket, A_UINT8 SendFlags) ++{ ++ A_STATUS status; ++ A_UINT8 *pHdrBuf; ++ A_BOOL sync = FALSE; ++ ++ /* caller always provides headrooom */ ++ pPacket->pBuffer -= HTC_HDR_LENGTH; ++ pHdrBuf = pPacket->pBuffer; ++ /* setup frame header */ ++ A_SET_UINT16_FIELD(pHdrBuf,HTC_FRAME_HDR,PayloadLen,(A_UINT16)pPacket->ActualLength); ++ A_SET_UINT8_FIELD(pHdrBuf,HTC_FRAME_HDR,Flags,SendFlags); ++ A_SET_UINT8_FIELD(pHdrBuf,HTC_FRAME_HDR,EndpointID, (A_UINT8)pPacket->Endpoint); ++ ++ if (pPacket->Completion == NULL) { ++ /* mark that this request was synchronously issued */ ++ sync = TRUE; ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND, ++ ("+-HTCIssueSend: transmit length : %d (%s) \n", ++ pPacket->ActualLength + HTC_HDR_LENGTH, ++ sync ? "SYNC" : "ASYNC" )); ++ ++ /* send message to device */ ++ status = DevSendPacket(&target->Device, ++ pPacket, ++ pPacket->ActualLength + HTC_HDR_LENGTH); ++ ++ if (sync) { ++ /* use local sync variable. If this was issued asynchronously, pPacket is no longer ++ * safe to access. */ ++ pPacket->pBuffer += HTC_HDR_LENGTH; ++ } ++ ++ /* if this request was asynchronous, the packet completion routine will be invoked by ++ * the device layer when the HIF layer completes the request */ ++ ++ return status; ++} ++ ++/* try to send the current packet or a packet at the head of the TX queue, ++ * if there are no credits, the packet remains in the queue. ++ * this function always succeeds and returns a flag if the TX queue for ++ * the endpoint has hit the set limit */ ++static A_BOOL HTCTrySend(HTC_TARGET *target, ++ HTC_ENDPOINT *pEndpoint, ++ HTC_PACKET *pPacketToSend) ++{ ++ HTC_PACKET *pPacket; ++ int creditsRequired; ++ int remainder; ++ A_UINT8 sendFlags; ++ A_BOOL epFull = FALSE; ++ ++ LOCK_HTC_TX(target); ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND,("+HTCTrySend (pPkt:0x%X)\n",(A_UINT32)pPacketToSend)); ++ ++ if (pPacketToSend != NULL) { ++ /* caller supplied us a packet to queue to the tail of the HTC TX queue before ++ * we check the tx queue */ ++ HTC_PACKET_ENQUEUE(&pEndpoint->TxQueue,pPacketToSend); ++ pEndpoint->CurrentTxQueueDepth++; ++ } ++ ++ /* now drain the TX queue for transmission as long as we have enough ++ * credits */ ++ ++ while (1) { ++ ++ if (HTC_QUEUE_EMPTY(&pEndpoint->TxQueue)) { ++ /* nothing in the queue */ ++ break; ++ } ++ ++ sendFlags = 0; ++ ++ /* get packet at head, but don't remove it */ ++ pPacket = HTC_GET_PKT_AT_HEAD(&pEndpoint->TxQueue); ++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND,(" Got head packet:0x%X , Queue Depth: %d\n", ++ (A_UINT32)pPacket, pEndpoint->CurrentTxQueueDepth)); ++ ++ /* figure out how many credits this message requires */ ++ creditsRequired = (pPacket->ActualLength + HTC_HDR_LENGTH) / target->TargetCreditSize; ++ remainder = (pPacket->ActualLength + HTC_HDR_LENGTH) % target->TargetCreditSize; ++ ++ if (remainder) { ++ creditsRequired++; ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND,(" Creds Required:%d Got:%d\n", ++ creditsRequired, pEndpoint->CreditDist.TxCredits)); ++ ++ if (pEndpoint->CreditDist.TxCredits < creditsRequired) { ++ ++ /* not enough credits */ ++ ++ if (pPacket->Endpoint == ENDPOINT_0) { ++ /* leave it in the queue */ ++ break; ++ } ++ /* invoke the registered distribution function only if this is not ++ * endpoint 0, we let the driver layer provide more credits if it can. ++ * We pass the credit distribution list starting at the endpoint in question ++ * */ ++ ++ /* set how many credits we need */ ++ pEndpoint->CreditDist.TxCreditsSeek = ++ creditsRequired - pEndpoint->CreditDist.TxCredits; ++ DO_DISTRIBUTION(target, ++ HTC_CREDIT_DIST_SEEK_CREDITS, ++ "Seek Credits", ++ &pEndpoint->CreditDist); ++ ++ pEndpoint->CreditDist.TxCreditsSeek = 0; ++ ++ if (pEndpoint->CreditDist.TxCredits < creditsRequired) { ++ /* still not enough credits to send, leave packet in the queue */ ++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND, ++ (" Not enough credits for ep %d leaving packet in queue..\n", ++ pPacket->Endpoint)); ++ break; ++ } ++ ++ } ++ ++ pEndpoint->CreditDist.TxCredits -= creditsRequired; ++ INC_HTC_EP_STAT(pEndpoint, TxCreditsConsummed, creditsRequired); ++ ++ /* check if we need credits */ ++ if (pEndpoint->CreditDist.TxCredits < pEndpoint->CreditDist.TxCreditsPerMaxMsg) { ++ sendFlags |= HTC_FLAGS_NEED_CREDIT_UPDATE; ++ INC_HTC_EP_STAT(pEndpoint, TxCreditLowIndications, 1); ++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND,(" Host Needs Credits \n")); ++ } ++ ++ /* now we can fully dequeue */ ++ pPacket = HTC_PACKET_DEQUEUE(&pEndpoint->TxQueue); ++ pEndpoint->CurrentTxQueueDepth--; ++ ++ INC_HTC_EP_STAT(pEndpoint, TxIssued, 1); ++ ++ UNLOCK_HTC_TX(target); ++ ++ HTCIssueSend(target, pPacket, sendFlags); ++ ++ LOCK_HTC_TX(target); ++ ++ /* go back and check for more messages */ ++ } ++ ++ if (pEndpoint->CurrentTxQueueDepth >= pEndpoint->MaxTxQueueDepth) { ++ /* let caller know that this endpoint has reached the maximum depth */ ++ epFull = TRUE; ++ } ++ ++ UNLOCK_HTC_TX(target); ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND,("-HTCTrySend: \n")); ++ return epFull; ++} ++ ++/* HTC API - HTCSendPkt */ ++A_STATUS HTCSendPkt(HTC_HANDLE HTCHandle, HTC_PACKET *pPacket) ++{ ++ HTC_TARGET *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle); ++ HTC_ENDPOINT *pEndpoint; ++ HTC_ENDPOINT_ID ep; ++ A_STATUS status = A_OK; ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND, ++ ("+HTCSendPkt: Enter endPointId: %d, buffer: 0x%X, length: %d \n", ++ pPacket->Endpoint, (A_UINT32)pPacket->pBuffer, pPacket->ActualLength)); ++ ++ ep = pPacket->Endpoint; ++ AR_DEBUG_ASSERT(ep < ENDPOINT_MAX); ++ pEndpoint = &target->EndPoint[ep]; ++ ++ do { ++ ++ if (HTC_STOPPING(target)) { ++ status = A_ECANCELED; ++ pPacket->Status = status; ++ DO_EP_TX_COMPLETION(pEndpoint,pPacket); ++ break; ++ } ++ /* everything sent through this interface is asynchronous */ ++ /* fill in HTC completion routines */ ++ pPacket->Completion = HTCSendPktCompletionHandler; ++ pPacket->pContext = target; ++ ++ if (HTCTrySend(target, pEndpoint, pPacket)) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND, (" Endpoint %d, TX queue is full, Depth:%d, Max:%d \n", ++ ep, pEndpoint->CurrentTxQueueDepth, pEndpoint->MaxTxQueueDepth)); ++ /* queue is now full, let caller know */ ++ if (pEndpoint->EpCallBacks.EpSendFull != NULL) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND, (" Calling driver's send full callback.... \n")); ++ pEndpoint->EpCallBacks.EpSendFull(pEndpoint->EpCallBacks.pContext, ++ ep); ++ } ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND, ("-HTCSendPkt \n")); ++ } while (FALSE); ++ ++ return status; ++} ++ ++ ++/* check TX queues to drain because of credit distribution update */ ++static INLINE void HTCCheckEndpointTxQueues(HTC_TARGET *target) ++{ ++ HTC_ENDPOINT *pEndpoint; ++ HTC_ENDPOINT_CREDIT_DIST *pDistItem; ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND, ("+HTCCheckEndpointTxQueues \n")); ++ pDistItem = target->EpCreditDistributionListHead; ++ ++ /* run through the credit distribution list to see ++ * if there are packets queued ++ * NOTE: no locks need to be taken since the distribution list ++ * is not dynamic (cannot be re-ordered) and we are not modifying any state */ ++ while (pDistItem != NULL) { ++ pEndpoint = (HTC_ENDPOINT *)pDistItem->pHTCReserved; ++ ++ if (pEndpoint->CurrentTxQueueDepth > 0) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND, (" Ep %d has %d credits and %d Packets in TX Queue \n", ++ pDistItem->Endpoint, pEndpoint->CreditDist.TxCredits, pEndpoint->CurrentTxQueueDepth)); ++ /* try to start the stalled queue, this list is ordered by priority. ++ * Highest priority queue get's processed first, if there are credits available the ++ * highest priority queue will get a chance to reclaim credits from lower priority ++ * ones */ ++ HTCTrySend(target, pEndpoint, NULL); ++ } ++ ++ pDistItem = pDistItem->pNext; ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND, ("-HTCCheckEndpointTxQueues \n")); ++} ++ ++/* process credit reports and call distribution function */ ++void HTCProcessCreditRpt(HTC_TARGET *target, HTC_CREDIT_REPORT *pRpt, int NumEntries, HTC_ENDPOINT_ID FromEndpoint) ++{ ++ int i; ++ HTC_ENDPOINT *pEndpoint; ++ int totalCredits = 0; ++ A_BOOL doDist = FALSE; ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND, ("+HTCProcessCreditRpt, Credit Report Entries:%d \n", NumEntries)); ++ ++ /* lock out TX while we update credits */ ++ LOCK_HTC_TX(target); ++ ++ for (i = 0; i < NumEntries; i++, pRpt++) { ++ if (pRpt->EndpointID >= ENDPOINT_MAX) { ++ AR_DEBUG_ASSERT(FALSE); ++ break; ++ } ++ ++ pEndpoint = &target->EndPoint[pRpt->EndpointID]; ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND, (" Endpoint %d got %d credits \n", ++ pRpt->EndpointID, pRpt->Credits)); ++ ++ ++#ifdef HTC_EP_STAT_PROFILING ++ ++ INC_HTC_EP_STAT(pEndpoint, TxCreditRpts, 1); ++ INC_HTC_EP_STAT(pEndpoint, TxCreditsReturned, pRpt->Credits); ++ ++ if (FromEndpoint == pRpt->EndpointID) { ++ /* this credit report arrived on the same endpoint indicating it arrived in an RX ++ * packet */ ++ INC_HTC_EP_STAT(pEndpoint, TxCreditsFromRx, pRpt->Credits); ++ INC_HTC_EP_STAT(pEndpoint, TxCreditRptsFromRx, 1); ++ } else if (FromEndpoint == ENDPOINT_0) { ++ /* this credit arrived on endpoint 0 as a NULL message */ ++ INC_HTC_EP_STAT(pEndpoint, TxCreditsFromEp0, pRpt->Credits); ++ INC_HTC_EP_STAT(pEndpoint, TxCreditRptsFromEp0, 1); ++ } else { ++ /* arrived on another endpoint */ ++ INC_HTC_EP_STAT(pEndpoint, TxCreditsFromOther, pRpt->Credits); ++ INC_HTC_EP_STAT(pEndpoint, TxCreditRptsFromOther, 1); ++ } ++ ++#endif ++ ++ if (ENDPOINT_0 == pRpt->EndpointID) { ++ /* always give endpoint 0 credits back */ ++ pEndpoint->CreditDist.TxCredits += pRpt->Credits; ++ } else { ++ /* for all other endpoints, update credits to distribute, the distribution function ++ * will handle giving out credits back to the endpoints */ ++ pEndpoint->CreditDist.TxCreditsToDist += pRpt->Credits; ++ /* flag that we have to do the distribution */ ++ doDist = TRUE; ++ } ++ ++ totalCredits += pRpt->Credits; ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND, (" Report indicated %d credits to distribute \n", totalCredits)); ++ ++ if (doDist) { ++ /* this was a credit return based on a completed send operations ++ * note, this is done with the lock held */ ++ DO_DISTRIBUTION(target, ++ HTC_CREDIT_DIST_SEND_COMPLETE, ++ "Send Complete", ++ target->EpCreditDistributionListHead->pNext); ++ } ++ ++ UNLOCK_HTC_TX(target); ++ ++ if (totalCredits) { ++ HTCCheckEndpointTxQueues(target); ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_SEND, ("-HTCProcessCreditRpt \n")); ++} ++ ++/* flush endpoint TX queue */ ++static void HTCFlushEndpointTX(HTC_TARGET *target, HTC_ENDPOINT *pEndpoint, HTC_TX_TAG Tag) ++{ ++ HTC_PACKET *pPacket; ++ HTC_PACKET_QUEUE discardQueue; ++ ++ /* initialize the discard queue */ ++ INIT_HTC_PACKET_QUEUE(&discardQueue); ++ ++ LOCK_HTC_TX(target); ++ ++ /* interate from the front of the TX queue and flush out packets */ ++ ITERATE_OVER_LIST_ALLOW_REMOVE(&pEndpoint->TxQueue, pPacket, HTC_PACKET, ListLink) { ++ ++ /* check for removal */ ++ if ((HTC_TX_PACKET_TAG_ALL == Tag) || (Tag == pPacket->PktInfo.AsTx.Tag)) { ++ /* remove from queue */ ++ HTC_PACKET_REMOVE(pPacket); ++ /* add it to the discard pile */ ++ HTC_PACKET_ENQUEUE(&discardQueue, pPacket); ++ pEndpoint->CurrentTxQueueDepth--; ++ } ++ ++ } ITERATE_END; ++ ++ UNLOCK_HTC_TX(target); ++ ++ /* empty the discard queue */ ++ while (1) { ++ pPacket = HTC_PACKET_DEQUEUE(&discardQueue); ++ if (NULL == pPacket) { ++ break; ++ } ++ pPacket->Status = A_ECANCELED; ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, (" Flushing TX packet:0x%X, length:%d, ep:%d tag:0x%X \n", ++ (A_UINT32)pPacket, pPacket->ActualLength, pPacket->Endpoint, pPacket->PktInfo.AsTx.Tag)); ++ DO_EP_TX_COMPLETION(pEndpoint,pPacket); ++ } ++ ++} ++ ++void DumpCreditDist(HTC_ENDPOINT_CREDIT_DIST *pEPDist) ++{ ++ HTC_ENDPOINT *pEndpoint = (HTC_ENDPOINT *)pEPDist->pHTCReserved; ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_ANY, ("--- EP : %d ServiceID: 0x%X --------------\n", ++ pEPDist->Endpoint, pEPDist->ServiceID)); ++ AR_DEBUG_PRINTF(ATH_DEBUG_ANY, (" this:0x%X next:0x%X prev:0x%X\n", ++ (A_UINT32)pEPDist, (A_UINT32)pEPDist->pNext, (A_UINT32)pEPDist->pPrev)); ++ AR_DEBUG_PRINTF(ATH_DEBUG_ANY, (" DistFlags : 0x%X \n", pEPDist->DistFlags)); ++ AR_DEBUG_PRINTF(ATH_DEBUG_ANY, (" TxCreditsNorm : %d \n", pEPDist->TxCreditsNorm)); ++ AR_DEBUG_PRINTF(ATH_DEBUG_ANY, (" TxCreditsMin : %d \n", pEPDist->TxCreditsMin)); ++ AR_DEBUG_PRINTF(ATH_DEBUG_ANY, (" TxCredits : %d \n", pEPDist->TxCredits)); ++ AR_DEBUG_PRINTF(ATH_DEBUG_ANY, (" TxCreditsAssigned : %d \n", pEPDist->TxCreditsAssigned)); ++ AR_DEBUG_PRINTF(ATH_DEBUG_ANY, (" TxCreditsSeek : %d \n", pEPDist->TxCreditsSeek)); ++ AR_DEBUG_PRINTF(ATH_DEBUG_ANY, (" TxCreditSize : %d \n", pEPDist->TxCreditSize)); ++ AR_DEBUG_PRINTF(ATH_DEBUG_ANY, (" TxCreditsPerMaxMsg : %d \n", pEPDist->TxCreditsPerMaxMsg)); ++ AR_DEBUG_PRINTF(ATH_DEBUG_ANY, (" TxCreditsToDist : %d \n", pEPDist->TxCreditsToDist)); ++ AR_DEBUG_PRINTF(ATH_DEBUG_ANY, (" TxQueueDepth : %d \n", pEndpoint->CurrentTxQueueDepth)); ++ AR_DEBUG_PRINTF(ATH_DEBUG_ANY, ("----------------------------------------------------\n")); ++} ++ ++void DumpCreditDistStates(HTC_TARGET *target) ++{ ++ HTC_ENDPOINT_CREDIT_DIST *pEPList = target->EpCreditDistributionListHead; ++ ++ while (pEPList != NULL) { ++ DumpCreditDist(pEPList); ++ pEPList = pEPList->pNext; ++ } ++ ++ if (target->DistributeCredits != NULL) { ++ DO_DISTRIBUTION(target, ++ HTC_DUMP_CREDIT_STATE, ++ "Dump State", ++ NULL); ++ } ++} ++ ++/* flush all send packets from all endpoint queues */ ++void HTCFlushSendPkts(HTC_TARGET *target) ++{ ++ HTC_ENDPOINT *pEndpoint; ++ int i; ++ ++ DumpCreditDistStates(target); ++ ++ for (i = ENDPOINT_0; i < ENDPOINT_MAX; i++) { ++ pEndpoint = &target->EndPoint[i]; ++ if (pEndpoint->ServiceID == 0) { ++ /* not in use.. */ ++ continue; ++ } ++ HTCFlushEndpointTX(target,pEndpoint,HTC_TX_PACKET_TAG_ALL); ++ } ++ ++ ++} ++ ++/* HTC API to flush an endpoint's TX queue*/ ++void HTCFlushEndpoint(HTC_HANDLE HTCHandle, HTC_ENDPOINT_ID Endpoint, HTC_TX_TAG Tag) ++{ ++ HTC_TARGET *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle); ++ HTC_ENDPOINT *pEndpoint = &target->EndPoint[Endpoint]; ++ ++ if (pEndpoint->ServiceID == 0) { ++ AR_DEBUG_ASSERT(FALSE); ++ /* not in use.. */ ++ return; ++ } ++ ++ HTCFlushEndpointTX(target, pEndpoint, Tag); ++} ++ ++/* HTC API to indicate activity to the credit distribution function */ ++void HTCIndicateActivityChange(HTC_HANDLE HTCHandle, ++ HTC_ENDPOINT_ID Endpoint, ++ A_BOOL Active) ++{ ++ HTC_TARGET *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle); ++ HTC_ENDPOINT *pEndpoint = &target->EndPoint[Endpoint]; ++ A_BOOL doDist = FALSE; ++ ++ if (pEndpoint->ServiceID == 0) { ++ AR_DEBUG_ASSERT(FALSE); ++ /* not in use.. */ ++ return; ++ } ++ ++ LOCK_HTC_TX(target); ++ ++ if (Active) { ++ if (!(pEndpoint->CreditDist.DistFlags & HTC_EP_ACTIVE)) { ++ /* mark active now */ ++ pEndpoint->CreditDist.DistFlags |= HTC_EP_ACTIVE; ++ doDist = TRUE; ++ } ++ } else { ++ if (pEndpoint->CreditDist.DistFlags & HTC_EP_ACTIVE) { ++ /* mark inactive now */ ++ pEndpoint->CreditDist.DistFlags &= ~HTC_EP_ACTIVE; ++ doDist = TRUE; ++ } ++ } ++ ++ if (doDist) { ++ /* do distribution again based on activity change ++ * note, this is done with the lock held */ ++ DO_DISTRIBUTION(target, ++ HTC_CREDIT_DIST_ACTIVITY_CHANGE, ++ "Activity Change", ++ target->EpCreditDistributionListHead->pNext); ++ } ++ ++ UNLOCK_HTC_TX(target); ++ ++} +diff --git a/drivers/sdio/function/wlan/ar6000/htc/htc_services.c b/drivers/sdio/function/wlan/ar6000/htc/htc_services.c +new file mode 100644 +index 0000000..e5d50d1 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/htc/htc_services.c +@@ -0,0 +1,403 @@ ++/* ++ * ++ * Copyright (c) 2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++#include "htc_internal.h" ++ ++void HTCControlTxComplete(void *Context, HTC_PACKET *pPacket) ++{ ++ /* not implemented ++ * we do not send control TX frames during normal runtime, only during setup */ ++ AR_DEBUG_ASSERT(FALSE); ++} ++ ++ /* callback when a control message arrives on this endpoint */ ++void HTCControlRecv(void *Context, HTC_PACKET *pPacket) ++{ ++ AR_DEBUG_ASSERT(pPacket->Endpoint == ENDPOINT_0); ++ ++ /* the only control messages we are expecting are NULL messages (credit resports), which should ++ * never get here */ ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ++ ("HTCControlRecv, got message with length:%d \n", ++ pPacket->ActualLength + HTC_HDR_LENGTH)); ++ ++ /* dump header and message */ ++ DebugDumpBytes(pPacket->pBuffer - HTC_HDR_LENGTH, ++ pPacket->ActualLength + HTC_HDR_LENGTH, ++ "Unexpected ENDPOINT 0 Message"); ++ ++ HTC_RECYCLE_RX_PKT((HTC_TARGET*)Context,pPacket); ++} ++ ++A_STATUS HTCSendSetupComplete(HTC_TARGET *target) ++{ ++ HTC_PACKET *pSendPacket = NULL; ++ A_STATUS status; ++ HTC_SETUP_COMPLETE_MSG *pSetupComplete; ++ ++ do { ++ /* allocate a packet to send to the target */ ++ pSendPacket = HTC_ALLOC_CONTROL_TX(target); ++ ++ if (NULL == pSendPacket) { ++ status = A_NO_MEMORY; ++ break; ++ } ++ ++ /* assemble setup complete message */ ++ pSetupComplete = (HTC_SETUP_COMPLETE_MSG *)pSendPacket->pBuffer; ++ A_MEMZERO(pSetupComplete,sizeof(HTC_SETUP_COMPLETE_MSG)); ++ pSetupComplete->MessageID = HTC_MSG_SETUP_COMPLETE_ID; ++ ++ SET_HTC_PACKET_INFO_TX(pSendPacket, ++ NULL, ++ (A_UINT8 *)pSetupComplete, ++ sizeof(HTC_SETUP_COMPLETE_MSG), ++ ENDPOINT_0, ++ HTC_SERVICE_TX_PACKET_TAG); ++ ++ /* we want synchronous operation */ ++ pSendPacket->Completion = NULL; ++ /* send the message */ ++ status = HTCIssueSend(target,pSendPacket,0); ++ ++ } while (FALSE); ++ ++ if (pSendPacket != NULL) { ++ HTC_FREE_CONTROL_TX(target,pSendPacket); ++ } ++ ++ return status; ++} ++ ++ ++A_STATUS HTCConnectService(HTC_HANDLE HTCHandle, ++ HTC_SERVICE_CONNECT_REQ *pConnectReq, ++ HTC_SERVICE_CONNECT_RESP *pConnectResp) ++{ ++ HTC_TARGET *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle); ++ A_STATUS status = A_OK; ++ HTC_PACKET *pRecvPacket = NULL; ++ HTC_PACKET *pSendPacket = NULL; ++ HTC_CONNECT_SERVICE_RESPONSE_MSG *pResponseMsg; ++ HTC_CONNECT_SERVICE_MSG *pConnectMsg; ++ HTC_ENDPOINT_ID assignedEndpoint = ENDPOINT_MAX; ++ HTC_ENDPOINT *pEndpoint; ++ int maxMsgSize = 0; ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("+HTCConnectService, target:0x%X SvcID:0x%X \n", ++ (A_UINT32)target, pConnectReq->ServiceID)); ++ ++ do { ++ ++ AR_DEBUG_ASSERT(pConnectReq->ServiceID != 0); ++ ++ if (HTC_CTRL_RSVD_SVC == pConnectReq->ServiceID) { ++ /* special case for pseudo control service */ ++ assignedEndpoint = ENDPOINT_0; ++ maxMsgSize = HTC_MAX_CONTROL_MESSAGE_LENGTH; ++ } else { ++ /* allocate a packet to send to the target */ ++ pSendPacket = HTC_ALLOC_CONTROL_TX(target); ++ ++ if (NULL == pSendPacket) { ++ AR_DEBUG_ASSERT(FALSE); ++ status = A_NO_MEMORY; ++ break; ++ } ++ /* assemble connect service message */ ++ pConnectMsg = (HTC_CONNECT_SERVICE_MSG *)pSendPacket->pBuffer; ++ AR_DEBUG_ASSERT(pConnectMsg != NULL); ++ A_MEMZERO(pConnectMsg,sizeof(HTC_CONNECT_SERVICE_MSG)); ++ pConnectMsg->MessageID = HTC_MSG_CONNECT_SERVICE_ID; ++ pConnectMsg->ServiceID = pConnectReq->ServiceID; ++ pConnectMsg->ConnectionFlags = pConnectReq->ConnectionFlags; ++ /* check caller if it wants to transfer meta data */ ++ if ((pConnectReq->pMetaData != NULL) && ++ (pConnectReq->MetaDataLength <= HTC_SERVICE_META_DATA_MAX_LENGTH)) { ++ /* copy meta data into message buffer (after header ) */ ++ A_MEMCPY((A_UINT8 *)pConnectMsg + sizeof(HTC_CONNECT_SERVICE_MSG), ++ pConnectReq->pMetaData, ++ pConnectReq->MetaDataLength); ++ pConnectMsg->ServiceMetaLength = pConnectReq->MetaDataLength; ++ } ++ ++ SET_HTC_PACKET_INFO_TX(pSendPacket, ++ NULL, ++ (A_UINT8 *)pConnectMsg, ++ sizeof(HTC_CONNECT_SERVICE_MSG) + pConnectMsg->ServiceMetaLength, ++ ENDPOINT_0, ++ HTC_SERVICE_TX_PACKET_TAG); ++ ++ /* we want synchronous operation */ ++ pSendPacket->Completion = NULL; ++ ++ status = HTCIssueSend(target,pSendPacket,0); ++ ++ if (A_FAILED(status)) { ++ break; ++ } ++ ++ /* wait for response */ ++ status = HTCWaitforControlMessage(target, &pRecvPacket); ++ ++ if (A_FAILED(status)) { ++ break; ++ } ++ /* we controlled the buffer creation so it has to be properly aligned */ ++ pResponseMsg = (HTC_CONNECT_SERVICE_RESPONSE_MSG *)pRecvPacket->pBuffer; ++ ++ if ((pResponseMsg->MessageID != HTC_MSG_CONNECT_SERVICE_RESPONSE_ID) || ++ (pRecvPacket->ActualLength < sizeof(HTC_CONNECT_SERVICE_RESPONSE_MSG))) { ++ /* this message is not valid */ ++ AR_DEBUG_ASSERT(FALSE); ++ status = A_EPROTO; ++ break; ++ } ++ ++ pConnectResp->ConnectRespCode = pResponseMsg->Status; ++ /* check response status */ ++ if (pResponseMsg->Status != HTC_SERVICE_SUCCESS) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ++ (" Target failed service 0x%X connect request (status:%d)\n", ++ pResponseMsg->ServiceID, pResponseMsg->Status)); ++ status = A_EPROTO; ++ break; ++ } ++ ++ assignedEndpoint = pResponseMsg->EndpointID; ++ maxMsgSize = pResponseMsg->MaxMsgSize; ++ ++ if ((pConnectResp->pMetaData != NULL) && ++ (pResponseMsg->ServiceMetaLength > 0) && ++ (pResponseMsg->ServiceMetaLength <= HTC_SERVICE_META_DATA_MAX_LENGTH)) { ++ /* caller supplied a buffer and the target responded with data */ ++ int copyLength = min((int)pConnectResp->BufferLength, (int)pResponseMsg->ServiceMetaLength); ++ /* copy the meta data */ ++ A_MEMCPY(pConnectResp->pMetaData, ++ ((A_UINT8 *)pResponseMsg) + sizeof(HTC_CONNECT_SERVICE_RESPONSE_MSG), ++ copyLength); ++ pConnectResp->ActualLength = copyLength; ++ } ++ ++ } ++ ++ /* the rest of these are parameter checks so set the error status */ ++ status = A_EPROTO; ++ ++ if (assignedEndpoint >= ENDPOINT_MAX) { ++ AR_DEBUG_ASSERT(FALSE); ++ break; ++ } ++ ++ if (0 == maxMsgSize) { ++ AR_DEBUG_ASSERT(FALSE); ++ break; ++ } ++ ++ pEndpoint = &target->EndPoint[assignedEndpoint]; ++ ++ if (pEndpoint->ServiceID != 0) { ++ /* endpoint already in use! */ ++ AR_DEBUG_ASSERT(FALSE); ++ break; ++ } ++ ++ /* return assigned endpoint to caller */ ++ pConnectResp->Endpoint = assignedEndpoint; ++ pConnectResp->MaxMsgLength = maxMsgSize; ++ ++ /* setup the endpoint */ ++ pEndpoint->ServiceID = pConnectReq->ServiceID; /* this marks the endpoint in use */ ++ pEndpoint->MaxTxQueueDepth = pConnectReq->MaxSendQueueDepth; ++ pEndpoint->MaxMsgLength = maxMsgSize; ++ /* copy all the callbacks */ ++ pEndpoint->EpCallBacks = pConnectReq->EpCallbacks; ++ INIT_HTC_PACKET_QUEUE(&pEndpoint->RxBuffers); ++ INIT_HTC_PACKET_QUEUE(&pEndpoint->TxQueue); ++ /* set the credit distribution info for this endpoint, this information is ++ * passed back to the credit distribution callback function */ ++ pEndpoint->CreditDist.ServiceID = pConnectReq->ServiceID; ++ pEndpoint->CreditDist.pHTCReserved = pEndpoint; ++ pEndpoint->CreditDist.Endpoint = assignedEndpoint; ++ pEndpoint->CreditDist.TxCreditSize = target->TargetCreditSize; ++ pEndpoint->CreditDist.TxCreditsPerMaxMsg = maxMsgSize / target->TargetCreditSize; ++ ++ if (0 == pEndpoint->CreditDist.TxCreditsPerMaxMsg) { ++ pEndpoint->CreditDist.TxCreditsPerMaxMsg = 1; ++ } ++ ++ status = A_OK; ++ ++ } while (FALSE); ++ ++ if (pSendPacket != NULL) { ++ HTC_FREE_CONTROL_TX(target,pSendPacket); ++ } ++ ++ if (pRecvPacket != NULL) { ++ HTC_FREE_CONTROL_RX(target,pRecvPacket); ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("-HTCConnectService \n")); ++ ++ return status; ++} ++ ++static void AddToEndpointDistList(HTC_TARGET *target, HTC_ENDPOINT_CREDIT_DIST *pEpDist) ++{ ++ HTC_ENDPOINT_CREDIT_DIST *pCurEntry,*pLastEntry; ++ ++ if (NULL == target->EpCreditDistributionListHead) { ++ target->EpCreditDistributionListHead = pEpDist; ++ pEpDist->pNext = NULL; ++ pEpDist->pPrev = NULL; ++ return; ++ } ++ ++ /* queue to the end of the list, this does not have to be very ++ * fast since this list is built at startup time */ ++ pCurEntry = target->EpCreditDistributionListHead; ++ ++ while (pCurEntry) { ++ pLastEntry = pCurEntry; ++ pCurEntry = pCurEntry->pNext; ++ } ++ ++ pLastEntry->pNext = pEpDist; ++ pEpDist->pPrev = pLastEntry; ++ pEpDist->pNext = NULL; ++} ++ ++ ++ ++/* default credit init callback */ ++static void HTCDefaultCreditInit(void *Context, ++ HTC_ENDPOINT_CREDIT_DIST *pEPList, ++ int TotalCredits) ++{ ++ HTC_ENDPOINT_CREDIT_DIST *pCurEpDist; ++ int totalEps = 0; ++ int creditsPerEndpoint; ++ ++ pCurEpDist = pEPList; ++ /* first run through the list and figure out how many endpoints we are dealing with */ ++ while (pCurEpDist != NULL) { ++ pCurEpDist = pCurEpDist->pNext; ++ totalEps++; ++ } ++ ++ /* even distribution */ ++ creditsPerEndpoint = TotalCredits/totalEps; ++ ++ pCurEpDist = pEPList; ++ /* run through the list and set minimum and normal credits and ++ * provide the endpoint with some credits to start */ ++ while (pCurEpDist != NULL) { ++ ++ if (creditsPerEndpoint < pCurEpDist->TxCreditsPerMaxMsg) { ++ /* too many endpoints and not enough credits */ ++ AR_DEBUG_ASSERT(FALSE); ++ break; ++ } ++ /* our minimum is set for at least 1 max message */ ++ pCurEpDist->TxCreditsMin = pCurEpDist->TxCreditsPerMaxMsg; ++ /* this value is ignored by our credit alg, since we do ++ * not dynamically adjust credits, this is the policy of ++ * the "default" credit distribution, something simple and easy */ ++ pCurEpDist->TxCreditsNorm = 0xFFFF; ++ /* give the endpoint minimum credits */ ++ pCurEpDist->TxCredits = creditsPerEndpoint; ++ pCurEpDist->TxCreditsAssigned = creditsPerEndpoint; ++ pCurEpDist = pCurEpDist->pNext; ++ } ++ ++} ++ ++/* default credit distribution callback, NOTE, this callback holds the TX lock */ ++void HTCDefaultCreditDist(void *Context, ++ HTC_ENDPOINT_CREDIT_DIST *pEPDistList, ++ HTC_CREDIT_DIST_REASON Reason) ++{ ++ HTC_ENDPOINT_CREDIT_DIST *pCurEpDist; ++ ++ if (Reason == HTC_CREDIT_DIST_SEND_COMPLETE) { ++ pCurEpDist = pEPDistList; ++ /* simple distribution */ ++ while (pCurEpDist != NULL) { ++ if (pCurEpDist->TxCreditsToDist > 0) { ++ /* just give the endpoint back the credits */ ++ pCurEpDist->TxCredits += pCurEpDist->TxCreditsToDist; ++ pCurEpDist->TxCreditsToDist = 0; ++ } ++ pCurEpDist = pCurEpDist->pNext; ++ } ++ } ++ ++ /* note we do not need to handle the other reason codes as this is a very ++ * simple distribution scheme, no need to seek for more credits or handle inactivity */ ++} ++ ++void HTCSetCreditDistribution(HTC_HANDLE HTCHandle, ++ void *pCreditDistContext, ++ HTC_CREDIT_DIST_CALLBACK CreditDistFunc, ++ HTC_CREDIT_INIT_CALLBACK CreditInitFunc, ++ HTC_SERVICE_ID ServicePriorityOrder[], ++ int ListLength) ++{ ++ HTC_TARGET *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle); ++ int i; ++ int ep; ++ ++ if (CreditInitFunc != NULL) { ++ /* caller has supplied their own distribution functions */ ++ target->InitCredits = CreditInitFunc; ++ AR_DEBUG_ASSERT(CreditDistFunc != NULL); ++ target->DistributeCredits = CreditDistFunc; ++ target->pCredDistContext = pCreditDistContext; ++ } else { ++ /* caller wants HTC to do distribution */ ++ /* if caller wants service to handle distributions then ++ * it must set both of these to NULL! */ ++ AR_DEBUG_ASSERT(CreditDistFunc == NULL); ++ target->InitCredits = HTCDefaultCreditInit; ++ target->DistributeCredits = HTCDefaultCreditDist; ++ target->pCredDistContext = target; ++ } ++ ++ /* always add HTC control endpoint first, we only expose the list after the ++ * first one, this is added for TX queue checking */ ++ AddToEndpointDistList(target, &target->EndPoint[ENDPOINT_0].CreditDist); ++ ++ /* build the list of credit distribution structures in priority order ++ * supplied by the caller, these will follow endpoint 0 */ ++ for (i = 0; i < ListLength; i++) { ++ /* match services with endpoints and add the endpoints to the distribution list ++ * in FIFO order */ ++ for (ep = ENDPOINT_1; ep < ENDPOINT_MAX; ep++) { ++ if (target->EndPoint[ep].ServiceID == ServicePriorityOrder[i]) { ++ /* queue this one to the list */ ++ AddToEndpointDistList(target, &target->EndPoint[ep].CreditDist); ++ break; ++ } ++ } ++ AR_DEBUG_ASSERT(ep < ENDPOINT_MAX); ++ } ++ ++} +diff --git a/drivers/sdio/function/wlan/ar6000/include/AR6001_regdump.h b/drivers/sdio/function/wlan/ar6000/include/AR6001_regdump.h +new file mode 100644 +index 0000000..c1bcade +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/AR6001_regdump.h +@@ -0,0 +1,100 @@ ++/* ++ * Copyright (c) 2006 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * $ATH_LICENSE_HOSTSDK0_C$ ++ * ++ */ ++ ++#ifndef __AR6000_REGDUMP_H__ ++#define __AR6000_REGDUMP_H__ ++ ++#if !defined(__ASSEMBLER__) ++/* ++ * Target CPU state at the time of failure is reflected ++ * in a register dump, which the Host can fetch through ++ * the diagnostic window. ++ */ ++ ++struct MIPS_exception_frame_s { ++ A_UINT32 pc; /* Program Counter */ ++ A_UINT32 at; /* MIPS General Purpose registers */ ++ A_UINT32 v0; ++ A_UINT32 v1; ++ A_UINT32 a0; ++ A_UINT32 a1; ++ A_UINT32 a2; ++ A_UINT32 a3; ++ A_UINT32 t0; ++ A_UINT32 t1; ++ A_UINT32 t2; ++ A_UINT32 t3; ++ A_UINT32 t4; ++ A_UINT32 t5; ++ A_UINT32 t6; ++ A_UINT32 t7; ++ A_UINT32 s0; ++ A_UINT32 s1; ++ A_UINT32 s2; ++ A_UINT32 s3; ++ A_UINT32 s4; ++ A_UINT32 s5; ++ A_UINT32 s6; ++ A_UINT32 s7; ++ A_UINT32 t8; ++ A_UINT32 t9; ++ A_UINT32 k0; ++ A_UINT32 k1; ++ A_UINT32 gp; ++ A_UINT32 sp; ++ A_UINT32 s8; ++ A_UINT32 ra; ++ A_UINT32 cause; /* Selected coprocessor regs */ ++ A_UINT32 status; ++}; ++typedef struct MIPS_exception_frame_s CPU_exception_frame_t; ++ ++#endif ++ ++/* ++ * Offsets into MIPS_exception_frame structure, for use in assembler code ++ * MUST MATCH C STRUCTURE ABOVE ++ */ ++#define RD_pc 0 ++#define RD_at 1 ++#define RD_v0 2 ++#define RD_v1 3 ++#define RD_a0 4 ++#define RD_a1 5 ++#define RD_a2 6 ++#define RD_a3 7 ++#define RD_t0 8 ++#define RD_t1 9 ++#define RD_t2 10 ++#define RD_t3 11 ++#define RD_t4 12 ++#define RD_t5 13 ++#define RD_t6 14 ++#define RD_t7 15 ++#define RD_s0 16 ++#define RD_s1 17 ++#define RD_s2 18 ++#define RD_s3 19 ++#define RD_s4 20 ++#define RD_s5 21 ++#define RD_s6 22 ++#define RD_s7 23 ++#define RD_t8 24 ++#define RD_t9 25 ++#define RD_k0 26 ++#define RD_k1 27 ++#define RD_gp 28 ++#define RD_sp 29 ++#define RD_s8 30 ++#define RD_ra 31 ++#define RD_cause 32 ++#define RD_status 33 ++ ++#define RD_SIZE (34*4) /* Space for this number of words */ ++ ++#endif /* __AR6000_REGDUMP_H__ */ +diff --git a/drivers/sdio/function/wlan/ar6000/include/AR6K_version.h b/drivers/sdio/function/wlan/ar6000/include/AR6K_version.h +new file mode 100644 +index 0000000..d5b2a20 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/AR6K_version.h +@@ -0,0 +1,36 @@ ++#define __VER_MAJOR_ 2 ++#define __VER_MINOR_ 0 ++#define __VER_PATCH_ 0 ++ ++ ++/* ++ * Copyright (c) 2004-2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * $ATH_LICENSE_HOSTSDK0_C$ ++ * ++ * The makear6ksdk script (used for release builds) modifies the following line. ++ */ ++#define __BUILD_NUMBER_ 18 ++ ++ ++/* Format of the version number. */ ++#define VER_MAJOR_BIT_OFFSET 28 ++#define VER_MINOR_BIT_OFFSET 24 ++#define VER_PATCH_BIT_OFFSET 16 ++#define VER_BUILD_NUM_BIT_OFFSET 0 ++ ++ ++/* ++ * The version has the following format: ++ * Bits 28-31: Major version ++ * Bits 24-27: Minor version ++ * Bits 16-23: Patch version ++ * Bits 0-15: Build number (automatically generated during build process ) ++ * E.g. Build 1.1.3.7 would be represented as 0x11030007. ++ * ++ * DO NOT split the following macro into multiple lines as this may confuse the build scripts. ++ */ ++#define AR6K_SW_VERSION ( ( __VER_MAJOR_ << VER_MAJOR_BIT_OFFSET ) + ( __VER_MINOR_ << VER_MINOR_BIT_OFFSET ) + ( __VER_PATCH_ << VER_PATCH_BIT_OFFSET ) + ( __BUILD_NUMBER_ << VER_BUILD_NUM_BIT_OFFSET ) ) ++ ++ +diff --git a/drivers/sdio/function/wlan/ar6000/include/AR6K_version.h.NEW b/drivers/sdio/function/wlan/ar6000/include/AR6K_version.h.NEW +new file mode 100644 +index 0000000..d5b2a20 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/AR6K_version.h.NEW +@@ -0,0 +1,36 @@ ++#define __VER_MAJOR_ 2 ++#define __VER_MINOR_ 0 ++#define __VER_PATCH_ 0 ++ ++ ++/* ++ * Copyright (c) 2004-2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * $ATH_LICENSE_HOSTSDK0_C$ ++ * ++ * The makear6ksdk script (used for release builds) modifies the following line. ++ */ ++#define __BUILD_NUMBER_ 18 ++ ++ ++/* Format of the version number. */ ++#define VER_MAJOR_BIT_OFFSET 28 ++#define VER_MINOR_BIT_OFFSET 24 ++#define VER_PATCH_BIT_OFFSET 16 ++#define VER_BUILD_NUM_BIT_OFFSET 0 ++ ++ ++/* ++ * The version has the following format: ++ * Bits 28-31: Major version ++ * Bits 24-27: Minor version ++ * Bits 16-23: Patch version ++ * Bits 0-15: Build number (automatically generated during build process ) ++ * E.g. Build 1.1.3.7 would be represented as 0x11030007. ++ * ++ * DO NOT split the following macro into multiple lines as this may confuse the build scripts. ++ */ ++#define AR6K_SW_VERSION ( ( __VER_MAJOR_ << VER_MAJOR_BIT_OFFSET ) + ( __VER_MINOR_ << VER_MINOR_BIT_OFFSET ) + ( __VER_PATCH_ << VER_PATCH_BIT_OFFSET ) + ( __BUILD_NUMBER_ << VER_BUILD_NUM_BIT_OFFSET ) ) ++ ++ +diff --git a/drivers/sdio/function/wlan/ar6000/include/AR6Khwreg.h b/drivers/sdio/function/wlan/ar6000/include/AR6Khwreg.h +new file mode 100644 +index 0000000..ecfdf20 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/AR6Khwreg.h +@@ -0,0 +1,147 @@ ++/* ++ * Copyright (c) 2004-2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * $ATH_LICENSE_HOSTSDK0_C$ ++ * ++ * This file contains the definitions for AR6001 registers ++ * that may be directly manipulated by Host software. ++ */ ++ ++#ifndef __AR6KHWREG_H__ ++#define __AR6KHWREG_H__ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++/* Host registers */ ++#define HOST_INT_STATUS_ADDRESS 0x00000400 ++#define CPU_INT_STATUS_ADDRESS 0x00000401 ++#define ERROR_INT_STATUS_ADDRESS 0x00000402 ++#define INT_STATUS_ENABLE_ADDRESS 0x00000418 ++#define CPU_INT_STATUS_ENABLE_ADDRESS 0x00000419 ++#define COUNT_ADDRESS 0x00000420 ++#define COUNT_DEC_ADDRESS 0x00000440 ++#define WINDOW_DATA_ADDRESS 0x00000474 ++#define WINDOW_WRITE_ADDR_ADDRESS 0x00000478 ++#define WINDOW_READ_ADDR_ADDRESS 0x0000047c ++ ++/* Target addresses */ ++#define RESET_CONTROL_ADDRESS 0x0c000000 ++#define MC_REMAP_VALID_ADDRESS 0x0c004080 ++#define MC_REMAP_SIZE_ADDRESS 0x0c004100 ++#define MC_REMAP_COMPARE_ADDRESS 0x0c004180 ++#define MC_REMAP_TARGET_ADDRESS 0x0c004200 ++#define LOCAL_COUNT_ADDRESS 0x0c014080 ++#define LOCAL_SCRATCH_ADDRESS 0x0c0140c0 ++ ++ ++#define INT_STATUS_ENABLE_ERROR_MSB 7 ++#define INT_STATUS_ENABLE_ERROR_LSB 7 ++#define INT_STATUS_ENABLE_ERROR_MASK 0x00000080 ++#define INT_STATUS_ENABLE_ERROR_GET(x) (((x) & INT_STATUS_ENABLE_ERROR_MASK) >> INT_STATUS_ENABLE_ERROR_LSB) ++#define INT_STATUS_ENABLE_ERROR_SET(x) (((x) << INT_STATUS_ENABLE_ERROR_LSB) & INT_STATUS_ENABLE_ERROR_MASK) ++ ++#define INT_STATUS_ENABLE_CPU_MSB 6 ++#define INT_STATUS_ENABLE_CPU_LSB 6 ++#define INT_STATUS_ENABLE_CPU_MASK 0x00000040 ++#define INT_STATUS_ENABLE_CPU_GET(x) (((x) & INT_STATUS_ENABLE_CPU_MASK) >> INT_STATUS_ENABLE_CPU_LSB) ++#define INT_STATUS_ENABLE_CPU_SET(x) (((x) << INT_STATUS_ENABLE_CPU_LSB) & INT_STATUS_ENABLE_CPU_MASK) ++ ++#define INT_STATUS_ENABLE_COUNTER_MSB 4 ++#define INT_STATUS_ENABLE_COUNTER_LSB 4 ++#define INT_STATUS_ENABLE_COUNTER_MASK 0x00000010 ++#define INT_STATUS_ENABLE_COUNTER_GET(x) (((x) & INT_STATUS_ENABLE_COUNTER_MASK) >> INT_STATUS_ENABLE_COUNTER_LSB) ++#define INT_STATUS_ENABLE_COUNTER_SET(x) (((x) << INT_STATUS_ENABLE_COUNTER_LSB) & INT_STATUS_ENABLE_COUNTER_MASK) ++ ++#define INT_STATUS_ENABLE_MBOX_DATA_MSB 3 ++#define INT_STATUS_ENABLE_MBOX_DATA_LSB 0 ++#define INT_STATUS_ENABLE_MBOX_DATA_MASK 0x0000000f ++#define INT_STATUS_ENABLE_MBOX_DATA_GET(x) (((x) & INT_STATUS_ENABLE_MBOX_DATA_MASK) >> INT_STATUS_ENABLE_MBOX_DATA_LSB) ++#define INT_STATUS_ENABLE_MBOX_DATA_SET(x) (((x) << INT_STATUS_ENABLE_MBOX_DATA_LSB) & INT_STATUS_ENABLE_MBOX_DATA_MASK) ++ ++#define ERROR_STATUS_ENABLE_RX_UNDERFLOW_MSB 1 ++#define ERROR_STATUS_ENABLE_RX_UNDERFLOW_LSB 1 ++#define ERROR_STATUS_ENABLE_RX_UNDERFLOW_MASK 0x00000002 ++#define ERROR_STATUS_ENABLE_RX_UNDERFLOW_GET(x) (((x) & ERROR_STATUS_ENABLE_RX_UNDERFLOW_MASK) >> ERROR_STATUS_ENABLE_RX_UNDERFLOW_LSB) ++#define ERROR_STATUS_ENABLE_RX_UNDERFLOW_SET(x) (((x) << ERROR_STATUS_ENABLE_RX_UNDERFLOW_LSB) & ERROR_STATUS_ENABLE_RX_UNDERFLOW_MASK) ++ ++#define ERROR_STATUS_ENABLE_TX_OVERFLOW_MSB 0 ++#define ERROR_STATUS_ENABLE_TX_OVERFLOW_LSB 0 ++#define ERROR_STATUS_ENABLE_TX_OVERFLOW_MASK 0x00000001 ++#define ERROR_STATUS_ENABLE_TX_OVERFLOW_GET(x) (((x) & ERROR_STATUS_ENABLE_TX_OVERFLOW_MASK) >> ERROR_STATUS_ENABLE_TX_OVERFLOW_LSB) ++#define ERROR_STATUS_ENABLE_TX_OVERFLOW_SET(x) (((x) << ERROR_STATUS_ENABLE_TX_OVERFLOW_LSB) & ERROR_STATUS_ENABLE_TX_OVERFLOW_MASK) ++ ++ ++#define CPU_INT_STATUS_ENABLE_BIT_MSB 7 ++#define CPU_INT_STATUS_ENABLE_BIT_LSB 0 ++#define CPU_INT_STATUS_ENABLE_BIT_MASK 0x000000ff ++#define CPU_INT_STATUS_ENABLE_BIT_GET(x) (((x) & CPU_INT_STATUS_ENABLE_BIT_MASK) >> CPU_INT_STATUS_ENABLE_BIT_LSB) ++#define CPU_INT_STATUS_ENABLE_BIT_SET(x) (((x) << CPU_INT_STATUS_ENABLE_BIT_LSB) & CPU_INT_STATUS_ENABLE_BIT_MASK) ++ ++#define COUNTER_INT_STATUS_ENABLE_BIT_MSB 7 ++#define COUNTER_INT_STATUS_ENABLE_BIT_LSB 0 ++#define COUNTER_INT_STATUS_ENABLE_BIT_MASK 0x000000ff ++#define COUNTER_INT_STATUS_ENABLE_BIT_GET(x) (((x) & COUNTER_INT_STATUS_ENABLE_BIT_MASK) >> COUNTER_INT_STATUS_ENABLE_BIT_LSB) ++#define COUNTER_INT_STATUS_ENABLE_BIT_SET(x) (((x) << COUNTER_INT_STATUS_ENABLE_BIT_LSB) & COUNTER_INT_STATUS_ENABLE_BIT_MASK) ++ ++#define ERROR_INT_STATUS_WAKEUP_MSB 2 ++#define ERROR_INT_STATUS_WAKEUP_LSB 2 ++#define ERROR_INT_STATUS_WAKEUP_MASK 0x00000004 ++#define ERROR_INT_STATUS_WAKEUP_GET(x) (((x) & ERROR_INT_STATUS_WAKEUP_MASK) >> ERROR_INT_STATUS_WAKEUP_LSB) ++#define ERROR_INT_STATUS_WAKEUP_SET(x) (((x) << ERROR_INT_STATUS_WAKEUP_LSB) & ERROR_INT_STATUS_WAKEUP_MASK) ++ ++#define ERROR_INT_STATUS_RX_UNDERFLOW_MSB 1 ++#define ERROR_INT_STATUS_RX_UNDERFLOW_LSB 1 ++#define ERROR_INT_STATUS_RX_UNDERFLOW_MASK 0x00000002 ++#define ERROR_INT_STATUS_RX_UNDERFLOW_GET(x) (((x) & ERROR_INT_STATUS_RX_UNDERFLOW_MASK) >> ERROR_INT_STATUS_RX_UNDERFLOW_LSB) ++#define ERROR_INT_STATUS_RX_UNDERFLOW_SET(x) (((x) << ERROR_INT_STATUS_RX_UNDERFLOW_LSB) & ERROR_INT_STATUS_RX_UNDERFLOW_MASK) ++ ++#define ERROR_INT_STATUS_TX_OVERFLOW_MSB 0 ++#define ERROR_INT_STATUS_TX_OVERFLOW_LSB 0 ++#define ERROR_INT_STATUS_TX_OVERFLOW_MASK 0x00000001 ++#define ERROR_INT_STATUS_TX_OVERFLOW_GET(x) (((x) & ERROR_INT_STATUS_TX_OVERFLOW_MASK) >> ERROR_INT_STATUS_TX_OVERFLOW_LSB) ++#define ERROR_INT_STATUS_TX_OVERFLOW_SET(x) (((x) << ERROR_INT_STATUS_TX_OVERFLOW_LSB) & ERROR_INT_STATUS_TX_OVERFLOW_MASK) ++ ++#define HOST_INT_STATUS_ERROR_MSB 7 ++#define HOST_INT_STATUS_ERROR_LSB 7 ++#define HOST_INT_STATUS_ERROR_MASK 0x00000080 ++#define HOST_INT_STATUS_ERROR_GET(x) (((x) & HOST_INT_STATUS_ERROR_MASK) >> HOST_INT_STATUS_ERROR_LSB) ++#define HOST_INT_STATUS_ERROR_SET(x) (((x) << HOST_INT_STATUS_ERROR_LSB) & HOST_INT_STATUS_ERROR_MASK) ++ ++#define HOST_INT_STATUS_CPU_MSB 6 ++#define HOST_INT_STATUS_CPU_LSB 6 ++#define HOST_INT_STATUS_CPU_MASK 0x00000040 ++#define HOST_INT_STATUS_CPU_GET(x) (((x) & HOST_INT_STATUS_CPU_MASK) >> HOST_INT_STATUS_CPU_LSB) ++#define HOST_INT_STATUS_CPU_SET(x) (((x) << HOST_INT_STATUS_CPU_LSB) & HOST_INT_STATUS_CPU_MASK) ++ ++#define HOST_INT_STATUS_COUNTER_MSB 4 ++#define HOST_INT_STATUS_COUNTER_LSB 4 ++#define HOST_INT_STATUS_COUNTER_MASK 0x00000010 ++#define HOST_INT_STATUS_COUNTER_GET(x) (((x) & HOST_INT_STATUS_COUNTER_MASK) >> HOST_INT_STATUS_COUNTER_LSB) ++#define HOST_INT_STATUS_COUNTER_SET(x) (((x) << HOST_INT_STATUS_COUNTER_LSB) & HOST_INT_STATUS_COUNTER_MASK) ++ ++#define RESET_CONTROL_WARM_RST_MSB 7 ++#define RESET_CONTROL_WARM_RST_LSB 7 ++#define RESET_CONTROL_WARM_RST_MASK 0x00000080 ++#define RESET_CONTROL_WARM_RST_GET(x) (((x) & RESET_CONTROL_WARM_RST_MASK) >> RESET_CONTROL_WARM_RST_LSB) ++#define RESET_CONTROL_WARM_RST_SET(x) (((x) << RESET_CONTROL_WARM_RST_LSB) & RESET_CONTROL_WARM_RST_MASK) ++ ++#define RESET_CONTROL_COLD_RST_MSB 8 ++#define RESET_CONTROL_COLD_RST_LSB 8 ++#define RESET_CONTROL_COLD_RST_MASK 0x00000100 ++#define RESET_CONTROL_COLD_RST_GET(x) (((x) & RESET_CONTROL_COLD_RST_MASK) >> RESET_CONTROL_COLD_RST_LSB) ++#define RESET_CONTROL_COLD_RST_SET(x) (((x) << RESET_CONTROL_COLD_RST_LSB) & RESET_CONTROL_COLD_RST_MASK) ++ ++#define RESET_CAUSE_LAST_MSB 2 ++#define RESET_CAUSE_LAST_LSB 0 ++#define RESET_CAUSE_LAST_MASK 0x00000007 ++#define RESET_CAUSE_LAST_GET(x) (((x) & RESET_CAUSE_LAST_MASK) >> RESET_CAUSE_LAST_LSB) ++#define RESET_CAUSE_LAST_SET(x) (((x) << RESET_CAUSE_LAST_LSB) & RESET_CAUSE_LAST_MASK) ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* __AR6KHWREG_H__ */ +diff --git a/drivers/sdio/function/wlan/ar6000/include/a_config.h b/drivers/sdio/function/wlan/ar6000/include/a_config.h +new file mode 100644 +index 0000000..627b298 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/a_config.h +@@ -0,0 +1,27 @@ ++#ifndef _A_CONFIG_H_ ++#define _A_CONFIG_H_ ++/* ++ * Copyright (c) 2004-2005 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++/* ++ * This file contains software configuration options that enables ++ * specific software "features" ++ */ ++#include "../ar6000/config_linux.h" ++ ++#endif +diff --git a/drivers/sdio/function/wlan/ar6000/include/a_debug.h b/drivers/sdio/function/wlan/ar6000/include/a_debug.h +new file mode 100644 +index 0000000..4b0b351 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/a_debug.h +@@ -0,0 +1,41 @@ ++#ifndef _A_DEBUG_H_ ++#define _A_DEBUG_H_ ++/* ++ * Copyright (c) 2004-2006 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * Copyright (c) 2004-2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++#include ++#include ++ ++#define DBG_INFO 0x00000001 ++#define DBG_ERROR 0x00000002 ++#define DBG_WARNING 0x00000004 ++#define DBG_SDIO 0x00000008 ++#define DBG_HIF 0x00000010 ++#define DBG_HTC 0x00000020 ++#define DBG_WMI 0x00000040 ++#define DBG_WMI2 0x00000080 ++#define DBG_DRIVER 0x00000100 ++ ++#define DBG_DEFAULTS (DBG_ERROR|DBG_WARNING) ++ ++#include "../ar6000/debug_linux.h" ++ ++#endif +diff --git a/drivers/sdio/function/wlan/ar6000/include/a_drv.h b/drivers/sdio/function/wlan/ar6000/include/a_drv.h +new file mode 100644 +index 0000000..07e52d1 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/a_drv.h +@@ -0,0 +1,28 @@ ++#ifndef _A_DRV_H_ ++#define _A_DRV_H_ ++/* ++ * $Id: //depot/sw/releases/olca2.0-GPL/host/include/a_drv.h#1 $ ++ * ++ * This file contains the definitions of the basic atheros data types. ++ * It is used to map the data types in atheros files to a platform specific ++ * type. ++ * ++ * Copyright 2003-2005 Atheros Communications, Inc., All Rights Reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++#include "../ar6000/athdrv_linux.h" ++ ++#endif /* _ADRV_H_ */ +diff --git a/drivers/sdio/function/wlan/ar6000/include/a_drv_api.h b/drivers/sdio/function/wlan/ar6000/include/a_drv_api.h +new file mode 100644 +index 0000000..7531726 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/a_drv_api.h +@@ -0,0 +1,185 @@ ++#ifndef _A_DRV_API_H_ ++#define _A_DRV_API_H_ ++/* ++ * Copyright (c) 2004-2006 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++/****************************************************************************/ ++/****************************************************************************/ ++/** **/ ++/** WMI related hooks **/ ++/** **/ ++/****************************************************************************/ ++/****************************************************************************/ ++ ++#include ++ ++#define A_WMI_CHANNELLIST_RX(devt, numChan, chanList) \ ++ ar6000_channelList_rx((devt), (numChan), (chanList)) ++ ++#define A_WMI_SET_NUMDATAENDPTS(devt, num) \ ++ ar6000_set_numdataendpts((devt), (num)) ++ ++#define A_WMI_CONTROL_TX(devt, osbuf, streamID) \ ++ ar6000_control_tx((devt), (osbuf), (streamID)) ++ ++#define A_WMI_TARGETSTATS_EVENT(devt, pStats) \ ++ ar6000_targetStats_event((devt), (pStats)) ++ ++#define A_WMI_SCANCOMPLETE_EVENT(devt, status) \ ++ ar6000_scanComplete_event((devt), (status)) ++ ++#ifdef CONFIG_HOST_DSET_SUPPORT ++ ++#define A_WMI_DSET_DATA_REQ(devt, access_cookie, offset, length, targ_buf, targ_reply_fn, targ_reply_arg) \ ++ ar6000_dset_data_req((devt), (access_cookie), (offset), (length), (targ_buf), (targ_reply_fn), (targ_reply_arg)) ++ ++#define A_WMI_DSET_CLOSE(devt, access_cookie) \ ++ ar6000_dset_close((devt), (access_cookie)) ++ ++#endif ++ ++#define A_WMI_DSET_OPEN_REQ(devt, id, targ_handle, targ_reply_fn, targ_reply_arg) \ ++ ar6000_dset_open_req((devt), (id), (targ_handle), (targ_reply_fn), (targ_reply_arg)) ++ ++#define A_WMI_CONNECT_EVENT(devt, channel, bssid, listenInterval, beaconInterval, networkType, beaconIeLen, assocReqLen, assocRespLen, assocInfo) \ ++ ar6000_connect_event((devt), (channel), (bssid), (listenInterval), (beaconInterval), (networkType), (beaconIeLen), (assocReqLen), (assocRespLen), (assocInfo)) ++ ++#define A_WMI_REGDOMAIN_EVENT(devt, regCode) \ ++ ar6000_regDomain_event((devt), (regCode)) ++ ++#define A_WMI_NEIGHBORREPORT_EVENT(devt, numAps, info) \ ++ ar6000_neighborReport_event((devt), (numAps), (info)) ++ ++#define A_WMI_DISCONNECT_EVENT(devt, reason, bssid, assocRespLen, assocInfo, protocolReasonStatus) \ ++ ar6000_disconnect_event((devt), (reason), (bssid), (assocRespLen), (assocInfo), (protocolReasonStatus)) ++ ++#define A_WMI_TKIP_MICERR_EVENT(devt, keyid, ismcast) \ ++ ar6000_tkip_micerr_event((devt), (keyid), (ismcast)) ++ ++#define A_WMI_BITRATE_RX(devt, rateKbps) \ ++ ar6000_bitrate_rx((devt), (rateKbps)) ++ ++#define A_WMI_TXPWR_RX(devt, txPwr) \ ++ ar6000_txPwr_rx((devt), (txPwr)) ++ ++#define A_WMI_READY_EVENT(devt, datap, phyCap) \ ++ ar6000_ready_event((devt), (datap), (phyCap)) ++ ++#define A_WMI_DBGLOG_INIT_DONE(ar) \ ++ ar6000_dbglog_init_done(ar); ++ ++#define A_WMI_RSSI_THRESHOLD_EVENT(devt, newThreshold, rssi) \ ++ ar6000_rssiThreshold_event((devt), (newThreshold), (rssi)) ++ ++#define A_WMI_REPORT_ERROR_EVENT(devt, errorVal) \ ++ ar6000_reportError_event((devt), (errorVal)) ++ ++#define A_WMI_ROAM_TABLE_EVENT(devt, pTbl) \ ++ ar6000_roam_tbl_event((devt), (pTbl)) ++ ++#define A_WMI_ROAM_DATA_EVENT(devt, p) \ ++ ar6000_roam_data_event((devt), (p)) ++ ++#define A_WMI_WOW_LIST_EVENT(devt, num_filters, wow_filters) \ ++ ar6000_wow_list_event((devt), (num_filters), (wow_filters)) ++ ++#define A_WMI_CAC_EVENT(devt, ac, cac_indication, statusCode, tspecSuggestion) \ ++ ar6000_cac_event((devt), (ac), (cac_indication), (statusCode), (tspecSuggestion)) ++ ++#define A_WMI_IPTOS_TO_USERPRIORITY(pkt) \ ++ ar6000_iptos_to_userPriority((pkt)) ++ ++#define A_WMI_PMKID_LIST_EVENT(devt, num_pmkid, pmkid_list) \ ++ ar6000_pmkid_list_event((devt), (num_pmkid), (pmkid_list)) ++ ++#ifdef CONFIG_HOST_GPIO_SUPPORT ++ ++#define A_WMI_GPIO_INTR_RX(intr_mask, input_values) \ ++ ar6000_gpio_intr_rx((intr_mask), (input_values)) ++ ++#define A_WMI_GPIO_DATA_RX(reg_id, value) \ ++ ar6000_gpio_data_rx((reg_id), (value)) ++ ++#define A_WMI_GPIO_ACK_RX() \ ++ ar6000_gpio_ack_rx() ++ ++#endif ++ ++#ifdef SEND_EVENT_TO_APP ++ ++#define A_WMI_SEND_EVENT_TO_APP(ar, eventId, datap, len) \ ++ ar6000_send_event_to_app((ar), (eventId), (datap), (len)) ++ ++#else ++ ++#define A_WMI_SEND_EVENT_TO_APP(ar, eventId, datap, len) ++ ++#endif ++ ++#ifdef CONFIG_HOST_TCMD_SUPPORT ++#define A_WMI_TCMD_RX_REPORT_EVENT(devt, results, len) \ ++ ar6000_tcmd_rx_report_event((devt), (results), (len)) ++#endif ++ ++#define A_WMI_HBCHALLENGERESP_EVENT(devt, cookie, source) \ ++ ar6000_hbChallengeResp_event((devt), (cookie), (source)) ++ ++#define A_WMI_TX_RETRY_ERR_EVENT(devt) \ ++ ar6000_tx_retry_err_event((devt)) ++ ++#define A_WMI_SNR_THRESHOLD_EVENT_RX(devt, newThreshold, snr) \ ++ ar6000_snrThresholdEvent_rx((devt), (newThreshold), (snr)) ++ ++#define A_WMI_LQ_THRESHOLD_EVENT_RX(devt, range, lqVal) \ ++ ar6000_lqThresholdEvent_rx((devt), (range), (lqVal)) ++ ++#define A_WMI_RATEMASK_RX(devt, ratemask) \ ++ ar6000_ratemask_rx((devt), (ratemask)) ++ ++#define A_WMI_KEEPALIVE_RX(devt, configured) \ ++ ar6000_keepalive_rx((devt), (configured)) ++ ++#define A_WMI_BSSINFO_EVENT_RX(ar, datp, len) \ ++ ar6000_bssInfo_event_rx((ar), (datap), (len)) ++ ++#define A_WMI_DBGLOG_EVENT(ar, dropped, buffer, length) \ ++ ar6000_dbglog_event((ar), (dropped), (buffer), (length)); ++ ++#define A_WMI_STREAM_TX_ACTIVE(devt,trafficClass) \ ++ ar6000_indicate_tx_activity((devt),(trafficClass), TRUE) ++ ++#define A_WMI_STREAM_TX_INACTIVE(devt,trafficClass) \ ++ ar6000_indicate_tx_activity((devt),(trafficClass), FALSE) ++ ++/****************************************************************************/ ++/****************************************************************************/ ++/** **/ ++/** HTC related hooks **/ ++/** **/ ++/****************************************************************************/ ++/****************************************************************************/ ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif +diff --git a/drivers/sdio/function/wlan/ar6000/include/a_osapi.h b/drivers/sdio/function/wlan/ar6000/include/a_osapi.h +new file mode 100644 +index 0000000..7d60867 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/a_osapi.h +@@ -0,0 +1,28 @@ ++#ifndef _A_OSAPI_H_ ++#define _A_OSAPI_H_ ++/* ++ * $Id: //depot/sw/releases/olca2.0-GPL/host/include/a_osapi.h#1 $ ++ * ++ * This file contains the definitions of the basic atheros data types. ++ * It is used to map the data types in atheros files to a platform specific ++ * type. ++ * ++ * Copyright 2003-2005 Atheros Communications, Inc., All Rights Reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++#include "../ar6000/osapi_linux.h" ++ ++#endif /* _OSAPI_H_ */ +diff --git a/drivers/sdio/function/wlan/ar6000/include/a_types.h b/drivers/sdio/function/wlan/ar6000/include/a_types.h +new file mode 100644 +index 0000000..e2ed090 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/a_types.h +@@ -0,0 +1,28 @@ ++#ifndef _A_TYPES_H_ ++#define _A_TYPES_H_ ++/* ++ * $Id: //depot/sw/releases/olca2.0-GPL/host/include/a_types.h#1 $ ++ * ++ * This file contains the definitions of the basic atheros data types. ++ * It is used to map the data types in atheros files to a platform specific ++ * type. ++ * ++ * Copyright 2003-2005 Atheros Communications, Inc., All Rights Reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++#include "../ar6000/athtypes_linux.h" ++ ++#endif /* _ATHTYPES_H_ */ +diff --git a/drivers/sdio/function/wlan/ar6000/include/ar6000_api.h b/drivers/sdio/function/wlan/ar6000/include/ar6000_api.h +new file mode 100644 +index 0000000..abe5de7 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/ar6000_api.h +@@ -0,0 +1,29 @@ ++#ifndef _AR6000_API_H_ ++#define _AR6000_API_H_ ++/* ++ * Copyright (c) 2004-2005 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * This file contains the API to access the OS dependent atheros host driver ++ * by the WMI or WLAN generic modules. ++ * ++ * $Id: //depot/sw/releases/olca2.0-GPL/host/include/ar6000_api.h#1 $ ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++#include "../ar6000/ar6xapi_linux.h" ++ ++#endif /* _AR6000_API_H */ ++ +diff --git a/drivers/sdio/function/wlan/ar6000/include/ar6000_diag.h b/drivers/sdio/function/wlan/ar6000/include/ar6000_diag.h +new file mode 100644 +index 0000000..2df131d +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/ar6000_diag.h +@@ -0,0 +1,38 @@ ++/* ++ * ++ * Copyright (c) 2004-2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++#ifndef AR6000_DIAG_H_ ++#define AR6000_DIAG_H_ ++ ++ ++A_STATUS ++ar6000_ReadRegDiag(HIF_DEVICE *hifDevice, A_UINT32 *address, A_UINT32 *data); ++ ++A_STATUS ++ar6000_WriteRegDiag(HIF_DEVICE *hifDevice, A_UINT32 *address, A_UINT32 *data); ++ ++A_STATUS ++ar6000_ReadDataDiag(HIF_DEVICE *hifDevice, A_UINT32 address, ++ A_UCHAR *data, A_UINT32 length); ++ ++A_STATUS ++ar6000_WriteDataDiag(HIF_DEVICE *hifDevice, A_UINT32 address, ++ A_UCHAR *data, A_UINT32 length); ++ ++#endif /*AR6000_DIAG_H_*/ +diff --git a/drivers/sdio/function/wlan/ar6000/include/athdefs.h b/drivers/sdio/function/wlan/ar6000/include/athdefs.h +new file mode 100644 +index 0000000..c28c871 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/athdefs.h +@@ -0,0 +1,85 @@ ++#ifndef __ATHDEFS_H__ ++#define __ATHDEFS_H__ ++ ++/* ++ * Copyright (c) 2004-2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * $ATH_LICENSE_HOSTSDK0_C$ ++ * ++ * This file contains definitions that may be used across both ++ * Host and Target software. Nothing here is module-dependent ++ * or platform-dependent. ++ */ ++ ++/* ++ * Generic error codes that can be used by hw, sta, ap, sim, dk ++ * and any other environments. Since these are enums, feel free to ++ * add any more codes that you need. ++ */ ++ ++typedef enum { ++ A_ERROR = -1, /* Generic error return */ ++ A_OK = 0, /* success */ ++ /* Following values start at 1 */ ++ A_DEVICE_NOT_FOUND, /* not able to find PCI device */ ++ A_NO_MEMORY, /* not able to allocate memory, not available */ ++ A_MEMORY_NOT_AVAIL, /* memory region is not free for mapping */ ++ A_NO_FREE_DESC, /* no free descriptors available */ ++ A_BAD_ADDRESS, /* address does not match descriptor */ ++ A_WIN_DRIVER_ERROR, /* used in NT_HW version, if problem at init */ ++ A_REGS_NOT_MAPPED, /* registers not correctly mapped */ ++ A_EPERM, /* Not superuser */ ++ A_EACCES, /* Access denied */ ++ A_ENOENT, /* No such entry, search failed, etc. */ ++ A_EEXIST, /* The object already exists (can't create) */ ++ A_EFAULT, /* Bad address fault */ ++ A_EBUSY, /* Object is busy */ ++ A_EINVAL, /* Invalid parameter */ ++ A_EMSGSIZE, /* Inappropriate message buffer length */ ++ A_ECANCELED, /* Operation canceled */ ++ A_ENOTSUP, /* Operation not supported */ ++ A_ECOMM, /* Communication error on send */ ++ A_EPROTO, /* Protocol error */ ++ A_ENODEV, /* No such device */ ++ A_EDEVNOTUP, /* device is not UP */ ++ A_NO_RESOURCE, /* No resources for requested operation */ ++ A_HARDWARE, /* Hardware failure */ ++ A_PENDING, /* Asynchronous routine; will send up results la ++ter (typically in callback) */ ++ A_EBADCHANNEL, /* The channel cannot be used */ ++ A_DECRYPT_ERROR, /* Decryption error */ ++ A_PHY_ERROR, /* RX PHY error */ ++ A_CONSUMED /* Object was consumed */ ++} A_STATUS; ++ ++#define A_SUCCESS(x) (x == A_OK) ++#define A_FAILED(x) (!A_SUCCESS(x)) ++ ++#ifndef TRUE ++#define TRUE 1 ++#endif ++ ++#ifndef FALSE ++#define FALSE 0 ++#endif ++ ++/* ++ * The following definition is WLAN specific definition ++ */ ++typedef enum { ++ MODE_11A = 0, /* 11a Mode */ ++ MODE_11G = 1, /* 11g + 11b Mode */ ++ MODE_11B = 2, /* 11b Mode */ ++ MODE_11GONLY = 3, /* 11g only Mode */ ++ MODE_UNKNOWN = 4, ++ MODE_MAX = 4 ++} WLAN_PHY_MODE; ++ ++typedef enum { ++ WLAN_11A_CAPABILITY = 1, ++ WLAN_11G_CAPABILITY = 2, ++ WLAN_11AG_CAPABILITY = 3, ++}WLAN_CAPABILITY; ++ ++#endif /* __ATHDEFS_H__ */ +diff --git a/drivers/sdio/function/wlan/ar6000/include/athdrv.h b/drivers/sdio/function/wlan/ar6000/include/athdrv.h +new file mode 100644 +index 0000000..19da97e +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/athdrv.h +@@ -0,0 +1,32 @@ ++/* ++ * Copyright (c) 2004-2006 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++#ifndef _ATHDRV_H_ ++#define _ATHDRV_H_ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* _ATHDRV_H_ */ +diff --git a/drivers/sdio/function/wlan/ar6000/include/athendpack.h b/drivers/sdio/function/wlan/ar6000/include/athendpack.h +new file mode 100644 +index 0000000..42921ae +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/athendpack.h +@@ -0,0 +1,41 @@ ++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ ++ * @file: athendpack.h ++ * ++ * @abstract: end compiler-specific structure packing ++ * ++ * Copyright (c) 2004-2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++#ifdef VXWORKS ++#endif /* VXWORKS */ ++ ++#ifdef LINUX ++#endif /* LINUX */ ++ ++#ifdef QNX ++#endif /* QNX */ ++ ++#ifdef INTEGRITY ++#include "integrity/athendpack_integrity.h" ++#endif /* INTEGRITY */ ++ ++#ifdef NUCLEUS ++#endif /* NUCLEUS */ ++ ++#ifdef UNDER_CE ++#include "../os/wince/include/athendpack_wince.h" ++#endif /* WINCE */ ++ +diff --git a/drivers/sdio/function/wlan/ar6000/include/athstartpack.h b/drivers/sdio/function/wlan/ar6000/include/athstartpack.h +new file mode 100644 +index 0000000..6632cc2 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/athstartpack.h +@@ -0,0 +1,42 @@ ++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ ++ * @file: athstartpack.h ++ * ++ * @abstract: start compiler-specific structure packing ++ * ++ * Copyright (c) 2004-2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++#ifdef VXWORKS ++#endif /* VXWORKS */ ++ ++#ifdef LINUX ++#endif /* LINUX */ ++ ++#ifdef QNX ++#endif /* QNX */ ++ ++#ifdef INTEGRITY ++#include "integrity/athstartpack_integrity.h" ++#endif /* INTEGRITY */ ++ ++#ifdef NUCLEUS ++#endif /* NUCLEUS */ ++ ++#ifdef UNDER_CE ++#include "../os/wince/include/athstartpack_wince.h" ++#endif /* WINCE */ ++ +diff --git a/drivers/sdio/function/wlan/ar6000/include/bmi.h b/drivers/sdio/function/wlan/ar6000/include/bmi.h +new file mode 100644 +index 0000000..2eb7134 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/bmi.h +@@ -0,0 +1,100 @@ ++#ifndef _BMI_H_ ++#define _BMI_H_ ++/* ++ * Copyright (c) 2004-2005 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ * BMI declarations and prototypes ++ */ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif /* __cplusplus */ ++ ++/* Header files */ ++#include "a_config.h" ++#include "athdefs.h" ++#include "a_types.h" ++#include "hif.h" ++#include "a_osapi.h" ++#include "bmi_msg.h" ++ ++void ++BMIInit(void); ++ ++A_STATUS ++BMIDone(HIF_DEVICE *device); ++ ++A_STATUS ++BMIGetTargetInfo(HIF_DEVICE *device, struct bmi_target_info *targ_info); ++ ++A_STATUS ++BMIReadMemory(HIF_DEVICE *device, ++ A_UINT32 address, ++ A_UCHAR *buffer, ++ A_UINT32 length); ++ ++A_STATUS ++BMIWriteMemory(HIF_DEVICE *device, ++ A_UINT32 address, ++ A_UCHAR *buffer, ++ A_UINT32 length); ++ ++A_STATUS ++BMIExecute(HIF_DEVICE *device, ++ A_UINT32 address, ++ A_UINT32 *param); ++ ++A_STATUS ++BMISetAppStart(HIF_DEVICE *device, ++ A_UINT32 address); ++ ++A_STATUS ++BMIReadSOCRegister(HIF_DEVICE *device, ++ A_UINT32 address, ++ A_UINT32 *param); ++ ++A_STATUS ++BMIWriteSOCRegister(HIF_DEVICE *device, ++ A_UINT32 address, ++ A_UINT32 param); ++ ++A_STATUS ++BMIrompatchInstall(HIF_DEVICE *device, ++ A_UINT32 ROM_addr, ++ A_UINT32 RAM_addr, ++ A_UINT32 nbytes, ++ A_UINT32 do_activate, ++ A_UINT32 *patch_id); ++ ++A_STATUS ++BMIrompatchUninstall(HIF_DEVICE *device, ++ A_UINT32 rompatch_id); ++ ++A_STATUS ++BMIrompatchActivate(HIF_DEVICE *device, ++ A_UINT32 rompatch_count, ++ A_UINT32 *rompatch_list); ++ ++A_STATUS ++BMIrompatchDeactivate(HIF_DEVICE *device, ++ A_UINT32 rompatch_count, ++ A_UINT32 *rompatch_list); ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* _BMI_H_ */ +diff --git a/drivers/sdio/function/wlan/ar6000/include/bmi_msg.h b/drivers/sdio/function/wlan/ar6000/include/bmi_msg.h +new file mode 100644 +index 0000000..7c91ef4 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/bmi_msg.h +@@ -0,0 +1,199 @@ ++#ifndef __BMI_MSG_H__ ++#define __BMI_MSG_H__ ++/* ++ * ++ * Copyright (c) 2004-2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++/* ++ * Bootloader Messaging Interface (BMI) ++ * ++ * BMI is a very simple messaging interface used during initialization ++ * to read memory, write memory, execute code, and to define an ++ * application entry PC. ++ * ++ * It is used to download an application to AR6K, to provide ++ * patches to code that is already resident on AR6K, and generally ++ * to examine and modify state. The Host has an opportunity to use ++ * BMI only once during bootup. Once the Host issues a BMI_DONE ++ * command, this opportunity ends. ++ * ++ * The Host writes BMI requests to mailbox0, and reads BMI responses ++ * from mailbox0. BMI requests all begin with a command ++ * (see below for specific commands), and are followed by ++ * command-specific data. ++ * ++ * Flow control: ++ * The Host can only issue a command once the Target gives it a ++ * "BMI Command Credit", using AR6K Counter #4. As soon as the ++ * Target has completed a command, it issues another BMI Command ++ * Credit (so the Host can issue the next command). ++ * ++ * BMI handles all required Target-side cache flushing. ++ */ ++ ++ ++/* Maximum data size used for BMI transfers */ ++#define BMI_DATASZ_MAX 32 ++ ++/* BMI Commands */ ++ ++#define BMI_NO_COMMAND 0 ++ ++#define BMI_DONE 1 ++ /* ++ * Semantics: Host is done using BMI ++ * Request format: ++ * A_UINT32 command (BMI_DONE) ++ * Response format: none ++ */ ++ ++#define BMI_READ_MEMORY 2 ++ /* ++ * Semantics: Host reads AR6K memory ++ * Request format: ++ * A_UINT32 command (BMI_READ_MEMORY) ++ * A_UINT32 address ++ * A_UINT32 length, at most BMI_DATASZ_MAX ++ * Response format: ++ * A_UINT8 data[length] ++ */ ++ ++#define BMI_WRITE_MEMORY 3 ++ /* ++ * Semantics: Host writes AR6K memory ++ * Request format: ++ * A_UINT32 command (BMI_WRITE_MEMORY) ++ * A_UINT32 address ++ * A_UINT32 length, at most BMI_DATASZ_MAX ++ * A_UINT8 data[length] ++ * Response format: none ++ */ ++ ++#define BMI_EXECUTE 4 ++ /* ++ * Semantics: Causes AR6K to execute code ++ * Request format: ++ * A_UINT32 command (BMI_EXECUTE) ++ * A_UINT32 address ++ * A_UINT32 parameter ++ * Response format: ++ * A_UINT32 return value ++ */ ++ ++#define BMI_SET_APP_START 5 ++ /* ++ * Semantics: Set Target application starting address ++ * Request format: ++ * A_UINT32 command (BMI_SET_APP_START) ++ * A_UINT32 address ++ * Response format: none ++ */ ++ ++#define BMI_READ_SOC_REGISTER 6 ++ /* ++ * Semantics: Read a 32-bit Target SOC register. ++ * Request format: ++ * A_UINT32 command (BMI_READ_REGISTER) ++ * A_UINT32 address ++ * Response format: ++ * A_UINT32 value ++ */ ++ ++#define BMI_WRITE_SOC_REGISTER 7 ++ /* ++ * Semantics: Write a 32-bit Target SOC register. ++ * Request format: ++ * A_UINT32 command (BMI_WRITE_REGISTER) ++ * A_UINT32 address ++ * A_UINT32 value ++ * ++ * Response format: none ++ */ ++ ++#define BMI_GET_TARGET_ID 8 ++#define BMI_GET_TARGET_INFO 8 ++ /* ++ * Semantics: Fetch the 4-byte Target information ++ * Request format: ++ * A_UINT32 command (BMI_GET_TARGET_ID/INFO) ++ * Response format1 (old firmware): ++ * A_UINT32 TargetVersionID ++ * Response format2 (newer firmware): ++ * A_UINT32 TARGET_VERSION_SENTINAL ++ * struct bmi_target_info; ++ */ ++ ++struct bmi_target_info { ++ A_UINT32 target_info_byte_count; /* size of this structure */ ++ A_UINT32 target_ver; /* Target Version ID */ ++ A_UINT32 target_type; /* Target type */ ++}; ++#define TARGET_VERSION_SENTINAL 0xffffffff ++#define TARGET_TYPE_AR6001 1 ++#define TARGET_TYPE_AR6002 2 ++ ++ ++#define BMI_ROMPATCH_INSTALL 9 ++ /* ++ * Semantics: Install a ROM Patch. ++ * Request format: ++ * A_UINT32 command (BMI_ROMPATCH_INSTALL) ++ * A_UINT32 Target ROM Address ++ * A_UINT32 Target RAM Address ++ * A_UINT32 Size, in bytes ++ * A_UINT32 Activate? 1-->activate; ++ * 0-->install but do not activate ++ * Response format: ++ * A_UINT32 PatchID ++ */ ++ ++#define BMI_ROMPATCH_UNINSTALL 10 ++ /* ++ * Semantics: Uninstall a previously-installed ROM Patch, ++ * automatically deactivating, if necessary. ++ * Request format: ++ * A_UINT32 command (BMI_ROMPATCH_UNINSTALL) ++ * A_UINT32 PatchID ++ * ++ * Response format: none ++ */ ++ ++#define BMI_ROMPATCH_ACTIVATE 11 ++ /* ++ * Semantics: Activate a list of previously-installed ROM Patches. ++ * Request format: ++ * A_UINT32 command (BMI_ROMPATCH_ACTIVATE) ++ * A_UINT32 rompatch_count ++ * A_UINT32 PatchID[rompatch_count] ++ * ++ * Response format: none ++ */ ++ ++#define BMI_ROMPATCH_DEACTIVATE 12 ++ /* ++ * Semantics: Deactivate a list of active ROM Patches. ++ * Request format: ++ * A_UINT32 command (BMI_ROMPATCH_DEACTIVATE) ++ * A_UINT32 rompatch_count ++ * A_UINT32 PatchID[rompatch_count] ++ * ++ * Response format: none ++ */ ++ ++ ++#endif /* __BMI_MSG_H__ */ +diff --git a/drivers/sdio/function/wlan/ar6000/include/common_drv.h b/drivers/sdio/function/wlan/ar6000/include/common_drv.h +new file mode 100644 +index 0000000..1bdc3da +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/common_drv.h +@@ -0,0 +1,61 @@ ++/* ++ * ++ * Copyright (c) 2004-2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++ ++#ifndef COMMON_DRV_H_ ++#define COMMON_DRV_H_ ++ ++#include "hif.h" ++#include "htc_packet.h" ++ ++ ++ ++/* structure that is the state information for the default credit distribution callback ++ * drivers should instantiate (zero-init as well) this structure in their driver instance ++ * and pass it as a context to the HTC credit distribution functions */ ++typedef struct _COMMON_CREDIT_STATE_INFO { ++ int TotalAvailableCredits; /* total credits in the system at startup */ ++ int CurrentFreeCredits; /* credits available in the pool that have not been ++ given out to endpoints */ ++ HTC_ENDPOINT_CREDIT_DIST *pLowestPriEpDist; /* pointer to the lowest priority endpoint dist struct */ ++} COMMON_CREDIT_STATE_INFO; ++ ++ ++/* HTC TX packet tagging definitions */ ++#define AR6K_CONTROL_PKT_TAG HTC_TX_PACKET_TAG_USER_DEFINED ++#define AR6K_DATA_PKT_TAG (AR6K_CONTROL_PKT_TAG + 1) ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++/* OS-independent APIs */ ++A_STATUS ar6000_setup_credit_dist(HTC_HANDLE HTCHandle, COMMON_CREDIT_STATE_INFO *pCredInfo); ++A_STATUS ar6000_ReadRegDiag(HIF_DEVICE *hifDevice, A_UINT32 *address, A_UINT32 *data); ++A_STATUS ar6000_WriteRegDiag(HIF_DEVICE *hifDevice, A_UINT32 *address, A_UINT32 *data); ++A_STATUS ar6000_ReadDataDiag(HIF_DEVICE *hifDevice, A_UINT32 address, A_UCHAR *data, A_UINT32 length); ++A_STATUS ar6000_reset_device(HIF_DEVICE *hifDevice, A_UINT32 TargetType); ++void ar6000_dump_target_assert_info(HIF_DEVICE *hifDevice, A_UINT32 TargetType); ++A_STATUS ar6000_reset_device_skipflash(HIF_DEVICE *hifDevice); ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /*COMMON_DRV_H_*/ +diff --git a/drivers/sdio/function/wlan/ar6000/include/dbglog.h b/drivers/sdio/function/wlan/ar6000/include/dbglog.h +new file mode 100644 +index 0000000..3d1e528 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/dbglog.h +@@ -0,0 +1,107 @@ ++/* ++ * Copyright (c) 2004-2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * $ATH_LICENSE_HOSTSDK0_C$ ++ * ++ * This file contains the definitions and data structures associated with ++ * the log based debug mechanism. ++ * ++ */ ++ ++#ifndef _DBGLOG_H_ ++#define _DBGLOG_H_ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++#define DBGLOG_TIMESTAMP_OFFSET 0 ++#define DBGLOG_TIMESTAMP_MASK 0x0000FFFF /* Bit 0-15. Contains bit ++ 8-23 of the LF0 timer */ ++#define DBGLOG_DBGID_OFFSET 16 ++#define DBGLOG_DBGID_MASK 0x03FF0000 /* Bit 16-25 */ ++#define DBGLOG_DBGID_NUM_MAX 256 /* Upper limit is width of mask */ ++ ++#define DBGLOG_MODULEID_OFFSET 26 ++#define DBGLOG_MODULEID_MASK 0x3C000000 /* Bit 26-29 */ ++#define DBGLOG_MODULEID_NUM_MAX 16 /* Upper limit is width of mask */ ++ ++/* ++ * Please ensure that the definition of any new module intrduced is captured ++ * between the DBGLOG_MODULEID_START and DBGLOG_MODULEID_END defines. The ++ * structure is required for the parser to correctly pick up the values for ++ * different modules. ++ */ ++#define DBGLOG_MODULEID_START ++#define DBGLOG_MODULEID_INF 0 ++#define DBGLOG_MODULEID_WMI 1 ++#define DBGLOG_MODULEID_CSERV 2 ++#define DBGLOG_MODULEID_PM 3 ++#define DBGLOG_MODULEID_TXRX_MGMTBUF 4 ++#define DBGLOG_MODULEID_TXRX_TXBUF 5 ++#define DBGLOG_MODULEID_TXRX_RXBUF 6 ++#define DBGLOG_MODULEID_WOW 7 ++#define DBGLOG_MODULEID_WHAL 8 ++#define DBGLOG_MODULEID_END ++ ++#define DBGLOG_NUM_ARGS_OFFSET 30 ++#define DBGLOG_NUM_ARGS_MASK 0xC0000000 /* Bit 30-31 */ ++#define DBGLOG_NUM_ARGS_MAX 2 /* Upper limit is width of mask */ ++ ++#define DBGLOG_MODULE_LOG_ENABLE_OFFSET 0 ++#define DBGLOG_MODULE_LOG_ENABLE_MASK 0x0000FFFF ++ ++#define DBGLOG_REPORTING_ENABLED_OFFSET 16 ++#define DBGLOG_REPORTING_ENABLED_MASK 0x00010000 ++ ++#define DBGLOG_TIMESTAMP_RESOLUTION_OFFSET 17 ++#define DBGLOG_TIMESTAMP_RESOLUTION_MASK 0x000E0000 ++ ++#define DBGLOG_REPORT_SIZE_OFFSET 20 ++#define DBGLOG_REPORT_SIZE_MASK 0x3FF00000 ++ ++#define DBGLOG_LOG_BUFFER_SIZE 1500 ++#define DBGLOG_DBGID_DEFINITION_LEN_MAX 64 ++ ++struct dbglog_buf_s { ++ struct dbglog_buf_s *next; ++ A_INT8 *buffer; ++ A_UINT32 bufsize; ++ A_UINT32 length; ++ A_UINT32 count; ++ A_UINT32 free; ++}; ++ ++struct dbglog_hdr_s { ++ struct dbglog_buf_s *dbuf; ++ A_UINT32 dropped; ++}; ++ ++struct dbglog_config_s { ++ A_UINT32 cfgvalid; /* Mask with valid config bits */ ++ union { ++ /* TODO: Take care of endianness */ ++ struct { ++ A_UINT32 mmask:16; /* Mask of modules with logging on */ ++ A_UINT32 rep:1; /* Reporting enabled or not */ ++ A_UINT32 tsr:3; /* Time stamp resolution. Def: 1 ms */ ++ A_UINT32 size:10; /* Report size in number of messages */ ++ A_UINT32 reserved:2; ++ } dbglog_config; ++ ++ A_UINT32 value; ++ } u; ++}; ++ ++#define cfgmmask u.dbglog_config.mmask ++#define cfgrep u.dbglog_config.rep ++#define cfgtsr u.dbglog_config.tsr ++#define cfgsize u.dbglog_config.size ++#define cfgvalue u.value ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* _DBGLOG_H_ */ +diff --git a/drivers/sdio/function/wlan/ar6000/include/dbglog_api.h b/drivers/sdio/function/wlan/ar6000/include/dbglog_api.h +new file mode 100644 +index 0000000..06c8102 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/dbglog_api.h +@@ -0,0 +1,46 @@ ++#ifndef _DBGLOG_API_H_ ++#define _DBGLOG_API_H_ ++/* ++ * Copyright (c) 2004-2006 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ * This file contains host side debug primitives. ++ */ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++#include "dbglog.h" ++ ++#define DBGLOG_HOST_LOG_BUFFER_SIZE DBGLOG_LOG_BUFFER_SIZE ++ ++#define DBGLOG_GET_DBGID(arg) \ ++ ((arg & DBGLOG_DBGID_MASK) >> DBGLOG_DBGID_OFFSET) ++ ++#define DBGLOG_GET_MODULEID(arg) \ ++ ((arg & DBGLOG_MODULEID_MASK) >> DBGLOG_MODULEID_OFFSET) ++ ++#define DBGLOG_GET_NUMARGS(arg) \ ++ ((arg & DBGLOG_NUM_ARGS_MASK) >> DBGLOG_NUM_ARGS_OFFSET) ++ ++#define DBGLOG_GET_TIMESTAMP(arg) \ ++ ((arg & DBGLOG_TIMESTAMP_MASK) >> DBGLOG_TIMESTAMP_OFFSET) ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* _DBGLOG_API_H_ */ +diff --git a/drivers/sdio/function/wlan/ar6000/include/dbglog_id.h b/drivers/sdio/function/wlan/ar6000/include/dbglog_id.h +new file mode 100644 +index 0000000..ce22b16 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/dbglog_id.h +@@ -0,0 +1,307 @@ ++/* ++ * ++ * Copyright (c) 2004-2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * $ATH_LICENSE_HOSTSDK0_C$ ++ * ++ * This file contains the definitions of the debug identifiers for different ++ * modules. ++ * ++ */ ++ ++#ifndef _DBGLOG_ID_H_ ++#define _DBGLOG_ID_H_ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++/* ++ * The nomenclature for the debug identifiers is MODULE_DESCRIPTION. ++ * Please ensure that the definition of any new debugid introduced is captured ++ * between the _DBGID_DEFINITION_START and ++ * _DBGID_DEFINITION_END defines. The structure is required for the ++ * parser to correctly pick up the values for different debug identifiers. ++ */ ++ ++/* INF debug identifier definitions */ ++#define INF_DBGID_DEFINITION_START ++#define INF_ASSERTION_FAILED 1 ++#define INF_TARGET_ID 2 ++#define INF_DBGID_DEFINITION_END ++ ++/* WMI debug identifier definitions */ ++#define WMI_DBGID_DEFINITION_START ++#define WMI_CMD_RX_XTND_PKT_TOO_SHORT 1 ++#define WMI_EXTENDED_CMD_NOT_HANDLED 2 ++#define WMI_CMD_RX_PKT_TOO_SHORT 3 ++#define WMI_CALLING_WMI_EXTENSION_FN 4 ++#define WMI_CMD_NOT_HANDLED 5 ++#define WMI_IN_SYNC 6 ++#define WMI_TARGET_WMI_SYNC_CMD 7 ++#define WMI_SET_SNR_THRESHOLD_PARAMS 8 ++#define WMI_SET_RSSI_THRESHOLD_PARAMS 9 ++#define WMI_SET_LQ_TRESHOLD_PARAMS 10 ++#define WMI_TARGET_CREATE_PSTREAM_CMD 11 ++#define WMI_WI_DTM_INUSE 12 ++#define WMI_TARGET_DELETE_PSTREAM_CMD 13 ++#define WMI_TARGET_IMPLICIT_DELETE_PSTREAM_CMD 14 ++#define WMI_TARGET_GET_BIT_RATE_CMD 15 ++#define WMI_GET_RATE_MASK_CMD_FIX_RATE_MASK_IS 16 ++#define WMI_TARGET_GET_AVAILABLE_CHANNELS_CMD 17 ++#define WMI_TARGET_GET_TX_PWR_CMD 18 ++#define WMI_FREE_EVBUF_WMIBUF 19 ++#define WMI_FREE_EVBUF_DATABUF 20 ++#define WMI_FREE_EVBUF_BADFLAG 21 ++#define WMI_HTC_RX_ERROR_DATA_PACKET 22 ++#define WMI_HTC_RX_SYNC_PAUSING_FOR_MBOX 23 ++#define WMI_INCORRECT_WMI_DATA_HDR_DROPPING_PKT 24 ++#define WMI_SENDING_READY_EVENT 25 ++#define WMI_SETPOWER_MDOE_TO_MAXPERF 26 ++#define WMI_SETPOWER_MDOE_TO_REC 27 ++#define WMI_BSSINFO_EVENT_FROM 28 ++#define WMI_TARGET_GET_STATS_CMD 29 ++#define WMI_SENDING_SCAN_COMPLETE_EVENT 30 ++#define WMI_SENDING_RSSI_INDB_THRESHOLD_EVENT 31 ++#define WMI_SENDING_RSSI_INDBM_THRESHOLD_EVENT 32 ++#define WMI_SENDING_LINK_QUALITY_THRESHOLD_EVENT 33 ++#define WMI_SENDING_ERROR_REPORT_EVENT 34 ++#define WMI_SENDING_CAC_EVENT 35 ++#define WMI_TARGET_GET_ROAM_TABLE_CMD 36 ++#define WMI_TARGET_GET_ROAM_DATA_CMD 37 ++#define WMI_SENDING_GPIO_INTR_EVENT 38 ++#define WMI_SENDING_GPIO_ACK_EVENT 39 ++#define WMI_SENDING_GPIO_DATA_EVENT 40 ++#define WMI_CMD_RX 41 ++#define WMI_CMD_RX_XTND 42 ++#define WMI_EVENT_SEND 43 ++#define WMI_EVENT_SEND_XTND 44 ++#define WMI_DBGID_DEFINITION_END ++ ++/* CSERV debug identifier definitions */ ++#define CSERV_DBGID_DEFINITION_START ++#define CSERV_BEGIN_SCAN1 1 ++#define CSERV_BEGIN_SCAN2 2 ++#define CSERV_END_SCAN1 3 ++#define CSERV_END_SCAN2 4 ++#define CSERV_CHAN_SCAN_START 5 ++#define CSERV_CHAN_SCAN_STOP 6 ++#define CSERV_CHANNEL_OPPPORTUNITY 7 ++#define CSERV_NC_TIMEOUT 8 ++#define CSERV_BACK_HOME 10 ++#define CSERV_CHMGR_CH_CALLBACK1 11 ++#define CSERV_CHMGR_CH_CALLBACK2 12 ++#define CSERV_CHMGR_CH_CALLBACK3 13 ++#define CSERV_SET_SCAN_PARAMS1 14 ++#define CSERV_SET_SCAN_PARAMS2 15 ++#define CSERV_SET_SCAN_PARAMS3 16 ++#define CSERV_SET_SCAN_PARAMS4 17 ++#define CSERV_ABORT_SCAN 18 ++#define CSERV_NEWSTATE 19 ++#define CSERV_MINCHMGR_OP_END 20 ++#define CSERV_CHMGR_OP_END 21 ++#define CSERV_DISCONNECT_TIMEOUT 22 ++#define CSERV_ROAM_TIMEOUT 23 ++#define CSERV_FORCE_SCAN1 24 ++#define CSERV_FORCE_SCAN2 25 ++#define CSERV_FORCE_SCAN3 26 ++#define CSERV_UTIL_TIMEOUT 27 ++#define CSERV_RSSIPOLLER 28 ++#define CSERV_RETRY_CONNECT_TIMEOUT 29 ++#define CSERV_RSSIINDBMPOLLER 30 ++#define CSERV_BGSCAN_ENABLE 31 ++#define CSERV_BGSCAN_DISABLE 32 ++#define CSERV_WLAN_START_SCAN_CMD1 33 ++#define CSERV_WLAN_START_SCAN_CMD2 34 ++#define CSERV_WLAN_START_SCAN_CMD3 35 ++#define CSERV_START_SCAN_CMD 36 ++#define CSERV_START_FORCE_SCAN 37 ++#define CSERV_NEXT_CHAN 38 ++#define CSERV_SET_REGCODE 39 ++#define CSERV_START_ADHOC 40 ++#define CSERV_ADHOC_AT_HOME 41 ++#define CSERV_OPT_AT_HOME 42 ++#define CSERV_WLAN_CONNECT_CMD 43 ++#define CSERV_WLAN_RECONNECT_CMD 44 ++#define CSERV_WLAN_DISCONNECT_CMD 45 ++#define CSERV_BSS_CHANGE_CHANNEL 46 ++#define CSERV_BEACON_RX 47 ++#define CSERV_KEEPALIVE_CHECK 48 ++#define CSERV_RC_BEGIN_SCAN 49 ++#define CSERV_RC_SCAN_START 50 ++#define CSERV_RC_SCAN_STOP 51 ++#define CSERV_RC_NEXT 52 ++#define CSERV_RC_SCAN_END 53 ++#define CSERV_PROBE_CALLBACK 54 ++#define CSERV_ROAM1 55 ++#define CSERV_ROAM2 56 ++#define CSERV_ROAM3 57 ++#define CSERV_CONNECT_EVENT 58 ++#define CSERV_DISCONNECT_EVENT 59 ++#define CSERV_BMISS_HANDLER1 60 ++#define CSERV_BMISS_HANDLER2 61 ++#define CSERV_BMISS_HANDLER3 62 ++#define CSERV_LOWRSSI_HANDLER 63 ++#define CSERV_WLAN_SET_PMKID_CMD 64 ++#define CSERV_RECONNECT_REQUEST 65 ++#define CSERV_KEYSPLUMBED_EVENT 66 ++#define CSERV_NEW_REG 67 ++#define CSERV_SET_RSSI_THOLD 68 ++#define CSERV_RSSITHRESHOLDCHECK 69 ++#define CSERV_RSSIINDBMTHRESHOLDCHECK 70 ++#define CSERV_WLAN_SET_OPT_CMD1 71 ++#define CSERV_WLAN_SET_OPT_CMD2 72 ++#define CSERV_WLAN_SET_OPT_CMD3 73 ++#define CSERV_WLAN_SET_OPT_CMD4 74 ++#define CSERV_SCAN_CONNECT_STOP 75 ++#define CSERV_BMISS_HANDLER4 76 ++#define CSERV_INITIALIZE_TIMER 77 ++#define CSERV_ARM_TIMER 78 ++#define CSERV_DISARM_TIMER 79 ++#define CSERV_UNINITIALIZE_TIMER 80 ++#define CSERV_DISCONNECT_EVENT2 81 ++#define CSERV_SCAN_CONNECT_START 82 ++#define CSERV_BSSINFO_MEMORY_ALLOC_FAILED 83 ++#define CSERV_SET_SCAN_PARAMS5 84 ++#define CSERV_DBGID_DEFINITION_END ++ ++/* TXRX debug identifier definitions */ ++#define TXRX_TXBUF_DBGID_DEFINITION_START ++#define TXRX_TXBUF_ALLOCATE_BUF 1 ++#define TXRX_TXBUF_QUEUE_BUF_TO_MBOX 2 ++#define TXRX_TXBUF_QUEUE_BUF_TO_TXQ 3 ++#define TXRX_TXBUF_TXQ_DEPTH 4 ++#define TXRX_TXBUF_IBSS_QUEUE_TO_SFQ 5 ++#define TXRX_TXBUF_IBSS_QUEUE_TO_TXQ_FRM_SFQ 6 ++#define TXRX_TXBUF_INITIALIZE_TIMER 7 ++#define TXRX_TXBUF_ARM_TIMER 8 ++#define TXRX_TXBUF_DISARM_TIMER 9 ++#define TXRX_TXBUF_UNINITIALIZE_TIMER 10 ++#define TXRX_TXBUF_DBGID_DEFINITION_END ++ ++#define TXRX_RXBUF_DBGID_DEFINITION_START ++#define TXRX_RXBUF_ALLOCATE_BUF 1 ++#define TXRX_RXBUF_QUEUE_TO_HOST 2 ++#define TXRX_RXBUF_QUEUE_TO_WLAN 3 ++#define TXRX_RXBUF_ZERO_LEN_BUF 4 ++#define TXRX_RXBUF_QUEUE_TO_HOST_LASTBUF_IN_RXCHAIN 5 ++#define TXRX_RXBUF_LASTBUF_IN_RXCHAIN_ZEROBUF 6 ++#define TXRX_RXBUF_QUEUE_EMPTY_QUEUE_TO_WLAN 7 ++#define TXRX_RXBUF_SEND_TO_RECV_MGMT 8 ++#define TXRX_RXBUF_SEND_TO_IEEE_LAYER 9 ++#define TXRX_RXBUF_DBGID_DEFINITION_END ++ ++#define TXRX_MGMTBUF_DBGID_DEFINITION_START ++#define TXRX_MGMTBUF_ALLOCATE_BUF 1 ++#define TXRX_MGMTBUF_ALLOCATE_SM_BUF 2 ++#define TXRX_MGMTBUF_ALLOCATE_RMBUF 3 ++#define TXRX_MGMTBUF_GET_BUF 4 ++#define TXRX_MGMTBUF_GET_SM_BUF 5 ++#define TXRX_MGMTBUF_QUEUE_BUF_TO_TXQ 6 ++#define TXRX_MGMTBUF_REAPED_BUF 7 ++#define TXRX_MGMTBUF_REAPED_SM_BUF 8 ++#define TXRX_MGMTBUF_WAIT_FOR_TXQ_DRAIN 9 ++#define TXRX_MGMTBUF_WAIT_FOR_TXQ_SFQ_DRAIN 10 ++#define TXRX_MGMTBUF_ENQUEUE_INTO_SFQ 11 ++#define TXRX_MGMTBUF_DEQUEUE_FROM_SFQ 12 ++#define TXRX_MGMTBUF_PAUSE_TXQ 13 ++#define TXRX_MGMTBUF_RESUME_TXQ 14 ++#define TXRX_MGMTBUF_WAIT_FORTXQ_DRAIN_TIMEOUT 15 ++#define TXRX_MGMTBUF_DRAINQ 16 ++#define TXRX_MGMTBUF_INDICATE_Q_DRAINED 17 ++#define TXRX_MGMTBUF_DBGID_DEFINITION_END ++ ++/* PM (Power Module) debug identifier definitions */ ++#define PM_DBGID_DEFINITION_START ++#define PM_INIT 1 ++#define PM_ENABLE 2 ++#define PM_SET_STATE 3 ++#define PM_SET_POWERMODE 4 ++#define PM_CONN_NOTIFY 5 ++#define PM_REF_COUNT_NEGATIVE 6 ++#define PM_APSD_ENABLE 7 ++#define PM_UPDATE_APSD_STATE 8 ++#define PM_CHAN_OP_REQ 9 ++#define PM_SET_MY_BEACON_POLICY 10 ++#define PM_SET_ALL_BEACON_POLICY 11 ++#define PM_SET_PM_PARAMS1 12 ++#define PM_SET_PM_PARAMS2 13 ++#define PM_ADHOC_SET_PM_CAPS_FAIL 14 ++#define PM_ADHOC_UNKNOWN_IBSS_ATTRIB_ID 15 ++#define PM_DBGID_DEFINITION_END ++ ++/* Wake on Wireless debug identifier definitions */ ++#define WOW_DBGID_DEFINITION_START ++#define WOW_INIT 1 ++#define WOW_GET_CONFIG_DSET 2 ++#define WOW_NO_CONFIG_DSET 3 ++#define WOW_INVALID_CONFIG_DSET 4 ++#define WOW_USE_DEFAULT_CONFIG 5 ++#define WOW_SETUP_GPIO 6 ++#define WOW_INIT_DONE 7 ++#define WOW_SET_GPIO_PIN 8 ++#define WOW_CLEAR_GPIO_PIN 9 ++#define WOW_SET_WOW_MODE_CMD 10 ++#define WOW_SET_HOST_MODE_CMD 11 ++#define WOW_ADD_WOW_PATTERN_CMD 12 ++#define WOW_NEW_WOW_PATTERN_AT_INDEX 13 ++#define WOW_DEL_WOW_PATTERN_CMD 14 ++#define WOW_LIST_CONTAINS_PATTERNS 15 ++#define WOW_GET_WOW_LIST_CMD 16 ++#define WOW_INVALID_FILTER_ID 17 ++#define WOW_INVALID_FILTER_LISTID 18 ++#define WOW_NO_VALID_FILTER_AT_ID 19 ++#define WOW_NO_VALID_LIST_AT_ID 20 ++#define WOW_NUM_PATTERNS_EXCEEDED 21 ++#define WOW_NUM_LISTS_EXCEEDED 22 ++#define WOW_GET_WOW_STATS 23 ++#define WOW_CLEAR_WOW_STATS 24 ++#define WOW_WAKEUP_HOST 25 ++#define WOW_EVENT_WAKEUP_HOST 26 ++#define WOW_EVENT_DISCARD 27 ++#define WOW_PATTERN_MATCH 28 ++#define WOW_PATTERN_NOT_MATCH 29 ++#define WOW_PATTERN_NOT_MATCH_OFFSET 30 ++#define WOW_DISABLED_HOST_ASLEEP 31 ++#define WOW_ENABLED_HOST_ASLEEP_NO_PATTERNS 32 ++#define WOW_ENABLED_HOST_ASLEEP_NO_MATCH_FOUND 33 ++#define WOW_DBGID_DEFINITION_END ++ ++/* WHAL debug identifier definitions */ ++#define WHAL_DBGID_DEFINITION_START ++#define WHAL_ERROR_ANI_CONTROL 1 ++#define WHAL_ERROR_CHIP_TEST1 2 ++#define WHAL_ERROR_CHIP_TEST2 3 ++#define WHAL_ERROR_EEPROM_CHECKSUM 4 ++#define WHAL_ERROR_EEPROM_MACADDR 5 ++#define WHAL_ERROR_INTERRUPT_HIU 6 ++#define WHAL_ERROR_KEYCACHE_RESET 7 ++#define WHAL_ERROR_KEYCACHE_SET 8 ++#define WHAL_ERROR_KEYCACHE_TYPE 9 ++#define WHAL_ERROR_KEYCACHE_TKIPENTRY 10 ++#define WHAL_ERROR_KEYCACHE_WEPLENGTH 11 ++#define WHAL_ERROR_PHY_INVALID_CHANNEL 12 ++#define WHAL_ERROR_POWER_AWAKE 13 ++#define WHAL_ERROR_POWER_SET 14 ++#define WHAL_ERROR_RECV_STOPDMA 15 ++#define WHAL_ERROR_RECV_STOPPCU 16 ++#define WHAL_ERROR_RESET_CHANNF1 17 ++#define WHAL_ERROR_RESET_CHANNF2 18 ++#define WHAL_ERROR_RESET_PM 19 ++#define WHAL_ERROR_RESET_OFFSETCAL 20 ++#define WHAL_ERROR_RESET_RFGRANT 21 ++#define WHAL_ERROR_RESET_RXFRAME 22 ++#define WHAL_ERROR_RESET_STOPDMA 23 ++#define WHAL_ERROR_RESET_RECOVER 24 ++#define WHAL_ERROR_XMIT_COMPUTE 25 ++#define WHAL_ERROR_XMIT_NOQUEUE 26 ++#define WHAL_ERROR_XMIT_ACTIVEQUEUE 27 ++#define WHAL_ERROR_XMIT_BADTYPE 28 ++#define WHAL_DBGID_DEFINITION_END ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* _DBGLOG_ID_H_ */ +diff --git a/drivers/sdio/function/wlan/ar6000/include/dl_list.h b/drivers/sdio/function/wlan/ar6000/include/dl_list.h +new file mode 100644 +index 0000000..4b9c581 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/dl_list.h +@@ -0,0 +1,114 @@ ++/* ++ * ++ * Double-link list definitions (adapted from Atheros SDIO stack) ++ * ++ * Copyright (c) 2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++#ifndef __DL_LIST_H___ ++#define __DL_LIST_H___ ++ ++#define A_CONTAINING_STRUCT(address, struct_type, field_name)\ ++ ((struct_type *)((A_UINT32)(address) - (A_UINT32)(&((struct_type *)0)->field_name))) ++ ++/* list functions */ ++/* pointers for the list */ ++typedef struct _DL_LIST { ++ struct _DL_LIST *pPrev; ++ struct _DL_LIST *pNext; ++}DL_LIST, *PDL_LIST; ++/* ++ * DL_LIST_INIT , initialize doubly linked list ++*/ ++#define DL_LIST_INIT(pList)\ ++ {(pList)->pPrev = pList; (pList)->pNext = pList;} ++ ++#define DL_LIST_IS_EMPTY(pList) (((pList)->pPrev == (pList)) && ((pList)->pNext == (pList))) ++#define DL_LIST_GET_ITEM_AT_HEAD(pList) (pList)->pNext ++#define DL_LIST_GET_ITEM_AT_TAIL(pList) (pList)->pPrev ++/* ++ * ITERATE_OVER_LIST pStart is the list, pTemp is a temp list member ++ * NOT: do not use this function if the items in the list are deleted inside the ++ * iteration loop ++*/ ++#define ITERATE_OVER_LIST(pStart, pTemp) \ ++ for((pTemp) =(pStart)->pNext; pTemp != (pStart); (pTemp) = (pTemp)->pNext) ++ ++ ++/* safe iterate macro that allows the item to be removed from the list ++ * the iteration continues to the next item in the list ++ */ ++#define ITERATE_OVER_LIST_ALLOW_REMOVE(pStart,pItem,st,offset) \ ++{ \ ++ PDL_LIST pTemp; \ ++ pTemp = (pStart)->pNext; \ ++ while (pTemp != (pStart)) { \ ++ (pItem) = A_CONTAINING_STRUCT(pTemp,st,offset); \ ++ pTemp = pTemp->pNext; \ ++ ++#define ITERATE_END }} ++ ++/* ++ * DL_ListInsertTail - insert pAdd to the end of the list ++*/ ++static INLINE PDL_LIST DL_ListInsertTail(PDL_LIST pList, PDL_LIST pAdd) { ++ /* insert at tail */ ++ pAdd->pPrev = pList->pPrev; ++ pAdd->pNext = pList; ++ pList->pPrev->pNext = pAdd; ++ pList->pPrev = pAdd; ++ return pAdd; ++} ++ ++/* ++ * DL_ListInsertHead - insert pAdd into the head of the list ++*/ ++static INLINE PDL_LIST DL_ListInsertHead(PDL_LIST pList, PDL_LIST pAdd) { ++ /* insert at head */ ++ pAdd->pPrev = pList; ++ pAdd->pNext = pList->pNext; ++ pList->pNext->pPrev = pAdd; ++ pList->pNext = pAdd; ++ return pAdd; ++} ++ ++#define DL_ListAdd(pList,pItem) DL_ListInsertHead((pList),(pItem)) ++/* ++ * DL_ListRemove - remove pDel from list ++*/ ++static INLINE PDL_LIST DL_ListRemove(PDL_LIST pDel) { ++ pDel->pNext->pPrev = pDel->pPrev; ++ pDel->pPrev->pNext = pDel->pNext; ++ /* point back to itself just to be safe, incase remove is called again */ ++ pDel->pNext = pDel; ++ pDel->pPrev = pDel; ++ return pDel; ++} ++ ++/* ++ * DL_ListRemoveItemFromHead - get a list item from the head ++*/ ++static INLINE PDL_LIST DL_ListRemoveItemFromHead(PDL_LIST pList) { ++ PDL_LIST pItem = NULL; ++ if (pList->pNext != pList) { ++ pItem = pList->pNext; ++ /* remove the first item from head */ ++ DL_ListRemove(pItem); ++ } ++ return pItem; ++} ++ ++#endif /* __DL_LIST_H___ */ +diff --git a/drivers/sdio/function/wlan/ar6000/include/dset_api.h b/drivers/sdio/function/wlan/ar6000/include/dset_api.h +new file mode 100644 +index 0000000..de5cc6a +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/dset_api.h +@@ -0,0 +1,63 @@ ++/* ++ * Copyright (c) 2004-2006 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ * $Id: //depot/sw/releases/olca2.0-GPL/host/include/dset_api.h#1 $ ++ * ++ * Host-side DataSet API. ++ * ++ */ ++ ++#ifndef _DSET_API_H_ ++#define _DSET_API_H_ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif /* __cplusplus */ ++ ++/* ++ * Host-side DataSet support is optional, and is not ++ * currently required for correct operation. To disable ++ * Host-side DataSet support, set this to 0. ++ */ ++#ifndef CONFIG_HOST_DSET_SUPPORT ++#define CONFIG_HOST_DSET_SUPPORT 1 ++#endif ++ ++/* Called to send a DataSet Open Reply back to the Target. */ ++A_STATUS wmi_dset_open_reply(struct wmi_t *wmip, ++ A_UINT32 status, ++ A_UINT32 access_cookie, ++ A_UINT32 size, ++ A_UINT32 version, ++ A_UINT32 targ_handle, ++ A_UINT32 targ_reply_fn, ++ A_UINT32 targ_reply_arg); ++ ++/* Called to send a DataSet Data Reply back to the Target. */ ++A_STATUS wmi_dset_data_reply(struct wmi_t *wmip, ++ A_UINT32 status, ++ A_UINT8 *host_buf, ++ A_UINT32 length, ++ A_UINT32 targ_buf, ++ A_UINT32 targ_reply_fn, ++ A_UINT32 targ_reply_arg); ++ ++#ifdef __cplusplus ++} ++#endif /* __cplusplus */ ++ ++ ++#endif /* _DSET_API_H_ */ +diff --git a/drivers/sdio/function/wlan/ar6000/include/dset_internal.h b/drivers/sdio/function/wlan/ar6000/include/dset_internal.h +new file mode 100644 +index 0000000..f0be380 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/dset_internal.h +@@ -0,0 +1,39 @@ ++/* ++ * Copyright (c) 2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * $ATH_LICENSE_HOSTSDK0_C$ ++ * ++ */ ++ ++#ifndef __DSET_INTERNAL_H__ ++#define __DSET_INTERNAL_H__ ++ ++/* ++ * Internal dset definitions, common for DataSet layer. ++ */ ++ ++#define DSET_TYPE_STANDARD 0 ++#define DSET_TYPE_BPATCHED 1 ++#define DSET_TYPE_COMPRESSED 2 ++ ++/* Dataset descriptor */ ++ ++typedef struct dset_descriptor_s { ++ struct dset_descriptor_s *next; /* List link. NULL only at the last ++ descriptor */ ++ A_UINT16 id; /* Dset ID */ ++ A_UINT16 size; /* Dset size. */ ++ void *DataPtr; /* Pointer to raw data for standard ++ DataSet or pointer to original ++ dset_descriptor for patched ++ DataSet */ ++ A_UINT32 data_type; /* DSET_TYPE_*, above */ ++ ++ void *AuxPtr; /* Additional data that might ++ needed for data_type. For ++ example, pointer to patch ++ Dataset descriptor for BPatch. */ ++} dset_descriptor_t; ++ ++#endif /* __DSET_INTERNAL_H__ */ +diff --git a/drivers/sdio/function/wlan/ar6000/include/dsetid.h b/drivers/sdio/function/wlan/ar6000/include/dsetid.h +new file mode 100644 +index 0000000..85729f8 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/dsetid.h +@@ -0,0 +1,110 @@ ++/* ++ * Copyright (c) 2004-2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * $ATH_LICENSE_HOSTSDK0_C$ ++ * ++ */ ++ ++#ifndef __DSETID_H__ ++#define __DSETID_H__ ++ ++/* Well-known DataSet IDs */ ++#define DSETID_UNUSED 0x00000000 ++#define DSETID_BOARD_DATA 0x00000001 /* Cal and board data */ ++#define DSETID_REGDB 0x00000002 /* Regulatory Database */ ++#define DSETID_POWER_CONTROL 0x00000003 /* TX Pwr Lim & Ant Gain */ ++#define DSETID_USER_CONFIG 0x00000004 /* User Configuration */ ++ ++#define DSETID_ANALOG_CONTROL_DATA_START 0x00000005 ++#define DSETID_ANALOG_CONTROL_DATA_END 0x00000025 ++/* ++ * Get DSETID for various reference clock speeds. ++ * For each speed there are three DataSets that correspond ++ * to the three columns of bank6 data (addr, 11a, 11b/g). ++ * This macro returns the dsetid of the first of those ++ * three DataSets. ++ */ ++#define ANALOG_CONTROL_DATA_DSETID(refclk) \ ++ (DSETID_ANALOG_CONTROL_DATA_START + 3*refclk) ++ ++/* ++ * There are TWO STARTUP_PATCH DataSets. ++ * DSETID_STARTUP_PATCH is historical, and was applied before BMI on ++ * earlier systems. On AR6002, it is applied after BMI, just like ++ * DSETID_STARTUP_PATCH2. ++ */ ++#define DSETID_STARTUP_PATCH 0x00000026 ++#define DSETID_GPIO_CONFIG_PATCH 0x00000027 ++#define DSETID_WLANREGS 0x00000028 /* override wlan regs */ ++#define DSETID_STARTUP_PATCH2 0x00000029 ++ ++#define DSETID_WOW_CONFIG 0x00000090 /* WoW Configuration */ ++ ++/* Add WHAL_INI_DATA_ID to DSETID_INI_DATA for a specific WHAL INI table. */ ++#define DSETID_INI_DATA 0x00000100 ++/* Reserved for WHAL INI Tables: 0x100..0x11f */ ++#define DSETID_INI_DATA_END 0x0000011f ++ ++#define DSETID_VENDOR_START 0x00010000 /* Vendor-defined DataSets */ ++ ++#define DSETID_INDEX_END 0xfffffffe /* Reserved to indicate the ++ end of a memory-based ++ DataSet Index */ ++#define DSETID_INDEX_FREE 0xffffffff /* An unused index entry */ ++ ++/* ++ * PATCH DataSet format: ++ * A list of patches, terminated by a patch with ++ * address=PATCH_END. ++ * ++ * This allows for patches to be stored in flash. ++ */ ++struct patch_s { ++ A_UINT32 *address; ++ A_UINT32 data; ++}; ++ ++/* ++ * Skip some patches. Can be used to erase a single patch in a ++ * patch DataSet without having to re-write the DataSet. May ++ * also be used to embed information for use by subsequent ++ * patch code. The "data" in a PATCH_SKIP tells how many ++ * bytes of length "patch_s" to skip. ++ */ ++#define PATCH_SKIP ((A_UINT32 *)0x00000000) ++ ++/* ++ * Execute code at the address specified by "data". ++ * The address of the patch structure is passed as ++ * the one parameter. ++ */ ++#define PATCH_CODE_ABS ((A_UINT32 *)0x00000001) ++ ++/* ++ * Same as PATCH_CODE_ABS, but treat "data" as an ++ * offset from the start of the patch word. ++ */ ++#define PATCH_CODE_REL ((A_UINT32 *)0x00000002) ++ ++/* Mark the end of this patch DataSet. */ ++#define PATCH_END ((A_UINT32 *)0xffffffff) ++ ++/* ++ * A DataSet which contains a Binary Patch to some other DataSet ++ * uses the original dsetid with the DSETID_BPATCH_FLAG bit set. ++ * Such a BPatch DataSet consists of BPatch metadata followed by ++ * the bdiff bytes. BPatch metadata consists of a single 32-bit ++ * word that contains the size of the BPatched final image. ++ * ++ * To create a suitable bdiff DataSet, use bdiff in host/tools/bdiff ++ * to create "diffs": ++ * bdiff -q -O -nooldmd5 -nonewmd5 -d ORIGfile NEWfile diffs ++ * Then add BPatch metadata to the start of "diffs". ++ * ++ * NB: There are some implementation-induced restrictions ++ * on which DataSets can be BPatched. ++ */ ++#define DSETID_BPATCH_FLAG 0x80000000 ++ ++#endif /* __DSETID_H__ */ +diff --git a/drivers/sdio/function/wlan/ar6000/include/gpio.h b/drivers/sdio/function/wlan/ar6000/include/gpio.h +new file mode 100644 +index 0000000..2203c7e +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/gpio.h +@@ -0,0 +1,34 @@ ++/* ++ * Copyright (c) 2005 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * $ATH_LICENSE_HOSTSDK0_C$ ++ * ++ */ ++ ++#if defined(AR6001) ++#define GPIO_PIN_COUNT 18 ++#else ++#define GPIO_PIN_COUNT 18 ++#endif ++ ++/* ++ * Possible values for WMIX_GPIO_SET_REGISTER_CMDID. ++ * NB: These match hardware order, so that addresses can ++ * easily be computed. ++ */ ++#define GPIO_ID_OUT 0x00000000 ++#define GPIO_ID_OUT_W1TS 0x00000001 ++#define GPIO_ID_OUT_W1TC 0x00000002 ++#define GPIO_ID_ENABLE 0x00000003 ++#define GPIO_ID_ENABLE_W1TS 0x00000004 ++#define GPIO_ID_ENABLE_W1TC 0x00000005 ++#define GPIO_ID_IN 0x00000006 ++#define GPIO_ID_STATUS 0x00000007 ++#define GPIO_ID_STATUS_W1TS 0x00000008 ++#define GPIO_ID_STATUS_W1TC 0x00000009 ++#define GPIO_ID_PIN0 0x0000000a ++#define GPIO_ID_PIN(n) (GPIO_ID_PIN0+(n)) ++ ++#define GPIO_LAST_REGISTER_ID GPIO_ID_PIN(17) ++#define GPIO_ID_NONE 0xffffffff +diff --git a/drivers/sdio/function/wlan/ar6000/include/gpio_api.h b/drivers/sdio/function/wlan/ar6000/include/gpio_api.h +new file mode 100644 +index 0000000..8078aa5 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/gpio_api.h +@@ -0,0 +1,57 @@ ++#ifndef _GPIO_API_H_ ++#define _GPIO_API_H_ ++/* ++ * Copyright 2005 Atheros Communications, Inc., All Rights Reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++/* ++ * Host-side General Purpose I/O API. ++ * ++ * $Id: //depot/sw/releases/olca2.0-GPL/host/include/gpio_api.h#1 $ ++ */ ++ ++/* ++ * Send a command to the Target in order to change output on GPIO pins. ++ */ ++A_STATUS wmi_gpio_output_set(struct wmi_t *wmip, ++ A_UINT32 set_mask, ++ A_UINT32 clear_mask, ++ A_UINT32 enable_mask, ++ A_UINT32 disable_mask); ++ ++/* ++ * Send a command to the Target requesting input state of GPIO pins. ++ */ ++A_STATUS wmi_gpio_input_get(struct wmi_t *wmip); ++ ++/* ++ * Send a command to the Target to change the value of a GPIO register. ++ */ ++A_STATUS wmi_gpio_register_set(struct wmi_t *wmip, ++ A_UINT32 gpioreg_id, ++ A_UINT32 value); ++ ++/* ++ * Send a command to the Target to fetch the value of a GPIO register. ++ */ ++A_STATUS wmi_gpio_register_get(struct wmi_t *wmip, A_UINT32 gpioreg_id); ++ ++/* ++ * Send a command to the Target, acknowledging some GPIO interrupts. ++ */ ++A_STATUS wmi_gpio_intr_ack(struct wmi_t *wmip, A_UINT32 ack_mask); ++ ++#endif /* _GPIO_API_H_ */ +diff --git a/drivers/sdio/function/wlan/ar6000/include/hif.h b/drivers/sdio/function/wlan/ar6000/include/hif.h +new file mode 100644 +index 0000000..f32388c +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/hif.h +@@ -0,0 +1,291 @@ ++/* ++ * Copyright (c) 2004-2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ * HIF specific declarations and prototypes ++ */ ++ ++#ifndef _HIF_H_ ++#define _HIF_H_ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif /* __cplusplus */ ++ ++/* Header files */ ++#include "a_config.h" ++#include "athdefs.h" ++#include "a_types.h" ++#include "a_osapi.h" ++ ++typedef struct htc_callbacks HTC_CALLBACKS; ++typedef struct hif_device HIF_DEVICE; ++ ++/* ++ * direction - Direction of transfer (HIF_READ/HIF_WRITE). ++ */ ++#define HIF_READ 0x00000001 ++#define HIF_WRITE 0x00000002 ++#define HIF_DIR_MASK (HIF_READ | HIF_WRITE) ++ ++/* ++ * type - An interface may support different kind of read/write commands. ++ * The command type is divided into a basic and an extended command ++ * and can be specified using HIF_BASIC_IO/HIF_EXTENDED_IO. ++ */ ++#define HIF_BASIC_IO 0x00000004 ++#define HIF_EXTENDED_IO 0x00000008 ++#define HIF_TYPE_MASK (HIF_BASIC_IO | HIF_EXTENDED_IO) ++ ++/* ++ * emode - This indicates the whether the command is to be executed in a ++ * blocking or non-blocking fashion (HIF_SYNCHRONOUS/ ++ * HIF_ASYNCHRONOUS). The read/write data paths in HTC have been ++ * implemented using the asynchronous mode allowing the the bus ++ * driver to indicate the completion of operation through the ++ * registered callback routine. The requirement primarily comes ++ * from the contexts these operations get called from (a driver's ++ * transmit context or the ISR context in case of receive). ++ * Support for both of these modes is essential. ++ */ ++#define HIF_SYNCHRONOUS 0x00000010 ++#define HIF_ASYNCHRONOUS 0x00000020 ++#define HIF_EMODE_MASK (HIF_SYNCHRONOUS | HIF_ASYNCHRONOUS) ++ ++/* ++ * dmode - An interface may support different kinds of commands based on ++ * the tradeoff between the amount of data it can carry and the ++ * setup time. Byte and Block modes are supported (HIF_BYTE_BASIS/ ++ * HIF_BLOCK_BASIS). In case of latter, the data is rounded off ++ * to the nearest block size by padding. The size of the block is ++ * configurable at compile time using the HIF_BLOCK_SIZE and is ++ * negotiated with the target during initialization after the ++ * dragon interrupts are enabled. ++ */ ++#define HIF_BYTE_BASIS 0x00000040 ++#define HIF_BLOCK_BASIS 0x00000080 ++#define HIF_DMODE_MASK (HIF_BYTE_BASIS | HIF_BLOCK_BASIS) ++ ++/* ++ * amode - This indicates if the address has to be incremented on dragon ++ * after every read/write operation (HIF?FIXED_ADDRESS/ ++ * HIF_INCREMENTAL_ADDRESS). ++ */ ++#define HIF_FIXED_ADDRESS 0x00000100 ++#define HIF_INCREMENTAL_ADDRESS 0x00000200 ++#define HIF_AMODE_MASK (HIF_FIXED_ADDRESS | HIF_INCREMENTAL_ADDRESS) ++ ++#define HIF_WR_ASYNC_BYTE_FIX \ ++ (HIF_WRITE | HIF_ASYNCHRONOUS | HIF_EXTENDED_IO | HIF_BYTE_BASIS | HIF_FIXED_ADDRESS) ++#define HIF_WR_ASYNC_BYTE_INC \ ++ (HIF_WRITE | HIF_ASYNCHRONOUS | HIF_EXTENDED_IO | HIF_BYTE_BASIS | HIF_INCREMENTAL_ADDRESS) ++#define HIF_WR_ASYNC_BLOCK_INC \ ++ (HIF_WRITE | HIF_ASYNCHRONOUS | HIF_EXTENDED_IO | HIF_BLOCK_BASIS | HIF_INCREMENTAL_ADDRESS) ++#define HIF_WR_SYNC_BYTE_FIX \ ++ (HIF_WRITE | HIF_SYNCHRONOUS | HIF_EXTENDED_IO | HIF_BYTE_BASIS | HIF_FIXED_ADDRESS) ++#define HIF_WR_SYNC_BYTE_INC \ ++ (HIF_WRITE | HIF_SYNCHRONOUS | HIF_EXTENDED_IO | HIF_BYTE_BASIS | HIF_INCREMENTAL_ADDRESS) ++#define HIF_WR_SYNC_BLOCK_INC \ ++ (HIF_WRITE | HIF_SYNCHRONOUS | HIF_EXTENDED_IO | HIF_BLOCK_BASIS | HIF_INCREMENTAL_ADDRESS) ++#define HIF_RD_SYNC_BYTE_INC \ ++ (HIF_READ | HIF_SYNCHRONOUS | HIF_EXTENDED_IO | HIF_BYTE_BASIS | HIF_INCREMENTAL_ADDRESS) ++#define HIF_RD_SYNC_BYTE_FIX \ ++ (HIF_READ | HIF_SYNCHRONOUS | HIF_EXTENDED_IO | HIF_BYTE_BASIS | HIF_FIXED_ADDRESS) ++#define HIF_RD_ASYNC_BYTE_FIX \ ++ (HIF_READ | HIF_ASYNCHRONOUS | HIF_EXTENDED_IO | HIF_BYTE_BASIS | HIF_FIXED_ADDRESS) ++#define HIF_RD_ASYNC_BLOCK_FIX \ ++ (HIF_READ | HIF_ASYNCHRONOUS | HIF_EXTENDED_IO | HIF_BLOCK_BASIS | HIF_FIXED_ADDRESS) ++#define HIF_RD_ASYNC_BYTE_INC \ ++ (HIF_READ | HIF_ASYNCHRONOUS | HIF_EXTENDED_IO | HIF_BYTE_BASIS | HIF_INCREMENTAL_ADDRESS) ++#define HIF_RD_ASYNC_BLOCK_INC \ ++ (HIF_READ | HIF_ASYNCHRONOUS | HIF_EXTENDED_IO | HIF_BLOCK_BASIS | HIF_INCREMENTAL_ADDRESS) ++#define HIF_RD_SYNC_BLOCK_INC \ ++ (HIF_READ | HIF_SYNCHRONOUS | HIF_EXTENDED_IO | HIF_BLOCK_BASIS | HIF_INCREMENTAL_ADDRESS) ++ ++ ++typedef enum { ++ HIF_DEVICE_POWER_STATE = 0, ++ HIF_DEVICE_GET_MBOX_BLOCK_SIZE, ++ HIF_DEVICE_GET_MBOX_ADDR, ++ HIF_DEVICE_GET_PENDING_EVENTS_FUNC, ++ HIF_DEVICE_GET_IRQ_PROC_MODE, ++ HIF_DEVICE_GET_RECV_EVENT_MASK_UNMASK_FUNC, ++} HIF_DEVICE_CONFIG_OPCODE; ++ ++/* ++ * HIF CONFIGURE definitions: ++ * ++ * HIF_DEVICE_GET_MBOX_BLOCK_SIZE ++ * input : none ++ * output : array of 4 A_UINT32s ++ * notes: block size is returned for each mailbox (4) ++ * ++ * HIF_DEVICE_GET_MBOX_ADDR ++ * input : none ++ * output : array of 4 A_UINT32 ++ * notes: address is returned for each mailbox (4) in the array ++ * ++ * HIF_DEVICE_GET_PENDING_EVENTS_FUNC ++ * input : none ++ * output: HIF_PENDING_EVENTS_FUNC function pointer ++ * notes: this is optional for the HIF layer, if the request is ++ * not handled then it indicates that the upper layer can use ++ * the standard device methods to get pending events (IRQs, mailbox messages etc..) ++ * otherwise it can call the function pointer to check pending events. ++ * ++ * HIF_DEVICE_GET_IRQ_PROC_MODE ++ * input : none ++ * output : HIF_DEVICE_IRQ_PROCESSING_MODE (interrupt processing mode) ++ * note: the hif layer interfaces with the underlying OS-specific bus driver. The HIF ++ * layer can report whether IRQ processing is requires synchronous behavior or ++ * can be processed using asynchronous bus requests (typically faster). ++ * ++ * HIF_DEVICE_GET_RECV_EVENT_MASK_UNMASK_FUNC ++ * input : ++ * output : HIF_MASK_UNMASK_RECV_EVENT function pointer ++ * notes: this is optional for the HIF layer. The HIF layer may require a special mechanism ++ * to mask receive message events. The upper layer can call this pointer when it needs ++ * to mask/unmask receive events (in case it runs out of buffers). ++ * ++ * ++ */ ++ ++typedef enum { ++ HIF_DEVICE_IRQ_SYNC_ONLY, /* for HIF implementations that require the DSR to process all ++ interrupts before returning */ ++ HIF_DEVICE_IRQ_ASYNC_SYNC, /* for HIF implementations that allow DSR to process interrupts ++ using ASYNC I/O (that is HIFAckInterrupt can be called at a ++ later time */ ++} HIF_DEVICE_IRQ_PROCESSING_MODE; ++ ++#define HIF_MAX_DEVICES 1 ++ ++struct htc_callbacks { ++ A_UCHAR *name; ++ A_UINT32 id; ++ A_STATUS (* deviceInsertedHandler)(void *hif_handle); ++ A_STATUS (* deviceRemovedHandler)(void *htc_handle, A_STATUS status); ++ A_STATUS (* deviceSuspendHandler)(void *htc_handle); ++ A_STATUS (* deviceResumeHandler)(void *htc_handle); ++ A_STATUS (* deviceWakeupHandler)(void *htc_handle); ++ A_STATUS (* rwCompletionHandler)(void *context, A_STATUS status); ++ A_STATUS (* dsrHandler)(void *htc_handle); ++}; ++ ++ ++#define HIF_OTHER_EVENTS (1 << 0) /* other interrupts (non-Recv) are pending, host ++ needs to read the register table to figure out what */ ++#define HIF_RECV_MSG_AVAIL (1 << 1) /* pending recv packet */ ++ ++typedef struct _HIF_PENDING_EVENTS_INFO { ++ A_UINT32 Events; ++ A_UINT32 LookAhead; ++} HIF_PENDING_EVENTS_INFO; ++ ++ /* function to get pending events , some HIF modules use special mechanisms ++ * to detect packet available and other interrupts */ ++typedef A_STATUS ( *HIF_PENDING_EVENTS_FUNC)(HIF_DEVICE *device, ++ HIF_PENDING_EVENTS_INFO *pEvents, ++ void *AsyncContext); ++ ++#define HIF_MASK_RECV TRUE ++#define HIF_UNMASK_RECV FALSE ++ /* function to mask recv events */ ++typedef A_STATUS ( *HIF_MASK_UNMASK_RECV_EVENT)(HIF_DEVICE *device, ++ A_BOOL Mask, ++ void *AsyncContext); ++ ++ ++/* ++ * This API is used by the HTC layer to initialize the HIF layer and to ++ * register different callback routines. Support for following events has ++ * been captured - DSR, Read/Write completion, Device insertion/removal, ++ * Device suspension/resumption/wakeup. In addition to this, the API is ++ * also used to register the name and the revision of the chip. The latter ++ * can be used to verify the revision of the chip read from the device ++ * before reporting it to HTC. ++ */ ++int HIFInit(HTC_CALLBACKS *callbacks); ++ ++/* ++ * This API is used to provide the read/write interface over the specific bus ++ * interface. ++ * address - Starting address in the dragon's address space. For mailbox ++ * writes, it refers to the start of the mbox boundary. It should ++ * be ensured that the last byte falls on the mailbox's EOM. For ++ * mailbox reads, it refers to the end of the mbox boundary. ++ * buffer - Pointer to the buffer containg the data to be transmitted or ++ * received. ++ * length - Amount of data to be transmitted or received. ++ * request - Characterizes the attributes of the command. ++ */ ++A_STATUS ++HIFReadWrite(HIF_DEVICE *device, ++ A_UINT32 address, ++ A_UCHAR *buffer, ++ A_UINT32 length, ++ A_UINT32 request, ++ void *context); ++ ++/* ++ * This can be initiated from the unload driver context ie when the HTCShutdown ++ * routine is called. ++ */ ++void HIFShutDownDevice(HIF_DEVICE *device); ++ ++/* ++ * This should translate to an acknowledgment to the bus driver indicating that ++ * the previous interrupt request has been serviced and the all the relevant ++ * sources have been cleared. HTC is ready to process more interrupts. ++ * This should prevent the bus driver from raising an interrupt unless the ++ * previous one has been serviced and acknowledged using the previous API. ++ */ ++void HIFAckInterrupt(HIF_DEVICE *device); ++ ++void HIFMaskInterrupt(HIF_DEVICE *device); ++ ++void HIFUnMaskInterrupt(HIF_DEVICE *device); ++ ++/* ++ * This set of functions are to be used by the bus driver to notify ++ * the HIF module about various events. ++ * These are not implemented if the bus driver provides an alternative ++ * way for this notification though callbacks for instance. ++ */ ++int HIFInsertEventNotify(void); ++ ++int HIFRemoveEventNotify(void); ++ ++int HIFIRQEventNotify(void); ++ ++int HIFRWCompleteEventNotify(void); ++ ++/* ++ * This function associates a opaque handle with the HIF layer ++ * to be used in communication with upper layer i.e. HTC. ++ * This would normaly be a pointer to htc_target data structure. ++ */ ++void HIFSetHandle(void *hif_handle, void *handle); ++ ++A_STATUS ++HIFConfigureDevice(HIF_DEVICE *device, HIF_DEVICE_CONFIG_OPCODE opcode, ++ void *config, A_UINT32 configLen); ++ ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* _HIF_H_ */ +diff --git a/drivers/sdio/function/wlan/ar6000/include/host_version.h b/drivers/sdio/function/wlan/ar6000/include/host_version.h +new file mode 100644 +index 0000000..c090115 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/host_version.h +@@ -0,0 +1,49 @@ ++#ifndef _HOST_VERSION_H_ ++#define _HOST_VERSION_H_ ++/* ++ * Copyright (c) 2004-2005 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * This file contains version information for the sample host driver for the ++ * AR6000 chip ++ * ++ * $Id: //depot/sw/releases/olca2.0-GPL/host/include/host_version.h#2 $ ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++#include ++ ++/* ++ * The version number is made up of major, minor, patch and build ++ * numbers. These are 16 bit numbers. The build and release script will ++ * set the build number using a Perforce counter. Here the build number is ++ * set to 9999 so that builds done without the build-release script are easily ++ * identifiable. ++ */ ++ ++#define ATH_SW_VER_MAJOR __VER_MAJOR_ ++#define ATH_SW_VER_MINOR __VER_MINOR_ ++#define ATH_SW_VER_PATCH __VER_PATCH_ ++#define ATH_SW_VER_BUILD 9999 ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* _HOST_VERSION_H_ */ +diff --git a/drivers/sdio/function/wlan/ar6000/include/htc.h b/drivers/sdio/function/wlan/ar6000/include/htc.h +new file mode 100644 +index 0000000..152d867 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/htc.h +@@ -0,0 +1,190 @@ ++/* ++ * Copyright (c) 2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * $ATH_LICENSE_HOSTSDK0_C$ ++ * ++ */ ++ ++ ++#ifndef __HTC_H__ ++#define __HTC_H__ ++ ++#ifndef ATH_TARGET ++#include "athstartpack.h" ++#endif ++ ++#define A_OFFSETOF(type,field) (int)(&(((type *)NULL)->field)) ++ ++#define ASSEMBLE_UNALIGNED_UINT16(p,highbyte,lowbyte) \ ++ (((A_UINT16)(((A_UINT8 *)(p))[(highbyte)])) << 8 | (A_UINT16)(((A_UINT8 *)(p))[(lowbyte)])) ++ ++/* alignment independent macros (little-endian) to fetch UINT16s or UINT8s from a ++ * structure using only the type and field name. ++ * Use these macros if there is the potential for unaligned buffer accesses. */ ++#define A_GET_UINT16_FIELD(p,type,field) \ ++ ASSEMBLE_UNALIGNED_UINT16(p,\ ++ A_OFFSETOF(type,field) + 1, \ ++ A_OFFSETOF(type,field)) ++ ++#define A_SET_UINT16_FIELD(p,type,field,value) \ ++{ \ ++ ((A_UINT8 *)(p))[A_OFFSETOF(type,field)] = (A_UINT8)(value); \ ++ ((A_UINT8 *)(p))[A_OFFSETOF(type,field) + 1] = (A_UINT8)((value) >> 8); \ ++} ++ ++#define A_GET_UINT8_FIELD(p,type,field) \ ++ ((A_UINT8 *)(p))[A_OFFSETOF(type,field)] ++ ++#define A_SET_UINT8_FIELD(p,type,field,value) \ ++ ((A_UINT8 *)(p))[A_OFFSETOF(type,field)] = (value) ++ ++/****** DANGER DANGER *************** ++ * ++ * The frame header length and message formats defined herein were ++ * selected to accommodate optimal alignment for target processing. This reduces code ++ * size and improves performance. ++ * ++ * Any changes to the header length may alter the alignment and cause exceptions ++ * on the target. When adding to the message structures insure that fields are ++ * properly aligned. ++ * ++ */ ++ ++/* HTC frame header */ ++typedef PREPACK struct _HTC_FRAME_HDR{ ++ /* do not remove or re-arrange these fields, these are minimally required ++ * to take advantage of 4-byte lookaheads in some hardware implementations */ ++ A_UINT8 EndpointID; ++ A_UINT8 Flags; ++ A_UINT16 PayloadLen; /* length of data (including trailer) that follows the header */ ++ ++ /***** end of 4-byte lookahead ****/ ++ ++ A_UINT8 ControlBytes[2]; ++ ++ /* message payload starts after the header */ ++ ++} POSTPACK HTC_FRAME_HDR; ++ ++/* frame header flags */ ++#define HTC_FLAGS_NEED_CREDIT_UPDATE (1 << 0) ++#define HTC_FLAGS_RECV_TRAILER (1 << 1) ++ ++ ++#define HTC_HDR_LENGTH (sizeof(HTC_FRAME_HDR)) ++#define HTC_MAX_TRAILER_LENGTH 255 ++#define HTC_MAX_PAYLOAD_LENGTH (2048 - sizeof(HTC_FRAME_HDR)) ++ ++/* HTC control message IDs */ ++typedef enum { ++ HTC_MSG_READY_ID = 1, ++ HTC_MSG_CONNECT_SERVICE_ID = 2, ++ HTC_MSG_CONNECT_SERVICE_RESPONSE_ID = 3, ++ HTC_MSG_SETUP_COMPLETE_ID = 4, ++} HTC_MSG_IDS; ++ ++#define HTC_MAX_CONTROL_MESSAGE_LENGTH 256 ++ ++/* base message ID header */ ++typedef PREPACK struct { ++ A_UINT16 MessageID; ++} POSTPACK HTC_UNKNOWN_MSG; ++ ++/* HTC ready message ++ * direction : target-to-host */ ++typedef PREPACK struct { ++ A_UINT16 MessageID; /* ID */ ++ A_UINT16 CreditCount; /* number of credits the target can offer */ ++ A_UINT16 CreditSize; /* size of each credit */ ++ A_UINT8 MaxEndpoints; /* maximum number of endpoints the target has resources for */ ++ A_UINT8 _Pad1; ++} POSTPACK HTC_READY_MSG; ++ ++#define HTC_SERVICE_META_DATA_MAX_LENGTH 128 ++ ++/* connect service ++ * direction : host-to-target */ ++typedef PREPACK struct { ++ A_UINT16 MessageID; ++ A_UINT16 ServiceID; /* service ID of the service to connect to */ ++ A_UINT16 ConnectionFlags; /* connection flags */ ++ ++#define HTC_CONNECT_FLAGS_REDUCE_CREDIT_DRIBBLE (1 << 2) /* reduce credit dribbling when ++ the host needs credits */ ++#define HTC_CONNECT_FLAGS_THRESHOLD_LEVEL_MASK (0x3) ++#define HTC_CONNECT_FLAGS_THRESHOLD_LEVEL_ONE_FOURTH 0x0 ++#define HTC_CONNECT_FLAGS_THRESHOLD_LEVEL_ONE_HALF 0x1 ++#define HTC_CONNECT_FLAGS_THRESHOLD_LEVEL_THREE_FOURTHS 0x2 ++#define HTC_CONNECT_FLAGS_THRESHOLD_LEVEL_UNITY 0x3 ++ ++ A_UINT8 ServiceMetaLength; /* length of meta data that follows */ ++ A_UINT8 _Pad1; ++ ++ /* service-specific meta data starts after the header */ ++ ++} POSTPACK HTC_CONNECT_SERVICE_MSG; ++ ++/* connect response ++ * direction : target-to-host */ ++typedef PREPACK struct { ++ A_UINT16 MessageID; ++ A_UINT16 ServiceID; /* service ID that the connection request was made */ ++ A_UINT8 Status; /* service connection status */ ++ A_UINT8 EndpointID; /* assigned endpoint ID */ ++ A_UINT16 MaxMsgSize; /* maximum expected message size on this endpoint */ ++ A_UINT8 ServiceMetaLength; /* length of meta data that follows */ ++ A_UINT8 _Pad1; ++ ++ /* service-specific meta data starts after the header */ ++ ++} POSTPACK HTC_CONNECT_SERVICE_RESPONSE_MSG; ++ ++typedef PREPACK struct { ++ A_UINT16 MessageID; ++ /* currently, no other fields */ ++} POSTPACK HTC_SETUP_COMPLETE_MSG; ++ ++ ++/* connect response status codes */ ++#define HTC_SERVICE_SUCCESS 0 /* success */ ++#define HTC_SERVICE_NOT_FOUND 1 /* service could not be found */ ++#define HTC_SERVICE_FAILED 2 /* specific service failed the connect */ ++#define HTC_SERVICE_NO_RESOURCES 3 /* no resources (i.e. no more endpoints) */ ++#define HTC_SERVICE_NO_MORE_EP 4 /* specific service is not allowing any more ++ endpoints */ ++ ++/* report record IDs */ ++typedef enum { ++ HTC_RECORD_NULL = 0, ++ HTC_RECORD_CREDITS = 1, ++ HTC_RECORD_LOOKAHEAD = 2, ++} HTC_RPT_IDS; ++ ++typedef PREPACK struct { ++ A_UINT8 RecordID; /* Record ID */ ++ A_UINT8 Length; /* Length of record */ ++} POSTPACK HTC_RECORD_HDR; ++ ++typedef PREPACK struct { ++ A_UINT8 EndpointID; /* Endpoint that owns these credits */ ++ A_UINT8 Credits; /* credits to report since last report */ ++} POSTPACK HTC_CREDIT_REPORT; ++ ++typedef PREPACK struct { ++ A_UINT8 PreValid; /* pre valid guard */ ++ A_UINT8 LookAhead[4]; /* 4 byte lookahead */ ++ A_UINT8 PostValid; /* post valid guard */ ++ ++ /* NOTE: the LookAhead array is guarded by a PreValid and Post Valid guard bytes. ++ * The PreValid bytes must equal the inverse of the PostValid byte */ ++ ++} POSTPACK HTC_LOOKAHEAD_REPORT; ++ ++#ifndef ATH_TARGET ++#include "athendpack.h" ++#endif ++ ++ ++#endif /* __HTC_H__ */ ++ +diff --git a/drivers/sdio/function/wlan/ar6000/include/htc_api.h b/drivers/sdio/function/wlan/ar6000/include/htc_api.h +new file mode 100644 +index 0000000..73b7df6 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/htc_api.h +@@ -0,0 +1,436 @@ ++/* ++ * ++ * Copyright (c) 2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++#ifndef _HTC_API_H_ ++#define _HTC_API_H_ ++ ++#include ++#include ++#include "htc_packet.h" ++ ++#ifdef __cplusplus ++extern "C" { ++#endif /* __cplusplus */ ++ ++/* TODO.. for BMI */ ++#define ENDPOINT1 0 ++// TODO -remove me, but we have to fix BMI first ++#define HTC_MAILBOX_NUM_MAX 4 ++ ++ ++/* ------ Endpoint IDS ------ */ ++typedef enum ++{ ++ ENDPOINT_UNUSED = -1, ++ ENDPOINT_0 = 0, ++ ENDPOINT_1 = 1, ++ ENDPOINT_2 = 2, ++ ENDPOINT_3, ++ ENDPOINT_4, ++ ENDPOINT_5, ++ ENDPOINT_6, ++ ENDPOINT_7, ++ ENDPOINT_8, ++ ENDPOINT_MAX, ++} HTC_ENDPOINT_ID; ++ ++/* this is the amount of header room required by users of HTC */ ++#define HTC_HEADER_LEN HTC_HDR_LENGTH ++ ++typedef void *HTC_HANDLE; ++ ++typedef A_UINT16 HTC_SERVICE_ID; ++ ++typedef struct _HTC_INIT_INFO { ++ void (*AddInstance)(HTC_HANDLE); ++ void (*DeleteInstance)(void *Instance); ++ void (*TargetFailure)(void *Instance, A_STATUS Status); ++} HTC_INIT_INFO; ++ ++/* per service connection send completion */ ++typedef void (*HTC_EP_SEND_PKT_COMPLETE)(void *,HTC_PACKET *); ++/* per service connection pkt received */ ++typedef void (*HTC_EP_RECV_PKT)(void *,HTC_PACKET *); ++ ++/* Optional per service connection receive buffer re-fill callback, ++ * On some OSes (like Linux) packets are allocated from a global pool and indicated up ++ * to the network stack. The driver never gets the packets back from the OS. For these OSes ++ * a refill callback can be used to allocate and re-queue buffers into HTC. ++ * ++ * On other OSes, the network stack can call into the driver's OS-specifc "return_packet" handler and ++ * the driver can re-queue these buffers into HTC. In this regard a refill callback is ++ * unnecessary */ ++typedef void (*HTC_EP_RECV_REFILL)(void *, HTC_ENDPOINT_ID Endpoint); ++ ++/* Optional per service connection callback when a send queue is full. This can occur if the ++ * host continues queueing up TX packets faster than credits can arrive ++ * To prevent the host (on some Oses like Linux) from continuously queueing packets ++ * and consuming resources, this callback is provided so that that the host ++ * can disable TX in the subsystem (i.e. network stack) ++ * Other OSes require a "per-packet" indication_RAW_STREAM_NUM_MAX for each completed TX packet, this ++ * closed loop mechanism will prevent the network stack from overunning the NIC */ ++typedef void (*HTC_EP_SEND_QUEUE_FULL)(void *, HTC_ENDPOINT_ID Endpoint); ++ ++typedef struct _HTC_EP_CALLBACKS { ++ void *pContext; /* context for each callback */ ++ HTC_EP_SEND_PKT_COMPLETE EpTxComplete; /* tx completion callback for connected endpoint */ ++ HTC_EP_RECV_PKT EpRecv; /* receive callback for connected endpoint */ ++ HTC_EP_RECV_REFILL EpRecvRefill; /* OPTIONAL receive re-fill callback for connected endpoint */ ++ HTC_EP_SEND_QUEUE_FULL EpSendFull; /* OPTIONAL send full callback */ ++} HTC_EP_CALLBACKS; ++ ++/* service connection information */ ++typedef struct _HTC_SERVICE_CONNECT_REQ { ++ HTC_SERVICE_ID ServiceID; /* service ID to connect to */ ++ A_UINT16 ConnectionFlags; /* connection flags, see htc protocol definition */ ++ A_UINT8 *pMetaData; /* ptr to optional service-specific meta-data */ ++ A_UINT8 MetaDataLength; /* optional meta data length */ ++ HTC_EP_CALLBACKS EpCallbacks; /* endpoint callbacks */ ++ int MaxSendQueueDepth; /* maximum depth of any send queue */ ++} HTC_SERVICE_CONNECT_REQ; ++ ++/* service connection response information */ ++typedef struct _HTC_SERVICE_CONNECT_RESP { ++ A_UINT8 *pMetaData; /* caller supplied buffer to optional meta-data */ ++ A_UINT8 BufferLength; /* length of caller supplied buffer */ ++ A_UINT8 ActualLength; /* actual length of meta data */ ++ HTC_ENDPOINT_ID Endpoint; /* endpoint to communicate over */ ++ int MaxMsgLength; /* max length of all messages over this endpoint */ ++ A_UINT8 ConnectRespCode; /* connect response code from target */ ++} HTC_SERVICE_CONNECT_RESP; ++ ++/* endpoint distribution structure */ ++typedef struct _HTC_ENDPOINT_CREDIT_DIST { ++ struct _HTC_ENDPOINT_CREDIT_DIST *pNext; ++ struct _HTC_ENDPOINT_CREDIT_DIST *pPrev; ++ HTC_SERVICE_ID ServiceID; /* Service ID (set by HTC) */ ++ HTC_ENDPOINT_ID Endpoint; /* endpoint for this distribution struct (set by HTC) */ ++ A_UINT32 DistFlags; /* distribution flags, distribution function can ++ set default activity using SET_EP_ACTIVE() macro */ ++ int TxCreditsNorm; /* credits for normal operation, anything above this ++ indicates the endpoint is over-subscribed, this field ++ is only relevant to the credit distribution function */ ++ int TxCreditsMin; /* floor for credit distribution, this field is ++ only relevant to the credit distribution function */ ++ int TxCreditsAssigned; /* number of credits assigned to this EP, this field ++ is only relevant to the credit dist function */ ++ int TxCredits; /* current credits available, this field is used by ++ HTC to determine whether a message can be sent or ++ must be queued */ ++ int TxCreditsToDist; /* pending credits to distribute on this endpoint, this ++ is set by HTC when credit reports arrive. ++ The credit distribution functions sets this to zero ++ when it distributes the credits */ ++ int TxCreditsSeek; /* this is the number of credits that the current pending TX ++ packet needs to transmit. This is set by HTC when ++ and endpoint needs credits in order to transmit */ ++ int TxCreditSize; /* size in bytes of each credit (set by HTC) */ ++ int TxCreditsPerMaxMsg; /* credits required for a maximum sized messages (set by HTC) */ ++ void *pHTCReserved; /* reserved for HTC use */ ++} HTC_ENDPOINT_CREDIT_DIST; ++ ++#define HTC_EP_ACTIVE (1 << 31) ++ ++/* macro to check if an endpoint has gone active, useful for credit ++ * distributions */ ++#define IS_EP_ACTIVE(epDist) ((epDist)->DistFlags & HTC_EP_ACTIVE) ++#define SET_EP_ACTIVE(epDist) (epDist)->DistFlags |= HTC_EP_ACTIVE ++ ++ /* credit distibution code that is passed into the distrbution function, ++ * there are mandatory and optional codes that must be handled */ ++typedef enum _HTC_CREDIT_DIST_REASON { ++ HTC_CREDIT_DIST_SEND_COMPLETE = 0, /* credits available as a result of completed ++ send operations (MANDATORY) resulting in credit reports */ ++ HTC_CREDIT_DIST_ACTIVITY_CHANGE = 1, /* a change in endpoint activity occured (OPTIONAL) */ ++ HTC_CREDIT_DIST_SEEK_CREDITS, /* an endpoint needs to "seek" credits (OPTIONAL) */ ++ HTC_DUMP_CREDIT_STATE /* for debugging, dump any state information that is kept by ++ the distribution function */ ++} HTC_CREDIT_DIST_REASON; ++ ++typedef void (*HTC_CREDIT_DIST_CALLBACK)(void *Context, ++ HTC_ENDPOINT_CREDIT_DIST *pEPList, ++ HTC_CREDIT_DIST_REASON Reason); ++ ++typedef void (*HTC_CREDIT_INIT_CALLBACK)(void *Context, ++ HTC_ENDPOINT_CREDIT_DIST *pEPList, ++ int TotalCredits); ++ ++ /* endpoint statistics action */ ++typedef enum _HTC_ENDPOINT_STAT_ACTION { ++ HTC_EP_STAT_SAMPLE = 0, /* only read statistics */ ++ HTC_EP_STAT_SAMPLE_AND_CLEAR = 1, /* sample and immediately clear statistics */ ++ HTC_EP_STAT_CLEAR /* clear only */ ++} HTC_ENDPOINT_STAT_ACTION; ++ ++ /* endpoint statistics */ ++typedef struct _HTC_ENDPOINT_STATS { ++ A_UINT32 TxCreditLowIndications; /* number of times the host set the credit-low flag in a send message on ++ this endpoint */ ++ A_UINT32 TxIssued; /* running count of TX packets issued */ ++ A_UINT32 TxCreditRpts; /* running count of total credit reports received for this endpoint */ ++ A_UINT32 TxCreditRptsFromRx; ++ A_UINT32 TxCreditRptsFromOther; ++ A_UINT32 TxCreditRptsFromEp0; ++ A_UINT32 TxCreditsFromRx; /* count of credits received via Rx packets on this endpoint */ ++ A_UINT32 TxCreditsFromOther; /* count of credits received via another endpoint */ ++ A_UINT32 TxCreditsFromEp0; /* count of credits received via another endpoint */ ++ A_UINT32 TxCreditsConsummed; /* count of consummed credits */ ++ A_UINT32 TxCreditsReturned; /* count of credits returned */ ++ A_UINT32 RxReceived; /* count of RX packets received */ ++ A_UINT32 RxLookAheads; /* count of lookahead records ++ found in messages received on this endpoint */ ++} HTC_ENDPOINT_STATS; ++ ++/* ------ Function Prototypes ------ */ ++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ ++ @desc: Initialize HTC ++ @function name: HTCInit ++ @input: pInfo - initialization information ++ @output: ++ @return: A_OK on success ++ @notes: The caller initializes global HTC state and registers various instance ++ notification callbacks (see HTC_INIT_INFO). ++ ++ @example: ++ @see also: HTCShutdown +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/ ++A_STATUS HTCInit(HTC_INIT_INFO *pInfo); ++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ ++ @desc: Get the underlying HIF device handle ++ @function name: HTCGetHifDevice ++ @input: HTCHandle - handle passed into the AddInstance callback ++ @output: ++ @return: opaque HIF device handle usable in HIF API calls. ++ @notes: ++ @example: ++ @see also: +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/ ++void *HTCGetHifDevice(HTC_HANDLE HTCHandle); ++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ ++ @desc: Set the associated instance for the HTC handle ++ @function name: HTCSetInstance ++ @input: HTCHandle - handle passed into the AddInstance callback ++ Instance - caller supplied instance object ++ @output: ++ @return: ++ @notes: Caller must set the instance information for the HTC handle in order to receive ++ notifications for instance deletion (DeleteInstance callback is called) and for target ++ failure notification. ++ @example: ++ @see also: +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/ ++void HTCSetInstance(HTC_HANDLE HTCHandle, void *Instance); ++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ ++ @desc: Set credit distribution parameters ++ @function name: HTCSetCreditDistribution ++ @input: HTCHandle - HTC handle ++ pCreditDistCont - caller supplied context to pass into distribution functions ++ CreditDistFunc - Distribution function callback ++ CreditDistInit - Credit Distribution initialization callback ++ ServicePriorityOrder - Array containing list of service IDs, lowest index is highest ++ priority ++ ListLength - number of elements in ServicePriorityOrder ++ @output: ++ @return: ++ @notes: The user can set a custom credit distribution function to handle special requirements ++ for each endpoint. A default credit distribution routine can be used by setting ++ CreditInitFunc to NULL. The default credit distribution is only provided for simple ++ "fair" credit distribution without regard to any prioritization. ++ ++ @example: ++ @see also: +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/ ++void HTCSetCreditDistribution(HTC_HANDLE HTCHandle, ++ void *pCreditDistContext, ++ HTC_CREDIT_DIST_CALLBACK CreditDistFunc, ++ HTC_CREDIT_INIT_CALLBACK CreditInitFunc, ++ HTC_SERVICE_ID ServicePriorityOrder[], ++ int ListLength); ++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ ++ @desc: Wait for the target to indicate the HTC layer is ready ++ @function name: HTCWaitTarget ++ @input: HTCHandle - HTC handle ++ @output: ++ @return: ++ @notes: This API blocks until the target responds with an HTC ready message. ++ The caller should not connect services until the target has indicated it is ++ ready. ++ @example: ++ @see also: HTCConnectService +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/ ++A_STATUS HTCWaitTarget(HTC_HANDLE HTCHandle); ++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ ++ @desc: Start target service communications ++ @function name: HTCStart ++ @input: HTCHandle - HTC handle ++ @output: ++ @return: ++ @notes: This API indicates to the target that the service connection phase is complete ++ and the target can freely start all connected services. This API should only be ++ called AFTER all service connections have been made. TCStart will issue a ++ SETUP_COMPLETE message to the target to indicate that all service connections ++ have been made and the target can start communicating over the endpoints. ++ @example: ++ @see also: HTCConnectService +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/ ++A_STATUS HTCStart(HTC_HANDLE HTCHandle); ++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ ++ @desc: Add receive packet to HTC ++ @function name: HTCAddReceivePkt ++ @input: HTCHandle - HTC handle ++ pPacket - HTC receive packet to add ++ @output: ++ @return: A_OK on success ++ @notes: user must supply HTC packets for capturing incomming HTC frames. The caller ++ must initialize each HTC packet using the SET_HTC_PACKET_INFO_RX_REFILL() ++ macro. ++ @example: ++ @see also: +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/ ++A_STATUS HTCAddReceivePkt(HTC_HANDLE HTCHandle, HTC_PACKET *pPacket); ++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ ++ @desc: Connect to an HTC service ++ @function name: HTCConnectService ++ @input: HTCHandle - HTC handle ++ pReq - connection details ++ @output: pResp - connection response ++ @return: ++ @notes: Service connections must be performed before HTCStart. User provides callback handlers ++ for various endpoint events. ++ @example: ++ @see also: HTCStart +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/ ++A_STATUS HTCConnectService(HTC_HANDLE HTCHandle, ++ HTC_SERVICE_CONNECT_REQ *pReq, ++ HTC_SERVICE_CONNECT_RESP *pResp); ++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ ++ @desc: Send an HTC packet ++ @function name: HTCSendPkt ++ @input: HTCHandle - HTC handle ++ pPacket - packet to send ++ @output: ++ @return: A_OK ++ @notes: Caller must initialize packet using SET_HTC_PACKET_INFO_TX() macro. ++ This interface is fully asynchronous. On error, HTC SendPkt will ++ call the registered Endpoint callback to cleanup the packet. ++ @example: ++ @see also: HTCFlushEndpoint +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/ ++A_STATUS HTCSendPkt(HTC_HANDLE HTCHandle, HTC_PACKET *pPacket); ++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ ++ @desc: Stop HTC service communications ++ @function name: HTCStop ++ @input: HTCHandle - HTC handle ++ @output: ++ @return: ++ @notes: HTC communications is halted. All receive and pending TX packets will ++ be flushed. ++ @example: ++ @see also: +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/ ++void HTCStop(HTC_HANDLE HTCHandle); ++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ ++ @desc: Shutdown HTC ++ @function name: HTCShutdown ++ @input: ++ @output: ++ @return: ++ @notes: This cleans up all resources allocated by HTCInit(). ++ @example: ++ @see also: HTCInit +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/ ++void HTCShutDown(void); ++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ ++ @desc: Flush pending TX packets ++ @function name: HTCFlushEndpoint ++ @input: HTCHandle - HTC handle ++ Endpoint - Endpoint to flush ++ Tag - flush tag ++ @output: ++ @return: ++ @notes: The Tag parameter is used to selectively flush packets with matching tags. ++ The value of 0 forces all packets to be flush regardless of tag. ++ @example: ++ @see also: HTCSendPkt +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/ ++void HTCFlushEndpoint(HTC_HANDLE HTCHandle, HTC_ENDPOINT_ID Endpoint, HTC_TX_TAG Tag); ++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ ++ @desc: Dump credit distribution state ++ @function name: HTCDumpCreditStates ++ @input: HTCHandle - HTC handle ++ @output: ++ @return: ++ @notes: This dumps all credit distribution information to the debugger ++ @example: ++ @see also: +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/ ++void HTCDumpCreditStates(HTC_HANDLE HTCHandle); ++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ ++ @desc: Indicate a traffic activity change on an endpoint ++ @function name: HTCIndicateActivityChange ++ @input: HTCHandle - HTC handle ++ Endpoint - endpoint in which activity has changed ++ Active - TRUE if active, FALSE if it has become inactive ++ @output: ++ @return: ++ @notes: This triggers the registered credit distribution function to ++ re-adjust credits for active/inactive endpoints. ++ @example: ++ @see also: +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/ ++void HTCIndicateActivityChange(HTC_HANDLE HTCHandle, ++ HTC_ENDPOINT_ID Endpoint, ++ A_BOOL Active); ++ ++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ ++ @desc: Get endpoint statistics ++ @function name: HTCGetEndpointStatistics ++ @input: HTCHandle - HTC handle ++ Endpoint - Endpoint identifier ++ Action - action to take with statistics ++ @output: ++ pStats - statistics that were sampled (can be NULL if Action is HTC_EP_STAT_CLEAR) ++ ++ @return: TRUE if statistics profiling is enabled, otherwise FALSE. ++ ++ @notes: Statistics is a compile-time option and this function may return FALSE ++ if HTC is not compiled with profiling. ++ ++ The caller can specify the statistic "action" to take when sampling ++ the statistics. This includes: ++ ++ HTC_EP_STAT_SAMPLE: The pStats structure is filled with the current values. ++ HTC_EP_STAT_SAMPLE_AND_CLEAR: The structure is filled and the current statistics ++ are cleared. ++ HTC_EP_STAT_CLEA : the statistics are cleared, the called can pass a NULL value for ++ pStats ++ ++ @example: ++ @see also: +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/ ++A_BOOL HTCGetEndpointStatistics(HTC_HANDLE HTCHandle, ++ HTC_ENDPOINT_ID Endpoint, ++ HTC_ENDPOINT_STAT_ACTION Action, ++ HTC_ENDPOINT_STATS *pStats); ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* _HTC_API_H_ */ +diff --git a/drivers/sdio/function/wlan/ar6000/include/htc_packet.h b/drivers/sdio/function/wlan/ar6000/include/htc_packet.h +new file mode 100644 +index 0000000..9ce8718 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/htc_packet.h +@@ -0,0 +1,138 @@ ++/* ++ * ++ * Copyright (c) 2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++#ifndef HTC_PACKET_H_ ++#define HTC_PACKET_H_ ++ ++ ++#include "dl_list.h" ++ ++struct _HTC_PACKET; ++ ++typedef void (* HTC_PACKET_COMPLETION)(void *,struct _HTC_PACKET *); ++ ++typedef A_UINT16 HTC_TX_TAG; ++ ++typedef struct _HTC_TX_PACKET_INFO { ++ HTC_TX_TAG Tag; /* tag used to selective flush packets */ ++} HTC_TX_PACKET_INFO; ++ ++#define HTC_TX_PACKET_TAG_ALL 0 /* a tag of zero is reserved and used to flush ALL packets */ ++#define HTC_TX_PACKET_TAG_INTERNAL 1 /* internal tags start here */ ++#define HTC_TX_PACKET_TAG_USER_DEFINED (HTC_TX_PACKET_TAG_INTERNAL + 9) /* user-defined tags start here */ ++ ++typedef struct _HTC_RX_PACKET_INFO { ++ A_UINT32 Unused; /* for future use and to make compilers happy */ ++} HTC_RX_PACKET_INFO; ++ ++/* wrapper around endpoint-specific packets */ ++typedef struct _HTC_PACKET { ++ DL_LIST ListLink; /* double link */ ++ void *pPktContext; /* caller's per packet specific context */ ++ ++ A_UINT8 *pBufferStart; /* the true buffer start , the caller can ++ store the real buffer start here. In ++ receive callbacks, the HTC layer sets pBuffer ++ to the start of the payload past the header. This ++ field allows the caller to reset pBuffer when it ++ recycles receive packets back to HTC */ ++ /* ++ * Pointer to the start of the buffer. In the transmit ++ * direction this points to the start of the payload. In the ++ * receive direction, however, the buffer when queued up ++ * points to the start of the HTC header but when returned ++ * to the caller points to the start of the payload ++ */ ++ A_UINT8 *pBuffer; /* payload start (RX/TX) */ ++ A_UINT32 BufferLength; /* length of buffer */ ++ A_UINT32 ActualLength; /* actual length of payload */ ++ int Endpoint; /* endpoint that this packet was sent/recv'd from */ ++ A_STATUS Status; /* completion status */ ++ union { ++ HTC_TX_PACKET_INFO AsTx; /* Tx Packet specific info */ ++ HTC_RX_PACKET_INFO AsRx; /* Rx Packet specific info */ ++ } PktInfo; ++ ++ /* the following fields are for internal HTC use */ ++ HTC_PACKET_COMPLETION Completion; /* completion */ ++ void *pContext; /* HTC private completion context */ ++ A_UINT32 HTCReserved; /* reserved */ ++} HTC_PACKET; ++ ++ ++ ++#define COMPLETE_HTC_PACKET(p,status) \ ++{ \ ++ (p)->Status = (status); \ ++ (p)->Completion((p)->pContext,(p)); \ ++} ++ ++#define INIT_HTC_PACKET_INFO(p,b,len) \ ++{ \ ++ (p)->pBufferStart = (b); \ ++ (p)->BufferLength = (len); \ ++} ++ ++/* macro to set an initial RX packet for refilling HTC */ ++#define SET_HTC_PACKET_INFO_RX_REFILL(p,c,b,len,ep) \ ++{ \ ++ (p)->pPktContext = (c); \ ++ (p)->pBuffer = (b); \ ++ (p)->pBufferStart = (b); \ ++ (p)->BufferLength = (len); \ ++ (p)->Endpoint = (ep); \ ++} ++ ++/* fast macro to recycle an RX packet that will be re-queued to HTC */ ++#define HTC_PACKET_RESET_RX(p) \ ++ (p)->pBuffer = (p)->pBufferStart ++ ++/* macro to set packet parameters for TX */ ++#define SET_HTC_PACKET_INFO_TX(p,c,b,len,ep,tag) \ ++{ \ ++ (p)->pPktContext = (c); \ ++ (p)->pBuffer = (b); \ ++ (p)->ActualLength = (len); \ ++ (p)->Endpoint = (ep); \ ++ (p)->PktInfo.AsTx.Tag = (tag); \ ++} ++ ++/* HTC Packet Queueing Macros */ ++typedef DL_LIST HTC_PACKET_QUEUE; ++/* initialize queue */ ++#define INIT_HTC_PACKET_QUEUE(pQ) DL_LIST_INIT((pQ)) ++/* enqueue HTC packet to the tail of the queue */ ++#define HTC_PACKET_ENQUEUE(pQ,p) DL_ListInsertTail((pQ),&(p)->ListLink) ++/* test if a queue is empty */ ++#define HTC_QUEUE_EMPTY(pQ) DL_LIST_IS_EMPTY((pQ)) ++/* get packet at head without removing it */ ++#define HTC_GET_PKT_AT_HEAD(pQ) A_CONTAINING_STRUCT((DL_LIST_GET_ITEM_AT_HEAD(pQ)),HTC_PACKET,ListLink); ++/* remove a packet from the current list it is linked to */ ++#define HTC_PACKET_REMOVE(p) DL_ListRemove(&(p)->ListLink) ++ ++/* dequeue an HTC packet from the head of the queue */ ++static INLINE HTC_PACKET *HTC_PACKET_DEQUEUE(HTC_PACKET_QUEUE *queue) { ++ DL_LIST *pItem = DL_ListRemoveItemFromHead(queue); ++ if (pItem != NULL) { ++ return A_CONTAINING_STRUCT(pItem, HTC_PACKET, ListLink); ++ } ++ return NULL; ++} ++ ++#endif /*HTC_PACKET_H_*/ +diff --git a/drivers/sdio/function/wlan/ar6000/include/htc_services.h b/drivers/sdio/function/wlan/ar6000/include/htc_services.h +new file mode 100644 +index 0000000..fc6fc29 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/htc_services.h +@@ -0,0 +1,37 @@ ++/* ++ * Copyright (c) 2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * $ATH_LICENSE_HOSTSDK0_C$ ++ * ++ */ ++ ++#ifndef __HTC_SERVICES_H__ ++#define __HTC_SERVICES_H__ ++ ++/* Current service IDs */ ++ ++typedef enum { ++ RSVD_SERVICE_GROUP = 0, ++ WMI_SERVICE_GROUP = 1, ++ ++ HTC_TEST_GROUP = 254, ++ HTC_SERVICE_GROUP_LAST = 255 ++}HTC_SERVICE_GROUP_IDS; ++ ++#define MAKE_SERVICE_ID(group,index) \ ++ (int)(((int)group << 8) | (int)(index)) ++ ++/* NOTE: service ID of 0x0000 is reserved and should never be used */ ++#define HTC_CTRL_RSVD_SVC MAKE_SERVICE_ID(RSVD_SERVICE_GROUP,1) ++#define WMI_CONTROL_SVC MAKE_SERVICE_ID(WMI_SERVICE_GROUP,0) ++#define WMI_DATA_BE_SVC MAKE_SERVICE_ID(WMI_SERVICE_GROUP,1) ++#define WMI_DATA_BK_SVC MAKE_SERVICE_ID(WMI_SERVICE_GROUP,2) ++#define WMI_DATA_VI_SVC MAKE_SERVICE_ID(WMI_SERVICE_GROUP,3) ++#define WMI_DATA_VO_SVC MAKE_SERVICE_ID(WMI_SERVICE_GROUP,4) ++#define WMI_MAX_SERVICES 5 ++ ++/* raw stream service (i.e. flash, tcmd, calibration apps) */ ++#define HTC_RAW_STREAMS_SVC MAKE_SERVICE_ID(HTC_TEST_GROUP,0) ++ ++#endif /*HTC_SERVICES_H_*/ +diff --git a/drivers/sdio/function/wlan/ar6000/include/ieee80211.h b/drivers/sdio/function/wlan/ar6000/include/ieee80211.h +new file mode 100644 +index 0000000..7090040 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/ieee80211.h +@@ -0,0 +1,342 @@ ++/*- ++ * Copyright (c) 2001 Atsushi Onoe ++ * Copyright (c) 2002-2004 Sam Leffler, Errno Consulting ++ * Copyright (c) 2006 Atheros Communications, Inc. ++ * ++ * Wireless Network driver for Atheros AR6001 ++ * All rights reserved. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR ++ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES ++ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ++ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, ++ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT ++ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, ++ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY ++ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF ++ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ * ++ */ ++#ifndef _NET80211_IEEE80211_H_ ++#define _NET80211_IEEE80211_H_ ++ ++#include "athstartpack.h" ++ ++/* ++ * 802.11 protocol definitions. ++ */ ++ ++#define IEEE80211_ADDR_LEN 6 /* size of 802.11 address */ ++/* is 802.11 address multicast/broadcast? */ ++#define IEEE80211_IS_MULTICAST(_a) (*(_a) & 0x01) ++#define IEEE80211_ADDR_EQ(addr1, addr2) \ ++ (A_MEMCMP(addr1, addr2, IEEE80211_ADDR_LEN) == 0) ++ ++#define IEEE80211_KEYBUF_SIZE 16 ++#define IEEE80211_MICBUF_SIZE (8+8) /* space for both tx and rx */ ++ ++/* ++ * NB: these values are ordered carefully; there are lots of ++ * of implications in any reordering. In particular beware ++ * that 4 is not used to avoid conflicting with IEEE80211_F_PRIVACY. ++ */ ++#define IEEE80211_CIPHER_WEP 0 ++#define IEEE80211_CIPHER_TKIP 1 ++#define IEEE80211_CIPHER_AES_OCB 2 ++#define IEEE80211_CIPHER_AES_CCM 3 ++#define IEEE80211_CIPHER_CKIP 5 ++#define IEEE80211_CIPHER_CCKM_KRK 6 ++#define IEEE80211_CIPHER_NONE 7 /* pseudo value */ ++ ++#define IEEE80211_CIPHER_MAX (IEEE80211_CIPHER_NONE+1) ++ ++#define IEEE80211_IS_VALID_WEP_CIPHER_LEN(len) \ ++ (((len) == 5) || ((len) == 13) || ((len) == 16)) ++ ++ ++ ++/* ++ * generic definitions for IEEE 802.11 frames ++ */ ++PREPACK struct ieee80211_frame { ++ A_UINT8 i_fc[2]; ++ A_UINT8 i_dur[2]; ++ A_UINT8 i_addr1[IEEE80211_ADDR_LEN]; ++ A_UINT8 i_addr2[IEEE80211_ADDR_LEN]; ++ A_UINT8 i_addr3[IEEE80211_ADDR_LEN]; ++ A_UINT8 i_seq[2]; ++ /* possibly followed by addr4[IEEE80211_ADDR_LEN]; */ ++ /* see below */ ++} POSTPACK; ++ ++#define IEEE80211_FC0_VERSION_MASK 0x03 ++#define IEEE80211_FC0_VERSION_SHIFT 0 ++#define IEEE80211_FC0_VERSION_0 0x00 ++#define IEEE80211_FC0_TYPE_MASK 0x0c ++#define IEEE80211_FC0_TYPE_SHIFT 2 ++#define IEEE80211_FC0_TYPE_MGT 0x00 ++#define IEEE80211_FC0_TYPE_CTL 0x04 ++#define IEEE80211_FC0_TYPE_DATA 0x08 ++ ++#define IEEE80211_FC0_SUBTYPE_MASK 0xf0 ++#define IEEE80211_FC0_SUBTYPE_SHIFT 4 ++/* for TYPE_MGT */ ++#define IEEE80211_FC0_SUBTYPE_ASSOC_REQ 0x00 ++#define IEEE80211_FC0_SUBTYPE_ASSOC_RESP 0x10 ++#define IEEE80211_FC0_SUBTYPE_REASSOC_REQ 0x20 ++#define IEEE80211_FC0_SUBTYPE_REASSOC_RESP 0x30 ++#define IEEE80211_FC0_SUBTYPE_PROBE_REQ 0x40 ++#define IEEE80211_FC0_SUBTYPE_PROBE_RESP 0x50 ++#define IEEE80211_FC0_SUBTYPE_BEACON 0x80 ++#define IEEE80211_FC0_SUBTYPE_ATIM 0x90 ++#define IEEE80211_FC0_SUBTYPE_DISASSOC 0xa0 ++#define IEEE80211_FC0_SUBTYPE_AUTH 0xb0 ++#define IEEE80211_FC0_SUBTYPE_DEAUTH 0xc0 ++/* for TYPE_CTL */ ++#define IEEE80211_FC0_SUBTYPE_PS_POLL 0xa0 ++#define IEEE80211_FC0_SUBTYPE_RTS 0xb0 ++#define IEEE80211_FC0_SUBTYPE_CTS 0xc0 ++#define IEEE80211_FC0_SUBTYPE_ACK 0xd0 ++#define IEEE80211_FC0_SUBTYPE_CF_END 0xe0 ++#define IEEE80211_FC0_SUBTYPE_CF_END_ACK 0xf0 ++/* for TYPE_DATA (bit combination) */ ++#define IEEE80211_FC0_SUBTYPE_DATA 0x00 ++#define IEEE80211_FC0_SUBTYPE_CF_ACK 0x10 ++#define IEEE80211_FC0_SUBTYPE_CF_POLL 0x20 ++#define IEEE80211_FC0_SUBTYPE_CF_ACPL 0x30 ++#define IEEE80211_FC0_SUBTYPE_NODATA 0x40 ++#define IEEE80211_FC0_SUBTYPE_CFACK 0x50 ++#define IEEE80211_FC0_SUBTYPE_CFPOLL 0x60 ++#define IEEE80211_FC0_SUBTYPE_CF_ACK_CF_ACK 0x70 ++#define IEEE80211_FC0_SUBTYPE_QOS 0x80 ++#define IEEE80211_FC0_SUBTYPE_QOS_NULL 0xc0 ++ ++#define IEEE80211_FC1_DIR_MASK 0x03 ++#define IEEE80211_FC1_DIR_NODS 0x00 /* STA->STA */ ++#define IEEE80211_FC1_DIR_TODS 0x01 /* STA->AP */ ++#define IEEE80211_FC1_DIR_FROMDS 0x02 /* AP ->STA */ ++#define IEEE80211_FC1_DIR_DSTODS 0x03 /* AP ->AP */ ++ ++#define IEEE80211_FC1_MORE_FRAG 0x04 ++#define IEEE80211_FC1_RETRY 0x08 ++#define IEEE80211_FC1_PWR_MGT 0x10 ++#define IEEE80211_FC1_MORE_DATA 0x20 ++#define IEEE80211_FC1_WEP 0x40 ++#define IEEE80211_FC1_ORDER 0x80 ++ ++#define IEEE80211_SEQ_FRAG_MASK 0x000f ++#define IEEE80211_SEQ_FRAG_SHIFT 0 ++#define IEEE80211_SEQ_SEQ_MASK 0xfff0 ++#define IEEE80211_SEQ_SEQ_SHIFT 4 ++ ++#define IEEE80211_NWID_LEN 32 ++ ++/* ++ * 802.11 rate set. ++ */ ++#define IEEE80211_RATE_SIZE 8 /* 802.11 standard */ ++#define IEEE80211_RATE_MAXSIZE 15 /* max rates we'll handle */ ++ ++#define WMM_NUM_AC 4 /* 4 AC categories */ ++ ++#define WMM_PARAM_ACI_M 0x60 /* Mask for ACI field */ ++#define WMM_PARAM_ACI_S 5 /* Shift for ACI field */ ++#define WMM_PARAM_ACM_M 0x10 /* Mask for ACM bit */ ++#define WMM_PARAM_ACM_S 4 /* Shift for ACM bit */ ++#define WMM_PARAM_AIFSN_M 0x0f /* Mask for aifsn field */ ++#define WMM_PARAM_LOGCWMIN_M 0x0f /* Mask for CwMin field (in log) */ ++#define WMM_PARAM_LOGCWMAX_M 0xf0 /* Mask for CwMax field (in log) */ ++#define WMM_PARAM_LOGCWMAX_S 4 /* Shift for CwMax field */ ++ ++#define WMM_AC_TO_TID(_ac) ( \ ++ ((_ac) == WMM_AC_VO) ? 6 : \ ++ ((_ac) == WMM_AC_VI) ? 5 : \ ++ ((_ac) == WMM_AC_BK) ? 1 : \ ++ 0) ++ ++#define TID_TO_WMM_AC(_tid) ( \ ++ ((_tid) < 1) ? WMM_AC_BE : \ ++ ((_tid) < 3) ? WMM_AC_BK : \ ++ ((_tid) < 6) ? WMM_AC_VI : \ ++ WMM_AC_VO) ++/* ++ * Management information element payloads. ++ */ ++ ++enum { ++ IEEE80211_ELEMID_SSID = 0, ++ IEEE80211_ELEMID_RATES = 1, ++ IEEE80211_ELEMID_FHPARMS = 2, ++ IEEE80211_ELEMID_DSPARMS = 3, ++ IEEE80211_ELEMID_CFPARMS = 4, ++ IEEE80211_ELEMID_TIM = 5, ++ IEEE80211_ELEMID_IBSSPARMS = 6, ++ IEEE80211_ELEMID_COUNTRY = 7, ++ IEEE80211_ELEMID_CHALLENGE = 16, ++ /* 17-31 reserved for challenge text extension */ ++ IEEE80211_ELEMID_PWRCNSTR = 32, ++ IEEE80211_ELEMID_PWRCAP = 33, ++ IEEE80211_ELEMID_TPCREQ = 34, ++ IEEE80211_ELEMID_TPCREP = 35, ++ IEEE80211_ELEMID_SUPPCHAN = 36, ++ IEEE80211_ELEMID_CHANSWITCH = 37, ++ IEEE80211_ELEMID_MEASREQ = 38, ++ IEEE80211_ELEMID_MEASREP = 39, ++ IEEE80211_ELEMID_QUIET = 40, ++ IEEE80211_ELEMID_IBSSDFS = 41, ++ IEEE80211_ELEMID_ERP = 42, ++ IEEE80211_ELEMID_RSN = 48, ++ IEEE80211_ELEMID_XRATES = 50, ++ IEEE80211_ELEMID_TPC = 150, ++ IEEE80211_ELEMID_CCKM = 156, ++ IEEE80211_ELEMID_VENDOR = 221, /* vendor private */ ++}; ++ ++#define ATH_OUI 0x7f0300 /* Atheros OUI */ ++#define ATH_OUI_TYPE 0x01 ++#define ATH_OUI_SUBTYPE 0x01 ++#define ATH_OUI_VERSION 0x00 ++ ++#define WPA_OUI 0xf25000 ++#define WPA_OUI_TYPE 0x01 ++#define WPA_VERSION 1 /* current supported version */ ++ ++#define WPA_CSE_NULL 0x00 ++#define WPA_CSE_WEP40 0x01 ++#define WPA_CSE_TKIP 0x02 ++#define WPA_CSE_CCMP 0x04 ++#define WPA_CSE_WEP104 0x05 ++ ++#define WPA_ASE_NONE 0x00 ++#define WPA_ASE_8021X_UNSPEC 0x01 ++#define WPA_ASE_8021X_PSK 0x02 ++ ++#define RSN_OUI 0xac0f00 ++#define RSN_VERSION 1 /* current supported version */ ++ ++#define RSN_CSE_NULL 0x00 ++#define RSN_CSE_WEP40 0x01 ++#define RSN_CSE_TKIP 0x02 ++#define RSN_CSE_WRAP 0x03 ++#define RSN_CSE_CCMP 0x04 ++#define RSN_CSE_WEP104 0x05 ++ ++#define RSN_ASE_NONE 0x00 ++#define RSN_ASE_8021X_UNSPEC 0x01 ++#define RSN_ASE_8021X_PSK 0x02 ++ ++#define RSN_CAP_PREAUTH 0x01 ++ ++#define WMM_OUI 0xf25000 ++#define WMM_OUI_TYPE 0x02 ++#define WMM_INFO_OUI_SUBTYPE 0x00 ++#define WMM_PARAM_OUI_SUBTYPE 0x01 ++#define WMM_VERSION 1 ++ ++/* WMM stream classes */ ++#define WMM_NUM_AC 4 ++#define WMM_AC_BE 0 /* best effort */ ++#define WMM_AC_BK 1 /* background */ ++#define WMM_AC_VI 2 /* video */ ++#define WMM_AC_VO 3 /* voice */ ++ ++/* TSPEC related */ ++#define ACTION_CATEGORY_CODE_TSPEC 17 ++#define ACTION_CODE_TSPEC_ADDTS 0 ++#define ACTION_CODE_TSPEC_ADDTS_RESP 1 ++#define ACTION_CODE_TSPEC_DELTS 2 ++ ++typedef enum { ++ TSPEC_STATUS_CODE_ADMISSION_ACCEPTED = 0, ++ TSPEC_STATUS_CODE_ADDTS_INVALID_PARAMS = 0x1, ++ TSPEC_STATUS_CODE_ADDTS_REQUEST_REFUSED = 0x3, ++ TSPEC_STATUS_CODE_UNSPECIFIED_QOS_RELATED_FAILURE = 0xC8, ++ TSPEC_STATUS_CODE_REQUESTED_REFUSED_POLICY_CONFIGURATION = 0xC9, ++ TSPEC_STATUS_CODE_INSUFFCIENT_BANDWIDTH = 0xCA, ++ TSPEC_STATUS_CODE_INVALID_PARAMS = 0xCB, ++ TSPEC_STATUS_CODE_DELTS_SENT = 0x30, ++ TSPEC_STATUS_CODE_DELTS_RECV = 0x31, ++} TSPEC_STATUS_CODE; ++ ++/* ++ * WMM/802.11e Tspec Element ++ */ ++typedef PREPACK struct wmm_tspec_ie_t { ++ A_UINT8 elementId; ++ A_UINT8 len; ++ A_UINT8 oui[3]; ++ A_UINT8 ouiType; ++ A_UINT8 ouiSubType; ++ A_UINT8 version; ++ A_UINT16 tsInfo_info; ++ A_UINT8 tsInfo_reserved; ++ A_UINT16 nominalMSDU; ++ A_UINT16 maxMSDU; ++ A_UINT32 minServiceInt; ++ A_UINT32 maxServiceInt; ++ A_UINT32 inactivityInt; ++ A_UINT32 suspensionInt; ++ A_UINT32 serviceStartTime; ++ A_UINT32 minDataRate; ++ A_UINT32 meanDataRate; ++ A_UINT32 peakDataRate; ++ A_UINT32 maxBurstSize; ++ A_UINT32 delayBound; ++ A_UINT32 minPhyRate; ++ A_UINT16 sba; ++ A_UINT16 mediumTime; ++} POSTPACK WMM_TSPEC_IE; ++ ++ ++/* ++ * BEACON management packets ++ * ++ * octet timestamp[8] ++ * octet beacon interval[2] ++ * octet capability information[2] ++ * information element ++ * octet elemid ++ * octet length ++ * octet information[length] ++ */ ++ ++#define IEEE80211_BEACON_INTERVAL(beacon) \ ++ ((beacon)[8] | ((beacon)[9] << 8)) ++#define IEEE80211_BEACON_CAPABILITY(beacon) \ ++ ((beacon)[10] | ((beacon)[11] << 8)) ++ ++#define IEEE80211_CAPINFO_ESS 0x0001 ++#define IEEE80211_CAPINFO_IBSS 0x0002 ++#define IEEE80211_CAPINFO_CF_POLLABLE 0x0004 ++#define IEEE80211_CAPINFO_CF_POLLREQ 0x0008 ++#define IEEE80211_CAPINFO_PRIVACY 0x0010 ++#define IEEE80211_CAPINFO_SHORT_PREAMBLE 0x0020 ++#define IEEE80211_CAPINFO_PBCC 0x0040 ++#define IEEE80211_CAPINFO_CHNL_AGILITY 0x0080 ++/* bits 8-9 are reserved */ ++#define IEEE80211_CAPINFO_SHORT_SLOTTIME 0x0400 ++#define IEEE80211_CAPINFO_APSD 0x0800 ++/* bit 12 is reserved */ ++#define IEEE80211_CAPINFO_DSSSOFDM 0x2000 ++/* bits 14-15 are reserved */ ++ ++/* ++ * Authentication Modes ++ */ ++ ++enum ieee80211_authmode { ++ IEEE80211_AUTH_NONE = 0, ++ IEEE80211_AUTH_OPEN = 1, ++ IEEE80211_AUTH_SHARED = 2, ++ IEEE80211_AUTH_8021X = 3, ++ IEEE80211_AUTH_AUTO = 4, /* auto-select/accept */ ++ /* NB: these are used only for ioctls */ ++ IEEE80211_AUTH_WPA = 5, /* WPA/RSN w/ 802.1x */ ++ IEEE80211_AUTH_WPA_PSK = 6, /* WPA/RSN w/ PSK */ ++ IEEE80211_AUTH_WPA_CCKM = 7, /* WPA/RSN IE w/ CCKM */ ++}; ++ ++#include "athendpack.h" ++ ++#endif /* _NET80211_IEEE80211_H_ */ +diff --git a/drivers/sdio/function/wlan/ar6000/include/ieee80211_ioctl.h b/drivers/sdio/function/wlan/ar6000/include/ieee80211_ioctl.h +new file mode 100644 +index 0000000..dab6747 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/ieee80211_ioctl.h +@@ -0,0 +1,163 @@ ++/* ++ * Copyright (c) 2004-2005 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ * ++ * $Id: //depot/sw/releases/olca2.0-GPL/host/os/linux/include/ieee80211_ioctl.h#1 $ ++ */ ++ ++#ifndef _IEEE80211_IOCTL_H_ ++#define _IEEE80211_IOCTL_H_ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++/* ++ * Extracted from the MADWIFI net80211/ieee80211_ioctl.h ++ */ ++ ++/* ++ * WPA/RSN get/set key request. Specify the key/cipher ++ * type and whether the key is to be used for sending and/or ++ * receiving. The key index should be set only when working ++ * with global keys (use IEEE80211_KEYIX_NONE for ``no index''). ++ * Otherwise a unicast/pairwise key is specified by the bssid ++ * (on a station) or mac address (on an ap). They key length ++ * must include any MIC key data; otherwise it should be no ++ more than IEEE80211_KEYBUF_SIZE. ++ */ ++struct ieee80211req_key { ++ u_int8_t ik_type; /* key/cipher type */ ++ u_int8_t ik_pad; ++ u_int16_t ik_keyix; /* key index */ ++ u_int8_t ik_keylen; /* key length in bytes */ ++ u_int8_t ik_flags; ++#define IEEE80211_KEY_XMIT 0x01 ++#define IEEE80211_KEY_RECV 0x02 ++#define IEEE80211_KEY_DEFAULT 0x80 /* default xmit key */ ++ u_int8_t ik_macaddr[IEEE80211_ADDR_LEN]; ++ u_int64_t ik_keyrsc; /* key receive sequence counter */ ++ u_int64_t ik_keytsc; /* key transmit sequence counter */ ++ u_int8_t ik_keydata[IEEE80211_KEYBUF_SIZE+IEEE80211_MICBUF_SIZE]; ++}; ++/* ++ * Delete a key either by index or address. Set the index ++ * to IEEE80211_KEYIX_NONE when deleting a unicast key. ++ */ ++struct ieee80211req_del_key { ++ u_int8_t idk_keyix; /* key index */ ++ u_int8_t idk_macaddr[IEEE80211_ADDR_LEN]; ++}; ++/* ++ * MLME state manipulation request. IEEE80211_MLME_ASSOC ++ * only makes sense when operating as a station. The other ++ * requests can be used when operating as a station or an ++ * ap (to effect a station). ++ */ ++struct ieee80211req_mlme { ++ u_int8_t im_op; /* operation to perform */ ++#define IEEE80211_MLME_ASSOC 1 /* associate station */ ++#define IEEE80211_MLME_DISASSOC 2 /* disassociate station */ ++#define IEEE80211_MLME_DEAUTH 3 /* deauthenticate station */ ++#define IEEE80211_MLME_AUTHORIZE 4 /* authorize station */ ++#define IEEE80211_MLME_UNAUTHORIZE 5 /* unauthorize station */ ++ u_int16_t im_reason; /* 802.11 reason code */ ++ u_int8_t im_macaddr[IEEE80211_ADDR_LEN]; ++}; ++ ++struct ieee80211req_addpmkid { ++ u_int8_t pi_bssid[IEEE80211_ADDR_LEN]; ++ u_int8_t pi_enable; ++ u_int8_t pi_pmkid[16]; ++}; ++ ++#define AUTH_ALG_OPEN_SYSTEM 0x01 ++#define AUTH_ALG_SHARED_KEY 0x02 ++#define AUTH_ALG_LEAP 0x04 ++ ++struct ieee80211req_authalg { ++ u_int8_t auth_alg; ++}; ++ ++/* ++ * Request to add an IE to a Management Frame ++ */ ++enum{ ++ IEEE80211_APPIE_FRAME_BEACON = 0, ++ IEEE80211_APPIE_FRAME_PROBE_REQ = 1, ++ IEEE80211_APPIE_FRAME_PROBE_RESP = 2, ++ IEEE80211_APPIE_FRAME_ASSOC_REQ = 3, ++ IEEE80211_APPIE_FRAME_ASSOC_RESP = 4, ++ IEEE80211_APPIE_NUM_OF_FRAME = 5 ++}; ++ ++/* ++ * The Maximum length of the IE that can be added to a Management frame ++ */ ++#define IEEE80211_APPIE_FRAME_MAX_LEN 78 ++ ++struct ieee80211req_getset_appiebuf { ++ u_int32_t app_frmtype; /* management frame type for which buffer is added */ ++ u_int32_t app_buflen; /*application supplied buffer length */ ++ u_int8_t app_buf[]; ++}; ++ ++/* ++ * The following definitions are used by an application to set filter ++ * for receiving management frames ++ */ ++enum { ++ IEEE80211_FILTER_TYPE_BEACON = 0x1, ++ IEEE80211_FILTER_TYPE_PROBE_REQ = 0x2, ++ IEEE80211_FILTER_TYPE_PROBE_RESP = 0x4, ++ IEEE80211_FILTER_TYPE_ASSOC_REQ = 0x8, ++ IEEE80211_FILTER_TYPE_ASSOC_RESP = 0x10, ++ IEEE80211_FILTER_TYPE_AUTH = 0x20, ++ IEEE80211_FILTER_TYPE_DEAUTH = 0x40, ++ IEEE80211_FILTER_TYPE_DISASSOC = 0x80, ++ IEEE80211_FILTER_TYPE_ALL = 0xFF /* used to check the valid filter bits */ ++}; ++ ++struct ieee80211req_set_filter { ++ u_int32_t app_filterype; /* management frame filter type */ ++}; ++ ++enum { ++ IEEE80211_PARAM_AUTHMODE = 3, /* Authentication Mode */ ++ IEEE80211_PARAM_MCASTCIPHER = 5, ++ IEEE80211_PARAM_MCASTKEYLEN = 6, /* multicast key length */ ++ IEEE80211_PARAM_UCASTCIPHER = 8, ++ IEEE80211_PARAM_UCASTKEYLEN = 9, /* unicast key length */ ++ IEEE80211_PARAM_WPA = 10, /* WPA mode (0,1,2) */ ++ IEEE80211_PARAM_ROAMING = 12, /* roaming mode */ ++ IEEE80211_PARAM_PRIVACY = 13, /* privacy invoked */ ++ IEEE80211_PARAM_COUNTERMEASURES = 14, /* WPA/TKIP countermeasures */ ++ IEEE80211_PARAM_DROPUNENCRYPTED = 15, /* discard unencrypted frames */ ++}; ++ ++/* ++ * Values for IEEE80211_PARAM_WPA ++ */ ++#define WPA_MODE_WPA1 1 ++#define WPA_MODE_WPA2 2 ++#define WPA_MODE_AUTO 3 ++#define WPA_MODE_NONE 4 ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* _IEEE80211_IOCTL_H_ */ +diff --git a/drivers/sdio/function/wlan/ar6000/include/ieee80211_node.h b/drivers/sdio/function/wlan/ar6000/include/ieee80211_node.h +new file mode 100644 +index 0000000..46b613c +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/ieee80211_node.h +@@ -0,0 +1,77 @@ ++/*- ++ * Copyright (c) 2001 Atsushi Onoe ++ * Copyright (c) 2002-2004 Sam Leffler, Errno Consulting ++ * Copyright (c) 2006 Atheros Communications, Inc. ++ * ++ * Wireless Network driver for Atheros AR6001 ++ * All rights reserved. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR ++ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES ++ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ++ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, ++ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT ++ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, ++ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY ++ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF ++ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ * ++ */ ++#ifndef _IEEE80211_NODE_H_ ++#define _IEEE80211_NODE_H_ ++ ++/* ++ * Node locking definitions. ++ */ ++#define IEEE80211_NODE_LOCK_INIT(_nt) A_MUTEX_INIT(&(_nt)->nt_nodelock) ++#define IEEE80211_NODE_LOCK_DESTROY(_nt) ++#define IEEE80211_NODE_LOCK(_nt) A_MUTEX_LOCK(&(_nt)->nt_nodelock) ++#define IEEE80211_NODE_UNLOCK(_nt) A_MUTEX_UNLOCK(&(_nt)->nt_nodelock) ++#define IEEE80211_NODE_LOCK_BH(_nt) A_MUTEX_LOCK(&(_nt)->nt_nodelock) ++#define IEEE80211_NODE_UNLOCK_BH(_nt) A_MUTEX_UNLOCK(&(_nt)->nt_nodelock) ++#define IEEE80211_NODE_LOCK_ASSERT(_nt) ++ ++/* ++ * Node reference counting definitions. ++ * ++ * ieee80211_node_initref initialize the reference count to 1 ++ * ieee80211_node_incref add a reference ++ * ieee80211_node_decref remove a reference ++ * ieee80211_node_dectestref remove a reference and return 1 if this ++ * is the last reference, otherwise 0 ++ * ieee80211_node_refcnt reference count for printing (only) ++ */ ++#define ieee80211_node_initref(_ni) ((_ni)->ni_refcnt = 1) ++#define ieee80211_node_incref(_ni) ((_ni)->ni_refcnt++) ++#define ieee80211_node_decref(_ni) ((_ni)->ni_refcnt--) ++#define ieee80211_node_dectestref(_ni) (((_ni)->ni_refcnt--) == 0) ++#define ieee80211_node_refcnt(_ni) ((_ni)->ni_refcnt) ++ ++#define IEEE80211_NODE_HASHSIZE 32 ++/* simple hash is enough for variation of macaddr */ ++#define IEEE80211_NODE_HASH(addr) \ ++ (((const A_UINT8 *)(addr))[IEEE80211_ADDR_LEN - 1] % \ ++ IEEE80211_NODE_HASHSIZE) ++ ++/* ++ * Table of ieee80211_node instances. Each ieee80211com ++ * has at least one for holding the scan candidates. ++ * When operating as an access point or in ibss mode there ++ * is a second table for associated stations or neighbors. ++ */ ++struct ieee80211_node_table { ++ void *nt_wmip; /* back reference */ ++ A_MUTEX_T nt_nodelock; /* on node table */ ++ struct bss *nt_node_first; /* information of all nodes */ ++ struct bss *nt_node_last; /* information of all nodes */ ++ struct bss *nt_hash[IEEE80211_NODE_HASHSIZE]; ++ const char *nt_name; /* for debugging */ ++ A_UINT32 nt_scangen; /* gen# for timeout scan */ ++ A_TIMER nt_inact_timer; ++ A_UINT8 isTimerArmed; /* is the node timer armed */ ++}; ++ ++#define WLAN_NODE_INACT_TIMEOUT_MSEC 10000 ++ ++#endif /* _IEEE80211_NODE_H_ */ +diff --git a/drivers/sdio/function/wlan/ar6000/include/ini_dset.h b/drivers/sdio/function/wlan/ar6000/include/ini_dset.h +new file mode 100644 +index 0000000..410f2b5 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/ini_dset.h +@@ -0,0 +1,40 @@ ++/* ++ * Copyright (c) 2004-2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * $ATH_LICENSE_HOSTSDK0_C$ ++ * ++ */ ++#ifndef _INI_DSET_H_ ++#define _INI_DSET_H_ ++ ++/* ++ * Each of these represents a WHAL INI table, which consists ++ * of an "address column" followed by 1 or more "value columns". ++ * ++ * Software uses the base WHAL_INI_DATA_ID+column to access a ++ * DataSet that holds a particular column of data. ++ */ ++typedef enum { ++ WHAL_INI_DATA_ID_NULL =0, ++ WHAL_INI_DATA_ID_MODE_SPECIFIC =1, /* 2,3 */ ++ WHAL_INI_DATA_ID_COMMON =4, /* 5 */ ++ WHAL_INI_DATA_ID_BB_RFGAIN =6, /* 7,8 */ ++ WHAL_INI_DATA_ID_ANALOG_BANK1 =9, /* 10 */ ++ WHAL_INI_DATA_ID_ANALOG_BANK2 =11, /* 12 */ ++ WHAL_INI_DATA_ID_ANALOG_BANK3 =13, /* 14, 15 */ ++ WHAL_INI_DATA_ID_ANALOG_BANK6 =16, /* 17, 18 */ ++ WHAL_INI_DATA_ID_ANALOG_BANK7 =19, /* 20 */ ++ WHAL_INI_DATA_ID_MODE_OVERRIDES =21, /* 22,23 */ ++ WHAL_INI_DATA_ID_COMMON_OVERRIDES =24, /* 25 */ ++ ++ WHAL_INI_DATA_ID_MAX =25 ++} WHAL_INI_DATA_ID; ++ ++typedef PREPACK struct { ++ A_UINT16 freqIndex; // 1 - A mode 2 - B or G mode 0 - common ++ A_UINT16 offset; ++ A_UINT32 newValue; ++} POSTPACK INI_DSET_REG_OVERRIDE; ++ ++#endif +diff --git a/drivers/sdio/function/wlan/ar6000/include/regDb.h b/drivers/sdio/function/wlan/ar6000/include/regDb.h +new file mode 100644 +index 0000000..b3f665f +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/regDb.h +@@ -0,0 +1,19 @@ ++/* ++ * Copyright (c) 2005 Atheros Communications, Inc. ++ * All rights reserved. ++ * ++ * ++ * $ATH_LICENSE_HOSTSDK0_C$ ++ * ++ * This module contains the header files for regulatory module, ++ * which include the DB schema and DB values. ++ * $Id: ++ */ ++ ++#ifndef __REG_DB_H__ ++#define __REG_DB_H__ ++ ++#include "./regulatory/reg_dbschema.h" ++#include "./regulatory/reg_dbvalues.h" ++ ++#endif /* __REG_DB_H__ */ +diff --git a/drivers/sdio/function/wlan/ar6000/include/regdump.h b/drivers/sdio/function/wlan/ar6000/include/regdump.h +new file mode 100644 +index 0000000..0106825 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/regdump.h +@@ -0,0 +1,33 @@ ++#ifndef __REGDUMP_H__ ++#define __REGDUMP_H__ ++/* ++ * Copyright (c) 2004-2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * $ATH_LICENSE_HOSTSDK0_C$ ++ * ++ */ ++#if defined(AR6001) ++#include "AR6001/AR6001_regdump.h" ++#endif ++#if defined(AR6002) ++#include "AR6002/AR6002_regdump.h" ++#endif ++ ++#if !defined(__ASSEMBLER__) ++/* ++ * Target CPU state at the time of failure is reflected ++ * in a register dump, which the Host can fetch through ++ * the diagnostic window. ++ */ ++struct register_dump_s { ++ A_UINT32 target_id; /* Target ID */ ++ A_UINT32 assline; /* Line number (if assertion failure) */ ++ A_UINT32 pc; /* Program Counter at time of exception */ ++ A_UINT32 badvaddr; /* Virtual address causing exception */ ++ CPU_exception_frame_t exc_frame; /* CPU-specific exception info */ ++ ++ /* Could copy top of stack here, too.... */ ++}; ++#endif /* __ASSEMBLER__ */ ++#endif /* __REGDUMP_H__ */ +diff --git a/drivers/sdio/function/wlan/ar6000/include/targaddrs.h b/drivers/sdio/function/wlan/ar6000/include/targaddrs.h +new file mode 100644 +index 0000000..da2a650 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/targaddrs.h +@@ -0,0 +1,158 @@ ++/* ++ * Copyright (c) 2004-2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * $ATH_LICENSE_HOSTSDK0_C$ ++ * ++ */ ++ ++#ifndef __TARGADDRS_H__ ++#define __TARGADDRS_H__ ++#if defined(AR6001) ++#include "AR6001/addrs.h" ++#endif ++#if defined(AR6002) ++#include "AR6002/addrs.h" ++#endif ++ ++/* ++ * AR6K option bits, to enable/disable various features. ++ * By default, all option bits are 0. ++ * These bits can be set in LOCAL_SCRATCH register 0. ++ */ ++#define AR6K_OPTION_BMI_DISABLE 0x01 /* Disable BMI comm with Host */ ++#define AR6K_OPTION_SERIAL_ENABLE 0x02 /* Enable serial port msgs */ ++#define AR6K_OPTION_WDT_DISABLE 0x04 /* WatchDog Timer override */ ++#define AR6K_OPTION_SLEEP_DISABLE 0x08 /* Disable system sleep */ ++#define AR6K_OPTION_STOP_BOOT 0x10 /* Stop boot processes (for ATE) */ ++#define AR6K_OPTION_ENABLE_NOANI 0x20 /* Operate without ANI */ ++#define AR6K_OPTION_DSET_DISABLE 0x40 /* Ignore DataSets */ ++#define AR6K_OPTION_IGNORE_FLASH 0x80 /* Ignore flash during bootup */ ++ ++/* ++ * xxx_HOST_INTEREST_ADDRESS is the address in Target RAM of the ++ * host_interest structure. It must match the address of the _host_interest ++ * symbol (see linker script). ++ * ++ * Host Interest is shared between Host and Target in order to coordinate ++ * between the two, and is intended to remain constant (with additions only ++ * at the end) across software releases. ++ */ ++#define AR6001_HOST_INTEREST_ADDRESS 0x80000600 ++#define AR6002_HOST_INTEREST_ADDRESS 0x00500400 ++ ++#define HOST_INTEREST_MAX_SIZE 0x100 ++ ++#if !defined(__ASSEMBLER__) ++struct register_dump_s; ++struct dbglog_hdr_s; ++ ++/* ++ * These are items that the Host may need to access ++ * via BMI or via the Diagnostic Window. The position ++ * of items in this structure must remain constant ++ * across firmware revisions! ++ * ++ * Types for each item must be fixed size across ++ * target and host platforms. ++ * ++ * More items may be added at the end. ++ */ ++struct host_interest_s { ++ /* ++ * Pointer to application-defined area, if any. ++ * Set by Target application during startup. ++ */ ++ A_UINT32 hi_app_host_interest; /* 0x00 */ ++ ++ /* Pointer to register dump area, valid after Target crash. */ ++ A_UINT32 hi_failure_state; /* 0x04 */ ++ ++ /* Pointer to debug logging header */ ++ A_UINT32 hi_dbglog_hdr; /* 0x08 */ ++ ++ /* Indicates whether or not flash is present on Target. ++ * NB: flash_is_present indicator is here not just ++ * because it might be of interest to the Host; but ++ * also because it's set early on by Target's startup ++ * asm code and we need it to have a special RAM address ++ * so that it doesn't get reinitialized with the rest ++ * of data. ++ */ ++ A_UINT32 hi_flash_is_present; /* 0x0c */ ++ ++ /* ++ * General-purpose flag bits, similar to AR6000_OPTION_* flags. ++ * Can be used by application rather than by OS. ++ */ ++ A_UINT32 hi_option_flag; /* 0x10 */ ++ ++ /* ++ * Boolean that determines whether or not to ++ * display messages on the serial port. ++ */ ++ A_UINT32 hi_serial_enable; /* 0x14 */ ++ ++ /* Start address of Flash DataSet index, if any */ ++ A_UINT32 hi_dset_list_head; /* 0x18 */ ++ ++ /* Override Target application start address */ ++ A_UINT32 hi_app_start; /* 0x1c */ ++ ++ /* Clock and voltage tuning */ ++ A_UINT32 hi_skip_clock_init; /* 0x20 */ ++ A_UINT32 hi_core_clock_setting; /* 0x24 */ ++ A_UINT32 hi_cpu_clock_setting; /* 0x28 */ ++ A_UINT32 hi_system_sleep_setting; /* 0x2c */ ++ A_UINT32 hi_xtal_control_setting; /* 0x30 */ ++ A_UINT32 hi_pll_ctrl_setting_24ghz; /* 0x34 */ ++ A_UINT32 hi_pll_ctrl_setting_5ghz; /* 0x38 */ ++ A_UINT32 hi_ref_voltage_trim_setting; /* 0x3c */ ++ A_UINT32 hi_clock_info; /* 0x40 */ ++ ++ /* ++ * Flash configuration overrides, used only ++ * when firmware is not executing from flash. ++ * (When using flash, modify the global variables ++ * with equivalent names.) ++ */ ++ A_UINT32 hi_bank0_addr_value; /* 0x44 */ ++ A_UINT32 hi_bank0_read_value; /* 0x48 */ ++ A_UINT32 hi_bank0_write_value; /* 0x4c */ ++ A_UINT32 hi_bank0_config_value; /* 0x50 */ ++ ++ /* Pointer to Board Data */ ++ A_UINT32 hi_board_data; /* 0x54 */ ++ A_UINT32 hi_board_data_initialized; /* 0x58 */ ++ ++ A_UINT32 hi_dset_RAM_index_table; /* 0x5c */ ++ ++ A_UINT32 hi_desired_baud_rate; /* 0x60 */ ++ A_UINT32 hi_dbglog_config; /* 0x64 */ ++ A_UINT32 hi_end_RAM_reserve_sz; /* 0x68 */ ++ A_UINT32 hi_mbox_io_block_sz; /* 0x6c */ ++ ++ A_UINT32 hi_num_bpatch_streams; /* 0x70 */ ++ A_UINT32 hi_mbox_isr_yield_limit; /* 0x74 */ ++ ++ A_UINT32 hi_refclk_hz; /* 0x78 */ ++}; ++ ++/* Bits defined in hi_option_flag */ ++#define HI_OPTION_TIMER_WAR 1 /* not really used */ ++ ++/* ++ * Intended for use by Host software, this macro returns the Target RAM ++ * address of any item in the host_interest structure. ++ * Example: target_addr = AR6001_HOST_INTEREST_ITEM_ADDRESS(hi_board_data); ++ */ ++#define AR6001_HOST_INTEREST_ITEM_ADDRESS(item) \ ++ ((A_UINT32)&((((struct host_interest_s *)(AR6001_HOST_INTEREST_ADDRESS))->item))) ++ ++#define AR6002_HOST_INTEREST_ITEM_ADDRESS(item) \ ++ ((A_UINT32)&((((struct host_interest_s *)(AR6002_HOST_INTEREST_ADDRESS))->item))) ++ ++ ++#endif /* !__ASSEMBLER__ */ ++ ++#endif /* __TARGADDRS_H__ */ +diff --git a/drivers/sdio/function/wlan/ar6000/include/testcmd.h b/drivers/sdio/function/wlan/ar6000/include/testcmd.h +new file mode 100644 +index 0000000..737533a +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/testcmd.h +@@ -0,0 +1,144 @@ ++/* ++ * Copyright (c) 2004-2005 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * $ATH_LICENSE_HOSTSDK0_C$ ++ * ++ */ ++ ++#ifndef TESTCMD_H_ ++#define TESTCMD_H_ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++typedef enum { ++ ZEROES_PATTERN = 0, ++ ONES_PATTERN, ++ REPEATING_10, ++ PN7_PATTERN, ++ PN9_PATTERN, ++ PN15_PATTERN ++}TX_DATA_PATTERN; ++ ++/* Continous tx ++ mode : TCMD_CONT_TX_OFF - Disabling continous tx ++ TCMD_CONT_TX_SINE - Enable continuous unmodulated tx ++ TCMD_CONT_TX_FRAME- Enable continuous modulated tx ++ freq : Channel freq in Mhz. (e.g 2412 for channel 1 in 11 g) ++dataRate: 0 - 1 Mbps ++ 1 - 2 Mbps ++ 2 - 5.5 Mbps ++ 3 - 11 Mbps ++ 4 - 6 Mbps ++ 5 - 9 Mbps ++ 6 - 12 Mbps ++ 7 - 18 Mbps ++ 8 - 24 Mbps ++ 9 - 36 Mbps ++ 10 - 28 Mbps ++ 11 - 54 Mbps ++ txPwr: Tx power in dBm[5 -11] for unmod Tx, [5-14] for mod Tx ++antenna: 1 - one antenna ++ 2 - two antenna ++Note : Enable/disable continuous tx test cmd works only when target is awake. ++*/ ++ ++typedef enum { ++ TCMD_CONT_TX_OFF = 0, ++ TCMD_CONT_TX_SINE, ++ TCMD_CONT_TX_FRAME, ++ TCMD_CONT_TX_TX99, ++ TCMD_CONT_TX_TX100 ++} TCMD_CONT_TX_MODE; ++ ++typedef PREPACK struct { ++ A_UINT32 testCmdId; ++ A_UINT32 mode; ++ A_UINT32 freq; ++ A_UINT32 dataRate; ++ A_INT32 txPwr; ++ A_UINT32 antenna; ++ A_UINT32 enANI; ++ A_UINT32 scramblerOff; ++ A_UINT32 aifsn; ++ A_UINT16 pktSz; ++ A_UINT16 txPattern; ++} POSTPACK TCMD_CONT_TX; ++ ++#define TCMD_TXPATTERN_ZERONE 0x1 ++#define TCMD_TXPATTERN_ZERONE_DIS_SCRAMBLE 0x2 ++ ++/* Continuous Rx ++ act: TCMD_CONT_RX_PROMIS - promiscuous mode (accept all incoming frames) ++ TCMD_CONT_RX_FILTER - filter mode (accept only frames with dest ++ address equal specified ++ mac address (set via act =3) ++ TCMD_CONT_RX_REPORT off mode (disable cont rx mode and get the ++ report from the last cont ++ Rx test) ++ ++ TCMD_CONT_RX_SETMAC - set MacAddr mode (sets the MAC address for the ++ target. This Overrides ++ the default MAC address.) ++ ++*/ ++typedef enum { ++ TCMD_CONT_RX_PROMIS =0, ++ TCMD_CONT_RX_FILTER, ++ TCMD_CONT_RX_REPORT, ++ TCMD_CONT_RX_SETMAC ++} TCMD_CONT_RX_ACT; ++ ++typedef PREPACK struct { ++ A_UINT32 testCmdId; ++ A_UINT32 act; ++ A_UINT32 enANI; ++ PREPACK union { ++ struct PREPACK TCMD_CONT_RX_PARA { ++ A_UINT32 freq; ++ A_UINT32 antenna; ++ } POSTPACK para; ++ struct PREPACK TCMD_CONT_RX_REPORT { ++ A_UINT32 totalPkt; ++ A_INT32 rssiInDBm; ++ } POSTPACK report; ++ struct PREPACK TCMD_CONT_RX_MAC { ++ A_UCHAR addr[ATH_MAC_LEN]; ++ } POSTPACK mac; ++ } POSTPACK u; ++} POSTPACK TCMD_CONT_RX; ++ ++/* Force sleep/wake test cmd ++ mode: TCMD_PM_WAKEUP - Wakeup the target ++ TCMD_PM_SLEEP - Force the target to sleep. ++ */ ++typedef enum { ++ TCMD_PM_WAKEUP = 1, /* be consistent with target */ ++ TCMD_PM_SLEEP ++} TCMD_PM_MODE; ++ ++typedef PREPACK struct { ++ A_UINT32 testCmdId; ++ A_UINT32 mode; ++} POSTPACK TCMD_PM; ++ ++typedef enum{ ++ TCMD_CONT_TX_ID, ++ TCMD_CONT_RX_ID, ++ TCMD_PM_ID ++ } TCMD_ID; ++ ++typedef PREPACK union { ++ TCMD_CONT_TX contTx; ++ TCMD_CONT_RX contRx; ++ TCMD_PM pm ; ++} POSTPACK TEST_CMD; ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* TESTCMD_H_ */ +diff --git a/drivers/sdio/function/wlan/ar6000/include/wlan_api.h b/drivers/sdio/function/wlan/ar6000/include/wlan_api.h +new file mode 100644 +index 0000000..aabca4b +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/wlan_api.h +@@ -0,0 +1,101 @@ ++#ifndef _HOST_WLAN_API_H_ ++#define _HOST_WLAN_API_H_ ++/* ++ * Copyright (c) 2004-2005 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * This file contains the API for the host wlan module ++ * ++ * $Id: //depot/sw/releases/olca2.0-GPL/host/include/wlan_api.h#1 $ ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++struct ieee80211_node_table; ++struct ieee80211_frame; ++ ++struct ieee80211_common_ie { ++ A_UINT16 ie_chan; ++ A_UINT8 *ie_tstamp; ++ A_UINT8 *ie_ssid; ++ A_UINT8 *ie_rates; ++ A_UINT8 *ie_xrates; ++ A_UINT8 *ie_country; ++ A_UINT8 *ie_wpa; ++ A_UINT8 *ie_rsn; ++ A_UINT8 *ie_wmm; ++ A_UINT8 *ie_ath; ++ A_UINT16 ie_capInfo; ++ A_UINT16 ie_beaconInt; ++ A_UINT8 *ie_tim; ++ A_UINT8 *ie_chswitch; ++ A_UINT8 ie_erp; ++ A_UINT8 *ie_wsc; ++}; ++ ++typedef struct bss { ++ A_UINT8 ni_macaddr[6]; ++ A_UINT8 ni_snr; ++ A_INT16 ni_rssi; ++ struct bss *ni_list_next; ++ struct bss *ni_list_prev; ++ struct bss *ni_hash_next; ++ struct bss *ni_hash_prev; ++ struct ieee80211_common_ie ni_cie; ++ A_UINT8 *ni_buf; ++ struct ieee80211_node_table *ni_table; ++ A_UINT32 ni_refcnt; ++ int ni_scangen; ++ A_UINT32 ni_tstamp; ++} bss_t; ++ ++typedef void wlan_node_iter_func(void *arg, bss_t *); ++ ++bss_t *wlan_node_alloc(struct ieee80211_node_table *nt, int wh_size); ++void wlan_node_free(bss_t *ni); ++void wlan_setup_node(struct ieee80211_node_table *nt, bss_t *ni, ++ const A_UINT8 *macaddr); ++bss_t *wlan_find_node(struct ieee80211_node_table *nt, const A_UINT8 *macaddr); ++void wlan_node_reclaim(struct ieee80211_node_table *nt, bss_t *ni); ++void wlan_free_allnodes(struct ieee80211_node_table *nt); ++void wlan_iterate_nodes(struct ieee80211_node_table *nt, wlan_node_iter_func *f, ++ void *arg); ++ ++void wlan_node_table_init(void *wmip, struct ieee80211_node_table *nt); ++void wlan_node_table_reset(struct ieee80211_node_table *nt); ++void wlan_node_table_cleanup(struct ieee80211_node_table *nt); ++ ++A_STATUS wlan_parse_beacon(A_UINT8 *buf, int framelen, ++ struct ieee80211_common_ie *cie); ++ ++A_UINT16 wlan_ieee2freq(int chan); ++A_UINT32 wlan_freq2ieee(A_UINT16 freq); ++ ++ ++bss_t * ++wlan_find_Ssidnode (struct ieee80211_node_table *nt, A_UCHAR *pSsid, ++ A_UINT32 ssidLength, A_BOOL bIsWPA2); ++ ++void ++wlan_node_return (struct ieee80211_node_table *nt, bss_t *ni); ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* _HOST_WLAN_API_H_ */ +diff --git a/drivers/sdio/function/wlan/ar6000/include/wlan_dset.h b/drivers/sdio/function/wlan/ar6000/include/wlan_dset.h +new file mode 100644 +index 0000000..8a876d6 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/wlan_dset.h +@@ -0,0 +1,20 @@ ++/* ++ * Copyright (c) 2007 Atheros Communications, Inc. ++ * All rights reserved. ++ * ++ * ++ * $ATH_LICENSE_HOSTSDK0_C$ ++ * ++ */ ++ ++#ifndef __WLAN_DSET_H__ ++#define __WKAN_DSET_H__ ++ ++typedef PREPACK struct wow_config_dset { ++ ++ A_UINT8 valid_dset; ++ A_UINT8 gpio_enable; ++ A_UINT16 gpio_pin; ++} POSTPACK WOW_CONFIG_DSET; ++ ++#endif +diff --git a/drivers/sdio/function/wlan/ar6000/include/wmi.h b/drivers/sdio/function/wlan/ar6000/include/wmi.h +new file mode 100644 +index 0000000..045acd4 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/wmi.h +@@ -0,0 +1,1743 @@ ++/* ++ * Copyright (c) 2004-2006 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * $ATH_LICENSE_HOSTSDK0_C$ ++ * ++ * This file contains the definitions of the WMI protocol specified in the ++ * Wireless Module Interface (WMI). It includes definitions of all the ++ * commands and events. Commands are messages from the host to the WM. ++ * Events and Replies are messages from the WM to the host. ++ * ++ * Ownership of correctness in regards to WMI commands ++ * belongs to the host driver and the WM is not required to validate ++ * parameters for value, proper range, or any other checking. ++ * ++ */ ++ ++#ifndef _WMI_H_ ++#define _WMI_H_ ++ ++#ifndef ATH_TARGET ++#include "athstartpack.h" ++#endif ++ ++#include "wmix.h" ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++#define WMI_PROTOCOL_VERSION 0x0002 ++#define WMI_PROTOCOL_REVISION 0x0000 ++ ++#define ATH_MAC_LEN 6 /* length of mac in bytes */ ++#define WMI_CMD_MAX_LEN 100 ++#define WMI_CONTROL_MSG_MAX_LEN 256 ++#define WMI_OPT_CONTROL_MSG_MAX_LEN 1536 ++#define IS_ETHERTYPE(_typeOrLen) ((_typeOrLen) >= 0x0600) ++#define RFC1042OUI {0x00, 0x00, 0x00} ++ ++#define IP_ETHERTYPE 0x0800 ++ ++#define WMI_IMPLICIT_PSTREAM 0xFF ++#define WMI_MAX_THINSTREAM 15 ++ ++struct host_app_area_s { ++ A_UINT32 wmi_protocol_ver; ++}; ++ ++/* ++ * Data Path ++ */ ++typedef PREPACK struct { ++ A_UINT8 dstMac[ATH_MAC_LEN]; ++ A_UINT8 srcMac[ATH_MAC_LEN]; ++ A_UINT16 typeOrLen; ++} POSTPACK ATH_MAC_HDR; ++ ++typedef PREPACK struct { ++ A_UINT8 dsap; ++ A_UINT8 ssap; ++ A_UINT8 cntl; ++ A_UINT8 orgCode[3]; ++ A_UINT16 etherType; ++} POSTPACK ATH_LLC_SNAP_HDR; ++ ++typedef enum { ++ DATA_MSGTYPE = 0x0, ++ CNTL_MSGTYPE, ++ SYNC_MSGTYPE ++} WMI_MSG_TYPE; ++ ++ ++typedef PREPACK struct { ++ A_INT8 rssi; ++ A_UINT8 info; /* WMI_MSG_TYPE in lower 2 bits - b1b0 */ ++ /* UP in next 3 bits - b4b3b2 */ ++#define WMI_DATA_HDR_MSG_TYPE_MASK 0x03 ++#define WMI_DATA_HDR_MSG_TYPE_SHIFT 0 ++#define WMI_DATA_HDR_UP_MASK 0x07 ++#define WMI_DATA_HDR_UP_SHIFT 2 ++#define WMI_DATA_HDR_IS_MSG_TYPE(h, t) (((h)->info & (WMI_DATA_HDR_MSG_TYPE_MASK)) == (t)) ++} POSTPACK WMI_DATA_HDR; ++ ++ ++#define WMI_DATA_HDR_SET_MSG_TYPE(h, t) (h)->info = (((h)->info & ~(WMI_DATA_HDR_MSG_TYPE_MASK << WMI_DATA_HDR_MSG_TYPE_SHIFT)) | (t << WMI_DATA_HDR_MSG_TYPE_SHIFT)) ++#define WMI_DATA_HDR_SET_UP(h, p) (h)->info = (((h)->info & ~(WMI_DATA_HDR_UP_MASK << WMI_DATA_HDR_UP_SHIFT)) | (p << WMI_DATA_HDR_UP_SHIFT)) ++ ++/* ++ * Control Path ++ */ ++typedef PREPACK struct { ++ A_UINT16 commandId; ++} POSTPACK WMI_CMD_HDR; /* used for commands and events */ ++ ++/* ++ * List of Commnands ++ */ ++typedef enum { ++ WMI_CONNECT_CMDID = 0x0001, ++ WMI_RECONNECT_CMDID, ++ WMI_DISCONNECT_CMDID, ++ WMI_SYNCHRONIZE_CMDID, ++ WMI_CREATE_PSTREAM_CMDID, ++ WMI_DELETE_PSTREAM_CMDID, ++ WMI_START_SCAN_CMDID, ++ WMI_SET_SCAN_PARAMS_CMDID, ++ WMI_SET_BSS_FILTER_CMDID, ++ WMI_SET_PROBED_SSID_CMDID, ++ WMI_SET_LISTEN_INT_CMDID, ++ WMI_SET_BMISS_TIME_CMDID, ++ WMI_SET_DISC_TIMEOUT_CMDID, ++ WMI_GET_CHANNEL_LIST_CMDID, ++ WMI_SET_BEACON_INT_CMDID, ++ WMI_GET_STATISTICS_CMDID, ++ WMI_SET_CHANNEL_PARAMS_CMDID, ++ WMI_SET_POWER_MODE_CMDID, ++ WMI_SET_IBSS_PM_CAPS_CMDID, ++ WMI_SET_POWER_PARAMS_CMDID, ++ WMI_SET_POWERSAVE_TIMERS_POLICY_CMDID, ++ WMI_ADD_CIPHER_KEY_CMDID, ++ WMI_DELETE_CIPHER_KEY_CMDID, ++ WMI_ADD_KRK_CMDID, ++ WMI_DELETE_KRK_CMDID, ++ WMI_SET_PMKID_CMDID, ++ WMI_SET_TX_PWR_CMDID, ++ WMI_GET_TX_PWR_CMDID, ++ WMI_SET_ASSOC_INFO_CMDID, ++ WMI_ADD_BAD_AP_CMDID, ++ WMI_DELETE_BAD_AP_CMDID, ++ WMI_SET_TKIP_COUNTERMEASURES_CMDID, ++ WMI_RSSI_THRESHOLD_PARAMS_CMDID, ++ WMI_TARGET_ERROR_REPORT_BITMASK_CMDID, ++ WMI_SET_ACCESS_PARAMS_CMDID, ++ WMI_SET_RETRY_LIMITS_CMDID, ++ WMI_SET_OPT_MODE_CMDID, ++ WMI_OPT_TX_FRAME_CMDID, ++ WMI_SET_VOICE_PKT_SIZE_CMDID, ++ WMI_SET_MAX_SP_LEN_CMDID, ++ WMI_SET_ROAM_CTRL_CMDID, ++ WMI_GET_ROAM_TBL_CMDID, ++ WMI_GET_ROAM_DATA_CMDID, ++ WMI_ENABLE_RM_CMDID, ++ WMI_SET_MAX_OFFHOME_DURATION_CMDID, ++ WMI_EXTENSION_CMDID, /* Non-wireless extensions */ ++ WMI_SNR_THRESHOLD_PARAMS_CMDID, ++ WMI_LQ_THRESHOLD_PARAMS_CMDID, ++ WMI_SET_LPREAMBLE_CMDID, ++ WMI_SET_RTS_CMDID, ++ WMI_CLR_RSSI_SNR_CMDID, ++ WMI_SET_FIXRATES_CMDID, ++ WMI_GET_FIXRATES_CMDID, ++ WMI_SET_AUTH_MODE_CMDID, ++ WMI_SET_REASSOC_MODE_CMDID, ++ WMI_SET_WMM_CMDID, ++ WMI_SET_WMM_TXOP_CMDID, ++ WMI_TEST_CMDID, ++ WMI_SET_BT_STATUS_CMDID, ++ WMI_SET_BT_PARAMS_CMDID, ++ ++ WMI_SET_KEEPALIVE_CMDID, ++ WMI_GET_KEEPALIVE_CMDID, ++ WMI_SET_APPIE_CMDID, ++ WMI_GET_APPIE_CMDID, ++ WMI_SET_WSC_STATUS_CMDID, ++ ++ /* Wake on Wireless */ ++ WMI_SET_HOST_SLEEP_MODE_CMDID, ++ WMI_SET_WOW_MODE_CMDID, ++ WMI_GET_WOW_LIST_CMDID, ++ WMI_ADD_WOW_PATTERN_CMDID, ++ WMI_DEL_WOW_PATTERN_CMDID, ++ WMI_SET_MAC_ADDRESS_CMDID, ++ WMI_SET_AKMP_PARAMS_CMDID, ++ WMI_SET_PMKID_LIST_CMDID, ++ WMI_GET_PMKID_LIST_CMDID, ++ ++ /* ++ * Developer commands starts at 0xF000 ++ */ ++ WMI_SET_BITRATE_CMDID = 0xF000, ++ WMI_GET_BITRATE_CMDID, ++ WMI_SET_WHALPARAM_CMDID, ++ ++} WMI_COMMAND_ID; ++ ++/* ++ * Frame Types ++ */ ++typedef enum { ++ WMI_FRAME_BEACON = 0, ++ WMI_FRAME_PROBE_REQ, ++ WMI_FRAME_PROBE_RESP, ++ WMI_FRAME_ASSOC_REQ, ++ WMI_FRAME_ASSOC_RESP, ++ WMI_NUM_MGMT_FRAME ++} WMI_MGMT_FRAME_TYPE; ++ ++/* ++ * Connect Command ++ */ ++typedef enum { ++ INFRA_NETWORK = 0x01, ++ ADHOC_NETWORK = 0x02, ++ ADHOC_CREATOR = 0x04, ++} NETWORK_TYPE; ++ ++typedef enum { ++ OPEN_AUTH = 0x01, ++ SHARED_AUTH = 0x02, ++ LEAP_AUTH = 0x04, /* different from IEEE_AUTH_MODE definitions */ ++} DOT11_AUTH_MODE; ++ ++typedef enum { ++ NONE_AUTH = 0x01, ++ WPA_AUTH = 0x02, ++ WPA_PSK_AUTH = 0x03, ++ WPA2_AUTH = 0x04, ++ WPA2_PSK_AUTH = 0x05, ++ WPA_AUTH_CCKM = 0x06, ++ WPA2_AUTH_CCKM = 0x07, ++} AUTH_MODE; ++ ++typedef enum { ++ NONE_CRYPT = 0x01, ++ WEP_CRYPT = 0x02, ++ TKIP_CRYPT = 0x03, ++ AES_CRYPT = 0x04, ++} CRYPTO_TYPE; ++ ++#define WMI_MIN_CRYPTO_TYPE NONE_CRYPT ++#define WMI_MAX_CRYPTO_TYPE (AES_CRYPT + 1) ++ ++#define WMI_MIN_KEY_INDEX 0 ++#define WMI_MAX_KEY_INDEX 3 ++ ++#define WMI_MAX_KEY_LEN 32 ++ ++#define WMI_MAX_SSID_LEN 32 ++ ++typedef enum { ++ CONNECT_ASSOC_POLICY_USER = 0x0001, ++ CONNECT_SEND_REASSOC = 0x0002, ++ CONNECT_IGNORE_WPAx_GROUP_CIPHER = 0x0004, ++ CONNECT_PROFILE_MATCH_DONE = 0x0008, ++ CONNECT_IGNORE_AAC_BEACON = 0x0010, ++ CONNECT_CSA_FOLLOW_BSS = 0x0020, ++} WMI_CONNECT_CTRL_FLAGS_BITS; ++ ++#define DEFAULT_CONNECT_CTRL_FLAGS (CONNECT_CSA_FOLLOW_BSS) ++ ++typedef PREPACK struct { ++ A_UINT8 networkType; ++ A_UINT8 dot11AuthMode; ++ A_UINT8 authMode; ++ A_UINT8 pairwiseCryptoType; ++ A_UINT8 pairwiseCryptoLen; ++ A_UINT8 groupCryptoType; ++ A_UINT8 groupCryptoLen; ++ A_UINT8 ssidLength; ++ A_UCHAR ssid[WMI_MAX_SSID_LEN]; ++ A_UINT16 channel; ++ A_UINT8 bssid[ATH_MAC_LEN]; ++ A_UINT32 ctrl_flags; ++} POSTPACK WMI_CONNECT_CMD; ++ ++/* ++ * WMI_RECONNECT_CMDID ++ */ ++typedef PREPACK struct { ++ A_UINT16 channel; /* hint */ ++ A_UINT8 bssid[ATH_MAC_LEN]; /* mandatory if set */ ++} POSTPACK WMI_RECONNECT_CMD; ++ ++/* ++ * WMI_ADD_CIPHER_KEY_CMDID ++ */ ++typedef enum { ++ PAIRWISE_USAGE = 0x00, ++ GROUP_USAGE = 0x01, ++ TX_USAGE = 0x02, /* default Tx Key - Static WEP only */ ++} KEY_USAGE; ++ ++/* ++ * Bit Flag ++ * Bit 0 - Initialise TSC - default is Initialize ++ */ ++#define KEY_OP_INIT_TSC 0x01 ++#define KEY_OP_INIT_RSC 0x02 ++ ++#define KEY_OP_INIT_VAL 0x03 /* Default Initialise the TSC & RSC */ ++#define KEY_OP_VALID_MASK 0x03 ++ ++typedef PREPACK struct { ++ A_UINT8 keyIndex; ++ A_UINT8 keyType; ++ A_UINT8 keyUsage; /* KEY_USAGE */ ++ A_UINT8 keyLength; ++ A_UINT8 keyRSC[8]; /* key replay sequence counter */ ++ A_UINT8 key[WMI_MAX_KEY_LEN]; ++ A_UINT8 key_op_ctrl; /* Additional Key Control information */ ++} POSTPACK WMI_ADD_CIPHER_KEY_CMD; ++ ++/* ++ * WMI_DELETE_CIPHER_KEY_CMDID ++ */ ++typedef PREPACK struct { ++ A_UINT8 keyIndex; ++} POSTPACK WMI_DELETE_CIPHER_KEY_CMD; ++ ++#define WMI_KRK_LEN 16 ++/* ++ * WMI_ADD_KRK_CMDID ++ */ ++typedef PREPACK struct { ++ A_UINT8 krk[WMI_KRK_LEN]; ++} POSTPACK WMI_ADD_KRK_CMD; ++ ++/* ++ * WMI_SET_TKIP_COUNTERMEASURES_CMDID ++ */ ++typedef enum { ++ WMI_TKIP_CM_DISABLE = 0x0, ++ WMI_TKIP_CM_ENABLE = 0x1, ++} WMI_TKIP_CM_CONTROL; ++ ++typedef PREPACK struct { ++ A_UINT8 cm_en; /* WMI_TKIP_CM_CONTROL */ ++} POSTPACK WMI_SET_TKIP_COUNTERMEASURES_CMD; ++ ++/* ++ * WMI_SET_PMKID_CMDID ++ */ ++ ++#define WMI_PMKID_LEN 16 ++ ++typedef enum { ++ PMKID_DISABLE = 0, ++ PMKID_ENABLE = 1, ++} PMKID_ENABLE_FLG; ++ ++typedef PREPACK struct { ++ A_UINT8 bssid[ATH_MAC_LEN]; ++ A_UINT8 enable; /* PMKID_ENABLE_FLG */ ++ A_UINT8 pmkid[WMI_PMKID_LEN]; ++} POSTPACK WMI_SET_PMKID_CMD; ++ ++/* ++ * WMI_START_SCAN_CMD ++ */ ++typedef enum { ++ WMI_LONG_SCAN = 0, ++ WMI_SHORT_SCAN = 1, ++} WMI_SCAN_TYPE; ++ ++typedef PREPACK struct { ++ A_BOOL forceFgScan; ++ A_BOOL isLegacy; /* For Legacy Cisco AP compatibility */ ++ A_UINT32 homeDwellTime; /* Maximum duration in the home channel(milliseconds) */ ++ A_UINT32 forceScanInterval; /* Time interval between scans (milliseconds)*/ ++ A_UINT8 scanType; /* WMI_SCAN_TYPE */ ++} POSTPACK WMI_START_SCAN_CMD; ++ ++/* ++ * WMI_SET_SCAN_PARAMS_CMDID ++ */ ++#define WMI_SHORTSCANRATIO_DEFAULT 3 ++typedef enum { ++ CONNECT_SCAN_CTRL_FLAGS = 0x01, /* set if can scan in the Connect cmd */ ++ SCAN_CONNECTED_CTRL_FLAGS = 0x02, /* set if scan for the SSID it is */ ++ /* already connected to */ ++ ACTIVE_SCAN_CTRL_FLAGS = 0x04, /* set if enable active scan */ ++ ROAM_SCAN_CTRL_FLAGS = 0x08, /* set if enable roam scan when bmiss and lowrssi */ ++ REPORT_BSSINFO_CTRL_FLAGS = 0x10, /* set if follows customer BSSINFO reporting rule */ ++ ENABLE_AUTO_CTRL_FLAGS = 0x20, /* if disabled, target doesn't ++ scan after a disconnect event */ ++ ENABLE_SCAN_ABORT_EVENT = 0x40 /* Scan complete event with canceled status will be generated when a scan is prempted before it gets completed */ ++ ++} WMI_SCAN_CTRL_FLAGS_BITS; ++ ++#define CAN_SCAN_IN_CONNECT(flags) (flags & CONNECT_SCAN_CTRL_FLAGS) ++#define CAN_SCAN_CONNECTED(flags) (flags & SCAN_CONNECTED_CTRL_FLAGS) ++#define ENABLE_ACTIVE_SCAN(flags) (flags & ACTIVE_SCAN_CTRL_FLAGS) ++#define ENABLE_ROAM_SCAN(flags) (flags & ROAM_SCAN_CTRL_FLAGS) ++#define CONFIG_REPORT_BSSINFO(flags) (flags & REPORT_BSSINFO_CTRL_FLAGS) ++#define IS_AUTO_SCAN_ENABLED(flags) (flags & ENABLE_AUTO_CTRL_FLAGS) ++#define SCAN_ABORT_EVENT_ENABLED(flags) (flags & ENABLE_SCAN_ABORT_EVENT) ++ ++#define DEFAULT_SCAN_CTRL_FLAGS (CONNECT_SCAN_CTRL_FLAGS| SCAN_CONNECTED_CTRL_FLAGS| ACTIVE_SCAN_CTRL_FLAGS| ROAM_SCAN_CTRL_FLAGS | ENABLE_AUTO_CTRL_FLAGS) ++ ++ ++typedef PREPACK struct { ++ A_UINT16 fg_start_period; /* seconds */ ++ A_UINT16 fg_end_period; /* seconds */ ++ A_UINT16 bg_period; /* seconds */ ++ A_UINT16 maxact_chdwell_time; /* msec */ ++ A_UINT16 pas_chdwell_time; /* msec */ ++ A_UINT8 shortScanRatio; /* how many shorts scan for one long */ ++ A_UINT8 scanCtrlFlags; ++ A_UINT16 minact_chdwell_time; /* msec */ ++ A_UINT32 max_dfsch_act_time; /* msecs */ ++} POSTPACK WMI_SCAN_PARAMS_CMD; ++ ++/* ++ * WMI_SET_BSS_FILTER_CMDID ++ */ ++typedef enum { ++ NONE_BSS_FILTER = 0x0, /* no beacons forwarded */ ++ ALL_BSS_FILTER, /* all beacons forwarded */ ++ PROFILE_FILTER, /* only beacons matching profile */ ++ ALL_BUT_PROFILE_FILTER, /* all but beacons matching profile */ ++ CURRENT_BSS_FILTER, /* only beacons matching current BSS */ ++ ALL_BUT_BSS_FILTER, /* all but beacons matching BSS */ ++ PROBED_SSID_FILTER, /* beacons matching probed ssid */ ++ LAST_BSS_FILTER, /* marker only */ ++} WMI_BSS_FILTER; ++ ++typedef PREPACK struct { ++ A_UINT8 bssFilter; /* see WMI_BSS_FILTER */ ++ A_UINT32 ieMask; ++} POSTPACK WMI_BSS_FILTER_CMD; ++ ++/* ++ * WMI_SET_PROBED_SSID_CMDID ++ */ ++#define MAX_PROBED_SSID_INDEX 5 ++ ++typedef enum { ++ DISABLE_SSID_FLAG = 0, /* disables entry */ ++ SPECIFIC_SSID_FLAG = 0x01, /* probes specified ssid */ ++ ANY_SSID_FLAG = 0x02, /* probes for any ssid */ ++} WMI_SSID_FLAG; ++ ++typedef PREPACK struct { ++ A_UINT8 entryIndex; /* 0 to MAX_PROBED_SSID_INDEX */ ++ A_UINT8 flag; /* WMI_SSID_FLG */ ++ A_UINT8 ssidLength; ++ A_UINT8 ssid[32]; ++} POSTPACK WMI_PROBED_SSID_CMD; ++ ++/* ++ * WMI_SET_LISTEN_INT_CMDID ++ * The Listen interval is between 15 and 3000 TUs ++ */ ++#define MIN_LISTEN_INTERVAL 15 ++#define MAX_LISTEN_INTERVAL 5000 ++#define MIN_LISTEN_BEACONS 1 ++#define MAX_LISTEN_BEACONS 50 ++ ++typedef PREPACK struct { ++ A_UINT16 listenInterval; ++ A_UINT16 numBeacons; ++} POSTPACK WMI_LISTEN_INT_CMD; ++ ++/* ++ * WMI_SET_BEACON_INT_CMDID ++ */ ++typedef PREPACK struct { ++ A_UINT16 beaconInterval; ++} POSTPACK WMI_BEACON_INT_CMD; ++ ++/* ++ * WMI_SET_BMISS_TIME_CMDID ++ * valid values are between 1000 and 5000 TUs ++ */ ++ ++#define MIN_BMISS_TIME 1000 ++#define MAX_BMISS_TIME 5000 ++#define MIN_BMISS_BEACONS 1 ++#define MAX_BMISS_BEACONS 50 ++ ++typedef PREPACK struct { ++ A_UINT16 bmissTime; ++ A_UINT16 numBeacons; ++} POSTPACK WMI_BMISS_TIME_CMD; ++ ++/* ++ * WMI_SET_POWER_MODE_CMDID ++ */ ++typedef enum { ++ REC_POWER = 0x01, ++ MAX_PERF_POWER, ++} WMI_POWER_MODE; ++ ++typedef PREPACK struct { ++ A_UINT8 powerMode; /* WMI_POWER_MODE */ ++} POSTPACK WMI_POWER_MODE_CMD; ++ ++/* ++ * WMI_SET_POWER_PARAMS_CMDID ++ */ ++typedef enum { ++ IGNORE_DTIM = 0x01, ++ NORMAL_DTIM = 0x02, ++ STICK_DTIM = 0x03, ++} WMI_DTIM_POLICY; ++ ++typedef PREPACK struct { ++ A_UINT16 idle_period; /* msec */ ++ A_UINT16 pspoll_number; ++ A_UINT16 dtim_policy; ++} POSTPACK WMI_POWER_PARAMS_CMD; ++ ++typedef PREPACK struct { ++ A_UINT8 power_saving; ++ A_UINT8 ttl; /* number of beacon periods */ ++ A_UINT16 atim_windows; /* msec */ ++ A_UINT16 timeout_value; /* msec */ ++} POSTPACK WMI_IBSS_PM_CAPS_CMD; ++ ++/* ++ * WMI_SET_POWERSAVE_TIMERS_POLICY_CMDID ++ */ ++typedef enum { ++ IGNORE_TIM_ALL_QUEUES_APSD = 0, ++ PROCESS_TIM_ALL_QUEUES_APSD = 1, ++ IGNORE_TIM_SIMULATED_APSD = 2, ++ PROCESS_TIM_SIMULATED_APSD = 3, ++} APSD_TIM_POLICY; ++ ++typedef PREPACK struct { ++ A_UINT16 psPollTimeout; /* msec */ ++ A_UINT16 triggerTimeout; /* msec */ ++ A_UINT32 apsdTimPolicy; /* TIM behavior with ques APSD enabled. Default is IGNORE_TIM_ALL_QUEUES_APSD */ ++ A_UINT32 simulatedAPSDTimPolicy; /* TIM behavior with simulated APSD enabled. Default is PROCESS_TIM_SIMULATED_APSD */ ++} POSTPACK WMI_POWERSAVE_TIMERS_POLICY_CMD; ++ ++/* ++ * WMI_SET_VOICE_PKT_SIZE_CMDID ++ */ ++typedef PREPACK struct { ++ A_UINT16 voicePktSize; ++} POSTPACK WMI_SET_VOICE_PKT_SIZE_CMD; ++ ++/* ++ * WMI_SET_MAX_SP_LEN_CMDID ++ */ ++typedef enum { ++ DELIVER_ALL_PKT = 0x0, ++ DELIVER_2_PKT = 0x1, ++ DELIVER_4_PKT = 0x2, ++ DELIVER_6_PKT = 0x3, ++} APSD_SP_LEN_TYPE; ++ ++typedef PREPACK struct { ++ A_UINT8 maxSPLen; ++} POSTPACK WMI_SET_MAX_SP_LEN_CMD; ++ ++/* ++ * WMI_SET_DISC_TIMEOUT_CMDID ++ */ ++typedef PREPACK struct { ++ A_UINT8 disconnectTimeout; /* seconds */ ++} POSTPACK WMI_DISC_TIMEOUT_CMD; ++ ++typedef enum { ++ UPLINK_TRAFFIC = 0, ++ DNLINK_TRAFFIC = 1, ++ BIDIR_TRAFFIC = 2, ++} DIR_TYPE; ++ ++typedef enum { ++ DISABLE_FOR_THIS_AC = 0, ++ ENABLE_FOR_THIS_AC = 1, ++ ENABLE_FOR_ALL_AC = 2, ++} VOICEPS_CAP_TYPE; ++ ++typedef enum { ++ TRAFFIC_TYPE_APERIODIC = 0, ++ TRAFFIC_TYPE_PERIODIC = 1, ++}TRAFFIC_TYPE; ++ ++/* ++ * WMI_CREATE_PSTREAM_CMDID ++ */ ++typedef PREPACK struct { ++ A_UINT32 minServiceInt; /* in milli-sec */ ++ A_UINT32 maxServiceInt; /* in milli-sec */ ++ A_UINT32 inactivityInt; /* in milli-sec */ ++ A_UINT32 suspensionInt; /* in milli-sec */ ++ A_UINT32 serviceStartTime; ++ A_UINT32 minDataRate; /* in bps */ ++ A_UINT32 meanDataRate; /* in bps */ ++ A_UINT32 peakDataRate; /* in bps */ ++ A_UINT32 maxBurstSize; ++ A_UINT32 delayBound; ++ A_UINT32 minPhyRate; /* in bps */ ++ A_UINT32 sba; ++ A_UINT32 mediumTime; ++ A_UINT16 nominalMSDU; /* in octects */ ++ A_UINT16 maxMSDU; /* in octects */ ++ A_UINT8 trafficClass; ++ A_UINT8 trafficType; /* TRAFFIC_TYPE */ ++ A_UINT8 trafficDirection; /* TRAFFIC_DIR */ ++ A_UINT8 voicePSCapability; /* VOICEPS_CAP_TYPE */ ++ A_UINT8 tsid; ++ A_UINT8 userPriority; /* 802.1D user priority */ ++} POSTPACK WMI_CREATE_PSTREAM_CMD; ++ ++/* ++ * WMI_DELETE_PSTREAM_CMDID ++ */ ++typedef PREPACK struct { ++ A_UINT8 trafficClass; ++ A_UINT8 tsid; ++} POSTPACK WMI_DELETE_PSTREAM_CMD; ++ ++/* ++ * WMI_SET_CHANNEL_PARAMS_CMDID ++ */ ++typedef enum { ++ WMI_11A_MODE = 0x1, ++ WMI_11G_MODE = 0x2, ++ WMI_11AG_MODE = 0x3, ++ WMI_11B_MODE = 0x4, ++ WMI_11GONLY_MODE = 0x5, ++} WMI_PHY_MODE; ++ ++#define WMI_MAX_CHANNELS 32 ++ ++typedef PREPACK struct { ++ A_UINT8 reserved1; ++ A_UINT8 scanParam; /* set if enable scan */ ++ A_UINT8 phyMode; /* see WMI_PHY_MODE */ ++ A_UINT8 numChannels; /* how many channels follow */ ++ A_UINT16 channelList[1]; /* channels in Mhz */ ++} POSTPACK WMI_CHANNEL_PARAMS_CMD; ++ ++ ++/* ++ * WMI_RSSI_THRESHOLD_PARAMS_CMDID ++ * Setting the polltime to 0 would disable polling. ++ * Threshold values are in the ascending order, and should agree to: ++ * (lowThreshold_lowerVal < lowThreshold_upperVal < highThreshold_lowerVal ++ * < highThreshold_upperVal) ++ */ ++ ++typedef PREPACK struct WMI_RSSI_THRESHOLD_PARAMS{ ++ A_UINT32 pollTime; /* Polling time as a factor of LI */ ++ A_INT16 thresholdAbove1_Val; /* lowest of upper */ ++ A_INT16 thresholdAbove2_Val; ++ A_INT16 thresholdAbove3_Val; ++ A_INT16 thresholdAbove4_Val; ++ A_INT16 thresholdAbove5_Val; ++ A_INT16 thresholdAbove6_Val; /* highest of upper */ ++ A_INT16 thresholdBelow1_Val; /* lowest of bellow */ ++ A_INT16 thresholdBelow2_Val; ++ A_INT16 thresholdBelow3_Val; ++ A_INT16 thresholdBelow4_Val; ++ A_INT16 thresholdBelow5_Val; ++ A_INT16 thresholdBelow6_Val; /* highest of bellow */ ++ A_UINT8 weight; /* "alpha" */ ++ A_UINT8 reserved[3]; ++} POSTPACK WMI_RSSI_THRESHOLD_PARAMS_CMD; ++ ++/* ++ * WMI_SNR_THRESHOLD_PARAMS_CMDID ++ * Setting the polltime to 0 would disable polling. ++ */ ++ ++typedef PREPACK struct WMI_SNR_THRESHOLD_PARAMS{ ++ A_UINT32 pollTime; /* Polling time as a factor of LI */ ++ A_UINT8 weight; /* "alpha" */ ++ A_UINT8 thresholdAbove1_Val; /* lowest of uppper*/ ++ A_UINT8 thresholdAbove2_Val; ++ A_UINT8 thresholdAbove3_Val; ++ A_UINT8 thresholdAbove4_Val; /* highest of upper */ ++ A_UINT8 thresholdBelow1_Val; /* lowest of bellow */ ++ A_UINT8 thresholdBelow2_Val; ++ A_UINT8 thresholdBelow3_Val; ++ A_UINT8 thresholdBelow4_Val; /* highest of bellow */ ++ A_UINT8 reserved[3]; ++} POSTPACK WMI_SNR_THRESHOLD_PARAMS_CMD; ++ ++/* ++ * WMI_LQ_THRESHOLD_PARAMS_CMDID ++ */ ++typedef PREPACK struct WMI_LQ_THRESHOLD_PARAMS { ++ A_UINT8 enable; ++ A_UINT8 thresholdAbove1_Val; ++ A_UINT8 thresholdAbove2_Val; ++ A_UINT8 thresholdAbove3_Val; ++ A_UINT8 thresholdAbove4_Val; ++ A_UINT8 thresholdBelow1_Val; ++ A_UINT8 thresholdBelow2_Val; ++ A_UINT8 thresholdBelow3_Val; ++ A_UINT8 thresholdBelow4_Val; ++ A_UINT8 reserved[3]; ++} POSTPACK WMI_LQ_THRESHOLD_PARAMS_CMD; ++ ++typedef enum { ++ WMI_LPREAMBLE_DISABLED = 0, ++ WMI_LPREAMBLE_ENABLED ++} WMI_LPREAMBLE_STATUS; ++ ++typedef PREPACK struct { ++ A_UINT8 status; ++}POSTPACK WMI_SET_LPREAMBLE_CMD; ++ ++typedef PREPACK struct { ++ A_UINT16 threshold; ++}POSTPACK WMI_SET_RTS_CMD; ++ ++/* ++ * WMI_TARGET_ERROR_REPORT_BITMASK_CMDID ++ * Sets the error reporting event bitmask in target. Target clears it ++ * upon an error. Subsequent errors are counted, but not reported ++ * via event, unless the bitmask is set again. ++ */ ++typedef PREPACK struct { ++ A_UINT32 bitmask; ++} POSTPACK WMI_TARGET_ERROR_REPORT_BITMASK; ++ ++/* ++ * WMI_SET_TX_PWR_CMDID ++ */ ++typedef PREPACK struct { ++ A_UINT8 dbM; /* in dbM units */ ++} POSTPACK WMI_SET_TX_PWR_CMD, WMI_TX_PWR_REPLY; ++ ++/* ++ * WMI_SET_ASSOC_INFO_CMDID ++ * ++ * A maximum of 2 private IEs can be sent in the [Re]Assoc request. ++ * A 3rd one, the CCX version IE can also be set from the host. ++ */ ++#define WMI_MAX_ASSOC_INFO_TYPE 2 ++#define WMI_CCX_VER_IE 2 /* ieType to set CCX Version IE */ ++ ++#define WMI_MAX_ASSOC_INFO_LEN 240 ++ ++typedef PREPACK struct { ++ A_UINT8 ieType; ++ A_UINT8 bufferSize; ++ A_UINT8 assocInfo[1]; /* up to WMI_MAX_ASSOC_INFO_LEN */ ++} POSTPACK WMI_SET_ASSOC_INFO_CMD; ++ ++ ++/* ++ * WMI_GET_TX_PWR_CMDID does not take any parameters ++ */ ++ ++/* ++ * WMI_ADD_BAD_AP_CMDID ++ */ ++#define WMI_MAX_BAD_AP_INDEX 1 ++ ++typedef PREPACK struct { ++ A_UINT8 badApIndex; /* 0 to WMI_MAX_BAD_AP_INDEX */ ++ A_UINT8 bssid[ATH_MAC_LEN]; ++} POSTPACK WMI_ADD_BAD_AP_CMD; ++ ++/* ++ * WMI_DELETE_BAD_AP_CMDID ++ */ ++typedef PREPACK struct { ++ A_UINT8 badApIndex; /* 0 to WMI_MAX_BAD_AP_INDEX */ ++} POSTPACK WMI_DELETE_BAD_AP_CMD; ++ ++/* ++ * WMI_SET_ACCESS_PARAMS_CMDID ++ */ ++#define WMI_DEFAULT_TXOP_ACPARAM 0 /* implies one MSDU */ ++#define WMI_DEFAULT_ECWMIN_ACPARAM 4 /* corresponds to CWmin of 15 */ ++#define WMI_DEFAULT_ECWMAX_ACPARAM 10 /* corresponds to CWmax of 1023 */ ++#define WMI_MAX_CW_ACPARAM 15 /* maximum eCWmin or eCWmax */ ++#define WMI_DEFAULT_AIFSN_ACPARAM 2 ++#define WMI_MAX_AIFSN_ACPARAM 15 ++typedef PREPACK struct { ++ A_UINT16 txop; /* in units of 32 usec */ ++ A_UINT8 eCWmin; ++ A_UINT8 eCWmax; ++ A_UINT8 aifsn; ++} POSTPACK WMI_SET_ACCESS_PARAMS_CMD; ++ ++ ++/* ++ * WMI_SET_RETRY_LIMITS_CMDID ++ * ++ * This command is used to customize the number of retries the ++ * wlan device will perform on a given frame. ++ */ ++#define WMI_MIN_RETRIES 2 ++#define WMI_MAX_RETRIES 13 ++typedef enum { ++ MGMT_FRAMETYPE = 0, ++ CONTROL_FRAMETYPE = 1, ++ DATA_FRAMETYPE = 2 ++} WMI_FRAMETYPE; ++ ++typedef PREPACK struct { ++ A_UINT8 frameType; /* WMI_FRAMETYPE */ ++ A_UINT8 trafficClass; /* applies only to DATA_FRAMETYPE */ ++ A_UINT8 maxRetries; ++ A_UINT8 enableNotify; ++} POSTPACK WMI_SET_RETRY_LIMITS_CMD; ++ ++/* ++ * WMI_SET_ROAM_CTRL_CMDID ++ * ++ * This command is used to influence the Roaming behaviour ++ * Set the host biases of the BSSs before setting the roam mode as bias ++ * based. ++ */ ++ ++/* ++ * Different types of Roam Control ++ */ ++ ++typedef enum { ++ WMI_FORCE_ROAM = 1, /* Roam to the specified BSSID */ ++ WMI_SET_ROAM_MODE = 2, /* default ,progd bias, no roam */ ++ WMI_SET_HOST_BIAS = 3, /* Set the Host Bias */ ++ WMI_SET_LOWRSSI_SCAN_PARAMS = 4, /* Set lowrssi Scan parameters */ ++} WMI_ROAM_CTRL_TYPE; ++ ++#define WMI_MIN_ROAM_CTRL_TYPE WMI_FORCE_ROAM ++#define WMI_MAX_ROAM_CTRL_TYPE WMI_SET_LOWRSSI_SCAN_PARAMS ++ ++/* ++ * ROAM MODES ++ */ ++ ++typedef enum { ++ WMI_DEFAULT_ROAM_MODE = 1, /* RSSI based ROAM */ ++ WMI_HOST_BIAS_ROAM_MODE = 2, /* HOST BIAS based ROAM */ ++ WMI_LOCK_BSS_MODE = 3 /* Lock to the Current BSS - no Roam */ ++} WMI_ROAM_MODE; ++ ++/* ++ * BSS HOST BIAS INFO ++ */ ++ ++typedef PREPACK struct { ++ A_UINT8 bssid[ATH_MAC_LEN]; ++ A_INT8 bias; ++} POSTPACK WMI_BSS_BIAS; ++ ++typedef PREPACK struct { ++ A_UINT8 numBss; ++ WMI_BSS_BIAS bssBias[1]; ++} POSTPACK WMI_BSS_BIAS_INFO; ++ ++typedef PREPACK struct WMI_LOWRSSI_SCAN_PARAMS { ++ A_UINT16 lowrssi_scan_period; ++ A_INT16 lowrssi_scan_threshold; ++ A_INT16 lowrssi_roam_threshold; ++ A_UINT8 roam_rssi_floor; ++ A_UINT8 reserved[1]; /* For alignment */ ++} POSTPACK WMI_LOWRSSI_SCAN_PARAMS; ++ ++typedef PREPACK struct { ++ PREPACK union { ++ A_UINT8 bssid[ATH_MAC_LEN]; /* WMI_FORCE_ROAM */ ++ A_UINT8 roamMode; /* WMI_SET_ROAM_MODE */ ++ WMI_BSS_BIAS_INFO bssBiasInfo; /* WMI_SET_HOST_BIAS */ ++ WMI_LOWRSSI_SCAN_PARAMS lrScanParams; ++ } POSTPACK info; ++ A_UINT8 roamCtrlType ; ++} POSTPACK WMI_SET_ROAM_CTRL_CMD; ++ ++/* ++ * WMI_ENABLE_RM_CMDID ++ */ ++typedef PREPACK struct { ++ A_BOOL enable_radio_measurements; ++} POSTPACK WMI_ENABLE_RM_CMD; ++ ++/* ++ * WMI_SET_MAX_OFFHOME_DURATION_CMDID ++ */ ++typedef PREPACK struct { ++ A_UINT8 max_offhome_duration; ++} POSTPACK WMI_SET_MAX_OFFHOME_DURATION_CMD; ++ ++typedef PREPACK struct { ++ A_UINT32 frequency; ++ A_UINT8 threshold; ++} POSTPACK WMI_SET_HB_CHALLENGE_RESP_PARAMS_CMD; ++ ++typedef enum { ++ BT_STREAM_UNDEF = 0, ++ BT_STREAM_SCO, /* SCO stream */ ++ BT_STREAM_A2DP, /* A2DP stream */ ++ BT_STREAM_MAX ++} BT_STREAM_TYPE; ++ ++typedef enum { ++ BT_PARAM_SCO = 1, /* SCO stream parameters */ ++ BT_PARAM_A2DP, /* A2DP stream parameters */ ++ BT_PARAM_MISC, /* miscellaneous parameters */ ++ BT_PARAM_REGS, /* co-existence register parameters */ ++ BT_PARAM_MAX ++} BT_PARAM_TYPE; ++ ++typedef enum { ++ BT_STATUS_UNDEF = 0, ++ BT_STATUS_START, ++ BT_STATUS_STOP, ++ BT_STATUS_RESUME, ++ BT_STATUS_SUSPEND, ++ BT_STATUS_MAX ++} BT_STREAM_STATUS; ++ ++typedef PREPACK struct { ++ A_UINT8 streamType; ++ A_UINT8 status; ++} POSTPACK WMI_SET_BT_STATUS_CMD; ++ ++typedef PREPACK struct { ++ A_UINT8 noSCOPkts; ++ A_UINT8 pspollTimeout; ++ A_UINT8 stompbt; ++} POSTPACK BT_PARAMS_SCO; ++ ++typedef PREPACK struct { ++ A_UINT32 period; ++ A_UINT32 dutycycle; ++ A_UINT8 stompbt; ++} POSTPACK BT_PARAMS_A2DP; ++ ++typedef PREPACK struct { ++ A_UINT32 mode; ++ A_UINT32 scoWghts; ++ A_UINT32 a2dpWghts; ++ A_UINT32 genWghts; ++ A_UINT32 mode2; ++ A_UINT8 setVal; ++} POSTPACK BT_COEX_REGS; ++ ++typedef enum { ++ WLAN_PROTECT_POLICY = 1, ++ WLAN_COEX_CTRL_FLAGS ++} BT_PARAMS_MISC_TYPE; ++ ++typedef enum { ++ WLAN_PROTECT_PER_STREAM = 0x01, /* default */ ++ WLAN_PROTECT_ANY_TX = 0x02 ++} WLAN_PROTECT_FLAGS; ++ ++ ++#define WLAN_DISABLE_COEX_IN_DISCONNECT 0x01 /* default */ ++#define WLAN_KEEP_COEX_IN_DISCONNECT 0x02 ++#define WLAN_STOMPBT_IN_DISCONNECT 0x04 ++ ++#define WLAN_DISABLE_COEX_IN_ROAM 0x10 /* default */ ++#define WLAN_KEEP_COEX_IN_ROAM 0x20 ++#define WLAN_STOMPBT_IN_ROAM 0x40 ++ ++#define WLAN_DISABLE_COEX_IN_SCAN 0x100 /* default */ ++#define WLAN_KEEP_COEX_IN_SCAN 0x200 ++#define WLAN_STOMPBT_IN_SCAN 0x400 ++ ++#define WLAN_DISABLE_COEX_BT_OFF 0x1000 /* default */ ++#define WLAN_KEEP_COEX_BT_OFF 0x2000 ++#define WLAN_STOMPBT_BT_OFF 0x4000 ++ ++typedef PREPACK struct { ++ A_UINT32 period; ++ A_UINT32 dutycycle; ++ A_UINT8 stompbt; ++ A_UINT8 policy; ++} POSTPACK WLAN_PROTECT_POLICY_TYPE; ++ ++typedef PREPACK struct { ++ PREPACK union { ++ WLAN_PROTECT_POLICY_TYPE protectParams; ++ A_UINT16 wlanCtrlFlags; ++ } POSTPACK info; ++ A_UINT8 paramType; ++} POSTPACK BT_PARAMS_MISC; ++ ++typedef PREPACK struct { ++ PREPACK union { ++ BT_PARAMS_SCO scoParams; ++ BT_PARAMS_A2DP a2dpParams; ++ BT_PARAMS_MISC miscParams; ++ BT_COEX_REGS regs; ++ } POSTPACK info; ++ A_UINT8 paramType; ++} POSTPACK WMI_SET_BT_PARAMS_CMD; ++ ++/* ++ * Command Replies ++ */ ++ ++/* ++ * WMI_GET_CHANNEL_LIST_CMDID reply ++ */ ++typedef PREPACK struct { ++ A_UINT8 reserved1; ++ A_UINT8 numChannels; /* number of channels in reply */ ++ A_UINT16 channelList[1]; /* channel in Mhz */ ++} POSTPACK WMI_CHANNEL_LIST_REPLY; ++ ++typedef enum { ++ A_SUCCEEDED = A_OK, ++ A_FAILED_DELETE_STREAM_DOESNOT_EXIST=250, ++ A_SUCCEEDED_MODIFY_STREAM=251, ++ A_FAILED_INVALID_STREAM = 252, ++ A_FAILED_MAX_THINSTREAMS = 253, ++ A_FAILED_CREATE_REMOVE_PSTREAM_FIRST = 254, ++} PSTREAM_REPLY_STATUS; ++ ++/* ++ * List of Events (target to host) ++ */ ++typedef enum { ++ WMI_READY_EVENTID = 0x1001, ++ WMI_CONNECT_EVENTID, ++ WMI_DISCONNECT_EVENTID, ++ WMI_BSSINFO_EVENTID, ++ WMI_CMDERROR_EVENTID, ++ WMI_REGDOMAIN_EVENTID, ++ WMI_PSTREAM_TIMEOUT_EVENTID, ++ WMI_NEIGHBOR_REPORT_EVENTID, ++ WMI_TKIP_MICERR_EVENTID, ++ WMI_SCAN_COMPLETE_EVENTID, ++ WMI_REPORT_STATISTICS_EVENTID, ++ WMI_RSSI_THRESHOLD_EVENTID, ++ WMI_ERROR_REPORT_EVENTID, ++ WMI_OPT_RX_FRAME_EVENTID, ++ WMI_REPORT_ROAM_TBL_EVENTID, ++ WMI_EXTENSION_EVENTID, ++ WMI_CAC_EVENTID, ++ WMI_SNR_THRESHOLD_EVENTID, ++ WMI_LQ_THRESHOLD_EVENTID, ++ WMI_TX_RETRY_ERR_EVENTID, ++ WMI_REPORT_ROAM_DATA_EVENTID, ++ WMI_TEST_EVENTID, ++ WMI_APLIST_EVENTID, ++ WMI_GET_WOW_LIST_EVENTID, ++ WMI_GET_PMKID_LIST_EVENTID ++} WMI_EVENT_ID; ++ ++typedef enum { ++ WMI_11A_CAPABILITY = 1, ++ WMI_11G_CAPABILITY = 2, ++ WMI_11AG_CAPABILITY = 3, ++} WMI_PHY_CAPABILITY; ++ ++typedef PREPACK struct { ++ A_UINT8 macaddr[ATH_MAC_LEN]; ++ A_UINT8 phyCapability; /* WMI_PHY_CAPABILITY */ ++} POSTPACK WMI_READY_EVENT; ++ ++/* ++ * Connect Event ++ */ ++typedef PREPACK struct { ++ A_UINT16 channel; ++ A_UINT8 bssid[ATH_MAC_LEN]; ++ A_UINT16 listenInterval; ++ A_UINT16 beaconInterval; ++ A_UINT32 networkType; ++ A_UINT8 beaconIeLen; ++ A_UINT8 assocReqLen; ++ A_UINT8 assocRespLen; ++ A_UINT8 assocInfo[1]; ++} POSTPACK WMI_CONNECT_EVENT; ++ ++/* ++ * Disconnect Event ++ */ ++typedef enum { ++ NO_NETWORK_AVAIL = 0x01, ++ LOST_LINK = 0x02, /* bmiss */ ++ DISCONNECT_CMD = 0x03, ++ BSS_DISCONNECTED = 0x04, ++ AUTH_FAILED = 0x05, ++ ASSOC_FAILED = 0x06, ++ NO_RESOURCES_AVAIL = 0x07, ++ CSERV_DISCONNECT = 0x08, ++ INVALID_PROFILE = 0x0a, ++ DOT11H_CHANNEL_SWITCH = 0x0b, ++} WMI_DISCONNECT_REASON; ++ ++typedef PREPACK struct { ++ A_UINT16 protocolReasonStatus; /* reason code, see 802.11 spec. */ ++ A_UINT8 bssid[ATH_MAC_LEN]; /* set if known */ ++ A_UINT8 disconnectReason ; /* see WMI_DISCONNECT_REASON */ ++ A_UINT8 assocRespLen; ++ A_UINT8 assocInfo[1]; ++} POSTPACK WMI_DISCONNECT_EVENT; ++ ++/* ++ * BSS Info Event. ++ * Mechanism used to inform host of the presence and characteristic of ++ * wireless networks present. Consists of bss info header followed by ++ * the beacon or probe-response frame body. The 802.11 header is not included. ++ */ ++typedef enum { ++ BEACON_FTYPE = 0x1, ++ PROBERESP_FTYPE, ++ ACTION_MGMT_FTYPE, ++} WMI_BI_FTYPE; ++ ++enum { ++ BSS_ELEMID_CHANSWITCH = 0x01, ++ BSS_ELEMID_ATHEROS = 0x02, ++}; ++ ++typedef PREPACK struct { ++ A_UINT16 channel; ++ A_UINT8 frameType; /* see WMI_BI_FTYPE */ ++ A_UINT8 snr; ++ A_INT16 rssi; ++ A_UINT8 bssid[ATH_MAC_LEN]; ++ A_UINT32 ieMask; ++} POSTPACK WMI_BSS_INFO_HDR; ++ ++/* ++ * Command Error Event ++ */ ++typedef enum { ++ INVALID_PARAM = 0x01, ++ ILLEGAL_STATE = 0x02, ++ INTERNAL_ERROR = 0x03, ++} WMI_ERROR_CODE; ++ ++typedef PREPACK struct { ++ A_UINT16 commandId; ++ A_UINT8 errorCode; ++} POSTPACK WMI_CMD_ERROR_EVENT; ++ ++/* ++ * New Regulatory Domain Event ++ */ ++typedef PREPACK struct { ++ A_UINT32 regDomain; ++} POSTPACK WMI_REG_DOMAIN_EVENT; ++ ++typedef PREPACK struct { ++ A_UINT8 trafficClass; ++} POSTPACK WMI_PSTREAM_TIMEOUT_EVENT; ++ ++/* ++ * The WMI_NEIGHBOR_REPORT Event is generated by the target to inform ++ * the host of BSS's it has found that matches the current profile. ++ * It can be used by the host to cache PMKs and/to initiate pre-authentication ++ * if the BSS supports it. The first bssid is always the current associated ++ * BSS. ++ * The bssid and bssFlags information repeats according to the number ++ * or APs reported. ++ */ ++typedef enum { ++ WMI_DEFAULT_BSS_FLAGS = 0x00, ++ WMI_PREAUTH_CAPABLE_BSS = 0x01, ++ WMI_PMKID_VALID_BSS = 0x02, ++} WMI_BSS_FLAGS; ++ ++typedef PREPACK struct { ++ A_UINT8 bssid[ATH_MAC_LEN]; ++ A_UINT8 bssFlags; /* see WMI_BSS_FLAGS */ ++} POSTPACK WMI_NEIGHBOR_INFO; ++ ++typedef PREPACK struct { ++ A_INT8 numberOfAps; ++ WMI_NEIGHBOR_INFO neighbor[1]; ++} POSTPACK WMI_NEIGHBOR_REPORT_EVENT; ++ ++/* ++ * TKIP MIC Error Event ++ */ ++typedef PREPACK struct { ++ A_UINT8 keyid; ++ A_UINT8 ismcast; ++} POSTPACK WMI_TKIP_MICERR_EVENT; ++ ++/* ++ * WMI_SCAN_COMPLETE_EVENTID - no parameters (old), staus parameter (new) ++ */ ++typedef PREPACK struct { ++ A_STATUS status; ++} POSTPACK WMI_SCAN_COMPLETE_EVENT; ++ ++#define MAX_OPT_DATA_LEN 1400 ++ ++/* ++ * WMI_SET_ADHOC_BSSID_CMDID ++ */ ++typedef PREPACK struct { ++ A_UINT8 bssid[ATH_MAC_LEN]; ++} POSTPACK WMI_SET_ADHOC_BSSID_CMD; ++ ++/* ++ * WMI_SET_OPT_MODE_CMDID ++ */ ++typedef enum { ++ SPECIAL_OFF, ++ SPECIAL_ON, ++} OPT_MODE_TYPE; ++ ++typedef PREPACK struct { ++ A_UINT8 optMode; ++} POSTPACK WMI_SET_OPT_MODE_CMD; ++ ++/* ++ * WMI_TX_OPT_FRAME_CMDID ++ */ ++typedef enum { ++ OPT_PROBE_REQ = 0x01, ++ OPT_PROBE_RESP = 0x02, ++ OPT_CPPP_START = 0x03, ++ OPT_CPPP_STOP = 0x04, ++} WMI_OPT_FTYPE; ++ ++typedef PREPACK struct { ++ A_UINT16 optIEDataLen; ++ A_UINT8 frmType; ++ A_UINT8 dstAddr[ATH_MAC_LEN]; ++ A_UINT8 bssid[ATH_MAC_LEN]; ++ A_UINT8 reserved; /* For alignment */ ++ A_UINT8 optIEData[1]; ++} POSTPACK WMI_OPT_TX_FRAME_CMD; ++ ++/* ++ * Special frame receive Event. ++ * Mechanism used to inform host of the receiption of the special frames. ++ * Consists of special frame info header followed by special frame body. ++ * The 802.11 header is not included. ++ */ ++typedef PREPACK struct { ++ A_UINT16 channel; ++ A_UINT8 frameType; /* see WMI_OPT_FTYPE */ ++ A_INT8 snr; ++ A_UINT8 srcAddr[ATH_MAC_LEN]; ++ A_UINT8 bssid[ATH_MAC_LEN]; ++} POSTPACK WMI_OPT_RX_INFO_HDR; ++ ++/* ++ * Reporting statistics. ++ */ ++typedef PREPACK struct { ++ A_UINT32 tx_packets; ++ A_UINT32 tx_bytes; ++ A_UINT32 tx_unicast_pkts; ++ A_UINT32 tx_unicast_bytes; ++ A_UINT32 tx_multicast_pkts; ++ A_UINT32 tx_multicast_bytes; ++ A_UINT32 tx_broadcast_pkts; ++ A_UINT32 tx_broadcast_bytes; ++ A_UINT32 tx_rts_success_cnt; ++ A_UINT32 tx_packet_per_ac[4]; ++ A_UINT32 tx_errors_per_ac[4]; ++ ++ A_UINT32 tx_errors; ++ A_UINT32 tx_failed_cnt; ++ A_UINT32 tx_retry_cnt; ++ A_UINT32 tx_rts_fail_cnt; ++ A_INT32 tx_unicast_rate; ++}POSTPACK tx_stats_t; ++ ++typedef PREPACK struct { ++ A_UINT32 rx_packets; ++ A_UINT32 rx_bytes; ++ A_UINT32 rx_unicast_pkts; ++ A_UINT32 rx_unicast_bytes; ++ A_UINT32 rx_multicast_pkts; ++ A_UINT32 rx_multicast_bytes; ++ A_UINT32 rx_broadcast_pkts; ++ A_UINT32 rx_broadcast_bytes; ++ A_UINT32 rx_fragment_pkt; ++ ++ A_UINT32 rx_errors; ++ A_UINT32 rx_crcerr; ++ A_UINT32 rx_key_cache_miss; ++ A_UINT32 rx_decrypt_err; ++ A_UINT32 rx_duplicate_frames; ++ A_INT32 rx_unicast_rate; ++}POSTPACK rx_stats_t; ++ ++typedef PREPACK struct { ++ A_UINT32 tkip_local_mic_failure; ++ A_UINT32 tkip_counter_measures_invoked; ++ A_UINT32 tkip_replays; ++ A_UINT32 tkip_format_errors; ++ A_UINT32 ccmp_format_errors; ++ A_UINT32 ccmp_replays; ++}POSTPACK tkip_ccmp_stats_t; ++ ++typedef PREPACK struct { ++ A_UINT32 power_save_failure_cnt; ++}POSTPACK pm_stats_t; ++ ++typedef PREPACK struct { ++ A_UINT32 cs_bmiss_cnt; ++ A_UINT32 cs_lowRssi_cnt; ++ A_UINT16 cs_connect_cnt; ++ A_UINT16 cs_disconnect_cnt; ++ A_INT16 cs_aveBeacon_rssi; ++ A_UINT16 cs_roam_count; ++ A_UINT16 cs_rssi; ++ A_UINT8 cs_snr; ++ A_UINT8 cs_aveBeacon_snr; ++ A_UINT8 cs_lastRoam_msec; ++} POSTPACK cserv_stats_t; ++ ++typedef PREPACK struct { ++ tx_stats_t tx_stats; ++ rx_stats_t rx_stats; ++ tkip_ccmp_stats_t tkipCcmpStats; ++}POSTPACK wlan_net_stats_t; ++ ++typedef PREPACK struct { ++ A_UINT32 wow_num_pkts_dropped; ++ A_UINT16 wow_num_events_discarded; ++ A_UINT8 wow_num_host_pkt_wakeups; ++ A_UINT8 wow_num_host_event_wakeups; ++} POSTPACK wlan_wow_stats_t; ++ ++typedef PREPACK struct { ++ A_UINT32 lqVal; ++ A_INT32 noise_floor_calibation; ++ pm_stats_t pmStats; ++ wlan_net_stats_t txrxStats; ++ wlan_wow_stats_t wowStats; ++ cserv_stats_t cservStats; ++} POSTPACK WMI_TARGET_STATS; ++ ++/* ++ * WMI_RSSI_THRESHOLD_EVENTID. ++ * Indicate the RSSI events to host. Events are indicated when we breach a ++ * thresold value. ++ */ ++typedef enum{ ++ WMI_RSSI_THRESHOLD1_ABOVE = 0, ++ WMI_RSSI_THRESHOLD2_ABOVE, ++ WMI_RSSI_THRESHOLD3_ABOVE, ++ WMI_RSSI_THRESHOLD4_ABOVE, ++ WMI_RSSI_THRESHOLD5_ABOVE, ++ WMI_RSSI_THRESHOLD6_ABOVE, ++ WMI_RSSI_THRESHOLD1_BELOW, ++ WMI_RSSI_THRESHOLD2_BELOW, ++ WMI_RSSI_THRESHOLD3_BELOW, ++ WMI_RSSI_THRESHOLD4_BELOW, ++ WMI_RSSI_THRESHOLD5_BELOW, ++ WMI_RSSI_THRESHOLD6_BELOW ++}WMI_RSSI_THRESHOLD_VAL; ++ ++typedef PREPACK struct { ++ A_INT16 rssi; ++ A_UINT8 range; ++}POSTPACK WMI_RSSI_THRESHOLD_EVENT; ++ ++/* ++ * WMI_ERROR_REPORT_EVENTID ++ */ ++typedef enum{ ++ WMI_TARGET_PM_ERR_FAIL = 0x00000001, ++ WMI_TARGET_KEY_NOT_FOUND = 0x00000002, ++ WMI_TARGET_DECRYPTION_ERR = 0x00000004, ++ WMI_TARGET_BMISS = 0x00000008, ++ WMI_PSDISABLE_NODE_JOIN = 0x00000010, ++ WMI_TARGET_COM_ERR = 0x00000020, ++ WMI_TARGET_FATAL_ERR = 0x00000040 ++} WMI_TARGET_ERROR_VAL; ++ ++typedef PREPACK struct { ++ A_UINT32 errorVal; ++}POSTPACK WMI_TARGET_ERROR_REPORT_EVENT; ++ ++typedef PREPACK struct { ++ A_UINT8 retrys; ++}POSTPACK WMI_TX_RETRY_ERR_EVENT; ++ ++typedef enum{ ++ WMI_SNR_THRESHOLD1_ABOVE = 1, ++ WMI_SNR_THRESHOLD1_BELOW, ++ WMI_SNR_THRESHOLD2_ABOVE, ++ WMI_SNR_THRESHOLD2_BELOW, ++ WMI_SNR_THRESHOLD3_ABOVE, ++ WMI_SNR_THRESHOLD3_BELOW, ++ WMI_SNR_THRESHOLD4_ABOVE, ++ WMI_SNR_THRESHOLD4_BELOW ++} WMI_SNR_THRESHOLD_VAL; ++ ++typedef PREPACK struct { ++ A_UINT8 range; /* WMI_SNR_THRESHOLD_VAL */ ++ A_UINT8 snr; ++}POSTPACK WMI_SNR_THRESHOLD_EVENT; ++ ++typedef enum{ ++ WMI_LQ_THRESHOLD1_ABOVE = 1, ++ WMI_LQ_THRESHOLD1_BELOW, ++ WMI_LQ_THRESHOLD2_ABOVE, ++ WMI_LQ_THRESHOLD2_BELOW, ++ WMI_LQ_THRESHOLD3_ABOVE, ++ WMI_LQ_THRESHOLD3_BELOW, ++ WMI_LQ_THRESHOLD4_ABOVE, ++ WMI_LQ_THRESHOLD4_BELOW ++} WMI_LQ_THRESHOLD_VAL; ++ ++typedef PREPACK struct { ++ A_INT32 lq; ++ A_UINT8 range; /* WMI_LQ_THRESHOLD_VAL */ ++}POSTPACK WMI_LQ_THRESHOLD_EVENT; ++/* ++ * WMI_REPORT_ROAM_TBL_EVENTID ++ */ ++#define MAX_ROAM_TBL_CAND 5 ++ ++typedef PREPACK struct { ++ A_INT32 roam_util; ++ A_UINT8 bssid[ATH_MAC_LEN]; ++ A_INT8 rssi; ++ A_INT8 rssidt; ++ A_INT8 last_rssi; ++ A_INT8 util; ++ A_INT8 bias; ++ A_UINT8 reserved; /* For alignment */ ++} POSTPACK WMI_BSS_ROAM_INFO; ++ ++ ++typedef PREPACK struct { ++ A_UINT16 roamMode; ++ A_UINT16 numEntries; ++ WMI_BSS_ROAM_INFO bssRoamInfo[1]; ++} POSTPACK WMI_TARGET_ROAM_TBL; ++ ++/* ++ * WMI_CAC_EVENTID ++ */ ++typedef enum { ++ CAC_INDICATION_ADMISSION = 0x00, ++ CAC_INDICATION_ADMISSION_RESP = 0x01, ++ CAC_INDICATION_DELETE = 0x02, ++ CAC_INDICATION_NO_RESP = 0x03, ++}CAC_INDICATION; ++ ++#define WMM_TSPEC_IE_LEN 63 ++ ++typedef PREPACK struct { ++ A_UINT8 ac; ++ A_UINT8 cac_indication; ++ A_UINT8 statusCode; ++ A_UINT8 tspecSuggestion[WMM_TSPEC_IE_LEN]; ++}POSTPACK WMI_CAC_EVENT; ++ ++/* ++ * WMI_APLIST_EVENTID ++ */ ++ ++typedef enum { ++ APLIST_VER1 = 1, ++} APLIST_VER; ++ ++typedef PREPACK struct { ++ A_UINT8 bssid[ATH_MAC_LEN]; ++ A_UINT16 channel; ++} POSTPACK WMI_AP_INFO_V1; ++ ++typedef PREPACK union { ++ WMI_AP_INFO_V1 apInfoV1; ++} POSTPACK WMI_AP_INFO; ++ ++typedef PREPACK struct { ++ A_UINT8 apListVer; ++ A_UINT8 numAP; ++ WMI_AP_INFO apList[1]; ++} POSTPACK WMI_APLIST_EVENT; ++ ++/* ++ * developer commands ++ */ ++ ++/* ++ * WMI_SET_BITRATE_CMDID ++ * ++ * Get bit rate cmd uses same definition as set bit rate cmd ++ */ ++typedef enum { ++ RATE_AUTO = -1, ++ RATE_1Mb = 0, ++ RATE_2Mb = 1, ++ RATE_5_5Mb = 2, ++ RATE_11Mb = 3, ++ RATE_6Mb = 4, ++ RATE_9Mb = 5, ++ RATE_12Mb = 6, ++ RATE_18Mb = 7, ++ RATE_24Mb = 8, ++ RATE_36Mb = 9, ++ RATE_48Mb = 10, ++ RATE_54Mb = 11, ++} WMI_BIT_RATE; ++ ++typedef PREPACK struct { ++ A_INT8 rateIndex; /* see WMI_BIT_RATE */ ++} POSTPACK WMI_BIT_RATE_CMD, WMI_BIT_RATE_REPLY; ++ ++/* ++ * WMI_SET_FIXRATES_CMDID ++ * ++ * Get fix rates cmd uses same definition as set fix rates cmd ++ */ ++typedef enum { ++ FIX_RATE_1Mb = 0x1, ++ FIX_RATE_2Mb = 0x2, ++ FIX_RATE_5_5Mb = 0x4, ++ FIX_RATE_11Mb = 0x8, ++ FIX_RATE_6Mb = 0x10, ++ FIX_RATE_9Mb = 0x20, ++ FIX_RATE_12Mb = 0x40, ++ FIX_RATE_18Mb = 0x80, ++ FIX_RATE_24Mb = 0x100, ++ FIX_RATE_36Mb = 0x200, ++ FIX_RATE_48Mb = 0x400, ++ FIX_RATE_54Mb = 0x800, ++} WMI_FIX_RATES_MASK; ++ ++typedef PREPACK struct { ++ A_UINT16 fixRateMask; /* see WMI_BIT_RATE */ ++} POSTPACK WMI_FIX_RATES_CMD, WMI_FIX_RATES_REPLY; ++ ++/* ++ * WMI_SET_RECONNECT_AUTH_MODE_CMDID ++ * ++ * Set authentication mode ++ */ ++typedef enum { ++ RECONN_DO_AUTH = 0x00, ++ RECONN_NOT_AUTH = 0x01 ++} WMI_AUTH_MODE; ++ ++typedef PREPACK struct { ++ A_UINT8 mode; ++} POSTPACK WMI_SET_AUTH_MODE_CMD; ++ ++/* ++ * WMI_SET_REASSOC_MODE_CMDID ++ * ++ * Set authentication mode ++ */ ++typedef enum { ++ REASSOC_DO_DISASSOC = 0x00, ++ REASSOC_DONOT_DISASSOC = 0x01 ++} WMI_REASSOC_MODE; ++ ++typedef PREPACK struct { ++ A_UINT8 mode; ++}POSTPACK WMI_SET_REASSOC_MODE_CMD; ++ ++typedef enum { ++ ROAM_DATA_TIME = 1, /* Get The Roam Time Data */ ++} ROAM_DATA_TYPE; ++ ++typedef PREPACK struct { ++ A_UINT32 disassoc_time; ++ A_UINT32 no_txrx_time; ++ A_UINT32 assoc_time; ++ A_UINT32 allow_txrx_time; ++ A_UINT32 last_data_txrx_time; ++ A_UINT32 first_data_txrx_time; ++ A_UINT8 disassoc_bssid[ATH_MAC_LEN]; ++ A_INT8 disassoc_bss_rssi; ++ A_UINT8 assoc_bssid[ATH_MAC_LEN]; ++ A_INT8 assoc_bss_rssi; ++} POSTPACK WMI_TARGET_ROAM_TIME; ++ ++typedef PREPACK struct { ++ PREPACK union { ++ WMI_TARGET_ROAM_TIME roamTime; ++ } POSTPACK u; ++ A_UINT8 roamDataType ; ++} POSTPACK WMI_TARGET_ROAM_DATA; ++ ++typedef enum { ++ WMI_WMM_DISABLED = 0, ++ WMI_WMM_ENABLED ++} WMI_WMM_STATUS; ++ ++typedef PREPACK struct { ++ A_UINT8 status; ++}POSTPACK WMI_SET_WMM_CMD; ++ ++typedef enum { ++ WMI_TXOP_DISABLED = 0, ++ WMI_TXOP_ENABLED ++} WMI_TXOP_CFG; ++ ++typedef PREPACK struct { ++ A_UINT8 txopEnable; ++}POSTPACK WMI_SET_WMM_TXOP_CMD; ++ ++typedef PREPACK struct { ++ A_UINT8 keepaliveInterval; ++} POSTPACK WMI_SET_KEEPALIVE_CMD; ++ ++typedef PREPACK struct { ++ A_BOOL configured; ++ A_UINT8 keepaliveInterval; ++} POSTPACK WMI_GET_KEEPALIVE_CMD; ++ ++/* ++ * Add Application specified IE to a management frame ++ */ ++#define WMI_MAX_IE_LEN 78 ++ ++typedef PREPACK struct { ++ A_UINT8 mgmtFrmType; /* one of WMI_MGMT_FRAME_TYPE */ ++ A_UINT8 ieLen; /* Length of the IE that should be added to the MGMT frame */ ++ A_UINT8 ieInfo[1]; ++} POSTPACK WMI_SET_APPIE_CMD; ++ ++/* ++ * Notify the WSC registration status to the target ++ */ ++#define WSC_REG_ACTIVE 1 ++#define WSC_REG_INACTIVE 0 ++/* Generic Hal Interface for setting hal paramters. */ ++/* Add new Set HAL Param cmdIds here for newer params */ ++typedef enum { ++ WHAL_SETCABTO_CMDID = 1, ++}WHAL_CMDID; ++ ++typedef PREPACK struct { ++ A_UINT8 cabTimeOut; ++} POSTPACK WHAL_SETCABTO_PARAM; ++ ++typedef PREPACK struct { ++ A_UINT8 whalCmdId; ++ A_UINT8 data[1]; ++} POSTPACK WHAL_PARAMCMD; ++ ++ ++#define WOW_MAX_FILTER_LISTS 1 /*4*/ ++#define WOW_MAX_FILTERS_PER_LIST 4 ++#define WOW_PATTERN_SIZE 64 ++#define WOW_MASK_SIZE 64 ++ ++typedef PREPACK struct { ++ A_UINT8 wow_valid_filter; ++ A_UINT8 wow_filter_id; ++ A_UINT8 wow_filter_size; ++ A_UINT8 wow_filter_offset; ++ A_UINT8 wow_filter_mask[WOW_MASK_SIZE]; ++ A_UINT8 wow_filter_pattern[WOW_PATTERN_SIZE]; ++} POSTPACK WOW_FILTER; ++ ++ ++typedef PREPACK struct { ++ A_UINT8 wow_valid_list; ++ A_UINT8 wow_list_id; ++ A_UINT8 wow_num_filters; ++ A_UINT8 wow_total_list_size; ++ WOW_FILTER list[WOW_MAX_FILTERS_PER_LIST]; ++} POSTPACK WOW_FILTER_LIST; ++ ++typedef PREPACK struct { ++ A_BOOL awake; ++ A_BOOL asleep; ++} POSTPACK WMI_SET_HOST_SLEEP_MODE_CMD; ++ ++typedef PREPACK struct { ++ A_BOOL enable_wow; ++} POSTPACK WMI_SET_WOW_MODE_CMD; ++ ++typedef PREPACK struct { ++ A_UINT8 filter_list_id; ++} POSTPACK WMI_GET_WOW_LIST_CMD; ++ ++/* ++ * WMI_GET_WOW_LIST_CMD reply ++ */ ++typedef PREPACK struct { ++ A_UINT8 num_filters; /* number of patterns in reply */ ++ A_UINT8 this_filter_num; /* this is filter # x of total num_filters */ ++ A_UINT8 wow_mode; ++ A_UINT8 host_mode; ++ WOW_FILTER wow_filters[1]; ++} POSTPACK WMI_GET_WOW_LIST_REPLY; ++ ++typedef PREPACK struct { ++ A_UINT8 filter_list_id; ++ A_UINT8 filter_size; ++ A_UINT8 filter_offset; ++ A_UINT8 filter[1]; ++} POSTPACK WMI_ADD_WOW_PATTERN_CMD; ++ ++typedef PREPACK struct { ++ A_UINT16 filter_list_id; ++ A_UINT16 filter_id; ++} POSTPACK WMI_DEL_WOW_PATTERN_CMD; ++ ++typedef PREPACK struct { ++ A_UINT8 macaddr[ATH_MAC_LEN]; ++} POSTPACK WMI_SET_MAC_ADDRESS_CMD; ++ ++/* ++ * WMI_SET_AKMP_PARAMS_CMD ++ */ ++ ++#define WMI_AKMP_MULTI_PMKID_EN 0x000001 ++ ++typedef PREPACK struct { ++ A_UINT32 akmpInfo; ++} POSTPACK WMI_SET_AKMP_PARAMS_CMD; ++ ++typedef PREPACK struct { ++ A_UINT8 pmkid[WMI_PMKID_LEN]; ++} POSTPACK WMI_PMKID; ++ ++/* ++ * WMI_SET_PMKID_LIST_CMD ++ */ ++#define WMI_MAX_PMKID_CACHE 8 ++ ++typedef PREPACK struct { ++ A_UINT32 numPMKID; ++ WMI_PMKID pmkidList[WMI_MAX_PMKID_CACHE]; ++} POSTPACK WMI_SET_PMKID_LIST_CMD; ++ ++/* ++ * WMI_GET_PMKID_LIST_CMD Reply ++ * Following the Number of PMKIDs is the list of PMKIDs ++ */ ++typedef PREPACK struct { ++ A_UINT32 numPMKID; ++ WMI_PMKID pmkidList[1]; ++} POSTPACK WMI_PMKID_LIST_REPLY; ++ ++/* index used for priority streams */ ++typedef enum { ++ WMI_NOT_MAPPED = -1, ++ WMI_CONTROL_PRI = 0, ++ WMI_BEST_EFFORT_PRI = 1, ++ WMI_LOW_PRI = 2, ++ WMI_HIGH_PRI = 3, ++ WMI_HIGHEST_PRI, ++ WMI_PRI_MAX_COUNT ++} WMI_PRI_STREAM_ID; ++ ++#ifndef ATH_TARGET ++#include "athendpack.h" ++#endif ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* _WMI_H_ */ +diff --git a/drivers/sdio/function/wlan/ar6000/include/wmi_api.h b/drivers/sdio/function/wlan/ar6000/include/wmi_api.h +new file mode 100644 +index 0000000..aa9a9c6 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/wmi_api.h +@@ -0,0 +1,259 @@ ++#ifndef _WMI_API_H_ ++#define _WMI_API_H_ ++/* ++ * Copyright (c) 2004-2006 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * This file contains the definitions for the Wireless Module Interface (WMI). ++ * ++ * $Id: //depot/sw/releases/olca2.0-GPL/host/include/wmi_api.h#2 $ ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++/* ++ * IP QoS Field definitions according to 802.1p ++ */ ++#define BEST_EFFORT_PRI 0 ++#define BACKGROUND_PRI 1 ++#define EXCELLENT_EFFORT_PRI 3 ++#define CONTROLLED_LOAD_PRI 4 ++#define VIDEO_PRI 5 ++#define VOICE_PRI 6 ++#define NETWORK_CONTROL_PRI 7 ++#define MAX_NUM_PRI 8 ++ ++#define UNDEFINED_PRI (0xff) ++ ++/* simple mapping of IP TOS field to a WMI priority stream ++ * this mapping was taken from the original linux driver implementation ++ * The operation maps the following ++ * ++ * */ ++#define IP_TOS_TO_WMI_PRI(tos) \ ++ ((WMI_PRI_STREAM_ID)(((tos) >> 1) & 0x03)) ++ ++#define WMI_IMPLICIT_PSTREAM_INACTIVITY_INT 5000 /* 5 seconds */ ++ ++ ++struct wmi_t; ++ ++void *wmi_init(void *devt); ++ ++void wmi_qos_state_init(struct wmi_t *wmip); ++void wmi_shutdown(struct wmi_t *wmip); ++A_UINT16 wmi_get_mapped_qos_queue(struct wmi_t *, A_UINT8); ++A_STATUS wmi_dix_2_dot3(struct wmi_t *wmip, void *osbuf); ++A_STATUS wmi_data_hdr_add(struct wmi_t *wmip, void *osbuf, A_UINT8 msgType); ++A_STATUS wmi_dot3_2_dix(struct wmi_t *wmip, void *osbuf); ++A_STATUS wmi_data_hdr_remove(struct wmi_t *wmip, void *osbuf); ++A_STATUS wmi_syncpoint(struct wmi_t *wmip); ++A_STATUS wmi_syncpoint_reset(struct wmi_t *wmip); ++WMI_PRI_STREAM_ID wmi_get_stream_id(struct wmi_t *wmip, A_UINT8 trafficClass); ++A_UINT8 wmi_implicit_create_pstream(struct wmi_t *wmip, void *osbuf, A_UINT8 dir, A_UINT8 up); ++ ++A_STATUS wmi_control_rx(struct wmi_t *wmip, void *osbuf); ++void wmi_iterate_nodes(struct wmi_t *wmip, wlan_node_iter_func *f, void *arg); ++void wmi_free_allnodes(struct wmi_t *wmip); ++bss_t *wmi_find_node(struct wmi_t *wmip, const A_UINT8 *macaddr); ++ ++ ++typedef enum { ++ NO_SYNC_WMIFLAG = 0, ++ SYNC_BEFORE_WMIFLAG, /* transmit all queued data before cmd */ ++ SYNC_AFTER_WMIFLAG, /* any new data waits until cmd execs */ ++ SYNC_BOTH_WMIFLAG, ++ END_WMIFLAG /* end marker */ ++} WMI_SYNC_FLAG; ++ ++A_STATUS wmi_cmd_send(struct wmi_t *wmip, void *osbuf, WMI_COMMAND_ID cmdId, ++ WMI_SYNC_FLAG flag); ++A_STATUS wmi_connect_cmd(struct wmi_t *wmip, ++ NETWORK_TYPE netType, ++ DOT11_AUTH_MODE dot11AuthMode, ++ AUTH_MODE authMode, ++ CRYPTO_TYPE pairwiseCrypto, ++ A_UINT8 pairwiseCryptoLen, ++ CRYPTO_TYPE groupCrypto, ++ A_UINT8 groupCryptoLen, ++ int ssidLength, ++ A_UCHAR *ssid, ++ A_UINT8 *bssid, ++ A_UINT16 channel, ++ A_UINT32 ctrl_flags); ++A_STATUS wmi_reconnect_cmd(struct wmi_t *wmip, ++ A_UINT8 *bssid, ++ A_UINT16 channel); ++A_STATUS wmi_disconnect_cmd(struct wmi_t *wmip); ++A_STATUS wmi_getrev_cmd(struct wmi_t *wmip); ++A_STATUS wmi_startscan_cmd(struct wmi_t *wmip, WMI_SCAN_TYPE scanType, ++ A_BOOL forceFgScan, A_BOOL isLegacy, ++ A_UINT32 homeDwellTime, A_UINT32 forceScanInterval); ++A_STATUS wmi_scanparams_cmd(struct wmi_t *wmip, A_UINT16 fg_start_sec, ++ A_UINT16 fg_end_sec, A_UINT16 bg_sec, ++ A_UINT16 minact_chdw_msec, ++ A_UINT16 maxact_chdw_msec, A_UINT16 pas_chdw_msec, ++ A_UINT8 shScanRatio, A_UINT8 scanCtrlFlags, ++ A_UINT32 max_dfsch_act_time); ++A_STATUS wmi_bssfilter_cmd(struct wmi_t *wmip, A_UINT8 filter, A_UINT32 ieMask); ++A_STATUS wmi_probedSsid_cmd(struct wmi_t *wmip, A_UINT8 index, A_UINT8 flag, ++ A_UINT8 ssidLength, A_UCHAR *ssid); ++A_STATUS wmi_listeninterval_cmd(struct wmi_t *wmip, A_UINT16 listenInterval, A_UINT16 listenBeacons); ++A_STATUS wmi_bmisstime_cmd(struct wmi_t *wmip, A_UINT16 bmisstime, A_UINT16 bmissbeacons); ++A_STATUS wmi_associnfo_cmd(struct wmi_t *wmip, A_UINT8 ieType, ++ A_UINT8 ieLen, A_UINT8 *ieInfo); ++A_STATUS wmi_powermode_cmd(struct wmi_t *wmip, A_UINT8 powerMode); ++A_STATUS wmi_ibsspmcaps_cmd(struct wmi_t *wmip, A_UINT8 pmEnable, A_UINT8 ttl, ++ A_UINT16 atim_windows, A_UINT16 timeout_value); ++A_STATUS wmi_pmparams_cmd(struct wmi_t *wmip, A_UINT16 idlePeriod, ++ A_UINT16 psPollNum, A_UINT16 dtimPolicy); ++A_STATUS wmi_disctimeout_cmd(struct wmi_t *wmip, A_UINT8 timeout); ++A_STATUS wmi_sync_cmd(struct wmi_t *wmip, A_UINT8 syncNumber); ++A_STATUS wmi_create_pstream_cmd(struct wmi_t *wmip, WMI_CREATE_PSTREAM_CMD *pstream); ++A_STATUS wmi_delete_pstream_cmd(struct wmi_t *wmip, A_UINT8 trafficClass, A_UINT8 streamID); ++A_STATUS wmi_set_bitrate_cmd(struct wmi_t *wmip, A_INT32 rate); ++A_STATUS wmi_get_bitrate_cmd(struct wmi_t *wmip); ++A_INT8 wmi_validate_bitrate(struct wmi_t *wmip, A_INT32 rate); ++A_STATUS wmi_get_regDomain_cmd(struct wmi_t *wmip); ++A_STATUS wmi_get_channelList_cmd(struct wmi_t *wmip); ++A_STATUS wmi_set_channelParams_cmd(struct wmi_t *wmip, A_UINT8 scanParam, ++ WMI_PHY_MODE mode, A_INT8 numChan, ++ A_UINT16 *channelList); ++ ++A_STATUS wmi_set_snr_threshold_params(struct wmi_t *wmip, ++ WMI_SNR_THRESHOLD_PARAMS_CMD *snrCmd); ++A_STATUS wmi_set_rssi_threshold_params(struct wmi_t *wmip, ++ WMI_RSSI_THRESHOLD_PARAMS_CMD *rssiCmd); ++A_STATUS wmi_clr_rssi_snr(struct wmi_t *wmip); ++A_STATUS wmi_set_lq_threshold_params(struct wmi_t *wmip, ++ WMI_LQ_THRESHOLD_PARAMS_CMD *lqCmd); ++A_STATUS wmi_set_rts_cmd(struct wmi_t *wmip, A_UINT16 threshold); ++A_STATUS wmi_set_lpreamble_cmd(struct wmi_t *wmip, A_UINT8 status); ++ ++A_STATUS wmi_set_error_report_bitmask(struct wmi_t *wmip, A_UINT32 bitmask); ++ ++A_STATUS wmi_get_challenge_resp_cmd(struct wmi_t *wmip, A_UINT32 cookie, ++ A_UINT32 source); ++A_STATUS wmi_config_debug_module_cmd(struct wmi_t *wmip, A_UINT16 mmask, ++ A_UINT16 tsr, A_BOOL rep, A_UINT16 size, ++ A_UINT32 valid); ++A_STATUS wmi_get_stats_cmd(struct wmi_t *wmip); ++A_STATUS wmi_addKey_cmd(struct wmi_t *wmip, A_UINT8 keyIndex, ++ CRYPTO_TYPE keyType, A_UINT8 keyUsage, ++ A_UINT8 keyLength,A_UINT8 *keyRSC, ++ A_UINT8 *keyMaterial, A_UINT8 key_op_ctrl, ++ WMI_SYNC_FLAG sync_flag); ++A_STATUS wmi_add_krk_cmd(struct wmi_t *wmip, A_UINT8 *krk); ++A_STATUS wmi_delete_krk_cmd(struct wmi_t *wmip); ++A_STATUS wmi_deleteKey_cmd(struct wmi_t *wmip, A_UINT8 keyIndex); ++A_STATUS wmi_set_akmp_params_cmd(struct wmi_t *wmip, ++ WMI_SET_AKMP_PARAMS_CMD *akmpParams); ++A_STATUS wmi_get_pmkid_list_cmd(struct wmi_t *wmip); ++A_STATUS wmi_set_pmkid_list_cmd(struct wmi_t *wmip, ++ WMI_SET_PMKID_LIST_CMD *pmkInfo); ++A_STATUS wmi_set_txPwr_cmd(struct wmi_t *wmip, A_UINT8 dbM); ++A_STATUS wmi_get_txPwr_cmd(struct wmi_t *wmip); ++A_STATUS wmi_addBadAp_cmd(struct wmi_t *wmip, A_UINT8 apIndex, A_UINT8 *bssid); ++A_STATUS wmi_deleteBadAp_cmd(struct wmi_t *wmip, A_UINT8 apIndex); ++A_STATUS wmi_set_tkip_countermeasures_cmd(struct wmi_t *wmip, A_BOOL en); ++A_STATUS wmi_setPmkid_cmd(struct wmi_t *wmip, A_UINT8 *bssid, A_UINT8 *pmkId, ++ A_BOOL set); ++A_STATUS wmi_set_access_params_cmd(struct wmi_t *wmip, A_UINT16 txop, ++ A_UINT8 eCWmin, A_UINT8 eCWmax, ++ A_UINT8 aifsn); ++A_STATUS wmi_set_retry_limits_cmd(struct wmi_t *wmip, A_UINT8 frameType, ++ A_UINT8 trafficClass, A_UINT8 maxRetries, ++ A_UINT8 enableNotify); ++ ++void wmi_get_current_bssid(struct wmi_t *wmip, A_UINT8 *bssid); ++ ++A_STATUS wmi_get_roam_tbl_cmd(struct wmi_t *wmip); ++A_STATUS wmi_get_roam_data_cmd(struct wmi_t *wmip, A_UINT8 roamDataType); ++A_STATUS wmi_set_roam_ctrl_cmd(struct wmi_t *wmip, WMI_SET_ROAM_CTRL_CMD *p, ++ A_UINT8 size); ++A_STATUS wmi_set_powersave_timers_cmd(struct wmi_t *wmip, ++ WMI_POWERSAVE_TIMERS_POLICY_CMD *pCmd, ++ A_UINT8 size); ++ ++A_STATUS wmi_set_opt_mode_cmd(struct wmi_t *wmip, A_UINT8 optMode); ++A_STATUS wmi_opt_tx_frame_cmd(struct wmi_t *wmip, ++ A_UINT8 frmType, ++ A_UINT8 *dstMacAddr, ++ A_UINT8 *bssid, ++ A_UINT16 optIEDataLen, ++ A_UINT8 *optIEData); ++ ++A_STATUS wmi_set_adhoc_bconIntvl_cmd(struct wmi_t *wmip, A_UINT16 intvl); ++A_STATUS wmi_set_voice_pkt_size_cmd(struct wmi_t *wmip, A_UINT16 voicePktSize); ++A_STATUS wmi_set_max_sp_len_cmd(struct wmi_t *wmip, A_UINT8 maxSpLen); ++A_UINT8 convert_userPriority_to_trafficClass(A_UINT8 userPriority); ++A_UINT8 wmi_get_power_mode_cmd(struct wmi_t *wmip); ++A_STATUS wmi_verify_tspec_params(WMI_CREATE_PSTREAM_CMD *pCmd, A_BOOL tspecCompliance); ++ ++#ifdef CONFIG_HOST_TCMD_SUPPORT ++A_STATUS wmi_test_cmd(struct wmi_t *wmip, A_UINT8 *buf, A_UINT32 len); ++#endif ++ ++A_STATUS wmi_set_bt_status_cmd(struct wmi_t *wmip, A_UINT8 streamType, A_UINT8 status); ++A_STATUS wmi_set_bt_params_cmd(struct wmi_t *wmip, WMI_SET_BT_PARAMS_CMD* cmd); ++ ++ ++/* ++ * This function is used to configure the fix rates mask to the target. ++ */ ++A_STATUS wmi_set_fixrates_cmd(struct wmi_t *wmip, A_INT16 fixRatesMask); ++A_STATUS wmi_get_ratemask_cmd(struct wmi_t *wmip); ++ ++A_STATUS wmi_set_authmode_cmd(struct wmi_t *wmip, A_UINT8 mode); ++ ++A_STATUS wmi_set_reassocmode_cmd(struct wmi_t *wmip, A_UINT8 mode); ++ ++A_STATUS wmi_set_wmm_cmd(struct wmi_t *wmip, WMI_WMM_STATUS status); ++A_STATUS wmi_set_wmm_txop(struct wmi_t *wmip, WMI_TXOP_CFG txEnable); ++ ++A_STATUS wmi_get_keepalive_configured(struct wmi_t *wmip); ++A_UINT8 wmi_get_keepalive_cmd(struct wmi_t *wmip); ++A_STATUS wmi_set_keepalive_cmd(struct wmi_t *wmip, A_UINT8 keepaliveInterval); ++ ++A_STATUS wmi_set_appie_cmd(struct wmi_t *wmip, A_UINT8 mgmtFrmType, ++ A_UINT8 ieLen,A_UINT8 *ieInfo); ++ ++A_STATUS wmi_set_halparam_cmd(struct wmi_t *wmip, A_UINT8 *cmd, A_UINT16 dataLen); ++A_INT32 wmi_get_rate(A_INT8 rateindex); ++ ++/*Wake on Wireless WMI commands*/ ++A_STATUS wmi_set_host_sleep_mode_cmd(struct wmi_t *wmip, WMI_SET_HOST_SLEEP_MODE_CMD *cmd); ++A_STATUS wmi_set_wow_mode_cmd(struct wmi_t *wmip, WMI_SET_WOW_MODE_CMD *cmd); ++A_STATUS wmi_get_wow_list_cmd(struct wmi_t *wmip, WMI_GET_WOW_LIST_CMD *cmd); ++A_STATUS wmi_add_wow_pattern_cmd(struct wmi_t *wmip, ++ WMI_ADD_WOW_PATTERN_CMD *cmd, A_UINT8* pattern, A_UINT8* mask, A_UINT8 pattern_size); ++A_STATUS wmi_del_wow_pattern_cmd(struct wmi_t *wmip, ++ WMI_DEL_WOW_PATTERN_CMD *cmd); ++A_STATUS wmi_set_wsc_status_cmd(struct wmi_t *wmip, A_UINT32 status); ++ ++bss_t * ++wmi_find_Ssidnode (struct wmi_t *wmip, A_UCHAR *pSsid, ++ A_UINT32 ssidLength, A_BOOL bIsWPA2); ++ ++void ++wmi_node_return (struct wmi_t *wmip, bss_t *bss); ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* _WMI_API_H_ */ +diff --git a/drivers/sdio/function/wlan/ar6000/include/wmix.h b/drivers/sdio/function/wlan/ar6000/include/wmix.h +new file mode 100644 +index 0000000..8f12b5e +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/include/wmix.h +@@ -0,0 +1,233 @@ ++/* ++ * Copyright (c) 2004-2005 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * $ATH_LICENSE_HOSTSDK0_C$ ++ * ++ * This file contains extensions of the WMI protocol specified in the ++ * Wireless Module Interface (WMI). It includes definitions of all ++ * extended commands and events. Extensions include useful commands ++ * that are not directly related to wireless activities. They may ++ * be hardware-specific, and they might not be supported on all ++ * implementations. ++ * ++ * Extended WMIX commands are encapsulated in a WMI message with ++ * cmd=WMI_EXTENSION_CMD. ++ * ++ */ ++ ++#ifndef _WMIX_H_ ++#define _WMIX_H_ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++#ifndef ATH_TARGET ++#include "athstartpack.h" ++#endif ++ ++#include "dbglog.h" ++ ++/* ++ * Extended WMI commands are those that are needed during wireless ++ * operation, but which are not really wireless commands. This allows, ++ * for instance, platform-specific commands. Extended WMI commands are ++ * embedded in a WMI command message with WMI_COMMAND_ID=WMI_EXTENSION_CMDID. ++ * Extended WMI events are similarly embedded in a WMI event message with ++ * WMI_EVENT_ID=WMI_EXTENSION_EVENTID. ++ */ ++typedef PREPACK struct { ++ A_UINT32 commandId; ++} POSTPACK WMIX_CMD_HDR; ++ ++typedef enum { ++ WMIX_DSETOPEN_REPLY_CMDID = 0x2001, ++ WMIX_DSETDATA_REPLY_CMDID, ++ WMIX_GPIO_OUTPUT_SET_CMDID, ++ WMIX_GPIO_INPUT_GET_CMDID, ++ WMIX_GPIO_REGISTER_SET_CMDID, ++ WMIX_GPIO_REGISTER_GET_CMDID, ++ WMIX_GPIO_INTR_ACK_CMDID, ++ WMIX_HB_CHALLENGE_RESP_CMDID, ++ WMIX_DBGLOG_CFG_MODULE_CMDID, ++} WMIX_COMMAND_ID; ++ ++typedef enum { ++ WMIX_DSETOPENREQ_EVENTID = 0x3001, ++ WMIX_DSETCLOSE_EVENTID, ++ WMIX_DSETDATAREQ_EVENTID, ++ WMIX_GPIO_INTR_EVENTID, ++ WMIX_GPIO_DATA_EVENTID, ++ WMIX_GPIO_ACK_EVENTID, ++ WMIX_HB_CHALLENGE_RESP_EVENTID, ++ WMIX_DBGLOG_EVENTID, ++} WMIX_EVENT_ID; ++ ++/* ++ * =============DataSet support================= ++ */ ++ ++/* ++ * WMIX_DSETOPENREQ_EVENTID ++ * DataSet Open Request Event ++ */ ++typedef PREPACK struct { ++ A_UINT32 dset_id; ++ A_UINT32 targ_dset_handle; /* echo'ed, not used by Host, */ ++ A_UINT32 targ_reply_fn; /* echo'ed, not used by Host, */ ++ A_UINT32 targ_reply_arg; /* echo'ed, not used by Host, */ ++} POSTPACK WMIX_DSETOPENREQ_EVENT; ++ ++/* ++ * WMIX_DSETCLOSE_EVENTID ++ * DataSet Close Event ++ */ ++typedef PREPACK struct { ++ A_UINT32 access_cookie; ++} POSTPACK WMIX_DSETCLOSE_EVENT; ++ ++/* ++ * WMIX_DSETDATAREQ_EVENTID ++ * DataSet Data Request Event ++ */ ++typedef PREPACK struct { ++ A_UINT32 access_cookie; ++ A_UINT32 offset; ++ A_UINT32 length; ++ A_UINT32 targ_buf; /* echo'ed, not used by Host, */ ++ A_UINT32 targ_reply_fn; /* echo'ed, not used by Host, */ ++ A_UINT32 targ_reply_arg; /* echo'ed, not used by Host, */ ++} POSTPACK WMIX_DSETDATAREQ_EVENT; ++ ++typedef PREPACK struct { ++ A_UINT32 status; ++ A_UINT32 targ_dset_handle; ++ A_UINT32 targ_reply_fn; ++ A_UINT32 targ_reply_arg; ++ A_UINT32 access_cookie; ++ A_UINT32 size; ++ A_UINT32 version; ++} POSTPACK WMIX_DSETOPEN_REPLY_CMD; ++ ++typedef PREPACK struct { ++ A_UINT32 status; ++ A_UINT32 targ_buf; ++ A_UINT32 targ_reply_fn; ++ A_UINT32 targ_reply_arg; ++ A_UINT32 length; ++ A_UINT8 buf[1]; ++} POSTPACK WMIX_DSETDATA_REPLY_CMD; ++ ++ ++/* ++ * =============GPIO support================= ++ * All masks are 18-bit masks with bit N operating on GPIO pin N. ++ */ ++ ++#include "gpio.h" ++ ++/* ++ * Set GPIO pin output state. ++ * In order for output to be driven, a pin must be enabled for output. ++ * This can be done during initialization through the GPIO Configuration ++ * DataSet, or during operation with the enable_mask. ++ * ++ * If a request is made to simultaneously set/clear or set/disable or ++ * clear/disable or disable/enable, results are undefined. ++ */ ++typedef PREPACK struct { ++ A_UINT32 set_mask; /* pins to set */ ++ A_UINT32 clear_mask; /* pins to clear */ ++ A_UINT32 enable_mask; /* pins to enable for output */ ++ A_UINT32 disable_mask; /* pins to disable/tristate */ ++} POSTPACK WMIX_GPIO_OUTPUT_SET_CMD; ++ ++/* ++ * Set a GPIO register. For debug/exceptional cases. ++ * Values for gpioreg_id are GPIO_REGISTER_IDs, defined in a ++ * platform-dependent header. ++ */ ++typedef PREPACK struct { ++ A_UINT32 gpioreg_id; /* GPIO register ID */ ++ A_UINT32 value; /* value to write */ ++} POSTPACK WMIX_GPIO_REGISTER_SET_CMD; ++ ++/* Get a GPIO register. For debug/exceptional cases. */ ++typedef PREPACK struct { ++ A_UINT32 gpioreg_id; /* GPIO register to read */ ++} POSTPACK WMIX_GPIO_REGISTER_GET_CMD; ++ ++/* ++ * Host acknowledges and re-arms GPIO interrupts. A single ++ * message should be used to acknowledge all interrupts that ++ * were delivered in an earlier WMIX_GPIO_INTR_EVENT message. ++ */ ++typedef PREPACK struct { ++ A_UINT32 ack_mask; /* interrupts to acknowledge */ ++} POSTPACK WMIX_GPIO_INTR_ACK_CMD; ++ ++/* ++ * Target informs Host of GPIO interrupts that have ocurred since the ++ * last WMIX_GIPO_INTR_ACK_CMD was received. Additional information -- ++ * the current GPIO input values is provided -- in order to support ++ * use of a GPIO interrupt as a Data Valid signal for other GPIO pins. ++ */ ++typedef PREPACK struct { ++ A_UINT32 intr_mask; /* pending GPIO interrupts */ ++ A_UINT32 input_values; /* recent GPIO input values */ ++} POSTPACK WMIX_GPIO_INTR_EVENT; ++ ++/* ++ * Target responds to Host's earlier WMIX_GPIO_INPUT_GET_CMDID request ++ * using a GPIO_DATA_EVENT with ++ * value set to the mask of GPIO pin inputs and ++ * reg_id set to GPIO_ID_NONE ++ * ++ * ++ * Target responds to Hosts's earlier WMIX_GPIO_REGISTER_GET_CMDID request ++ * using a GPIO_DATA_EVENT with ++ * value set to the value of the requested register and ++ * reg_id identifying the register (reflects the original request) ++ * NB: reg_id supports the future possibility of unsolicited ++ * WMIX_GPIO_DATA_EVENTs (for polling GPIO input), and it may ++ * simplify Host GPIO support. ++ */ ++typedef PREPACK struct { ++ A_UINT32 value; ++ A_UINT32 reg_id; ++} POSTPACK WMIX_GPIO_DATA_EVENT; ++ ++/* ++ * =============Error Detection support================= ++ */ ++ ++/* ++ * WMIX_HB_CHALLENGE_RESP_CMDID ++ * Heartbeat Challenge Response command ++ */ ++typedef PREPACK struct { ++ A_UINT32 cookie; ++ A_UINT32 source; ++} POSTPACK WMIX_HB_CHALLENGE_RESP_CMD; ++ ++/* ++ * WMIX_HB_CHALLENGE_RESP_EVENTID ++ * Heartbeat Challenge Response Event ++ */ ++#define WMIX_HB_CHALLENGE_RESP_EVENT WMIX_HB_CHALLENGE_RESP_CMD ++ ++typedef PREPACK struct { ++ struct dbglog_config_s config; ++} POSTPACK WMIX_DBGLOG_CFG_MODULE_CMD; ++ ++#ifndef ATH_TARGET ++#include "athendpack.h" ++#endif ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* _WMIX_H_ */ +diff --git a/drivers/sdio/function/wlan/ar6000/miscdrv/common_drv.c b/drivers/sdio/function/wlan/ar6000/miscdrv/common_drv.c +new file mode 100644 +index 0000000..2b0dfd3 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/miscdrv/common_drv.c +@@ -0,0 +1,467 @@ ++ ++/* ++ * ++ * Copyright (c) 2004-2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++#include "a_config.h" ++#include "athdefs.h" ++#include "a_types.h" ++#include "AR6Khwreg.h" ++#include "targaddrs.h" ++#include "a_osapi.h" ++#include "hif.h" ++#include "htc_api.h" ++#include "bmi.h" ++#include "bmi_msg.h" ++#include "common_drv.h" ++#include "a_debug.h" ++#include "targaddrs.h" ++ ++#define HOST_INTEREST_ITEM_ADDRESS(target, item) \ ++(((TargetType) == TARGET_TYPE_AR6001) ? \ ++ AR6001_HOST_INTEREST_ITEM_ADDRESS(item) : \ ++ AR6002_HOST_INTEREST_ITEM_ADDRESS(item)) ++ ++ ++/* Compile the 4BYTE version of the window register setup routine, ++ * This mitigates host interconnect issues with non-4byte aligned bus requests, some ++ * interconnects use bus adapters that impose strict limitations. ++ * Since diag window access is not intended for performance critical operations, the 4byte mode should ++ * be satisfactory even though it generates 4X the bus activity. */ ++ ++#ifdef USE_4BYTE_REGISTER_ACCESS ++ ++ /* set the window address register (using 4-byte register access ). */ ++A_STATUS ar6000_SetAddressWindowRegister(HIF_DEVICE *hifDevice, A_UINT32 RegisterAddr, A_UINT32 Address) ++{ ++ A_STATUS status; ++ A_UINT8 addrValue[4]; ++ int i; ++ ++ /* write bytes 1,2,3 of the register to set the upper address bytes, the LSB is written ++ * last to initiate the access cycle */ ++ ++ for (i = 1; i <= 3; i++) { ++ /* fill the buffer with the address byte value we want to hit 4 times*/ ++ addrValue[0] = ((A_UINT8 *)&Address)[i]; ++ addrValue[1] = addrValue[0]; ++ addrValue[2] = addrValue[0]; ++ addrValue[3] = addrValue[0]; ++ ++ /* hit each byte of the register address with a 4-byte write operation to the same address, ++ * this is a harmless operation */ ++ status = HIFReadWrite(hifDevice, ++ RegisterAddr+i, ++ addrValue, ++ 4, ++ HIF_WR_SYNC_BYTE_FIX, ++ NULL); ++ if (status != A_OK) { ++ break; ++ } ++ } ++ ++ if (status != A_OK) { ++ AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Cannot write initial bytes of 0x%x to window reg: 0x%X \n", ++ RegisterAddr, Address)); ++ return status; ++ } ++ ++ /* write the address register again, this time write the whole 4-byte value. ++ * The effect here is that the LSB write causes the cycle to start, the extra ++ * 3 byte write to bytes 1,2,3 has no effect since we are writing the same values again */ ++ status = HIFReadWrite(hifDevice, ++ RegisterAddr, ++ (A_UCHAR *)(&Address), ++ 4, ++ HIF_WR_SYNC_BYTE_INC, ++ NULL); ++ ++ if (status != A_OK) { ++ AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Cannot write 0x%x to window reg: 0x%X \n", ++ RegisterAddr, Address)); ++ return status; ++ } ++ ++ return A_OK; ++ ++ ++ ++} ++ ++ ++#else ++ ++ /* set the window address register */ ++A_STATUS ar6000_SetAddressWindowRegister(HIF_DEVICE *hifDevice, A_UINT32 RegisterAddr, A_UINT32 Address) ++{ ++ A_STATUS status; ++ ++ /* write bytes 1,2,3 of the register to set the upper address bytes, the LSB is written ++ * last to initiate the access cycle */ ++ status = HIFReadWrite(hifDevice, ++ RegisterAddr+1, /* write upper 3 bytes */ ++ ((A_UCHAR *)(&Address))+1, ++ sizeof(A_UINT32)-1, ++ HIF_WR_SYNC_BYTE_INC, ++ NULL); ++ ++ if (status != A_OK) { ++ AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Cannot write initial bytes of 0x%x to window reg: 0x%X \n", ++ RegisterAddr, Address)); ++ return status; ++ } ++ ++ /* write the LSB of the register, this initiates the operation */ ++ status = HIFReadWrite(hifDevice, ++ RegisterAddr, ++ (A_UCHAR *)(&Address), ++ sizeof(A_UINT8), ++ HIF_WR_SYNC_BYTE_INC, ++ NULL); ++ ++ if (status != A_OK) { ++ AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Cannot write 0x%x to window reg: 0x%X \n", ++ RegisterAddr, Address)); ++ return status; ++ } ++ ++ return A_OK; ++} ++ ++#endif ++ ++/* ++ * Read from the AR6000 through its diagnostic window. ++ * No cooperation from the Target is required for this. ++ */ ++A_STATUS ++ar6000_ReadRegDiag(HIF_DEVICE *hifDevice, A_UINT32 *address, A_UINT32 *data) ++{ ++ A_STATUS status; ++ ++ /* set window register to start read cycle */ ++ status = ar6000_SetAddressWindowRegister(hifDevice, ++ WINDOW_READ_ADDR_ADDRESS, ++ *address); ++ ++ if (status != A_OK) { ++ return status; ++ } ++ ++ /* read the data */ ++ status = HIFReadWrite(hifDevice, ++ WINDOW_DATA_ADDRESS, ++ (A_UCHAR *)data, ++ sizeof(A_UINT32), ++ HIF_RD_SYNC_BYTE_INC, ++ NULL); ++ if (status != A_OK) { ++ AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Cannot read from WINDOW_DATA_ADDRESS\n")); ++ return status; ++ } ++ ++ return status; ++} ++ ++ ++/* ++ * Write to the AR6000 through its diagnostic window. ++ * No cooperation from the Target is required for this. ++ */ ++A_STATUS ++ar6000_WriteRegDiag(HIF_DEVICE *hifDevice, A_UINT32 *address, A_UINT32 *data) ++{ ++ A_STATUS status; ++ ++ /* set write data */ ++ status = HIFReadWrite(hifDevice, ++ WINDOW_DATA_ADDRESS, ++ (A_UCHAR *)data, ++ sizeof(A_UINT32), ++ HIF_WR_SYNC_BYTE_INC, ++ NULL); ++ if (status != A_OK) { ++ AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Cannot write 0x%x to WINDOW_DATA_ADDRESS\n", *data)); ++ return status; ++ } ++ ++ /* set window register, which starts the write cycle */ ++ return ar6000_SetAddressWindowRegister(hifDevice, ++ WINDOW_WRITE_ADDR_ADDRESS, ++ *address); ++} ++ ++A_STATUS ++ar6000_ReadDataDiag(HIF_DEVICE *hifDevice, A_UINT32 address, ++ A_UCHAR *data, A_UINT32 length) ++{ ++ A_UINT32 count; ++ A_STATUS status = A_OK; ++ ++ for (count = 0; count < length; count += 4, address += 4) { ++ if ((status = ar6000_ReadRegDiag(hifDevice, &address, ++ (A_UINT32 *)&data[count])) != A_OK) ++ { ++ break; ++ } ++ } ++ ++ return status; ++} ++ ++A_STATUS ++ar6000_WriteDataDiag(HIF_DEVICE *hifDevice, A_UINT32 address, ++ A_UCHAR *data, A_UINT32 length) ++{ ++ A_UINT32 count; ++ A_STATUS status = A_OK; ++ ++ for (count = 0; count < length; count += 4, address += 4) { ++ if ((status = ar6000_WriteRegDiag(hifDevice, &address, ++ (A_UINT32 *)&data[count])) != A_OK) ++ { ++ break; ++ } ++ } ++ ++ return status; ++} ++ ++A_STATUS ++ar6000_reset_device_skipflash(HIF_DEVICE *hifDevice) ++{ ++ int i; ++ struct forceROM_s { ++ A_UINT32 addr; ++ A_UINT32 data; ++ }; ++ struct forceROM_s *ForceROM; ++ int szForceROM; ++ A_UINT32 instruction; ++ ++ static struct forceROM_s ForceROM_REV2[] = { ++ /* NB: This works for old REV2 ROM (old). */ ++ {0x00001ff0, 0x175b0027}, /* jump instruction at 0xa0001ff0 */ ++ {0x00001ff4, 0x00000000}, /* nop instruction at 0xa0001ff4 */ ++ ++ {MC_REMAP_TARGET_ADDRESS, 0x00001ff0}, /* remap to 0xa0001ff0 */ ++ {MC_REMAP_COMPARE_ADDRESS, 0x01000040},/* ...from 0xbfc00040 */ ++ {MC_REMAP_SIZE_ADDRESS, 0x00000000}, /* ...1 cache line */ ++ {MC_REMAP_VALID_ADDRESS, 0x00000001}, /* ...remap is valid */ ++ ++ {LOCAL_COUNT_ADDRESS+0x10, 0}, /* clear BMI credit counter */ ++ ++ {RESET_CONTROL_ADDRESS, RESET_CONTROL_WARM_RST_MASK}, ++ }; ++ ++ static struct forceROM_s ForceROM_NEW[] = { ++ /* NB: This works for AR6000 ROM REV3 and beyond. */ ++ {LOCAL_SCRATCH_ADDRESS, AR6K_OPTION_IGNORE_FLASH}, ++ {LOCAL_COUNT_ADDRESS+0x10, 0}, /* clear BMI credit counter */ ++ {RESET_CONTROL_ADDRESS, RESET_CONTROL_WARM_RST_MASK}, ++ }; ++ ++ /* ++ * Examine a semi-arbitrary instruction that's different ++ * in REV2 and other revisions. ++ * NB: If a Host port does not require simultaneous support ++ * for multiple revisions of Target ROM, this code can be elided. ++ */ ++ (void)ar6000_ReadDataDiag(hifDevice, 0x01000040, ++ (A_UCHAR *)&instruction, 4); ++ ++ AR_DEBUG_PRINTF(ATH_LOG_ERR, ("instruction=0x%x\n", instruction)); ++ ++ if (instruction == 0x3c1aa200) { ++ /* It's an old ROM */ ++ ForceROM = ForceROM_REV2; ++ szForceROM = sizeof(ForceROM_REV2)/sizeof(*ForceROM); ++ AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Using OLD method\n")); ++ } else { ++ ForceROM = ForceROM_NEW; ++ szForceROM = sizeof(ForceROM_NEW)/sizeof(*ForceROM); ++ AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Using NEW method\n")); ++ } ++ ++ AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Force Target to execute from ROM....\n")); ++ for (i = 0; i < szForceROM; i++) ++ { ++ if (ar6000_WriteRegDiag(hifDevice, ++ &ForceROM[i].addr, ++ &ForceROM[i].data) != A_OK) ++ { ++ AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Cannot force Target to execute ROM!\n")); ++ return A_ERROR; ++ } ++ } ++ ++ A_MDELAY(50); /* delay to allow dragon to come to BMI phase */ ++ return A_OK; ++} ++ ++/* reset device */ ++A_STATUS ar6000_reset_device(HIF_DEVICE *hifDevice, A_UINT32 TargetType) ++{ ++ ++#if !defined(DWSIM) ++ A_STATUS status = A_OK; ++ A_UINT32 address; ++ A_UINT32 data; ++ ++ do { ++ ++ // address = RESET_CONTROL_ADDRESS; ++ data = RESET_CONTROL_COLD_RST_MASK; ++ ++ /* Hardcode the address of RESET_CONTROL_ADDRESS based on the target type */ ++ if (TargetType == TARGET_TYPE_AR6001) { ++ address = 0x0C000000; ++ } else { ++ if (TargetType == TARGET_TYPE_AR6002) { ++ address = 0x00004000; ++ } else { ++ A_ASSERT(0); ++ } ++ } ++ ++ status = ar6000_WriteRegDiag(hifDevice, &address, &data); ++ ++ if (A_FAILED(status)) { ++ break; ++ } ++ ++ /* ++ * Read back the RESET CAUSE register to ensure that the cold reset ++ * went through. ++ */ ++ A_MDELAY(2000); /* 2 second delay to allow things to settle down */ ++ ++ ++ // address = RESET_CAUSE_ADDRESS; ++ /* Hardcode the address of RESET_CAUSE_ADDRESS based on the target type */ ++ if (TargetType == TARGET_TYPE_AR6001) { ++ address = 0x0C0000CC; ++ } else { ++ if (TargetType == TARGET_TYPE_AR6002) { ++ address = 0x000040C0; ++ } else { ++ A_ASSERT(0); ++ } ++ } ++ ++ data = 0; ++ status = ar6000_ReadRegDiag(hifDevice, &address, &data); ++ ++ if (A_FAILED(status)) { ++ break; ++ } ++ ++ AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Reset Cause readback: 0x%X \n",data)); ++ data &= RESET_CAUSE_LAST_MASK; ++ if (data != 2) { ++ AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Unable to cold reset the target \n")); ++ } ++ ++ } while (FALSE); ++ ++ if (A_FAILED(status)) { ++ AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Failed to reset target \n")); ++ } ++#endif ++ return A_OK; ++} ++ ++#define REG_DUMP_COUNT_AR6001 38 /* WORDs, derived from AR6001_regdump.h */ ++#define REG_DUMP_COUNT_AR6002 32 /* WORDs, derived from AR6002_regdump.h */ ++ ++ ++#if REG_DUMP_COUNT_AR6001 <= REG_DUMP_COUNT_AR6002 ++#define REGISTER_DUMP_LEN_MAX REG_DUMP_COUNT_AR6002 ++#else ++#define REGISTER_DUMP_LEN_MAX REG_DUMP_COUNT_AR6001 ++#endif ++ ++void ar6000_dump_target_assert_info(HIF_DEVICE *hifDevice, A_UINT32 TargetType) ++{ ++ A_UINT32 address; ++ A_UINT32 regDumpArea = 0; ++ A_STATUS status; ++ A_UINT32 regDumpValues[REGISTER_DUMP_LEN_MAX]; ++ A_UINT32 regDumpCount = 0; ++ A_UINT32 i; ++ ++ do { ++ ++ /* the reg dump pointer is copied to the host interest area */ ++ address = HOST_INTEREST_ITEM_ADDRESS(TargetType, hi_failure_state); ++ ++ if (TargetType == TARGET_TYPE_AR6001) { ++ /* for AR6001, this is a fixed location because the ptr is actually stuck in cache, ++ * this may be fixed in later firmware versions */ ++ address = 0x18a0; ++ regDumpCount = REG_DUMP_COUNT_AR6001; ++ ++ } else if (TargetType == TARGET_TYPE_AR6002) { ++ ++ regDumpCount = REG_DUMP_COUNT_AR6002; ++ ++ } else { ++ A_ASSERT(0); ++ } ++ ++ /* read RAM location through diagnostic window */ ++ status = ar6000_ReadRegDiag(hifDevice, &address, ®DumpArea); ++ ++ if (A_FAILED(status)) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("AR6K: Failed to get ptr to register dump area \n")); ++ break; ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("AR6K: Location of register dump data: 0x%X \n",regDumpArea)); ++ ++ if (regDumpArea == 0) { ++ /* no reg dump */ ++ break; ++ } ++ ++ if (TargetType == TARGET_TYPE_AR6001) { ++ regDumpArea &= 0x0FFFFFFF; /* convert to physical address in target memory */ ++ } ++ ++ /* fetch register dump data */ ++ status = ar6000_ReadDataDiag(hifDevice, ++ regDumpArea, ++ (A_UCHAR *)®DumpValues[0], ++ regDumpCount * (sizeof(A_UINT32))); ++ ++ if (A_FAILED(status)) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("AR6K: Failed to get register dump \n")); ++ break; ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("AR6K: Register Dump: \n")); ++ ++ for (i = 0; i < regDumpCount; i++) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,(" %d : 0x%8.8X \n",i, regDumpValues[i])); ++ } ++ ++ } while (FALSE); ++ ++} ++ +diff --git a/drivers/sdio/function/wlan/ar6000/miscdrv/credit_dist.c b/drivers/sdio/function/wlan/ar6000/miscdrv/credit_dist.c +new file mode 100644 +index 0000000..8d37d62 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/miscdrv/credit_dist.c +@@ -0,0 +1,346 @@ ++ ++/* ++ * ++ * Copyright (c) 2004-2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++#include "a_config.h" ++#include "athdefs.h" ++#include "a_types.h" ++#include "a_osapi.h" ++#include "a_debug.h" ++#include "htc_api.h" ++#include "common_drv.h" ++ ++/********* CREDIT DISTRIBUTION FUNCTIONS ******************************************/ ++ ++#define NO_VO_SERVICE 1 /* currently WMI only uses 3 data streams, so we leave VO service inactive */ ++ ++#ifdef NO_VO_SERVICE ++#define DATA_SVCS_USED 3 ++#else ++#define DATA_SVCS_USED 4 ++#endif ++ ++static void RedistributeCredits(COMMON_CREDIT_STATE_INFO *pCredInfo, ++ HTC_ENDPOINT_CREDIT_DIST *pEPDistList); ++ ++static void SeekCredits(COMMON_CREDIT_STATE_INFO *pCredInfo, ++ HTC_ENDPOINT_CREDIT_DIST *pEPDistList); ++ ++/* reduce an ep's credits back to a set limit */ ++static INLINE void ReduceCredits(COMMON_CREDIT_STATE_INFO *pCredInfo, ++ HTC_ENDPOINT_CREDIT_DIST *pEpDist, ++ int Limit) ++{ ++ int credits; ++ ++ /* set the new limit */ ++ pEpDist->TxCreditsAssigned = Limit; ++ ++ if (pEpDist->TxCredits <= Limit) { ++ return; ++ } ++ ++ /* figure out how much to take away */ ++ credits = pEpDist->TxCredits - Limit; ++ /* take them away */ ++ pEpDist->TxCredits -= credits; ++ pCredInfo->CurrentFreeCredits += credits; ++} ++ ++/* give an endpoint some credits from the free credit pool */ ++#define GiveCredits(pCredInfo,pEpDist,credits) \ ++{ \ ++ (pEpDist)->TxCredits += (credits); \ ++ (pEpDist)->TxCreditsAssigned += (credits); \ ++ (pCredInfo)->CurrentFreeCredits -= (credits); \ ++} ++ ++ ++/* default credit init callback. ++ * This function is called in the context of HTCStart() to setup initial (application-specific) ++ * credit distributions */ ++static void ar6000_credit_init(void *Context, ++ HTC_ENDPOINT_CREDIT_DIST *pEPList, ++ int TotalCredits) ++{ ++ HTC_ENDPOINT_CREDIT_DIST *pCurEpDist; ++ int count; ++ COMMON_CREDIT_STATE_INFO *pCredInfo = (COMMON_CREDIT_STATE_INFO *)Context; ++ ++ pCredInfo->CurrentFreeCredits = TotalCredits; ++ pCredInfo->TotalAvailableCredits = TotalCredits; ++ ++ pCurEpDist = pEPList; ++ ++ /* run through the list and initialize */ ++ while (pCurEpDist != NULL) { ++ ++ /* set minimums for each endpoint */ ++ pCurEpDist->TxCreditsMin = pCurEpDist->TxCreditsPerMaxMsg; ++ ++ if (pCurEpDist->ServiceID == WMI_CONTROL_SVC) { ++ /* give control service some credits */ ++ GiveCredits(pCredInfo,pCurEpDist,pCurEpDist->TxCreditsMin); ++ /* control service is always marked active, it never goes inactive EVER */ ++ SET_EP_ACTIVE(pCurEpDist); ++ } else if (pCurEpDist->ServiceID == WMI_DATA_BK_SVC) { ++ /* this is the lowest priority data endpoint, save this off for easy access */ ++ pCredInfo->pLowestPriEpDist = pCurEpDist; ++ } ++ ++ /* Streams have to be created (explicit | implicit)for all kinds ++ * of traffic. BE endpoints are also inactive in the beginning. ++ * When BE traffic starts it creates implicit streams that ++ * redistributes credits. ++ */ ++ ++ /* note, all other endpoints have minimums set but are initially given NO credits. ++ * Credits will be distributed as traffic activity demands */ ++ pCurEpDist = pCurEpDist->pNext; ++ } ++ ++ if (pCredInfo->CurrentFreeCredits <= 0) { ++ AR_DEBUG_PRINTF(ATH_LOG_INF, ("Not enough credits (%d) to do credit distributions \n", TotalCredits)); ++ A_ASSERT(FALSE); ++ return; ++ } ++ ++ /* reset list */ ++ pCurEpDist = pEPList; ++ /* now run through the list and set max operating credit limits for everyone */ ++ while (pCurEpDist != NULL) { ++ if (pCurEpDist->ServiceID == WMI_CONTROL_SVC) { ++ /* control service max is just 1 max message */ ++ pCurEpDist->TxCreditsNorm = pCurEpDist->TxCreditsPerMaxMsg; ++ } else { ++ /* for the remaining data endpoints, we assume that each TxCreditsPerMaxMsg are ++ * the same. ++ * We use a simple calculation here, we take the remaining credits and ++ * determine how many max messages this can cover and then set each endpoint's ++ * normal value equal to half this amount. ++ * */ ++ count = (pCredInfo->CurrentFreeCredits/pCurEpDist->TxCreditsPerMaxMsg) * pCurEpDist->TxCreditsPerMaxMsg; ++ count = count >> 1; ++ count = max(count,pCurEpDist->TxCreditsPerMaxMsg); ++ /* set normal */ ++ pCurEpDist->TxCreditsNorm = count; ++ ++ } ++ pCurEpDist = pCurEpDist->pNext; ++ } ++ ++} ++ ++ ++/* default credit distribution callback ++ * This callback is invoked whenever endpoints require credit distributions. ++ * A lock is held while this function is invoked, this function shall NOT block. ++ * The pEPDistList is a list of distribution structures in prioritized order as ++ * defined by the call to the HTCSetCreditDistribution() api. ++ * ++ */ ++static void ar6000_credit_distribute(void *Context, ++ HTC_ENDPOINT_CREDIT_DIST *pEPDistList, ++ HTC_CREDIT_DIST_REASON Reason) ++{ ++ HTC_ENDPOINT_CREDIT_DIST *pCurEpDist; ++ COMMON_CREDIT_STATE_INFO *pCredInfo = (COMMON_CREDIT_STATE_INFO *)Context; ++ ++ switch (Reason) { ++ case HTC_CREDIT_DIST_SEND_COMPLETE : ++ pCurEpDist = pEPDistList; ++ /* we are given the start of the endpoint distribution list. ++ * There may be one or more endpoints to service. ++ * Run through the list and distribute credits */ ++ while (pCurEpDist != NULL) { ++ ++ if (pCurEpDist->TxCreditsToDist > 0) { ++ /* return the credits back to the endpoint */ ++ pCurEpDist->TxCredits += pCurEpDist->TxCreditsToDist; ++ /* always zero out when we are done */ ++ pCurEpDist->TxCreditsToDist = 0; ++ ++ if (pCurEpDist->TxCredits > pCurEpDist->TxCreditsAssigned) { ++ /* reduce to the assigned limit, previous credit reductions ++ * could have caused the limit to change */ ++ ReduceCredits(pCredInfo, pCurEpDist, pCurEpDist->TxCreditsAssigned); ++ } ++ ++ if (pCurEpDist->TxCredits > pCurEpDist->TxCreditsNorm) { ++ /* oversubscribed endpoints need to reduce back to normal */ ++ ReduceCredits(pCredInfo, pCurEpDist, pCurEpDist->TxCreditsNorm); ++ } ++ } ++ ++ pCurEpDist = pCurEpDist->pNext; ++ } ++ ++ A_ASSERT(pCredInfo->CurrentFreeCredits <= pCredInfo->TotalAvailableCredits); ++ ++ break; ++ ++ case HTC_CREDIT_DIST_ACTIVITY_CHANGE : ++ RedistributeCredits(pCredInfo,pEPDistList); ++ break; ++ case HTC_CREDIT_DIST_SEEK_CREDITS : ++ SeekCredits(pCredInfo,pEPDistList); ++ break; ++ case HTC_DUMP_CREDIT_STATE : ++ AR_DEBUG_PRINTF(ATH_LOG_INF, ("Credit Distribution, total : %d, free : %d\n", ++ pCredInfo->TotalAvailableCredits, pCredInfo->CurrentFreeCredits)); ++ break; ++ default: ++ break; ++ ++ } ++ ++} ++ ++/* redistribute credits based on activity change */ ++static void RedistributeCredits(COMMON_CREDIT_STATE_INFO *pCredInfo, ++ HTC_ENDPOINT_CREDIT_DIST *pEPDistList) ++{ ++ HTC_ENDPOINT_CREDIT_DIST *pCurEpDist = pEPDistList; ++ ++ /* walk through the list and remove credits from inactive endpoints */ ++ while (pCurEpDist != NULL) { ++ ++ if (pCurEpDist->ServiceID != WMI_CONTROL_SVC) { ++ if (!IS_EP_ACTIVE(pCurEpDist)) { ++ /* EP is inactive, reduce credits back to zero */ ++ ReduceCredits(pCredInfo, pCurEpDist, 0); ++ } ++ } ++ ++ /* NOTE in the active case, we do not need to do anything further, ++ * when an EP goes active and needs credits, HTC will call into ++ * our distribution function using a reason code of HTC_CREDIT_DIST_SEEK_CREDITS */ ++ ++ pCurEpDist = pCurEpDist->pNext; ++ } ++ ++ A_ASSERT(pCredInfo->CurrentFreeCredits <= pCredInfo->TotalAvailableCredits); ++ ++} ++ ++/* HTC has an endpoint that needs credits, pEPDist is the endpoint in question */ ++static void SeekCredits(COMMON_CREDIT_STATE_INFO *pCredInfo, ++ HTC_ENDPOINT_CREDIT_DIST *pEPDist) ++{ ++ HTC_ENDPOINT_CREDIT_DIST *pCurEpDist; ++ int credits = 0; ++ int need; ++ ++ do { ++ ++ if (pEPDist->ServiceID == WMI_CONTROL_SVC) { ++ /* we never oversubscribe on the control service, this is not ++ * a high performance path and the target never holds onto control ++ * credits for too long */ ++ break; ++ } ++ ++ /* for all other services, we follow a simple algorithm of ++ * 1. checking the free pool for credits ++ * 2. checking lower priority endpoints for credits to take */ ++ ++ if (pCredInfo->CurrentFreeCredits >= 2 * pEPDist->TxCreditsSeek) { ++ /* try to give more credits than it needs */ ++ credits = 2 * pEPDist->TxCreditsSeek; ++ } else { ++ /* give what we can */ ++ credits = min(pCredInfo->CurrentFreeCredits,pEPDist->TxCreditsSeek); ++ } ++ ++ if (credits >= pEPDist->TxCreditsSeek) { ++ /* we found some to fullfill the seek request */ ++ break; ++ } ++ ++ /* we don't have enough in the free pool, try taking away from lower priority services ++ * ++ * The rule for taking away credits: ++ * 1. Only take from lower priority endpoints ++ * 2. Only take what is allocated above the minimum (never starve an endpoint completely) ++ * 3. Only take what you need. ++ * ++ * */ ++ ++ /* starting at the lowest priority */ ++ pCurEpDist = pCredInfo->pLowestPriEpDist; ++ ++ /* work backwards until we hit the endpoint again */ ++ while (pCurEpDist != pEPDist) { ++ /* calculate how many we need so far */ ++ need = pEPDist->TxCreditsSeek - pCredInfo->CurrentFreeCredits; ++ ++ if ((pCurEpDist->TxCreditsAssigned - need) > pCurEpDist->TxCreditsMin) { ++ /* the current one has been allocated more than it's minimum and it ++ * has enough credits assigned above it's minimum to fullfill our need ++ * try to take away just enough to fullfill our need */ ++ ReduceCredits(pCredInfo, ++ pCurEpDist, ++ pCurEpDist->TxCreditsAssigned - need); ++ ++ if (pCredInfo->CurrentFreeCredits >= pEPDist->TxCreditsSeek) { ++ /* we have enough */ ++ break; ++ } ++ } ++ ++ pCurEpDist = pCurEpDist->pPrev; ++ } ++ ++ /* return what we can get */ ++ credits = min(pCredInfo->CurrentFreeCredits,pEPDist->TxCreditsSeek); ++ ++ } while (FALSE); ++ ++ /* did we find some credits? */ ++ if (credits) { ++ /* give what we can */ ++ GiveCredits(pCredInfo, pEPDist, credits); ++ } ++ ++} ++ ++/* initialize and setup credit distribution */ ++A_STATUS ar6000_setup_credit_dist(HTC_HANDLE HTCHandle, COMMON_CREDIT_STATE_INFO *pCredInfo) ++{ ++ HTC_SERVICE_ID servicepriority[5]; ++ ++ A_MEMZERO(pCredInfo,sizeof(COMMON_CREDIT_STATE_INFO)); ++ ++ servicepriority[0] = WMI_CONTROL_SVC; /* highest */ ++ servicepriority[1] = WMI_DATA_VO_SVC; ++ servicepriority[2] = WMI_DATA_VI_SVC; ++ servicepriority[3] = WMI_DATA_BE_SVC; ++ servicepriority[4] = WMI_DATA_BK_SVC; /* lowest */ ++ ++ /* set callbacks and priority list */ ++ HTCSetCreditDistribution(HTCHandle, ++ pCredInfo, ++ ar6000_credit_distribute, ++ ar6000_credit_init, ++ servicepriority, ++ 5); ++ ++ return A_OK; ++} ++ +diff --git a/drivers/sdio/function/wlan/ar6000/wlan/wlan_node.c b/drivers/sdio/function/wlan/ar6000/wlan/wlan_node.c +new file mode 100644 +index 0000000..b124845 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/wlan/wlan_node.c +@@ -0,0 +1,371 @@ ++/*- ++ * Copyright (c) 2001 Atsushi Onoe ++ * Copyright (c) 2002-2004 Sam Leffler, Errno Consulting ++ * Copyright (c) 2004-2005 Atheros Communications ++ * All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions and the following disclaimer. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The name of the author may not be used to endorse or promote products ++ * derived from this software without specific prior written permission. ++ * ++ * Alternatively, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2 as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR ++ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES ++ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ++ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, ++ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT ++ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, ++ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY ++ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF ++ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ * ++ * $Id: //depot/sw/releases/olca2.0-GPL/host/wlan/src/wlan_node.c#1 $ ++ */ ++/* ++ * IEEE 802.11 node handling support. ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++static void wlan_node_timeout(A_ATH_TIMER arg); ++static bss_t * _ieee80211_find_node(struct ieee80211_node_table *nt, ++ const A_UINT8 *macaddr); ++ ++bss_t * ++wlan_node_alloc(struct ieee80211_node_table *nt, int wh_size) ++{ ++ bss_t *ni; ++ ++ ni = A_MALLOC_NOWAIT(sizeof(bss_t)); ++ ++ if (ni != NULL) { ++ ni->ni_buf = A_MALLOC_NOWAIT(wh_size); ++ if (ni->ni_buf == NULL) { ++ A_FREE(ni); ++ ni = NULL; ++ return ni; ++ } ++ } else { ++ return ni; ++ } ++ ++ /* Make sure our lists are clean */ ++ ni->ni_list_next = NULL; ++ ni->ni_list_prev = NULL; ++ ni->ni_hash_next = NULL; ++ ni->ni_hash_prev = NULL; ++ ++ // ++ // ni_scangen never initialized before and during suspend/resume of winmobile, customer (LG/SEMCO) identified ++ // that some junk has been stored in this, due to this scan list didn't properly updated ++ // ++ ni->ni_scangen = 0; ++ ++ return ni; ++} ++ ++void ++wlan_node_free(bss_t *ni) ++{ ++ if (ni->ni_buf != NULL) { ++ A_FREE(ni->ni_buf); ++ } ++ A_FREE(ni); ++} ++ ++void ++wlan_setup_node(struct ieee80211_node_table *nt, bss_t *ni, ++ const A_UINT8 *macaddr) ++{ ++ int hash; ++ ++ A_MEMCPY(ni->ni_macaddr, macaddr, IEEE80211_ADDR_LEN); ++ hash = IEEE80211_NODE_HASH(macaddr); ++ ieee80211_node_initref(ni); /* mark referenced */ ++ ++ ni->ni_tstamp = A_GET_MS(WLAN_NODE_INACT_TIMEOUT_MSEC); ++ IEEE80211_NODE_LOCK_BH(nt); ++ ++ /* Insert at the end of the node list */ ++ ni->ni_list_next = NULL; ++ ni->ni_list_prev = nt->nt_node_last; ++ if(nt->nt_node_last != NULL) ++ { ++ nt->nt_node_last->ni_list_next = ni; ++ } ++ nt->nt_node_last = ni; ++ if(nt->nt_node_first == NULL) ++ { ++ nt->nt_node_first = ni; ++ } ++ ++ /* Insert into the hash list i.e. the bucket */ ++ if((ni->ni_hash_next = nt->nt_hash[hash]) != NULL) ++ { ++ nt->nt_hash[hash]->ni_hash_prev = ni; ++ } ++ ni->ni_hash_prev = NULL; ++ nt->nt_hash[hash] = ni; ++ ++ if (!nt->isTimerArmed) { ++ A_TIMEOUT_MS(&nt->nt_inact_timer, WLAN_NODE_INACT_TIMEOUT_MSEC, 0); ++ nt->isTimerArmed = TRUE; ++ } ++ ++ IEEE80211_NODE_UNLOCK_BH(nt); ++} ++ ++static bss_t * ++_ieee80211_find_node(struct ieee80211_node_table *nt, ++ const A_UINT8 *macaddr) ++{ ++ bss_t *ni; ++ int hash; ++ ++ IEEE80211_NODE_LOCK_ASSERT(nt); ++ ++ hash = IEEE80211_NODE_HASH(macaddr); ++ for(ni = nt->nt_hash[hash]; ni; ni = ni->ni_hash_next) { ++ if (IEEE80211_ADDR_EQ(ni->ni_macaddr, macaddr)) { ++ ieee80211_node_incref(ni); /* mark referenced */ ++ return ni; ++ } ++ } ++ return NULL; ++} ++ ++bss_t * ++wlan_find_node(struct ieee80211_node_table *nt, const A_UINT8 *macaddr) ++{ ++ bss_t *ni; ++ ++ IEEE80211_NODE_LOCK(nt); ++ ni = _ieee80211_find_node(nt, macaddr); ++ IEEE80211_NODE_UNLOCK(nt); ++ return ni; ++} ++ ++/* ++ * Reclaim a node. If this is the last reference count then ++ * do the normal free work. Otherwise remove it from the node ++ * table and mark it gone by clearing the back-reference. ++ */ ++void ++wlan_node_reclaim(struct ieee80211_node_table *nt, bss_t *ni) ++{ ++ IEEE80211_NODE_LOCK(nt); ++ ++ if(ni->ni_list_prev == NULL) ++ { ++ /* First in list so fix the list head */ ++ nt->nt_node_first = ni->ni_list_next; ++ } ++ else ++ { ++ ni->ni_list_prev->ni_list_next = ni->ni_list_next; ++ } ++ ++ if(ni->ni_list_next == NULL) ++ { ++ /* Last in list so fix list tail */ ++ nt->nt_node_last = ni->ni_list_prev; ++ } ++ else ++ { ++ ni->ni_list_next->ni_list_prev = ni->ni_list_prev; ++ } ++ ++ if(ni->ni_hash_prev == NULL) ++ { ++ /* First in list so fix the list head */ ++ int hash; ++ hash = IEEE80211_NODE_HASH(ni->ni_macaddr); ++ nt->nt_hash[hash] = ni->ni_hash_next; ++ } ++ else ++ { ++ ni->ni_hash_prev->ni_hash_next = ni->ni_hash_next; ++ } ++ ++ if(ni->ni_hash_next != NULL) ++ { ++ ni->ni_hash_next->ni_hash_prev = ni->ni_hash_prev; ++ } ++ wlan_node_free(ni); ++ ++ IEEE80211_NODE_UNLOCK(nt); ++} ++ ++static void ++wlan_node_dec_free(bss_t *ni) ++{ ++ if (ieee80211_node_dectestref(ni)) { ++ wlan_node_free(ni); ++ } ++} ++ ++void ++wlan_free_allnodes(struct ieee80211_node_table *nt) ++{ ++ bss_t *ni; ++ ++ while ((ni = nt->nt_node_first) != NULL) { ++ wlan_node_reclaim(nt, ni); ++ } ++} ++ ++void ++wlan_iterate_nodes(struct ieee80211_node_table *nt, wlan_node_iter_func *f, ++ void *arg) ++{ ++ bss_t *ni; ++ A_UINT32 gen; ++ ++ gen = ++nt->nt_scangen; ++ ++ IEEE80211_NODE_LOCK(nt); ++ for (ni = nt->nt_node_first; ni; ni = ni->ni_list_next) { ++ if (ni->ni_scangen != gen) { ++ ni->ni_scangen = gen; ++ (void) ieee80211_node_incref(ni); ++ (*f)(arg, ni); ++ wlan_node_dec_free(ni); ++ } ++ } ++ IEEE80211_NODE_UNLOCK(nt); ++} ++ ++/* ++ * Node table support. ++ */ ++void ++wlan_node_table_init(void *wmip, struct ieee80211_node_table *nt) ++{ ++ int i; ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_WLAN, ("node table = 0x%x\n", (A_UINT32)nt)); ++ IEEE80211_NODE_LOCK_INIT(nt); ++ ++ nt->nt_node_first = nt->nt_node_last = NULL; ++ for(i = 0; i < IEEE80211_NODE_HASHSIZE; i++) ++ { ++ nt->nt_hash[i] = NULL; ++ } ++ A_INIT_TIMER(&nt->nt_inact_timer, wlan_node_timeout, nt); ++ nt->isTimerArmed = FALSE; ++ nt->nt_wmip = wmip; ++} ++ ++static void ++wlan_node_timeout(A_ATH_TIMER arg) ++{ ++ struct ieee80211_node_table *nt = (struct ieee80211_node_table *)arg; ++ bss_t *bss, *nextBss; ++ A_UINT8 myBssid[IEEE80211_ADDR_LEN], reArmTimer = FALSE; ++ ++ wmi_get_current_bssid(nt->nt_wmip, myBssid); ++ ++ bss = nt->nt_node_first; ++ while (bss != NULL) ++ { ++ nextBss = bss->ni_list_next; ++ if (A_MEMCMP(myBssid, bss->ni_macaddr, sizeof(myBssid)) != 0) ++ { ++ ++ if (bss->ni_tstamp <= A_GET_MS(0)) ++ { ++ /* ++ * free up all but the current bss - if set ++ */ ++ wlan_node_reclaim(nt, bss); ++ } ++ else ++ { ++ /* ++ * Re-arm timer, only when we have a bss other than ++ * current bss AND it is not aged-out. ++ */ ++ reArmTimer = TRUE; ++ } ++ } ++ bss = nextBss; ++ } ++ ++ if(reArmTimer) ++ A_TIMEOUT_MS(&nt->nt_inact_timer, WLAN_NODE_INACT_TIMEOUT_MSEC, 0); ++ ++ nt->isTimerArmed = reArmTimer; ++} ++ ++void ++wlan_node_table_cleanup(struct ieee80211_node_table *nt) ++{ ++ A_UNTIMEOUT(&nt->nt_inact_timer); ++ A_DELETE_TIMER(&nt->nt_inact_timer); ++ wlan_free_allnodes(nt); ++ IEEE80211_NODE_LOCK_DESTROY(nt); ++} ++ ++bss_t * ++wlan_find_Ssidnode (struct ieee80211_node_table *nt, A_UCHAR *pSsid, ++ A_UINT32 ssidLength, A_BOOL bIsWPA2) ++{ ++ bss_t *ni = NULL; ++ A_UCHAR *pIESsid = NULL; ++ ++ IEEE80211_NODE_LOCK (nt); ++ ++ for (ni = nt->nt_node_first; ni; ni = ni->ni_list_next) { ++ pIESsid = ni->ni_cie.ie_ssid; ++ if (pIESsid[1] <= 32) { ++ ++ // Step 1 : Check SSID ++ if (0x00 == memcmp (pSsid, &pIESsid[2], ssidLength)) { ++ ++ // Step 2 : if SSID matches, check WPA or WPA2 ++ if (TRUE == bIsWPA2 && NULL != ni->ni_cie.ie_rsn) { ++ ieee80211_node_incref (ni); /* mark referenced */ ++ IEEE80211_NODE_UNLOCK (nt); ++ return ni; ++ } ++ if (FALSE == bIsWPA2 && NULL != ni->ni_cie.ie_wpa) { ++ ieee80211_node_incref(ni); /* mark referenced */ ++ IEEE80211_NODE_UNLOCK (nt); ++ return ni; ++ } ++ } ++ } ++ } ++ ++ IEEE80211_NODE_UNLOCK (nt); ++ ++ return NULL; ++} ++ ++void ++wlan_node_return (struct ieee80211_node_table *nt, bss_t *ni) ++{ ++ IEEE80211_NODE_LOCK (nt); ++ wlan_node_dec_free (ni); ++ IEEE80211_NODE_UNLOCK (nt); ++} +diff --git a/drivers/sdio/function/wlan/ar6000/wlan/wlan_recv_beacon.c b/drivers/sdio/function/wlan/ar6000/wlan/wlan_recv_beacon.c +new file mode 100644 +index 0000000..15beabb +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/wlan/wlan_recv_beacon.c +@@ -0,0 +1,192 @@ ++/*- ++ * Copyright (c) 2001 Atsushi Onoe ++ * Copyright (c) 2002-2004 Sam Leffler, Errno Consulting ++ * All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions and the following disclaimer. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The name of the author may not be used to endorse or promote products ++ * derived from this software without specific prior written permission. ++ * ++ * Alternatively, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2 as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR ++ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES ++ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ++ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, ++ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT ++ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, ++ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY ++ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF ++ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++/* ++ * IEEE 802.11 input handling. ++ */ ++ ++#include "a_config.h" ++#include "athdefs.h" ++#include "a_types.h" ++#include "a_osapi.h" ++#include ++#include ++#include ++ ++#define IEEE80211_VERIFY_LENGTH(_len, _minlen) do { \ ++ if ((_len) < (_minlen)) { \ ++ return A_EINVAL; \ ++ } \ ++} while (0) ++ ++#define IEEE80211_VERIFY_ELEMENT(__elem, __maxlen) do { \ ++ if ((__elem) == NULL) { \ ++ return A_EINVAL; \ ++ } \ ++ if ((__elem)[1] > (__maxlen)) { \ ++ return A_EINVAL; \ ++ } \ ++} while (0) ++ ++ ++/* unaligned little endian access */ ++#define LE_READ_2(p) \ ++ ((A_UINT16) \ ++ ((((A_UINT8 *)(p))[0] ) | (((A_UINT8 *)(p))[1] << 8))) ++ ++#define LE_READ_4(p) \ ++ ((A_UINT32) \ ++ ((((A_UINT8 *)(p))[0] ) | (((A_UINT8 *)(p))[1] << 8) | \ ++ (((A_UINT8 *)(p))[2] << 16) | (((A_UINT8 *)(p))[3] << 24))) ++ ++ ++static int __inline ++iswpaoui(const A_UINT8 *frm) ++{ ++ return frm[1] > 3 && LE_READ_4(frm+2) == ((WPA_OUI_TYPE<<24)|WPA_OUI); ++} ++ ++static int __inline ++iswmmoui(const A_UINT8 *frm) ++{ ++ return frm[1] > 3 && LE_READ_4(frm+2) == ((WMM_OUI_TYPE<<24)|WMM_OUI); ++} ++ ++static int __inline ++iswmmparam(const A_UINT8 *frm) ++{ ++ return frm[1] > 5 && frm[6] == WMM_PARAM_OUI_SUBTYPE; ++} ++ ++static int __inline ++iswmminfo(const A_UINT8 *frm) ++{ ++ return frm[1] > 5 && frm[6] == WMM_INFO_OUI_SUBTYPE; ++} ++ ++static int __inline ++isatherosoui(const A_UINT8 *frm) ++{ ++ return frm[1] > 3 && LE_READ_4(frm+2) == ((ATH_OUI_TYPE<<24)|ATH_OUI); ++} ++ ++static int __inline ++iswscoui(const A_UINT8 *frm) ++{ ++ return frm[1] > 3 && LE_READ_4(frm+2) == ((0x04<<24)|WPA_OUI); ++} ++ ++A_STATUS ++wlan_parse_beacon(A_UINT8 *buf, int framelen, struct ieee80211_common_ie *cie) ++{ ++ A_UINT8 *frm, *efrm; ++ ++ frm = buf; ++ efrm = (A_UINT8 *) (frm + framelen); ++ ++ /* ++ * beacon/probe response frame format ++ * [8] time stamp ++ * [2] beacon interval ++ * [2] capability information ++ * [tlv] ssid ++ * [tlv] supported rates ++ * [tlv] country information ++ * [tlv] parameter set (FH/DS) ++ * [tlv] erp information ++ * [tlv] extended supported rates ++ * [tlv] WMM ++ * [tlv] WPA or RSN ++ * [tlv] Atheros Advanced Capabilities ++ */ ++ IEEE80211_VERIFY_LENGTH(efrm - frm, 12); ++ A_MEMZERO(cie, sizeof(*cie)); ++ ++ cie->ie_tstamp = frm; frm += 8; ++ cie->ie_beaconInt = A_LE2CPU16(*(A_UINT16 *)frm); frm += 2; ++ cie->ie_capInfo = A_LE2CPU16(*(A_UINT16 *)frm); frm += 2; ++ cie->ie_chan = 0; ++ ++ while (frm < efrm) { ++ switch (*frm) { ++ case IEEE80211_ELEMID_SSID: ++ cie->ie_ssid = frm; ++ break; ++ case IEEE80211_ELEMID_RATES: ++ cie->ie_rates = frm; ++ break; ++ case IEEE80211_ELEMID_COUNTRY: ++ cie->ie_country = frm; ++ break; ++ case IEEE80211_ELEMID_FHPARMS: ++ break; ++ case IEEE80211_ELEMID_DSPARMS: ++ cie->ie_chan = frm[2]; ++ break; ++ case IEEE80211_ELEMID_TIM: ++ cie->ie_tim = frm; ++ break; ++ case IEEE80211_ELEMID_IBSSPARMS: ++ break; ++ case IEEE80211_ELEMID_XRATES: ++ cie->ie_xrates = frm; ++ break; ++ case IEEE80211_ELEMID_ERP: ++ if (frm[1] != 1) { ++ //A_PRINTF("Discarding ERP Element - Bad Len\n"); ++ return A_EINVAL; ++ } ++ cie->ie_erp = frm[2]; ++ break; ++ case IEEE80211_ELEMID_RSN: ++ cie->ie_rsn = frm; ++ break; ++ case IEEE80211_ELEMID_VENDOR: ++ if (iswpaoui(frm)) { ++ cie->ie_wpa = frm; ++ } else if (iswmmoui(frm)) { ++ cie->ie_wmm = frm; ++ } else if (isatherosoui(frm)) { ++ cie->ie_ath = frm; ++ } else if(iswscoui(frm)) { ++ cie->ie_wsc = frm; ++ } ++ break; ++ default: ++ break; ++ } ++ frm += frm[1] + 2; ++ } ++ IEEE80211_VERIFY_ELEMENT(cie->ie_rates, IEEE80211_RATE_MAXSIZE); ++ IEEE80211_VERIFY_ELEMENT(cie->ie_ssid, IEEE80211_NWID_LEN); ++ ++ return A_OK; ++} +diff --git a/drivers/sdio/function/wlan/ar6000/wlan/wlan_utils.c b/drivers/sdio/function/wlan/ar6000/wlan/wlan_utils.c +new file mode 100644 +index 0000000..fd5aac9 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/wlan/wlan_utils.c +@@ -0,0 +1,59 @@ ++/* ++ * Copyright (c) 2004-2005 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * This module implements frequently used wlan utilies ++ * ++ * $Id: //depot/sw/releases/olca2.0-GPL/host/wlan/src/wlan_utils.c#1 $ ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++ ++/* ++ * converts ieee channel number to frequency ++ */ ++A_UINT16 ++wlan_ieee2freq(int chan) ++{ ++ if (chan == 14) { ++ return 2484; ++ } ++ if (chan < 14) { /* 0-13 */ ++ return (2407 + (chan*5)); ++ } ++ if (chan < 27) { /* 15-26 */ ++ return (2512 + ((chan-15)*20)); ++ } ++ return (5000 + (chan*5)); ++} ++ ++/* ++ * Converts MHz frequency to IEEE channel number. ++ */ ++A_UINT32 ++wlan_freq2ieee(A_UINT16 freq) ++{ ++ if (freq == 2484) ++ return 14; ++ if (freq < 2484) ++ return (freq - 2407) / 5; ++ if (freq < 5000) ++ return 15 + ((freq - 2512) / 20); ++ return (freq - 5000) / 5; ++} +diff --git a/drivers/sdio/function/wlan/ar6000/wmi/wmi.c b/drivers/sdio/function/wlan/ar6000/wmi/wmi.c +new file mode 100644 +index 0000000..0e0e6ba +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/wmi/wmi.c +@@ -0,0 +1,3921 @@ ++/* ++ * Copyright (c) 2004-2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * This module implements the hardware independent layer of the ++ * Wireless Module Interface (WMI) protocol. ++ * ++ * $Id: //depot/sw/releases/olca2.0-GPL/host/wmi/wmi.c#3 $ ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include "htc.h" ++#include "htc_api.h" ++#include "wmi.h" ++#include ++#include ++#include ++#include ++#include "dset_api.h" ++#include "gpio_api.h" ++#include "wmi_host.h" ++#include "a_drv.h" ++#include "a_drv_api.h" ++#include "a_debug.h" ++#include "dbglog_api.h" ++ ++static A_STATUS wmi_ready_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len); ++ ++static A_STATUS wmi_connect_event_rx(struct wmi_t *wmip, A_UINT8 *datap, ++ int len); ++static A_STATUS wmi_disconnect_event_rx(struct wmi_t *wmip, A_UINT8 *datap, ++ int len); ++static A_STATUS wmi_tkip_micerr_event_rx(struct wmi_t *wmip, A_UINT8 *datap, ++ int len); ++static A_STATUS wmi_bssInfo_event_rx(struct wmi_t *wmip, A_UINT8 *datap, ++ int len); ++static A_STATUS wmi_opt_frame_event_rx(struct wmi_t *wmip, A_UINT8 *datap, ++ int len); ++static A_STATUS wmi_pstream_timeout_event_rx(struct wmi_t *wmip, A_UINT8 *datap, ++ int len); ++static A_STATUS wmi_sync_point(struct wmi_t *wmip); ++ ++static A_STATUS wmi_bitrate_reply_rx(struct wmi_t *wmip, A_UINT8 *datap, ++ int len); ++static A_STATUS wmi_ratemask_reply_rx(struct wmi_t *wmip, A_UINT8 *datap, ++ int len); ++static A_STATUS wmi_channelList_reply_rx(struct wmi_t *wmip, A_UINT8 *datap, ++ int len); ++static A_STATUS wmi_regDomain_event_rx(struct wmi_t *wmip, A_UINT8 *datap, ++ int len); ++static A_STATUS wmi_txPwr_reply_rx(struct wmi_t *wmip, A_UINT8 *datap, int len); ++static A_STATUS wmi_neighborReport_event_rx(struct wmi_t *wmip, A_UINT8 *datap, ++ int len); ++ ++static A_STATUS wmi_dset_open_req_rx(struct wmi_t *wmip, A_UINT8 *datap, ++ int len); ++#ifdef CONFIG_HOST_DSET_SUPPORT ++static A_STATUS wmi_dset_close_rx(struct wmi_t *wmip, A_UINT8 *datap, int len); ++static A_STATUS wmi_dset_data_req_rx(struct wmi_t *wmip, A_UINT8 *datap, ++ int len); ++#endif /* CONFIG_HOST_DSET_SUPPORT */ ++ ++ ++static A_STATUS wmi_scanComplete_rx(struct wmi_t *wmip, A_UINT8 *datap, ++ int len); ++static A_STATUS wmi_errorEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len); ++static A_STATUS wmi_statsEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len); ++static A_STATUS wmi_rssiThresholdEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len); ++static A_STATUS wmi_hbChallengeResp_rx(struct wmi_t *wmip, A_UINT8 *datap, int len); ++static A_STATUS wmi_reportErrorEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len); ++static A_STATUS wmi_cac_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len); ++static A_STATUS wmi_roam_tbl_event_rx(struct wmi_t *wmip, A_UINT8 *datap, ++ int len); ++static A_STATUS wmi_roam_data_event_rx(struct wmi_t *wmip, A_UINT8 *datap, ++ int len); ++static A_STATUS wmi_get_wow_list_event_rx(struct wmi_t *wmip, A_UINT8 *datap, ++ int len); ++static A_STATUS ++wmi_get_pmkid_list_event_rx(struct wmi_t *wmip, A_UINT8 *datap, A_UINT32 len); ++ ++#ifdef CONFIG_HOST_GPIO_SUPPORT ++static A_STATUS wmi_gpio_intr_rx(struct wmi_t *wmip, A_UINT8 *datap, int len); ++static A_STATUS wmi_gpio_data_rx(struct wmi_t *wmip, A_UINT8 *datap, int len); ++static A_STATUS wmi_gpio_ack_rx(struct wmi_t *wmip, A_UINT8 *datap, int len); ++#endif /* CONFIG_HOST_GPIO_SUPPORT */ ++ ++#ifdef CONFIG_HOST_TCMD_SUPPORT ++static A_STATUS ++wmi_tcmd_test_report_rx(struct wmi_t *wmip, A_UINT8 *datap, int len); ++#endif ++ ++static A_STATUS ++wmi_txRetryErrEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len); ++ ++static A_STATUS ++wmi_snrThresholdEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len); ++ ++static A_STATUS ++wmi_lqThresholdEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len); ++ ++static A_BOOL ++wmi_is_bitrate_index_valid(struct wmi_t *wmip, A_UINT32 rateIndex); ++ ++static A_STATUS ++wmi_aplistEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len); ++ ++static A_STATUS ++wmi_dbglog_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len); ++ ++static A_STATUS wmi_keepalive_reply_rx(struct wmi_t *wmip, A_UINT8 *datap, int len); ++ ++int wps_enable; ++static const A_INT32 wmi_rateTable[] = { ++ 1000, ++ 2000, ++ 5500, ++ 11000, ++ 6000, ++ 9000, ++ 12000, ++ 18000, ++ 24000, ++ 36000, ++ 48000, ++ 54000, ++ 0}; ++ ++#define MODE_A_SUPPORT_RATE_START 4 ++#define MODE_A_SUPPORT_RATE_STOP 11 ++ ++#define MODE_GONLY_SUPPORT_RATE_START MODE_A_SUPPORT_RATE_START ++#define MODE_GONLY_SUPPORT_RATE_STOP MODE_A_SUPPORT_RATE_STOP ++ ++#define MODE_B_SUPPORT_RATE_START 0 ++#define MODE_B_SUPPORT_RATE_STOP 3 ++ ++#define MODE_G_SUPPORT_RATE_START 0 ++#define MODE_G_SUPPORT_RATE_STOP 11 ++ ++#define MAX_NUMBER_OF_SUPPORT_RATES (MODE_G_SUPPORT_RATE_STOP + 1) ++ ++/* 802.1d to AC mapping. Refer pg 57 of WMM-test-plan-v1.2 */ ++const A_UINT8 up_to_ac[]= { ++ WMM_AC_BE, ++ WMM_AC_BK, ++ WMM_AC_BK, ++ WMM_AC_BE, ++ WMM_AC_VI, ++ WMM_AC_VI, ++ WMM_AC_VO, ++ WMM_AC_VO, ++ }; ++ ++void * ++wmi_init(void *devt) ++{ ++ struct wmi_t *wmip; ++ ++ wmip = A_MALLOC(sizeof(struct wmi_t)); ++ if (wmip == NULL) { ++ return (NULL); ++ } ++ A_MEMZERO(wmip, sizeof(*wmip)); ++ A_MUTEX_INIT(&wmip->wmi_lock); ++ wmip->wmi_devt = devt; ++ wlan_node_table_init(wmip, &wmip->wmi_scan_table); ++ wmi_qos_state_init(wmip); ++ wmip->wmi_powerMode = REC_POWER; ++ wmip->wmi_phyMode = WMI_11G_MODE; ++ ++ return (wmip); ++} ++ ++void ++wmi_qos_state_init(struct wmi_t *wmip) ++{ ++ A_UINT8 i; ++ ++ if (wmip == NULL) { ++ return; ++ } ++ LOCK_WMI(wmip); ++ ++ /* Initialize QoS States */ ++ wmip->wmi_numQoSStream = 0; ++ ++ wmip->wmi_fatPipeExists = 0; ++ ++ for (i=0; i < WMM_NUM_AC; i++) { ++ wmip->wmi_streamExistsForAC[i]=0; ++ } ++ ++ /* Initialize the static Wmi stream Pri to WMM AC mappings Arrays */ ++ WMI_INIT_WMISTREAM_AC_MAP(wmip); ++ ++ UNLOCK_WMI(wmip); ++ ++ A_WMI_SET_NUMDATAENDPTS(wmip->wmi_devt, 1); ++} ++ ++void ++wmi_shutdown(struct wmi_t *wmip) ++{ ++ if (wmip != NULL) { ++ wlan_node_table_cleanup(&wmip->wmi_scan_table); ++ if (A_IS_MUTEX_VALID(&wmip->wmi_lock)) { ++ A_MUTEX_DELETE(&wmip->wmi_lock); ++ } ++ A_FREE(wmip); ++ } ++} ++ ++/* ++ * performs DIX to 802.3 encapsulation for transmit packets. ++ * uses passed in buffer. Returns buffer or NULL if failed. ++ * Assumes the entire DIX header is contigous and that there is ++ * enough room in the buffer for a 802.3 mac header and LLC+SNAP headers. ++ */ ++A_STATUS ++wmi_dix_2_dot3(struct wmi_t *wmip, void *osbuf) ++{ ++ A_UINT8 *datap; ++ A_UINT16 typeorlen; ++ ATH_MAC_HDR macHdr; ++ ATH_LLC_SNAP_HDR *llcHdr; ++ ++ A_ASSERT(osbuf != NULL); ++ ++ if (A_NETBUF_HEADROOM(osbuf) < ++ (sizeof(ATH_LLC_SNAP_HDR) + sizeof(WMI_DATA_HDR))) ++ { ++ return A_NO_MEMORY; ++ } ++ ++ datap = A_NETBUF_DATA(osbuf); ++ ++ typeorlen = *(A_UINT16 *)(datap + ATH_MAC_LEN + ATH_MAC_LEN); ++ ++ if (!IS_ETHERTYPE(A_BE2CPU16(typeorlen))) { ++ /* ++ * packet is already in 802.3 format - return success ++ */ ++ A_DPRINTF(DBG_WMI, (DBGFMT "packet already 802.3\n", DBGARG)); ++ return (A_OK); ++ } ++ ++ /* ++ * Save mac fields and length to be inserted later ++ */ ++ A_MEMCPY(macHdr.dstMac, datap, ATH_MAC_LEN); ++ A_MEMCPY(macHdr.srcMac, datap + ATH_MAC_LEN, ATH_MAC_LEN); ++ macHdr.typeOrLen = A_CPU2BE16(A_NETBUF_LEN(osbuf) - sizeof(ATH_MAC_HDR) + ++ sizeof(ATH_LLC_SNAP_HDR)); ++ ++ /* ++ * Make room for LLC+SNAP headers ++ */ ++ if (A_NETBUF_PUSH(osbuf, sizeof(ATH_LLC_SNAP_HDR)) != A_OK) { ++ return A_NO_MEMORY; ++ } ++ ++ datap = A_NETBUF_DATA(osbuf); ++ ++ A_MEMCPY(datap, &macHdr, sizeof (ATH_MAC_HDR)); ++ ++ llcHdr = (ATH_LLC_SNAP_HDR *)(datap + sizeof(ATH_MAC_HDR)); ++ llcHdr->dsap = 0xAA; ++ llcHdr->ssap = 0xAA; ++ llcHdr->cntl = 0x03; ++ llcHdr->orgCode[0] = 0x0; ++ llcHdr->orgCode[1] = 0x0; ++ llcHdr->orgCode[2] = 0x0; ++ llcHdr->etherType = typeorlen; ++ ++ return (A_OK); ++} ++ ++/* ++ * Adds a WMI data header ++ * Assumes there is enough room in the buffer to add header. ++ */ ++A_STATUS ++wmi_data_hdr_add(struct wmi_t *wmip, void *osbuf, A_UINT8 msgType) ++{ ++ WMI_DATA_HDR *dtHdr; ++ ++ A_ASSERT(osbuf != NULL); ++ ++ if (A_NETBUF_PUSH(osbuf, sizeof(WMI_DATA_HDR)) != A_OK) { ++ return A_NO_MEMORY; ++ } ++ ++ dtHdr = (WMI_DATA_HDR *)A_NETBUF_DATA(osbuf); ++ dtHdr->info = msgType; ++ dtHdr->rssi = 0; ++ ++ return (A_OK); ++} ++ ++A_UINT8 wmi_implicit_create_pstream(struct wmi_t *wmip, void *osbuf, A_UINT8 dir, A_UINT8 up) ++{ ++ A_UINT8 *datap; ++ A_UINT8 trafficClass = WMM_AC_BE, userPriority = up; ++ ATH_LLC_SNAP_HDR *llcHdr; ++ A_UINT16 ipType = IP_ETHERTYPE; ++ WMI_DATA_HDR *dtHdr; ++ WMI_CREATE_PSTREAM_CMD cmd; ++ A_BOOL streamExists = FALSE; ++ ++ A_ASSERT(osbuf != NULL); ++ ++ datap = A_NETBUF_DATA(osbuf); ++ ++ if (up == UNDEFINED_PRI) { ++ llcHdr = (ATH_LLC_SNAP_HDR *)(datap + sizeof(WMI_DATA_HDR) + ++ sizeof(ATH_MAC_HDR)); ++ ++ if (llcHdr->etherType == A_CPU2BE16(ipType)) { ++ /* Extract the endpoint info from the TOS field in the IP header */ ++ userPriority = A_WMI_IPTOS_TO_USERPRIORITY(((A_UINT8 *)llcHdr) + sizeof(ATH_LLC_SNAP_HDR)); ++ } ++ } ++ ++ if (userPriority < MAX_NUM_PRI) { ++ trafficClass = convert_userPriority_to_trafficClass(userPriority); ++ } ++ ++ dtHdr = (WMI_DATA_HDR *)datap; ++ if(dir==UPLINK_TRAFFIC) ++ dtHdr->info |= (userPriority & WMI_DATA_HDR_UP_MASK) << WMI_DATA_HDR_UP_SHIFT; /* lower 3-bits are 802.1d priority */ ++ ++ LOCK_WMI(wmip); ++ streamExists = wmip->wmi_fatPipeExists; ++ UNLOCK_WMI(wmip); ++ ++ if (!(streamExists & (1 << trafficClass))) { ++ ++ A_MEMZERO(&cmd, sizeof(cmd)); ++ cmd.trafficClass = trafficClass; ++ cmd.userPriority = userPriority; ++ cmd.inactivityInt = WMI_IMPLICIT_PSTREAM_INACTIVITY_INT; ++ /* Implicit streams are created with TSID 0xFF */ ++ cmd.tsid = WMI_IMPLICIT_PSTREAM; ++ wmi_create_pstream_cmd(wmip, &cmd); ++ } ++ ++ return trafficClass; ++} ++ ++WMI_PRI_STREAM_ID ++wmi_get_stream_id(struct wmi_t *wmip, A_UINT8 trafficClass) ++{ ++ return WMI_ACCESSCATEGORY_WMISTREAM(wmip, trafficClass); ++} ++ ++/* ++ * performs 802.3 to DIX encapsulation for received packets. ++ * Assumes the entire 802.3 header is contigous. ++ */ ++A_STATUS ++wmi_dot3_2_dix(struct wmi_t *wmip, void *osbuf) ++{ ++ A_UINT8 *datap; ++ ATH_MAC_HDR macHdr; ++ ATH_LLC_SNAP_HDR *llcHdr; ++ ++ A_ASSERT(osbuf != NULL); ++ datap = A_NETBUF_DATA(osbuf); ++ ++ A_MEMCPY(&macHdr, datap, sizeof(ATH_MAC_HDR)); ++ llcHdr = (ATH_LLC_SNAP_HDR *)(datap + sizeof(ATH_MAC_HDR)); ++ macHdr.typeOrLen = llcHdr->etherType; ++ ++ if (A_NETBUF_PULL(osbuf, sizeof(ATH_LLC_SNAP_HDR)) != A_OK) { ++ return A_NO_MEMORY; ++ } ++ ++ datap = A_NETBUF_DATA(osbuf); ++ ++ A_MEMCPY(datap, &macHdr, sizeof (ATH_MAC_HDR)); ++ ++ return (A_OK); ++} ++ ++/* ++ * Removes a WMI data header ++ */ ++A_STATUS ++wmi_data_hdr_remove(struct wmi_t *wmip, void *osbuf) ++{ ++ A_ASSERT(osbuf != NULL); ++ ++ return (A_NETBUF_PULL(osbuf, sizeof(WMI_DATA_HDR))); ++} ++ ++void ++wmi_iterate_nodes(struct wmi_t *wmip, wlan_node_iter_func *f, void *arg) ++{ ++ wlan_iterate_nodes(&wmip->wmi_scan_table, f, arg); ++} ++ ++/* ++ * WMI Extended Event received from Target. ++ */ ++A_STATUS ++wmi_control_rx_xtnd(struct wmi_t *wmip, void *osbuf) ++{ ++ WMIX_CMD_HDR *cmd; ++ A_UINT16 id; ++ A_UINT8 *datap; ++ A_UINT32 len; ++ A_STATUS status = A_OK; ++ ++ if (A_NETBUF_LEN(osbuf) < sizeof(WMIX_CMD_HDR)) { ++ A_DPRINTF(DBG_WMI, (DBGFMT "bad packet 1\n", DBGARG)); ++ wmip->wmi_stats.cmd_len_err++; ++ A_NETBUF_FREE(osbuf); ++ return A_ERROR; ++ } ++ ++ cmd = (WMIX_CMD_HDR *)A_NETBUF_DATA(osbuf); ++ id = cmd->commandId; ++ ++ if (A_NETBUF_PULL(osbuf, sizeof(WMIX_CMD_HDR)) != A_OK) { ++ A_DPRINTF(DBG_WMI, (DBGFMT "bad packet 2\n", DBGARG)); ++ wmip->wmi_stats.cmd_len_err++; ++ A_NETBUF_FREE(osbuf); ++ return A_ERROR; ++ } ++ ++ datap = A_NETBUF_DATA(osbuf); ++ len = A_NETBUF_LEN(osbuf); ++ ++ switch (id) { ++ case (WMIX_DSETOPENREQ_EVENTID): ++ status = wmi_dset_open_req_rx(wmip, datap, len); ++ break; ++#ifdef CONFIG_HOST_DSET_SUPPORT ++ case (WMIX_DSETCLOSE_EVENTID): ++ status = wmi_dset_close_rx(wmip, datap, len); ++ break; ++ case (WMIX_DSETDATAREQ_EVENTID): ++ status = wmi_dset_data_req_rx(wmip, datap, len); ++ break; ++#endif /* CONFIG_HOST_DSET_SUPPORT */ ++#ifdef CONFIG_HOST_GPIO_SUPPORT ++ case (WMIX_GPIO_INTR_EVENTID): ++ wmi_gpio_intr_rx(wmip, datap, len); ++ break; ++ case (WMIX_GPIO_DATA_EVENTID): ++ wmi_gpio_data_rx(wmip, datap, len); ++ break; ++ case (WMIX_GPIO_ACK_EVENTID): ++ wmi_gpio_ack_rx(wmip, datap, len); ++ break; ++#endif /* CONFIG_HOST_GPIO_SUPPORT */ ++ case (WMIX_HB_CHALLENGE_RESP_EVENTID): ++ wmi_hbChallengeResp_rx(wmip, datap, len); ++ break; ++ case (WMIX_DBGLOG_EVENTID): ++ wmi_dbglog_event_rx(wmip, datap, len); ++ break; ++ default: ++ A_DPRINTF(DBG_WMI|DBG_ERROR, ++ (DBGFMT "Unknown id 0x%x\n", DBGARG, id)); ++ wmip->wmi_stats.cmd_id_err++; ++ status = A_ERROR; ++ break; ++ } ++ ++ return status; ++} ++ ++/* ++ * Control Path ++ */ ++A_UINT32 cmdRecvNum; ++ ++A_STATUS ++wmi_control_rx(struct wmi_t *wmip, void *osbuf) ++{ ++ WMI_CMD_HDR *cmd; ++ A_UINT16 id; ++ A_UINT8 *datap; ++ A_UINT32 len, i, loggingReq; ++ A_STATUS status = A_OK; ++ ++ A_ASSERT(osbuf != NULL); ++ if (A_NETBUF_LEN(osbuf) < sizeof(WMI_CMD_HDR)) { ++ A_DPRINTF(DBG_WMI, (DBGFMT "bad packet 1\n", DBGARG)); ++ wmip->wmi_stats.cmd_len_err++; ++ A_NETBUF_FREE(osbuf); ++ return A_ERROR; ++ } ++ ++ cmd = (WMI_CMD_HDR *)A_NETBUF_DATA(osbuf); ++ id = cmd->commandId; ++ ++ if (A_NETBUF_PULL(osbuf, sizeof(WMI_CMD_HDR)) != A_OK) { ++ A_DPRINTF(DBG_WMI, (DBGFMT "bad packet 2\n", DBGARG)); ++ wmip->wmi_stats.cmd_len_err++; ++ A_NETBUF_FREE(osbuf); ++ return A_ERROR; ++ } ++ ++ datap = A_NETBUF_DATA(osbuf); ++ len = A_NETBUF_LEN(osbuf); ++ ++ ar6000_get_driver_cfg(wmip->wmi_devt, ++ AR6000_DRIVER_CFG_LOG_RAW_WMI_MSGS, ++ &loggingReq); ++ ++ if(loggingReq) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_WMI, ("WMI %d \n",id)); ++ AR_DEBUG_PRINTF(ATH_DEBUG_WMI, ("WMI recv, MsgNo %d : ", cmdRecvNum)); ++ for(i = 0; i < len; i++) ++ AR_DEBUG_PRINTF(ATH_DEBUG_WMI, ("%x ", datap[i])); ++ AR_DEBUG_PRINTF(ATH_DEBUG_WMI, ("\n")); ++ } ++ ++ LOCK_WMI(wmip); ++ cmdRecvNum++; ++ UNLOCK_WMI(wmip); ++ ++ switch (id) { ++ case (WMI_GET_BITRATE_CMDID): ++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_GET_BITRATE_CMDID\n", DBGARG)); ++ status = wmi_bitrate_reply_rx(wmip, datap, len); ++ break; ++ case (WMI_GET_CHANNEL_LIST_CMDID): ++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_GET_CHANNEL_LIST_CMDID\n", DBGARG)); ++ status = wmi_channelList_reply_rx(wmip, datap, len); ++ break; ++ case (WMI_GET_TX_PWR_CMDID): ++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_GET_TX_PWR_CMDID\n", DBGARG)); ++ status = wmi_txPwr_reply_rx(wmip, datap, len); ++ break; ++ case (WMI_READY_EVENTID): ++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_READY_EVENTID\n", DBGARG)); ++ status = wmi_ready_event_rx(wmip, datap, len); ++ A_WMI_SEND_EVENT_TO_APP(wmip->wmi_devt, id, datap, len); ++ A_WMI_DBGLOG_INIT_DONE(wmip->wmi_devt); ++ break; ++ case (WMI_CONNECT_EVENTID): ++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_CONNECT_EVENTID\n", DBGARG)); ++ status = wmi_connect_event_rx(wmip, datap, len); ++ A_WMI_SEND_EVENT_TO_APP(wmip->wmi_devt, id, datap, len); ++ break; ++ case (WMI_DISCONNECT_EVENTID): ++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_DISCONNECT_EVENTID\n", DBGARG)); ++ status = wmi_disconnect_event_rx(wmip, datap, len); ++ A_WMI_SEND_EVENT_TO_APP(wmip->wmi_devt, id, datap, len); ++ break; ++ case (WMI_TKIP_MICERR_EVENTID): ++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_TKIP_MICERR_EVENTID\n", DBGARG)); ++ status = wmi_tkip_micerr_event_rx(wmip, datap, len); ++ break; ++ case (WMI_BSSINFO_EVENTID): ++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_BSSINFO_EVENTID\n", DBGARG)); ++ status = wmi_bssInfo_event_rx(wmip, datap, len); ++ A_WMI_SEND_EVENT_TO_APP(wmip->wmi_devt, id, datap, len); ++ break; ++ case (WMI_REGDOMAIN_EVENTID): ++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_REGDOMAIN_EVENTID\n", DBGARG)); ++ status = wmi_regDomain_event_rx(wmip, datap, len); ++ break; ++ case (WMI_PSTREAM_TIMEOUT_EVENTID): ++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_PSTREAM_TIMEOUT_EVENTID\n", DBGARG)); ++ status = wmi_pstream_timeout_event_rx(wmip, datap, len); ++ /* pstreams are fatpipe abstractions that get implicitly created. ++ * User apps only deal with thinstreams. creation of a thinstream ++ * by the user or data traffic flow in an AC triggers implicit ++ * pstream creation. Do we need to send this event to App..? ++ * no harm in sending it. ++ */ ++ A_WMI_SEND_EVENT_TO_APP(wmip->wmi_devt, id, datap, len); ++ break; ++ case (WMI_NEIGHBOR_REPORT_EVENTID): ++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_NEIGHBOR_REPORT_EVENTID\n", DBGARG)); ++ status = wmi_neighborReport_event_rx(wmip, datap, len); ++ break; ++ case (WMI_SCAN_COMPLETE_EVENTID): ++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_SCAN_COMPLETE_EVENTID\n", DBGARG)); ++ status = wmi_scanComplete_rx(wmip, datap, len); ++ A_WMI_SEND_EVENT_TO_APP(wmip->wmi_devt, id, datap, len); ++ break; ++ case (WMI_CMDERROR_EVENTID): ++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_CMDERROR_EVENTID\n", DBGARG)); ++ status = wmi_errorEvent_rx(wmip, datap, len); ++ break; ++ case (WMI_REPORT_STATISTICS_EVENTID): ++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_REPORT_STATISTICS_EVENTID\n", DBGARG)); ++ status = wmi_statsEvent_rx(wmip, datap, len); ++ break; ++ case (WMI_RSSI_THRESHOLD_EVENTID): ++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_RSSI_THRESHOLD_EVENTID\n", DBGARG)); ++ status = wmi_rssiThresholdEvent_rx(wmip, datap, len); ++ break; ++ case (WMI_ERROR_REPORT_EVENTID): ++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_ERROR_REPORT_EVENTID\n", DBGARG)); ++ status = wmi_reportErrorEvent_rx(wmip, datap, len); ++ A_WMI_SEND_EVENT_TO_APP(wmip->wmi_devt, id, datap, len); ++ break; ++ case (WMI_OPT_RX_FRAME_EVENTID): ++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_OPT_RX_FRAME_EVENTID\n", DBGARG)); ++ status = wmi_opt_frame_event_rx(wmip, datap, len); ++ break; ++ case (WMI_REPORT_ROAM_TBL_EVENTID): ++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_REPORT_ROAM_TBL_EVENTID\n", DBGARG)); ++ status = wmi_roam_tbl_event_rx(wmip, datap, len); ++ break; ++ case (WMI_EXTENSION_EVENTID): ++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_EXTENSION_EVENTID\n", DBGARG)); ++ status = wmi_control_rx_xtnd(wmip, osbuf); ++ break; ++ case (WMI_CAC_EVENTID): ++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_CAC_EVENTID\n", DBGARG)); ++ status = wmi_cac_event_rx(wmip, datap, len); ++ break; ++ case (WMI_REPORT_ROAM_DATA_EVENTID): ++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_REPORT_ROAM_DATA_EVENTID\n", DBGARG)); ++ status = wmi_roam_data_event_rx(wmip, datap, len); ++ break; ++#ifdef CONFIG_HOST_TCMD_SUPPORT ++ case (WMI_TEST_EVENTID): ++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_TEST_EVENTID\n", DBGARG)); ++ status = wmi_tcmd_test_report_rx(wmip, datap, len); ++ break; ++#endif ++ case (WMI_GET_FIXRATES_CMDID): ++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_GET_FIXRATES_CMDID\n", DBGARG)); ++ status = wmi_ratemask_reply_rx(wmip, datap, len); ++ break; ++ case (WMI_TX_RETRY_ERR_EVENTID): ++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_TX_RETRY_ERR_EVENTID\n", DBGARG)); ++ status = wmi_txRetryErrEvent_rx(wmip, datap, len); ++ A_WMI_SEND_EVENT_TO_APP(wmip->wmi_devt, id, datap, len); ++ break; ++ case (WMI_SNR_THRESHOLD_EVENTID): ++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_SNR_THRESHOLD_EVENTID\n", DBGARG)); ++ status = wmi_snrThresholdEvent_rx(wmip, datap, len); ++ A_WMI_SEND_EVENT_TO_APP(wmip->wmi_devt, id, datap, len); ++ break; ++ case (WMI_LQ_THRESHOLD_EVENTID): ++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_LQ_THRESHOLD_EVENTID\n", DBGARG)); ++ status = wmi_lqThresholdEvent_rx(wmip, datap, len); ++ A_WMI_SEND_EVENT_TO_APP(wmip->wmi_devt, id, datap, len); ++ break; ++ case (WMI_APLIST_EVENTID): ++ AR_DEBUG_PRINTF(ATH_DEBUG_WMI, ("Received APLIST Event\n")); ++ status = wmi_aplistEvent_rx(wmip, datap, len); ++ break; ++ case (WMI_GET_KEEPALIVE_CMDID): ++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_GET_KEEPALIVE_CMDID\n", DBGARG)); ++ status = wmi_keepalive_reply_rx(wmip, datap, len); ++ break; ++ case (WMI_GET_WOW_LIST_EVENTID): ++ status = wmi_get_wow_list_event_rx(wmip, datap, len); ++ break; ++ case (WMI_GET_PMKID_LIST_EVENTID): ++ A_DPRINTF(DBG_WMI, (DBGFMT "WMI_GET_PMKID_LIST Event\n", DBGARG)); ++ status = wmi_get_pmkid_list_event_rx(wmip, datap, len); ++ break; ++ default: ++ A_DPRINTF(DBG_WMI|DBG_ERROR, ++ (DBGFMT "Unknown id 0x%x\n", DBGARG, id)); ++ wmip->wmi_stats.cmd_id_err++; ++ status = A_ERROR; ++ break; ++ } ++ ++ A_NETBUF_FREE(osbuf); ++ ++ return status; ++} ++ ++static A_STATUS ++wmi_ready_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len) ++{ ++ WMI_READY_EVENT *ev = (WMI_READY_EVENT *)datap; ++ ++ if (len < sizeof(WMI_READY_EVENT)) { ++ return A_EINVAL; ++ } ++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG)); ++ wmip->wmi_ready = TRUE; ++ A_WMI_READY_EVENT(wmip->wmi_devt, ev->macaddr, ev->phyCapability); ++ ++ return A_OK; ++} ++ ++static A_STATUS ++wmi_connect_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len) ++{ ++ WMI_CONNECT_EVENT *ev; ++ ++ if (len < sizeof(WMI_CONNECT_EVENT)) { ++ return A_EINVAL; ++ } ++ ev = (WMI_CONNECT_EVENT *)datap; ++ A_DPRINTF(DBG_WMI, ++ (DBGFMT "freq %d bssid %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x\n", ++ DBGARG, ev->channel, ++ ev->bssid[0], ev->bssid[1], ev->bssid[2], ++ ev->bssid[3], ev->bssid[4], ev->bssid[5])); ++ ++ A_MEMCPY(wmip->wmi_bssid, ev->bssid, ATH_MAC_LEN); ++ ++ A_WMI_CONNECT_EVENT(wmip->wmi_devt, ev->channel, ev->bssid, ++ ev->listenInterval, ev->beaconInterval, ++ ev->networkType, ev->beaconIeLen, ++ ev->assocReqLen, ev->assocRespLen, ++ ev->assocInfo); ++ ++ return A_OK; ++} ++ ++static A_STATUS ++wmi_regDomain_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len) ++{ ++ WMI_REG_DOMAIN_EVENT *ev; ++ ++ if (len < sizeof(*ev)) { ++ return A_EINVAL; ++ } ++ ev = (WMI_REG_DOMAIN_EVENT *)datap; ++ ++ A_WMI_REGDOMAIN_EVENT(wmip->wmi_devt, ev->regDomain); ++ ++ return A_OK; ++} ++ ++static A_STATUS ++wmi_neighborReport_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len) ++{ ++ WMI_NEIGHBOR_REPORT_EVENT *ev; ++ int numAps; ++ ++ if (len < sizeof(*ev)) { ++ return A_EINVAL; ++ } ++ ev = (WMI_NEIGHBOR_REPORT_EVENT *)datap; ++ numAps = ev->numberOfAps; ++ ++ if (len < (int)(sizeof(*ev) + ((numAps - 1) * sizeof(WMI_NEIGHBOR_INFO)))) { ++ return A_EINVAL; ++ } ++ ++ A_WMI_NEIGHBORREPORT_EVENT(wmip->wmi_devt, numAps, ev->neighbor); ++ ++ return A_OK; ++} ++ ++static A_STATUS ++wmi_disconnect_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len) ++{ ++ WMI_DISCONNECT_EVENT *ev; ++ ++ if (len < sizeof(WMI_DISCONNECT_EVENT)) { ++ return A_EINVAL; ++ } ++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG)); ++ ++ ev = (WMI_DISCONNECT_EVENT *)datap; ++ ++ A_MEMZERO(wmip->wmi_bssid, sizeof(wmip->wmi_bssid)); ++ ++ A_WMI_DISCONNECT_EVENT(wmip->wmi_devt, ev->disconnectReason, ev->bssid, ++ ev->assocRespLen, ev->assocInfo, ev->protocolReasonStatus); ++ ++ return A_OK; ++} ++ ++static A_STATUS ++wmi_tkip_micerr_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len) ++{ ++ WMI_TKIP_MICERR_EVENT *ev; ++ ++ if (len < sizeof(*ev)) { ++ return A_EINVAL; ++ } ++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG)); ++ ++ ev = (WMI_TKIP_MICERR_EVENT *)datap; ++ A_WMI_TKIP_MICERR_EVENT(wmip->wmi_devt, ev->keyid, ev->ismcast); ++ ++ return A_OK; ++} ++ ++static A_STATUS ++wmi_bssInfo_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len) ++{ ++ bss_t *bss; ++ WMI_BSS_INFO_HDR *bih; ++ A_UINT8 *buf; ++ A_UINT32 nodeCachingAllowed; ++ ++ if (len <= sizeof(WMI_BSS_INFO_HDR)) { ++ return A_EINVAL; ++ } ++ ++ A_WMI_BSSINFO_EVENT_RX(wmip->wmi_devt, datap, len); ++ /* What is driver config for wlan node caching? */ ++ if(ar6000_get_driver_cfg(wmip->wmi_devt, ++ AR6000_DRIVER_CFG_GET_WLANNODECACHING, ++ &nodeCachingAllowed) != A_OK) { ++ return A_EINVAL; ++ } ++ ++ if(!nodeCachingAllowed) { ++ return A_OK; ++ } ++ ++ ++ bih = (WMI_BSS_INFO_HDR *)datap; ++ buf = datap + sizeof(WMI_BSS_INFO_HDR); ++ len -= sizeof(WMI_BSS_INFO_HDR); ++ ++ A_DPRINTF(DBG_WMI2, (DBGFMT "bssInfo event - ch %u, rssi %02x, " ++ "bssid \"%02x:%02x:%02x:%02x:%02x:%02x\"\n", DBGARG, ++ bih->channel, (unsigned char) bih->rssi, bih->bssid[0], ++ bih->bssid[1], bih->bssid[2], bih->bssid[3], bih->bssid[4], ++ bih->bssid[5])); ++ ++ if(wps_enable && (bih->frameType == PROBERESP_FTYPE) ) { ++ printk("%s() A_OK 2\n", __FUNCTION__); ++ return A_OK; ++ } ++ ++ bss = wlan_find_node(&wmip->wmi_scan_table, bih->bssid); ++ if (bss != NULL) { ++ /* ++ * Free up the node. Not the most efficient process given ++ * we are about to allocate a new node but it is simple and should be ++ * adequate. ++ */ ++ wlan_node_reclaim(&wmip->wmi_scan_table, bss); ++ } ++ ++ bss = wlan_node_alloc(&wmip->wmi_scan_table, len); ++ if (bss == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ bss->ni_snr = bih->snr; ++ bss->ni_rssi = bih->rssi; ++ A_ASSERT(bss->ni_buf != NULL); ++ A_MEMCPY(bss->ni_buf, buf, len); ++ ++ if (wlan_parse_beacon(bss->ni_buf, len, &bss->ni_cie) != A_OK) { ++ wlan_node_free(bss); ++ return A_EINVAL; ++ } ++ ++ /* ++ * Update the frequency in ie_chan, overwriting of channel number ++ * which is done in wlan_parse_beacon ++ */ ++ bss->ni_cie.ie_chan = bih->channel; ++ wlan_setup_node(&wmip->wmi_scan_table, bss, bih->bssid); ++ ++ return A_OK; ++} ++ ++static A_STATUS ++wmi_opt_frame_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len) ++{ ++ bss_t *bss; ++ WMI_OPT_RX_INFO_HDR *bih; ++ A_UINT8 *buf; ++ ++ if (len <= sizeof(WMI_OPT_RX_INFO_HDR)) { ++ return A_EINVAL; ++ } ++ ++ bih = (WMI_OPT_RX_INFO_HDR *)datap; ++ buf = datap + sizeof(WMI_OPT_RX_INFO_HDR); ++ len -= sizeof(WMI_OPT_RX_INFO_HDR); ++ ++ A_DPRINTF(DBG_WMI2, (DBGFMT "opt frame event %2.2x:%2.2x\n", DBGARG, ++ bih->bssid[4], bih->bssid[5])); ++ ++ bss = wlan_find_node(&wmip->wmi_scan_table, bih->bssid); ++ if (bss != NULL) { ++ /* ++ * Free up the node. Not the most efficient process given ++ * we are about to allocate a new node but it is simple and should be ++ * adequate. ++ */ ++ wlan_node_reclaim(&wmip->wmi_scan_table, bss); ++ } ++ ++ bss = wlan_node_alloc(&wmip->wmi_scan_table, len); ++ if (bss == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ bss->ni_snr = bih->snr; ++ bss->ni_cie.ie_chan = bih->channel; ++ A_ASSERT(bss->ni_buf != NULL); ++ A_MEMCPY(bss->ni_buf, buf, len); ++ wlan_setup_node(&wmip->wmi_scan_table, bss, bih->bssid); ++ ++ return A_OK; ++} ++ ++ /* This event indicates inactivity timeout of a fatpipe(pstream) ++ * at the target ++ */ ++static A_STATUS ++wmi_pstream_timeout_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len) ++{ ++ WMI_PSTREAM_TIMEOUT_EVENT *ev; ++ ++ if (len < sizeof(WMI_PSTREAM_TIMEOUT_EVENT)) { ++ return A_EINVAL; ++ } ++ ++ A_DPRINTF(DBG_WMI, (DBGFMT "wmi_pstream_timeout_event_rx\n", DBGARG)); ++ ++ ev = (WMI_PSTREAM_TIMEOUT_EVENT *)datap; ++ ++ /* When the pstream (fat pipe == AC) timesout, it means there were no ++ * thinStreams within this pstream & it got implicitly created due to ++ * data flow on this AC. We start the inactivity timer only for ++ * implicitly created pstream. Just reset the host state. ++ */ ++ /* Set the activeTsids for this AC to 0 */ ++ LOCK_WMI(wmip); ++ wmip->wmi_streamExistsForAC[ev->trafficClass]=0; ++ wmip->wmi_fatPipeExists &= ~(1 << ev->trafficClass); ++ UNLOCK_WMI(wmip); ++ ++ /*Indicate inactivity to driver layer for this fatpipe (pstream)*/ ++ A_WMI_STREAM_TX_INACTIVE(wmip->wmi_devt, ev->trafficClass); ++ ++ return A_OK; ++} ++ ++static A_STATUS ++wmi_bitrate_reply_rx(struct wmi_t *wmip, A_UINT8 *datap, int len) ++{ ++ WMI_BIT_RATE_CMD *reply; ++ A_INT32 rate; ++ ++ if (len < sizeof(WMI_BIT_RATE_CMD)) { ++ return A_EINVAL; ++ } ++ reply = (WMI_BIT_RATE_CMD *)datap; ++ A_DPRINTF(DBG_WMI, ++ (DBGFMT "Enter - rateindex %d\n", DBGARG, reply->rateIndex)); ++ ++ if (reply->rateIndex == RATE_AUTO) { ++ rate = RATE_AUTO; ++ } else { ++ rate = wmi_rateTable[(A_UINT32) reply->rateIndex]; ++ } ++ ++ A_WMI_BITRATE_RX(wmip->wmi_devt, rate); ++ ++ return A_OK; ++} ++ ++static A_STATUS ++wmi_ratemask_reply_rx(struct wmi_t *wmip, A_UINT8 *datap, int len) ++{ ++ WMI_FIX_RATES_CMD *reply; ++ ++ if (len < sizeof(WMI_BIT_RATE_CMD)) { ++ return A_EINVAL; ++ } ++ reply = (WMI_FIX_RATES_CMD *)datap; ++ A_DPRINTF(DBG_WMI, ++ (DBGFMT "Enter - fixed rate mask %x\n", DBGARG, reply->fixRateMask)); ++ ++ A_WMI_RATEMASK_RX(wmip->wmi_devt, reply->fixRateMask); ++ ++ return A_OK; ++} ++ ++static A_STATUS ++wmi_channelList_reply_rx(struct wmi_t *wmip, A_UINT8 *datap, int len) ++{ ++ WMI_CHANNEL_LIST_REPLY *reply; ++ ++ if (len < sizeof(WMI_CHANNEL_LIST_REPLY)) { ++ return A_EINVAL; ++ } ++ reply = (WMI_CHANNEL_LIST_REPLY *)datap; ++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG)); ++ ++ A_WMI_CHANNELLIST_RX(wmip->wmi_devt, reply->numChannels, ++ reply->channelList); ++ ++ return A_OK; ++} ++ ++static A_STATUS ++wmi_txPwr_reply_rx(struct wmi_t *wmip, A_UINT8 *datap, int len) ++{ ++ WMI_TX_PWR_REPLY *reply; ++ ++ if (len < sizeof(*reply)) { ++ return A_EINVAL; ++ } ++ reply = (WMI_TX_PWR_REPLY *)datap; ++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG)); ++ ++ A_WMI_TXPWR_RX(wmip->wmi_devt, reply->dbM); ++ ++ return A_OK; ++} ++static A_STATUS ++wmi_keepalive_reply_rx(struct wmi_t *wmip, A_UINT8 *datap, int len) ++{ ++ WMI_GET_KEEPALIVE_CMD *reply; ++ ++ if (len < sizeof(*reply)) { ++ return A_EINVAL; ++ } ++ reply = (WMI_GET_KEEPALIVE_CMD *)datap; ++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG)); ++ ++ A_WMI_KEEPALIVE_RX(wmip->wmi_devt, reply->configured); ++ ++ return A_OK; ++} ++ ++ ++static A_STATUS ++wmi_dset_open_req_rx(struct wmi_t *wmip, A_UINT8 *datap, int len) ++{ ++ WMIX_DSETOPENREQ_EVENT *dsetopenreq; ++ ++ if (len < sizeof(WMIX_DSETOPENREQ_EVENT)) { ++ return A_EINVAL; ++ } ++ dsetopenreq = (WMIX_DSETOPENREQ_EVENT *)datap; ++ A_DPRINTF(DBG_WMI, ++ (DBGFMT "Enter - dset_id=0x%x\n", DBGARG, dsetopenreq->dset_id)); ++ A_WMI_DSET_OPEN_REQ(wmip->wmi_devt, ++ dsetopenreq->dset_id, ++ dsetopenreq->targ_dset_handle, ++ dsetopenreq->targ_reply_fn, ++ dsetopenreq->targ_reply_arg); ++ ++ return A_OK; ++} ++ ++#ifdef CONFIG_HOST_DSET_SUPPORT ++static A_STATUS ++wmi_dset_close_rx(struct wmi_t *wmip, A_UINT8 *datap, int len) ++{ ++ WMIX_DSETCLOSE_EVENT *dsetclose; ++ ++ if (len < sizeof(WMIX_DSETCLOSE_EVENT)) { ++ return A_EINVAL; ++ } ++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG)); ++ ++ dsetclose = (WMIX_DSETCLOSE_EVENT *)datap; ++ A_WMI_DSET_CLOSE(wmip->wmi_devt, dsetclose->access_cookie); ++ ++ return A_OK; ++} ++ ++static A_STATUS ++wmi_dset_data_req_rx(struct wmi_t *wmip, A_UINT8 *datap, int len) ++{ ++ WMIX_DSETDATAREQ_EVENT *dsetdatareq; ++ ++ if (len < sizeof(WMIX_DSETDATAREQ_EVENT)) { ++ return A_EINVAL; ++ } ++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG)); ++ ++ dsetdatareq = (WMIX_DSETDATAREQ_EVENT *)datap; ++ A_WMI_DSET_DATA_REQ(wmip->wmi_devt, ++ dsetdatareq->access_cookie, ++ dsetdatareq->offset, ++ dsetdatareq->length, ++ dsetdatareq->targ_buf, ++ dsetdatareq->targ_reply_fn, ++ dsetdatareq->targ_reply_arg); ++ ++ return A_OK; ++} ++#endif /* CONFIG_HOST_DSET_SUPPORT */ ++ ++static A_STATUS ++wmi_scanComplete_rx(struct wmi_t *wmip, A_UINT8 *datap, int len) ++{ ++ WMI_SCAN_COMPLETE_EVENT *ev; ++ ++ ev = (WMI_SCAN_COMPLETE_EVENT *)datap; ++ A_WMI_SCANCOMPLETE_EVENT(wmip->wmi_devt, ev->status); ++ ++ return A_OK; ++} ++ ++/* ++ * Target is reporting a programming error. This is for ++ * developer aid only. Target only checks a few common violations ++ * and it is responsibility of host to do all error checking. ++ * Behavior of target after wmi error event is undefined. ++ * A reset is recommended. ++ */ ++static A_STATUS ++wmi_errorEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len) ++{ ++ WMI_CMD_ERROR_EVENT *ev; ++ ++ ev = (WMI_CMD_ERROR_EVENT *)datap; ++ AR_DEBUG_PRINTF(ATH_DEBUG_WMI, ("Programming Error: cmd=%d ", ev->commandId)); ++ switch (ev->errorCode) { ++ case (INVALID_PARAM): ++ AR_DEBUG_PRINTF(ATH_DEBUG_WMI, ("Illegal Parameter\n")); ++ break; ++ case (ILLEGAL_STATE): ++ AR_DEBUG_PRINTF(ATH_DEBUG_WMI, ("Illegal State\n")); ++ break; ++ case (INTERNAL_ERROR): ++ AR_DEBUG_PRINTF(ATH_DEBUG_WMI, ("Internal Error\n")); ++ break; ++ } ++ ++ return A_OK; ++} ++ ++ ++static A_STATUS ++wmi_statsEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len) ++{ ++ WMI_TARGET_STATS *reply; ++ ++ if (len < sizeof(*reply)) { ++ return A_EINVAL; ++ } ++ reply = (WMI_TARGET_STATS *)datap; ++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG)); ++ ++ A_WMI_TARGETSTATS_EVENT(wmip->wmi_devt, reply); ++ ++ return A_OK; ++} ++ ++static A_STATUS ++wmi_rssiThresholdEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len) ++{ ++ WMI_RSSI_THRESHOLD_EVENT *reply; ++ ++ if (len < sizeof(*reply)) { ++ return A_EINVAL; ++ } ++ reply = (WMI_RSSI_THRESHOLD_EVENT *)datap; ++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG)); ++ ++ A_WMI_RSSI_THRESHOLD_EVENT(wmip->wmi_devt, reply->range, reply->rssi); ++ ++ return A_OK; ++} ++ ++ ++static A_STATUS ++wmi_reportErrorEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len) ++{ ++ WMI_TARGET_ERROR_REPORT_EVENT *reply; ++ ++ if (len < sizeof(*reply)) { ++ return A_EINVAL; ++ } ++ reply = (WMI_TARGET_ERROR_REPORT_EVENT *)datap; ++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG)); ++ ++ A_WMI_REPORT_ERROR_EVENT(wmip->wmi_devt, reply->errorVal); ++ ++ return A_OK; ++} ++ ++static A_STATUS ++wmi_cac_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len) ++{ ++ WMI_CAC_EVENT *reply; ++ ++ if (len < sizeof(*reply)) { ++ return A_EINVAL; ++ } ++ reply = (WMI_CAC_EVENT *)datap; ++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG)); ++ ++ A_WMI_CAC_EVENT(wmip->wmi_devt, reply->ac, ++ reply->cac_indication, reply->statusCode, ++ reply->tspecSuggestion); ++ ++ return A_OK; ++} ++ ++static A_STATUS ++wmi_hbChallengeResp_rx(struct wmi_t *wmip, A_UINT8 *datap, int len) ++{ ++ WMIX_HB_CHALLENGE_RESP_EVENT *reply; ++ ++ if (len < sizeof(*reply)) { ++ return A_EINVAL; ++ } ++ reply = (WMIX_HB_CHALLENGE_RESP_EVENT *)datap; ++ A_DPRINTF(DBG_WMI, (DBGFMT "wmi: challenge response event\n", DBGARG)); ++ ++ A_WMI_HBCHALLENGERESP_EVENT(wmip->wmi_devt, reply->cookie, reply->source); ++ ++ return A_OK; ++} ++ ++static A_STATUS ++wmi_roam_tbl_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len) ++{ ++ WMI_TARGET_ROAM_TBL *reply; ++ ++ if (len < sizeof(*reply)) { ++ return A_EINVAL; ++ } ++ reply = (WMI_TARGET_ROAM_TBL *)datap; ++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG)); ++ ++ A_WMI_ROAM_TABLE_EVENT(wmip->wmi_devt, reply); ++ ++ return A_OK; ++} ++ ++static A_STATUS ++wmi_roam_data_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len) ++{ ++ WMI_TARGET_ROAM_DATA *reply; ++ ++ if (len < sizeof(*reply)) { ++ return A_EINVAL; ++ } ++ reply = (WMI_TARGET_ROAM_DATA *)datap; ++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG)); ++ ++ A_WMI_ROAM_DATA_EVENT(wmip->wmi_devt, reply); ++ ++ return A_OK; ++} ++ ++static A_STATUS ++wmi_txRetryErrEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len) ++{ ++ WMI_TX_RETRY_ERR_EVENT *reply; ++ ++ if (len < sizeof(*reply)) { ++ return A_EINVAL; ++ } ++ reply = (WMI_TX_RETRY_ERR_EVENT *)datap; ++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG)); ++ ++ A_WMI_TX_RETRY_ERR_EVENT(wmip->wmi_devt); ++ ++ return A_OK; ++} ++ ++static A_STATUS ++wmi_snrThresholdEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len) ++{ ++ WMI_SNR_THRESHOLD_EVENT *reply; ++ ++ if (len < sizeof(*reply)) { ++ return A_EINVAL; ++ } ++ reply = (WMI_SNR_THRESHOLD_EVENT *)datap; ++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG)); ++ ++ A_WMI_SNR_THRESHOLD_EVENT_RX(wmip->wmi_devt, reply->range, reply->snr); ++ ++ return A_OK; ++} ++ ++static A_STATUS ++wmi_lqThresholdEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len) ++{ ++ WMI_LQ_THRESHOLD_EVENT *reply; ++ ++ if (len < sizeof(*reply)) { ++ return A_EINVAL; ++ } ++ reply = (WMI_LQ_THRESHOLD_EVENT *)datap; ++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG)); ++ ++ A_WMI_LQ_THRESHOLD_EVENT_RX(wmip->wmi_devt, reply->range, reply->lq); ++ ++ return A_OK; ++} ++ ++static A_STATUS ++wmi_aplistEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len) ++{ ++ A_UINT16 ap_info_entry_size; ++ WMI_APLIST_EVENT *ev = (WMI_APLIST_EVENT *)datap; ++ WMI_AP_INFO_V1 *ap_info_v1; ++ A_UINT8 i; ++ ++ if (len < sizeof(WMI_APLIST_EVENT)) { ++ return A_EINVAL; ++ } ++ ++ if (ev->apListVer == APLIST_VER1) { ++ ap_info_entry_size = sizeof(WMI_AP_INFO_V1); ++ ap_info_v1 = (WMI_AP_INFO_V1 *)ev->apList; ++ } else { ++ return A_EINVAL; ++ } ++ ++ AR_DEBUG_PRINTF(ATH_DEBUG_WMI, ("Number of APs in APLIST Event is %d\n", ev->numAP)); ++ if (len < (int)(sizeof(WMI_APLIST_EVENT) + ++ (ev->numAP - 1) * ap_info_entry_size)) ++ { ++ return A_EINVAL; ++ } ++ ++ /* ++ * AP List Ver1 Contents ++ */ ++ for (i = 0; i < ev->numAP; i++) { ++ AR_DEBUG_PRINTF(ATH_DEBUG_WMI, ("AP#%d BSSID %2.2x %2.2x %2.2x %2.2x %2.2x %2.2x "\ ++ "Channel %d\n", i, ++ ap_info_v1->bssid[0], ap_info_v1->bssid[1], ++ ap_info_v1->bssid[2], ap_info_v1->bssid[3], ++ ap_info_v1->bssid[4], ap_info_v1->bssid[5], ++ ap_info_v1->channel)); ++ ap_info_v1++; ++ } ++ return A_OK; ++} ++ ++static A_STATUS ++wmi_dbglog_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len) ++{ ++ A_UINT32 dropped; ++ ++ dropped = *((A_UINT32 *)datap); ++ datap += sizeof(dropped); ++ len -= sizeof(dropped); ++ A_WMI_DBGLOG_EVENT(wmip->wmi_devt, dropped, datap, len); ++ return A_OK; ++} ++ ++#ifdef CONFIG_HOST_GPIO_SUPPORT ++static A_STATUS ++wmi_gpio_intr_rx(struct wmi_t *wmip, A_UINT8 *datap, int len) ++{ ++ WMIX_GPIO_INTR_EVENT *gpio_intr = (WMIX_GPIO_INTR_EVENT *)datap; ++ ++ A_DPRINTF(DBG_WMI, ++ (DBGFMT "Enter - intrmask=0x%x input=0x%x.\n", DBGARG, ++ gpio_intr->intr_mask, gpio_intr->input_values)); ++ ++ A_WMI_GPIO_INTR_RX(gpio_intr->intr_mask, gpio_intr->input_values); ++ ++ return A_OK; ++} ++ ++static A_STATUS ++wmi_gpio_data_rx(struct wmi_t *wmip, A_UINT8 *datap, int len) ++{ ++ WMIX_GPIO_DATA_EVENT *gpio_data = (WMIX_GPIO_DATA_EVENT *)datap; ++ ++ A_DPRINTF(DBG_WMI, ++ (DBGFMT "Enter - reg=%d value=0x%x\n", DBGARG, ++ gpio_data->reg_id, gpio_data->value)); ++ ++ A_WMI_GPIO_DATA_RX(gpio_data->reg_id, gpio_data->value); ++ ++ return A_OK; ++} ++ ++static A_STATUS ++wmi_gpio_ack_rx(struct wmi_t *wmip, A_UINT8 *datap, int len) ++{ ++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG)); ++ ++ A_WMI_GPIO_ACK_RX(); ++ ++ return A_OK; ++} ++#endif /* CONFIG_HOST_GPIO_SUPPORT */ ++ ++/* ++ * Called to send a wmi command. Command specific data is already built ++ * on osbuf and current osbuf->data points to it. ++ */ ++A_STATUS ++wmi_cmd_send(struct wmi_t *wmip, void *osbuf, WMI_COMMAND_ID cmdId, ++ WMI_SYNC_FLAG syncflag) ++{ ++#define IS_LONG_CMD(cmdId) ((cmdId == WMI_OPT_TX_FRAME_CMDID) || (cmdId == WMI_ADD_WOW_PATTERN_CMDID)) ++ WMI_CMD_HDR *cHdr; ++ WMI_PRI_STREAM_ID streamID = WMI_CONTROL_PRI; ++ ++ A_ASSERT(osbuf != NULL); ++ ++ if (syncflag >= END_WMIFLAG) { ++ return A_EINVAL; ++ } ++ ++ if ((syncflag == SYNC_BEFORE_WMIFLAG) || (syncflag == SYNC_BOTH_WMIFLAG)) { ++ /* ++ * We want to make sure all data currently queued is transmitted before ++ * the cmd execution. Establish a new sync point. ++ */ ++ wmi_sync_point(wmip); ++ } ++ ++ if (A_NETBUF_PUSH(osbuf, sizeof(WMI_CMD_HDR)) != A_OK) { ++ return A_NO_MEMORY; ++ } ++ ++ cHdr = (WMI_CMD_HDR *)A_NETBUF_DATA(osbuf); ++ cHdr->commandId = cmdId; ++ ++ /* ++ * Send cmd, some via control pipe, others via data pipe ++ */ ++ if (IS_LONG_CMD(cmdId)) { ++ wmi_data_hdr_add(wmip, osbuf, CNTL_MSGTYPE); ++ // TODO ... these can now go through the control endpoint via HTC 2.0 ++ streamID = WMI_BEST_EFFORT_PRI; ++ } ++ A_WMI_CONTROL_TX(wmip->wmi_devt, osbuf, streamID); ++ ++ if ((syncflag == SYNC_AFTER_WMIFLAG) || (syncflag == SYNC_BOTH_WMIFLAG)) { ++ /* ++ * We want to make sure all new data queued waits for the command to ++ * execute. Establish a new sync point. ++ */ ++ wmi_sync_point(wmip); ++ } ++ return (A_OK); ++#undef IS_LONG_CMD ++} ++ ++A_STATUS ++wmi_cmd_send_xtnd(struct wmi_t *wmip, void *osbuf, WMI_COMMAND_ID cmdId, ++ WMI_SYNC_FLAG syncflag) ++{ ++ WMIX_CMD_HDR *cHdr; ++ ++ if (A_NETBUF_PUSH(osbuf, sizeof(WMIX_CMD_HDR)) != A_OK) { ++ return A_NO_MEMORY; ++ } ++ ++ cHdr = (WMIX_CMD_HDR *)A_NETBUF_DATA(osbuf); ++ cHdr->commandId = cmdId; ++ ++ return wmi_cmd_send(wmip, osbuf, WMI_EXTENSION_CMDID, syncflag); ++} ++ ++A_STATUS ++wmi_connect_cmd(struct wmi_t *wmip, NETWORK_TYPE netType, ++ DOT11_AUTH_MODE dot11AuthMode, AUTH_MODE authMode, ++ CRYPTO_TYPE pairwiseCrypto, A_UINT8 pairwiseCryptoLen, ++ CRYPTO_TYPE groupCrypto,A_UINT8 groupCryptoLen, ++ int ssidLength, A_UCHAR *ssid, ++ A_UINT8 *bssid, A_UINT16 channel, A_UINT32 ctrl_flags) ++{ ++ void *osbuf; ++ WMI_CONNECT_CMD *cc; ++ ++ if ((pairwiseCrypto == NONE_CRYPT) && (groupCrypto != NONE_CRYPT)) { ++ return A_EINVAL; ++ } ++ if ((pairwiseCrypto != NONE_CRYPT) && (groupCrypto == NONE_CRYPT)) { ++ return A_EINVAL; ++ } ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(WMI_CONNECT_CMD)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(WMI_CONNECT_CMD)); ++ ++ cc = (WMI_CONNECT_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cc, sizeof(*cc)); ++ ++ A_MEMCPY(cc->ssid, ssid, ssidLength); ++ cc->ssidLength = ssidLength; ++ cc->networkType = netType; ++ cc->dot11AuthMode = dot11AuthMode; ++ cc->authMode = authMode; ++ cc->pairwiseCryptoType = pairwiseCrypto; ++ cc->pairwiseCryptoLen = pairwiseCryptoLen; ++ cc->groupCryptoType = groupCrypto; ++ cc->groupCryptoLen = groupCryptoLen; ++ cc->channel = channel; ++ cc->ctrl_flags = ctrl_flags; ++ ++ if (bssid != NULL) { ++ A_MEMCPY(cc->bssid, bssid, ATH_MAC_LEN); ++ } ++ if (wmi_set_keepalive_cmd(wmip, wmip->wmi_keepaliveInterval) != A_OK) { ++ return(A_ERROR); ++ } ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_CONNECT_CMDID, NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_reconnect_cmd(struct wmi_t *wmip, A_UINT8 *bssid, A_UINT16 channel) ++{ ++ void *osbuf; ++ WMI_RECONNECT_CMD *cc; ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(WMI_RECONNECT_CMD)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(WMI_RECONNECT_CMD)); ++ ++ cc = (WMI_RECONNECT_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cc, sizeof(*cc)); ++ ++ cc->channel = channel; ++ ++ if (bssid != NULL) { ++ A_MEMCPY(cc->bssid, bssid, ATH_MAC_LEN); ++ } ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_RECONNECT_CMDID, NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_disconnect_cmd(struct wmi_t *wmip) ++{ ++ void *osbuf; ++ A_STATUS status; ++ ++ osbuf = A_NETBUF_ALLOC(0); /* no payload */ ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ /* Bug fix for 24817(elevator bug) - the disconnect command does not ++ need to do a SYNC before.*/ ++ status = (wmi_cmd_send(wmip, osbuf, WMI_DISCONNECT_CMDID, ++ NO_SYNC_WMIFLAG)); ++ ++ return status; ++} ++ ++A_STATUS ++wmi_startscan_cmd(struct wmi_t *wmip, WMI_SCAN_TYPE scanType, ++ A_BOOL forceFgScan, A_BOOL isLegacy, ++ A_UINT32 homeDwellTime, A_UINT32 forceScanInterval) ++{ ++ void *osbuf; ++ WMI_START_SCAN_CMD *sc; ++ ++ if ((scanType != WMI_LONG_SCAN) && (scanType != WMI_SHORT_SCAN)) { ++ return A_EINVAL; ++ } ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*sc)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*sc)); ++ ++ sc = (WMI_START_SCAN_CMD *)(A_NETBUF_DATA(osbuf)); ++ sc->scanType = scanType; ++ sc->forceFgScan = forceFgScan; ++ sc->isLegacy = isLegacy; ++ sc->homeDwellTime = homeDwellTime; ++ sc->forceScanInterval = forceScanInterval; ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_START_SCAN_CMDID, NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_scanparams_cmd(struct wmi_t *wmip, A_UINT16 fg_start_sec, ++ A_UINT16 fg_end_sec, A_UINT16 bg_sec, ++ A_UINT16 minact_chdw_msec, A_UINT16 maxact_chdw_msec, ++ A_UINT16 pas_chdw_msec, ++ A_UINT8 shScanRatio, A_UINT8 scanCtrlFlags, ++ A_UINT32 max_dfsch_act_time) ++{ ++ void *osbuf; ++ WMI_SCAN_PARAMS_CMD *sc; ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*sc)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*sc)); ++ ++ sc = (WMI_SCAN_PARAMS_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(sc, sizeof(*sc)); ++ sc->fg_start_period = fg_start_sec; ++ sc->fg_end_period = fg_end_sec; ++ sc->bg_period = bg_sec; ++ sc->minact_chdwell_time = minact_chdw_msec; ++ sc->maxact_chdwell_time = maxact_chdw_msec; ++ sc->pas_chdwell_time = pas_chdw_msec; ++ sc->shortScanRatio = shScanRatio; ++ sc->scanCtrlFlags = scanCtrlFlags; ++ sc->max_dfsch_act_time = max_dfsch_act_time; ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_SCAN_PARAMS_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_bssfilter_cmd(struct wmi_t *wmip, A_UINT8 filter, A_UINT32 ieMask) ++{ ++ void *osbuf; ++ WMI_BSS_FILTER_CMD *cmd; ++ ++ if (filter >= LAST_BSS_FILTER) { ++ return A_EINVAL; ++ } ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*cmd)); ++ ++ cmd = (WMI_BSS_FILTER_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, sizeof(*cmd)); ++ cmd->bssFilter = filter; ++ cmd->ieMask = ieMask; ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_BSS_FILTER_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_probedSsid_cmd(struct wmi_t *wmip, A_UINT8 index, A_UINT8 flag, ++ A_UINT8 ssidLength, A_UCHAR *ssid) ++{ ++ void *osbuf; ++ WMI_PROBED_SSID_CMD *cmd; ++ ++ if (index > MAX_PROBED_SSID_INDEX) { ++ return A_EINVAL; ++ } ++ if (ssidLength > sizeof(cmd->ssid)) { ++ return A_EINVAL; ++ } ++ if ((flag & (DISABLE_SSID_FLAG | ANY_SSID_FLAG)) && (ssidLength > 0)) { ++ return A_EINVAL; ++ } ++ if ((flag & SPECIFIC_SSID_FLAG) && !ssidLength) { ++ return A_EINVAL; ++ } ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*cmd)); ++ ++ cmd = (WMI_PROBED_SSID_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, sizeof(*cmd)); ++ cmd->entryIndex = index; ++ cmd->flag = flag; ++ cmd->ssidLength = ssidLength; ++ A_MEMCPY(cmd->ssid, ssid, ssidLength); ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_PROBED_SSID_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_listeninterval_cmd(struct wmi_t *wmip, A_UINT16 listenInterval, A_UINT16 listenBeacons) ++{ ++ void *osbuf; ++ WMI_LISTEN_INT_CMD *cmd; ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*cmd)); ++ ++ cmd = (WMI_LISTEN_INT_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, sizeof(*cmd)); ++ cmd->listenInterval = listenInterval; ++ cmd->numBeacons = listenBeacons; ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_LISTEN_INT_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_bmisstime_cmd(struct wmi_t *wmip, A_UINT16 bmissTime, A_UINT16 bmissBeacons) ++{ ++ void *osbuf; ++ WMI_BMISS_TIME_CMD *cmd; ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*cmd)); ++ ++ cmd = (WMI_BMISS_TIME_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, sizeof(*cmd)); ++ cmd->bmissTime = bmissTime; ++ cmd->numBeacons = bmissBeacons; ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_BMISS_TIME_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_associnfo_cmd(struct wmi_t *wmip, A_UINT8 ieType, ++ A_UINT8 ieLen, A_UINT8 *ieInfo) ++{ ++ void *osbuf; ++ WMI_SET_ASSOC_INFO_CMD *cmd; ++ A_UINT16 cmdLen; ++ ++ cmdLen = sizeof(*cmd) + ieLen - 1; ++ osbuf = A_NETBUF_ALLOC(cmdLen); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, cmdLen); ++ ++ cmd = (WMI_SET_ASSOC_INFO_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, cmdLen); ++ cmd->ieType = ieType; ++ cmd->bufferSize = ieLen; ++ A_MEMCPY(cmd->assocInfo, ieInfo, ieLen); ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_ASSOC_INFO_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_powermode_cmd(struct wmi_t *wmip, A_UINT8 powerMode) ++{ ++ void *osbuf; ++ WMI_POWER_MODE_CMD *cmd; ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*cmd)); ++ ++ cmd = (WMI_POWER_MODE_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, sizeof(*cmd)); ++ cmd->powerMode = powerMode; ++ wmip->wmi_powerMode = powerMode; ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_POWER_MODE_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_ibsspmcaps_cmd(struct wmi_t *wmip, A_UINT8 pmEnable, A_UINT8 ttl, ++ A_UINT16 atim_windows, A_UINT16 timeout_value) ++{ ++ void *osbuf; ++ WMI_IBSS_PM_CAPS_CMD *cmd; ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*cmd)); ++ ++ cmd = (WMI_IBSS_PM_CAPS_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, sizeof(*cmd)); ++ cmd->power_saving = pmEnable; ++ cmd->ttl = ttl; ++ cmd->atim_windows = atim_windows; ++ cmd->timeout_value = timeout_value; ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_IBSS_PM_CAPS_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_pmparams_cmd(struct wmi_t *wmip, A_UINT16 idlePeriod, ++ A_UINT16 psPollNum, A_UINT16 dtimPolicy) ++{ ++ void *osbuf; ++ WMI_POWER_PARAMS_CMD *pm; ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*pm)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*pm)); ++ ++ pm = (WMI_POWER_PARAMS_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(pm, sizeof(*pm)); ++ pm->idle_period = idlePeriod; ++ pm->pspoll_number = psPollNum; ++ pm->dtim_policy = dtimPolicy; ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_POWER_PARAMS_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_disctimeout_cmd(struct wmi_t *wmip, A_UINT8 timeout) ++{ ++ void *osbuf; ++ WMI_DISC_TIMEOUT_CMD *cmd; ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*cmd)); ++ ++ cmd = (WMI_DISC_TIMEOUT_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, sizeof(*cmd)); ++ cmd->disconnectTimeout = timeout; ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_DISC_TIMEOUT_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_addKey_cmd(struct wmi_t *wmip, A_UINT8 keyIndex, CRYPTO_TYPE keyType, ++ A_UINT8 keyUsage, A_UINT8 keyLength, A_UINT8 *keyRSC, ++ A_UINT8 *keyMaterial, A_UINT8 key_op_ctrl, ++ WMI_SYNC_FLAG sync_flag) ++{ ++ void *osbuf; ++ WMI_ADD_CIPHER_KEY_CMD *cmd; ++ ++ if ((keyIndex > WMI_MAX_KEY_INDEX) || (keyLength > WMI_MAX_KEY_LEN) || ++ (keyMaterial == NULL)) ++ { ++ return A_EINVAL; ++ } ++ ++ if ((WEP_CRYPT != keyType) && (NULL == keyRSC)) { ++ return A_EINVAL; ++ } ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*cmd)); ++ ++ cmd = (WMI_ADD_CIPHER_KEY_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, sizeof(*cmd)); ++ cmd->keyIndex = keyIndex; ++ cmd->keyType = keyType; ++ cmd->keyUsage = keyUsage; ++ cmd->keyLength = keyLength; ++ A_MEMCPY(cmd->key, keyMaterial, keyLength); ++ if (NULL != keyRSC) { ++ A_MEMCPY(cmd->keyRSC, keyRSC, sizeof(cmd->keyRSC)); ++ } ++ cmd->key_op_ctrl = key_op_ctrl; ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_ADD_CIPHER_KEY_CMDID, sync_flag)); ++} ++ ++A_STATUS ++wmi_add_krk_cmd(struct wmi_t *wmip, A_UINT8 *krk) ++{ ++ void *osbuf; ++ WMI_ADD_KRK_CMD *cmd; ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd)); ++ ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*cmd)); ++ ++ cmd = (WMI_ADD_KRK_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, sizeof(*cmd)); ++ A_MEMCPY(cmd->krk, krk, WMI_KRK_LEN); ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_ADD_KRK_CMDID, NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_delete_krk_cmd(struct wmi_t *wmip) ++{ ++ void *osbuf; ++ ++ osbuf = A_NETBUF_ALLOC(0); ++ ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_DELETE_KRK_CMDID, NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_deleteKey_cmd(struct wmi_t *wmip, A_UINT8 keyIndex) ++{ ++ void *osbuf; ++ WMI_DELETE_CIPHER_KEY_CMD *cmd; ++ ++ if (keyIndex > WMI_MAX_KEY_INDEX) { ++ return A_EINVAL; ++ } ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*cmd)); ++ ++ cmd = (WMI_DELETE_CIPHER_KEY_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, sizeof(*cmd)); ++ cmd->keyIndex = keyIndex; ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_DELETE_CIPHER_KEY_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_setPmkid_cmd(struct wmi_t *wmip, A_UINT8 *bssid, A_UINT8 *pmkId, ++ A_BOOL set) ++{ ++ void *osbuf; ++ WMI_SET_PMKID_CMD *cmd; ++ ++ if (bssid == NULL) { ++ return A_EINVAL; ++ } ++ ++ if ((set == TRUE) && (pmkId == NULL)) { ++ return A_EINVAL; ++ } ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*cmd)); ++ ++ cmd = (WMI_SET_PMKID_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMCPY(cmd->bssid, bssid, sizeof(cmd->bssid)); ++ if (set == TRUE) { ++ A_MEMCPY(cmd->pmkid, pmkId, sizeof(cmd->pmkid)); ++ cmd->enable = PMKID_ENABLE; ++ } else { ++ A_MEMZERO(cmd->pmkid, sizeof(cmd->pmkid)); ++ cmd->enable = PMKID_DISABLE; ++ } ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_PMKID_CMDID, NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_set_tkip_countermeasures_cmd(struct wmi_t *wmip, A_BOOL en) ++{ ++ void *osbuf; ++ WMI_SET_TKIP_COUNTERMEASURES_CMD *cmd; ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*cmd)); ++ ++ cmd = (WMI_SET_TKIP_COUNTERMEASURES_CMD *)(A_NETBUF_DATA(osbuf)); ++ cmd->cm_en = (en == TRUE)? WMI_TKIP_CM_ENABLE : WMI_TKIP_CM_DISABLE; ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_TKIP_COUNTERMEASURES_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_set_akmp_params_cmd(struct wmi_t *wmip, ++ WMI_SET_AKMP_PARAMS_CMD *akmpParams) ++{ ++ void *osbuf; ++ WMI_SET_AKMP_PARAMS_CMD *cmd; ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*cmd)); ++ cmd = (WMI_SET_AKMP_PARAMS_CMD *)(A_NETBUF_DATA(osbuf)); ++ cmd->akmpInfo = akmpParams->akmpInfo; ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_AKMP_PARAMS_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_set_pmkid_list_cmd(struct wmi_t *wmip, ++ WMI_SET_PMKID_LIST_CMD *pmkInfo) ++{ ++ void *osbuf; ++ WMI_SET_PMKID_LIST_CMD *cmd; ++ A_UINT16 cmdLen; ++ A_UINT8 i; ++ ++ cmdLen = sizeof(pmkInfo->numPMKID) + ++ pmkInfo->numPMKID * sizeof(WMI_PMKID); ++ ++ osbuf = A_NETBUF_ALLOC(cmdLen); ++ ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, cmdLen); ++ cmd = (WMI_SET_PMKID_LIST_CMD *)(A_NETBUF_DATA(osbuf)); ++ cmd->numPMKID = pmkInfo->numPMKID; ++ ++ for (i = 0; i < cmd->numPMKID; i++) { ++ A_MEMCPY(&cmd->pmkidList[i], &pmkInfo->pmkidList[i], ++ WMI_PMKID_LEN); ++ } ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_PMKID_LIST_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_get_pmkid_list_cmd(struct wmi_t *wmip) ++{ ++ void *osbuf; ++ ++ osbuf = A_NETBUF_ALLOC(0); /* no payload */ ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_GET_PMKID_LIST_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_dataSync_send(struct wmi_t *wmip, void *osbuf, WMI_PRI_STREAM_ID streamID) ++{ ++ WMI_DATA_HDR *dtHdr; ++ ++ A_ASSERT(streamID != WMI_CONTROL_PRI); ++ A_ASSERT(osbuf != NULL); ++ ++ if (A_NETBUF_PUSH(osbuf, sizeof(WMI_DATA_HDR)) != A_OK) { ++ return A_NO_MEMORY; ++ } ++ ++ dtHdr = (WMI_DATA_HDR *)A_NETBUF_DATA(osbuf); ++ dtHdr->info = ++ (SYNC_MSGTYPE & WMI_DATA_HDR_MSG_TYPE_MASK) << WMI_DATA_HDR_MSG_TYPE_SHIFT; ++ ++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter - streamID %d\n", DBGARG, streamID)); ++ ++ return (A_WMI_CONTROL_TX(wmip->wmi_devt, osbuf, streamID)); ++} ++ ++typedef struct _WMI_DATA_SYNC_BUFS { ++ A_UINT8 trafficClass; ++ void *osbuf; ++}WMI_DATA_SYNC_BUFS; ++ ++static A_STATUS ++wmi_sync_point(struct wmi_t *wmip) ++{ ++ void *cmd_osbuf; ++ WMI_DATA_SYNC_BUFS dataSyncBufs[WMM_NUM_AC]; ++ A_UINT8 i,numPriStreams=0; ++ A_STATUS status; ++ ++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG)); ++ ++ memset(dataSyncBufs,0,sizeof(dataSyncBufs)); ++ ++ /* lock out while we walk through the priority list and assemble our local array */ ++ LOCK_WMI(wmip); ++ ++ for (i=0; i < WMM_NUM_AC ; i++) { ++ if (wmip->wmi_fatPipeExists & (1 << i)) { ++ numPriStreams++; ++ dataSyncBufs[numPriStreams-1].trafficClass = i; ++ } ++ } ++ ++ UNLOCK_WMI(wmip); ++ ++ /* dataSyncBufs is now filled with entries (starting at index 0) containing valid streamIDs */ ++ ++ do { ++ /* ++ * We allocate all network buffers needed so we will be able to ++ * send all required frames. ++ */ ++ cmd_osbuf = A_NETBUF_ALLOC(0); /* no payload */ ++ if (cmd_osbuf == NULL) { ++ status = A_NO_MEMORY; ++ break; ++ } ++ ++ for (i=0; i < numPriStreams ; i++) { ++ dataSyncBufs[i].osbuf = A_NETBUF_ALLOC(0); ++ if (dataSyncBufs[i].osbuf == NULL) { ++ status = A_NO_MEMORY; ++ break; ++ } ++ } //end for ++ ++ /* ++ * Send sync cmd followed by sync data messages on all endpoints being ++ * used ++ */ ++ status = wmi_cmd_send(wmip, cmd_osbuf, WMI_SYNCHRONIZE_CMDID, ++ NO_SYNC_WMIFLAG); ++ ++ if (A_FAILED(status)) { ++ break; ++ } ++ /* cmd buffer sent, we no longer own it */ ++ cmd_osbuf = NULL; ++ ++ for(i=0; i < numPriStreams; i++) { ++ A_ASSERT(dataSyncBufs[i].osbuf != NULL); ++ ++ status = wmi_dataSync_send(wmip, dataSyncBufs[i].osbuf, ++ WMI_ACCESSCATEGORY_WMISTREAM(wmip,dataSyncBufs[i].trafficClass)); ++ ++ if (A_FAILED(status)) { ++ break; ++ } ++ /* we don't own this buffer anymore, NULL it out of the array so it ++ * won't get cleaned up */ ++ dataSyncBufs[i].osbuf = NULL; ++ } //end for ++ ++ } while(FALSE); ++ ++ /* free up any resources left over (possibly due to an error) */ ++ ++ if (cmd_osbuf != NULL) { ++ A_NETBUF_FREE(cmd_osbuf); ++ } ++ ++ for (i = 0; i < numPriStreams; i++) { ++ if (dataSyncBufs[i].osbuf != NULL) { ++ A_NETBUF_FREE(dataSyncBufs[i].osbuf); ++ } ++ } ++ ++ return (status); ++} ++ ++A_STATUS ++wmi_create_pstream_cmd(struct wmi_t *wmip, WMI_CREATE_PSTREAM_CMD *params) ++{ ++ void *osbuf; ++ WMI_CREATE_PSTREAM_CMD *cmd; ++ A_UINT16 activeTsids=0; ++ A_UINT8 fatPipeExistsForAC=0; ++ ++ /* Validate all the parameters. */ ++ if( !((params->userPriority < 8) && ++ (params->userPriority <= 0x7) && ++ (convert_userPriority_to_trafficClass(params->userPriority) == params->trafficClass) && ++ (params->trafficDirection == UPLINK_TRAFFIC || ++ params->trafficDirection == DNLINK_TRAFFIC || ++ params->trafficDirection == BIDIR_TRAFFIC) && ++ (params->trafficType == TRAFFIC_TYPE_APERIODIC || ++ params->trafficType == TRAFFIC_TYPE_PERIODIC ) && ++ (params->voicePSCapability == DISABLE_FOR_THIS_AC || ++ params->voicePSCapability == ENABLE_FOR_THIS_AC || ++ params->voicePSCapability == ENABLE_FOR_ALL_AC) && ++ (params->tsid == WMI_IMPLICIT_PSTREAM || params->tsid <= WMI_MAX_THINSTREAM)) ) ++ { ++ return A_EINVAL; ++ } ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*cmd)); ++ ++ A_DPRINTF(DBG_WMI, ++ (DBGFMT "Sending create_pstream_cmd: ac=%d tsid:%d\n", DBGARG, ++ params->trafficClass, params->tsid)); ++ ++ cmd = (WMI_CREATE_PSTREAM_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, sizeof(*cmd)); ++ A_MEMCPY(cmd, params, sizeof(*cmd)); ++ ++ /* this is an implicitly created Fat pipe */ ++ if (params->tsid == WMI_IMPLICIT_PSTREAM) { ++ LOCK_WMI(wmip); ++ fatPipeExistsForAC = (wmip->wmi_fatPipeExists & (1 << params->trafficClass)); ++ wmip->wmi_fatPipeExists |= (1<trafficClass); ++ UNLOCK_WMI(wmip); ++ } else { ++ /* this is an explicitly created thin stream within a fat pipe */ ++ LOCK_WMI(wmip); ++ fatPipeExistsForAC = (wmip->wmi_fatPipeExists & (1 << params->trafficClass)); ++ activeTsids = wmip->wmi_streamExistsForAC[params->trafficClass]; ++ wmip->wmi_streamExistsForAC[params->trafficClass] |= (1<tsid); ++ /* if a thinstream becomes active, the fat pipe automatically ++ * becomes active ++ */ ++ wmip->wmi_fatPipeExists |= (1<trafficClass); ++ UNLOCK_WMI(wmip); ++ } ++ ++ /* Indicate activty change to driver layer only if this is the ++ * first TSID to get created in this AC explicitly or an implicit ++ * fat pipe is getting created. ++ */ ++ if (!fatPipeExistsForAC) { ++ A_WMI_STREAM_TX_ACTIVE(wmip->wmi_devt, params->trafficClass); ++ } ++ ++ /* mike: should be SYNC_BEFORE_WMIFLAG */ ++ return (wmi_cmd_send(wmip, osbuf, WMI_CREATE_PSTREAM_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_delete_pstream_cmd(struct wmi_t *wmip, A_UINT8 trafficClass, A_UINT8 tsid) ++{ ++ void *osbuf; ++ WMI_DELETE_PSTREAM_CMD *cmd; ++ A_STATUS status; ++ A_UINT16 activeTsids=0; ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*cmd)); ++ ++ cmd = (WMI_DELETE_PSTREAM_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, sizeof(*cmd)); ++ ++ cmd->trafficClass = trafficClass; ++ cmd->tsid = tsid; ++ ++ LOCK_WMI(wmip); ++ activeTsids = wmip->wmi_streamExistsForAC[trafficClass]; ++ UNLOCK_WMI(wmip); ++ ++ /* Check if the tsid was created & exists */ ++ if (!(activeTsids & (1<wmi_streamExistsForAC[trafficClass] &= ~(1<wmi_streamExistsForAC[trafficClass]; ++ UNLOCK_WMI(wmip); ++ ++ ++ /* Indicate stream inactivity to driver layer only if all tsids ++ * within this AC are deleted. ++ */ ++ if(!activeTsids) { ++ A_WMI_STREAM_TX_INACTIVE(wmip->wmi_devt, trafficClass); ++ wmip->wmi_fatPipeExists &= ~(1<rateIndex = index; ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_BITRATE_CMDID, NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_get_bitrate_cmd(struct wmi_t *wmip) ++{ ++ void *osbuf; ++ ++ osbuf = A_NETBUF_ALLOC(0); /* no payload */ ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_GET_BITRATE_CMDID, NO_SYNC_WMIFLAG)); ++} ++ ++/* ++ * Returns TRUE iff the given rate index is legal in the current PHY mode. ++ */ ++A_BOOL ++wmi_is_bitrate_index_valid(struct wmi_t *wmip, A_UINT32 rateIndex) ++{ ++ WMI_PHY_MODE phyMode = wmip->wmi_phyMode; ++ A_BOOL isValid = TRUE; ++ switch(phyMode) { ++ case WMI_11A_MODE: ++ if ((rateIndex < MODE_A_SUPPORT_RATE_START) || (rateIndex > MODE_A_SUPPORT_RATE_STOP)) { ++ isValid = FALSE; ++ } ++ break; ++ ++ case WMI_11B_MODE: ++ if ((rateIndex < MODE_B_SUPPORT_RATE_START) || (rateIndex > MODE_B_SUPPORT_RATE_STOP)) { ++ isValid = FALSE; ++ } ++ break; ++ ++ case WMI_11GONLY_MODE: ++ if ((rateIndex < MODE_GONLY_SUPPORT_RATE_START) || (rateIndex > MODE_GONLY_SUPPORT_RATE_STOP)) { ++ isValid = FALSE; ++ } ++ break; ++ ++ case WMI_11G_MODE: ++ case WMI_11AG_MODE: ++ if ((rateIndex < MODE_G_SUPPORT_RATE_START) || (rateIndex > MODE_G_SUPPORT_RATE_STOP)) { ++ isValid = FALSE; ++ } ++ break; ++ ++ default: ++ A_ASSERT(FALSE); ++ break; ++ } ++ ++ return isValid; ++} ++ ++A_INT8 ++wmi_validate_bitrate(struct wmi_t *wmip, A_INT32 rate) ++{ ++ A_INT8 i; ++ if (rate != -1) ++ { ++ for (i=0;;i++) ++ { ++ if (wmi_rateTable[(A_UINT32) i] == 0) { ++ return A_EINVAL; ++ } ++ if (wmi_rateTable[(A_UINT32) i] == rate) { ++ break; ++ } ++ } ++ } ++ else{ ++ i = -1; ++ } ++ ++ if(wmi_is_bitrate_index_valid(wmip, i) != TRUE) { ++ return A_EINVAL; ++ } ++ ++ return i; ++} ++ ++A_STATUS ++wmi_set_fixrates_cmd(struct wmi_t *wmip, A_INT16 fixRatesMask) ++{ ++ void *osbuf; ++ WMI_FIX_RATES_CMD *cmd; ++ A_UINT32 rateIndex; ++ ++ /* Make sure all rates in the mask are valid in the current PHY mode */ ++ for(rateIndex = 0; rateIndex < MAX_NUMBER_OF_SUPPORT_RATES; rateIndex++) { ++ if((1 << rateIndex) & (A_UINT32)fixRatesMask) { ++ if(wmi_is_bitrate_index_valid(wmip, rateIndex) != TRUE) { ++ A_DPRINTF(DBG_WMI, (DBGFMT "Set Fix Rates command failed: Given rate is illegal in current PHY mode\n", DBGARG)); ++ return A_EINVAL; ++ } ++ } ++ } ++ ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*cmd)); ++ ++ cmd = (WMI_FIX_RATES_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, sizeof(*cmd)); ++ ++ cmd->fixRateMask = fixRatesMask; ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_FIXRATES_CMDID, NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_get_ratemask_cmd(struct wmi_t *wmip) ++{ ++ void *osbuf; ++ ++ osbuf = A_NETBUF_ALLOC(0); /* no payload */ ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_GET_FIXRATES_CMDID, NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_get_channelList_cmd(struct wmi_t *wmip) ++{ ++ void *osbuf; ++ ++ osbuf = A_NETBUF_ALLOC(0); /* no payload */ ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_GET_CHANNEL_LIST_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++/* ++ * used to generate a wmi sey channel Parameters cmd. ++ * mode should always be specified and corresponds to the phy mode of the ++ * wlan. ++ * numChan should alway sbe specified. If zero indicates that all available ++ * channels should be used. ++ * channelList is an array of channel frequencies (in Mhz) which the radio ++ * should limit its operation to. It should be NULL if numChan == 0. Size of ++ * array should correspond to numChan entries. ++ */ ++A_STATUS ++wmi_set_channelParams_cmd(struct wmi_t *wmip, A_UINT8 scanParam, ++ WMI_PHY_MODE mode, A_INT8 numChan, ++ A_UINT16 *channelList) ++{ ++ void *osbuf; ++ WMI_CHANNEL_PARAMS_CMD *cmd; ++ A_INT8 size; ++ ++ size = sizeof (*cmd); ++ ++ if (numChan) { ++ if (numChan > WMI_MAX_CHANNELS) { ++ return A_EINVAL; ++ } ++ size += sizeof(A_UINT16) * (numChan - 1); ++ } ++ ++ osbuf = A_NETBUF_ALLOC(size); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, size); ++ ++ cmd = (WMI_CHANNEL_PARAMS_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, size); ++ ++ wmip->wmi_phyMode = mode; ++ cmd->scanParam = scanParam; ++ cmd->phyMode = mode; ++ cmd->numChannels = numChan; ++ A_MEMCPY(cmd->channelList, channelList, numChan * sizeof(A_UINT16)); ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_CHANNEL_PARAMS_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_set_rssi_threshold_params(struct wmi_t *wmip, ++ WMI_RSSI_THRESHOLD_PARAMS_CMD *rssiCmd) ++{ ++ void *osbuf; ++ A_INT8 size; ++ WMI_RSSI_THRESHOLD_PARAMS_CMD *cmd; ++ /* These values are in ascending order */ ++ if( rssiCmd->thresholdAbove6_Val <= rssiCmd->thresholdAbove5_Val || ++ rssiCmd->thresholdAbove5_Val <= rssiCmd->thresholdAbove4_Val || ++ rssiCmd->thresholdAbove4_Val <= rssiCmd->thresholdAbove3_Val || ++ rssiCmd->thresholdAbove3_Val <= rssiCmd->thresholdAbove2_Val || ++ rssiCmd->thresholdAbove2_Val <= rssiCmd->thresholdAbove1_Val || ++ rssiCmd->thresholdBelow6_Val <= rssiCmd->thresholdBelow5_Val || ++ rssiCmd->thresholdBelow5_Val <= rssiCmd->thresholdBelow4_Val || ++ rssiCmd->thresholdBelow4_Val <= rssiCmd->thresholdBelow3_Val || ++ rssiCmd->thresholdBelow3_Val <= rssiCmd->thresholdBelow2_Val || ++ rssiCmd->thresholdBelow2_Val <= rssiCmd->thresholdBelow1_Val) { ++ ++ return A_EINVAL; ++ } ++ ++ size = sizeof (*cmd); ++ ++ osbuf = A_NETBUF_ALLOC(size); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, size); ++ ++ cmd = (WMI_RSSI_THRESHOLD_PARAMS_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, size); ++ A_MEMCPY(cmd, rssiCmd, sizeof(WMI_RSSI_THRESHOLD_PARAMS_CMD)); ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_RSSI_THRESHOLD_PARAMS_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_set_host_sleep_mode_cmd(struct wmi_t *wmip, ++ WMI_SET_HOST_SLEEP_MODE_CMD *hostModeCmd) ++{ ++ void *osbuf; ++ A_INT8 size; ++ WMI_SET_HOST_SLEEP_MODE_CMD *cmd; ++ ++ if( hostModeCmd->awake == hostModeCmd->asleep) { ++ return A_EINVAL; ++ } ++ ++ size = sizeof (*cmd); ++ ++ osbuf = A_NETBUF_ALLOC(size); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, size); ++ ++ cmd = (WMI_SET_HOST_SLEEP_MODE_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, size); ++ A_MEMCPY(cmd, hostModeCmd, sizeof(WMI_SET_HOST_SLEEP_MODE_CMD)); ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_HOST_SLEEP_MODE_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_set_wow_mode_cmd(struct wmi_t *wmip, ++ WMI_SET_WOW_MODE_CMD *wowModeCmd) ++{ ++ void *osbuf; ++ A_INT8 size; ++ WMI_SET_WOW_MODE_CMD *cmd; ++ ++ size = sizeof (*cmd); ++ ++ osbuf = A_NETBUF_ALLOC(size); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, size); ++ ++ cmd = (WMI_SET_WOW_MODE_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, size); ++ A_MEMCPY(cmd, wowModeCmd, sizeof(WMI_SET_WOW_MODE_CMD)); ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_WOW_MODE_CMDID, ++ NO_SYNC_WMIFLAG)); ++ ++} ++ ++A_STATUS ++wmi_get_wow_list_cmd(struct wmi_t *wmip, ++ WMI_GET_WOW_LIST_CMD *wowListCmd) ++{ ++ void *osbuf; ++ A_INT8 size; ++ WMI_GET_WOW_LIST_CMD *cmd; ++ ++ size = sizeof (*cmd); ++ ++ osbuf = A_NETBUF_ALLOC(size); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, size); ++ ++ cmd = (WMI_GET_WOW_LIST_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, size); ++ A_MEMCPY(cmd, wowListCmd, sizeof(WMI_GET_WOW_LIST_CMD)); ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_GET_WOW_LIST_CMDID, ++ NO_SYNC_WMIFLAG)); ++ ++} ++ ++static A_STATUS ++wmi_get_wow_list_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len) ++{ ++ WMI_GET_WOW_LIST_REPLY *reply; ++ ++ if (len < sizeof(WMI_GET_WOW_LIST_REPLY)) { ++ return A_EINVAL; ++ } ++ reply = (WMI_GET_WOW_LIST_REPLY *)datap; ++ ++ A_WMI_WOW_LIST_EVENT(wmip->wmi_devt, reply->num_filters, ++ reply); ++ ++ return A_OK; ++} ++ ++A_STATUS wmi_add_wow_pattern_cmd(struct wmi_t *wmip, ++ WMI_ADD_WOW_PATTERN_CMD *addWowCmd, ++ A_UINT8* pattern, A_UINT8* mask, ++ A_UINT8 pattern_size) ++{ ++ void *osbuf; ++ A_INT8 size; ++ WMI_ADD_WOW_PATTERN_CMD *cmd; ++ A_UINT8 *filter_mask = NULL; ++ ++ size = sizeof (*cmd); ++ ++ size += ((2 * addWowCmd->filter_size)* sizeof(A_UINT8)); ++ osbuf = A_NETBUF_ALLOC(size); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, size); ++ ++ cmd = (WMI_ADD_WOW_PATTERN_CMD *)(A_NETBUF_DATA(osbuf)); ++ cmd->filter_list_id = addWowCmd->filter_list_id; ++ cmd->filter_offset = addWowCmd->filter_offset; ++ cmd->filter_size = addWowCmd->filter_size; ++ ++ A_MEMCPY(cmd->filter, pattern, addWowCmd->filter_size); ++ ++ filter_mask = (A_UINT8*)(cmd->filter + cmd->filter_size); ++ A_MEMCPY(filter_mask, mask, addWowCmd->filter_size); ++ ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_ADD_WOW_PATTERN_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_del_wow_pattern_cmd(struct wmi_t *wmip, ++ WMI_DEL_WOW_PATTERN_CMD *delWowCmd) ++{ ++ void *osbuf; ++ A_INT8 size; ++ WMI_DEL_WOW_PATTERN_CMD *cmd; ++ ++ size = sizeof (*cmd); ++ ++ osbuf = A_NETBUF_ALLOC(size); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, size); ++ ++ cmd = (WMI_DEL_WOW_PATTERN_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, size); ++ A_MEMCPY(cmd, delWowCmd, sizeof(WMI_DEL_WOW_PATTERN_CMD)); ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_DEL_WOW_PATTERN_CMDID, ++ NO_SYNC_WMIFLAG)); ++ ++} ++ ++A_STATUS ++wmi_set_snr_threshold_params(struct wmi_t *wmip, ++ WMI_SNR_THRESHOLD_PARAMS_CMD *snrCmd) ++{ ++ void *osbuf; ++ A_INT8 size; ++ WMI_SNR_THRESHOLD_PARAMS_CMD *cmd; ++ /* These values are in ascending order */ ++ if( snrCmd->thresholdAbove4_Val <= snrCmd->thresholdAbove3_Val || ++ snrCmd->thresholdAbove3_Val <= snrCmd->thresholdAbove2_Val || ++ snrCmd->thresholdAbove2_Val <= snrCmd->thresholdAbove1_Val || ++ snrCmd->thresholdBelow4_Val <= snrCmd->thresholdBelow3_Val || ++ snrCmd->thresholdBelow3_Val <= snrCmd->thresholdBelow2_Val || ++ snrCmd->thresholdBelow2_Val <= snrCmd->thresholdBelow1_Val) { ++ ++ return A_EINVAL; ++ } ++ ++ size = sizeof (*cmd); ++ ++ osbuf = A_NETBUF_ALLOC(size); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, size); ++ ++ cmd = (WMI_SNR_THRESHOLD_PARAMS_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, size); ++ A_MEMCPY(cmd, snrCmd, sizeof(WMI_SNR_THRESHOLD_PARAMS_CMD)); ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SNR_THRESHOLD_PARAMS_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_clr_rssi_snr(struct wmi_t *wmip) ++{ ++ void *osbuf; ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(int)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_CLR_RSSI_SNR_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_set_lq_threshold_params(struct wmi_t *wmip, ++ WMI_LQ_THRESHOLD_PARAMS_CMD *lqCmd) ++{ ++ void *osbuf; ++ A_INT8 size; ++ WMI_LQ_THRESHOLD_PARAMS_CMD *cmd; ++ /* These values are in ascending order */ ++ if( lqCmd->thresholdAbove4_Val <= lqCmd->thresholdAbove3_Val || ++ lqCmd->thresholdAbove3_Val <= lqCmd->thresholdAbove2_Val || ++ lqCmd->thresholdAbove2_Val <= lqCmd->thresholdAbove1_Val || ++ lqCmd->thresholdBelow4_Val <= lqCmd->thresholdBelow3_Val || ++ lqCmd->thresholdBelow3_Val <= lqCmd->thresholdBelow2_Val || ++ lqCmd->thresholdBelow2_Val <= lqCmd->thresholdBelow1_Val ) { ++ ++ return A_EINVAL; ++ } ++ ++ size = sizeof (*cmd); ++ ++ osbuf = A_NETBUF_ALLOC(size); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, size); ++ ++ cmd = (WMI_LQ_THRESHOLD_PARAMS_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, size); ++ A_MEMCPY(cmd, lqCmd, sizeof(WMI_LQ_THRESHOLD_PARAMS_CMD)); ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_LQ_THRESHOLD_PARAMS_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_set_error_report_bitmask(struct wmi_t *wmip, A_UINT32 mask) ++{ ++ void *osbuf; ++ A_INT8 size; ++ WMI_TARGET_ERROR_REPORT_BITMASK *cmd; ++ ++ size = sizeof (*cmd); ++ ++ osbuf = A_NETBUF_ALLOC(size); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, size); ++ ++ cmd = (WMI_TARGET_ERROR_REPORT_BITMASK *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, size); ++ ++ cmd->bitmask = mask; ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_TARGET_ERROR_REPORT_BITMASK_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_get_challenge_resp_cmd(struct wmi_t *wmip, A_UINT32 cookie, A_UINT32 source) ++{ ++ void *osbuf; ++ WMIX_HB_CHALLENGE_RESP_CMD *cmd; ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*cmd)); ++ ++ cmd = (WMIX_HB_CHALLENGE_RESP_CMD *)(A_NETBUF_DATA(osbuf)); ++ cmd->cookie = cookie; ++ cmd->source = source; ++ ++ return (wmi_cmd_send_xtnd(wmip, osbuf, WMIX_HB_CHALLENGE_RESP_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_config_debug_module_cmd(struct wmi_t *wmip, A_UINT16 mmask, ++ A_UINT16 tsr, A_BOOL rep, A_UINT16 size, ++ A_UINT32 valid) ++{ ++ void *osbuf; ++ WMIX_DBGLOG_CFG_MODULE_CMD *cmd; ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*cmd)); ++ ++ cmd = (WMIX_DBGLOG_CFG_MODULE_CMD *)(A_NETBUF_DATA(osbuf)); ++ cmd->config.cfgmmask = mmask; ++ cmd->config.cfgtsr = tsr; ++ cmd->config.cfgrep = rep; ++ cmd->config.cfgsize = size; ++ cmd->config.cfgvalid = valid; ++ ++ return (wmi_cmd_send_xtnd(wmip, osbuf, WMIX_DBGLOG_CFG_MODULE_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_get_stats_cmd(struct wmi_t *wmip) ++{ ++ void *osbuf; ++ ++ osbuf = A_NETBUF_ALLOC(0); /* no payload */ ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_GET_STATISTICS_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_addBadAp_cmd(struct wmi_t *wmip, A_UINT8 apIndex, A_UINT8 *bssid) ++{ ++ void *osbuf; ++ WMI_ADD_BAD_AP_CMD *cmd; ++ ++ if ((bssid == NULL) || (apIndex > WMI_MAX_BAD_AP_INDEX)) { ++ return A_EINVAL; ++ } ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*cmd)); ++ ++ cmd = (WMI_ADD_BAD_AP_CMD *)(A_NETBUF_DATA(osbuf)); ++ cmd->badApIndex = apIndex; ++ A_MEMCPY(cmd->bssid, bssid, sizeof(cmd->bssid)); ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_ADD_BAD_AP_CMDID, NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_deleteBadAp_cmd(struct wmi_t *wmip, A_UINT8 apIndex) ++{ ++ void *osbuf; ++ WMI_DELETE_BAD_AP_CMD *cmd; ++ ++ if (apIndex > WMI_MAX_BAD_AP_INDEX) { ++ return A_EINVAL; ++ } ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*cmd)); ++ ++ cmd = (WMI_DELETE_BAD_AP_CMD *)(A_NETBUF_DATA(osbuf)); ++ cmd->badApIndex = apIndex; ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_DELETE_BAD_AP_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_set_txPwr_cmd(struct wmi_t *wmip, A_UINT8 dbM) ++{ ++ void *osbuf; ++ WMI_SET_TX_PWR_CMD *cmd; ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*cmd)); ++ ++ cmd = (WMI_SET_TX_PWR_CMD *)(A_NETBUF_DATA(osbuf)); ++ cmd->dbM = dbM; ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_TX_PWR_CMDID, NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_get_txPwr_cmd(struct wmi_t *wmip) ++{ ++ void *osbuf; ++ ++ osbuf = A_NETBUF_ALLOC(0); /* no payload */ ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_GET_TX_PWR_CMDID, NO_SYNC_WMIFLAG)); ++} ++ ++A_UINT16 ++wmi_get_mapped_qos_queue(struct wmi_t *wmip, A_UINT8 trafficClass) ++{ ++ A_UINT16 activeTsids=0; ++ ++ LOCK_WMI(wmip); ++ activeTsids = wmip->wmi_streamExistsForAC[trafficClass]; ++ UNLOCK_WMI(wmip); ++ ++ return activeTsids; ++} ++ ++A_STATUS ++wmi_get_roam_tbl_cmd(struct wmi_t *wmip) ++{ ++ void *osbuf; ++ ++ osbuf = A_NETBUF_ALLOC(0); /* no payload */ ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_GET_ROAM_TBL_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_get_roam_data_cmd(struct wmi_t *wmip, A_UINT8 roamDataType) ++{ ++ void *osbuf; ++ A_UINT32 size = sizeof(A_UINT8); ++ WMI_TARGET_ROAM_DATA *cmd; ++ ++ osbuf = A_NETBUF_ALLOC(size); /* no payload */ ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, size); ++ ++ cmd = (WMI_TARGET_ROAM_DATA *)(A_NETBUF_DATA(osbuf)); ++ cmd->roamDataType = roamDataType; ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_GET_ROAM_DATA_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_set_roam_ctrl_cmd(struct wmi_t *wmip, WMI_SET_ROAM_CTRL_CMD *p, ++ A_UINT8 size) ++{ ++ void *osbuf; ++ WMI_SET_ROAM_CTRL_CMD *cmd; ++ ++ osbuf = A_NETBUF_ALLOC(size); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, size); ++ ++ cmd = (WMI_SET_ROAM_CTRL_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, size); ++ ++ A_MEMCPY(cmd, p, size); ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_ROAM_CTRL_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_set_powersave_timers_cmd(struct wmi_t *wmip, ++ WMI_POWERSAVE_TIMERS_POLICY_CMD *pCmd, ++ A_UINT8 size) ++{ ++ void *osbuf; ++ WMI_POWERSAVE_TIMERS_POLICY_CMD *cmd; ++ ++ /* These timers can't be zero */ ++ if(!pCmd->psPollTimeout || !pCmd->triggerTimeout || ++ !(pCmd->apsdTimPolicy == IGNORE_TIM_ALL_QUEUES_APSD || ++ pCmd->apsdTimPolicy == PROCESS_TIM_ALL_QUEUES_APSD) || ++ !(pCmd->simulatedAPSDTimPolicy == IGNORE_TIM_SIMULATED_APSD || ++ pCmd->simulatedAPSDTimPolicy == PROCESS_TIM_SIMULATED_APSD)) ++ return A_EINVAL; ++ ++ osbuf = A_NETBUF_ALLOC(size); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, size); ++ ++ cmd = (WMI_POWERSAVE_TIMERS_POLICY_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, size); ++ ++ A_MEMCPY(cmd, pCmd, size); ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_POWERSAVE_TIMERS_POLICY_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++#ifdef CONFIG_HOST_GPIO_SUPPORT ++/* Send a command to Target to change GPIO output pins. */ ++A_STATUS ++wmi_gpio_output_set(struct wmi_t *wmip, ++ A_UINT32 set_mask, ++ A_UINT32 clear_mask, ++ A_UINT32 enable_mask, ++ A_UINT32 disable_mask) ++{ ++ void *osbuf; ++ WMIX_GPIO_OUTPUT_SET_CMD *output_set; ++ int size; ++ ++ size = sizeof(*output_set); ++ ++ A_DPRINTF(DBG_WMI, ++ (DBGFMT "Enter - set=0x%x clear=0x%x enb=0x%x dis=0x%x\n", DBGARG, ++ set_mask, clear_mask, enable_mask, disable_mask)); ++ ++ osbuf = A_NETBUF_ALLOC(size); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ A_NETBUF_PUT(osbuf, size); ++ output_set = (WMIX_GPIO_OUTPUT_SET_CMD *)(A_NETBUF_DATA(osbuf)); ++ ++ output_set->set_mask = set_mask; ++ output_set->clear_mask = clear_mask; ++ output_set->enable_mask = enable_mask; ++ output_set->disable_mask = disable_mask; ++ ++ return (wmi_cmd_send_xtnd(wmip, osbuf, WMIX_GPIO_OUTPUT_SET_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++/* Send a command to the Target requesting state of the GPIO input pins */ ++A_STATUS ++wmi_gpio_input_get(struct wmi_t *wmip) ++{ ++ void *osbuf; ++ ++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG)); ++ ++ osbuf = A_NETBUF_ALLOC(0); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ return (wmi_cmd_send_xtnd(wmip, osbuf, WMIX_GPIO_INPUT_GET_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++/* Send a command to the Target that changes the value of a GPIO register. */ ++A_STATUS ++wmi_gpio_register_set(struct wmi_t *wmip, ++ A_UINT32 gpioreg_id, ++ A_UINT32 value) ++{ ++ void *osbuf; ++ WMIX_GPIO_REGISTER_SET_CMD *register_set; ++ int size; ++ ++ size = sizeof(*register_set); ++ ++ A_DPRINTF(DBG_WMI, ++ (DBGFMT "Enter - reg=%d value=0x%x\n", DBGARG, gpioreg_id, value)); ++ ++ osbuf = A_NETBUF_ALLOC(size); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ A_NETBUF_PUT(osbuf, size); ++ register_set = (WMIX_GPIO_REGISTER_SET_CMD *)(A_NETBUF_DATA(osbuf)); ++ ++ register_set->gpioreg_id = gpioreg_id; ++ register_set->value = value; ++ ++ return (wmi_cmd_send_xtnd(wmip, osbuf, WMIX_GPIO_REGISTER_SET_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++/* Send a command to the Target to fetch the value of a GPIO register. */ ++A_STATUS ++wmi_gpio_register_get(struct wmi_t *wmip, ++ A_UINT32 gpioreg_id) ++{ ++ void *osbuf; ++ WMIX_GPIO_REGISTER_GET_CMD *register_get; ++ int size; ++ ++ size = sizeof(*register_get); ++ ++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter - reg=%d\n", DBGARG, gpioreg_id)); ++ ++ osbuf = A_NETBUF_ALLOC(size); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ A_NETBUF_PUT(osbuf, size); ++ register_get = (WMIX_GPIO_REGISTER_GET_CMD *)(A_NETBUF_DATA(osbuf)); ++ ++ register_get->gpioreg_id = gpioreg_id; ++ ++ return (wmi_cmd_send_xtnd(wmip, osbuf, WMIX_GPIO_REGISTER_GET_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++/* Send a command to the Target acknowledging some GPIO interrupts. */ ++A_STATUS ++wmi_gpio_intr_ack(struct wmi_t *wmip, ++ A_UINT32 ack_mask) ++{ ++ void *osbuf; ++ WMIX_GPIO_INTR_ACK_CMD *intr_ack; ++ int size; ++ ++ size = sizeof(*intr_ack); ++ ++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter ack_mask=0x%x\n", DBGARG, ack_mask)); ++ ++ osbuf = A_NETBUF_ALLOC(size); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ A_NETBUF_PUT(osbuf, size); ++ intr_ack = (WMIX_GPIO_INTR_ACK_CMD *)(A_NETBUF_DATA(osbuf)); ++ ++ intr_ack->ack_mask = ack_mask; ++ ++ return (wmi_cmd_send_xtnd(wmip, osbuf, WMIX_GPIO_INTR_ACK_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++#endif /* CONFIG_HOST_GPIO_SUPPORT */ ++ ++A_STATUS ++wmi_set_access_params_cmd(struct wmi_t *wmip, A_UINT16 txop, A_UINT8 eCWmin, ++ A_UINT8 eCWmax, A_UINT8 aifsn) ++{ ++ void *osbuf; ++ WMI_SET_ACCESS_PARAMS_CMD *cmd; ++ ++ if ((eCWmin > WMI_MAX_CW_ACPARAM) || (eCWmax > WMI_MAX_CW_ACPARAM) || ++ (aifsn > WMI_MAX_AIFSN_ACPARAM)) ++ { ++ return A_EINVAL; ++ } ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*cmd)); ++ ++ cmd = (WMI_SET_ACCESS_PARAMS_CMD *)(A_NETBUF_DATA(osbuf)); ++ cmd->txop = txop; ++ cmd->eCWmin = eCWmin; ++ cmd->eCWmax = eCWmax; ++ cmd->aifsn = aifsn; ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_ACCESS_PARAMS_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_set_retry_limits_cmd(struct wmi_t *wmip, A_UINT8 frameType, ++ A_UINT8 trafficClass, A_UINT8 maxRetries, ++ A_UINT8 enableNotify) ++{ ++ void *osbuf; ++ WMI_SET_RETRY_LIMITS_CMD *cmd; ++ ++ if ((frameType != MGMT_FRAMETYPE) && (frameType != CONTROL_FRAMETYPE) && ++ (frameType != DATA_FRAMETYPE)) ++ { ++ return A_EINVAL; ++ } ++ ++ if (maxRetries > WMI_MAX_RETRIES) { ++ return A_EINVAL; ++ } ++ ++ if (frameType != DATA_FRAMETYPE) { ++ trafficClass = 0; ++ } ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*cmd)); ++ ++ cmd = (WMI_SET_RETRY_LIMITS_CMD *)(A_NETBUF_DATA(osbuf)); ++ cmd->frameType = frameType; ++ cmd->trafficClass = trafficClass; ++ cmd->maxRetries = maxRetries; ++ cmd->enableNotify = enableNotify; ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_RETRY_LIMITS_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++void ++wmi_get_current_bssid(struct wmi_t *wmip, A_UINT8 *bssid) ++{ ++ if (bssid != NULL) { ++ A_MEMCPY(bssid, wmip->wmi_bssid, ATH_MAC_LEN); ++ } ++} ++ ++A_STATUS ++wmi_set_opt_mode_cmd(struct wmi_t *wmip, A_UINT8 optMode) ++{ ++ void *osbuf; ++ WMI_SET_OPT_MODE_CMD *cmd; ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*cmd)); ++ ++ cmd = (WMI_SET_OPT_MODE_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, sizeof(*cmd)); ++ cmd->optMode = optMode; ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_OPT_MODE_CMDID, ++ SYNC_BOTH_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_opt_tx_frame_cmd(struct wmi_t *wmip, ++ A_UINT8 frmType, ++ A_UINT8 *dstMacAddr, ++ A_UINT8 *bssid, ++ A_UINT16 optIEDataLen, ++ A_UINT8 *optIEData) ++{ ++ void *osbuf; ++ WMI_OPT_TX_FRAME_CMD *cmd; ++ osbuf = A_NETBUF_ALLOC(optIEDataLen + sizeof(*cmd)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, (optIEDataLen + sizeof(*cmd))); ++ ++ cmd = (WMI_OPT_TX_FRAME_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, (optIEDataLen + sizeof(*cmd)-1)); ++ ++ cmd->frmType = frmType; ++ cmd->optIEDataLen = optIEDataLen; ++ //cmd->optIEData = (A_UINT8 *)((int)cmd + sizeof(*cmd)); ++ A_MEMCPY(cmd->bssid, bssid, sizeof(cmd->bssid)); ++ A_MEMCPY(cmd->dstAddr, dstMacAddr, sizeof(cmd->dstAddr)); ++ A_MEMCPY(&cmd->optIEData[0], optIEData, optIEDataLen); ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_OPT_TX_FRAME_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_set_adhoc_bconIntvl_cmd(struct wmi_t *wmip, A_UINT16 intvl) ++{ ++ void *osbuf; ++ WMI_BEACON_INT_CMD *cmd; ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*cmd)); ++ ++ cmd = (WMI_BEACON_INT_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, sizeof(*cmd)); ++ cmd->beaconInterval = intvl; ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_BEACON_INT_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++ ++A_STATUS ++wmi_set_voice_pkt_size_cmd(struct wmi_t *wmip, A_UINT16 voicePktSize) ++{ ++ void *osbuf; ++ WMI_SET_VOICE_PKT_SIZE_CMD *cmd; ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*cmd)); ++ ++ cmd = (WMI_SET_VOICE_PKT_SIZE_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, sizeof(*cmd)); ++ cmd->voicePktSize = voicePktSize; ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_VOICE_PKT_SIZE_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++ ++A_STATUS ++wmi_set_max_sp_len_cmd(struct wmi_t *wmip, A_UINT8 maxSPLen) ++{ ++ void *osbuf; ++ WMI_SET_MAX_SP_LEN_CMD *cmd; ++ ++ /* maxSPLen is a two-bit value. If user trys to set anything ++ * other than this, then its invalid ++ */ ++ if(maxSPLen & ~0x03) ++ return A_EINVAL; ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*cmd)); ++ ++ cmd = (WMI_SET_MAX_SP_LEN_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, sizeof(*cmd)); ++ cmd->maxSPLen = maxSPLen; ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_MAX_SP_LEN_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_UINT8 ++convert_userPriority_to_trafficClass(A_UINT8 userPriority) ++{ ++ return (up_to_ac[userPriority & 0x7]); ++} ++ ++A_UINT8 ++wmi_get_power_mode_cmd(struct wmi_t *wmip) ++{ ++ return wmip->wmi_powerMode; ++} ++ ++A_STATUS ++wmi_verify_tspec_params(WMI_CREATE_PSTREAM_CMD *pCmd, A_BOOL tspecCompliance) ++{ ++ return A_OK; ++} ++ ++#ifdef CONFIG_HOST_TCMD_SUPPORT ++static A_STATUS ++wmi_tcmd_test_report_rx(struct wmi_t *wmip, A_UINT8 *datap, int len) ++{ ++ ++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG)); ++ ++ A_WMI_TCMD_RX_REPORT_EVENT(wmip->wmi_devt, datap, len); ++ ++ return A_OK; ++} ++ ++#endif /* CONFIG_HOST_TCMD_SUPPORT*/ ++ ++A_STATUS ++wmi_set_authmode_cmd(struct wmi_t *wmip, A_UINT8 mode) ++{ ++ void *osbuf; ++ WMI_SET_AUTH_MODE_CMD *cmd; ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*cmd)); ++ ++ cmd = (WMI_SET_AUTH_MODE_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, sizeof(*cmd)); ++ cmd->mode = mode; ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_AUTH_MODE_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_set_reassocmode_cmd(struct wmi_t *wmip, A_UINT8 mode) ++{ ++ void *osbuf; ++ WMI_SET_REASSOC_MODE_CMD *cmd; ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*cmd)); ++ ++ cmd = (WMI_SET_REASSOC_MODE_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, sizeof(*cmd)); ++ cmd->mode = mode; ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_REASSOC_MODE_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_set_lpreamble_cmd(struct wmi_t *wmip, A_UINT8 status) ++{ ++ void *osbuf; ++ WMI_SET_LPREAMBLE_CMD *cmd; ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*cmd)); ++ ++ cmd = (WMI_SET_LPREAMBLE_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, sizeof(*cmd)); ++ cmd->status = status; ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_LPREAMBLE_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_set_rts_cmd(struct wmi_t *wmip, A_UINT16 threshold) ++{ ++ void *osbuf; ++ WMI_SET_RTS_CMD *cmd; ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*cmd)); ++ ++ cmd = (WMI_SET_RTS_CMD*)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, sizeof(*cmd)); ++ cmd->threshold = threshold; ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_RTS_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_set_wmm_cmd(struct wmi_t *wmip, WMI_WMM_STATUS status) ++{ ++ void *osbuf; ++ WMI_SET_WMM_CMD *cmd; ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*cmd)); ++ ++ cmd = (WMI_SET_WMM_CMD*)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, sizeof(*cmd)); ++ cmd->status = status; ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_WMM_CMDID, ++ NO_SYNC_WMIFLAG)); ++ ++} ++ ++A_STATUS ++wmi_set_wmm_txop(struct wmi_t *wmip, WMI_TXOP_CFG cfg) ++{ ++ void *osbuf; ++ WMI_SET_WMM_TXOP_CMD *cmd; ++ ++ if( !((cfg == WMI_TXOP_DISABLED) || (cfg == WMI_TXOP_ENABLED)) ) ++ return A_EINVAL; ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*cmd)); ++ ++ cmd = (WMI_SET_WMM_TXOP_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, sizeof(*cmd)); ++ cmd->txopEnable = cfg; ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_WMM_TXOP_CMDID, ++ NO_SYNC_WMIFLAG)); ++ ++} ++ ++#ifdef CONFIG_HOST_TCMD_SUPPORT ++/* WMI layer doesn't need to know the data type of the test cmd. ++ This would be beneficial for customers like Qualcomm, who might ++ have different test command requirements from differnt manufacturers ++ */ ++A_STATUS ++wmi_test_cmd(struct wmi_t *wmip, A_UINT8 *buf, A_UINT32 len) ++{ ++ void *osbuf; ++ char *data; ++ ++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG)); ++ ++ osbuf= A_NETBUF_ALLOC(len); ++ if(osbuf == NULL) ++ { ++ return A_NO_MEMORY; ++ } ++ A_NETBUF_PUT(osbuf, len); ++ data = A_NETBUF_DATA(osbuf); ++ A_MEMCPY(data, buf, len); ++ ++ return(wmi_cmd_send(wmip, osbuf, WMI_TEST_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++#endif ++ ++A_STATUS ++wmi_set_bt_status_cmd(struct wmi_t *wmip, A_UINT8 streamType, A_UINT8 status) ++{ ++ void *osbuf; ++ WMI_SET_BT_STATUS_CMD *cmd; ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*cmd)); ++ ++ cmd = (WMI_SET_BT_STATUS_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, sizeof(*cmd)); ++ cmd->streamType = streamType; ++ cmd->status = status; ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_BT_STATUS_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_set_bt_params_cmd(struct wmi_t *wmip, WMI_SET_BT_PARAMS_CMD* cmd) ++{ ++ void *osbuf; ++ WMI_SET_BT_PARAMS_CMD* alloc_cmd; ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*cmd)); ++ ++ alloc_cmd = (WMI_SET_BT_PARAMS_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(alloc_cmd, sizeof(*cmd)); ++ A_MEMCPY(alloc_cmd, cmd, sizeof(*cmd)); ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_BT_PARAMS_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_get_keepalive_configured(struct wmi_t *wmip) ++{ ++ void *osbuf; ++ WMI_GET_KEEPALIVE_CMD *cmd; ++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ A_NETBUF_PUT(osbuf, sizeof(*cmd)); ++ cmd = (WMI_GET_KEEPALIVE_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, sizeof(*cmd)); ++ return (wmi_cmd_send(wmip, osbuf, WMI_GET_KEEPALIVE_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_UINT8 ++wmi_get_keepalive_cmd(struct wmi_t *wmip) ++{ ++ return wmip->wmi_keepaliveInterval; ++} ++ ++A_STATUS ++wmi_set_keepalive_cmd(struct wmi_t *wmip, A_UINT8 keepaliveInterval) ++{ ++ void *osbuf; ++ WMI_SET_KEEPALIVE_CMD *cmd; ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*cmd)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*cmd)); ++ ++ cmd = (WMI_SET_KEEPALIVE_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, sizeof(*cmd)); ++ cmd->keepaliveInterval = keepaliveInterval; ++ wmip->wmi_keepaliveInterval = keepaliveInterval; ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_KEEPALIVE_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_set_appie_cmd(struct wmi_t *wmip, A_UINT8 mgmtFrmType, A_UINT8 ieLen, ++ A_UINT8 *ieInfo) ++{ ++ void *osbuf; ++ WMI_SET_APPIE_CMD *cmd; ++ A_UINT16 cmdLen; ++ ++ if (ieLen > WMI_MAX_IE_LEN) { ++ return A_ERROR; ++ } ++ cmdLen = sizeof(*cmd) + ieLen - 1; ++ osbuf = A_NETBUF_ALLOC(cmdLen); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, cmdLen); ++ ++ cmd = (WMI_SET_APPIE_CMD *)(A_NETBUF_DATA(osbuf)); ++ A_MEMZERO(cmd, cmdLen); ++ ++ cmd->mgmtFrmType = mgmtFrmType; ++ cmd->ieLen = ieLen; ++ A_MEMCPY(cmd->ieInfo, ieInfo, ieLen); ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_APPIE_CMDID, NO_SYNC_WMIFLAG)); ++} ++ ++A_STATUS ++wmi_set_halparam_cmd(struct wmi_t *wmip, A_UINT8 *cmd, A_UINT16 dataLen) ++{ ++ void *osbuf; ++ A_UINT8 *data; ++ ++ osbuf = A_NETBUF_ALLOC(dataLen); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, dataLen); ++ ++ data = A_NETBUF_DATA(osbuf); ++ ++ A_MEMCPY(data, cmd, dataLen); ++ ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_WHALPARAM_CMDID, NO_SYNC_WMIFLAG)); ++} ++ ++A_INT32 ++wmi_get_rate(A_INT8 rateindex) ++{ ++ if (rateindex == RATE_AUTO) { ++ return 0; ++ } else { ++ return(wmi_rateTable[(A_UINT32) rateindex]); ++ } ++} ++ ++void ++wmi_node_return (struct wmi_t *wmip, bss_t *bss) ++{ ++ if (NULL != bss) ++ { ++ wlan_node_return (&wmip->wmi_scan_table, bss); ++ } ++} ++ ++bss_t * ++wmi_find_Ssidnode (struct wmi_t *wmip, A_UCHAR *pSsid, ++ A_UINT32 ssidLength, A_BOOL bIsWPA2) ++{ ++ bss_t *node = NULL; ++ node = wlan_find_Ssidnode (&wmip->wmi_scan_table, pSsid, ++ ssidLength, bIsWPA2); ++ return node; ++} ++ ++void ++wmi_free_allnodes(struct wmi_t *wmip) ++{ ++ wlan_free_allnodes(&wmip->wmi_scan_table); ++} ++ ++bss_t * ++wmi_find_node(struct wmi_t *wmip, const A_UINT8 *macaddr) ++{ ++ bss_t *ni=NULL; ++ ni=wlan_find_node(&wmip->wmi_scan_table,macaddr); ++ return ni; ++} ++ ++A_STATUS ++wmi_dset_open_reply(struct wmi_t *wmip, ++ A_UINT32 status, ++ A_UINT32 access_cookie, ++ A_UINT32 dset_size, ++ A_UINT32 dset_version, ++ A_UINT32 targ_handle, ++ A_UINT32 targ_reply_fn, ++ A_UINT32 targ_reply_arg) ++{ ++ void *osbuf; ++ WMIX_DSETOPEN_REPLY_CMD *open_reply; ++ ++ A_DPRINTF(DBG_WMI, (DBGFMT "Enter - wmip=0x%x\n", DBGARG, (int)wmip)); ++ ++ osbuf = A_NETBUF_ALLOC(sizeof(*open_reply)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ A_NETBUF_PUT(osbuf, sizeof(*open_reply)); ++ open_reply = (WMIX_DSETOPEN_REPLY_CMD *)(A_NETBUF_DATA(osbuf)); ++ ++ open_reply->status = status; ++ open_reply->targ_dset_handle = targ_handle; ++ open_reply->targ_reply_fn = targ_reply_fn; ++ open_reply->targ_reply_arg = targ_reply_arg; ++ open_reply->access_cookie = access_cookie; ++ open_reply->size = dset_size; ++ open_reply->version = dset_version; ++ ++ return (wmi_cmd_send_xtnd(wmip, osbuf, WMIX_DSETOPEN_REPLY_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ ++static A_STATUS ++wmi_get_pmkid_list_event_rx(struct wmi_t *wmip, A_UINT8 *datap, A_UINT32 len) ++{ ++ WMI_PMKID_LIST_REPLY *reply; ++ A_UINT32 expected_len; ++ ++ if (len < sizeof(WMI_PMKID_LIST_REPLY)) { ++ return A_EINVAL; ++ } ++ reply = (WMI_PMKID_LIST_REPLY *)datap; ++ expected_len = sizeof(reply->numPMKID) + reply->numPMKID * WMI_PMKID_LEN; ++ ++ if (len < expected_len) { ++ return A_EINVAL; ++ } ++ ++ A_WMI_PMKID_LIST_EVENT(wmip->wmi_devt, reply->numPMKID, ++ reply->pmkidList); ++ ++ return A_OK; ++} ++ ++#ifdef CONFIG_HOST_DSET_SUPPORT ++A_STATUS ++wmi_dset_data_reply(struct wmi_t *wmip, ++ A_UINT32 status, ++ A_UINT8 *user_buf, ++ A_UINT32 length, ++ A_UINT32 targ_buf, ++ A_UINT32 targ_reply_fn, ++ A_UINT32 targ_reply_arg) ++{ ++ void *osbuf; ++ WMIX_DSETDATA_REPLY_CMD *data_reply; ++ int size; ++ ++ size = sizeof(*data_reply) + length; ++ ++ A_DPRINTF(DBG_WMI, ++ (DBGFMT "Enter - length=%d status=%d\n", DBGARG, length, status)); ++ ++ osbuf = A_NETBUF_ALLOC(size); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ A_NETBUF_PUT(osbuf, size); ++ data_reply = (WMIX_DSETDATA_REPLY_CMD *)(A_NETBUF_DATA(osbuf)); ++ ++ data_reply->status = status; ++ data_reply->targ_buf = targ_buf; ++ data_reply->targ_reply_fn = targ_reply_fn; ++ data_reply->targ_reply_arg = targ_reply_arg; ++ data_reply->length = length; ++ ++ if (status == A_OK) { ++ if (a_copy_from_user(data_reply->buf, user_buf, length)) { ++ return A_ERROR; ++ } ++ } ++ ++ return (wmi_cmd_send_xtnd(wmip, osbuf, WMIX_DSETDATA_REPLY_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++#endif /* CONFIG_HOST_DSET_SUPPORT */ ++ ++A_STATUS ++wmi_set_wsc_status_cmd(struct wmi_t *wmip, A_UINT32 status) ++{ ++ void *osbuf; ++ char *cmd; ++ ++ wps_enable = status; ++ ++ osbuf = a_netbuf_alloc(sizeof(1)); ++ if (osbuf == NULL) { ++ return A_NO_MEMORY; ++ } ++ ++ a_netbuf_put(osbuf, sizeof(1)); ++ ++ cmd = (char *)(a_netbuf_to_data(osbuf)); ++ ++ A_MEMZERO(cmd, sizeof(*cmd)); ++ cmd[0] = (status?1:0); ++ return (wmi_cmd_send(wmip, osbuf, WMI_SET_WSC_STATUS_CMDID, ++ NO_SYNC_WMIFLAG)); ++} ++ +diff --git a/drivers/sdio/function/wlan/ar6000/wmi/wmi_doc.h b/drivers/sdio/function/wlan/ar6000/wmi/wmi_doc.h +new file mode 100644 +index 0000000..19cd938 +--- /dev/null ++++ b/drivers/sdio/function/wlan/ar6000/wmi/wmi_doc.h +@@ -0,0 +1,4421 @@ ++/* ++ * ++ * Copyright (c) 2004-2007 Atheros Communications Inc. ++ * All rights reserved. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation; ++ * ++ * Software distributed under the License is distributed on an "AS ++ * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or ++ * implied. See the License for the specific language governing ++ * rights and limitations under the License. ++ * ++ * ++ * ++ */ ++ ++ ++#if 0 ++Wireless Module Interface (WMI) Documentaion ++ ++ This section describes the format and the usage model for WMI control and ++ data messages between the host and the AR6000-based targets. The header ++ file include/wmi.h contains all command and event manifest constants as ++ well as structure typedefs for each set of command and reply parameters. ++ ++Data Frames ++ ++ The data payload transmitted and received by the target follows RFC-1042 ++ encapsulation and thus starts with an 802.2-style LLC-SNAP header. The ++ WLAN module completes 802.11 encapsulation of the payload, including the ++ MAC header, FCS, and WLAN security related fields. At the interface to the ++ message transport (HTC), a data frame is encapsulated in a WMI message. ++ ++WMI Message Structure ++ ++ The WMI protocol leverages an 802.3-style Ethernet header in communicating ++ the source and destination information between the host and the AR6000 ++ modules using a 14-byte 802.3 header ahead of the 802.2-style payload. In ++ addition, the WMI protocol adds a header to all data messages: ++ ++ { ++ INT8 rssi ++ The RSSI of the received packet and its units are shown in db above the ++ noise floor, and the noise floor is shown in dbm. ++ UINT8 info ++ Contains information on message type and user priority. Message type ++ differentiates between a data packet and a synchronization message. ++ } WMI_DATA_HDR ++ ++ User priority contains the 802.1d user priority info from host to target. Host ++ software translates the host Ethernet format to 802.3 format prior to Tx and ++ 802.3 format to host format in the Rx direction. The host does not transmit the ++ FCS that follows the data. MsgType differentiates between a regular data ++ packet (msgType=0) and a synchronization message (msgType=1). ++ ++Data Endpoints ++ ++ The AR6000 chipset provides several data endpoints to support quality of ++ service (QoS) and maintains separate queues and separate DMA engines for ++ each data endpoint. A data endpoint can be bi-directional. ++ ++ Best effort (BE) class traffic uses the default data endpoint (2). The host can ++ establish up to two additional data endpoints for other traffic classes. Once ++ such a data endpoint is established, it sends and receives corresponding QoS ++ traffic in a manner similar to the default data endpoint. ++ ++ If QoS is desired over the interconnect, host software must classify each data ++ packet and place it on the appropriate data endpoint. The information ++ required to classify data is generally available in-band as an 802.1p/q style ++ tag or as the ToS field in the IP header. The information may also be available ++ out-of-band depending on the host DDI. ++ ++Connection States ++ ++ Table B-1 describes the AR6000 WLAN connection states: ++ ++ Table B-1. AR6000 Connection States ++ ++Connection State ++ Description ++ ++ DISCONNECTED ++ In this state, the AR6000 device is not connected to a wireless ++ network. The device is in this state after reset when it sends the ++ WIRELESS MODULE “READY” EVENT, after it processes a ++ DISCONNECT command, and when it loses its link with the ++ access point (AP) that it was connected to. The device signals a ++ transition to the DISCONNECTED state with a “DISCONNECT” ++ event. ++ ++CONNECTED ++ In this state, the AR6000 device is connected to wireless networks. ++ The device enters this state after successfully processing a ++ CONNECT, which establishes a connection with a wireless ++ network. The device signals a transition to the CONNECTED state ++ with a “CONNECT” event. ++ ++ ++Message Types ++ ++ WMI uses commands, replies, and events for the control and configuration of ++ the AR6000 device. The control protocol is asynchronous. Table B-2 describes ++ AR6000 message types: ++ ++Table B-2. AR6000 Message Types ++ ++Message Type ++ Description ++ ++Commands ++ Control messages that flow from the host to the device ++ ++Replies/Events ++ Control messages that flow from the device to the host. ++ ++ The device issues a reply to some WMI commands, but not to others. ++ The payload in a reply is command-specific, and some commands do ++ not trigger a reply message at all. Events are control messages issued ++ by the device to signal the occurrence of an asynchronous event. ++ ++ ++WMI Message Format ++ ++ All WMI control commands, replies and events use the header format: ++ ++ WMI_CMD_HDR Header Format ++ { ++ UINT16 id ++ This 16-bit constant identifies which WMI command the host is issuing, ++ which command the target is replying to, or which event has occurred. ++ WMI_CMD_HDR ++ } ++ ++ ++ A variable-size command-, reply-, or event-specific payload follows the ++ header. Over the interconnect, all fields in control messages (including ++ WMI_CMD_HDR and the command specific payload) use 32-bit little Endian ++ byte ordering and fields are packed. The AR6000 device always executes ++ commands in order, and the host may send multiple commands without ++ waiting for previous commands to complete. A majority of commands are ++ processed to completion once received. Other commands trigger a longer ++ duration activity whose completion is signaled to the host through an event. ++ ++Command Restrictions ++ ++ Some commands may only be issued when the AR6000 device is in a certain ++ state. The host is required to wait for an event signaling a state transition ++ before such a command can be issued. For example, if a command requires ++ the device to be in the CONNECTED state, then the host is required to wait ++ for a “CONNECT” event before it issues that command. ++ ++ The device ignores any commands inappropriate for its current state. If the ++ command triggers a reply, the device generates an error reply. Otherwise, the ++ device silently ignores the inappropriate command. ++ ++Command and Data Synchronization ++ ++ WMI provides a mechanism for a host to advise the device of necessary ++ synchronization between commands and data. The device implements ++ synchronization; no implicit synchronization exists between endpoints. ++ ++ The host controls synchronization using the “SYNCHRONIZE” command ++ over the control channel and synchronization messages over data channels. ++ The device stops each data channel upon receiving a synchronization message ++ on that channel, processing all data packets received prior to that message. ++ After the device receives synchronization messages for each data endpoint ++ and the “SYNCHRONIZE” command, it resumes all channels. ++ ++ When the host must guarantee a command executes before processing new ++ data packets, it first issues the command, then issues the “SYNCHRONIZE” ++ command and sends synchronization messages on data channels. When the ++ host must guarantee the device has processed all old data packets before a ++ processing a new command, it issues a “SYNCHRONIZE” command and ++ synchronization messages on all data channels, then issues the desired ++ command. ++ ++ ++ ++WMI Commands ++ ++ ADD_BAD_AP ++ Cause the AR6000 device to avoid a particular AP ++ ADD_CIPHER_KEY ++ Add or replace any of the four AR6000 encryption keys ++ ADD_WOW_PATTERN ++ Used to add a pattern to the WoW pattern list ++ CLR_RSSI_SNR ++ Clear the current calculated RSSI and SNR value ++ CONNECT_CMD ++ Request that the AR6000 device establish a wireless connection ++ with the specified SSID ++ CREATE_PSTREAM ++ Create prioritized data endpoint between the host and device ++ DELETE_BAD_AP ++ Clear an entry in the bad AP table ++ DELETE_CIPHER_KEY ++ Delete a previously added cipher key ++ DELETE_PSTREAM ++ Delete a prioritized data endpoint ++ DELETE_WOW_PATTERN ++ Remove a pre-specified pattern from the WoW pattern list ++ EXTENSION ++ WMI message interface command ++ GET_BIT_RATE ++ Retrieve rate most recently used by the AR6000 ++ GET_CHANNEL_LIST ++ Retrieve list of channels used by the AR6000 ++ GET_FIXRATES ++ Retrieves the rate-mask set via the SET_FIXRATES command. ++ GET_PMKID_LIST_CMD ++ Retrieve the firmware list of PMKIDs ++ GET_ROAM_DATA ++ Internal use for data collection; available in special build only ++ GET_ROAM_TBL ++ Retrieve the roaming table maintained on the target ++ GET_TARGET_STATS ++ Request that the target send the statistics it maintains ++ GET_TX_PWR ++ Retrieve the current AR6000 device Tx power levels ++ GET_WOW_LIST ++ Retrieve the current list of WoW patterns ++ LQ_THRESHOLD_PARAMS ++ Set the link quality thresholds ++ OPT_TX_FRAME ++ Send a special frame (special feature) ++ RECONNECT ++ Request a reconnection to a BSS ++ RSSI_THRESHOLD_PARAMS ++ Configure how the AR6000 device monitors and reports signal ++ strength (RSSI) of the connected BSS ++ SCAN_PARAMS ++ Determine dwell time and changes scanned channels ++ SET_ACCESS_PARAMS ++ Set access parameters for the wireless network ++ SET_ADHOC_BSSID ++ Set the BSSID for an ad hoc network ++ SET_AKMP_PARAMS ++ Set multiPMKID mode ++ SET_APPIE ++ Add application-specified IE to a management frame ++ SET_ASSOC_INFO ++ Specify the IEs the device should add to association or ++ reassociation requests ++ SET_AUTH_MODE ++ Set 802.11 authentication mode of reconnection ++ SET_BEACON_INT ++ Set the beacon interval for an ad hoc network ++ SET_BIT_RATE ++ Set the AR6000 to a specific fixed bit rate ++ SET_BMISS_TIME ++ Set the beacon miss time ++ SET_BSS_FILTER ++ Inform the AR6000 of network types about which it wants to ++ receive information using a “BSSINFO” event ++ SET_BT_PARAMS ++ Set the status of a Bluetooth stream (SCO or A2DP) or set ++ Bluetooth coexistence register parameters ++ SET_BT_STATUS ++ Set the status of a Bluetooth stream (SCO or A2DP) ++ SET_CHANNEL_PARAMETERS ++ Configure WLAN channel parameters ++ SET_DISC_TIMEOUT ++ Set the amount of time the AR6000 spends attempting to ++ reestablish a connection ++ SET_FIXRATES ++ Set the device to a specific fixed PHY rate (supported subset) ++ SET_HALPARAM ++ Internal AR6000 command to set certain hardware parameters ++ SET_HOST_SLEEP_MODE ++ Set the host mode to asleep or awake ++ SET_IBSS_PM_CAPS ++ Support a non-standard power management scheme for an ++ ad hoc network ++ SET_LISTEN_INT ++ Request a listen interval ++ SET_LPREAMBLE ++ Override the short preamble capability of the AR6000 device ++ SET_MAX_SP_LEN ++ Set the maximum service period ++ SET_OPT_MODE ++ Set the special mode on/off (special feature) ++ SET_PMKID ++ Set the pairwise master key ID (PMKID) ++ SET_PMKID_LIST_CMD ++ Configure the firmware list of PMKIDs ++ SET_POWER_MODE ++ Set guidelines on trade-off between power utilization ++ SET_POWER_PARAMS ++ Configure power parameters ++ SET_POWERSAVE_PARAMS ++ Set the two AR6000 power save timers ++ SET_PROBED_SSID ++ Provide list of SSIDs the device should seek ++ SET_REASSOC_MODE ++ Specify whether the disassociated frame should be sent upon ++ reassociation ++ SET_RETRY_LIMITS ++ Limit how many times the device tries to send a frame ++ SET_ROAM_CTRL ++ Control roaming behavior ++ SET_RTS ++ Determine when RTS should be sent ++ SET_SCAN_PARAMS ++ Set the AR6000 scan parameters ++ SET_TKIP_COUNTERMEASURES ++ Enable/disable reports of TKIP MIC errors ++ SET_TX_PWR ++ Specify the AR6000 device Tx power levels ++ SET_VOICE_PKT_SIZE ++ Set voice packet size ++ SET_WMM ++ Override the AR6000 WMM capability ++ SET_WMM_TXOP ++ Configure TxOP bursting when sending traffic to a WMM- ++ capable AP ++ SET_WOW_MODE ++ Enable/disable WoW mode ++ SET_WSC_STATUS ++ Enable/disable profile check in cserv when the WPS protocol ++ is in progress ++ SNR_THRESHOLD_PARAMS ++ Configure how the device monitors and reports SNR of BSS ++ START_SCAN ++ Start a long or short channel scan ++ SYNCHRONIZE ++ Force a synchronization point between command and data ++ paths ++ TARGET_REPORT_ERROR_BITMASK ++ Control “ERROR_REPORT” events from the AR6000 ++ ++ ++ ++ ++Name ++ ADD_BAD_AP ++ ++Synopsis ++ The host uses this command to cause the AR6000 to avoid a particular AP. The ++ AR6000 maintain a table with up to two APs to avoid. An ADD_BAD_AP command ++ adds or replaces the specified entry in this bad AP table. ++ ++ If the AR6000 are currently connected to the AP specified in this command, they ++ disassociate. ++ ++Command ++ wmiconfig eth1 --badap ++ ++Command Parameters ++ UINT8 badApIndex Index [0...1] that identifies which entry in the ++ bad AP table to use ++ ++ ++ UINT8 bssid[6] MAC address of the AP to avoid ++ ++Command Values ++ badApIndex = 0, 1 Entry in the bad AP table to use ++ ++Reset Value ++ The bad AP table is cleared ++ ++Restrictions ++ None ++ ++See Also ++ “DELETE_BAD_AP” on page B-13 ++ ++===================================================================== ++Name ++ ADD_CIPHER_KEY ++ ++Synopsis ++ The host uses this command to add/replace any of four encryption keys on the ++ AR6000. The ADD_CIPHER_KEY command is issued after the CONNECT event ++ has been received by the host for all dot11Auth modes except for SHARED_AUTH. ++ When the dot11AuthMode is SHARED_AUTH, then the ADD_CIPHER_KEY ++ command should be issued before the “CONNECT” command. ++ ++Command ++ wmiconfig eth1 --cipherkey ++ ++ ++Command Parameters ++ UINT8 keyIndex Index (0...3) of the key to add/replace; ++ uniquely identifies the key ++ UINT8 keyType CRYPTO_TYPE ++ UINT8 keyUsage Specifies usage parameters of the key when ++ keyType = WEP_CRYPT ++ UINT8 keyLength Length of the key in bytes ++ UINT8 keyOpCtrl bit[0] = Initialize TSC (default), ++ bit[1] = Initialize RSC ++ UINT8 keyRSC[8] Key replay sequence counter (RSC) initial ++ value the device should use ++ UINT8 key[32] Key material used for this connection ++ Command Values ++ { ++ NONE_CRYPT = 1 ++ WEP_CRYPT = 2 ++ TKIP_CRYPT = 3 ++ AES_CRYPT = 4 ++ KEY_OP_INIT_TSC 0x01 ++ KEY_OP_INIT_RSC 0x02 ++ KEY_OP_INIT_VAL 0x03 ++ Default is to Initialize the TSC ++ KEY_OP_VALID_MASK 0x04 ++ Two operations defined ++ } CRYPTO_TYPE ++ ++ { ++ PAIRWISE_USAGE = 0 Set if the key is used for unicast traffic only ++ GROUP_USAGE = 1 Set if the key is used to receive multicast ++ traffic (also set for static WEP keys) ++ TX_USAGE = 2 Set for the GROUP key used to transmit frames ++ All others are reserved ++ } KEY_USAGE ++ ++Reset Value ++ The four available keys are disabled. ++ ++Restrictions ++ The cipher should correspond to the encryption mode specified in the “CONNECT” ++ command. ++ ++See Also ++ “DELETE_CIPHER_KEY” ++ ++===================================================================== ++ ++ ++Name ++ ADD_WOW_PATTERN ++ ++Synopsis ++ The host uses this command to add a pattern to the WoW pattern list; used for ++ pattern-matching for host wakeups by the WoW module. If the host mode is asleep ++ and WoW is enabled, all packets are matched against the existing WoW patterns. If a ++ packet matches any of the patterns specified, the target will wake up the host. All ++ non-matching packets are discarded by the target without being sent up to the host. ++ ++Command ++ wmiconfig –addwowpattern ++ ++ ++Command Parameters ++ A_UINT8 filter_list_id ID of the list that is to include the new pattern ++ A_UINT8 filter_size Size of the new pattern ++ A_UINT8 filter_offset Offset at which the pattern matching for this ++ new pattern should begin at ++ A_UINT8 filter[1] Byte stream that contains both the pattern and ++ the mask of the new WoW wake-up pattern ++ ++Reply Parameters ++ None ++ ++Reset Value ++ None defined (default host mode is awake) ++ ++Restrictions ++ None ++ ++See Also ++ “DELETE_WOW_PATTERN” ++ ++===================================================================== ++ ++ ++Name ++ CLR_RSSI_SNR ++ ++Synopsis ++ Clears the current calculated RSSI and SNR value. RSSI and SNR are reported by ++ running-average value. This command will clear the history and have a fresh start ++ for the running-average mechanism. ++ ++Command ++ wmiconfig eth1 --cleanRssiSnr ++ ++Command Parameters ++ None ++ ++Reply Parameters ++ None ++ ++Reset Value ++ None defined ++ ++Restrictions ++ None ++ ++===================================================================== ++ ++Name ++ CONNECT_CMD ++ ++Synopsis ++ New connect control information (connectCtrl) is added, with 32 possible modifiers. ++ ++ CONNECT_SEND_REASSOC ++ Valid only for a host-controlled connection to a ++ particular AP. If this bit is set, a reassociation frame is ++ sent. If this bit is clear, an association request frame is ++ sent to the AP. ++ ++ CONNECT_IGNORE_WPAx_GROUP_CIPHER ++ No group key is issued in the CONNECT command, ++ so use the group key advertised by the AP. In a target- ++ initiated roaming situation this allows a STA to roam ++ between APs that support different multicast ciphers. ++ ++ CONNECT_PROFILE_MATCH_DONE ++ In a host-controlled connection case, it is possible that ++ during connect, firmware may not have the ++ information for a profile match (e.g, when the AP ++ supports hidden SSIDs and the device may not ++ transmit probe requests during connect). By setting ++ this bit in the connection control information, the ++ firmware waits for a beacon from the AP with the ++ BSSID supplied in the CONNECT command. No ++ additional profile checks are done. ++ ++ CONNECT_IGNORE_AAC_BEACON ++ Ignore the Admission Capacity information in the ++ beacon of the AP ++ ++ CONNECT_ASSOC_POLICY_USER ++ When set, the CONNECT_SEND_REASSOC setting ++ determines if an Assoc or Reassoc is sent to an AP ++ ++Command ++ wmiconfig --setconnectctrl ++ ++Command Parameters ++ typedef struct{ ++ A_UINT8 networktype; ++ A_UINT8 dot11authmode; ++ A_UINT8 authmode; ++ A_UINT8 pairwiseCryptoType; /*CRYPTO_TYPE*/ ++ A_UINT8 pairwiseCryptoLen; ++ A_UINT8 groupCryptoType; /*CRYPTO_TYPE*/ ++ A_UINT8 groupCryptoLen; ++ A_UINT8 ssidLength; ++ A_UCHAR ssid[WMI_MAX_SSID_LEN]; ++ A_UINT16 channel; ++ A_UINT8 bssid[AUTH_MAC_LEN]; ++ A_UINT8 ctrl_flags; /*WMI_CONNECT_CTRL_FLAGS_BITS*/ ++ } WMI_CONNECT_CMD; ++ ++ ctrl flags bitmask ++ = 0x0001 CONNECT_ASSOC_POLICY_USER ++ Assoc frames are sent using the policy specified by ++ the flag ++ = 0x0002 CONNECT_SEND_REASSOC ++ Send Reassoc frame while connecting, otherwise send ++ assoc frames ++ = 0x0004 CONNECT_IGNORE_WPAx_GROUP_CIPHER ++ Ignore WPAx group cipher for WPA/WPA2 ++ = 0x0008 CONNECT_PROFILE_MATCH_DONE ++ Ignore any profile check ++ = 0x0010 CONNECT_IGNORE_AAC_BEACON ++ Ignore the admission control information in the ++ beacon ++ ... CONNECT_CMD, continued ++ Command Values ++ typedef enum { ++ INFRA_NETWORK = 0x01, ++ ADHOC_NETWORK = 0x02, ++ ADHOC_CREATOR = 0x04, ++ } NETWORK_TYPE; ++ ++ typedef enum { ++ OPEN_AUTH = 0x01, ++ SHARED_AUTH = 0x02, ++ LEAP_AUTH = 0x04, ++ } DOT11_AUTH_MODE; ++ typedef enum { ++ NONE_AUTH = 0x01, ++ WPA_AUTH = 0x02, ++ WPA_PSK_AUTH = 0x03, ++ WPA2_AUTH = 0x04, ++ WPA2_PSK_AUTH = 0x05, ++ WPA_AUTH_CCKM = 0x06, ++ WPA2_AUTH_CCKM = 0x07, ++ } AUTH_MODE; ++ typedef enum { ++ NONE_CRYPT = 0x01, ++ WEP_CRYPT = 0x02, ++ TKIP_CRYPT = 0x03, ++ AES_CRYPT = 0x04, ++ } CRYPTO_TYPE; ++ typedef enum { ++ CONNECT_ASSOC_POLICY_USER = 0x0001, ++ CONNECT_SEND_REASSOC = 0x0002, ++ CONNECT_IGNORE_WPAx_GROUP_CIPHER = 0x0004, ++ CONNECT_PROFILE_MATCH_DONE = 0x0008, ++ CONNECT_IGNORE_AAC_BEACON = 0x0010, ++ } WMI_CONNECT_CTRL_FLAGS_BITS; ++ ++ pairwiseCryptoLen and groupCryptoLen are valid when the respective ++ CryptoTypesis WEP_CRYPT, otherwise this value should be 0. This is the length in ++ bytes. ++ ++Reset Value ++ None defined ++ ++Restrictions ++ None ++ ++===================================================================== ++ ++ ++Name ++ CREATE_PSTREAM ++ ++Synopsis ++ The host uses this command to create a new prioritized data endpoint between the ++ host and the AR6000 device that carries a prioritized stream of data. If the AP that the ++ device connects to requires TSPEC stream establishment, the device requests the ++ corresponding TSPEC with the AP. The maximum and minimum service interval ++ ranges from 0 – 0x7FFFFFFF (ms), where 0 = disabled. The device does not send a ++ reply event for this command, as it is always assumed the command has succeeded. ++ An AP admission control response comes to the host via a WMI_CAC_INDICATION ++ event, once the response for the ADDTS frame comes. ++ ++ Examples of cases where reassociation is generated (when WMM) and cases where ++ ADDTS is generated (when WMM and enabling ACM) are when: ++ Changing UAPSD flags in WMM mode, reassociation is generated ++ Changing the interval of sending auto QoS Null frame in WMM mode; ++ reassociation is not generated ++ Issuing a command with same previous parameters in WMM mode and enabling ++ ACM, an ADDTS request is generated ++ Changing the interval of a QoS null frame sending in WMM mode and enabling ++ ACM, an ADDTS request is generated ++ Issuing the command in disconnected state, reassociation or ADDTS is not ++ generated but the parameters are available after (re)association ++ ++Command ++ --createqos ++ ++ where: ++ ++ ++ 802.1D user priority range (0–7) ++ ++ = 0 Tx (uplink) traffic ++ = 1 Rx (downlink) traffic ++ = 2 Bi-directional traffic ++ ++ = 1 BK ++ = 2 VI ++ = 3 VO ++ ++ = 0 Aperiodic ++ = 1 Periodic ++ ++ Specifies whether the voice power save mechanism ++ (APSD if AP supports it or legacy/simulated APSD ++ [using PS-Poll]) should be used ++ = 0 Disable voice power save for traffic class ++ = 1 Enable APSD voice power save for traffic class ++ = 2 Enable voice power save for all traffic classes ++ ++ (In ms) ++ ++ Inactivity interval (in ms) (0 = Infinite) ++ ++ (In ms) ++ ++ Service start time ++ ++ TSID range (0–15) ++ ++ Nominal MAC SDU size ++ ++ Maximum MAC SDU size ++ ++ Minimum data rate (in bps) ++ ++ Mean data rate (in bps) ++ ++ Peak data rate (in bps) ++ ++ Maximum burst size (in bps) ++ ++ Delay bound ++ ++ Minimum PHY rate (in bps) ++ ++ Surplus bandwidth allowance ++ ++ Medium time in TU of 32-ms periods per sec ++ ... CREATE_PSTREAM (continued) ++ ++Command Parameters ++ UINT8 trafficClass TRAFFIC_CLASS value ++ UINT8 traffic ++ Direction ++ DIR_TYPE value ++ UINT8 rxQueueNum ++ AR6000 device mailbox index (2 or 3) ++ corresponding to the endpoint the host ++ wishes to use to receive packets for the ++ prioritized stream ++ UINT8 trafficType TRAFFIC_TYPE value ++ UINT8 voicePS ++Capability ++ VOICEPS_CAP_TYPE value ++ UINT8 tsid Traffic stream ID ++ UINT8 userPriority 802.1D user priority ++ UINT16 nominalMSDU Nominal MSDU in octets ++ UINT16 maxMSDU Maximum MSDU in octets ++ UINT32 minServiceInt Minimum service interval: the min. ++ period of traffic specified (in ms) ++ UINT32 maxServiceInt Maximum service interval: the max. ++ period of traffic specified (in ms) ++ UINT32 inactivityInt Indicates how many ms an established ++ stream is inactive before the prioritized ++ data endpoint is taken down and the ++ corresponding T-SPEC deleted ++ UINT32 suspensionInt Suspension interval (in ms) ++ UINT32 service StartTime Service start time ++ UINT32 minDataRate Minimum data rate (in bps) ++ UINT32 meanDataRate Mean data rate (in bps) ++ UINT32 peakDataRate Peak data rate (in bps) ++ UINT32 maxBurstSize ++ UINT32 delayBound ++ UINT32 minPhyRate Minimum PHY rate for TSPEC (in bps) ++ UINT32 sba Surplus bandwidth allowance ++ UINT32 mediumTime Medium TSPEC time (in units of 32 ms) ++Command Values ++ { ++ WMM_AC_BE = 0 Best Effort ++ WMM_AC_BK = 1 Background ++ WMM_AC_VI = 2 Video ++ WMM_AC_VO = 3 Voice ++ All other values reserved ++ } TRAFFIC_CLASS ++ { ++ UPLINK_TRAFFIC = 0 From the AR6000 device to the AP ++ DOWNLINK_TRAFFIC = 1 From the AP to the AR6000 device ++ BIDIR_TRAFFIC = 2 Bi-directional traffic ++ All other values reserved ++ } DIR_TYPE ++ { ++ DISABLE_FOR_THIS_AC = 0 ++ ENABLE_FOR_THIS_AC = 1 ++ ENABLE_FOR_ALL_AC = 2 ++ All other values reserved ++ } VOICEPS_CAP_TYPE ++ ++ ... CREATE_PSTREAM (continued) ++ ++ ++ VI BE BK Supported, Y/N? ++ 0 0 0 0 Y ++ 0 0 0 1 Y ++ 0 0 1 0 N ++ 0 0 1 1 N ++ 0 1 0 0 Y ++ 0 1 0 1 Y ++ 0 1 1 0 N ++ 0 1 1 1 N ++ 1 0 0 0 Y ++ 1 0 0 1 Y ++ 1 0 1 0 N ++ 1 1 0 0 N ++ 1 1 0 1 Y ++ 1 1 0 0 N ++ 1 1 1 0 N ++ 1 1 1 1 Y ++ ++Reset Value ++ No pstream is present after reset; each of the BE, BK, VI,VO pstreams must be created ++ (either implicitly by data flow or explicitly by user) ++ ++Restrictions ++ This command can only be issued when the device is in the CONNECTED state. If ++ the device receives the command while in DISCONNECTED state, it replies with a ++ failure indication. At most four prioritized data endpoints can be created, one for ++ each AC. ++ ++See Also ++ “DELETE_PSTREAM” ++===================================================================== ++ ++Name ++ DELETE_BAD_AP ++ ++Synopsis ++ The host uses this command to clear a particular entry in the bad AP table ++ ++Command ++ wmiconfig eth1 --rmAP [--num=] // used to clear a badAP ++ entry. num is index from 0-3 ++ ++Command Parameters ++ UINT8 badApIndex Index [0...n] that identifies the entry in the bad ++ AP table to delete ++ ++Command Values ++ badApIndex = 0, 1, 2, 3 ++ Entry in the bad AP table ++ ++Reset Value ++ None defined ++ ++Restrictions ++ None ++ ++See Also ++ “ADD_BAD_AP” ++ ++===================================================================== ++ ++ ++Name ++ DELETE_CIPHER_KEY ++ ++Synopsis ++ The host uses this command to delete a key that was previously added with the ++ “ADD_CIPHER_KEY” command. ++ ++Command ++ TBD ++ ++Command Parameters ++ UINT8 keyIndex Index (0...3) of the key to be deleted ++ ++Command Values ++ keyIndex = 0, 1,2, 3 Key to delete ++ ++Reset Value ++ None ++ ++Restrictions ++ The host should not delete a key that is currently in use by the AR6000. ++ ++See Also ++ “ADD_CIPHER_KEY” ++ ++===================================================================== ++ ++Name ++ DELETE_PSTREAM ++ ++Synopsis ++ The host uses this command to delete a prioritized data endpoint created by a ++ previous “CREATE_PSTREAM” command ++ ++Command ++ --deleteqos , where: ++ ++ ++ = 0 BE ++ = 1 BK ++ = 2 VI ++ = 3 VO ++ ++ The TSpec ID; use the -qosqueue option ++ to get the active TSpec IDs for each traffic class ++ ++Command Parameters ++ A_UINT8 trafficClass Indicate the traffic class of the stream ++ being deleted ++ ++Command Values ++ { ++ WMM_AC_BE = 0 Best effort ++ WMM_AC_BK = 1 Background ++ WMM_AC_VI = 2 Video ++ WMM_AC_VO = 3 Voice ++ } TRAFFIC CLASS ++ ++ 0-15 for TSID ++ ++Reply Values ++ N/A ++ ++Restrictions ++ This command should only be issued after a “CREATE_PSTREAM” command has ++ successfully created a prioritized stream ++ ++See Also ++ “CREATE_PSTREAM” ++ ++===================================================================== ++ ++ ++Name ++ DELETE_WOW_PATTERN ++ ++Synopsis ++ The host uses this command to remove a pre-specified pattern from the ++ WoW pattern list. ++ ++Command ++ wmiconfig –delwowpattern ++ ++Command Parameters ++ A_UINT8 filter_list_id ID of the list that contains the WoW filter ++ pattern to delete ++ A_UINT8 filter_id ID of the WoW filter pattern to delete ++ ++Reply Parameters ++ None ++ ++ ++ ++Reset Value ++ None defined ++ ++Restrictions ++ None ++ ++See Also ++ “ADD_WOW_PATTERN” ++ ++===================================================================== ++ ++ ++Name ++ EXTENSION ++ ++Synopsis ++ The WMI message interface is used mostly for wireless control messages to a wireless ++ module applicable to wireless module management regardless of the target platform ++ implementation. However, some commands only peripherally related to wireless ++ management are desired during operation. These wireless extension commands may ++ be platform-specific or implementation-dependent. ++ ++Command ++ N/A ++ ++Command Parameters ++ Command-specific ++ ++Command Values ++ Command-specific ++ ++Reply Parameters ++ Command-specific ++ ++Reset Values ++ None defined ++ ++Restrictions ++ None defined ++ ++===================================================================== ++ ++ ++Name ++ GET_BIT_RATE ++ ++Synopsis ++ Used by the host to obtain the rate most recently used by the AR6000 device ++ ++Command ++ wmiconfig eth1 --getfixrates ++ ++Command Parameters ++ None ++ ++ ++ ++Reply Parameters ++ INT8 ++ rateIndex ++ See the “SET_BIT_RATE” command ++ ++Reset Values ++ None ++ ++Restrictions ++ This command should only be used during development/debug; it is not intended ++for use in production. It is only valid when the device is in the CONNECTED state ++ ++See Also ++ “SET_BIT_RATE” ++ ++===================================================================== ++ ++ ++Name ++ GET_CHANNEL_LIST ++ ++Synopsis ++ Used by the host uses to retrieve the list of channels that can be used by the device ++ while in the current wireless mode and in the current regulatory domain. ++ ++Command ++ TBD ++ ++Command Parameters ++ None ++ ++Reply Parameters ++ UINT8 reserved Reserved ++ UINT8 numberOfChannels Number of channels the reply contains ++ UINT16 channelList[numberOfChannels] Array of channel frequencies (in MHz) ++ ++Reset Values ++ None defined ++ ++Restrictions ++ The maximum number of channels that can be reported are 32 ++ ++===================================================================== ++ ++ ++Name ++ GET_FIXRATES ++ ++Synopsis ++ Clears the current calculated RSSI and SNR value. RSSI and SNR are reported by ++ running-average value. This command will clear the history and have a fresh start for ++ the running-average mechanism. ++ ++Synopsis ++ This returns rate-mask set via WMI_SET_FIXRATES to retrieve the current fixed rate ++ that the AR6001 or AR6001 is using. See “SET_FIXRATES”. ++ ++Command ++ wmiconfig eth1 --getfixrates ++ ++Command Parameters ++ A_UINT16 fixRateMask; Note: if this command is used prior to ++ using WMI_SET_FIXRATES, AR6000 ++ returns 0xffff as fixRateMask, indicating ++ all the rates are enabled ++ ++Reply Parameters ++ None ++ ++Reset Value ++ None defined ++ ++Restrictions ++ None ++ ++See Also ++ “SET_FIXRATES” ++ ++===================================================================== ++ ++ ++ ++Name ++ GET_PMKID_LIST_CMD ++ ++Synopsis ++ Retrieves the list of PMKIDs on the firmware. The ++ WMI_GET_PMKID_LIST_EVENT is generated by the firmware. ++ ++Command ++ TBD ++ ++Command Parameters ++ ++Reset Values ++ None ++ ++Restrictions ++ None ++ ++See Also ++ SET_PMKID_LIST_CMD GET_PMKID_LIST_EVENT ++ ++===================================================================== ++ ++ ++Name ++ GET_ROAM_TBL ++ ++Synopsis ++ Retrieve the roaming table maintained on the target. The response is reported ++ asynchronously through the ROAM_TBL_EVENT. ++ ++Command ++ wmiconfig --getroamtable ++ ++Command Parameters ++ A_UINT8 roamCtrlType; ++ A_UINT16 roamMode ++ A_UINT16 numEntries ++ WMI_BSS_ROAM_INFO bssRoamInfo[1] ++ ++Reply Value ++ Reported asynchronously through the ROAM_TBL_EVENT ++ ++Reset Value ++ None defined ++ ++Restrictions ++ None ++ ++See Also ++ SET_KEEPALIVE ++ ++===================================================================== ++ ++ ++Name ++ GET_TARGET_STATS ++ ++Synopsis ++ The host uses this command to request that the target send the statistics that it ++ maintains. The statistics obtained from the target are accrued in the host every time ++ the GET_TARGET_STATS command is issued. The --clearStats option is added to ++ clear the target statistics maintained in the host. ++ ++Command ++ wmiconfig --getTargetStats --clearStats ++ ++Command Parameters ++ TARGET_STATS targetStats ++ WMI_TARGET_STATS ++ UINT8 clearStats ++ ++ ++Reply Value ++ RSSI return value (0–100) ++ ++Reset Values ++ All statistics are cleared (zeroed) ++ ++Restrictions ++ The --getTargetStats option must be used; the --clearStats option is also available also ++ ++ ++===================================================================== ++ ++Name ++ GET_TX_PWR ++ ++Synopsis ++ The host uses this command to retrieve the current Tx power level ++ ++Command ++ wmiconfig -i eth1 --getpower ++ ++Command Parameters ++ None ++ ++Reply Parameters ++ UINT16 dbM The current Tx power level specified in dbM ++ ++Reset Values ++ The maximum permitted by the regulatory domain ++ ++Restrictions ++ None ++ ++See Also ++ “SET_TX_PWR” ++ ++===================================================================== ++ ++ ++Name ++ GET_WOW_LIST ++ ++Synopsis ++ The host uses this command to retrieve the current list of WoW patterns. ++ ++Command ++ wmiconfig –getwowlist ++ ++Command Parameters ++ A_UINT8 filter_list_id ID of the list of WoW patterns to retrieve ++ ++Reply Value(s) ++ A_UINT16 num_filters Number of WoW patterns contained in the list ++ A_UINT8 wow_mode Current mode of WoW (enabled or disabled) ++ A_UINT8 host_mode Current host mode (asleep or awake) ++ WOW_FILTER wow_filters[1] ++ Contents of the WoW filter pattern list ++ (contains mask, pattern, offset and size ++ information for each of the patterns) ++ ++Reset Value ++ None defined ++ ++Restrictions ++ None ++ ++See Also ++ “SET_WSC_STATUS” ++ ++===================================================================== ++ ++ ++Name ++ LQ_THRESHOLD_PARAMS ++ ++Synopsis ++ Sets Link Quality thresholds, the sampling will happen at every unicast data frame ++ Tx if a certain threshold is met, and the corresponding event will be sent to the host. ++ ++Command ++ --lqThreshold ... ++ ... ++ ++Command Parameters ++ = 0 Disable link quality sampling ++ = 1 Enable link quality sampling ++ Above thresholds (value in [0,100]), in ++ ascending order ++ Below thresholds (value in [0,100]), in ++ ascending order ++ ++Command Values ++ See command parameters ++ ++Reset Value ++ None defined ++ ++Restrictions ++ None ++ ++===================================================================== ++ ++ ++Name ++ OPT_TX_FRAME ++ ++Synopsis ++ Special feature, sends a special frame. ++ ++Command ++ wmiconfig --sendframe ++ ++ ++Command Parameters ++ { ++ A_UINT16 optIEDataLen; ++ A_UINT8 frmType; ++ A_UINT8 dstAddr[ATH_MAC_LEN]; ++ A_UINT8 bssid[ATH_MAC_LEN]; ++ A_UINT8 optIEData[1]; ++ } WMI_OPT_TX_FRAME_CMD; ++ ++Command Values ++ = 1 Probe request frame ++ = 2 Probe response frame ++ = 3 CPPP start ++ = 4 CPPP stop ++ ++Reset Value ++ None defined ++ ++Restrictions ++ Send a special frame only when special mode is on. ++ ++===================================================================== ++ ++ ++Name ++ RECONNECT ++ ++Synopsis ++ This command requests a reconnection to a BSS to which the AR6000 device was ++ formerly connected ++ ++Command ++ TBD ++ ++Command Parameters ++ UINT16 channel Provides a hint as to which channel was ++ used for a previous connection ++ UINT8 bssid[6] If set, indicates which BSSID to connect to ++ ++Command Values ++ None ++ ++Reset Values ++ None ++ ++Restrictions ++ None ++ ++See Also ++ “CONNECT_CMD” ++ ++===================================================================== ++ ++ ++Name ++ RSSI_THRESHOLD_PARAMS ++ ++Synopsis ++ Configures how the AR6000 device monitors and reports signal strength (RSSI) of the ++ connected BSS, which is used as a link quality metric. The four RSSI threshold sets (in ++ dbM) of the host specification divide the signal strength range into six segments. ++ When signal strength increases or decreases across one of the boundaries, an ++ RSSI_THRESHOLD event is signaled to the host. The host may then choose to take ++ action (such as influencing roaming). ++ ++Command ++ wmiconfig eth1 --rssiThreshold ++ ... ++ ++ ... ++ ++ ++Command Parameters ++ UINT8 weight Range in [1, 16] used to calculate average RSSI ++ UINT32 pollTime RSSI (signal strength) sampling frequency in ++ seconds (if pollTime = 0, single strength ++ sampling is disabled) ++ USER_RSS__THOLD tholds[12] Thresholds (6 x 2) ++ ++Command Values ++ None defined ++ ++Reset Values ++ pollTime is 0, and sampling is disabled ++ ++Restrictions ++ Can only be issued if the AR6000 device is connected ++ ++ ++===================================================================== ++ ++Name ++ SCAN_PARAMS ++ ++Synopsis ++ The minact parameter determines the minimum active channel dwell time, within ++ which if the STA receives any beacon, it remains on that channel until the maxact ++ channel dwell time. If the STA does not receive a beacon within the minact dwell ++ time, it switches to scan the next channel. ++ ++Command ++ wmiconfig -scan -minact= --maxact= ++ ++Command Parameters ++ UINT16 maxact Channel dwell time (in ms), default = 0 ++ UINT16 minact Channel dwell time (in ms), default = 105 ++ ++Command Values ++ See channel parameters ++ ++Reset Values ++ None defined ++ ++Restrictions ++ The minact value should be greater than 0; maxact should be between 5–65535 ms ++ and greater than minact ++ ++===================================================================== ++ ++ ++Name ++ SET_ACCESS_PARAMS ++ ++Synopsis ++ Allows the host to set access parameters for the wireless network. A thorough ++ understanding of IEEE 802.11 is required to properly manipulate these parameters. ++ ++Command ++ wmiconfig eth1 --acparams --txop --cwmin <0-15> ++ --cwmax <0-15> --aifsn<0-15> ++ ++Command Parameters ++ UINT16 txop The maximum time (expressed in units of ++ 32 ms) the device can spend transmitting ++ after acquiring the right to transmit ++ UINT8 eCWmin Minimum contention window ++ UINT8 eCWmax Maximum contention window ++ UINT8 aifsn The arbitration inter-frame space number ++ ++Command Values ++ None ++ ++Reset Values ++ Reasonable defaults that vary, between endpoints (prioritized streams) ++ ++Restrictions ++ None ++ ++===================================================================== ++ ++ ++Name ++ SET_ADHOC_BSSID ++ ++Synopsis ++ Allows the host to set the BSSID for an ad hoc network. If a network with this BSSID ++ is not found, the target creates an ad hoc network with this BSSID after the connect ++ WMI command is triggered (e.g., by the SIOCSIWESSID IOCTL). ++ ++Command ++ wmiconfig eth1 --adhocbssid ++ ++Command Parameters ++ A_UINT8 bssid[ATH_MAC_LEN] BSSID is specified in xx:xx:xx:xx:xx:xx format ++ ++Command Values ++ None ++ ++Reset Values ++ None ++ ++Restrictions ++ None ++ ++===================================================================== ++ ++ ++Name ++ SET_AKMP_PARAMS ++ ++Synopsis ++ Enables or disables multi PMKID mode. ++ ++Command ++ wmiconfig eth1 --setakmp --multipmkid= ++ ++Command Parameters ++ typedef struct { ++ A_UINT32 akmpInfo; ++ } WMI_SET_AKMP_PARAMS_CMD; ++ ++Command Values ++ akmpInfo; ++ bit[0] = 0 ++ MultiPMKID mode is disabled and PMKIDs that ++ were set using the WMI_SET_PMKID_CMD are ++ used in the [Re]AssocRequest frame. ++ bit[0] = 1 ++ MultiPMKID mode is enabled and PMKIDs issued ++ by the WMI_SET_PMKID_LIST_CMD are used in ++ the next [Re]AssocRequest sent to the AP. ++ ++Reset Values ++ MultiPMKID mode is disabled ++ ++Restrictions ++ None ++ ++===================================================================== ++ ++ ++Name ++ SET_APPIE ++ ++Synopsis ++ Add an application-specified IE to a management frame. The maximum length is ++ 76 bytes. Including the length and the element ID, this translates to 78 bytes. ++ ++Command ++ wmiconfig --setappie , where: ++ ++ frame ++ One of beacon, probe, respon, assoc ++ ++ IE ++ A hex string beginning with DD (if = 0, no ++ IE is sent in the management frame) ++ ++Command Parameters ++ mgmtFrmType; ++ A WMI_MGMT_FRAME_TYPE ++ ++ ieLen; ++ Length of the IE to add to the GMT frame ++ ++Command Values ++ None ++ ++Reset Value ++ None defined ++ ++Restrictions ++ Supported only for the probe request and association request management frame ++types. Also, only one IE can be added per management frame type. ++ ++===================================================================== ++ ++ ++Name ++ SET_ASSOC_INFO ++ ++Synopsis ++ The host uses this command to specify any information elements (IEs) it wishes the ++ AR6000 device to add to all future association and reassociation requests. IEs must be ++ correct and are used as is by the device. IEs specified through this command are ++ cleared with a DISCONNECT. ++ ++Command ++ wmiconfig eth1 --setAssocIe ++ ++Command Parameters ++ UINT8 ieType Used directly in 802.11 frames ++ UINT8 bufferSize Size of assocInfo (in bytes) ranging from ++ 0–240. If = 0, previously set IEs are cleared. ++ UINT8 assocInfo[bufferSize] Used directly in 802.11 frames ++ ++Command Values ++ None ++ ++Reset Values ++ IEs are cleared ++ ++Restrictions ++ This command can only be issued in the DISCONNECTED state ++ ++===================================================================== ++ ++ ++Name ++ SET_AUTHMODE ++ ++Synopsis ++ Sets the 802.11 authentication mode of reconnection ++ ++Command ++ wmiconfig eth1 --setauthmode ++ ++Command Parameters ++ UINT8 mode ++ ++Command Values ++ mode = 0x00 Proceed with authentication during reconnect ++ = 0x01 Do not proceed with authentication during reconnect ++ ++Reset Values ++ Authentication ++ ++Restrictions ++ None ++ ++===================================================================== ++ ++ ++Name ++ SET_BEACON_INT ++ ++Synopsis ++ Sets the beacon interval for an ad hoc network. Beacon interval selection may have an ++ impact on power savings. To some degree, a longer interval reduces power ++ consumption but also decreases throughput. A thorough understanding of IEEE ++ 802.11 ad hoc networks is required to use this command effectively. ++ ++Command ++ wmiconfig eth1 --ibssconintv ++ ++Command Parameters ++ UINT16 beaconInterval Specifies the beacon interval in TU units (1024 ms) ++ ++Command Values ++ None ++ ++Reset Values ++ The default beacon interval is 100 TUs (102.4 ms) ++ ++Restrictions ++ This command can only be issued before the AR6000 device starts an ad hoc network ++ ++See Also ++ “SET_IBSS_PM_CAPS” ++ ++===================================================================== ++ ++ ++Name ++ SET_BIT_RATE ++ ++Synopsis ++ The host uses this command to set the AR6000 device to a specific fixed rate. ++ ++Command ++ wmiconfig eth1 --setfixrates ... ++ ++Command Parameters ++ INT8 rateIndex ++ A WMI_BIT_RATE value ++ { ++ RATE_AUTO = -1 ++ RATE_1Mb = 0 ++ RATE_2Mb = 1 ++ RATE_5_5M = 2 ++ RATE_11Mb = 3 ++ RATE_6Mb = 4 ++ RATE_9Mb = 5 ++ RATE_12Mb = 6 ++ RATE_18Mb = 7 ++ RATE_24Mb = 8 ++ RATE_36Mb = 9 ++ RATE_48Mb = 10 ++ RATE_54Mb = 11 ++ } WMI_BIT_RATE ++ ++ ++Command Values ++ See command parameters ++ ++Reset Values ++ The dynamic rate is determined by the AR6000 device ++ ++Restrictions ++ This command is intended for use only during development/debug; it is not ++intended for use in production ++ ++See Also ++ “GET_BIT_RATE” ++ ++===================================================================== ++ ++ ++Name ++ SET_BMISS_TIME ++ ++Synopsis ++ This command sets the beacon miss (BMISS) time, which the AR6000 hardware use ++ to recognize missed beacons. When an excessive number (15) of consecutive beacons ++ are missed, the AR6000 consider switching to a different BSS. The time can be ++ specified in number of beacons or in TUs. ++ ++Command(s) ++ wmiconfig eth1 --setbmissbeacons= ++ wmiconfig eth1 --setbmisstime= ++ ++Command Parameters ++ UINT16 bmissTime Specifies the beacon miss time ++ [1000...5000] in TUs (1024 ms) ++ UINT16 bmissbeacons Specifies the number of beacons [5...50] ++ ++Command Values ++ None ++ ++Reset Values ++ bmissTime is 1500 TUs (1536 ms) ++ ++Restrictions ++ None ++ ++===================================================================== ++ ++ ++Name ++ SET_BSS_FILTER ++ ++Synopsis ++ The host uses this to inform the AR6000 device of the types of networks about which ++ it wants to receive information from the “BSSINFO” event. As the device performs ++ either foreground or background scans, it applies the filter and sends “BSSINFO” ++ events only for the networks that pass the filter. If any of the bssFilter or the ieMask ++ filter matches, a BSS Info is sent to the host. The ieMask currently is used as a match ++ for the IEs in the beacons, probe reponses and channel switch action management ++ frame. See also “Scan and Roam” on page C-1. ++ ++ The BSS filter command has been enhanced to support IE based filtering. The IEs can ++ be specified as a bitmask through this command using this enum. ++ ++Command ++ wmiconfig eth1 –filter = --ieMask 0x ++ ++Command Parameters ++ UINT8 BssFilter ++ ++ Command Values ++ typedef struct { ++ A_UINT8 bssFilter; See WMI_BSS_FILTER ++ A_UINT32 ieMask; ++ } __ATTRIB_PACK WMI_BSS_FILTER_CMD; ++ ++ The ieMask can take this combination of values: ++ ++ enum { ++ BSS_ELEMID_CHANSWITCH = 0x01 ++ BSS_ELEMID_ATHEROS = 0x02, ++ } ++ ++Reply Value ++ None ++ ++Reset Value ++ BssFilter = NONE_BSS_FILTER (0) ++ ++Restrictions ++ None ++ ++See Also ++ “CONNECT_CMD” ++ ++===================================================================== ++ ++ ++Name ++ SET_BT_PARAMS ++ ++Synopsis ++ This command is used to set the status of a Bluetooth stream or set Bluetooth ++ coexistence register parameters. The stream may be an SCO or an A2DP stream and ++ its status can be started/stopped/suspended/resumed. ++ ++Command ++ wmiconfig –setBTparams ++ ++Command Parameters ++ struct { ++ union { ++ BT_PARAMS_SCO scoParams; ++ BT_PARAMS_A2DP a2dpParams; ++ BT_PARAMS_MISC miscParams; ++ BT_COEX_REGS regs; ++ } info; ++ A_UINT8 paramType; ++ struct { ++ A_UINT8 noSCOPkts; Number of SCO packets between consecutive PS-POLLs ++ A_UINT8 pspollTimeout; ++ A_UINT8 stompbt; ++ } BT_PARAMS_SCO; ++ struct { ++ A2DP BT stream parameters ++ A_UINT32 period; ++ A_UINT32 dutycycle; ++ A_UINT8 stompbt; ++ } BT_PARAMS_A2DP; ++ struct { ++ union { ++ WLAN_PROTECT_POLICY_TYPE protectParams; ++ A_UINT16 wlanCtrlFlags; ++ }info; ++ A_UINT8 paramType; ++ } BT_PARAMS_MISC; ++ struct { ++ BT coexistence registers values ++ A_UINT32 mode; Coexistence mode ++ A_UINT32 scoWghts; WLAN and BT weights ++ A_UINT32 a2dpWghts; ++ A_UINT32 genWghts; ++ A_UINT32 mode2; Coexistence mode2 ++ A_UINT8 setVal; ++ } BT_COEX_REGS; ++ ++Command Values ++ None defined ++ ++Reset Value ++ None ++ ++Restrictions ++ None ++ ++===================================================================== ++ ++ ++Name ++ SET_BT_STATUS ++ ++Synopsis ++ Sets the status of a Bluetooth stream. The stream may be a SCO or an A2DP stream ++ and its status can be started/stopped/suspended/resumed. ++ ++Command ++ wmiconfig –setBTstatus ++ ++Command Parameters ++ { ++ A_UINT8 streamType; Stream type ++ A_UINT8 status; Stream status ++ }WMI_SET_BT_STATUS_CMD; ++ ++Command Values ++ { ++ BT_STREAM_UNDEF = 0 ++ BT_STREAM_SCO ++ SCO stream ++ BT_STREAM_A2DP ++ A2DP stream ++ BT_STREAM_MAX ++ } BT_STREAM_TYPE; ++ ++ { ++ BT_STATUS_UNDEF = 0 ++ BT_STATUS_START ++ BT_STATUS_STOP ++ BT_STATUS_RESUME ++ BT_STATUS_SUSPEND ++ BT_STATUS_MAX ++ } BT_STREAM_STATUS; ++ ++Reset Value ++ None defined ++ ++Restrictions ++ None ++ ++===================================================================== ++ ++ ++Name ++ SET_CHANNEL_PARAMETERS ++ ++Synopsis ++ Configures various WLAN parameters related to channels, sets the wireless mode, ++ and can restrict the AR6000 device to a subset of available channels. The list of ++ available channels varies depending on the wireless mode and the regulatory ++ domain. The device never operates on a channel outside of its regulatory domain. The ++ device starts to scan the list of channels right after this command. ++ ++Command ++ wmiconfig eth1 --wmode ++ ++Command Parameters ++ UINT8 phyMode See Values below. ++ UINT8 numberOfChannels ++ Number of channels in the channel array that ++ follows. If = 0, then the device uses all of the ++ channels permitted by the regulatory domain ++ and by the specified phyMode. ++ UINT16 channel[numberOfChannels] ++ Array listing the subset of channels (expressed ++ as frequencies in MHz) the host wants the ++ device to use. Any channel not permitted by ++ the specified phyMode or by the specified ++ regulatory domain is ignored by the device. ++ ++Command Values ++ phyMode = { ++ Wireless mode ++ 11a = 0x01 ++ 11g = 0x02 ++ 11ag = 0x03 ++ 11b = 0x04 ++ 11g only = 0x05 ++ } ++ ++Reset Values ++ phyMode ++ 11ag ++ 802.11a/g modules ++ 11g ++ 802.11g module ++ channels ++ Defaults to all channels permitted by the ++ current regulatory domain. ++ ++Restrictions ++ This command, if issued, should be issued soon after reset and prior to the first ++ connection. This command should only be issued in the DISCONNECTED state. ++ ++===================================================================== ++ ++ ++Name ++ SET_DISC_TIMEOUT ++ ++Synopsis ++ The host uses this command to configure the amount of time that the AR6000 should ++ spend when it attempts to reestablish a connection after losing link with its current ++ BSS. If this time limit is exceeded, the AR6000 send a “DISCONNECT” event. After ++ sending the “DISCONNECT” event the AR6000 continues to attempt to reestablish a ++ connection, but they do so at the interval corresponding to a foreground scan as ++ established by the “SET_SCAN_PARAMS” command. ++ ++ A timeout value of 0 indicates that the AR6000 will disable all autonomous roaming, ++ so that the AR6000 will not perform any scans after sending a “DISCONNECT” ++ event to the host. The state is maintained until a shutdown or host sets different ++ timeout value from 0. ++ ++Command ++ wmiconfig eth1 --disc= ++ ++Command Parameters ++ UINT8 disconnectTimeout ++ Specifies the time limit (in seconds) after ++ which a failure to reestablish a connection ++ results in a “DISCONNECT” event ++ ++Command Values ++ None ++ ++Reset Values ++ disconnectTimeout is 10 seconds ++ ++Restrictions ++ This command can only be issued while in a DISCONNECTED state ++ ++===================================================================== ++ ++ ++Name ++ SET_FIXRATES ++ ++Synopsis ++ By default, the AR6000 device uses all PHY rates based on mode of operation. If the ++ host application requires the device to use subset of supported rates, it can set those ++ rates with this command. In 802.11g mode, the AR6000 device takes the entire ++ 802.11g basic rate set and the rates specified with this command and uses it as the ++ supported rate set. ++ ++ This rate set is advertised in the probe request and the assoc/re-assoc request as ++ supported rates. Upon successful association, the device modifies the rate set pool ++ using the: intersection of AP-supported rates with the union of the 802.11g basic rate ++ set and rates set using this command. The device picks transmission rates from this ++ pool based on a rate control algorithm. ++ ++Command ++ TBD ++ ++Command Parameters ++ A_UINT16 fixRateMask; ++ The individual bit is an index for rate table, ++ and setting the that index to 1 would set that ++ corresponding rate. E.g., fixRateMask = 9 ++ (1001) sets 1 Mbps and 11 Mbps. ++ ++Command Values ++ None ++ ++Reset Value ++ None defined ++ ++Restrictions ++ None ++ ++See Also ++ “GET_FIXRATES” ++ ++===================================================================== ++ ++ ++Name ++ SET_WHAL_PARAM ++ ++Synopsis ++ An internal AR6000 command that is used to set certain hardware parameters. The ++ description of this command is in $WORKAREA/include/halapi.h. ++ ++Command ++ TBD ++ ++Command Parameters ++ ATH_HAL_SETCABTO_CMDID ++ Sets the timeout waiting for the multicast ++ traffic after a DTIM beacon (in TUs). ++ ++Command Values ++ None ++ ++Reset Value ++ Default = 10 TUs ++ ++Restrictions ++ This command should be executed before issuing a connect command. ++ ++===================================================================== ++ ++ ++Name ++ SET_HOST_SLEEP_MODE ++ ++Synopsis ++ The host uses this command to set the host mode to asleep or awake. All packets are ++ delivered to the host when the host mode is awake. When host mode is asleep, only if ++ WoW is enabled and the incoming packet matches one of the specified WoW ++ patterns, will the packet be delivered to the host. The host will also be woken up by ++ the target for pattern-matching packets and important events. ++ ++Command ++ wmiconfig –sethostmode= ++ ++Command Parameters ++ A_BOOL awake Set the host mode to awake ++ A_BOOL asleep Set the host mode to asleep ++ ++Command Values ++ 1 = awake, 0 = asleep ++ ++Reset Value ++ None defined (default host mode is awake) ++ ++Restrictions ++ None ++ ++ ++===================================================================== ++ ++Name ++ SET_IBSS_PM_CAPS ++ ++Synopsis ++ Used to support a non-standard power management scheme for an ad hoc wireless ++ network consisting of up to eight stations (STAs) that support this form of power ++ saving (e.g., Atheros-based STAs). A thorough understanding of IEEE 802.11 ad hoc ++ networks is required to use this command effectively. ++ ++Command ++ wmiconfig eth1 --ibsspmcaps --ps= ++ --aw= ++ --ttl=