From: Piotr Dymacz <pepe2k@gmail.com>
Date: Wed, 16 Aug 2017 20:32:38 +0000 (+0200)
Subject: Add low level USB init
X-Git-Url: https://git.librecmc.org/?a=commitdiff_plain;h=6020424ed80e7c80cdb605e8e205bf7b798be950;p=oweals%2Fu-boot_mod.git

Add low level USB init

In case of some devices (mostly TP-Link), kernel from their vendor
firmware doesn't fully initialize USB. This solves problems with
not-functioning USB in vendor firmware on QCA9531 (for now) based
devices.
---

diff --git a/u-boot/Makefile b/u-boot/Makefile
index 5ef890c..fe12914 100644
--- a/u-boot/Makefile
+++ b/u-boot/Makefile
@@ -430,6 +430,7 @@ comfast_cf-e520n: qca953x_common
 comfast_cf-e530n: qca953x_common
 	@$(call config_init,Comfast CF-E530N,cf-e530n,8,17,1,QCA_QCA953X_SOC)
 	@$(call define_add,CONFIG_FOR_COMFAST_CF_E530N,1)
+	@$(call define_add,CONFIG_USB,1)
 	@$(call define_add,CFG_ATHRS27_PHY,1)
 	@$(call define_add,CFG_ATH_GMAC_NMACS,2)
 	@$(MKCONFIG) -a ap143 mips mips ap143 ar7240 ar7240
@@ -483,6 +484,7 @@ p2w_cpe505n: qca953x_common
 p2w_r602n: qca953x_common
 	@$(call config_init,P&W R602N,r602n,16,17,1,QCA_QCA953X_SOC)
 	@$(call define_add,CONFIG_FOR_P2W_R602N,1)
+	@$(call define_add,CONFIG_USB,1)
 	@$(call define_add,CFG_ATHRS27_PHY,1)
 	@$(call define_add,CFG_ATH_GMAC_NMACS,2)
 	@$(MKCONFIG) -a ap143 mips mips ap143 ar7240 ar7240
@@ -522,6 +524,7 @@ tp-link_tl-mr3420_v2: ar934x_common lsdk_kernel
 tp-link_tl-mr3420_v3: qca953x_common lsdk_kernel
 	@$(call config_init,TP-Link TL-MR3420 v3,tl-mr3420-v3,4,12,1,QCA_QCA953X_SOC)
 	@$(call define_add,CONFIG_FOR_TPLINK_MR3420_V3,1)
+	@$(call define_add,CONFIG_USB,1)
 	@$(call define_add,CFG_ATHRS27_PHY,1)
 	@$(call define_add,CFG_ATH_GMAC_NMACS,2)
 	@$(MKCONFIG) -a ap143 mips mips ap143 ar7240 ar7240
@@ -529,6 +532,7 @@ tp-link_tl-mr3420_v3: qca953x_common lsdk_kernel
 tp-link_tl-mr6400_v1v2: qca953x_common lsdk_kernel
 	@$(call config_init,TP-Link TL-MR6400 v1/v2,tl-mr6400-v1v2,8,12,1,QCA_QCA953X_SOC)
 	@$(call define_add,CONFIG_FOR_TPLINK_MR6400_V1V2,1)
+	@$(call define_add,CONFIG_USB,1)
 	@$(call define_add,CONFIG_QCA_ETH_PHY_SWAP,1)
 	@$(call define_add,CFG_ATHRS27_PHY,1)
 	@$(call define_add,CFG_ATH_GMAC_NMACS,2)
@@ -611,6 +615,7 @@ tp-link_tl-wr802n: qca953x_common lsdk_kernel
 tp-link_tl-wr810n: qca953x_common lsdk_kernel
 	@$(call config_init,TP-Link TL-WR810N,tl-wr810n,8,12,1,QCA_QCA953X_SOC)
 	@$(call define_add,CONFIG_FOR_TPLINK_WR810N,1)
+	@$(call define_add,CONFIG_USB,1)
 	@$(call define_add,CFG_ATHRS27_PHY,1)
 	@$(call define_add,CFG_ATH_GMAC_NMACS,2)
 	@$(MKCONFIG) -a ap143 mips mips ap143 ar7240 ar7240
@@ -618,6 +623,7 @@ tp-link_tl-wr810n: qca953x_common lsdk_kernel
 tp-link_tl-wr820n_CN: qca953x_common lsdk_kernel
 	@$(call config_init,TP-Link TL-WR820N CN,tl-wr820n,4,12,1,QCA_QCA953X_SOC)
 	@$(call define_add,CONFIG_FOR_TPLINK_WR820N_CN,1)
+	@$(call define_add,CONFIG_USB,1)
 	@$(call define_add,CFG_ATHRS27_PHY,1)
 	@$(call define_add,CFG_ATH_GMAC_NMACS,2)
 	@$(MKCONFIG) -a ap143 mips mips ap143 ar7240 ar7240
@@ -653,6 +659,7 @@ tp-link_tl-wr841n_v9: qca953x_common lsdk_kernel
 tp-link_tl-wr842n_v3: qca953x_common lsdk_kernel
 	@$(call config_init,TP-Link TL-WR842N/D v3,tl-wr842nd-v3,16,1,1,QCA_QCA953X_SOC)
 	@$(call define_add,CONFIG_FOR_TPLINK_WR842N_V3,1)
+	@$(call define_add,CONFIG_USB,1)
 	@$(call define_add,CFG_ATHRS27_PHY,1)
 	@$(call define_add,CFG_ATH_GMAC_NMACS,2)
 	@$(MKCONFIG) -a ap143 mips mips ap143 ar7240 ar7240
@@ -660,6 +667,7 @@ tp-link_tl-wr842n_v3: qca953x_common lsdk_kernel
 tp-link_tl-wr902ac_v1: qca953x_common lsdk_kernel
 	@$(call config_init,TP-Link TL-WR902AC,tl-wr902ac,8,3,1,QCA_QCA953X_SOC)
 	@$(call define_add,CONFIG_FOR_TPLINK_WR902AC_V1,1)
+	@$(call define_add,CONFIG_USB,1)
 	@$(call define_add,CFG_ATHRS27_PHY,1)
 	@$(call define_add,CFG_ATH_GMAC_NMACS,2)
 	@$(call define_add,CONFIG_PCI,1)
@@ -680,6 +688,7 @@ village-telco_mesh-potato_v2: ar933x_common
 wallys_dr531: qca953x_common
 	@$(call config_init,Wallys DR531,dr531,8,17,1,QCA_QCA953X_SOC)
 	@$(call define_add,CONFIG_FOR_WALLYS_DR531,1)
+	@$(call define_add,CONFIG_USB,1)
 	@$(call define_add,CFG_ATHRS27_PHY,1)
 	@$(call define_add,CFG_ATH_GMAC_NMACS,2)
 	@$(call define_add,CONFIG_PCI,1)
@@ -709,6 +718,7 @@ yuncore_cpe870: ar934x_common
 zbtlink_zbt-we1526: qca953x_common
 	@$(call config_init,Zbtlink ZBT-WE1526,zbt-we1526,16,17,1,QCA_QCA953X_SOC)
 	@$(call define_add,CONFIG_FOR_ZBTLINK_ZBT_WE1526,1)
+	@$(call define_add,CONFIG_USB,1)
 	@$(call define_add,CFG_ATHRS27_PHY,1)
 	@$(call define_add,CFG_ATH_GMAC_NMACS,2)
 	@$(MKCONFIG) -a ap143 mips mips ap143 ar7240 ar7240
diff --git a/u-boot/cpu/mips/ar7240/Makefile b/u-boot/cpu/mips/ar7240/Makefile
index 91eb4af..98d30d1 100644
--- a/u-boot/cpu/mips/ar7240/Makefile
+++ b/u-boot/cpu/mips/ar7240/Makefile
@@ -11,6 +11,7 @@ OBJS	+= qca_clocks.o
 OBJS	+= qca_sf.o
 OBJS	+= qca_dram.o
 OBJS	+= qca_pci.o
+OBJS	+= qca_usb.o
 SOBJS	+= qca_gpio_init.o
 
 ifeq ($(BOARD), ap121)
diff --git a/u-boot/cpu/mips/ar7240/qca_usb.c b/u-boot/cpu/mips/ar7240/qca_usb.c
new file mode 100644
index 0000000..07f21fb
--- /dev/null
+++ b/u-boot/cpu/mips/ar7240/qca_usb.c
@@ -0,0 +1,56 @@
+/*
+ * Copyright (C) 2017 Piotr Dymacz <piotr@dymacz.pl>
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include <config.h>
+#include <common.h>
+#include <asm/addrspace.h>
+#include <soc/qca_soc_common.h>
+
+#if defined(CONFIG_USB)
+
+void usb_init(void)
+{
+#if (SOC_TYPE & QCA_QCA953X_SOC)
+	u32 val;
+
+	/* Select REFCLK USB PLL input */
+	val = qca_soc_reg_read(QCA_PLL_SWITCH_CLK_CTRL_REG);
+	val &= ~QCA_PLL_SWITCH_CLK_CTRL_USB_CLK_SEL_MASK;
+
+	if (qca_xtal_is_40mhz())
+		val |= (QCA_PLL_SWITCH_CLK_CTRL_USB_CLK_SEL_40M_VAL
+			<< QCA_PLL_SWITCH_CLK_CTRL_USB_CLK_SEL_SHIFT);
+	else
+		val |= (QCA_PLL_SWITCH_CLK_CTRL_USB_CLK_SEL_25M_VAL
+			<< QCA_PLL_SWITCH_CLK_CTRL_USB_CLK_SEL_SHIFT);
+
+	qca_soc_reg_write(QCA_PLL_SWITCH_CLK_CTRL_REG, val);
+	udelay(1000);
+
+	/* Take out USB PHY/HOST/PLL out of reset */
+	qca_soc_reg_read_set(QCA_RST_RESET_REG,
+			     QCA_RST_RESET_USB_PHY_SUSPEND_ORIDE_MASK);
+	udelay(1000);
+
+	qca_soc_reg_read_clear(QCA_RST_RESET_REG,
+			       QCA_RST_RESET_USB_PHY_ARST_MASK);
+	udelay(1000);
+
+	qca_soc_reg_read_clear(QCA_RST_RESET_REG,
+			       QCA_RST_RESET_USB_PHY_RST_MASK);
+	udelay(1000);
+
+	qca_soc_reg_read_clear(QCA_RST_RESET_REG,
+			       QCA_RST_RESET_USB_HOST_RST_MASK);
+	udelay(1000);
+
+	qca_soc_reg_read_clear(QCA_RST_RESET_REG,
+			       QCA_RST_RESET_USB_PHY_PLLPWD_EXT_MASK);
+	udelay(10);
+#endif
+}
+
+#endif /* defined(CONFIG_USB) */
diff --git a/u-boot/include/common.h b/u-boot/include/common.h
index caf6dfa..e2897a1 100644
--- a/u-boot/include/common.h
+++ b/u-boot/include/common.h
@@ -166,6 +166,7 @@ void hang(void) __attribute__ ((noreturn));
 /* */
 long int dram_init(void);
 int      timer_init(void);
+void     usb_init(void);
 void     full_reset(void);
 void     all_led_on(void);
 void     all_led_off(void);
diff --git a/u-boot/include/soc/qca_soc_common.h b/u-boot/include/soc/qca_soc_common.h
index aa76217..c7d64b6 100644
--- a/u-boot/include/soc/qca_soc_common.h
+++ b/u-boot/include/soc/qca_soc_common.h
@@ -1287,6 +1287,8 @@
 #define QCA_PLL_SWITCH_CLK_CTRL_HSUART_CLK_SEL_MASK				BIT(QCA_PLL_SWITCH_CLK_CTRL_HSUART_CLK_SEL_SHIFT)
 #define QCA_PLL_SWITCH_CLK_CTRL_USB_CLK_SEL_SHIFT				8
 #define QCA_PLL_SWITCH_CLK_CTRL_USB_CLK_SEL_MASK				BITS(QCA_PLL_SWITCH_CLK_CTRL_USB_CLK_SEL_SHIFT, 4)
+#define QCA_PLL_SWITCH_CLK_CTRL_USB_CLK_SEL_25M_VAL				0x2
+#define QCA_PLL_SWITCH_CLK_CTRL_USB_CLK_SEL_40M_VAL				0x5
 
 /* DDR_PLL_DITHER register (DDR PLL dither parameter) */
 #if (SOC_TYPE & QCA_QCA956X_SOC)
diff --git a/u-boot/lib_mips/board.c b/u-boot/lib_mips/board.c
index 32da3c3..3d8ad41 100644
--- a/u-boot/lib_mips/board.c
+++ b/u-boot/lib_mips/board.c
@@ -397,6 +397,10 @@ void board_init_r(gd_t *id, ulong dest_addr)
 	pci_init();
 #endif
 
+#if defined(CONFIG_USB)
+	usb_init();
+#endif
+
 	/* Leave this here (after malloc(), environment and PCI are working) */
 	/* Initialize devices */
 	devices_init();